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Redo RM9000 workaround which along with other DSP ASE changes was

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causing some headache for debuggers knowing about signal frames.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2005-06-15 13:00:12 +00:00
parent aac8aa7717
commit 02416dcf5a
9 changed files with 99 additions and 87 deletions
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11
include/asm-mips/cpu-features.h
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@@ -109,17 +109,6 @@
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
#endif
/*
* Certain CPUs may throw bizarre exceptions if not the whole cacheline
* contains valid instructions. For these we ensure proper alignment of
* signal trampolines and pad them to the size of a full cache lines with
* nops. This is also used in structure definitions so can't be a test macro
* like the others.
*/
#ifndef PLAT_TRAMPOLINE_STUFF_LINE
#define PLAT_TRAMPOLINE_STUFF_LINE 0UL
#endif
#ifdef CONFIG_32BIT
# ifndef cpu_has_nofpuex
# define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)