usb: otg: Add usb_hs_system_clk to OTG driver for MSM9615
This change add usb system clock support to OTG Driver. System clock is a 60MHZ input clock to the USB ChipIdea core. This clock is required starting from MDM9615. This change also removes the enforcement for using a phy_reset_clk for reseting the PHY. Starting from MDM9615, PHY reset is not implemented. The core is reset together with the PHY using "usb_hs_clk" signal. Signed-off-by: Amit Blay <ablay@codeaurora.org>
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committed by
Bryan Huntsman
parent
d98328ef47
commit
02eff13c45
@@ -165,6 +165,7 @@ struct msm_otg_platform_data {
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* @pclk_src: pclk source for voting.
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* @phy_reset_clk: clock struct of usb_phy_clk.
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* @core_clk: clock struct of usb_hs_core_clk.
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* @system_clk: clock struct of usb_system_clk.
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* @regs: ioremapped register base address.
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* @inputs: OTG state machine inputs(Id, SessValid etc).
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* @sm_work: OTG state machine work.
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@@ -192,6 +193,7 @@ struct msm_otg {
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struct clk *pclk_src;
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struct clk *phy_reset_clk;
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struct clk *core_clk;
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struct clk *system_clk;
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void __iomem *regs;
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#define ID 0
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#define B_SESS_VLD 1
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