ARM: vfp: Move exception address fixup into vfphw.S

If the PC on the stack is updated in entry-armv.S,
do_undefinstr can get called after the fixup.  do_undefinstr
does its own fixup, and doing both causes the PC to point to
half way through an instruction.

Instead, do the fixup in do_vfp, where only the vfp code
can get called.

Change-Id: I6d966887adc8ed58d88bfe0cb3c0ba29213be488
Signed-off-by: Colin Cross <ccross@android.com>
This commit is contained in:
Colin Cross
2011-01-27 15:46:20 -08:00
parent d20e6ae8ac
commit 082fec5ea3
2 changed files with 3 additions and 3 deletions

View File

@@ -492,8 +492,7 @@ __und_usr:
blo __und_usr_unknown blo __und_usr_unknown
3: ldrht r0, [r4] 3: ldrht r0, [r4]
add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 add r2, r2, #2 @ r2 is PC + 2, make it PC + 4
str r2, [sp, #S_PC] @ it's a 2x16bit instr, update orr r0, r0, r5, lsl #16
orr r0, r0, r5, lsl #16 @ regs->ARM_pc
#else #else
b __und_usr_unknown b __und_usr_unknown
#endif #endif

View File

@@ -10,7 +10,7 @@
* *
* Basic entry code, called from the kernel's undefined instruction trap. * Basic entry code, called from the kernel's undefined instruction trap.
* r0 = faulted instruction * r0 = faulted instruction
* r5 = faulted PC+4 * r2 = faulted PC+4
* r9 = successful return * r9 = successful return
* r10 = thread_info structure * r10 = thread_info structure
* lr = failure return * lr = failure return
@@ -26,6 +26,7 @@ ENTRY(do_vfp)
str r11, [r10, #TI_PREEMPT] str r11, [r10, #TI_PREEMPT]
#endif #endif
enable_irq enable_irq
str r2, [sp, #S_PC] @ update regs->ARM_pc for Thumb 2 case
ldr r4, .LCvfp ldr r4, .LCvfp
ldr r11, [r10, #TI_CPU] @ CPU number ldr r11, [r10, #TI_CPU] @ CPU number
add r10, r10, #TI_VFPSTATE @ r10 = workspace add r10, r10, #TI_VFPSTATE @ r10 = workspace