From 2ca30356bd3e2db7de9df06670ff9ba2f6dfafe4 Mon Sep 17 00:00:00 2001 From: Nagamalleswararao Ganji Date: Fri, 24 Jun 2011 18:16:23 -0700 Subject: [PATCH] msm_fb: display: Fix DSI PLL/clock warnings CRs-Fixed: 300073 Signed-off-by: Nagamalleswararao Ganji --- drivers/video/msm/mdp4_overlay_dsi_cmd.c | 4 +- drivers/video/msm/mdp_dma.c | 2 +- drivers/video/msm/mipi_dsi.c | 19 ++++++-- drivers/video/msm/mipi_dsi.h | 3 ++ drivers/video/msm/mipi_dsi_host.c | 27 +++++++++++ drivers/video/msm/msm_dss_io_7x27a.c | 61 +++++++++++------------ drivers/video/msm/msm_dss_io_8960.c | 62 ++++++++++-------------- drivers/video/msm/msm_dss_io_8x60.c | 57 ++++++++++------------ 8 files changed, 127 insertions(+), 108 deletions(-) diff --git a/drivers/video/msm/mdp4_overlay_dsi_cmd.c b/drivers/video/msm/mdp4_overlay_dsi_cmd.c index 9d00d80a189..433ac239704 100644 --- a/drivers/video/msm/mdp4_overlay_dsi_cmd.c +++ b/drivers/video/msm/mdp4_overlay_dsi_cmd.c @@ -61,7 +61,7 @@ static void dsi_clock_tout(unsigned long data) if (mipi_dsi_clk_on) { if (dsi_state == ST_DSI_PLAYING) { mdp4_stat.dsi_clkoff++; - mipi_dsi_clk_disable(); + mipi_dsi_turn_off_clks(); mdp4_overlay_dsi_state_set(ST_DSI_CLK_OFF); } } @@ -577,7 +577,7 @@ void mdp4_dsi_cmd_dma_busy_wait(struct msm_fb_data_type *mfd) /* satrt dsi clock if necessary */ if (mipi_dsi_clk_on == 0) { local_bh_disable(); - mipi_dsi_clk_enable(); + mipi_dsi_turn_on_clks(); local_bh_enable(); } diff --git a/drivers/video/msm/mdp_dma.c b/drivers/video/msm/mdp_dma.c index a78c0db0a29..f9f79546299 100644 --- a/drivers/video/msm/mdp_dma.c +++ b/drivers/video/msm/mdp_dma.c @@ -302,7 +302,7 @@ void mdp3_dsi_cmd_dma_busy_wait(struct msm_fb_data_type *mfd) spin_lock_irqsave(&mdp_spin_lock, flag); #ifdef DSI_CLK_CTRL if (mipi_dsi_clk_on == 0) - mipi_dsi_clk_enable(); + mipi_dsi_turn_on_clks(); #endif if (mfd->dma->busy == TRUE) { diff --git a/drivers/video/msm/mipi_dsi.c b/drivers/video/msm/mipi_dsi.c index efa5b419a16..b8963e47851 100644 --- a/drivers/video/msm/mipi_dsi.c +++ b/drivers/video/msm/mipi_dsi.c @@ -113,13 +113,19 @@ static int mipi_dsi_off(struct platform_device *pdev) #ifdef CONFIG_MSM_BUS_SCALING mdp_bus_scale_update_request(0); #endif + + local_bh_disable(); + mipi_dsi_clk_disable(); + local_bh_enable(); + /* disbale dsi engine */ MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0); mipi_dsi_phy_ctrl(0); + local_bh_disable(); - mipi_dsi_clk_disable(); + mipi_dsi_ahb_ctrl(0); local_bh_enable(); if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save) @@ -157,12 +163,13 @@ static int mipi_dsi_on(struct platform_device *pdev) if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save) mipi_dsi_pdata->dsi_power_save(1); + local_bh_disable(); + mipi_dsi_ahb_ctrl(1); + local_bh_enable(); + clk_rate = mfd->fbi->var.pixclock; clk_rate = min(clk_rate, mfd->panel_info.clk_max); - local_bh_disable(); - mipi_dsi_clk_enable(); - local_bh_enable(); #ifndef CONFIG_FB_MSM_MDP303 mdp4_overlay_dsi_state_set(ST_DSI_RESUME); @@ -187,6 +194,10 @@ static int mipi_dsi_on(struct platform_device *pdev) mipi_dsi_phy_init(0, &(mfd->panel_info), target_type); + local_bh_disable(); + mipi_dsi_clk_enable(); + local_bh_enable(); + mipi = &mfd->panel_info.mipi; if (mfd->panel_info.type == MIPI_VIDEO_PANEL) { dummy_xres = mfd->panel_info.mipi.xres_pad; diff --git a/drivers/video/msm/mipi_dsi.h b/drivers/video/msm/mipi_dsi.h index ec488562b4b..24474c8aebc 100644 --- a/drivers/video/msm/mipi_dsi.h +++ b/drivers/video/msm/mipi_dsi.h @@ -279,6 +279,9 @@ int mipi_dsi_clk_div_config(uint8 bpp, uint8 lanes, uint32 *expected_dsi_pclk); void mipi_dsi_clk_init(struct device *dev); void mipi_dsi_clk_deinit(struct device *dev); +void mipi_dsi_ahb_ctrl(u32 enable); +void mipi_dsi_turn_on_clks(void); +void mipi_dsi_turn_off_clks(void); #ifdef CONFIG_FB_MSM_MDP303 void update_lane_config(struct msm_panel_info *pinfo); diff --git a/drivers/video/msm/mipi_dsi_host.c b/drivers/video/msm/mipi_dsi_host.c index b6e7bb4a9ff..3ce22748af9 100644 --- a/drivers/video/msm/mipi_dsi_host.c +++ b/drivers/video/msm/mipi_dsi_host.c @@ -39,6 +39,7 @@ #include "mdp.h" #include "mdp4.h" +int mipi_dsi_clk_on; static struct completion dsi_dma_comp; static struct dsi_buf dsi_tx_buf; static int dsi_irq_enabled; @@ -105,6 +106,32 @@ void mipi_dsi_disable_irq(void) spin_unlock(&dsi_lock); } +void mipi_dsi_turn_on_clks(void) +{ + if (mipi_dsi_clk_on) { + pr_err("%s: mipi_dsi_clks already ON\n", __func__); + return; + } + mipi_dsi_clk_on = 1; + local_bh_disable(); + mipi_dsi_ahb_ctrl(1); + mipi_dsi_clk_enable(); + local_bh_enable(); +} + +void mipi_dsi_turn_off_clks(void) +{ + if (mipi_dsi_clk_on == 0) { + pr_err("%s: mipi_dsi_clks already OFF\n", __func__); + return; + } + mipi_dsi_clk_on = 0; + local_bh_disable(); + mipi_dsi_clk_disable(); + mipi_dsi_ahb_ctrl(0); + local_bh_enable(); +} + static void mipi_dsi_action(struct list_head *act_list) { struct list_head *lp; diff --git a/drivers/video/msm/msm_dss_io_7x27a.c b/drivers/video/msm/msm_dss_io_7x27a.c index fb7476ce7fe..2de4d6977f4 100644 --- a/drivers/video/msm/msm_dss_io_7x27a.c +++ b/drivers/video/msm/msm_dss_io_7x27a.c @@ -19,7 +19,6 @@ char *mmss_sfpb_base; void __iomem *periph_base; -int mipi_dsi_clk_on; static struct dsi_clk_desc dsicore_clk; static struct dsi_clk_desc dsi_pclk; @@ -292,56 +291,55 @@ void mipi_dsi_phy_init(int panel_ndx, struct msm_panel_info const *panel_info, MIPI_OUTP(MIPI_DSI_BASE + 0x100, 0x67); /* pll ctrl 0 */ - MIPI_OUTP(MIPI_DSI_BASE + 0x200, pd->pll[0]); + MIPI_OUTP(MIPI_DSI_BASE + 0x0200, pd->pll[0]); wmb(); - MIPI_OUTP(MIPI_DSI_BASE + 0x200, (pd->pll[0] | 0x01)); +} + +void mipi_dsi_ahb_ctrl(u32 enable) +{ + if (enable) { + clk_enable(ahb_m_clk); + clk_enable(ahb_s_clk); + } else { + clk_disable(ahb_m_clk); + clk_disable(ahb_s_clk); + } } void mipi_dsi_clk_enable(void) { unsigned data = 0; - - if (mipi_dsi_clk_on) { - pr_err("%s: mipi_dsi_clk already ON\n", __func__); - return; - } - - mipi_dsi_clk_on = 1; + uint32 pll_ctrl; if (clk_set_min_rate(ebi1_dsi_clk, 65000000)) /* 65 MHz */ pr_err("%s: ebi1_dsi_clk set rate failed\n", __func__); clk_enable(ebi1_dsi_clk); - clk_enable(dsi_ref_clk); + + pll_ctrl = MIPI_INP(MIPI_DSI_BASE + 0x0200); + MIPI_OUTP(MIPI_DSI_BASE + 0x0200, pll_ctrl | 0x01); + mb(); + clk_set_rate(dsi_byte_div_clk, data); clk_set_rate(dsi_esc_clk, data); - clk_enable(mdp_dsi_pclk); - clk_enable(ahb_m_clk); - clk_enable(ahb_s_clk); - clk_enable(dsi_byte_div_clk); - clk_enable(dsi_esc_clk); mipi_dsi_pclk_ctrl(&dsi_pclk, 1); mipi_dsi_clk_ctrl(&dsicore_clk, 1); + + clk_enable(dsi_ref_clk); + clk_enable(mdp_dsi_pclk); + clk_enable(dsi_byte_div_clk); + clk_enable(dsi_esc_clk); } void mipi_dsi_clk_disable(void) { - if (mipi_dsi_clk_on == 0) { - pr_err("%s: mipi_dsi_clk already OFF\n", __func__); - return; - } - - mipi_dsi_clk_on = 0; - - MIPI_OUTP(MIPI_DSI_BASE + 0x0118, 0); - - mipi_dsi_pclk_ctrl(&dsi_pclk, 0); - mipi_dsi_clk_ctrl(&dsicore_clk, 0); clk_disable(dsi_esc_clk); clk_disable(dsi_byte_div_clk); clk_disable(mdp_dsi_pclk); - clk_disable(ahb_m_clk); - clk_disable(ahb_s_clk); clk_disable(dsi_ref_clk); + mipi_dsi_pclk_ctrl(&dsi_pclk, 0); + mipi_dsi_clk_ctrl(&dsicore_clk, 0); + /* DSIPHY_PLL_CTRL_0, disable dsi pll */ + MIPI_OUTP(MIPI_DSI_BASE + 0x0200, 0x40); if (clk_set_min_rate(ebi1_dsi_clk, 0)) pr_err("%s: ebi1_dsi_clk set rate failed\n", __func__); clk_disable(ebi1_dsi_clk); @@ -377,10 +375,7 @@ void mipi_dsi_phy_ctrl(int on) /* DSIPHY_CTRL_1 */ MIPI_OUTP(MIPI_DSI_BASE + 0x0294, 0x7f); - /* DSIPHY_PLL_CTRL_0, disbale dsi pll */ - MIPI_OUTP(MIPI_DSI_BASE + 0x0200, 0x40); - - /* disbale dsi clk */ + /* disable dsi clk */ MIPI_OUTP(MIPI_DSI_BASE + 0x0118, 0); } } diff --git a/drivers/video/msm/msm_dss_io_8960.c b/drivers/video/msm/msm_dss_io_8960.c index 8e2c10fa49f..ba93df76c77 100644 --- a/drivers/video/msm/msm_dss_io_8960.c +++ b/drivers/video/msm/msm_dss_io_8960.c @@ -50,7 +50,6 @@ char *mmss_cc_base = MSM_MMSS_CLK_CTL_BASE; char *mmss_sfpb_base; void __iomem *periph_base; -int mipi_dsi_clk_on; static struct dsi_clk_desc dsicore_clk; static struct dsi_clk_desc dsi_pclk; @@ -513,11 +512,8 @@ void mipi_dsi_phy_init(int panel_ndx, struct msm_panel_info const *panel_info, /* pll ctrl 0 */ MIPI_OUTP(MIPI_DSI_BASE + 0x200, pd->pll[0]); wmb(); - MIPI_OUTP(MIPI_DSI_BASE + 0x200, (pd->pll[0] | 0x01)); - mipi_dsi_phy_rdy_poll(); - - off = 0x0440; /* phy timig ctrl 0 - 11 */ + off = 0x0440; /* phy timing ctrl 0 - 11 */ for (i = 0; i < 12; i++) { MIPI_OUTP(MIPI_DSI_BASE + off, pd->timing[i]); wmb(); @@ -528,50 +524,47 @@ void mipi_dsi_phy_init(int panel_ndx, struct msm_panel_info const *panel_info, mipi_dsi_configure_serdes(); } +void mipi_dsi_ahb_ctrl(u32 enable) +{ + if (enable) { + clk_enable(amp_pclk); /* clock for AHB-master to AXI */ + clk_enable(dsi_m_pclk); + clk_enable(dsi_s_pclk); + mipi_dsi_ahb_en(); + mipi_dsi_sfpb_cfg(); + } else { + clk_disable(dsi_m_pclk); + clk_disable(dsi_s_pclk); + clk_disable(amp_pclk); /* clock for AHB-master to AXI */ + } +} + void mipi_dsi_clk_enable(void) { - if (mipi_dsi_clk_on) { - pr_err("%s: mipi_dsi_clk already ON\n", __func__); - return; - } + u32 pll_ctrl = MIPI_INP(MIPI_DSI_BASE + 0x0200); + MIPI_OUTP(MIPI_DSI_BASE + 0x0200, pll_ctrl | 0x01); + mipi_dsi_phy_rdy_poll(); - mipi_dsi_clk_on = 1; - - clk_enable(amp_pclk); /* clock for AHB-master to AXI */ - clk_enable(dsi_m_pclk); - clk_enable(dsi_s_pclk); if (clk_set_rate(dsi_byte_div_clk, 1) < 0) /* divided by 1 */ pr_err("%s: dsi_byte_div_clk - " "clk_set_rate failed\n", __func__); if (clk_set_rate(dsi_esc_clk, 2) < 0) /* divided by 2 */ pr_err("%s: dsi_esc_clk - " "clk_set_rate failed\n", __func__); - clk_enable(dsi_byte_div_clk); - clk_enable(dsi_esc_clk); mipi_dsi_pclk_ctrl(&dsi_pclk, 1); mipi_dsi_clk_ctrl(&dsicore_clk, 1); - mipi_dsi_ahb_en(); - mipi_dsi_sfpb_cfg(); + clk_enable(dsi_byte_div_clk); + clk_enable(dsi_esc_clk); } void mipi_dsi_clk_disable(void) { - if (mipi_dsi_clk_on == 0) { - pr_err("%s: mipi_dsi_clk already OFF\n", __func__); - return; - } - - mipi_dsi_clk_on = 0; - - MIPI_OUTP(MIPI_DSI_BASE + 0x0118, 0); - - mipi_dsi_pclk_ctrl(&dsi_pclk, 0); - mipi_dsi_clk_ctrl(&dsicore_clk, 0); clk_disable(dsi_esc_clk); clk_disable(dsi_byte_div_clk); - clk_disable(dsi_m_pclk); - clk_disable(dsi_s_pclk); - clk_disable(amp_pclk); /* clock for AHB-master to AXI */ + mipi_dsi_pclk_ctrl(&dsi_pclk, 0); + mipi_dsi_clk_ctrl(&dsicore_clk, 0); + /* DSIPHY_PLL_CTRL_0, disable dsi pll */ + MIPI_OUTP(MIPI_DSI_BASE + 0x0200, 0x0); } void mipi_dsi_phy_ctrl(int on) @@ -592,10 +585,7 @@ void mipi_dsi_phy_ctrl(int on) /* DSIPHY_CTRL_1 */ MIPI_OUTP(MIPI_DSI_BASE + 0x0474, 0x7f); - /* DSIPHY_PLL_CTRL_0, disbale dsi pll */ - MIPI_OUTP(MIPI_DSI_BASE + 0x0200, 0x40); - - /* disbale dsi clk */ + /* disable dsi clk */ MIPI_OUTP(MIPI_DSI_BASE + 0x0118, 0); } } diff --git a/drivers/video/msm/msm_dss_io_8x60.c b/drivers/video/msm/msm_dss_io_8x60.c index 51120a3b1a0..0daf727e7f8 100644 --- a/drivers/video/msm/msm_dss_io_8x60.c +++ b/drivers/video/msm/msm_dss_io_8x60.c @@ -23,7 +23,6 @@ char *mmss_cc_base = MSM_MMSS_CLK_CTL_BASE; char *mmss_sfpb_base; void __iomem *periph_base; -int mipi_dsi_clk_on; static struct dsi_clk_desc dsicore_clk; static struct dsi_clk_desc dsi_pclk; @@ -389,49 +388,46 @@ void mipi_dsi_phy_init(int panel_ndx, struct msm_panel_info const *panel_info, /* pll ctrl 0 */ MIPI_OUTP(MIPI_DSI_BASE + 0x200, pd->pll[0]); wmb(); - MIPI_OUTP(MIPI_DSI_BASE + 0x200, (pd->pll[0] | 0x01)); +} + +void mipi_dsi_ahb_ctrl(u32 enable) +{ + if (enable) { + clk_enable(amp_pclk); /* clock for AHB-master to AXI */ + clk_enable(dsi_m_pclk); + clk_enable(dsi_s_pclk); + mipi_dsi_ahb_en(); + mipi_dsi_sfpb_cfg(); + } else { + clk_disable(dsi_m_pclk); + clk_disable(dsi_s_pclk); + clk_disable(amp_pclk); /* clock for AHB-master to AXI */ + } } void mipi_dsi_clk_enable(void) { - if (mipi_dsi_clk_on) { - pr_err("%s: mipi_dsi_clk already ON\n", __func__); - return; - } + u32 pll_ctrl = MIPI_INP(MIPI_DSI_BASE + 0x0200); + MIPI_OUTP(MIPI_DSI_BASE + 0x0200, pll_ctrl | 0x01); + mb(); - mipi_dsi_clk_on = 1; - - clk_enable(amp_pclk); /* clock for AHB-master to AXI */ - clk_enable(dsi_m_pclk); - clk_enable(dsi_s_pclk); if (clk_set_rate(dsi_byte_div_clk, 1) < 0) /* divided by 1 */ pr_err("%s: clk_set_rate failed\n", __func__); - clk_enable(dsi_byte_div_clk); - clk_enable(dsi_esc_clk); mipi_dsi_pclk_ctrl(&dsi_pclk, 1); mipi_dsi_clk_ctrl(&dsicore_clk, 1); - mipi_dsi_ahb_en(); - mipi_dsi_sfpb_cfg(); + clk_enable(dsi_byte_div_clk); + clk_enable(dsi_esc_clk); } void mipi_dsi_clk_disable(void) { - if (mipi_dsi_clk_on == 0) { - pr_err("%s: mipi_dsi_clk already OFF\n", __func__); - return; - } - - mipi_dsi_clk_on = 0; - - MIPI_OUTP(MIPI_DSI_BASE + 0x0118, 0); + clk_disable(dsi_esc_clk); + clk_disable(dsi_byte_div_clk); mipi_dsi_pclk_ctrl(&dsi_pclk, 0); mipi_dsi_clk_ctrl(&dsicore_clk, 0); - clk_disable(dsi_esc_clk); - clk_disable(dsi_byte_div_clk); - clk_disable(dsi_m_pclk); - clk_disable(dsi_s_pclk); - clk_disable(amp_pclk); /* clock for AHB-master to AXI */ + /* DSIPHY_PLL_CTRL_0, disable dsi pll */ + MIPI_OUTP(MIPI_DSI_BASE + 0x0200, 0x40); } void mipi_dsi_phy_ctrl(int on) @@ -464,10 +460,7 @@ void mipi_dsi_phy_ctrl(int on) /* DSIPHY_CTRL_1 */ MIPI_OUTP(MIPI_DSI_BASE + 0x0294, 0x7f); - /* DSIPHY_PLL_CTRL_0, disbale dsi pll */ - MIPI_OUTP(MIPI_DSI_BASE + 0x0200, 0x40); - - /* disbale dsi clk */ + /* disable dsi clk */ MIPI_OUTP(MIPI_DSI_BASE + 0x0118, 0); } }