sparc32,sun4m: irq, smp files cleanup
- drop filename in file header - drop unused includes - add description of sun4m interrupts (from davem) - add KERN_* to printk - fix spaces => tabs - add spaces after reserved words - drop all externs, they are now in header files This is partly based on a patch from: David Miller <davem@davemloft.net> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sam Ravnborg
committed by
David S. Miller
David S. Miller
parent
e787098cfe
commit
aba20a8295
@@ -1,5 +1,5 @@
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/* sun4m_irq.c
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* arch/sparc/kernel/sun4m_irq.c:
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/*
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* sun4m irq support
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*
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* djhr: Hacked out of irq.c into a CPU dependent version.
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*
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@@ -9,101 +9,44 @@
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* Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
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*/
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#include <linux/errno.h>
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#include <linux/linkage.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/psr.h>
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#include <asm/vaddrs.h>
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#include <asm/timer.h>
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#include <asm/openprom.h>
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#include <asm/oplib.h>
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#include <asm/traps.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/smp.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/cacheflush.h>
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#include "irq.h"
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#include "kernel.h"
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struct sun4m_irq_percpu {
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u32 pending;
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u32 clear;
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u32 set;
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};
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struct sun4m_irq_global {
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u32 pending;
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u32 mask;
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u32 mask_clear;
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u32 mask_set;
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u32 interrupt_target;
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};
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/* Code in entry.S needs to get at these register mappings. */
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struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS];
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struct sun4m_irq_global __iomem *sun4m_irq_global;
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/* Dave Redman (djhr@tadpole.co.uk)
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* The sun4m interrupt registers.
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*/
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#define SUN4M_INT_ENABLE 0x80000000
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#define SUN4M_INT_E14 0x00000080
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#define SUN4M_INT_E10 0x00080000
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#define SUN4M_HARD_INT(x) (0x000000001 << (x))
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#define SUN4M_SOFT_INT(x) (0x000010000 << (x))
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#define SUN4M_INT_MASKALL 0x80000000 /* mask all interrupts */
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#define SUN4M_INT_MODULE_ERR 0x40000000 /* module error */
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#define SUN4M_INT_M2S_WRITE_ERR 0x20000000 /* write buffer error */
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#define SUN4M_INT_ECC_ERR 0x10000000 /* ecc memory error */
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#define SUN4M_INT_VME_ERR 0x08000000 /* vme async error */
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#define SUN4M_INT_FLOPPY 0x00400000 /* floppy disk */
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#define SUN4M_INT_MODULE 0x00200000 /* module interrupt */
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#define SUN4M_INT_VIDEO 0x00100000 /* onboard video */
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#define SUN4M_INT_REALTIME 0x00080000 /* system timer */
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#define SUN4M_INT_SCSI 0x00040000 /* onboard scsi */
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#define SUN4M_INT_AUDIO 0x00020000 /* audio/isdn */
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#define SUN4M_INT_ETHERNET 0x00010000 /* onboard ethernet */
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#define SUN4M_INT_SERIAL 0x00008000 /* serial ports */
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#define SUN4M_INT_KBDMS 0x00004000 /* keyboard/mouse */
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#define SUN4M_INT_SBUSBITS 0x00003F80 /* sbus int bits */
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#define SUN4M_INT_VMEBITS 0x0000007F /* vme int bits */
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#define SUN4M_INT_ERROR (SUN4M_INT_MODULE_ERR | \
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SUN4M_INT_M2S_WRITE_ERR | \
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SUN4M_INT_ECC_ERR | \
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SUN4M_INT_VME_ERR)
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#define SUN4M_INT_SBUS(x) (1 << (x+7))
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#define SUN4M_INT_VME(x) (1 << (x))
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/* Interrupt levels used by OBP */
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#define OBP_INT_LEVEL_SOFT 0x10
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#define OBP_INT_LEVEL_ONBOARD 0x20
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#define OBP_INT_LEVEL_SBUS 0x30
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#define OBP_INT_LEVEL_VME 0x40
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/* Interrupt level assignment on sun4m:
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/* Sample sun4m IRQ layout:
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*
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* 0x22 - Power
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* 0x24 - ESP SCSI
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* 0x26 - Lance ethernet
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* 0x2b - Floppy
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* 0x2c - Zilog uart
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* 0x32 - SBUS level 0
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* 0x33 - Parallel port, SBUS level 1
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* 0x35 - SBUS level 2
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* 0x37 - SBUS level 3
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* 0x39 - Audio, Graphics card, SBUS level 4
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* 0x3b - SBUS level 5
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* 0x3d - SBUS level 6
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*
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* Each interrupt source has a mask bit in the interrupt registers.
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* When the mask bit is set, this blocks interrupt deliver. So you
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* clear the bit to enable the interrupt.
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*
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* Interrupts numbered less than 0x10 are software triggered interrupts
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* and unused by Linux.
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*
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* Interrupt level assignment on sun4m:
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*
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* level source
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* ------------------------------------------------------------
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* 1 softint-1
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* 1 softint-1
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* 2 softint-2, VME/SBUS level 1
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* 3 softint-3, VME/SBUS level 2
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* 4 softint-4, onboard SCSI
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@@ -138,10 +81,10 @@ struct sun4m_irq_global __iomem *sun4m_irq_global;
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* 'intr' property IRQ priority values from ss4, ss5, ss10, ss20, and
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* Tadpole S3 GX systems.
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*
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* esp: 0x24 onboard ESP SCSI
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* le: 0x26 onboard Lance ETHERNET
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* esp: 0x24 onboard ESP SCSI
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* le: 0x26 onboard Lance ETHERNET
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* p9100: 0x32 SBUS level 1 P9100 video
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* bpp: 0x33 SBUS level 2 BPP parallel port device
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* bpp: 0x33 SBUS level 2 BPP parallel port device
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* DBRI: 0x39 SBUS level 5 DBRI ISDN audio
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* SUNW,leo: 0x39 SBUS level 5 LEO video
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* pcmcia: 0x3b SBUS level 6 PCMCIA controller
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@@ -152,6 +95,66 @@ struct sun4m_irq_global __iomem *sun4m_irq_global;
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* power: 0x22 onboard power device (XXX unknown mask bit XXX)
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*/
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struct sun4m_irq_percpu {
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u32 pending;
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u32 clear;
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u32 set;
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};
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struct sun4m_irq_global {
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u32 pending;
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u32 mask;
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u32 mask_clear;
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u32 mask_set;
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u32 interrupt_target;
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};
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/* Code in entry.S needs to get at these register mappings. */
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struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS];
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struct sun4m_irq_global __iomem *sun4m_irq_global;
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/* Dave Redman (djhr@tadpole.co.uk)
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* The sun4m interrupt registers.
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*/
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#define SUN4M_INT_ENABLE 0x80000000
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#define SUN4M_INT_E14 0x00000080
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#define SUN4M_INT_E10 0x00080000
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#define SUN4M_HARD_INT(x) (0x000000001 << (x))
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#define SUN4M_SOFT_INT(x) (0x000010000 << (x))
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#define SUN4M_INT_MASKALL 0x80000000 /* mask all interrupts */
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#define SUN4M_INT_MODULE_ERR 0x40000000 /* module error */
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#define SUN4M_INT_M2S_WRITE_ERR 0x20000000 /* write buffer error */
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#define SUN4M_INT_ECC_ERR 0x10000000 /* ecc memory error */
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#define SUN4M_INT_VME_ERR 0x08000000 /* vme async error */
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#define SUN4M_INT_FLOPPY 0x00400000 /* floppy disk */
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#define SUN4M_INT_MODULE 0x00200000 /* module interrupt */
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#define SUN4M_INT_VIDEO 0x00100000 /* onboard video */
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#define SUN4M_INT_REALTIME 0x00080000 /* system timer */
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#define SUN4M_INT_SCSI 0x00040000 /* onboard scsi */
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#define SUN4M_INT_AUDIO 0x00020000 /* audio/isdn */
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#define SUN4M_INT_ETHERNET 0x00010000 /* onboard ethernet */
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#define SUN4M_INT_SERIAL 0x00008000 /* serial ports */
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#define SUN4M_INT_KBDMS 0x00004000 /* keyboard/mouse */
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#define SUN4M_INT_SBUSBITS 0x00003F80 /* sbus int bits */
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#define SUN4M_INT_VMEBITS 0x0000007F /* vme int bits */
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#define SUN4M_INT_ERROR (SUN4M_INT_MODULE_ERR | \
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SUN4M_INT_M2S_WRITE_ERR | \
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SUN4M_INT_ECC_ERR | \
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SUN4M_INT_VME_ERR)
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#define SUN4M_INT_SBUS(x) (1 << (x+7))
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#define SUN4M_INT_VME(x) (1 << (x))
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/* Interrupt levels used by OBP */
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#define OBP_INT_LEVEL_SOFT 0x10
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#define OBP_INT_LEVEL_ONBOARD 0x20
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#define OBP_INT_LEVEL_SBUS 0x30
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#define OBP_INT_LEVEL_VME 0x40
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static unsigned long irq_mask[0x50] = {
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/* SMP */
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0, SUN4M_SOFT_INT(1),
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@@ -193,7 +196,7 @@ static unsigned long irq_mask[0x50] = {
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static unsigned long sun4m_get_irqmask(unsigned int irq)
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{
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unsigned long mask;
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if (irq < 0x50)
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mask = irq_mask[irq];
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else
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@@ -217,7 +220,7 @@ static void sun4m_disable_irq(unsigned int irq_nr)
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sbus_writel(mask, &sun4m_irq_global->mask_set);
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else
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sbus_writel(mask, &sun4m_irq_percpu[cpu]->set);
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local_irq_restore(flags);
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local_irq_restore(flags);
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}
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static void sun4m_enable_irq(unsigned int irq_nr)
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@@ -226,17 +229,17 @@ static void sun4m_enable_irq(unsigned int irq_nr)
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int cpu = smp_processor_id();
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/* Dreadful floppy hack. When we use 0x2b instead of
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* 0x0b the system blows (it starts to whistle!).
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* So we continue to use 0x0b. Fixme ASAP. --P3
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*/
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if (irq_nr != 0x0b) {
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* 0x0b the system blows (it starts to whistle!).
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* So we continue to use 0x0b. Fixme ASAP. --P3
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*/
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if (irq_nr != 0x0b) {
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mask = sun4m_get_irqmask(irq_nr);
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local_irq_save(flags);
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if (irq_nr > 15)
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sbus_writel(mask, &sun4m_irq_global->mask_clear);
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else
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sbus_writel(mask, &sun4m_irq_percpu[cpu]->clear);
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local_irq_restore(flags);
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local_irq_restore(flags);
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} else {
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local_irq_save(flags);
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sbus_writel(SUN4M_INT_FLOPPY, &sun4m_irq_global->mask_clear);
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@@ -260,7 +263,7 @@ static unsigned long cpu_pil_to_imask[16] = {
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/*12*/ SUN4M_INT_SERIAL | SUN4M_INT_KBDMS,
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/*13*/ SUN4M_INT_SBUS(6) | SUN4M_INT_VME(6) | SUN4M_INT_AUDIO,
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/*14*/ SUN4M_INT_E14,
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/*15*/ SUN4M_INT_ERROR
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/*15*/ SUN4M_INT_ERROR,
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};
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/* We assume the caller has disabled local interrupts when these are called,
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@@ -280,12 +283,14 @@ static void sun4m_enable_pil_irq(unsigned int pil)
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static void sun4m_send_ipi(int cpu, int level)
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{
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unsigned long mask = sun4m_get_irqmask(level);
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sbus_writel(mask, &sun4m_irq_percpu[cpu]->set);
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}
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static void sun4m_clear_ipi(int cpu, int level)
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{
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unsigned long mask = sun4m_get_irqmask(level);
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sbus_writel(mask, &sun4m_irq_percpu[cpu]->clear);
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}
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@@ -314,7 +319,7 @@ struct sun4m_timer_global {
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static struct sun4m_timer_global __iomem *timers_global;
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#define TIMER_IRQ (OBP_INT_LEVEL_ONBOARD | 10)
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#define TIMER_IRQ (OBP_INT_LEVEL_ONBOARD | 10)
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unsigned int lvl14_resolution = (((1000000/HZ) + 1) << 10);
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@@ -407,7 +412,6 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn)
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#ifdef CONFIG_SMP
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{
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unsigned long flags;
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extern unsigned long lvl14_save[4];
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struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
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/* For SMP we use the level 14 ticker, however the bootup code
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