From c5699303158e9ac2e3a0a67bc59a1401962e5c89 Mon Sep 17 00:00:00 2001 From: Rajesh Kemisetti Date: Sat, 21 Apr 2012 21:09:05 +0530 Subject: [PATCH] msm: kgsl: Prevent second time cache flush for the context Second time cache flush of a context results in GPU hang for 8x25 target. this change fixes the issue. CRs-Fixed: 352828 Change-Id: Iaf2bd8e0a3e39f1a39ef52337cf64229e2f44cb5 Signed-off-by: Rajesh Kemisetti --- drivers/gpu/msm/adreno_ringbuffer.c | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c index a99205934bb..fe01764517e 100644 --- a/drivers/gpu/msm/adreno_ringbuffer.c +++ b/drivers/gpu/msm/adreno_ringbuffer.c @@ -464,8 +464,11 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, if (context) { total_sizedwords += 3; /* sop timestamp */ total_sizedwords += 4; /* eop timestamp */ + total_sizedwords += 3; /* global timestamp without cache + * flush for non-zero context */ + } else { + total_sizedwords += 4; /* global timestamp for recovery*/ } - total_sizedwords += 4; /* global timestamp for recovery*/ ringcmds = adreno_ringbuffer_allocspace(rb, total_sizedwords); rcmd_gpu = rb->buffer_desc.gpuaddr @@ -538,14 +541,24 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, GSL_RB_WRITE(ringcmds, rcmd_gpu, (gpuaddr + KGSL_MEMSTORE_OFFSET(context->id, eoptimestamp))); GSL_RB_WRITE(ringcmds, rcmd_gpu, timestamp); - } - GSL_RB_WRITE(ringcmds, rcmd_gpu, cp_type3_packet(CP_EVENT_WRITE, 3)); - GSL_RB_WRITE(ringcmds, rcmd_gpu, CACHE_FLUSH_TS); - GSL_RB_WRITE(ringcmds, rcmd_gpu, (gpuaddr + - KGSL_MEMSTORE_OFFSET(KGSL_MEMSTORE_GLOBAL, - eoptimestamp))); - GSL_RB_WRITE(ringcmds, rcmd_gpu, rb->timestamp[KGSL_MEMSTORE_GLOBAL]); + GSL_RB_WRITE(ringcmds, rcmd_gpu, + cp_type3_packet(CP_MEM_WRITE, 2)); + GSL_RB_WRITE(ringcmds, rcmd_gpu, (gpuaddr + + KGSL_MEMSTORE_OFFSET(KGSL_MEMSTORE_GLOBAL, + eoptimestamp))); + GSL_RB_WRITE(ringcmds, rcmd_gpu, + rb->timestamp[KGSL_MEMSTORE_GLOBAL]); + } else { + GSL_RB_WRITE(ringcmds, rcmd_gpu, + cp_type3_packet(CP_EVENT_WRITE, 3)); + GSL_RB_WRITE(ringcmds, rcmd_gpu, CACHE_FLUSH_TS); + GSL_RB_WRITE(ringcmds, rcmd_gpu, (gpuaddr + + KGSL_MEMSTORE_OFFSET(KGSL_MEMSTORE_GLOBAL, + eoptimestamp))); + GSL_RB_WRITE(ringcmds, rcmd_gpu, + rb->timestamp[KGSL_MEMSTORE_GLOBAL]); + } if (!(flags & KGSL_CMD_FLAGS_NO_TS_CMP)) { /* Conditional execution based on memory values */