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spi: spi_sh_msiof: Fixed data sampling on the correct edge

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The spi_sh_msiof.c driver presently misconfigures REDG and TEDG. TEDG==0
outputs data at the **rising edge** of the clock and REDG==0 samples data
at the **falling edge** of the clock. Therefore for SPI, TEDG must be
equal to REDG, otherwise the last byte received is not sampled in SPI
mode 3.

This brings the driver in line with the SH7723 HW Reference Manual
settings documented in Figures 20.20 and 20.21 ("SPI Clock and data
timing").

Signed-off-by: Markus Pietrek <Markus.Pietrek@emtrion.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Markus Pietrek
2010-02-02 11:29:15 +09:00
committed by Paul Mundt
parent ab658321f3
commit e8708ef7e8
1 changed files with 6 additions and 9 deletions
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15
drivers/spi/spi_sh_msiof.c
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@@ -173,15 +173,12 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,
int edge; int edge;
/* /*
* CPOL CPHA TSCKIZ RSCKIZ TEDG REDG(!) * CPOL CPHA TSCKIZ RSCKIZ TEDG REDG
* 0 0 10 10 1 0 * 0 0 10 10 1 1
* 0 1 10 10 0 1 * 0 1 10 10 0 0
* 1 0 11 11 0 1 * 1 0 11 11 0 0
* 1 1 11 11 1 0 * 1 1 11 11 1 1
*
* (!) Note: REDG is inverted recommended data sheet setting
*/ */
sh_msiof_write(p, FCTR, 0); sh_msiof_write(p, FCTR, 0);
sh_msiof_write(p, TMDR1, 0xe2000005 | (lsb_first << 24)); sh_msiof_write(p, TMDR1, 0xe2000005 | (lsb_first << 24));
sh_msiof_write(p, RMDR1, 0x22000005 | (lsb_first << 24)); sh_msiof_write(p, RMDR1, 0x22000005 | (lsb_first << 24));
@@ -193,7 +190,7 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,
edge = cpol ? cpha : !cpha; edge = cpol ? cpha : !cpha;
tmp |= edge << 27; /* TEDG */ tmp |= edge << 27; /* TEDG */
tmp |= !edge << 26; /* REDG */ tmp |= edge << 26; /* REDG */
tmp |= (tx_hi_z ? 2 : 0) << 22; /* TXDIZ */ tmp |= (tx_hi_z ? 2 : 0) << 22; /* TXDIZ */
sh_msiof_write(p, CTR, tmp); sh_msiof_write(p, CTR, tmp);
} }