diff --git a/drivers/gpu/msm/a220_reg.h b/drivers/gpu/msm/a220_reg.h
deleted file mode 100644
index 7cfe7056c7c..00000000000
--- a/drivers/gpu/msm/a220_reg.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#ifndef __A205_REG_H
-#define __A205_REG_H
-
-#define REG_LEIA_PC_INDX_OFFSET          REG_VGT_INDX_OFFSET
-#define REG_LEIA_PC_VERTEX_REUSE_BLOCK_CNTL REG_VGT_VERTEX_REUSE_BLOCK_CNTL
-#define REG_LEIA_PC_MAX_VTX_INDX         REG_VGT_MAX_VTX_INDX
-#define REG_LEIA_RB_LRZ_VSC_CONTROL	 0x2209
-#define REG_LEIA_GRAS_CONTROL            0x2210
-#define REG_LEIA_VSC_BIN_SIZE            0x0C01
-#define REG_LEIA_VSC_PIPE_DATA_LENGTH_7  0x0C1D
-
-#endif /*__A205_REG_H */
diff --git a/drivers/gpu/msm/a200_reg.h b/drivers/gpu/msm/a2xx_reg.h
similarity index 97%
rename from drivers/gpu/msm/a200_reg.h
rename to drivers/gpu/msm/a2xx_reg.h
index 5f260ec6535..44c48f8935f 100644
--- a/drivers/gpu/msm/a200_reg.h
+++ b/drivers/gpu/msm/a2xx_reg.h
@@ -400,4 +400,13 @@ union reg_cp_rb_cntl {
 #define REG_COHER_STATUS_PM4             0xA2B
 #define REG_COHER_SIZE_PM4               0xA29
 
+/*registers added in adreno220*/
+#define REG_A220_PC_INDX_OFFSET          REG_VGT_INDX_OFFSET
+#define REG_A220_PC_VERTEX_REUSE_BLOCK_CNTL REG_VGT_VERTEX_REUSE_BLOCK_CNTL
+#define REG_A220_PC_MAX_VTX_INDX         REG_VGT_MAX_VTX_INDX
+#define REG_A220_RB_LRZ_VSC_CONTROL	 0x2209
+#define REG_A220_GRAS_CONTROL            0x2210
+#define REG_A220_VSC_BIN_SIZE            0x0C01
+#define REG_A220_VSC_PIPE_DATA_LENGTH_7  0x0C1D
+
 #endif /* __A200_REG_H */
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 0352d5d7e33..c27b5549dfb 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -28,7 +28,7 @@
 #include "adreno_debugfs.h"
 #include "adreno_postmortem.h"
 
-#include "a200_reg.h"
+#include "a2xx_reg.h"
 
 #define DRIVER_VERSION_MAJOR   3
 #define DRIVER_VERSION_MINOR   1
diff --git a/drivers/gpu/msm/adreno_a2xx.c b/drivers/gpu/msm/adreno_a2xx.c
index 63bd7f061e3..3ca97b51a3a 100644
--- a/drivers/gpu/msm/adreno_a2xx.c
+++ b/drivers/gpu/msm/adreno_a2xx.c
@@ -375,15 +375,15 @@ static const unsigned int register_ranges_a22x[] = {
 	REG_PA_SC_AA_MASK, REG_PA_SC_AA_MASK,
 	REG_RB_SAMPLE_COUNT_CTL, REG_RB_COLOR_DEST_MASK,
 	REG_PA_SU_POLY_OFFSET_FRONT_SCALE, REG_PA_SU_POLY_OFFSET_BACK_OFFSET,
-	/* all the below registers are specific to Leia */
-	REG_LEIA_PC_MAX_VTX_INDX, REG_LEIA_PC_INDX_OFFSET,
+	/* all the below registers are specific to a220 */
+	REG_A220_PC_MAX_VTX_INDX, REG_A220_PC_INDX_OFFSET,
 	REG_RB_COLOR_MASK, REG_RB_FOG_COLOR,
 	REG_RB_DEPTHCONTROL, REG_RB_COLORCONTROL,
 	REG_PA_CL_CLIP_CNTL, REG_PA_CL_VTE_CNTL,
 	REG_RB_MODECONTROL, REG_RB_SAMPLE_POS,
 	REG_PA_SU_POINT_SIZE, REG_PA_SU_LINE_CNTL,
-	REG_LEIA_PC_VERTEX_REUSE_BLOCK_CNTL,
-	REG_LEIA_PC_VERTEX_REUSE_BLOCK_CNTL,
+	REG_A220_PC_VERTEX_REUSE_BLOCK_CNTL,
+	REG_A220_PC_VERTEX_REUSE_BLOCK_CNTL,
 	REG_RB_COPY_CONTROL, REG_RB_DEPTH_CLEAR
 };
 
@@ -487,8 +487,8 @@ static void build_regsave_cmds(struct adreno_device *adreno_dev,
 	if (adreno_is_a22x(adreno_dev)) {
 		unsigned int i;
 		unsigned int j = 2;
-		for (i = REG_LEIA_VSC_BIN_SIZE; i <=
-				REG_LEIA_VSC_PIPE_DATA_LENGTH_7; i++) {
+		for (i = REG_A220_VSC_BIN_SIZE; i <=
+				REG_A220_VSC_PIPE_DATA_LENGTH_7; i++) {
 			*cmd++ = cp_type3_packet(CP_REG_TO_MEM, 2);
 			*cmd++ = i;
 			*cmd++ = tmp_ctx.reg_values[j];
@@ -699,7 +699,7 @@ static unsigned int *build_gmem2sys_cmds(struct adreno_device *adreno_dev,
 		*cmds++ = 0;
 
 		*cmds++ = cp_type3_packet(CP_SET_CONSTANT, 2);
-		*cmds++ = CP_REG(REG_LEIA_RB_LRZ_VSC_CONTROL);
+		*cmds++ = CP_REG(REG_A220_RB_LRZ_VSC_CONTROL);
 		*cmds++ = 0x0000000;
 
 		*cmds++ = cp_type3_packet(CP_DRAW_INDX, 3);
@@ -918,7 +918,7 @@ static unsigned int *build_sys2gmem_cmds(struct adreno_device *adreno_dev,
 		*cmds++ = 0;
 
 		*cmds++ = cp_type3_packet(CP_SET_CONSTANT, 2);
-		*cmds++ = CP_REG(REG_LEIA_RB_LRZ_VSC_CONTROL);
+		*cmds++ = CP_REG(REG_A220_RB_LRZ_VSC_CONTROL);
 		*cmds++ = 0x0000000;
 
 		*cmds++ = cp_type3_packet(CP_DRAW_INDX, 3);
@@ -1004,8 +1004,8 @@ static void build_regrestore_cmds(struct adreno_device *adreno_dev,
 	if (adreno_is_a22x(adreno_dev)) {
 		unsigned int i;
 		unsigned int j = 2;
-		for (i = REG_LEIA_VSC_BIN_SIZE; i <=
-				REG_LEIA_VSC_PIPE_DATA_LENGTH_7; i++) {
+		for (i = REG_A220_VSC_BIN_SIZE; i <=
+				REG_A220_VSC_PIPE_DATA_LENGTH_7; i++) {
 			*cmd++ = cp_type0_packet(i, 1);
 			tmp_ctx.reg_values[j] = virt2gpu(cmd,
 				&drawctxt->gpustate);
diff --git a/drivers/gpu/msm/adreno_debugfs.c b/drivers/gpu/msm/adreno_debugfs.c
index 60f068d1c5a..b9178495adc 100644
--- a/drivers/gpu/msm/adreno_debugfs.c
+++ b/drivers/gpu/msm/adreno_debugfs.c
@@ -20,7 +20,7 @@
 #include "adreno_postmortem.h"
 #include "adreno.h"
 
-#include "a200_reg.h"
+#include "a2xx_reg.h"
 
 unsigned int kgsl_cff_dump_enable;
 int kgsl_pm_regs_enabled;
diff --git a/drivers/gpu/msm/adreno_drawctxt.h b/drivers/gpu/msm/adreno_drawctxt.h
index a942f3025da..3c3a8536136 100644
--- a/drivers/gpu/msm/adreno_drawctxt.h
+++ b/drivers/gpu/msm/adreno_drawctxt.h
@@ -14,8 +14,7 @@
 #define __ADRENO_DRAWCTXT_H
 
 #include "adreno_pm4types.h"
-#include "a200_reg.h"
-#include "a220_reg.h"
+#include "a2xx_reg.h"
 
 /* Flags */
 
diff --git a/drivers/gpu/msm/adreno_postmortem.c b/drivers/gpu/msm/adreno_postmortem.c
index 1b9542aad9c..9fe0bb6fc00 100644
--- a/drivers/gpu/msm/adreno_postmortem.c
+++ b/drivers/gpu/msm/adreno_postmortem.c
@@ -22,7 +22,7 @@
 #include "adreno_debugfs.h"
 #include "kgsl_cffdump.h"
 
-#include "a200_reg.h"
+#include "a2xx_reg.h"
 
 #define INVALID_RB_CMD 0xaaaaaaaa
 
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index 55b09653725..f24b7fd78ba 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -23,7 +23,7 @@
 #include "adreno_pm4types.h"
 #include "adreno_ringbuffer.h"
 
-#include "a200_reg.h"
+#include "a2xx_reg.h"
 
 #define GSL_RB_NOP_SIZEDWORDS				2
 /* protected mode error checking below register address 0x800