Drivers need to specify their bandwidth requirements to
bus-scaling driver to get guaranteed bandwidth on fabrics.
USB hardware uses a single buffer to transfer data across the
bus. As a result USB performance is highly dependent on system
fabric frequency as USB controller continuously sends NAKs on
the USB BUS unless complete buffer is filled/drained to the memory.
Hence, request for high bus bandwidth as long as USB cable is
connected to improve USB throughput.
While testing with Class-10 Extreme III SD cards, this patch
seems to improve the IN performance from 15MBps to 24MBps and
OUT performance from 11MBps to 16MBps.
CRs-Fixed: 327557
Change-Id: I21c284c611a09b1b12df9ae7a6f39e0b1bff45ef
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Due to changes in usb_bam driver and usage of the
standard mechanism of platform resources instead
of adding new platform data, usb_bam_phy_base and
usb_bam_phy_size fields became unnecessary and were
removed.
Change-Id: I0f3a57724ecc033e704aaca6f651561a344c9fef
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
Use the clock APIs instead of the msm_xo APIs to vote on CXO.
This removes one more msm specific api from this driver and will
allow us to move XO control into the rpm clock driver.
Change-Id: Ie9344aad20651002e98f13cd3adb39680fbd93bd
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support in HSIC peripheral(device)
over SPS.
Only one USB core can be use - currently HSUSB
is enabled by default.
To enable HSIC core defconfig file should be changed.
Change-Id: I256aecd9e6dfd8bfd71719c32beed8b24225e11c
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
USB OTG driver maintains the state of VBUS using vbus_is_online flag
for pdata based vbus power routine. Hence remove the used vbus_is_online
flag here and return the result of VBUS power sequence to update the
vbus_is_online flag in OTG driver.
Change-Id: I8bea42d5ebc27fab6fc2ae8a0b9fb58bdbaf854a
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Data contact can be detected by either current source or timeout
methods. The current source method is not working for an unknown
reason. Implement timeout based data contact detection. The spec
allows any timeout between 300msec to 900msec. Use 600msec.
CRs-fixed: 330217
Change-Id: I67151d1412f43ba974cc1afb164d6473f89d2dbf
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Drivers should now use their device names to distinguish between
clocks of the same type rather than the clock name. Clock names
are updated to match the new naming convention.
CRs-Fixed: 327559
Change-Id: I78757806589e037a0655a63e7ee20c935214c99d
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Crash was observed (9x15) when USB cable was
disconnected. Root cause was NULL pointer and
USB BAM reset due to USB PHY reset. On 9x15 no
reset on disconnect will be performed.
CRs-Fixed: 326999
Change-Id: I006afb8dcd225caf9280dd915f8af3edfaebff5a
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
USB BAM driver to support BAM-to-BAM
USB<->Peripheral transactions.
Change-Id: Ib49a41f5dcdccb6f6bff2492fa64ead40f18b870
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
When USB cable is connected, the mass storage function in the
device will get interrupts for every 3ms. Entering and exiting the
idle standalone PC itself will take around 3ms on 8960. Hence allowing
idle standalone PC when USB cable is connected causes processor to
spend most of the time in entering and exiting the idle standalone PC.
Hence Vote for minimum DMA latency to prevent idle standalone PC
when USB cable is connected.
Change-Id: Id625dc01f253ed553b2f65f08900022a8c6e1daa
Signed-off-by: Anji jonnala <anjir@codeaurora.org>
USB PHY takes TCXO clock as input and using the PHY internal PLL,
gets the 480MHz clock for USB operations. While USB PHY is suspended,
the TCXO clock can be turned off.
On 8960 target, mandating that TCXO clock users must need to vote for
TCXO and if all the users vote for TCXO clock-off, then MSM can switch to
lower power clock and can run.
Change-Id: Ia9a91bca52a1003439a3a38bbd8eb835dbf349e1
Signed-off-by: Anji jonnala <anjir@codeaurora.org>
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Add device tree support for MSM HSUSB. The OTG driver registers
gadget and host platform devices based on the operational mode.
This patch also updates the copper device tree source file with
HSUSB device specifics.
Change-Id: I0a50b0500d15f32ff65468cdb411398a80a20329
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Synopsis 28nm PHY has two different circuits for detecting changes on
ID line. ID_DIG is designed for detecting ID_float vs ID_gnd. ID_ACA
is designed for detecting RID_A, RID_B, RID_C states. These are mutually
exclusive and enabling both circuits has undefined behavior. Enable
ID_ACA upon VBUS high or ID_gnd events to detect further ACA states.
ACA ID_GND threshold range is overlapped with OTG ID_FLOAT threshold range.
Hence PHY ID_DIG circuit can not be used for detecting ACA ID_GND. Use
PMIC ID circuit for detecting both OTG and ACA ID_GND.
Link controller can not generate PHY_ALT interrupt in host mode. But the
corresponding PHY register reflects the actual ID state. Hence implement
polling to read PHY register to detect ID_GND --> ID_A, ID_A --> ID_B
transitions. That means low power mode can not be allowed in host mode.
Also disallow suspending the device attached on the root hub. Otherwise
PHY is put into suspend state automatically upon setting SUSP bit in PORTSC
register.
Link controller can not generate asynchronous interrupt for ID_ACA changes
in low power mode. Hence disallow low power mode in ID_B and ID_C states.
USB_MSM_ACA is not selected by default. If it selected, ACA states can be
detected and low power mode is not allowed in host mode. Writing "enable"
to <debugfs>/msm_otg/aca enables ACA irrespective of USB_MSM_ACA selection.
This is meant for debugging only.
Change-Id: I51e80d803a583c5bdffc8111696943c04958f604
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
In case of 8960 Liquid, need to vote for EXT_3P3V regulator
to avoid usb connection lost as MHL analog switch is powered
by this regulator.
Change-Id: Ifc36d7916a5407801fdf43357176efa264d160bd
CRs-fixed: 315979
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
SMSC hub must be configured so that Conventional USB
devices can be connected to SMSC hub on 8960 liquid.
Change-Id: I261798de153d3c37f2fa2c4d7e15d96bb81c432f
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
As part of HSIC initialization, in addition to enabling HSIC host
mode and periodic pad calibration, need to configure GPIO150 and
GPIO151 pins for HSIC strobe and data lines respectively for
proper data communication between HSIC devices.
Change-Id: I7cdf8e4532045d813ac6c6e3f53455d0a640245b
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
This change add usb system clock support to OTG Driver.
System clock is a 60MHZ input clock to the USB ChipIdea core.
This clock is required starting from MDM9615.
This change also removes the enforcement for using a phy_reset_clk
for reseting the PHY. Starting from MDM9615, PHY reset is not implemented.
The core is reset together with the PHY using "usb_hs_clk" signal.
Signed-off-by: Amit Blay <ablay@codeaurora.org>
Implement good battery algorithm defined in the battery charging V1.2 spec
for detecting different charging ports. USB hardware is put into low power
mode when connected to a dedicated charging port. vbus_draw and set_power
methods are implemented for determining the allowed current from Host in
different states (un-configured/suspend/configured).
The charger block is implemented using vendor specific registers and the
PHY used in MSM8960(28nm PHY) different from older targets like MSM8x60
and MSM7x30(45nm PHY). The PHY vendor and product id registers are not
implemented in the above chipsets. Hence PHY type is passed via platform
data.
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
HSUSB core clock is derived from daytona fabric clock and for
HSUSB operational require minimum core clock at 55MHz. Since, HSUSB
cannot tolerate daytona fabric clock change in the middle of HSUSB
operational, vote for maximum Daytona fabric clock
while usb is operational
Signed-off-by: Anji jonnala <anjir@codeaurora.org>
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This driver is used across all MSM SoCs. Hence give a generic name.
All Functions and strutures are also using "msm_otg" as prefix.
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Implement runtime and system pm ops to put hardware into low power
mode (LPM). As part of LPM, USB clocks are turned off, PHY is put
into suspend state and PHY comparators are turned off if VBUS/Id
notifications are not required from PHY.
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This driver implements PHY initialization, clock management, ULPI IO ops
and simple OTG state machine to kick host/peripheral based on Id/VBUS
line status. VBUS/Id lines are tied to a reference voltage on some boards.
Hence provide debugfs interface to select host/peripheral mode.
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
