Device Tree support is added for Qualcomm SLIMBUS controller and
documentation is provided for required and optional device node
properties.
Change-Id: Ic81e853431c413b06296470609ce55d0692e870b
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
The fixed regulator driver uses of_get_fixed_voltage_config()
to extract fixed_voltage_config structure contents from device tree.
Also add documenation for additional bindings for fixed
regulators that can be passed through dt.
Change-Id: I09411d465beae31b567c334f387563a0ed2877d8
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
The helper routine is meant to be used by the regulator drivers
to extract the regulator_init_data structure from the data
that is passed from device tree.
'consumer_supplies' which is part of regulator_init_data is not extracted
as the regulator consumer mappings are passed through DT differently,
implemented in subsequent patches.
Similarly the regulator<-->parent/supply mapping is handled in
subsequent patches.
Also add documentation for regulator bindings to be used to pass
regulator_init_data struct information from device tree.
Some of the regulator properties which are linux and board specific,
are left out since its not clear if they can
be in someway embedded into the kernel or passed in from DT.
They will be revisited later.
Change-Id: I4f270a41687199032499cd923854a871c4d58ca2
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Add runtime DT support and documentation for the Cortex A7/A15
architected timers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Conflicts:
[Resolve conflicts for adding support for the feature
ARCH_HAS_READ_CURRENT_TIMER]
arch/arm/kernel/arch_timer.c
Change-Id: I4b1d1dc2a8c69466497423475f7a3dd4d2c380c1
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
Device tree support is added for Qualcomm I2C controller and
documentation is provided for required and optional device-node
properties.
Slave devices can be added using register_board_info (boards file),
or by listing them as child of I2C of_node in the device tree.
Change-Id: I10e9b8c7805c49dfe6a51975129f1599bbca84eb
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Add a interrupts-names property to allow the possibility to provide a name
to any interrupts entries. If the name is available, use it to name the
resource, otherwise keep the device full name.
Change-Id: If37ca9fd66061d2feceda37b0f2e66c9e0ae8683
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
[grant.likely: use "interrupt-names" and tidy documentation]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
[mbohan@codeaurora.org: resolve conflict in drivers/of/irq.c]
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Add a reg-names property to allow for reg regions to be reference by name
instead of by index. Some devices have multiple register regions which
are more naturally referenced by name.
If the name is available, use it to name the resource when creating a devices.
Otherwise keep the device name.
Change-Id: I1a33be9ae1a5ec757a352ba3bfa6d08f411d02d2
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
[Generalized documentation to be for any -names property]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
The following changes are required in host driver to
enable/configure the controller in HS200 mode -
1. Define new eMMC host capabilities as supported by the
host. These capabilities allows the MMC core driver to
enable HS200 timing in device.
2. After the device is set to HS200 mode, the host driver
must send tuning command CMD21 to find the optimal sampling
point for data lines.
3. Depending on the voltage range and HS200 modes supported
by the host and device, host driver must change the voltage
range of VccQ whenever the MMC core driver requests it.
4. Change the controller timing mode and MCLK frequency to
maximum frequency supported by host.
Change-Id: Iaa30778a509eb800b0193f32f85ce494610e94c3
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Add a gpio_chip driver to support the Qualcomm SPMI PMIC
architecture called QPNP. The driver supports Device Tree
and allows a device_node to be registered as a gpio-controller.
The driver also specifies APIs to allow a non-Device Tree user
the ability to configure the PMIC GPIOs.
This driver does not handle interrupts for GPIOs directly.
Instead, that work is handled by the existing qpnp-int driver.
This is feasible since the interrupt register map for all
QPNP peripherals is the same.
Change-Id: I04eb39d9855b0957f0647010fcb203ec2fc83c7c
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
The spmi-dev-container binding is intended for SPMI
configurations that have multiple device nodes associated with
only one spmi_device. By default, if this flag is not specified,
each device node will create a new spmi_device.
Sometimes having multiple spmi_devices for SPMI device nodes is
superfluous. One example of this is gpios. In some architectures,
a single gpio is treated as a unique device. But from a gpio_chip
perspective, the chip is comprised of many gpios. Beyond wasting
memory allocating a unique spmi_device per gpio, the implication
of not coalescing spmi_devices is that the clients probe() routine
would be called N number of times. But this sort of behavior makes
it difficult to realize when a gpio_chip starts and stops. If we
assume that one gpio_chip represents one call to probe(), then
this problem is solved, since all gpios in that chip will be
passed as resources.
In order to support multiple device nodes per spmi_device, we
also need to extend the data structures for spmi_resources.
This change also makes an effort to cleanup some of the error
handling for illegal combinations of device bindings, as well as
adding some additional documentation.
Change-Id: If3ce2aaaa07bdf79e0d9fdedf16419e74a00fbec
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
This binding is currently used to indicate all devices existing
in the same slave. Let's change the name to be more meaningful.
The real motivation here is that we want to introduce a new
binding to specify all qpnp devices existing in the same
spmi_device. So spmi-dev-container is a more meaningful name for
that usecase, and spmi-slave-container better describes the
former.
Change-Id: I48f834b9cff9ea90d05f5e958ca21bef0ab56a86
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
reduce memory by compressing two values into one 32 bit integer.
Change-Id: I7c0bf7007df082fac53c1138ba45f1ecf77b2f83
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Add the basic attributes in the device tree for the SPMI PMIC
Arbiter.
Change-Id: I73bb32d06de94219e9c3a930939ee69302686356
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
The hex offsets that are part of node names in the DTS are required to
use lowercase hex characters. By convention, the constants used
within the code are also in lower case. Fix inconsistent casing, and
always use lower case.
Change-Id: I86e096c5aebb9011a5c12a4a2d558dedee5eb09a
Signed-off-by: David Brown <davidb@codeaurora.org>
This change adds SPMI Device Tree parsing. The
of_spmi_register_devices() API should be called from the probe()
routine of each SPMI controller to parse the subtree and add the
respective SPMI devices.
The SPMI subtree is nested up to two levels deep. The first level
is the most basic and treats the address as the SPMI slave ID.
This should be used for simple devices that has no notion of
segmented SPMI address spaces.
An optional second level specifies the address as an offset
within the outer layer's slave ID. This is used to specify
multiple devices on the same slave ID that have different address
ranges. In fact, it's reasonable to specify any number of address
ranges at this level.
Devices can also specify any number of interrupts that's decoding
is done by an external interrupt device.
Sections of this code were taken from drivers/of/platform.c.
Change-Id: Ib9f06764a9bd85e3b2aab43b72aa7132885aa044
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
This patch describes the basic attributes in the device tree
for the MSM SPI driver. Support for specifying the GPIO pins
associated with SPI is not yet present.
Change-Id: Idcb5cc28d84a2fa59463e698628da48cb058c652
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
The GIC support code is heavily using the fact that hardware
implementations are exposing banked registers. Unfortunately, it
looks like at least one GIC implementation (EXYNOS) offers both
the distributor and the CPU interfaces at different addresses,
depending on the CPU.
This problem is solved by allowing the distributor and CPU interface
addresses to be per-cpu variables for the platforms that require it.
The EXYNOS code is updated not to mess with the GIC internals while
handling interrupts, and struct gic_chip_data is back to being private.
The DT binding for the gic is updated to allow an optional "cpu-offset"
value, which is used to compute the various base addresses.
Finally, a new config option (GIC_NON_BANKED) is used to control this
feature, so the overhead is only present on kernels compiled with
support for EXYNOS.
Tested on Origen (EXYNOS4) and Panda (OMAP4).
Change-Id: I4c4adf1b3009dd20c7e6942b1d3e8d63999dd667
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
[tsoni@codeaurora.org: MSM specific merge fixes]
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
This adds ARM gic interrupt controller initialization using device tree
data.
The initialization function is intended to be called by of_irq_init
function like this:
const static struct of_device_id irq_match[] = {
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
{}
};
static void __init init_irqs(void)
{
of_irq_init(irq_match);
}
Change-Id: I722c5f7acf2426dac7937f53d3a0bf5a1d1fbae6
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
[tsoni@codeaurora.org: Fix merge conflicts]
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Add device tree support for MSM HSUSB. The OTG driver registers
gadget and host platform devices based on the operational mode.
This patch also updates the copper device tree source file with
HSUSB device specifics.
Change-Id: I0a50b0500d15f32ff65468cdb411398a80a20329
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Support to retrieve iomem resources by name does not currently
exist in device tree, access these by index until support for
this comes in.
Clocks are still queried by direct name from the driver until
device tree clock support is implemented.
Change-Id: I6e4e7d7968573959f652abb950729b851fe491b8
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
Since technically it's not powerpc arch-specific. Also rename it sec2
to differentiate it from its incompatible successor, the SEC 4.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Some platforms e.g. TI Davinci require 32-bit accesses to the UARTs.
The of_serial driver currently registers all UARTs as UPIO_MEM. Add a
new attribute "reg-io-width" to allow the port to be registered with
different IO width requirements.
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The of_serial bindings can be used to register a number of serial
devices. Document this binding with all of the others.
v3: remove device-type and clarify used-by-rtas
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Add a function to create amba_devices (i.e. primecell peripherals)
from device tree nodes. The device tree scanning is done by the
of_platform_populate() function which can call of_amba_device_create
based on a match table entry.
Nodes with a "arm,primecell-periphid" property can override the h/w
peripheral id value.
Based on the original work by Jeremy Kerr.
Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
[grant.likely: add Jeremy's original s-o-b line, changes from review
comments, and moved all code to drivers/of/platform.c]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* 'timers-ptp-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
ptp: Fix dp83640 build warning when building statically
ptp: Added a clock driver for the National Semiconductor PHYTER.
ptp: Added a clock driver for the IXP46x.
ptp: Added a clock that uses the eTSEC found on the MPC85xx.
ptp: Added a brand new class driver for ptp clocks.
The eTSEC includes a PTP clock with quite a few features. This patch adds
support for the basic clock adjustment functions, plus two external time
stamps, one alarm, and the PPS callback.
Signed-off-by: Richard Cochran <richard.cochran@omicron.at>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
b43: fix comment typo reqest -> request
Haavard Skinnemoen has left Atmel
cris: typo in mach-fs Makefile
Kconfig: fix copy/paste-ism for dell-wmi-aio driver
doc: timers-howto: fix a typo ("unsgined")
perf: Only include annotate.h once in tools/perf/util/ui/browsers/annotate.c
md, raid5: Fix spelling error in comment ('Ofcourse' --> 'Of course').
treewide: fix a few typos in comments
regulator: change debug statement be consistent with the style of the rest
Revert "arm: mach-u300/gpio: Fix mem_region resource size miscalculations"
audit: acquire creds selectively to reduce atomic op overhead
rtlwifi: don't touch with treewide double semicolon removal
treewide: cleanup continuations and remove logging message whitespace
ath9k_hw: don't touch with treewide double semicolon removal
include/linux/leds-regulator.h: fix syntax in example code
tty: fix typo in descripton of tty_termios_encode_baud_rate
xtensa: remove obsolete BKL kernel option from defconfig
m68k: fix comment typo 'occcured'
arch:Kconfig.locks Remove unused config option.
treewide: remove extra semicolons
...
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (45 commits)
crypto: caam - add support for sha512 variants of existing AEAD algorithms
crypto: caam - remove unused authkeylen from caam_ctx
crypto: caam - fix decryption shared vs. non-shared key setting
crypto: caam - platform_bus_type migration
crypto: aesni-intel - fix aesni build on i386
crypto: aesni-intel - Merge with fpu.ko
crypto: mv_cesa - make count_sgs() null-pointer proof
crypto: mv_cesa - copy remaining bytes to SRAM only when needed
crypto: mv_cesa - move digest state initialisation to a better place
crypto: mv_cesa - fill inner/outer IV fields only in HMAC case
crypto: mv_cesa - refactor copy_src_to_buf()
crypto: mv_cesa - no need to save digest state after the last chunk
crypto: mv_cesa - print a warning when registration of AES algos fail
crypto: mv_cesa - drop this call to mv_hash_final from mv_hash_finup
crypto: mv_cesa - the descriptor pointer register needs to be set just once
crypto: mv_cesa - use ablkcipher_request_cast instead of the manual container_of
crypto: caam - fix printk recursion for long error texts
crypto: caam - remove unused keylen from session context
hwrng: amd - enable AMD hw rnd driver for Maple PPC boards
hwrng: amd - manage resource allocation
...
Update the existing example in the general mpic binding to have a
separate TCRx region. Currently the example doesn't describe TCRx at
all. The one upstream device tree with an mpic timer node (p1022ds)
uses one large reg region to describe both, even though there are other
unrelated registers in between. That device tree also contains a bogus
interrupt specifier, and there's no upstream software that uses this yet,
so changing this shouldn't be a problem.
Add a full binding for the MPIC timer node, not just an example of
4-cell interrupts in the MPIC binding.
Add fsl,available-ranges, similar to msi-available-ranges.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
- all the integration parameters have been captured by the binding.
- the block name really uniquely identifies this hardware.
Some advocate putting SoC names everywhere in case software needs
to work around some chip-specific bug, but more precise SoC
information already exists in SVR, and board information already
exists in the top-level device tree node.
Note that sometimes the SoC name is a worse identifier than the
block version, as the block version can change between revisions
of the same SoC.
As a matter of historical reference, neither SEC versions 2.x
nor 3.x (driven by talitos) ever needed CHIP references.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Help clarify that the number trailing in compatible nomenclature
is the version number of the device, i.e., change:
"fsl,p4080-sec4.0", "fsl,sec4.0";
to:
"fsl,p4080-sec-v4.0", "fsl,sec-v4.0";
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Steve Cornelius <sec@pobox.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The SEC4 supercedes the SEC2.x/3.x as Freescale's
Integrated Security Engine. Its programming model is
incompatible with all prior versions of the SEC (talitos).
The SEC4 is also known as the Cryptographic Accelerator
and Assurance Module (CAAM); this driver is named caam.
This initial submission does not include support for Data Path
mode operation - AEAD descriptors are submitted via the job
ring interface, while the Queue Interface (QI) is enabled
for use by others. Only AEAD algorithms are implemented
at this time, for use with IPsec.
Many thanks to the Freescale STC team for their contributions
to this driver.
Signed-off-by: Steve Cornelius <sec@pobox.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Now that there is a Documentation/devicetree hierarchy, and the driver in
question has no specific platform dependency, move the binding
information to a more appropriate place.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging:
hwmon: (ads1015) Make gain and datarate configurable
hwmon: (ads1015) Drop dynamic attribute group
hwmon: Add support for Texas Instruments ADS1015
hwmon: New driver for SMSC SCH5627
hwmon: (abituguru*) Update my email address
hwmon: (lm75) Speed up detection
hwmon: (lm75) Add detection of the National Semiconductor LM75A
hp_accel: Fix driver name
Move lis3lv02d drivers to drivers/misc
Move hp_accel to drivers/platform/x86
Let Kconfig handle lis3lv02d dependencies
hwmon: (sht15) Fix integer overflow in humidity calculation
hwmon: (sht15) Spelling fix
hwmon: (w83795) Document pin mapping
Configuration for ads1015 gain and datarate is possible via
devicetree or platform data.
This is a followup patch to previous ads1015 patches on Jean Delvares
tree.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
