Change the pm_qos vote to default when the diplay goes
off. This allows the cpu to do idle power collapse after
display goes off.
Change-Id: Id7c3af50e66c9deab483da98cac2569f56cd21e4
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
With SDCC4, driver can check the register synchronization
by polling REG_WR_ACTIVE bit in MCI_STATUS2 register so in
that case there is no need to ensure register synchronize
using explicit delay (achieved by calling udelay()).
But there are many places in driver which calls the msmsdcc_delay()
to achieve atleast 1us delay. So this patch have identified such
places and changed them to call a function which guarantees
to have atleast 1us of blocking delay.
CRs-fixed: 345170
Change-Id: I3236496ae6edf0108687b897558091cbb32e0a39
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
If SDCC device runtime status was RPM_RESUMED before system suspend
happens, during next system resume SDCC will also be resumed
synchronously. As SDCC resume is happening as part of system resume
path and it may take around 150ms to resume for SDCC slot which have
SD card connected. As this resume latency is too high, it may impact
overall system resume time and can effect the user experience.
This change makes sure that during system suspend, device runtime
status gets set to RPM_SUSPENDED. So when system resume happens,
SDCC resume can be skipped which means SDCC resume is deferred
until next SDCC transfer request comes in.
CRs-fixed: 344459
Change-Id: I579030b3759fee2c566ab06daad10ff4dd4c0085
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
There is a difference between the 7k & 8625 targets interrupt
controllers. 7k & 8625 targets uses the VIC & QGIC controllers
respectively. Power driver uses these conrtoller API's to take
a decision while entering into low power modes. This change
provides a generic implementation wihtout worrying about the
interrupt controller being used on the target.
Change-Id: Ib50cb19dc84333a969fc5287381f7703b64042ed
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Following is the sequence during system resume (dpm_resume()):
1. SDCC driver resume gets called which does nothing as it will
find the device as runtime suspended.
2. As part of dpm_resume() itself, mmc_bus_resume() is called which
results in this call flow:
mmc_bus_resume -> mmc_blk_resume -> mmc_blk_set_blksize ->
mmc_claim_host -> mmc_host_enable -> host_ops->enable ->
SDCC driver runtime resume.
We really don't want to do runtime resume of SDCC as part of
dpm_resume() othewise it will increase the latency of overall
system resume path.
For sector addressed cards (card size > 2GB), default blocksize is
512 bytes which means setting block length by sending
CMD16 (SET_BLOCKLEN) is not required for such cards. But
mmc_blk_set_blksize() first claims host and then check if card requires
CMD16 or not. mmc_claim_host() will cause runtime resume of SDCC device.
So it's better to first check if card requires CMD16 or not for setting
block length to 512 and then claim the host only if it's required.
CRs-fixed: 344459
Change-Id: I428cedeeee08cdc82ef9805f4d72179dfe0b3ce8
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
For MDP writeback buffer allocations, use appropriate heap id flags
for secure and non-secure sessions
Change-Id: I05e897d5d90ab03b17ccddbda764f39b963192ef
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Enable I2C bus, QUP controller, and I2C character device so that
copper board can use I2C functionality.
Change-Id: I162134b16c5981f8e8e05a260aa89088785a6bbc
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Both audio path and MBHC accessory detection logic need master clock
enabled along with bandgap and clock block of CODEC. Clock control
is managed by the machine driver. Calls to clock control function from
audio and MBHC detection paths can be nested. As a result, reference
counter of master clock is incremen/decrement out of order and cause
master clock not enabled when audio path is enabled. Without master clock
CODEC will not consume data and this leads to SLIMBUS overflow error.
Change-Id: I2cabb2d6db4c0129716489672e34a49cc21cea08
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
Use mechanical switch on the phone jack to detect headset/headphone
insertion and removal. Mechanical switch is beneficial to avoid fake
button press and high impedance microphone headset detection.
CRs-fixed: 341402
Change-Id: Idffba14316ab25e07736d1b7385f0edb16216089
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
It turns out that A3XX_RBBM_HARDWARE_VERSION returns 0x0 for both A320
and A305. This, combined with some faulty logic in the GPU list, caused
A320 to be reported as a A305. This had the immediate effect of costing
A320 on apq8054 half the GMEM that it deserves and also triggering
instabilities in the user mode driver. Instead of trying to read multiple
registers to figure out the GPU ID, make the reasoned assumption that for
now at least, GPU ID will match SoC ID. Construct the chip_id based on the
SoC ID for A3XX targets and fix up the reported chip_id so it matches what
user space expects.
Change-Id: Ic0dedbadc74cb08fd7bc0bfb523b710ad33ed78c
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Clean up some error paths and simplify the code by
moving to devm_regulator_get().
Change-Id: Ifce28d4c2dfe0ed180433736ac9c815259f5359d
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
QRD7 is a NAND based variant of QRD1 with MSM8625. So,
add minimal support for the same.
Change-Id: Ic7078ca5789eac6c9a7d299956a28cb37e556901
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
In current design, voice and voip calls share the same
memory for calibration data. But DSP doesn't support to map
the same memory twice. This will cause crash in DSP when trying
to make voice call and voip call concurrently.
In voice driver, allocate the separate memory to store voip
calibration data.
Change-Id: I52bf0554f88610ab8088571739aa0a72cff69f39
Signed-off-by: Helen Zeng <xiaoyunz@codeaurora.org>
Update clock driver to support 8930 clock changes. Also update
board file to use 8930 clock data.
Change-Id: Ia5b9af192a93e664e1182071df77b6c25ce6c85d
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
There has race condition that mipi_dsi_disable_irq_nosync() is
called from isr context at one core while mipi_dsi_irq_enable()
is called from thread context at other core. Serialize
mipi_dsi_disable_irq_nosync() with mipi_dsi_irq_enable() by
putting mipi_dsi_disable_irq_nosync() inside scope of
spin_lock(&dsi_mdp_lock).
CRs-fixed: 345837
Change-Id: Ibd2ff3194890b671983142fdb7b5a62cc009cae2
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Instead of a fixed 256MB virtual range for both the GPUMMU and IOMMU, make
the virtual range a property of the MMU engine and set the IOMMU range to
2GB. Technically we could go all the way up to 4G, but even 2G is far out
of the realm of possiblity in the current generation, and we wanted to
reserve some of the space for future enhancements.
Change-Id: Ic0dedbad2987beb162b6a1878dd65ffae8a78522
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Idlestats powerscale policy is required for userspace GPU DCVS.
This change sets it as default, so that the GPU DCVS daemon can
be started without having to set it first.
Change-Id: Ia280c9f685262b2848f1b85d74876f15a2e6ad6f
Signed-off-by: Lynus Vaz <lvaz@codeaurora.org>
Set speakers to off by default to avoid power consumption on idle
before speakers are used by audio drivers.
Change-Id: Ieb70522fcf2a0653dce182824d7a1145680eb282
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
Enable focaltech driver on 7627a platform to use
multi touch functionality.
Change-Id: If10efc6408a1b1521f1b1ee8351a71831c776c97
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
Add platform device for ft5x06 touch controller series and pass
gpios as platform data.
Change-Id: I5122171f911b5d3853af552fb50f066d4ae80aaf
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
Ft5x06 controllers are single chip capacitive
touch panel controller ICs with a built-in 8 bit
Micro Controller Unit. It supports multi-touch
capability and can detect up to five touches.
Change-Id: I39eb1175d473d1f2c463e1c4a0a1606307da9dc0
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
Since there is no access required to boot partitions,
mmcboot0/1 devices should not be created. Advertise
MMC_CAP2_BOOTPART_NOACC host capability to reflect this.
Change-Id: If3adbc6585e3ba652183ee3ede117503d709ce70
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Intel Medfield platform blocks access to eMMC boot partitions which
results in switch errors. Since there is no access, mmcboot0/1
devices should not be created. Add a host capability to reflect that.
Change-Id: I67d7e1301bb13ce6b01fb44e511ea21cfbf7e4bd
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
[subhashj@codeaurora.org: Fixed merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
If card clock rate passed by set_ios() is less than
minimum clock rate supported by the host controller,
set the clock rate to minimum clock rate supported by host.
Change-Id: I22f2a7413dfdb8c9a5188992aed99726c3c3d7a7
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
The SMB349 charger chip should be enabled by default
on all 8064 LiQUID devices.
Change-Id: I5359749221cd826298f65df5ea5408ed0baf04c1
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
