The PMU raw spinlock was used without proper initialization
and caused the kernel to dump spinlock bad magic errors.
Change-Id: Ib35b431dc6bdb6cef6a79c01557e372e8417fec0
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
The L2CC PMU is shared between all CPU's. In system wide profiling
mode, perf allocates each event for each CPU. This restricts
the number of L2 events that the user can specify.
Instead, change the event filters, such that in system wide mode
we count each event from all CPU's. This way, the user can specify
upto 4 events (which is the current limit in h/w) in system wide
profiling mode.
Task wide profiling mode is unchanged, since we need to filter
according to the CPU on which the task/thread is running.
Change-Id: Ia51fe97cdc19617f8a3cdd53409cb5f94ff2d9b3
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Add the ability to specify events using the register, code, group
format instead of using enumeration values for scorpion L2 cache
raw perf events.
The existing enumeration values are temporarily left in place as they
are used by legacy copies of tools such as QView.
Change-Id: Id3e9fc8e13f61b2a0a811e1cdb458faaf52c5d02
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
Adding the L2 cycle counter in the default list of events
has the advantage that the user can do a :
perf stat -e l2-cycles -e cycles ls
and see the outputs for the L2 cycle counter and L1 cycle
counter separately. Previously, it was only accessible via
the raw code "rsfe".
This method also allows us to program the L2 cycle counter
only from one CPU.
The changes in this patch are used by the userspace perf
tool.
Change-Id: I61b85b48f5474fe9f6ffb1a405b60b4332ab60c7
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
To avoid including the l2-accessors API needlessly for all L2 PMU's,
compile-in L2 perf code depending on the ARM implementation.
Change-Id: Ib26d58fecb5b440f95415c1b47d55f919fea523f
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
The L2 cycle counter is a different counter than the one used
for counting L1 cycles but they shared the same raw code,
0xff only to be differentiated by the PMU_TYPE_SHARED identifier.
perf stat -e rsff counted L2 cycles
perf stat -e rff counted L1 cycles
Keep the raw event code for the two separate.
0xfe for L2 cycles reduces chances of counting the wrong
thing accidently.
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
The original intent was to restrict the number of active events to number
of available counters at init. But this code had the side effect of events
needelessly reserving a slot even when they couldn't be armed on the PMU.
Eventually this resource reservation code will be replaced entirely.
For now, we lazily deny event allocation just before arming them on
the PMU.
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
