250c2e5734
Various variants of 7627a uses common display code which is duplicated over multiple board files. So, move out the common code for display into separate board file to avoid rebase issues during new board bring up and maintenance. Change-Id: Ibf3558e5b26dfbd9f056c0f5f78f4bf8573ca642 Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
108 lines
2.7 KiB
C
108 lines
2.7 KiB
C
/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ARCH_ARM_MACH_MSM_BOARD_7627A__
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#define __ARCH_ARM_MACH_MSM_BOARD_7627A__
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void __init msm7627a_init_mmc(void);
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void __init msm_msm7627a_allocate_memory_regions(void);
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void __init msm_fb_add_devices(void);
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enum {
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GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
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GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
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/* SURF expander */
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GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
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GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
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GPIO_WLAN_EXT_POR_N,
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GPIO_DISPLAY_PWR_EN,
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GPIO_BACKLIGHT_EN,
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GPIO_PRESSURE_XCLR,
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GPIO_VREG_S3_EXP,
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GPIO_UBM2M_PWRDWN,
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GPIO_ETM_MODE_CS_N,
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GPIO_HOST_VBUS_EN,
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GPIO_SPI_MOSI,
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GPIO_SPI_MISO,
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GPIO_SPI_CLK,
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GPIO_SPI_CS0_N,
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GPIO_CORE_EXPANDER_IO13,
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GPIO_CORE_EXPANDER_IO14,
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GPIO_CORE_EXPANDER_IO15,
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/* Camera expander */
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GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
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GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
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GPIO_CAM_GP_AFBUSY,
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GPIO_CAM_GP_CAM_PWDN,
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GPIO_CAM_GP_CAM1MP_XCLR,
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GPIO_CAM_GP_CAMIF_RESET_N,
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GPIO_CAM_GP_STROBE_CE,
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GPIO_CAM_GP_LED_EN1,
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GPIO_CAM_GP_LED_EN2,
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};
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enum {
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QRD_GPIO_HOST_VBUS_EN = 107,
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QRD_GPIO_BT_SYS_REST_EN = 114,
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QRD_GPIO_WAKE_ON_WIRELESS,
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QRD_GPIO_BACKLIGHT_EN,
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QRD_GPIO_NC,
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QRD_GPIO_CAM_3MP_PWDN, /* CAM_VGA */
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QRD_GPIO_WLAN_EN,
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QRD_GPIO_CAM_5MP_SHDN_EN,
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QRD_GPIO_CAM_5MP_RESET,
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QRD_GPIO_TP,
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QRD_GPIO_CAM_GP_CAMIF_RESET,
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};
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#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
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#define FPGA_MSM_CNTRL_REG2 0x90008010
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#define BAHAMA_SLAVE_ID_FM_REG 0x02
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#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
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#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
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#define FM_GPIO 83
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#define BT_PCM_BCLK_MODE 0x88
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#define BT_PCM_DIN_MODE 0x89
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#define BT_PCM_DOUT_MODE 0x8A
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#define BT_PCM_SYNC_MODE 0x8B
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#define FM_I2S_SD_MODE 0x8E
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#define FM_I2S_WS_MODE 0x8F
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#define FM_I2S_SCK_MODE 0x90
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#define I2C_PIN_CTL 0x15
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#define I2C_NORMAL 0x40
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struct bahama_config_register {
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u8 reg;
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u8 value;
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u8 mask;
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};
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struct bt_vreg_info {
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const char *name;
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unsigned int pmapp_id;
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unsigned int min_level;
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unsigned int max_level;
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unsigned int is_pin_controlled;
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struct regulator *reg;
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};
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extern struct platform_device msm_bt_power_device;
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void __init msm7627a_bt_power_init(void);
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#endif
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void __init msm7627a_camera_init(void);
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#endif
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