Drivers should now use their device names to distinguish between clocks of the same type rather than the clock name. Clock names are updated to match the new naming convention. CRs-Fixed: 327559 Change-Id: I78757806589e037a0655a63e7ee20c935214c99d Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
189 lines
5.1 KiB
C
189 lines
5.1 KiB
C
/* linux/include/mach/hsusb.h
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*
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* Copyright (C) 2008 Google, Inc.
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* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
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* Author: Brian Swetland <swetland@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ASM_ARCH_MSM_HSUSB_H
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#define __ASM_ARCH_MSM_HSUSB_H
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#include <linux/types.h>
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#include <linux/pm_qos_params.h>
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#define PHY_TYPE_MASK 0x0F
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#define PHY_TYPE_MODE 0xF0
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#define PHY_MODEL_MASK 0xFF00
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#define PHY_TYPE(x) ((x) & PHY_TYPE_MASK)
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#define PHY_MODEL(x) ((x) & PHY_MODEL_MASK)
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#define USB_PHY_MODEL_65NM 0x100
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#define USB_PHY_MODEL_180NM 0x200
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#define USB_PHY_MODEL_45NM 0x400
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#define USB_PHY_UNDEFINED 0x00
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#define USB_PHY_INTEGRATED 0x01
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#define USB_PHY_EXTERNAL 0x02
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#define USB_PHY_SERIAL_PMIC 0x04
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#define REQUEST_STOP 0
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#define REQUEST_START 1
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#define REQUEST_RESUME 2
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#define REQUEST_HNP_SUSPEND 3
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#define REQUEST_HNP_RESUME 4
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/* Flags required to read ID state of PHY for ACA */
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#define PHY_ID_MASK 0xB0
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#define PHY_ID_GND 0
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#define PHY_ID_C 0x10
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#define PHY_ID_B 0x30
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#define PHY_ID_A 0x90
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#define phy_id_state(ints) ((ints) & PHY_ID_MASK)
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#define phy_id_state_gnd(ints) (phy_id_state((ints)) == PHY_ID_GND)
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#define phy_id_state_a(ints) (phy_id_state((ints)) == PHY_ID_A)
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/* RID_B and RID_C states does not exist with standard ACA */
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#ifdef CONFIG_USB_MSM_STANDARD_ACA
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#define phy_id_state_b(ints) 0
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#define phy_id_state_c(ints) 0
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#else
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#define phy_id_state_b(ints) (phy_id_state((ints)) == PHY_ID_B)
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#define phy_id_state_c(ints) (phy_id_state((ints)) == PHY_ID_C)
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#endif
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/* used to detect the OTG Mode */
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enum otg_mode {
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OTG_ID = 0, /* ID pin detection */
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OTG_USER_CONTROL, /* User configurable */
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OTG_VCHG, /* Based on VCHG interrupt */
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};
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/* used to configure the default mode,if otg_mode is USER_CONTROL */
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enum usb_mode {
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USB_HOST_MODE,
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USB_PERIPHERAL_MODE,
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};
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enum chg_type {
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USB_CHG_TYPE__SDP,
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USB_CHG_TYPE__CARKIT,
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USB_CHG_TYPE__WALLCHARGER,
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USB_CHG_TYPE__INVALID
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};
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enum pre_emphasis_level {
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PRE_EMPHASIS_DEFAULT,
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PRE_EMPHASIS_DISABLE,
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PRE_EMPHASIS_WITH_10_PERCENT = (1 << 5),
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PRE_EMPHASIS_WITH_20_PERCENT = (3 << 4),
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};
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enum cdr_auto_reset {
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CDR_AUTO_RESET_DEFAULT,
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CDR_AUTO_RESET_ENABLE,
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CDR_AUTO_RESET_DISABLE,
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};
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enum se1_gate_state {
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SE1_GATING_DEFAULT,
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SE1_GATING_ENABLE,
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SE1_GATING_DISABLE,
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};
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enum hs_drv_amplitude {
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HS_DRV_AMPLITUDE_DEFAULT,
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HS_DRV_AMPLITUDE_ZERO_PERCENT,
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HS_DRV_AMPLITUDE_25_PERCENTI = (1 << 2),
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HS_DRV_AMPLITUDE_5_PERCENT = (1 << 3),
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HS_DRV_AMPLITUDE_75_PERCENT = (3 << 2),
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};
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#define HS_DRV_SLOPE_DEFAULT (-1)
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/* used to configure the analog switch to select b/w host and peripheral */
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enum usb_switch_control {
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USB_SWITCH_PERIPHERAL = 0, /* Configure switch in peripheral mode*/
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USB_SWITCH_HOST, /* Host mode */
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USB_SWITCH_DISABLE, /* No mode selected, shutdown power */
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};
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struct msm_hsusb_gadget_platform_data {
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int *phy_init_seq;
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void (*phy_reset)(void);
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int self_powered;
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int is_phy_status_timer_on;
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};
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struct msm_otg_platform_data {
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int (*rpc_connect)(int);
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int (*phy_reset)(void __iomem *);
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int pmic_vbus_irq;
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int pmic_id_irq;
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/* if usb link is in sps there is no need for
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* usb pclk as dayatona fabric clock will be
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* used instead
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*/
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int usb_in_sps;
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enum pre_emphasis_level pemp_level;
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enum cdr_auto_reset cdr_autoreset;
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enum hs_drv_amplitude drv_ampl;
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enum se1_gate_state se1_gating;
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int hsdrvslope;
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int phy_reset_sig_inverted;
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int phy_can_powercollapse;
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int pclk_required_during_lpm;
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int bam_disable;
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/* HSUSB core in 8660 has the capability to gate the
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* pclk when not being used. Though this feature is
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* now being disabled because of H/w issues
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*/
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int pclk_is_hw_gated;
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int (*ldo_init) (int init);
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int (*ldo_enable) (int enable);
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int (*ldo_set_voltage) (int mV);
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u32 swfi_latency;
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/* pmic notfications apis */
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int (*pmic_vbus_notif_init) (void (*callback)(int online), int init);
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int (*pmic_id_notif_init) (void (*callback)(int online), int init);
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int (*phy_id_setup_init) (int init);
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int (*pmic_register_vbus_sn) (void (*callback)(int online));
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void (*pmic_unregister_vbus_sn) (void (*callback)(int online));
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int (*pmic_enable_ldo) (int);
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int (*init_gpio)(int on);
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void (*setup_gpio)(enum usb_switch_control mode);
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u8 otg_mode;
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u8 usb_mode;
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void (*vbus_power) (unsigned phy_info, int on);
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/* charger notification apis */
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void (*chg_connected)(enum chg_type chg_type);
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void (*chg_vbus_draw)(unsigned ma);
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int (*chg_init)(int init);
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int (*config_vddcx)(int high);
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int (*init_vddcx)(int init);
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struct pm_qos_request_list pm_qos_req_dma;
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};
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struct msm_usb_host_platform_data {
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unsigned phy_info;
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unsigned int power_budget;
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void (*config_gpio)(unsigned int config);
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void (*vbus_power) (unsigned phy_info, int on);
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int (*vbus_init)(int init);
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struct clk *ebi1_clk;
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};
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#endif
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