1316308eb3
Added method to msm_charger to allow programming of max source current. Created struct for platform data to be passed into pmic8058_charger Signed-off-by: Terence Hampson <thampson@codeaurora.org>
257 lines
8.7 KiB
C
257 lines
8.7 KiB
C
/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/*
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* Qualcomm PMIC8058 driver header file
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*
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*/
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#include <linux/irq.h>
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#include <linux/mfd/core.h>
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#define PM8058_GPIOS 40
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#define PM8058_MPPS 12
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#define PM8058_IRQ_BLOCK_BIT(block, bit) ((block) * 8 + (bit))
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/* MPPs and GPIOs [0,N) */
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#define PM8058_MPP_IRQ(base, mpp) ((base) + \
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PM8058_IRQ_BLOCK_BIT(16, (mpp)))
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#define PM8058_GPIO_IRQ(base, gpio) ((base) + \
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PM8058_IRQ_BLOCK_BIT(24, (gpio)))
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#define PM8058_KEYPAD_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(9, 2))
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#define PM8058_KEYSTUCK_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(9, 3))
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#define PM8058_VCP_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(1, 0))
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#define PM8058_CHGILIM_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(1, 3))
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#define PM8058_VBATDET_LOW_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(1, 4))
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#define PM8058_BATT_REPLACE_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(1, 5))
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#define PM8058_CHGINVAL_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(1, 6))
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#define PM8058_CHGVAL_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(1, 7))
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#define PM8058_CHG_END_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(2, 0))
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#define PM8058_FASTCHG_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(2, 1))
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#define PM8058_CHGSTATE_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(2, 3))
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#define PM8058_AUTO_CHGFAIL_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(2, 4))
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#define PM8058_AUTO_CHGDONE_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(2, 5))
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#define PM8058_ATCFAIL_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(2, 6))
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#define PM8058_ATC_DONE_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(2, 7))
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#define PM8058_OVP_OK_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(3, 0))
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#define PM8058_COARSE_DET_OVP_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(3, 1))
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#define PM8058_VCPMAJOR_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(3, 2))
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#define PM8058_CHG_GONE_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(3, 3))
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#define PM8058_CHGTLIMIT_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(3, 4))
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#define PM8058_CHGHOT_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(3, 5))
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#define PM8058_BATTTEMP_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(3, 6))
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#define PM8058_BATTCONNECT_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(3, 7))
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#define PM8058_BATFET_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(5, 4))
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#define PM8058_VBATDET_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(5, 5))
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#define PM8058_VBAT_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(5, 6))
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#define PM8058_CBLPWR_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(4, 3))
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#define PM8058_PWRKEY_REL_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(6, 2))
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#define PM8058_PWRKEY_PRESS_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(6, 3))
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#define PM8058_SW_0_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(7, 1))
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#define PM8058_IR_0_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(7, 0))
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#define PM8058_SW_1_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(7, 3))
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#define PM8058_IR_1_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(7, 2))
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#define PM8058_SW_2_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(7, 5))
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#define PM8058_IR_2_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(7, 4))
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#define PM8058_RTC_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(6, 5))
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#define PM8058_RTC_ALARM_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(4, 7))
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#define PM8058_ADC_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(9, 4))
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#define PM8058_TEMP_ALARM_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(6, 7))
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#define PM8058_OSCHALT_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(4, 6))
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#define PM8058_BATT_ALARM_IRQ(base) ((base) + PM8058_IRQ_BLOCK_BIT(5, 6))
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struct pm8058_chip;
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struct pm8058_platform_data {
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/* This table is only needed for misc interrupts. */
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int irq_base;
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int (*init)(struct pm8058_chip *pm_chip);
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int num_subdevs;
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struct mfd_cell *sub_devices;
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int irq_trigger_flags;
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struct mfd_cell *charger_sub_device;
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};
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struct pm8058_gpio_platform_data {
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int gpio_base;
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int irq_base;
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int (*init)(void);
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};
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/* GPIO parameters */
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/* direction */
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#define PM_GPIO_DIR_OUT 0x01
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#define PM_GPIO_DIR_IN 0x02
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#define PM_GPIO_DIR_BOTH (PM_GPIO_DIR_OUT | PM_GPIO_DIR_IN)
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/* output_buffer */
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#define PM_GPIO_OUT_BUF_OPEN_DRAIN 1
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#define PM_GPIO_OUT_BUF_CMOS 0
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/* pull */
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#define PM_GPIO_PULL_UP_30 0
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#define PM_GPIO_PULL_UP_1P5 1
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#define PM_GPIO_PULL_UP_31P5 2
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#define PM_GPIO_PULL_UP_1P5_30 3
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#define PM_GPIO_PULL_DN 4
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#define PM_GPIO_PULL_NO 5
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/* vin_sel: Voltage Input Select */
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#define PM_GPIO_VIN_VPH 0
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#define PM_GPIO_VIN_BB 1
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#define PM_GPIO_VIN_S3 2
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#define PM_GPIO_VIN_L3 3
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#define PM_GPIO_VIN_L7 4
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#define PM_GPIO_VIN_L6 5
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#define PM_GPIO_VIN_L5 6
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#define PM_GPIO_VIN_L2 7
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/* out_strength */
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#define PM_GPIO_STRENGTH_NO 0
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#define PM_GPIO_STRENGTH_HIGH 1
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#define PM_GPIO_STRENGTH_MED 2
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#define PM_GPIO_STRENGTH_LOW 3
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/* function */
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#define PM_GPIO_FUNC_NORMAL 0
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#define PM_GPIO_FUNC_PAIRED 1
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#define PM_GPIO_FUNC_1 2
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#define PM_GPIO_FUNC_2 3
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#define PM_GPIO_DTEST1 4
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#define PM_GPIO_DTEST2 5
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#define PM_GPIO_DTEST3 6
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#define PM_GPIO_DTEST4 7
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struct pm8058_gpio {
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int direction;
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int output_buffer;
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int output_value;
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int pull;
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int vin_sel; /* 0..7 */
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int out_strength;
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int function;
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int inv_int_pol; /* invert interrupt polarity */
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int disable_pin; /* disable pin and tri-state its pad */
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};
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struct pmic8058_charger_data {
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unsigned int max_source_current;
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int charger_type;
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};
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/* chip revision */
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#define PM_8058_REV_1p0 0xE1
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#define PM_8058_REV_2p0 0xE2
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#define PM_8058_REV_2p1 0xE3
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/* misc: control mask and flag */
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#define PM8058_UART_MUX_MASK 0x60
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#define PM8058_UART_MUX_NO 0x0
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#define PM8058_UART_MUX_1 0x20
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#define PM8058_UART_MUX_2 0x40
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#define PM8058_UART_MUX_3 0x60
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enum pon_config{
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DISABLE_HARD_RESET = 0,
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SHUTDOWN_ON_HARD_RESET,
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RESTART_ON_HARD_RESET,
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MAX_PON_CONFIG,
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};
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enum pm8058_smpl_delay {
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PM8058_SMPL_DELAY_0p5,
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PM8058_SMPL_DELAY_1p0,
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PM8058_SMPL_DELAY_1p5,
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PM8058_SMPL_DELAY_2p0,
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};
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/* Note -do not call pm8058_read and pm8058_write in an atomic context */
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int pm8058_read(struct pm8058_chip *pm_chip, u16 addr, u8 *values,
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unsigned int len);
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int pm8058_write(struct pm8058_chip *pm_chip, u16 addr, u8 *values,
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unsigned int len);
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int pm8058_gpio_config(int gpio, struct pm8058_gpio *param);
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int pm8058_rev(struct pm8058_chip *pm_chip);
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int pm8058_irq_get_rt_status(struct pm8058_chip *pm_chip, int irq);
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int pm8058_misc_control(struct pm8058_chip *pm_chip, int mask, int flag);
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#ifdef CONFIG_PMIC8058
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int pm8058_reset_pwr_off(int reset);
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#else
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static inline int pm8058_reset_pwr_off(int reset) { return 0; }
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#endif
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int pm8058_hard_reset_config(enum pon_config config);
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/**
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* pm8058_smpl_control - enables/disables SMPL detection
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* @enable: 0 = shutdown PMIC on power loss, 1 = reset PMIC on power loss
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*
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* This function enables or disables the Sudden Momentary Power Loss detection
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* module. If SMPL detection is enabled, then when a sufficiently long power
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* loss event occurs, the PMIC will automatically reset itself. If SMPL
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* detection is disabled, then the PMIC will shutdown when power loss occurs.
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*
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* RETURNS: an appropriate -ERRNO error value on error, or zero for success.
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*/
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int pm8058_smpl_control(int enable);
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/**
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* pm8058_smpl_set_delay - sets the SMPL detection time delay
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* @delay: enum value corresponding to delay time
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*
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* This function sets the time delay of the SMPL detection module. If power
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* is reapplied within this interval, then the PMIC reset automatically. The
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* SMPL detection module must be enabled for this delay time to take effect.
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*
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* RETURNS: an appropriate -ERRNO error value on error, or zero for success.
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*/
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int pm8058_smpl_set_delay(enum pm8058_smpl_delay delay);
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/**
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* pm8058_watchdog_reset_control - enables/disables watchdog reset detection
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* @enable: 0 = shutdown when PS_HOLD goes low, 1 = reset when PS_HOLD goes low
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*
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* This function enables or disables the PMIC watchdog reset detection feature.
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* If watchdog reset detection is enabled, then the PMIC will reset itself
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* when PS_HOLD goes low. If it is not enabled, then the PMIC will shutdown
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* when PS_HOLD goes low.
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*
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* RETURNS: an appropriate -ERRNO error value on error, or zero for success.
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*/
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int pm8058_watchdog_reset_control(int enable);
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/**
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* pm8058_stay_on - enables stay_on feature
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*
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* PMIC stay-on feature allows PMIC to ignore MSM PS_HOLD=low
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* signal so that some special functions like debugging could be
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* performed.
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*
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* This feature should not be used in any product release.
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*
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* RETURNS: an appropriate -ERRNO error value on error, or zero for success.
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*/
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int pm8058_stay_on(void);
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