6b0b594bb8
This patch makes numerous miscellaneous code improvements to the QE library.
1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type()
(every caller of ucc_init_guemr() also calls ucc_set_type()). Modify all
callers of ucc_set_type() accordingly.
2. Remove the unused enum ucc_pram_initial_offset.
3. Refactor qe_setbrg(), also implement work-around for errata QE_General4.
4. Several printk() calls were missing the terminating \n.
5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where
appropriate.
6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed
with the wrong value.
7. Add the protocol type to struct us_info and updated ucc_slow_init() to
use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED.
8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx()
9. Add several macros in qe.h (mostly for slow UCC support, but also to
standardize some naming convention) and remove several unused macros.
10. Update ucc_geth.c to use the new macros.
11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol
to use when initializing the UCC in ucc_slow_init().
12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since
these are the real names of the registers.
13. Use the setbits, clrbits, and clrsetbits where appropriate.
14. Refactor ucc_set_qe_mux_rxtx().
15. Remove all instances of 'volatile'.
16. Simplify get_cmxucr_reg();
17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[].
18. Updated struct ucc_geth because struct ucc_fast is not padded any more.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
219 lines
5.5 KiB
C
219 lines
5.5 KiB
C
/*
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* arch/powerpc/sysdev/qe_lib/qe_io.c
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*
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* QE Parallel I/O ports configuration routines
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*
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* Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
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*
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* Author: Li Yang <LeoLi@freescale.com>
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* Based on code from Shlomi Gridish <gridish@freescale.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#undef DEBUG
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#define NUM_OF_PINS 32
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struct port_regs {
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__be32 cpodr; /* Open drain register */
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__be32 cpdata; /* Data register */
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__be32 cpdir1; /* Direction register */
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__be32 cpdir2; /* Direction register */
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__be32 cppar1; /* Pin assignment register */
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__be32 cppar2; /* Pin assignment register */
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};
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static struct port_regs *par_io = NULL;
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static int num_par_io_ports = 0;
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int par_io_init(struct device_node *np)
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{
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struct resource res;
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int ret;
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const u32 *num_ports;
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/* Map Parallel I/O ports registers */
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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return ret;
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par_io = ioremap(res.start, res.end - res.start + 1);
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num_ports = of_get_property(np, "num-ports", NULL);
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if (num_ports)
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num_par_io_ports = *num_ports;
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return 0;
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}
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int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
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int assignment, int has_irq)
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{
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u32 pin_mask1bit, pin_mask2bits, new_mask2bits, tmp_val;
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if (!par_io)
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return -1;
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/* calculate pin location for single and 2 bits information */
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pin_mask1bit = (u32) (1 << (NUM_OF_PINS - (pin + 1)));
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/* Set open drain, if required */
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tmp_val = in_be32(&par_io[port].cpodr);
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if (open_drain)
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out_be32(&par_io[port].cpodr, pin_mask1bit | tmp_val);
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else
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out_be32(&par_io[port].cpodr, ~pin_mask1bit & tmp_val);
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/* define direction */
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tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ?
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in_be32(&par_io[port].cpdir2) :
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in_be32(&par_io[port].cpdir1);
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/* get all bits mask for 2 bit per port */
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pin_mask2bits = (u32) (0x3 << (NUM_OF_PINS -
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(pin % (NUM_OF_PINS / 2) + 1) * 2));
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/* Get the final mask we need for the right definition */
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new_mask2bits = (u32) (dir << (NUM_OF_PINS -
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(pin % (NUM_OF_PINS / 2) + 1) * 2));
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/* clear and set 2 bits mask */
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if (pin > (NUM_OF_PINS / 2) - 1) {
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out_be32(&par_io[port].cpdir2,
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~pin_mask2bits & tmp_val);
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tmp_val &= ~pin_mask2bits;
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out_be32(&par_io[port].cpdir2, new_mask2bits | tmp_val);
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} else {
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out_be32(&par_io[port].cpdir1,
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~pin_mask2bits & tmp_val);
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tmp_val &= ~pin_mask2bits;
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out_be32(&par_io[port].cpdir1, new_mask2bits | tmp_val);
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}
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/* define pin assignment */
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tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ?
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in_be32(&par_io[port].cppar2) :
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in_be32(&par_io[port].cppar1);
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new_mask2bits = (u32) (assignment << (NUM_OF_PINS -
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(pin % (NUM_OF_PINS / 2) + 1) * 2));
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/* clear and set 2 bits mask */
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if (pin > (NUM_OF_PINS / 2) - 1) {
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out_be32(&par_io[port].cppar2,
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~pin_mask2bits & tmp_val);
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tmp_val &= ~pin_mask2bits;
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out_be32(&par_io[port].cppar2, new_mask2bits | tmp_val);
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} else {
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out_be32(&par_io[port].cppar1,
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~pin_mask2bits & tmp_val);
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tmp_val &= ~pin_mask2bits;
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out_be32(&par_io[port].cppar1, new_mask2bits | tmp_val);
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}
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return 0;
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}
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EXPORT_SYMBOL(par_io_config_pin);
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int par_io_data_set(u8 port, u8 pin, u8 val)
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{
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u32 pin_mask, tmp_val;
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if (port >= num_par_io_ports)
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return -EINVAL;
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if (pin >= NUM_OF_PINS)
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return -EINVAL;
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/* calculate pin location */
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pin_mask = (u32) (1 << (NUM_OF_PINS - 1 - pin));
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tmp_val = in_be32(&par_io[port].cpdata);
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if (val == 0) /* clear */
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out_be32(&par_io[port].cpdata, ~pin_mask & tmp_val);
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else /* set */
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out_be32(&par_io[port].cpdata, pin_mask | tmp_val);
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return 0;
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}
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EXPORT_SYMBOL(par_io_data_set);
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int par_io_of_config(struct device_node *np)
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{
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struct device_node *pio;
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const phandle *ph;
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int pio_map_len;
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const unsigned int *pio_map;
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if (par_io == NULL) {
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printk(KERN_ERR "par_io not initialized \n");
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return -1;
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}
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ph = of_get_property(np, "pio-handle", NULL);
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if (ph == 0) {
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printk(KERN_ERR "pio-handle not available \n");
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return -1;
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}
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pio = of_find_node_by_phandle(*ph);
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pio_map = of_get_property(pio, "pio-map", &pio_map_len);
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if (pio_map == NULL) {
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printk(KERN_ERR "pio-map is not set! \n");
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return -1;
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}
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pio_map_len /= sizeof(unsigned int);
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if ((pio_map_len % 6) != 0) {
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printk(KERN_ERR "pio-map format wrong! \n");
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return -1;
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}
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while (pio_map_len > 0) {
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par_io_config_pin((u8) pio_map[0], (u8) pio_map[1],
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(int) pio_map[2], (int) pio_map[3],
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(int) pio_map[4], (int) pio_map[5]);
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pio_map += 6;
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pio_map_len -= 6;
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}
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of_node_put(pio);
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return 0;
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}
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EXPORT_SYMBOL(par_io_of_config);
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#ifdef DEBUG
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static void dump_par_io(void)
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{
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unsigned int i;
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printk(KERN_INFO "%s: par_io=%p\n", __FUNCTION__, par_io);
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for (i = 0; i < num_par_io_ports; i++) {
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printk(KERN_INFO " cpodr[%u]=%08x\n", i,
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in_be32(&par_io[i].cpodr));
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printk(KERN_INFO " cpdata[%u]=%08x\n", i,
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in_be32(&par_io[i].cpdata));
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printk(KERN_INFO " cpdir1[%u]=%08x\n", i,
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in_be32(&par_io[i].cpdir1));
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printk(KERN_INFO " cpdir2[%u]=%08x\n", i,
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in_be32(&par_io[i].cpdir2));
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printk(KERN_INFO " cppar1[%u]=%08x\n", i,
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in_be32(&par_io[i].cppar1));
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printk(KERN_INFO " cppar2[%u]=%08x\n", i,
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in_be32(&par_io[i].cppar2));
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}
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}
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EXPORT_SYMBOL(dump_par_io);
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#endif /* DEBUG */
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