eecb28c590
The commit 292b293 creates the MSM boot failures, so squash the commit 28af690 with it to avoid such failures. The commit ddd847 and 0c1991 are required to keep the watchdog and Copper targets working. commit 292b293ceef2eda1f96f0c90b96e954d7bdabd1c Author: Marc Zyngier <marc.zyngier@arm.com> Date: Wed Jul 20 16:24:14 2011 +0100 ARM: gic: consolidate PPI handling PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> commit 28af690a284dfcb627bd69d0963db1c0f412cb8c Author: Marc Zyngier <marc.zyngier@arm.com> Date: Fri Jul 22 12:52:37 2011 +0100 ARM: gic, local timers: use the request_percpu_irq() interface This patch remove the hardcoded link between local timers and PPIs, and convert the PPI users (TWD, MCT and MSM timers) to the new *_percpu_irq interface. Also some collateral cleanup (local_timer_ack() is gone, and the interrupt handler is strictly private to each driver). PPIs are now useable for more than just the local timers. Additional testing by David Brown (msm8250 and msm8660) and Shawn Guo (imx6q). Cc: David Brown <davidb@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> commit ddd8478d68f8cf75ee9771667c0cbe2a9d1caeb9 Author: Trilok Soni <tsoni@codeaurora.org> Date: Tue Dec 6 00:56:01 2011 +0530 msm: watchdog: Use request_percpu_irq() interface Change-Id: I7c319344f6a7f7a7c70682ac87f5c385e56d130c Signed-off-by: Trilok Soni <tsoni@codeaurora.org> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> commit 0c19915e092214a4c17a9920c4c1f3d78610217d Author: Sathish Ambley <sambley@codeaurora.org> Date: Fri Dec 9 17:07:37 2011 +0530 arm: arch_timer: Use request_percpu_irq() API Change-Id: Iee9b218d538f315cd884a47d95bcc0dcc49b0fe1 Signed-off-by: Sathish Ambley <sambley@codeaurora.org> Change-Id: I7bbba706b1f2e55814be5891ed76063725c2bfb1 Signed-off-by: Ravi Kumar <kumarrav@codeaurora.org> [tsoni@codeaurora.org: MSM specific fixes] Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
40 lines
705 B
ArmAsm
40 lines
705 B
ArmAsm
#include <asm/assembler.h>
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/*
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* Interrupt handling. Preserves r7, r8, r9
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*/
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.macro arch_irq_handler_default
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get_irqnr_preamble r6, lr
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1: get_irqnr_and_base r0, r2, r6, lr
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movne r1, sp
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@
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@ routine called with r0 = irq number, r1 = struct pt_regs *
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@
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adrne lr, BSYM(1b)
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bne asm_do_IRQ
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#ifdef CONFIG_SMP
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/*
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* XXX
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*
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* this macro assumes that irqstat (r2) and base (r6) are
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* preserved from get_irqnr_and_base above
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*/
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ALT_SMP(test_for_ipi r0, r2, r6, lr)
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ALT_UP_B(9997f)
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movne r1, sp
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adrne lr, BSYM(1b)
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bne do_IPI
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#endif
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9997:
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.endm
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.macro arch_irq_handler, symbol_name
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.align 5
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.global \symbol_name
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\symbol_name:
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mov r8, lr
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arch_irq_handler_default
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mov pc, r8
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.endm
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