eecb28c590
The commit 292b293 creates the MSM boot failures, so squash the commit 28af690 with it to avoid such failures. The commit ddd847 and 0c1991 are required to keep the watchdog and Copper targets working. commit 292b293ceef2eda1f96f0c90b96e954d7bdabd1c Author: Marc Zyngier <marc.zyngier@arm.com> Date: Wed Jul 20 16:24:14 2011 +0100 ARM: gic: consolidate PPI handling PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> commit 28af690a284dfcb627bd69d0963db1c0f412cb8c Author: Marc Zyngier <marc.zyngier@arm.com> Date: Fri Jul 22 12:52:37 2011 +0100 ARM: gic, local timers: use the request_percpu_irq() interface This patch remove the hardcoded link between local timers and PPIs, and convert the PPI users (TWD, MCT and MSM timers) to the new *_percpu_irq interface. Also some collateral cleanup (local_timer_ack() is gone, and the interrupt handler is strictly private to each driver). PPIs are now useable for more than just the local timers. Additional testing by David Brown (msm8250 and msm8660) and Shawn Guo (imx6q). Cc: David Brown <davidb@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> commit ddd8478d68f8cf75ee9771667c0cbe2a9d1caeb9 Author: Trilok Soni <tsoni@codeaurora.org> Date: Tue Dec 6 00:56:01 2011 +0530 msm: watchdog: Use request_percpu_irq() interface Change-Id: I7c319344f6a7f7a7c70682ac87f5c385e56d130c Signed-off-by: Trilok Soni <tsoni@codeaurora.org> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> commit 0c19915e092214a4c17a9920c4c1f3d78610217d Author: Sathish Ambley <sambley@codeaurora.org> Date: Fri Dec 9 17:07:37 2011 +0530 arm: arch_timer: Use request_percpu_irq() API Change-Id: Iee9b218d538f315cd884a47d95bcc0dcc49b0fe1 Signed-off-by: Sathish Ambley <sambley@codeaurora.org> Change-Id: I7bbba706b1f2e55814be5891ed76063725c2bfb1 Signed-off-by: Ravi Kumar <kumarrav@codeaurora.org> [tsoni@codeaurora.org: MSM specific fixes] Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
104 lines
2.5 KiB
C
104 lines
2.5 KiB
C
/*
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* arch/arm/include/asm/smp.h
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*
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* Copyright (C) 2004-2005 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_SMP_H
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#define __ASM_ARM_SMP_H
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/thread_info.h>
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#ifndef CONFIG_SMP
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# error "<asm/smp.h> included in non-SMP build"
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#endif
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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struct seq_file;
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/*
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* generate IPI list text
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*/
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extern void show_ipi_list(struct seq_file *, int);
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/*
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* Called from assembly code, this handles an IPI.
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*/
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asmlinkage void do_IPI(int ipinr, struct pt_regs *regs);
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/*
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* Called from C code, this handles an IPI.
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*/
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void handle_IPI(int ipinr, struct pt_regs *regs);
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/*
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* Setup the set of possible CPUs (via set_cpu_possible)
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*/
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extern void smp_init_cpus(void);
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/*
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* Provide a function to raise an IPI cross call on CPUs in callmap.
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*/
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extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
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/*
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* Boot a secondary CPU, and assign it the specified idle task.
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* This also gives us the initial stack to use for this CPU.
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*/
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extern int boot_secondary(unsigned int cpu, struct task_struct *);
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/*
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* Called from platform specific assembly code, this is the
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* secondary CPU entry point.
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*/
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asmlinkage void secondary_start_kernel(void);
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/*
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* Perform platform specific initialisation of the specified CPU.
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*/
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extern void platform_secondary_init(unsigned int cpu);
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/*
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* Initialize cpu_possible map, and enable coherency
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*/
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extern void platform_smp_prepare_cpus(unsigned int);
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/*
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* Logical CPU mapping.
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*/
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extern int __cpu_logical_map[NR_CPUS];
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#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
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/*
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* Initial data for bringing up a secondary CPU.
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*/
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struct secondary_data {
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unsigned long pgdir;
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unsigned long swapper_pg_dir;
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void *stack;
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};
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extern struct secondary_data secondary_data;
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extern int __cpu_disable(void);
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extern int platform_cpu_disable(unsigned int cpu);
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extern void __cpu_die(unsigned int cpu);
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extern void cpu_die(void);
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extern void platform_cpu_die(unsigned int cpu);
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extern int platform_cpu_kill(unsigned int cpu);
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extern void platform_cpu_enable(unsigned int cpu);
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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extern void smp_send_all_cpu_backtrace(void);
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#endif /* ifndef __ASM_ARM_SMP_H */
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