96034c2006
- Disable Ad-hoc support for cfg80211 - dhd_linux.c: Fix incorrect pid check - Merge Android changes from Android tree Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
746 lines
20 KiB
C
746 lines
20 KiB
C
/*
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* Broadcom device-specific manifest constants.
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*
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* Copyright (C) 1999-2011, Broadcom Corporation
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2 (the "GPL"),
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* available at http://www.broadcom.com/licenses/GPLv2.php, with the
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* following added to such license:
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*
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* As a special exception, the copyright holders of this software give you
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* permission to link this software with independent modules, and to copy and
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* distribute the resulting executable under terms of your choice, provided that
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* you also meet, for each linked independent module, the terms and conditions of
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* the license of that module. An independent module is a module which is not
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* derived from this software. The special exception does not apply to any
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* modifications of the software.
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a license
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* other than the GPL, without Broadcom's express prior written consent.
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*
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* $Id: bcmdevs.h 295140 2011-11-09 17:22:01Z $
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*/
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#ifndef _BCMDEVS_H
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#define _BCMDEVS_H
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#define VENDOR_EPIGRAM 0xfeda
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#define VENDOR_BROADCOM 0x14e4
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#define VENDOR_3COM 0x10b7
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#define VENDOR_NETGEAR 0x1385
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#define VENDOR_DIAMOND 0x1092
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#define VENDOR_INTEL 0x8086
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#define VENDOR_DELL 0x1028
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#define VENDOR_HP 0x103c
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#define VENDOR_HP_COMPAQ 0x0e11
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#define VENDOR_APPLE 0x106b
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#define VENDOR_SI_IMAGE 0x1095
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#define VENDOR_BUFFALO 0x1154
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#define VENDOR_TI 0x104c
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#define VENDOR_RICOH 0x1180
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#define VENDOR_JMICRON 0x197b
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#define VENDOR_BROADCOM_PCMCIA 0x02d0
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#define VENDOR_BROADCOM_SDIO 0x00BF
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#define BCM_DNGL_VID 0x0a5c
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#define BCM_DNGL_BL_PID_4328 0xbd12
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#define BCM_DNGL_BL_PID_4322 0xbd13
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#define BCM_DNGL_BL_PID_4319 0xbd16
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#define BCM_DNGL_BL_PID_43236 0xbd17
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#define BCM_DNGL_BL_PID_4332 0xbd18
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#define BCM_DNGL_BL_PID_4330 0xbd19
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#define BCM_DNGL_BL_PID_43239 0xbd1b
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#define BCM_DNGL_BDC_PID 0x0bdc
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#define BCM_DNGL_JTAG_PID 0x4a44
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#define BCM_HWUSB_PID_43239 43239
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#define BCM4210_DEVICE_ID 0x1072
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#define BCM4230_DEVICE_ID 0x1086
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#define BCM4401_ENET_ID 0x170c
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#define BCM3352_DEVICE_ID 0x3352
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#define BCM3360_DEVICE_ID 0x3360
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#define BCM4211_DEVICE_ID 0x4211
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#define BCM4231_DEVICE_ID 0x4231
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#define BCM4303_D11B_ID 0x4303
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#define BCM4311_D11G_ID 0x4311
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#define BCM4311_D11DUAL_ID 0x4312
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#define BCM4311_D11A_ID 0x4313
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#define BCM4328_D11DUAL_ID 0x4314
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#define BCM4328_D11G_ID 0x4315
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#define BCM4328_D11A_ID 0x4316
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#define BCM4318_D11G_ID 0x4318
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#define BCM4318_D11DUAL_ID 0x4319
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#define BCM4318_D11A_ID 0x431a
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#define BCM4325_D11DUAL_ID 0x431b
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#define BCM4325_D11G_ID 0x431c
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#define BCM4325_D11A_ID 0x431d
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#define BCM4306_D11G_ID 0x4320
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#define BCM4306_D11A_ID 0x4321
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#define BCM4306_UART_ID 0x4322
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#define BCM4306_V90_ID 0x4323
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#define BCM4306_D11DUAL_ID 0x4324
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#define BCM4306_D11G_ID2 0x4325
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#define BCM4321_D11N_ID 0x4328
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#define BCM4321_D11N2G_ID 0x4329
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#define BCM4321_D11N5G_ID 0x432a
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#define BCM4322_D11N_ID 0x432b
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#define BCM4322_D11N2G_ID 0x432c
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#define BCM4322_D11N5G_ID 0x432d
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#define BCM4329_D11N_ID 0x432e
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#define BCM4329_D11N2G_ID 0x432f
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#define BCM4329_D11N5G_ID 0x4330
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#define BCM4315_D11DUAL_ID 0x4334
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#define BCM4315_D11G_ID 0x4335
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#define BCM4315_D11A_ID 0x4336
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#define BCM4319_D11N_ID 0x4337
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#define BCM4319_D11N2G_ID 0x4338
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#define BCM4319_D11N5G_ID 0x4339
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#define BCM43231_D11N2G_ID 0x4340
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#define BCM43221_D11N2G_ID 0x4341
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#define BCM43222_D11N_ID 0x4350
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#define BCM43222_D11N2G_ID 0x4351
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#define BCM43222_D11N5G_ID 0x4352
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#define BCM43224_D11N_ID 0x4353
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#define BCM43224_D11N_ID_VEN1 0x0576
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#define BCM43226_D11N_ID 0x4354
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#define BCM43236_D11N_ID 0x4346
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#define BCM43236_D11N2G_ID 0x4347
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#define BCM43236_D11N5G_ID 0x4348
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#define BCM43225_D11N2G_ID 0x4357
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#define BCM43421_D11N_ID 0xA99D
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#define BCM4313_D11N2G_ID 0x4727
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#define BCM4330_D11N_ID 0x4360
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#define BCM4330_D11N2G_ID 0x4361
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#define BCM4330_D11N5G_ID 0x4362
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#define BCM4336_D11N_ID 0x4343
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#define BCM6362_D11N_ID 0x435f
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#define BCM4331_D11N_ID 0x4331
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#define BCM4331_D11N2G_ID 0x4332
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#define BCM4331_D11N5G_ID 0x4333
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#define BCM43237_D11N_ID 0x4355
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#define BCM43237_D11N5G_ID 0x4356
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#define BCM43227_D11N2G_ID 0x4358
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#define BCM43228_D11N_ID 0x4359
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#define BCM43228_D11N5G_ID 0x435a
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#define BCM43362_D11N_ID 0x4363
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#define BCM43239_D11N_ID 0x4370
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#define BCM4324_D11N_ID 0x4374
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#define BCM43217_D11N2G_ID 0x43a9
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#define BCM43131_D11N2G_ID 0x43aa
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#define BCM4314_D11N2G_ID 0x4364
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#define BCM43142_D11N2G_ID 0x4365
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#define BCMGPRS_UART_ID 0x4333
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#define BCMGPRS2_UART_ID 0x4344
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#define FPGA_JTAGM_ID 0x43f0
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#define BCM_JTAGM_ID 0x43f1
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#define SDIOH_FPGA_ID 0x43f2
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#define BCM_SDIOH_ID 0x43f3
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#define SDIOD_FPGA_ID 0x43f4
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#define SPIH_FPGA_ID 0x43f5
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#define BCM_SPIH_ID 0x43f6
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#define MIMO_FPGA_ID 0x43f8
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#define BCM_JTAGM2_ID 0x43f9
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#define SDHCI_FPGA_ID 0x43fa
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#define BCM4402_ENET_ID 0x4402
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#define BCM4402_V90_ID 0x4403
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#define BCM4410_DEVICE_ID 0x4410
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#define BCM4412_DEVICE_ID 0x4412
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#define BCM4430_DEVICE_ID 0x4430
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#define BCM4432_DEVICE_ID 0x4432
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#define BCM4704_ENET_ID 0x4706
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#define BCM4710_DEVICE_ID 0x4710
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#define BCM47XX_AUDIO_ID 0x4711
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#define BCM47XX_V90_ID 0x4712
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#define BCM47XX_ENET_ID 0x4713
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#define BCM47XX_EXT_ID 0x4714
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#define BCM47XX_GMAC_ID 0x4715
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#define BCM47XX_USBH_ID 0x4716
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#define BCM47XX_USBD_ID 0x4717
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#define BCM47XX_IPSEC_ID 0x4718
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#define BCM47XX_ROBO_ID 0x4719
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#define BCM47XX_USB20H_ID 0x471a
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#define BCM47XX_USB20D_ID 0x471b
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#define BCM47XX_ATA100_ID 0x471d
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#define BCM47XX_SATAXOR_ID 0x471e
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#define BCM47XX_GIGETH_ID 0x471f
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#define BCM4712_MIPS_ID 0x4720
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#define BCM4716_DEVICE_ID 0x4722
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#define BCM47XX_SMBUS_EMU_ID 0x47fe
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#define BCM47XX_XOR_EMU_ID 0x47ff
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#define EPI41210_DEVICE_ID 0xa0fa
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#define EPI41230_DEVICE_ID 0xa10e
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#define JINVANI_SDIOH_ID 0x4743
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#define BCM27XX_SDIOH_ID 0x2702
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#define PCIXX21_FLASHMEDIA_ID 0x803b
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#define PCIXX21_SDIOH_ID 0x803c
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#define R5C822_SDIOH_ID 0x0822
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#define JMICRON_SDIOH_ID 0x2381
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#define BCM4306_CHIP_ID 0x4306
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#define BCM4311_CHIP_ID 0x4311
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#define BCM43111_CHIP_ID 43111
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#define BCM43112_CHIP_ID 43112
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#define BCM4312_CHIP_ID 0x4312
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#define BCM4313_CHIP_ID 0x4313
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#define BCM43131_CHIP_ID 43131
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#define BCM4315_CHIP_ID 0x4315
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#define BCM4318_CHIP_ID 0x4318
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#define BCM4319_CHIP_ID 0x4319
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#define BCM4320_CHIP_ID 0x4320
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#define BCM4321_CHIP_ID 0x4321
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#define BCM43217_CHIP_ID 43217
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#define BCM4322_CHIP_ID 0x4322
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#define BCM43221_CHIP_ID 43221
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#define BCM43222_CHIP_ID 43222
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#define BCM43224_CHIP_ID 43224
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#define BCM43225_CHIP_ID 43225
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#define BCM43227_CHIP_ID 43227
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#define BCM43228_CHIP_ID 43228
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#define BCM43226_CHIP_ID 43226
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#define BCM43231_CHIP_ID 43231
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#define BCM43234_CHIP_ID 43234
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#define BCM43235_CHIP_ID 43235
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#define BCM43236_CHIP_ID 43236
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#define BCM43237_CHIP_ID 43237
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#define BCM43238_CHIP_ID 43238
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#define BCM43239_CHIP_ID 43239
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#define BCM43420_CHIP_ID 43420
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#define BCM43421_CHIP_ID 43421
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#define BCM43428_CHIP_ID 43428
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#define BCM43431_CHIP_ID 43431
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#define BCM4325_CHIP_ID 0x4325
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#define BCM4328_CHIP_ID 0x4328
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#define BCM4329_CHIP_ID 0x4329
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#define BCM4331_CHIP_ID 0x4331
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#define BCM4336_CHIP_ID 0x4336
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#define BCM43362_CHIP_ID 43362
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#define BCM4330_CHIP_ID 0x4330
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#define BCM6362_CHIP_ID 0x6362
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#define BCM4314_CHIP_ID 0x4314
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#define BCM43142_CHIP_ID 43142
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#define BCM4324_CHIP_ID 0x4324
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#define BCM4342_CHIP_ID 4342
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#define BCM4402_CHIP_ID 0x4402
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#define BCM4704_CHIP_ID 0x4704
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#define BCM4710_CHIP_ID 0x4710
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#define BCM4712_CHIP_ID 0x4712
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#define BCM4716_CHIP_ID 0x4716
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#define BCM47162_CHIP_ID 47162
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#define BCM4748_CHIP_ID 0x4748
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#define BCM4749_CHIP_ID 0x4749
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#define BCM4785_CHIP_ID 0x4785
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#define BCM5350_CHIP_ID 0x5350
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#define BCM5352_CHIP_ID 0x5352
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#define BCM5354_CHIP_ID 0x5354
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#define BCM5365_CHIP_ID 0x5365
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#define BCM5356_CHIP_ID 0x5356
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#define BCM5357_CHIP_ID 0x5357
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#define BCM53572_CHIP_ID 53572
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#define BCM4303_PKG_ID 2
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#define BCM4309_PKG_ID 1
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#define BCM4712LARGE_PKG_ID 0
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#define BCM4712SMALL_PKG_ID 1
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#define BCM4712MID_PKG_ID 2
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#define BCM4328USBD11G_PKG_ID 2
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#define BCM4328USBDUAL_PKG_ID 3
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#define BCM4328SDIOD11G_PKG_ID 4
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#define BCM4328SDIODUAL_PKG_ID 5
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#define BCM4329_289PIN_PKG_ID 0
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#define BCM4329_182PIN_PKG_ID 1
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#define BCM5354E_PKG_ID 1
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#define BCM4716_PKG_ID 8
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#define BCM4717_PKG_ID 9
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#define BCM4718_PKG_ID 10
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#define BCM5356_PKG_NONMODE 1
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#define BCM5358U_PKG_ID 8
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#define BCM5358_PKG_ID 9
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#define BCM47186_PKG_ID 10
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#define BCM5357_PKG_ID 11
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#define BCM5356U_PKG_ID 12
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#define BCM53572_PKG_ID 8
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#define BCM47188_PKG_ID 9
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#define BCM4331TT_PKG_ID 8
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#define BCM4331TN_PKG_ID 9
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#define BCM4331TNA0_PKG_ID 0xb
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#define HDLSIM5350_PKG_ID 1
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#define HDLSIM_PKG_ID 14
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#define HWSIM_PKG_ID 15
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#define BCM43224_FAB_CSM 0x8
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#define BCM43224_FAB_SMIC 0xa
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#define BCM4336_WLBGA_PKG_ID 0x8
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#define BCM4330_WLBGA_PKG_ID 0x0
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#define BCM4314PCIE_ARM_PKG_ID (8 | 0)
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#define BCM4314SDIO_PKG_ID (8 | 1)
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#define BCM4314PCIE_PKG_ID (8 | 2)
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#define BCM4314SDIO_ARM_PKG_ID (8 | 3)
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#define BCM4314SDIO_FPBGA_PKG_ID (8 | 4)
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#define BCM4314DEV_PKG_ID (8 | 6)
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#define PCIXX21_FLASHMEDIA0_ID 0x8033
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#define PCIXX21_SDIOH0_ID 0x8034
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#define BFL_BTC2WIRE 0x00000001
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#define BFL_BTCOEX 0x00000001
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#define BFL_PACTRL 0x00000002
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#define BFL_AIRLINEMODE 0x00000004
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#define BFL_ADCDIV 0x00000008
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#define BFL_ENETROBO 0x00000010
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#define BFL_NOPLLDOWN 0x00000020
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#define BFL_CCKHIPWR 0x00000040
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#define BFL_ENETADM 0x00000080
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#define BFL_ENETVLAN 0x00000100
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#ifdef WLAFTERBURNER
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#define BFL_AFTERBURNER 0x00000200
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#endif
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#define BFL_NOPCI 0x00000400
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#define BFL_FEM 0x00000800
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#define BFL_EXTLNA 0x00001000
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#define BFL_HGPA 0x00002000
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#define BFL_BTC2WIRE_ALTGPIO 0x00004000
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#define BFL_ALTIQ 0x00008000
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#define BFL_NOPA 0x00010000
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#define BFL_RSSIINV 0x00020000
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#define BFL_PAREF 0x00040000
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#define BFL_3TSWITCH 0x00080000
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#define BFL_PHASESHIFT 0x00100000
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#define BFL_BUCKBOOST 0x00200000
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#define BFL_FEM_BT 0x00400000
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#define BFL_NOCBUCK 0x00800000
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#define BFL_CCKFAVOREVM 0x01000000
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#define BFL_PALDO 0x02000000
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#define BFL_LNLDO2_2P5 0x04000000
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#define BFL_FASTPWR 0x08000000
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#define BFL_UCPWRCTL_MININDX 0x08000000
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#define BFL_EXTLNA_5GHz 0x10000000
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#define BFL_TRSW_1by2 0x20000000
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#define BFL_LO_TRSW_R_5GHz 0x40000000
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#define BFL_ELNA_GAINDEF 0x80000000
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#define BFL_EXTLNA_TX 0x20000000
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#define BFL2_RXBB_INT_REG_DIS 0x00000001
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#define BFL2_APLL_WAR 0x00000002
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#define BFL2_TXPWRCTRL_EN 0x00000004
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#define BFL2_2X4_DIV 0x00000008
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#define BFL2_5G_PWRGAIN 0x00000010
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#define BFL2_PCIEWAR_OVR 0x00000020
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#define BFL2_CAESERS_BRD 0x00000040
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#define BFL2_BTC3WIRE 0x00000080
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#define BFL2_BTCLEGACY 0x00000080
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#define BFL2_SKWRKFEM_BRD 0x00000100
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#define BFL2_SPUR_WAR 0x00000200
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#define BFL2_GPLL_WAR 0x00000400
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#define BFL2_TRISTATE_LED 0x00000800
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#define BFL2_SINGLEANT_CCK 0x00001000
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#define BFL2_2G_SPUR_WAR 0x00002000
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#define BFL2_BPHY_ALL_TXCORES 0x00004000
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#define BFL2_FCC_BANDEDGE_WAR 0x00008000
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#define BFL2_GPLL_WAR2 0x00010000
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#define BFL2_IPALVLSHIFT_3P3 0x00020000
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#define BFL2_INTERNDET_TXIQCAL 0x00040000
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#define BFL2_XTALBUFOUTEN 0x00080000
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#define BFL2_ANAPACTRL_2G 0x00100000
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#define BFL2_ANAPACTRL_5G 0x00200000
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#define BFL2_ELNACTRL_TRSW_2G 0x00400000
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#define BFL2_BT_SHARE_ANT0 0x00800000
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#define BFL2_TEMPSENSE_HIGHER 0x01000000
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#define BFL2_BTC3WIREONLY 0x02000000
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#define BFL2_PWR_NOMINAL 0x04000000
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#define BFL2_EXTLNA_TX 0x08000000
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#define BFL2_4313_RADIOREG 0x10000000
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#define BOARD_GPIO_BTC3W_IN 0x850
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#define BOARD_GPIO_BTC3W_OUT 0x020
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#define BOARD_GPIO_BTCMOD_IN 0x010
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#define BOARD_GPIO_BTCMOD_OUT 0x020
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#define BOARD_GPIO_BTC_IN 0x080
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#define BOARD_GPIO_BTC_OUT 0x100
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#define BOARD_GPIO_PACTRL 0x200
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#define BOARD_GPIO_12 0x1000
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#define BOARD_GPIO_13 0x2000
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#define BOARD_GPIO_BTC4_IN 0x0800
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#define BOARD_GPIO_BTC4_BT 0x2000
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#define BOARD_GPIO_BTC4_STAT 0x4000
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#define BOARD_GPIO_BTC4_WLAN 0x8000
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#define BOARD_GPIO_1_WLAN_PWR 0x2
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#define BOARD_GPIO_4_WLAN_PWR 0x10
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#define GPIO_BTC4W_OUT_4312 0x010
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#define GPIO_BTC4W_OUT_43224 0x020
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#define GPIO_BTC4W_OUT_43224_SHARED 0x0e0
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#define GPIO_BTC4W_OUT_43225 0x0e0
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#define GPIO_BTC4W_OUT_43421 0x020
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#define GPIO_BTC4W_OUT_4313 0x060
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#define PCI_CFG_GPIO_SCS 0x10
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#define PCI_CFG_GPIO_HWRAD 0x20
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#define PCI_CFG_GPIO_XTAL 0x40
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#define PCI_CFG_GPIO_PLL 0x80
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#define PLL_DELAY 150
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#define FREF_DELAY 200
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#define MIN_SLOW_CLK 32
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#define XTAL_ON_DELAY 1000
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#define BU4710_BOARD 0x0400
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#define VSIM4710_BOARD 0x0401
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#define QT4710_BOARD 0x0402
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#define BU4309_BOARD 0x040a
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#define BCM94309CB_BOARD 0x040b
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#define BCM94309MP_BOARD 0x040c
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#define BCM4309AP_BOARD 0x040d
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#define BCM94302MP_BOARD 0x040e
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#define BU4306_BOARD 0x0416
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#define BCM94306CB_BOARD 0x0417
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#define BCM94306MP_BOARD 0x0418
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#define BCM94710D_BOARD 0x041a
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#define BCM94710R1_BOARD 0x041b
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#define BCM94710R4_BOARD 0x041c
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#define BCM94710AP_BOARD 0x041d
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#define BU2050_BOARD 0x041f
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#define BCM94306P50_BOARD 0x0420
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#define BCM94309G_BOARD 0x0421
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#define BU4704_BOARD 0x0423
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#define BU4702_BOARD 0x0424
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#define BCM94306PC_BOARD 0x0425
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#define MPSG4306_BOARD 0x0427
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#define BCM94702MN_BOARD 0x0428
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#define BCM94702CPCI_BOARD 0x0429
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#define BCM95380RR_BOARD 0x042a
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#define BCM94306CBSG_BOARD 0x042b
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#define PCSG94306_BOARD 0x042d
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#define BU4704SD_BOARD 0x042e
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#define BCM94704AGR_BOARD 0x042f
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#define BCM94308MP_BOARD 0x0430
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#define BCM94306GPRS_BOARD 0x0432
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#define BU5365_FPGA_BOARD 0x0433
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#define BU4712_BOARD 0x0444
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#define BU4712SD_BOARD 0x045d
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#define BU4712L_BOARD 0x045f
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#define BCM94712AP_BOARD 0x0445
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#define BCM94712P_BOARD 0x0446
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#define BU4318_BOARD 0x0447
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#define CB4318_BOARD 0x0448
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#define MPG4318_BOARD 0x0449
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#define MP4318_BOARD 0x044a
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#define SD4318_BOARD 0x044b
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#define BCM94313BU_BOARD 0x050f
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#define BCM94313HM_BOARD 0x0510
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#define BCM94313EPA_BOARD 0x0511
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#define BCM94313HMG_BOARD 0x051C
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#define BCM96338_BOARD 0x6338
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#define BCM96348_BOARD 0x6348
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#define BCM96358_BOARD 0x6358
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#define BCM96368_BOARD 0x6368
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#define BCM94306P_BOARD 0x044c
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#define BCM94303MP_BOARD 0x044e
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#define BCM94306MPSGH_BOARD 0x044f
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#define BCM94306MPM 0x0450
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#define BCM94306MPL 0x0453
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#define BCM94712AGR_BOARD 0x0451
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#define PC4303_BOARD 0x0454
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#define BCM95350K_BOARD 0x0455
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#define BCM95350R_BOARD 0x0456
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#define BCM94306MPLNA_BOARD 0x0457
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#define BU4320_BOARD 0x0458
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#define BU4320S_BOARD 0x0459
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#define BCM94320PH_BOARD 0x045a
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#define BCM94306MPH_BOARD 0x045b
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#define BCM94306PCIV_BOARD 0x045c
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#define BU4712SD_BOARD 0x045d
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#define BCM94320PFLSH_BOARD 0x045e
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#define BU4712L_BOARD 0x045f
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#define BCM94712LGR_BOARD 0x0460
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#define BCM94320R_BOARD 0x0461
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#define BU5352_BOARD 0x0462
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#define BCM94318MPGH_BOARD 0x0463
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#define BU4311_BOARD 0x0464
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#define BCM94311MC_BOARD 0x0465
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#define BCM94311MCAG_BOARD 0x0466
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#define BCM95352GR_BOARD 0x0467
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#define BCM95351AGR_BOARD 0x0470
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#define BCM94704MPCB_BOARD 0x0472
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#define BU4785_BOARD 0x0478
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#define BU4321_BOARD 0x046b
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#define BU4321E_BOARD 0x047c
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#define MP4321_BOARD 0x046c
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#define CB2_4321_BOARD 0x046d
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#define CB2_4321_AG_BOARD 0x0066
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#define MC4321_BOARD 0x046e
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#define BU4328_BOARD 0x0481
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#define BCM4328SDG_BOARD 0x0482
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#define BCM4328SDAG_BOARD 0x0483
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#define BCM4328UG_BOARD 0x0484
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#define BCM4328UAG_BOARD 0x0485
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#define BCM4328PC_BOARD 0x0486
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#define BCM4328CF_BOARD 0x0487
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#define BCM94325DEVBU_BOARD 0x0490
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#define BCM94325BGABU_BOARD 0x0491
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#define BCM94325SDGWB_BOARD 0x0492
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#define BCM94325SDGMDL_BOARD 0x04aa
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#define BCM94325SDGMDL2_BOARD 0x04c6
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#define BCM94325SDGMDL3_BOARD 0x04c9
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#define BCM94325SDABGWBA_BOARD 0x04e1
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#define BCM94322MC_SSID 0x04a4
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#define BCM94322USB_SSID 0x04a8
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#define BCM94322HM_SSID 0x04b0
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#define BCM94322USB2D_SSID 0x04bf
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#define BCM4312MCGSG_BOARD 0x04b5
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#define BCM94315DEVBU_SSID 0x04c2
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#define BCM94315USBGP_SSID 0x04c7
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#define BCM94315BGABU_SSID 0x04ca
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#define BCM94315USBGP41_SSID 0x04cb
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#define BCM94319DEVBU_SSID 0X04e5
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#define BCM94319USB_SSID 0X04e6
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#define BCM94319SD_SSID 0X04e7
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#define BCM94716NR2_SSID 0x04cd
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#define BCM94319DEVBU_SSID 0X04e5
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#define BCM94319USBNP4L_SSID 0X04e6
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#define BCM94319WLUSBN4L_SSID 0X04e7
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#define BCM94319SDG_SSID 0X04ea
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#define BCM94319LCUSBSDN4L_SSID 0X04eb
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#define BCM94319USBB_SSID 0x04ee
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#define BCM94319LCSDN4L_SSID 0X0507
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#define BCM94319LSUSBN4L_SSID 0X0508
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#define BCM94319SDNA4L_SSID 0X0517
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#define BCM94319SDELNA4L_SSID 0X0518
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#define BCM94319SDELNA6L_SSID 0X0539
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#define BCM94319ARCADYAN_SSID 0X0546
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#define BCM94319WINDSOR_SSID 0x0561
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#define BCM94319MLAP_SSID 0x0562
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#define BCM94319SDNA_SSID 0x058b
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#define BCM94319BHEMU3_SSID 0x0563
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#define BCM94319SDHMB_SSID 0x058c
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#define BCM94319SDBREF_SSID 0x05a1
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#define BCM94319USBSDB_SSID 0x05a2
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#define BCM94329AGB_SSID 0X04b9
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#define BCM94329TDKMDL1_SSID 0X04ba
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#define BCM94329TDKMDL11_SSID 0X04fc
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#define BCM94329OLYMPICN18_SSID 0X04fd
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#define BCM94329OLYMPICN90_SSID 0X04fe
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#define BCM94329OLYMPICN90U_SSID 0X050c
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#define BCM94329OLYMPICN90M_SSID 0X050b
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#define BCM94329AGBF_SSID 0X04ff
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#define BCM94329OLYMPICX17_SSID 0X0504
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#define BCM94329OLYMPICX17M_SSID 0X050a
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#define BCM94329OLYMPICX17U_SSID 0X0509
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#define BCM94329OLYMPICUNO_SSID 0X0564
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#define BCM94329MOTOROLA_SSID 0X0565
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#define BCM94329OLYMPICLOCO_SSID 0X0568
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#define BCM94336SD_WLBGABU_SSID 0x0511
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#define BCM94336SD_WLBGAREF_SSID 0x0519
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#define BCM94336SDGP_SSID 0x0538
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#define BCM94336SDG_SSID 0x0519
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#define BCM94336SDGN_SSID 0x0538
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#define BCM94336SDGFC_SSID 0x056B
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#define BCM94330SDG_SSID 0x0528
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#define BCM94330SD_FCBGABU_SSID 0x052e
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#define BCM94330SD_WLBGABU_SSID 0x052f
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#define BCM94330SD_FCBGA_SSID 0x0530
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#define BCM94330FCSDAGB_SSID 0x0532
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#define BCM94330OLYMPICAMG_SSID 0x0549
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#define BCM94330OLYMPICAMGEPA_SSID 0x054F
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#define BCM94330OLYMPICUNO3_SSID 0x0551
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#define BCM94330WLSDAGB_SSID 0x0547
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#define BCM94330CSPSDAGBB_SSID 0x054A
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#define BCM943224X21 0x056e
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#define BCM943224X21_FCC 0x00d1
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#define BCM943228BU8_SSID 0x0540
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#define BCM943228BU9_SSID 0x0541
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#define BCM943228BU_SSID 0x0542
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#define BCM943227HM4L_SSID 0x0543
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#define BCM943227HMB_SSID 0x0544
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#define BCM943228HM4L_SSID 0x0545
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#define BCM943228SD_SSID 0x0573
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#define BCM943239MOD_SSID 0x05ac
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#define BCM943239REF_SSID 0x05aa
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#define BCM94331X19 0x00D6
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#define BCM94331PCIEBT3Ax_SSID 0x00E4
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#define BCM94331X12_2G_SSID 0x00EC
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#define BCM94331X12_5G_SSID 0x00ED
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#define BCM94331X29B 0x00EF
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#define BCM94331BU_SSID 0x0523
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#define BCM94331S9BU_SSID 0x0524
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#define BCM94331MC_SSID 0x0525
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#define BCM94331MCI_SSID 0x0526
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#define BCM94331PCIEBT4_SSID 0x0527
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#define BCM94331HM_SSID 0x0574
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#define BCM94331PCIEDUAL_SSID 0x059B
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#define BCM94331MCH5_SSID 0x05A9
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#define BCM94331PCIEDUALV2_SSID 0x05B7
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#define BCM94331CS_SSID 0x05C6
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#define BCM94331CSAX_SSID 0x00EF
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#define BCM953572BU_SSID 0x058D
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#define BCM953572NR2_SSID 0x058E
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#define BCM947188NR2_SSID 0x058F
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#define BCM953572SDRNR2_SSID 0x0590
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#define BCM943236OLYMPICSULLEY_SSID 0x594
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#define BCM943236PREPROTOBLU2O3_SSID 0x5b9
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#define BCM943236USBELNA_SSID 0x5f8
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#define GPIO_NUMPINS 32
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#define RDL_RAM_BASE_4319 0x60000000
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#define RDL_RAM_BASE_4329 0x60000000
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#define RDL_RAM_SIZE_4319 0x48000
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#define RDL_RAM_SIZE_4329 0x48000
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#define RDL_RAM_SIZE_43236 0x70000
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#define RDL_RAM_BASE_43236 0x60000000
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#define RDL_RAM_SIZE_4328 0x60000
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#define RDL_RAM_BASE_4328 0x80000000
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#define RDL_RAM_SIZE_4322 0x60000
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#define RDL_RAM_BASE_4322 0x60000000
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#define MUXENAB_UART 0x00000001
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#define MUXENAB_GPIO 0x00000002
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#define MUXENAB_ERCX 0x00000004
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#define MUXENAB_JTAG 0x00000008
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#define MUXENAB_HOST_WAKE 0x00000010
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#endif
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