89bdafd138
Convert the SMP msm platforms to be using the gic_handle_irq function as their primary interrupt handler. Change-Id: Ibf131d3713b2b6fb20e4edd902a8d02be7ffbfc1 Tested-by: David Brown <davidb@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> [tsoni@codeaurora.org: MSM specific merge fixes] Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
37 lines
1.1 KiB
ArmAsm
37 lines
1.1 KiB
ArmAsm
/*
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* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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.macro disable_fiq
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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#if !defined(CONFIG_ARM_GIC) && !defined(CONFIG_MULTI_IRQ_HANDLER)
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#include <mach/msm_iomap.h>
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.macro get_irqnr_preamble, base, tmp
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@ enable imprecise aborts
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cpsie a
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mov \base, #MSM_VIC_BASE
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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@ 0xD0 has irq# or old irq# if the irq has been handled
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@ 0xD4 has irq# or -1 if none pending *but* if you just
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@ read 0xD4 you never get the first irq for some reason
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ldr \irqnr, [\base, #0xD0]
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ldr \irqnr, [\base, #0xD4]
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cmp \irqnr, #0xffffffff
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.endm
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#endif
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