30ad10bf5b
This reverts commit 7dd2266ae3.
It was a mistake to move the usb driver to the clock apis for XO
buffer voting. Due to an RPM design CXO and D0 are the same but
we would like to hide that from the users of the buffers.
Therefore the msm_xo driver itself remaps the D0 buffer request
to the cxo clock until the RPM is fixed.
Change-Id: I230de55d30a49fa5bcf0d07f40453f1e09c4a9b1
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
363 lines
11 KiB
C
363 lines
11 KiB
C
/* linux/include/asm-arm/arch-msm/hsusb.h
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*
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* Copyright (C) 2008 Google, Inc.
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* Author: Brian Swetland <swetland@google.com>
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* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ASM_ARCH_MSM_HSUSB_H
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#define __ASM_ARCH_MSM_HSUSB_H
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#include <linux/types.h>
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#include <linux/usb/otg.h>
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#include <linux/wakelock.h>
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#include <linux/pm_qos_params.h>
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/**
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* Supported USB modes
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*
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* USB_PERIPHERAL Only peripheral mode is supported.
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* USB_HOST Only host mode is supported.
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* USB_OTG OTG mode is supported.
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*
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*/
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enum usb_mode_type {
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USB_NONE = 0,
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USB_PERIPHERAL,
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USB_HOST,
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USB_OTG,
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};
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/**
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* OTG control
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*
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* OTG_NO_CONTROL Id/VBUS notifications not required. Useful in host
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* only configuration.
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* OTG_PHY_CONTROL Id/VBUS notifications comes form USB PHY.
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* OTG_PMIC_CONTROL Id/VBUS notifications comes from PMIC hardware.
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* OTG_USER_CONTROL Id/VBUS notifcations comes from User via sysfs.
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*
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*/
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enum otg_control_type {
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OTG_NO_CONTROL = 0,
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OTG_PHY_CONTROL,
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OTG_PMIC_CONTROL,
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OTG_USER_CONTROL,
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};
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/**
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* PHY used in
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*
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* INVALID_PHY Unsupported PHY
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* CI_45NM_INTEGRATED_PHY Chipidea 45nm integrated PHY
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* SNPS_28NM_INTEGRATED_PHY Synopsis 28nm integrated PHY
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*
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*/
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enum msm_usb_phy_type {
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INVALID_PHY = 0,
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CI_45NM_INTEGRATED_PHY,
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SNPS_28NM_INTEGRATED_PHY,
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};
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#define IDEV_CHG_MAX 1500
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#define IDEV_CHG_MIN 500
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#define IUNIT 100
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#define IDEV_ACA_CHG_MAX 1500
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#define IDEV_ACA_CHG_LIMIT 500
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/**
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* Different states involved in USB charger detection.
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*
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* USB_CHG_STATE_UNDEFINED USB charger is not connected or detection
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* process is not yet started.
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* USB_CHG_STATE_WAIT_FOR_DCD Waiting for Data pins contact.
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* USB_CHG_STATE_DCD_DONE Data pin contact is detected.
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* USB_CHG_STATE_PRIMARY_DONE Primary detection is completed (Detects
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* between SDP and DCP/CDP).
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* USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects
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* between DCP and CDP).
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* USB_CHG_STATE_DETECTED USB charger type is determined.
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*
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*/
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enum usb_chg_state {
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USB_CHG_STATE_UNDEFINED = 0,
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USB_CHG_STATE_WAIT_FOR_DCD,
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USB_CHG_STATE_DCD_DONE,
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USB_CHG_STATE_PRIMARY_DONE,
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USB_CHG_STATE_SECONDARY_DONE,
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USB_CHG_STATE_DETECTED,
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};
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/**
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* USB charger types
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*
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* USB_INVALID_CHARGER Invalid USB charger.
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* USB_SDP_CHARGER Standard downstream port. Refers to a downstream port
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* on USB2.0 compliant host/hub.
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* USB_DCP_CHARGER Dedicated charger port (AC charger/ Wall charger).
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* USB_CDP_CHARGER Charging downstream port. Enumeration can happen and
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* IDEV_CHG_MAX can be drawn irrespective of USB state.
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* USB_ACA_A_CHARGER B-device is connected on accessory port with charger
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* connected on charging port. This configuration allows
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* charging in host mode.
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* USB_ACA_B_CHARGER No device (or A-device without VBUS) is connected on
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* accessory port with charger connected on charging port.
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* USB_ACA_C_CHARGER A-device (with VBUS) is connected on
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* accessory port with charger connected on charging port.
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* USB_ACA_DOCK_CHARGER A docking station that has one upstream port and one
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* or more downstream ports. Capable of supplying
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* IDEV_CHG_MAX irrespective of devices connected on
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* accessory ports.
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*/
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enum usb_chg_type {
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USB_INVALID_CHARGER = 0,
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USB_SDP_CHARGER,
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USB_DCP_CHARGER,
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USB_CDP_CHARGER,
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USB_ACA_A_CHARGER,
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USB_ACA_B_CHARGER,
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USB_ACA_C_CHARGER,
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USB_ACA_DOCK_CHARGER,
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};
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/**
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* SPS Pipes direction.
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*
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* USB_TO_PEER_PERIPHERAL USB (as Producer) to other
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* peer peripheral.
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* PEER_PERIPHERAL_TO_USB Other Peripheral to
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* USB (as consumer).
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*/
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enum usb_bam_pipe_dir {
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USB_TO_PEER_PERIPHERAL,
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PEER_PERIPHERAL_TO_USB,
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};
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/**
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* struct msm_otg_platform_data - platform device data
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* for msm_otg driver.
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* @phy_init_seq: PHY configuration sequence. val, reg pairs
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* terminated by -1.
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* @vbus_power: VBUS power on/off routine.It should return result
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* as success(zero value) or failure(non-zero value).
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* @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
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* @mode: Supported mode (OTG/peripheral/host).
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* @otg_control: OTG switch controlled by user/Id pin
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* @default_mode: Default operational mode. Applicable only if
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* OTG switch is controller by user.
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* @pmic_id_irq: IRQ number assigned for PMIC USB ID line.
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* @mhl_enable: indicates MHL connector or not.
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* @disable_reset_on_disconnect: perform USB PHY and LINK reset
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* on USB cable disconnection.
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* @swfi_latency: miminum latency to allow swfi.
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* @enable_dcd: Enable Data Contact Detection circuit. if not set
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* wait for 600msec before proceeding to primary
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* detection.
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* @bus_scale_table: parameters for bus bandwidth requirements
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*/
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struct msm_otg_platform_data {
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int *phy_init_seq;
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int (*vbus_power)(bool on);
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unsigned power_budget;
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enum usb_mode_type mode;
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enum otg_control_type otg_control;
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enum usb_mode_type default_mode;
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enum msm_usb_phy_type phy_type;
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void (*setup_gpio)(enum usb_otg_state state);
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int pmic_id_irq;
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bool mhl_enable;
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bool disable_reset_on_disconnect;
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u32 swfi_latency;
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bool enable_dcd;
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struct msm_bus_scale_pdata *bus_scale_table;
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};
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/* Timeout (in msec) values (min - max) associated with OTG timers */
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#define TA_WAIT_VRISE 100 /* ( - 100) */
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#define TA_WAIT_VFALL 500 /* ( - 1000) */
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/*
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* This option is set for embedded hosts or OTG devices in which leakage
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* currents are very minimal.
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*/
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#ifdef CONFIG_USB_OTG
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#define TA_WAIT_BCON 30000 /* (1100 - 30000) */
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#else
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#define TA_WAIT_BCON -1
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#endif
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#define TA_AIDL_BDIS 500 /* (200 - ) */
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#define TA_BIDL_ADIS 155 /* (155 - 200) */
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#define TB_SRP_FAIL 6000 /* (5000 - 6000) */
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#define TB_ASE0_BRST 200 /* (155 - ) */
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/* TB_SSEND_SRP and TB_SE0_SRP are combined */
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#define TB_SRP_INIT 2000 /* (1500 - ) */
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#define TA_TST_MAINT 10100 /* (9900 - 10100) */
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#define TB_TST_SRP 3000 /* ( - 5000) */
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#define TB_TST_CONFIG 300
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/* Timeout variables */
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#define A_WAIT_VRISE 0
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#define A_WAIT_VFALL 1
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#define A_WAIT_BCON 2
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#define A_AIDL_BDIS 3
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#define A_BIDL_ADIS 4
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#define B_SRP_FAIL 5
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#define B_ASE0_BRST 6
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#define A_TST_MAINT 7
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#define B_TST_SRP 8
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#define B_TST_CONFIG 9
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/**
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* struct msm_otg: OTG driver data. Shared by HCD and DCD.
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* @otg: USB OTG Transceiver structure.
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* @pdata: otg device platform data.
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* @irq: IRQ number assigned for HSUSB controller.
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* @clk: clock struct of alt_core_clk.
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* @pclk: clock struct of iface_clk.
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* @phy_reset_clk: clock struct of phy_clk.
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* @core_clk: clock struct of core_bus_clk.
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* @regs: ioremapped register base address.
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* @inputs: OTG state machine inputs(Id, SessValid etc).
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* @sm_work: OTG state machine work.
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* @in_lpm: indicates low power mode (LPM) state.
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* @async_int: Async interrupt arrived.
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* @cur_power: The amount of mA available from downstream port.
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* @chg_work: Charger detection work.
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* @chg_state: The state of charger detection process.
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* @chg_type: The type of charger attached.
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* @dcd_retires: The retry count used to track Data contact
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* detection process.
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* @wlock: Wake lock struct to prevent system suspend when
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* USB is active.
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* @usbdev_nb: The notifier block used to know about the B-device
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* connected. Useful only when ACA_A charger is
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* connected.
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* @mA_port: The amount of current drawn by the attached B-device.
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* @pm_qos_req_dma: miminum DMA latency to vote against idle power
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collapse when cable is connected.
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* @id_timer: The timer used for polling ID line to detect ACA states.
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* @xo_handle: TCXO buffer handle
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* @bus_perf_client: Bus performance client handle to request BUS bandwidth
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*/
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struct msm_otg {
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struct otg_transceiver otg;
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struct msm_otg_platform_data *pdata;
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int irq;
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struct clk *clk;
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struct clk *pclk;
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struct clk *phy_reset_clk;
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struct clk *core_clk;
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void __iomem *regs;
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#define ID 0
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#define B_SESS_VLD 1
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#define ID_A 2
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#define ID_B 3
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#define ID_C 4
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#define A_BUS_DROP 5
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#define A_BUS_REQ 6
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#define A_SRP_DET 7
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#define A_VBUS_VLD 8
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#define B_CONN 9
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#define ADP_CHANGE 10
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#define POWER_UP 11
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#define A_CLR_ERR 12
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#define A_BUS_RESUME 13
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#define A_BUS_SUSPEND 14
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#define A_CONN 15
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#define B_BUS_REQ 16
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unsigned long inputs;
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struct work_struct sm_work;
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atomic_t in_lpm;
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int async_int;
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unsigned cur_power;
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struct delayed_work chg_work;
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enum usb_chg_state chg_state;
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enum usb_chg_type chg_type;
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u8 dcd_retries;
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struct wake_lock wlock;
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struct notifier_block usbdev_nb;
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unsigned mA_port;
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struct timer_list id_timer;
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unsigned long caps;
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struct msm_xo_voter *xo_handle;
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uint32_t bus_perf_client;
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/*
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* Allowing PHY power collpase turns off the HSUSB 3.3v and 1.8v
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* analog regulators while going to low power mode.
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* Currently only 8960(28nm PHY) has the support to allowing PHY
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* power collapse since it doesn't have leakage currents while
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* turning off the power rails.
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*/
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#define ALLOW_PHY_POWER_COLLAPSE BIT(0)
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/*
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* Allow PHY RETENTION mode before turning off the digital
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* voltage regulator(VDDCX).
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*/
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#define ALLOW_PHY_RETENTION BIT(1)
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/*
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* Disable the OTG comparators to save more power
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* if depends on PMIC for VBUS and ID interrupts.
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*/
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#define ALLOW_PHY_COMP_DISABLE BIT(2)
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unsigned long lpm_flags;
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#define PHY_PWR_COLLAPSED BIT(0)
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#define PHY_RETENTIONED BIT(1)
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#define PHY_OTG_COMP_DISABLED BIT(2)
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struct pm_qos_request_list pm_qos_req_dma;
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int reset_counter;
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unsigned long b_last_se0_sess;
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unsigned long tmouts;
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u8 active_tmout;
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struct hrtimer timer;
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};
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struct msm_hsic_host_platform_data {
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unsigned strobe;
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unsigned data;
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unsigned hub_reset;
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};
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struct msm_usb_host_platform_data {
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unsigned int power_budget;
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unsigned int dock_connect_irq;
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};
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struct usb_bam_pipe_connect {
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u32 src_phy_addr;
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int src_pipe_index;
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u32 dst_phy_addr;
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int dst_pipe_index;
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u32 data_fifo_base_offset;
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u32 data_fifo_size;
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u32 desc_fifo_base_offset;
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u32 desc_fifo_size;
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};
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struct msm_usb_bam_platform_data {
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struct usb_bam_pipe_connect *connections;
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int usb_active_bam;
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int usb_bam_num_pipes;
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};
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enum usb_bam {
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HSUSB_BAM = 0,
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HSIC_BAM,
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};
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#endif
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