From d2b854419501d2e069c176eff058d41530f27a52 Mon Sep 17 00:00:00 2001 From: Angell Fear Date: Sat, 16 Oct 2010 00:02:07 +0600 Subject: [PATCH] fb fix, ts fix, flash ttfs experemental --- Start_WM/test6.ncb | Bin 0 -> 9333760 bytes Start_WM/test6.sln | 30 + Start_WM/test6.suo | Bin 0 -> 29696 bytes Start_WM/test6/inc/GF.h | 43 + Start_WM/test6/inc/GF3D.h | 39 + Start_WM/test6/inc/GFAudio.h | 168 + Start_WM/test6/inc/GFBDev.h | 189 + Start_WM/test6/inc/GFBitmap.h | 45 + Start_WM/test6/inc/GFCamera.h | 367 + Start_WM/test6/inc/GFCameraScr.h | 40 + Start_WM/test6/inc/GFDef.h | 254 + Start_WM/test6/inc/GFDefScr.h | 81 + Start_WM/test6/inc/GFDiag.h | 442 + Start_WM/test6/inc/GFDispCmdData.h | 1740 ++++ Start_WM/test6/inc/GFDx.h | 1847 ++++ Start_WM/test6/inc/GFEPP.h | 89 + Start_WM/test6/inc/GFFDev.h | 321 + Start_WM/test6/inc/GFGx.h | 1927 ++++ Start_WM/test6/inc/GFGxError.h | 46 + Start_WM/test6/inc/GFI2C.h | 314 + Start_WM/test6/inc/GFI2S.h | 49 + Start_WM/test6/inc/GFINTx.h | 114 + Start_WM/test6/inc/GFIsp.h | 1654 +++ Start_WM/test6/inc/GFIspError.h | 37 + Start_WM/test6/inc/GFJxDec.h | 508 + Start_WM/test6/inc/GFJxEnc.h | 1306 +++ Start_WM/test6/inc/GFMinimalIsp.h | 29 + Start_WM/test6/inc/GFMmProc.h | 1766 ++++ Start_WM/test6/inc/GFMxDec.h | 727 ++ Start_WM/test6/inc/GFMxDecH264.h | 1536 +++ Start_WM/test6/inc/GFMxDecRV9.h | 853 ++ Start_WM/test6/inc/GFMxDecVC1.h | 732 ++ Start_WM/test6/inc/GFMxDemTS.h | 725 ++ Start_WM/test6/inc/GFMxEnc.h | 795 ++ Start_WM/test6/inc/GFMxEncH264.h | 788 ++ Start_WM/test6/inc/GFOSx.h | 39 + Start_WM/test6/inc/GFOption.h | 140 + Start_WM/test6/inc/GFRm.h | 2039 ++++ Start_WM/test6/inc/GFRmError.h | 68 + Start_WM/test6/inc/GFRmHelp.h | 515 + Start_WM/test6/inc/GFRmHelp.inl | 626 ++ Start_WM/test6/inc/GFRmIx.h | 654 ++ Start_WM/test6/inc/GFRmOEM.h | 551 + Start_WM/test6/inc/GFRmRDMA.h | 411 + Start_WM/test6/inc/GFRmScr.h | 59 + Start_WM/test6/inc/GFTrace.h | 304 + Start_WM/test6/inc/GFTypes.h | 65 + Start_WM/test6/inc/GFVersion.h | 24 + Start_WM/test6/inc/GFVx.h | 3028 ++++++ Start_WM/test6/inc/GFVxError.h | 42 + Start_WM/test6/inc/GFVxScr.h | 311 + Start_WM/test6/inc/cpuopsys.h | 309 + Start_WM/test6/inc/gfrm_clock_ids.h | 22 + Start_WM/test6/inc/gfrm_module_ids.h | 56 + Start_WM/test6/inc/nvboard.h | 619 ++ Start_WM/test6/inc/nvcommon.h | 153 + Start_WM/test6/inc/nverror.h | 50 + Start_WM/test6/inc/nverrval.h | 277 + Start_WM/test6/inc/nvime.h | 849 ++ Start_WM/test6/inc/nvirq.h | 144 + Start_WM/test6/inc/nvtypes.h | 258 + Start_WM/test6/inc/vssver2.scc | Bin 0 -> 1261 bytes Start_WM/test6/lib/Release/libgfsdk.lib | Bin 0 -> 95704 bytes Start_WM/test6/stdafx.cpp | 8 + Start_WM/test6/stdafx.h | 56 + Start_WM/test6/test6.cpp | 127 + Start_WM/test6/test6.vcproj | 453 + kernel-2.6.33/.config | 26 +- kernel-2.6.33/arch/arm/configs/g900_defconfig | 130 +- kernel-2.6.33/arch/arm/mach-pxa/g900/Kconfig | 13 + kernel-2.6.33/arch/arm/mach-pxa/g900/Makefile | 4 +- kernel-2.6.33/arch/arm/mach-pxa/g900/docg3.c | 356 + kernel-2.6.33/arch/arm/mach-pxa/g900/g900.c | 47 +- .../arch/arm/mach-pxa/g900/g900_core.c | 159 + .../arch/arm/mach-pxa/g900/g900_flash.c | 363 + .../arch/arm/mach-pxa/g900/g900_pm.c | 77 + .../arch/arm/mach-pxa/g900/g900_udc.c | 260 + .../arch/arm/mach-pxa/g900/gf5500/inc/GF.h | 43 + .../arch/arm/mach-pxa/g900/gf5500/inc/GF3D.h | 39 + .../arm/mach-pxa/g900/gf5500/inc/GFAudio.h | 168 + .../arm/mach-pxa/g900/gf5500/inc/GFBDev.h | 189 + .../arm/mach-pxa/g900/gf5500/inc/GFBitmap.h | 45 + .../arm/mach-pxa/g900/gf5500/inc/GFCamera.h | 367 + .../mach-pxa/g900/gf5500/inc/GFCameraScr.h | 40 + .../arch/arm/mach-pxa/g900/gf5500/inc/GFDef.h | 254 + .../arm/mach-pxa/g900/gf5500/inc/GFDefScr.h | 81 + .../arm/mach-pxa/g900/gf5500/inc/GFDiag.h | 442 + .../mach-pxa/g900/gf5500/inc/GFDispCmdData.h | 1740 ++++ .../arch/arm/mach-pxa/g900/gf5500/inc/GFDx.h | 1847 ++++ .../arch/arm/mach-pxa/g900/gf5500/inc/GFEPP.h | 89 + .../arm/mach-pxa/g900/gf5500/inc/GFFDev.h | 321 + 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.../arch/arm/mach-pxa/g900/gf5500/inc/GFOSx.h | 39 + .../arm/mach-pxa/g900/gf5500/inc/GFOption.h | 140 + .../arch/arm/mach-pxa/g900/gf5500/inc/GFRm.h | 2039 ++++ .../arm/mach-pxa/g900/gf5500/inc/GFRmError.h | 68 + .../arm/mach-pxa/g900/gf5500/inc/GFRmHelp.h | 515 + .../arm/mach-pxa/g900/gf5500/inc/GFRmHelp.inl | 626 ++ .../arm/mach-pxa/g900/gf5500/inc/GFRmIx.h | 654 ++ .../arm/mach-pxa/g900/gf5500/inc/GFRmOEM.h | 551 + .../arm/mach-pxa/g900/gf5500/inc/GFRmRDMA.h | 411 + .../arm/mach-pxa/g900/gf5500/inc/GFRmScr.h | 59 + .../arm/mach-pxa/g900/gf5500/inc/GFTrace.h | 304 + .../arm/mach-pxa/g900/gf5500/inc/GFTypes.h | 65 + .../arm/mach-pxa/g900/gf5500/inc/GFVersion.h | 24 + .../arch/arm/mach-pxa/g900/gf5500/inc/GFVx.h | 3028 ++++++ .../arm/mach-pxa/g900/gf5500/inc/GFVxError.h | 42 + .../arm/mach-pxa/g900/gf5500/inc/GFVxScr.h | 311 + .../arm/mach-pxa/g900/gf5500/inc/cpuopsys.h | 309 + .../mach-pxa/g900/gf5500/inc/gfrm_clock_ids.h | 22 + .../g900/gf5500/inc/gfrm_module_ids.h | 56 + .../arm/mach-pxa/g900/gf5500/inc/nvboard.h | 619 ++ .../arm/mach-pxa/g900/gf5500/inc/nvcommon.h | 153 + .../arm/mach-pxa/g900/gf5500/inc/nverror.h | 50 + .../arm/mach-pxa/g900/gf5500/inc/nverrval.h | 277 + .../arch/arm/mach-pxa/g900/gf5500/inc/nvime.h | 849 ++ .../arch/arm/mach-pxa/g900/gf5500/inc/nvirq.h | 144 + .../arm/mach-pxa/g900/gf5500/inc/nvtypes.h | 258 + .../arm/mach-pxa/g900/gf5500/inc/vssver2.scc | Bin 0 -> 1261 bytes ...re Developer Kit (SDK) Developer Guide.doc | Bin 0 -> 1500160 bytes ...s Developer Guide (Master with Hidden).doc | Bin 0 -> 364544 bytes .../arch/arm/mach-pxa/g900/ttfs/LICENSE.TXT | 412 + .../arch/arm/mach-pxa/g900/ttfs/Makefile | 31 + .../arch/arm/mach-pxa/g900/ttfs/Makefile-m | 31 + .../arm/mach-pxa/g900/ttfs/Makefile-omap2420 | 137 + .../arm/mach-pxa/g900/ttfs/Makefile-pxa27x | 177 + .../arch/arm/mach-pxa/g900/ttfs/Makefile-y | 31 + .../arch/arm/mach-pxa/g900/ttfs/README.TXT | 1109 ++ .../arch/arm/mach-pxa/g900/ttfs/VERSIONS.TXT | 215 + .../arch/arm/mach-pxa/g900/ttfs/_common.h | 124 + .../arch/arm/mach-pxa/g900/ttfs/_dochapi.h | 2621 +++++ .../arch/arm/mach-pxa/g900/ttfs/_docsys.h | 205 + .../arch/arm/mach-pxa/g900/ttfs/_fltl.h | 172 + .../arch/arm/mach-pxa/g900/ttfs/_tffsioct.h | 79 + .../arch/arm/mach-pxa/g900/ttfs/bddefs.h | 108 + .../arch/arm/mach-pxa/g900/ttfs/bdkemul.h | 135 + .../arch/arm/mach-pxa/g900/ttfs/blockdev.h | 1439 +++ .../arch/arm/mach-pxa/g900/ttfs/defs.c | 341 + .../arch/arm/mach-pxa/g900/ttfs/defs.h | 238 + .../arch/arm/mach-pxa/g900/ttfs/docbdk.h | 550 + .../arch/arm/mach-pxa/g900/ttfs/docdrv.c | 452 + .../mach-pxa/g900/ttfs/doch-firmware/Makefile | 72 + .../g900/ttfs/doch-firmware/doch-firmware.c | 206 + .../arch/arm/mach-pxa/g900/ttfs/doch_api.c | 9149 +++++++++++++++++ .../arch/arm/mach-pxa/g900/ttfs/doch_api.h | 130 + .../arch/arm/mach-pxa/g900/ttfs/doch_ata.c | 3599 +++++++ .../arch/arm/mach-pxa/g900/ttfs/doch_ata.h | 731 ++ .../arch/arm/mach-pxa/g900/ttfs/doch_func.h | 171 + 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.../arch/arm/mach-pxa/g900/ttfs/tffs_api.c | 5359 ++++++++++ .../arch/arm/mach-pxa/g900/ttfs/tffs_api.h | 224 + .../arch/arm/mach-pxa/g900/ttfs/tffsarch.c | 2101 ++++ .../arch/arm/mach-pxa/g900/ttfs/tffsarch.h | 174 + .../arch/arm/mach-pxa/g900/ttfs/tffsdrv.h | 312 + .../arch/arm/mach-pxa/g900/ttfs/tffsdrv26.c | 1902 ++++ .../arch/arm/mach-pxa/g900/ttfs/tffsioct.h | 55 + .../arch/arm/mach-pxa/g900/ttfs/trace32.c | 48 + .../drivers/input/touchscreen/ak4183.c | 17 +- kernel-2.6.33/drivers/video/Kconfig | 12 - kernel-2.6.33/drivers/video/Makefile | 1 - kernel-2.6.33/drivers/video/g900fb.c | 539 +- ramfs-android/default.prop | 1 - ramfs-android/init | 37 +- ramfs-android/init.rc | 8 +- ramfs-android/init_1 | Bin 106576 -> 107412 bytes ramfs-android/sbin/adbd | Bin 113288 -> 138352 bytes 220 files changed, 113734 insertions(+), 460 deletions(-) create mode 100755 Start_WM/test6.ncb create mode 100755 Start_WM/test6.sln create mode 100755 Start_WM/test6.suo create mode 100755 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Studio 2008 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test6", "test6\test6.vcproj", "{C7D031E8-B513-4310-A29D-E50069448615}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Pocket PC 2003 (ARMV4) = Debug|Pocket PC 2003 (ARMV4) + Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + Release|Pocket PC 2003 (ARMV4) = Release|Pocket PC 2003 (ARMV4) + Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {C7D031E8-B513-4310-A29D-E50069448615}.Debug|Pocket PC 2003 (ARMV4).ActiveCfg = Debug|Pocket PC 2003 (ARMV4) + {C7D031E8-B513-4310-A29D-E50069448615}.Debug|Pocket PC 2003 (ARMV4).Build.0 = Debug|Pocket PC 2003 (ARMV4) + {C7D031E8-B513-4310-A29D-E50069448615}.Debug|Pocket PC 2003 (ARMV4).Deploy.0 = Debug|Pocket PC 2003 (ARMV4) + {C7D031E8-B513-4310-A29D-E50069448615}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).ActiveCfg = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C7D031E8-B513-4310-A29D-E50069448615}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Build.0 = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C7D031E8-B513-4310-A29D-E50069448615}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Deploy.0 = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C7D031E8-B513-4310-A29D-E50069448615}.Release|Pocket PC 2003 (ARMV4).ActiveCfg = Release|Pocket PC 2003 (ARMV4) + {C7D031E8-B513-4310-A29D-E50069448615}.Release|Pocket PC 2003 (ARMV4).Build.0 = Release|Pocket PC 2003 (ARMV4) + {C7D031E8-B513-4310-A29D-E50069448615}.Release|Pocket PC 2003 (ARMV4).Deploy.0 = Release|Pocket PC 2003 (ARMV4) + {C7D031E8-B513-4310-A29D-E50069448615}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).ActiveCfg = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C7D031E8-B513-4310-A29D-E50069448615}.Release|Windows Mobile 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HcmV?d00001 diff --git a/Start_WM/test6/inc/GF.h b/Start_WM/test6/inc/GF.h new file mode 100755 index 00000000..3eb96011 --- /dev/null +++ b/Start_WM/test6/inc/GF.h @@ -0,0 +1,43 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GF.h + GFSDK top-level include header file. +*/ + +#ifndef __GF_H__ +#define __GF_H__ + +/* Device Interface Width */ +#define GF_DEVICE_INTERFACE_HOST_16 0x1 +#define GF_DEVICE_INTERFACE_HOST_32 0x2 + +/* Device Interface Type */ +#define GF_DEVICE_INTERFACE_TYPE_A 0x1 +#define GF_DEVICE_INTERFACE_TYPE_B 0x2 +#define GF_DEVICE_INTERFACE_TYPE_C 0x3 + +/* + * Device Addressing options and compile-time selection + */ +#define GF_DEVICE_ADDRESS_DIRECT 0x1 +#define GF_DEVICE_ADDRESS_INDIRECT16 0x2 +#define GF_DEVICE_ADDRESS_INDIRECT32 0x4 + +#include "nvcommon.h" +#include "GFDef.h" +#include "GFRmHelp.h" + +/** @mainpage GoForce 5500 Software Development Kit API Reference + + @image html nv_logo_horiz.gif +*/ + +#endif /* __GF_H__ */ + diff --git a/Start_WM/test6/inc/GF3D.h b/Start_WM/test6/inc/GF3D.h new file mode 100755 index 00000000..b06322c6 --- /dev/null +++ b/Start_WM/test6/inc/GF3D.h @@ -0,0 +1,39 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GF3D.h + GFSDK 3D API +*/ + +#ifndef __GF3D_H__ +#define __GF3D_H__ + +#include "GF.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +/** @addtogroup group3D 3DAPI 3D API +*/ +/*@{*/ + +// Typesafe functions for opening and closing this component +GF_RETTYPE GF3DOpen(GFRmHandle hRm, GF3DHandle *ph3D, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GF3DClose(GF3DHandle *ph3D); + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif /* __GF3D_H__ */ diff --git a/Start_WM/test6/inc/GFAudio.h b/Start_WM/test6/inc/GFAudio.h new file mode 100755 index 00000000..47ccbeda --- /dev/null +++ b/Start_WM/test6/inc/GFAudio.h @@ -0,0 +1,168 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFAudio.h + * GFSDK Audio Format API header file. + */ + +#ifndef __GFAudio_H__ +#define __GFAudio_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +//***************************************************************************** +// Audio Types +//***************************************************************************** +//#if defined GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS + +typedef struct _NvVectorS32 +{ + NvS32 x; + NvS32 y; + NvS32 z; + +} NvVectorS32; + +//#endif + + +//***************************************************************************** +// Audio Formats +//***************************************************************************** +// +// Note: FrameSize and Flags must be the first 2 entries in each parameter list below. + +typedef struct _GFMMPROC_PCM_PARAMETERS +{ + NvU32 FrameSize; + NvU32 Flags; + +} GFMMPROC_PCM_PARAMETERS; + +typedef struct _GFMMPROC_SBC_PARAMETERS +{ + NvU32 FrameSize; + NvU32 Flags; + NvU8 join; + NvU32 SampleRate; + NvU16 Bitpool; + NvU16 Channels; + NvU16 Channelmode; + NvU32 SamplesPerFrame; + NvU8 subbands; + NvU8 bitpool; + +} GFMMPROC_SBC_PARAMETERS; + +typedef struct _GFMMPROC_MP3_PARAMETERS +{ + NvU32 FrameSize; + NvU32 Flags; + + NvU32 SampleRate; + NvU16 BitsPerSample; + NvU16 Channels; + NvU32 SamplesPerFrame; + +} GFMMPROC_MP3_PARAMETERS; + +typedef struct _GFAUDIO_AAC_PARAMETERS +{ + NvU32 FrameSize; + NvU32 Flags; + + NvU16 BitsPerSample; + NvU16 Channels; + + NvU32 SamplingRate; + NvU32 ExtensionSamplingRate; + NvU32 BitRate; + NvU32 ChannelConfig; + NvU32 AudioObjectType; + + NvS16 CntBits; + NvS16 frameOK; + NvU32 CRC_Check; + NvU32 CRC_Reg; + +} GFMMPROC_AAC_PARAMETERS; + +typedef struct _GFAUDIO_AMRNB_PARAMETERS +{ + NvU32 FrameSize; + NvU32 Flags; + + NvU32 SamplingRate; + NvU16 BitsPerSample; + NvU16 Channels; + NvU32 format; +// NvU32 SamplesPerFrame; +// NvU32 ExtensionSamplingRate; + NvU32 Mode; + NvU32 NumberOfFrames; +} GFMMPROC_AMRNB_PARAMETERS; + +typedef struct _GFAUDIO_WMA_PARAMETERS +{ + NvU32 FrameSize; + NvU32 Flags; + + NvU16 FormatTag; + NvU16 Channels; + NvU32 SamplingRate; + NvU32 AvgBytesPerSec; + NvU16 BlockAlign; + NvU16 BitsPerSample; + NvU32 ChannelMask; + NvU16 EncodeOpt; + NvU16 AdvancedEncodeOpt; + + // Stuff for playerInfo + NvU16 PlayerOpt; + NvS32 PeakAmplitudeRef; + NvS32 RmsAmplitudeRef; + NvS32 PeakAmplitudeTarget; + NvS32 RmsAmplitudeTarget; + NvS16 DRCSetting; + NvS32 *rgiMixDownMatrix; + + NvU32 AuParserState; + +} GFMMPROC_WMA_PARAMETERS; + +typedef struct _GFAUDIO_AMRWB_PARAMETERS +{ + NvU32 FrameSize; + NvU32 Flags; + + NvU32 SamplingRate; + NvU16 BitsPerSample; + NvU16 Channels; + NvU32 format; +// NvU32 SamplesPerFrame; +// NvU32 ExtensionSamplingRate; + NvU32 Mode; +} GFMMPROC_AMRWB_PARAMETERS; + +typedef struct _GFMMPROC_MIDI_PARAMETERS +{ + NvU32 FrameSize; + NvU32 Flags; +} GFMMPROC_MIDI_PARAMETERS; + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/Start_WM/test6/inc/GFBDev.h b/Start_WM/test6/inc/GFBDev.h new file mode 100755 index 00000000..ccbd4513 --- /dev/null +++ b/Start_WM/test6/inc/GFBDev.h @@ -0,0 +1,189 @@ +/* + * Copyright 2003-2005 NVIDIA Corporation. All Rights Reserved. + * + * BY INSTALLING THE SOFTWARE THE USER AGREES TO THE TERMS BELOW. + * + * User agrees to use the software under carefully controlled conditions + * and to inform all employees and contractors who have access to the software + * that the source code of the software is confidential and proprietary + * information of NVIDIA and is licensed to user as such. User acknowledges + * and agrees that protection of the source code is essential and user shall + * retain the source code in strict confidence. User shall restrict access to + * the source code of the software to those employees and contractors of user + * who have agreed to be bound by a confidentiality obligation which + * incorporates the protections and restrictions substantially set forth + * herein, and who have a need to access the source code in order to carry out + * the business purpose between NVIDIA and user. The software provided + * herewith to user may only be used so long as the software is used solely + * with NVIDIA products and no other third party products (hardware or + * software). The software must carry the NVIDIA copyright notice shown + * above. User must not disclose, copy, duplicate, reproduce, modify, + * publicly display, create derivative works of the software other than as + * expressly authorized herein. User must not under any circumstances, + * distribute or in any way disseminate the information contained in the + * source code and/or the source code itself to third parties except as + * expressly agreed to by NVIDIA. In the event that user discovers any bugs + * in the software, such bugs must be reported to NVIDIA and any fixes may be + * inserted into the source code of the software by NVIDIA only. User shall + * not modify the source code of the software in any way. User shall be fully + * responsible for the conduct of all of its employees, contractors and + * representatives who may in any way violate these restrictions. + * + * NO WARRANTY + * THE ACCOMPANYING SOFTWARE (INCLUDING OBJECT AND SOURCE CODE) PROVIDED BY + * NVIDIA TO USER IS PROVIDED "AS IS." NVIDIA DISCLAIMS ALL WARRANTIES, + * EXPRESS, IMPLIED OR STATUTORY, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. + + * LIMITATION OF LIABILITY + * NVIDIA SHALL NOT BE LIABLE TO USER, USER'S CUSTOMERS, OR ANY OTHER PERSON + * OR ENTITY CLAIMING THROUGH OR UNDER USER FOR ANY LOSS OF PROFITS, INCOME, + * SAVINGS, OR ANY OTHER CONSEQUENTIAL, INCIDENTAL, SPECIAL, PUNITIVE, DIRECT + * OR INDIRECT DAMAGES (WHETHER IN AN ACTION IN CONTRACT, TORT OR BASED ON A + * WARRANTY), EVEN IF NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGES. THESE LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF THE + * ESSENTIAL PURPOSE OF ANY LIMITED REMEDY. IN NO EVENT SHALL NVIDIA'S + * AGGREGATE LIABILITY TO USER OR ANY OTHER PERSON OR ENTITY CLAIMING THROUGH + * OR UNDER USER EXCEED THE AMOUNT OF MONEY ACTUALLY PAID BY USER TO NVIDIA + * FOR THE SOFTWARE PROVIDED HEREWITH. + */ + +/* + * File: GFBDev.h + * GFSDK Block Device API header file. + */ + +#ifndef GF_BDEV_H +#define GF_BDEV_H + +#include "GF.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupBDev BDevAPI Block Device API + */ +/*@{*/ + +/** Block Device Capability definitions + Low 12 bits are for device types. + Matches GFFDEV_CAP_DEVICE_xxx in GFFDev.h + */ +#define GFBDEV_CAP_SD GFFDEV_CAP_DEVICE_SD /**< SD Storage Supported */ +#define GFBDEV_CAP_SDIO GFFDEV_CAP_DEVICE_SDIO /***< SDIO Supported */ +#define GFBDEV_CAP_MOUNT 0x00010000 /**< Mount/Unmount Supported */ +#define GFBDEV_CAP_DEVICE_MASK 0x00000FFF + +/** GFDRV_INFO: File system run-time struct. + Created when the volume is mounted via GFBDevMount (@see GFBDevMount()). + sec_total, sec_size, read, and write are filled in by + GFBDevMount() (or its lower level out-calls). + + read is mapped to BDevSDRead + write is mapped to BDevSDWrite + -- see GFBDevSD.c for details. + */ +typedef struct _GFDRV_INFO +{ + NvU32 dev; + NvU32 fat_type; + NvU32 sec_size; + NvU32 sec_total; + NvU32 cluster_size; + NvU32 cluster_total; + NvU32 rel_sec; + NvU32 data_sec_count; + NvU32 fat_sec_count; + NvU32 dir_count; + NvU32 root_sec_count; + NvU32 boot_sec; + NvU32 fat1_sec; + NvU32 fat2_sec; + NvU32 root_sec; + NvU32 data_sec; + NvU32 reFormat; + + NvU32 (*upd_fat)( struct _GFDRV_INFO *drv, NvU32 ndx, NvU32 data ); + NvU32 (*new_fat)( struct _GFDRV_INFO *drv, NvU32 ndx ); + NvU32 (*next_fat)( struct _GFDRV_INFO *drv, NvU32 ndx ); + NvU32 (*get_fat)( struct _GFDRV_INFO *drv, NvU32 ndx ); + NvU32 (*read)( NvU32 dev, NvU32 sec, NvU32 secSize, NvU32 count, + NvU32 buf ); + NvU32 (*write)( NvU32 dev, NvU32 sec, NvU32 secSize, NvU32 count, + NvU32 buf ); + + unsigned char *part_tab; + unsigned char *boot_tab; + unsigned char *fat_tab; + unsigned char *dir_tab; +} GFDRV_INFO; + +/* Publicly exposed Block Device API function in the table */ +/** @internal */ +typedef struct _GFBDEVTABLE +{ + GF_RETTYPE (* BDevGetProperty)( GFBDevHandle BDevHandle, + PGFPROPERTY pBDevProp ); + + GF_RETTYPE (* BDevMount)( GFBDevHandle BDevHandle, + GFDRV_INFO **pDrvInfo ); + + GF_RETTYPE (* BDevUnmount)( GFBDevHandle BDevHandle ); + +} GFBDEVTABLE, *PGFBDEVTABLE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFBDevSDOpen(GFRmHandle hRm, GFBDevHandle *phBDev, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFBDevClose(GFRmHandle hRm, GFBDevHandle *phBDev); + +/** @name Functions +@{*/ + +/** Gets BDev API properties. + @param BDevHandle (#GFBDevHandle) Handle to the Block Device API + @param pBDevProp (#PGFPROPERTY) pointer to property struct. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +#define GFBDevGetProperty( BDevHandle, pBDevProp ) \ + ((PGFBDEVTABLE)BDevHandle)->BDevGetProperty( BDevHandle, pBDevProp ) + +/** Initializes the SD device and run-time support structure. + @param BDevHandle (#GFBDevHandle) Handle to the Block Device API + @param pDrvInfo (#GFDRV_INFO) run-time support struct + + This creates and assigns a #GFDRV_INFO into + the given BDevHandle (actually a #BDEVSDTABLE). + Read and Write functions are assinged into the #GFDRV_INFO which + should be used by higher-level file systems to access the SD + device. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +#define GFBDevMount( BDevHandle, pDrvInfo ) \ + ((PGFBDEVTABLE)BDevHandle)->BDevMount( BDevHandle, pDrvInfo ) + +/** Uninitializes the SD device. + @param BDevHandle (#GFBDevHandle) Handle to the Block Device API + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +#define GFBDevUnmount( BDevHandle ) \ + ((PGFBDEVTABLE)BDevHandle)->BDevUnmount( BDevHandle ) + +/*@}*/ +/*@}*/ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* GF_BDEV_H */ + diff --git a/Start_WM/test6/inc/GFBitmap.h b/Start_WM/test6/inc/GFBitmap.h new file mode 100755 index 00000000..22286e00 --- /dev/null +++ b/Start_WM/test6/inc/GFBitmap.h @@ -0,0 +1,45 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFBitmap.h + * GFSDK Bitmap header file. + */ + + +#ifndef __GFBITMAP_H__ +#define __GFBITMAP_H__ + +/* Bitmap Color Format - Follow Surface Format GF_SURFACE_xxx */ +#define GF_BITMAP_YUV420 0x00000001 +#define GF_BITMAP_YUV422 0x00000002 +#define GF_BITMAP_YUYV (GF_BITMAP_YUV422|0x00000004) +#define GF_BITMAP_YVYU (GF_BITMAP_YUV422|0x00000008) +#define GF_BITMAP_UYVY (GF_BITMAP_YUV422|0x00000010) +#define GF_BITMAP_VYUY (GF_BITMAP_YUV422|0x00000020) +#define GF_BITMAP_MPEGDEC (GF_BITMAP_YUV420|0x00000040) +#define GF_BITMAP_RGB565 0x00010000 +#define GF_BITMAP_RGB8 0x00070000 +#define GF_BITMAP_ARGB8888 0x00030000 +#define GF_BITMAP_ARGB6666 0x000F0000 + +/* Bitmap */ +typedef struct _GFBITMAP +{ + NvU16 width; + NvU16 height; + NvS32 stride; + NvU32 format; + NvU8 bpp; // Bits per pixel + NvU8 reserved; + NvU16 offset; // Offset from beginning of bitmap to data + NvU8 data; // Real data starts from "Offset" location +} GFBITMAP, *PGFBITMAP; + +#endif /* __GFBITMAP_H__ */ diff --git a/Start_WM/test6/inc/GFCamera.h b/Start_WM/test6/inc/GFCamera.h new file mode 100755 index 00000000..f7730b5a --- /dev/null +++ b/Start_WM/test6/inc/GFCamera.h @@ -0,0 +1,367 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFCamera.h + GFSDK Camera API header file. +*/ + +#ifndef __CAMERA_H__ +#define __CAMERA_H__ + +#include "GF.h" +#include "GFVx.h" +#include "GFCameraScr.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupCamera CameraAPI Camera API +
        +
      • @ref pageCameraAppNotes +
          +
        • @ref pageCameraAppNotes1 +
        +
      +*/ +/*@{*/ + + +/* Helper Macros - Do not assume bytes are properly aligned! */ +#ifndef MAKENvU8S16 +#define MAKENvU8S16( data16 ) \ + (NvU8)((data16) & 0xFF), (NvU8)(((data16) >> 8) & 0xFF) +#endif /* MAKENvU8S16 */ +#ifndef MAKENvU8S32 +#define MAKENvU8S32( data32 ) \ + (NvU8)((data32) & 0xFF), \ + (NvU8)(((data32) >> 8) & 0xFF), \ + (NvU8)(((data32) >> 16) & 0xFF), \ + (NvU8)(((data32) >> 24) & 0xFF) +#endif /* MAKENvU8S32 */ +#ifndef MAKE16 +#define MAKE16( ptr ) \ + ((NvU16)(*ptr) | ((NvU16)(*(ptr+1)) << 8)) +#endif /* MAKE16 */ +#ifndef MAKE32 +#define MAKE32( ptr ) \ + ((NvU32)MAKE16( ptr ) | (NvU32)MAKE16( (ptr+2) ) << 16) +#endif /* MAKE32 */ + +/* GFCAMERA instruction (special) */ +#define GFCAMERA_NONE 0x00 +#define GFCAMERA_NORMAL_WRITE 0x01 +#define GFCAMERA_DELAY_MSEC 0x02 +#define GFCAMERA_NEED_MCLOCK 0x03 + +/* GFCameraSetResolution Options */ +#define GFCAMERA_POWERON_OPTION 0x00000001 + +/* GFCAMERA Error codes */ +#define GFCAM_ERROR_ILLEGAL_PARAMETER (GFCAM_ERROR | 0x00000001L) +#define GFCAM_ERROR_ALLOC_FAILED (GFCAM_ERROR | 0x00000002L) +#define GFCAM_ERROR_VM_ALLOC_FAILED (GFCAM_ERROR | 0x00000003L) +#define GFCAM_ERROR_SCRIPT_ACCESS_FAILED (GFCAM_ERROR | 0x00000004L) +#define GFCAM_ERROR_NATIVE_FUNCTION_FAILED (GFCAM_ERROR | 0x00000005L) +#define GFCAM_ERROR_GETTING_COMPONENT (GFCAM_ERROR | 0x00000006L) +#define GFCAM_ERROR_VM_BUFFER_ALLOC_FAILED (GFCAM_ERROR | 0x00000007L) +#define GFCAM_ERROR_CAMERA_SCRIPT_NOT_PRESENT (GFCAM_ERROR | 0x00000008L) +#define GFCAM_ERROR_FUNCTION_NOT_SUPPORTED (GFCAM_ERROR | 0x00000009L) + +/* GFCAMERAINSTRTYPE */ +typedef struct _GFCAMERAINSTRTYPE +{ + NvU16 skip; // IMPORTANT: Multiple instructions + // must be in ascending skip order + NvU8 type; + NvU16 size; + NvU32 data; +} GFCAMERAINSTRTYPE, *PGFCAMERAINSTRTYPE; + +/* GFCAMERABAYERINFO - BayerInfo struct */ +typedef struct _GFCAMERABAYERINFO +{ + NvU16 ScanWidth; + NvU16 ScanHeight; + + NvU16 ActiveLineStart; + NvU16 ActiveLineWidth; + NvU16 ActiveFrameStart; + NvU16 ActiveFrameHeight; + NvU8 hSyncEdge; + NvU8 vSyncEdge; + NvU16 bayerSel; + +} GFCAMERABAYERINFO, *PGFCAMERABAYERINFO; + +/* GFCAMERARESOLUTIONTYPE - Resolution struct */ +typedef struct _GFCAMERARESOLUTIONTYPE +{ + NvU16 x; + NvU16 y; + NvU8 numInstr; + GFCAMERAINSTRTYPE *pInstr; + GFCAMERABAYERINFO *pBayerInfo; +} GFCAMERARESOLUTIONTYPE, *PGFCAMERARESOLUTIONTYPE; + + + +/* GFCAMERATABLETYPE - Camera Table */ +#define GFCAMERA_NAME_SIZE 32 +typedef struct _GFCAMERATABLETYPE +{ + NvU16 id; + NvU16 ver; + NvU32 scriptSubID; + char name[GFCAMERA_NAME_SIZE]; + // variable name char string always + // ends with a '0' + NvU32 VIPFlag; + NvU32 VIPNewTiming; + NvU32 VIPColorFormat; + NvU8 VIPHOffset; + NvU8 VIPVOffset; + NvU8 numI2CBytes; //bytes per transfer/packet + NvU8 numRes; + GFCAMERARESOLUTIONTYPE *pResData; + NvU16 initDataSize; + NvU8 *pInitData; +// GFCAMERABAYERINFO *pBayerInfo; + struct _GFCAMERATABLETYPE *pNext; +} GFCAMERATABLETYPE, *PGFCAMERATABLETYPE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFCameraOpen(GFRmHandle hRm, GFCameraHandle *phCamera, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFCameraClose(GFCameraHandle *phCamera); + +/** This routine returns the camera's properties and capabilities. + These properties are returned in the GFPROPERTY structure. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param pProp (PGFPROPERTY) Pointer to GFPROPERTY structure. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see GFPROPERTY +*/ +GF_RETTYPE GFCameraGetProperty(GFCameraHandle CameraHandle, + PGFPROPERTY pProp); + +/** This routine programs the camera's registers based on the data + contained in the camera table. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param resX (NvU16) Horizontal resolution + @param resY (NvU16) Vertical resolution + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see PGFCAMERATABLETYPE +*/ +GF_RETTYPE GFCameraSetup(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + NvU16 resX, + NvU16 resY ); + +/** This routine programs the camera's registers for a resolution change. + The main difference from GFCameraSetup() is the lack of camera power on. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param resX (NvU16) Horizontal resolution + @param resY (NvU16) Vertical resolution + @param poweron (NvU32) flag indicates whether camera power on should be executed + @param option (NvU32) flag passed to camera script SetResolution function + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see PGFCAMERATABLETYPE +*/ +GF_RETTYPE GFCameraSetResolution(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + NvU16 resX, + NvU16 resY, + NvU32 poweron, + NvU32 option); + +/** This routine allocates the run-time camera table structure from the + camera scripts. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pTable (NvU8) Pointer to camera configuration table, ignored for GFSDK SC15. + Camera configurations are passed via scripts. + @param *ppCamera (PGFCAMERATABLETYPE) Returns pointer to linked list of camera description tables + + @return On success the number of cameras in the linked list is returned. This can be 0. + On failure an error code is returned. To distinguish between success and failure, + use macro #ISGFERROR() or #ISGFSUCCESS(). + + @see PGFCAMERATABLETYPE +*/ +GF_RETTYPE GFCameraTableAlloc(GFCameraHandle CameraHandle, + NvU8 *pTable, + PGFCAMERATABLETYPE *ppCamera); + +/** This routine frees the camera table structure created by + GFCameraTableAlloc(). + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *ppCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see PGFCAMERATABLETYPE +*/ +GF_RETTYPE GFCameraTableFree(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE *ppCamera); + +GF_RETTYPE GFCameraTableDump(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera); + +/** This routine finds a camera that is contained in the camera table structure. + It does so using various parameters that refer to entries in the table. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param *pWanted (PGFCAMERATABLETYPE) Pointer to the found PGFCAMERATABLETYPE structure. + @param id (NvU32) Unique I2C slave ID for the camera. + @param *name (Char) pointer to name. + @param resX (NvU16) Horizontal resolution + @param resY (NvU16) Vertical resolution + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFCameraFind(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + PGFCAMERATABLETYPE *pWanted, + NvU32 id, + char *name, + NvU16 resX, + NvU16 resY ); + +/** This routine scans for a camera that is contained in the + table structure created by GFCameraTableAlloc(). + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pTable (NvU8) Pointer to camera table. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFCameraScan(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera); + +/** This routine uses the script subID parameter to find a camera + that is contained in the camera table structure. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param *pWanted (PGFCAMERATABLETYPE) Pointer to the found PGFCAMERATABLETYPE structure. + @param subID (NvU32) Camera script subID. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFCameraScriptFind(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + PGFCAMERATABLETYPE *pWanted, + NvU32 subID); + +/** This routine calls the camera script function to operate on a user defined + camera attribute. A shared buffer is used to pass parameters to and from + the camera script function. + + The shared buffer and may contain data used by the script function + to perform the requested operation. The first data should indicate + the primary setting of the operation. The convention is to use ranges + that are normalized from 0 to 100. Where specific data is required, + that data must match that which is allowable by the camera in use. + If not, the error code GFCAM_ERROR_ILLEGAL_PARAMETER is returned. + + The attribute may be one of the defined flags listed below. + GFCAMERA_CAMERACONTROL_PAN + GFCAMERA_CAMERACONTROL_TILT + GFCAMERA_CAMERACONTROL_ROLL + GFCAMERA_CAMERACONTROL_ZOOM + GFCAMERA_CAMERACONTROL_EXPOSURE + GFCAMERA_CAMERACONTROL_IRIS + GFCAMERA_CAMERACONTROL_FOCUS + GFCAMERA_CAMERACONTROL_FLASH + GFCAMERA_VIDEOPROCAMP_BRIGHTNESS + GFCAMERA_VIDEOPROCAMP_CONTRAST + GFCAMERA_VIDEOPROCAMP_HUE + GFCAMERA_VIDEOPROCAMP_SATURATION + GFCAMERA_VIDEOPROCAMP_SHARPNESS + GFCAMERA_VIDEOPROCAMP_GAMMA + GFCAMERA_VIDEOPROCAMP_COLORENABLE + GFCAMERA_VIDEOPROCAMP_WHITEBALANCE + GFCAMERA_VIDEOPROCAMP_BACKLIGHT_COMPENSATION + GFCAMERA_VIDEOPROCAMP_GAIN + + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param attribute (NvU32) Attribute flag indicates operation. + @param *sharedBuffer (NvU32) pointer to a shared buffer. + @param bufferSize (NvU32) Size of shared buffer. + @param *readValue (NvU32) pointer to the returned value from the camera script function. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GFCAM_ERROR_FUNCTION_NOT_SUPPORTED Attribute not supported + @retval #GFCAM_ERROR_ILLEGAL_PARAMETER Parameter out of range + +*/ +GF_RETTYPE GFCameraScriptSetAttribute(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + NvU32 attribute, + NvU32 *sharedBuffer, + NvU32 bufferSize, + NvU32 *readValue); + +/** This routine uses the camera script function to execute a powerup or + powerdown sequence. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param poweron (NvU32) If set to '0' execute powerdown, if '1', execute powerup. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFCameraPower(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + NvU32 poweron); + +/*@}*/ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/** @page pageCameraAppNotes CameraAPI Application Notes + + @section pageCameraAppNotes1 Todo + +*/ + +#endif /* __CAMERA_H__ */ + diff --git a/Start_WM/test6/inc/GFCameraScr.h b/Start_WM/test6/inc/GFCameraScr.h new file mode 100755 index 00000000..b34eb21b --- /dev/null +++ b/Start_WM/test6/inc/GFCameraScr.h @@ -0,0 +1,40 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#if !defined (__GFCAMERASCR_INC__) +#define __GFCAMERASCR_INC__ + +/* Camera Script error codes */ +#define GFCAMERA_NOT_SUPPORTED 0x80000000 //return error code for attribute +#define GFCAMERA_PARAMETER_ERROR 0x80000001 //return out of range parameter + +/** Camera script attribute flags, for camera control functions + @see GFCameraScriptSetAttribute() +*/ +#define GFCAMERA_CAMERACONTROL_PAN 0x00000001 +#define GFCAMERA_CAMERACONTROL_TILT 0x00000002 +#define GFCAMERA_CAMERACONTROL_ROLL 0x00000003 +#define GFCAMERA_CAMERACONTROL_ZOOM 0x00000004 +#define GFCAMERA_CAMERACONTROL_EXPOSURE 0x00000005 +#define GFCAMERA_CAMERACONTROL_IRIS 0x00000006 +#define GFCAMERA_CAMERACONTROL_FOCUS 0x00000007 +#define GFCAMERA_CAMERACONTROL_FLASH 0x00000008 +#define GFCAMERA_VIDEOPROCAMP_BRIGHTNESS 0x00000009 +#define GFCAMERA_VIDEOPROCAMP_CONTRAST 0x0000000a +#define GFCAMERA_VIDEOPROCAMP_HUE 0x0000000b +#define GFCAMERA_VIDEOPROCAMP_SATURATION 0x0000000c +#define GFCAMERA_VIDEOPROCAMP_SHARPNESS 0x0000000d +#define GFCAMERA_VIDEOPROCAMP_GAMMA 0x0000000e +#define GFCAMERA_VIDEOPROCAMP_COLORENABLE 0x0000000f +#define GFCAMERA_VIDEOPROCAMP_WHITEBALANCE 0x00000010 +#define GFCAMERA_VIDEOPROCAMP_BACKLIGHT_COMPENSATION 0x00000011 +#define GFCAMERA_VIDEOPROCAMP_GAIN 0x00000012 + +#endif + diff --git a/Start_WM/test6/inc/GFDef.h b/Start_WM/test6/inc/GFDef.h new file mode 100755 index 00000000..c7a9df55 --- /dev/null +++ b/Start_WM/test6/inc/GFDef.h @@ -0,0 +1,254 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFDef.h + * GFSDK Definition header file + */ + +#ifndef __GFDEF_H__ +#define __GFDEF_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#include "GFDefScr.h" + +/* Register field manipulation using xxx_RANGE macros defined in hardware + * header files. + */ +#define GF_LOWBIT(x) (0?x) +#define GF_HIGHBIT(x) (1?x) +#define GF_SIZE(x) (GF_HIGHBIT(x)-GF_LOWBIT(x)+1) +#define GF_SHIFT(x) ((0?x)%32) +#define GF_MASK(x) (0xFFFFFFFFUL>>(31-((1?x)%32)+((0?x)%32))) +#define GF_BITS(val, x) (((val) & GF_MASK(x))<> GF_SHIFT(d##_##r##_0_##f##_RANGE))& GF_MASK(d##_##r##_0_##f##_RANGE)) + +#define GF_FLD_SET_DRF_NUM(d,r,f,n,v) ((v & ~GF_SHIFTMASK(d##_##r##_0_##f##_RANGE)) | GF_DRF_NUM(d,r,f,n)) +#define GF_FLD_SET_DRF_DEF(d,r,f,c,v) (((v) & ~GF_SHIFTMASK(d##_##r##_0_##f##_RANGE)) | GF_DRF_DEF(d,r,f,c)) + +#define GF_RESETVAL(d,r) (d##_##r##_0_RESET_VAL) + +#define OP_DRF_DEF(o,f,c) ((o##_##f##_##c) << GF_SHIFT(o##_##f##_RANGE)) +#define OP_DRF_NUM(o,f,n) (((n)& GF_MASK(o##_##f##_RANGE))<< GF_SHIFT(o##_##f##_RANGE)) +#define OP_DRF_VAL(o,f,v) (((v)>> GF_SHIFT(o##_##f##_RANGE))& GF_MASK(o##_##f##_RANGE)) + +#define OP_FLD_SET_DRF_NUM(o,f,n,v) ((v & ~GF_SHIFTMASK(o##_##f##_RANGE)) | GF_DRF_NUM(o,f,n)) +#define OP_FLD_SET_DRF_DEF(o,f,c,v) (((v) & ~GF_SHIFTMASK(o##_##f##_RANGE)) | GF_DRF_DEF(o,f,c)) + +/* Default Return Codes */ +/* - All errors has MSB set, indicate a negative val. */ + +/** Macro to test if an error code of type GF_RETTYPE signals failure. + @param code (GF_RETTYPE) Error code + @return Evaluates to \a true on failure, \a false on success. +*/ +#define ISGFERROR(code) ((GF_RETTYPE)(code) < GF_SUCCESS) + +/** Macro to test if an error code of type GF_RETTYPE signals success. + @param code (GF_RETTYPE) Error code + @return Evaluates to \a true on success, \a false on failure. +*/ +#define ISGFSUCCESS(code) ((GF_RETTYPE)(code) >= GF_SUCCESS) + +/** Common error code: Generic error. */ +#define GF_ERROR 0x80000000L +/** Common error code: Success (not an error). */ +#define GF_SUCCESS 0x00000000L +/** Common error code: Busy (not an error). */ +#define GF_ERROR_BUSY 0x80000001L +/** Common error code: Out of memory. This can be CPU heap memory, or GPU memory. */ +#define GF_ERROR_OUT_MEMORY 0x80000003L +/** Common error code: Bad parameter. */ +#define GF_ERROR_BAD_PARAMETER 0x80000005L + + +#define GF_COMPONENT_ERROR_SHIFT 24 +/** Macro to reverse bits of the 7 bit component ID. + See GF_RETTYPE for explanation. +*/ +#define GF_COMPONENT_REVERSE(c) ((((c)&64)>>6)|(((c)&32)>>4)|(((c)&16)>>2)|((c)&8)|(((c)&4)<<2)|(((c)&2)<<4)|(((c)&1)<<6)) + +#define GX_ERROR (GF_COMPONENT_REVERSE(GF_GXAPI)< + +/** Utility macro */ +#define CHECK_STATUS_CLEANUP(f) \ + do { \ + if(ISGFERROR( ( status = (f) ) )) \ + goto Cleanup; \ + } while(0) + + + +#if !defined(NV_MODS) + +#ifdef __cplusplus +extern "C" +{ +#endif + +/* + * READ THIS FIRST: + * + * None of these funtions should be called directly by an application. The + * macros below should be used instead. + */ + +/** Diag context structure */ +typedef struct _GFDIAGCONTEXT +{ + NvU32 processID; + NvU32 threadID; +} GFDIAGCONTEXT, *PGFDIAGCONTEXT; + + +/** Public exposed DIAG API functions in the table */ +typedef struct _GFDIAGTABLE +{ + /** + @see GF_DIAG_INITIALIZE + */ + GF_RETTYPE ( *DiagInitialize)( GFDiagHandle DiagHandle, int argc, char **argv ); + + /** + @see GF_DIAG_GET_VERSION + */ + GF_RETTYPE ( *DiagGetVersion)( GFDiagHandle DiagHandle, char *versionStr, int bufferLen ); + + /** + @see GF_DIAG_SET_RENDER_SURFACE + */ + GF_RETTYPE ( *DiagSetRenderSurface)( GFDiagHandle DiagHandle, PGFRMSURFACE surface ); + + /** + @see GF_DIAG_SET_IDLE_CHIP_CALLBACK + */ + GF_RETTYPE ( *DiagSetIdleChipCallback)( GFDiagHandle DiagHandle, + GF_RETTYPE (*pIdleCallback)(void *idleCallbackData), void *data ); + + /** + @see GF_DIAG_FRAME_DONE + */ + GF_RETTYPE ( *DiagFrameDone)( GFDiagHandle DiagHandle ); + + /** + @see GF_DIAG_CLEANUP + */ + GF_RETTYPE ( *DiagCleanup)( GFDiagHandle DiagHandle ); + + /** + @see GF_DIAG_RUN_TEST + */ + GF_RETTYPE (* DiagRunTest)( GFDiagHandle DiagHandle, char *testName, + const char *pCmdLine, NvU8 flag, GFDiagHandle *pDiagChildHandle ); + + /** + @see GF_DIAG_WAIT_FOR_TEST + */ + GF_RETTYPE (* DiagWaitForTest)( GFDiagHandle DiagHandle ); + + /** + @see GF_DIAG_PRINT + */ + GF_RETTYPE (* DiagPrint)( GFDiagHandle DiagHandle, const char *msg ); + + /** + @see GF_DIAG_GET_CONTEXT + */ + GF_RETTYPE (* DiagGetContext)( GFDiagHandle DiagHandle, GFDIAGCONTEXT *pContext ); +} GFDIAGTABLE, *PGFDIAGTABLE; + +/* +***************************************************************************** +* MACROS - Apps should use these to communicate with GFDiag +***************************************************************************** +*/ + +// Function documentation goes here to bypass #ifdef problems + +/** @name Functions +@{*/ + +/** @def GF_DIAG_MAIN + Replace your standard definition of "int main" with with this macro + for use with GFDiag. + + @param unused1 (int) Unused -- obsolete argument, to be removed + @param unused2 (char**) Unused -- obsolete argument, to be removed + @param testName (char*) Name of the test + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_INITIALIZE + Control things like storing vs checking, HW vs SW crcs via this function. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param argc (int) Argument count + @param argv (char**) Argument data + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Will read in the stored CRCs if applicable. +*/ + +/** @def GF_DIAG_GET_VERSION + Query the GFDiag version. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param str (char*) Pointer to a buffer that will be filled with the GFDiag version + @param len (int) Length of the buffer, versionStr + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The application allocates a buffer and passes it + (along with its length) to GFDiag. +*/ + +/** @def GF_DIAG_SET_IDLE_CHIP_CALLBACK +Allow the test to idle the chip in its own way. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param callbackFn (GF_RETTYPE (void *idleCallbackData)) Function pointer to call on idle + @param callbackData (void*) Data to pass to pIdleCallback when it is called + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_SET_RENDER_SURFACE + Tell GFDiag what surface we want to CRC etc. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param surface (#PGFRMSURFACE) Surface we want to CRC + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_FRAME_DONE + Announce the completion of a frame. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFDiag has the option to: + + Calculate a CRC on the primary surface. This function calls the callback + function set by GFDiagSetIdleChipCallback (or a default if no idle chip + callback is supplied) to idle the chip before calculating CRCs + + In "storing mode" this will store the CRC in some DB that gets written + to file later. + + In "checking mode" this checks the CRC against the one we read in from file. +*/ + +/** @def GF_DIAG_CLEANUP + Perform any necessary cleanup operations before the test exits and write + CRCs to file if applicable. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_PRINT + Prints to GFDiag. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param x (const char*) Message to print + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_RUN_TEST +Starts a test executing. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param testName (char*) Name of the test to execute + @param pCmdLine (const char*) The command line to execute the test + @param flag (NvU8) This is an option specifying how the test should be run. May contain one of: GF_DIAG_RUN_NEW_PROCESS, GF_DIAG_RUN_NEW_THREAD or GF_DIAG_RUN_NORMAL + @param pDiagChildHandle (#GFDiagHandle) This is a pointer to a GFDiagHandle that will be filled in with the handle of the child process + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_WAIT_FOR_TEST + Waits for test to complete, return value will be result of test. + + @param DiagHandle (#GFDiagHandle) Handle to Diag of test to run (probably the handle placed in pDiagChildHandle from GF_DAIG_RUN_TEST) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see GF_DIAG_RUN_TEST +*/ + +/** @def GF_DIAG_GET_CONTEXT +Gets context from GFDiag. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param pContext (#GFDIAGCONTEXT) Points to a structure that will be filled with the current context + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_PRINTF + Format prints a message. + + @param x (bracketed printf string) Message to print +*/ + +/*@}*/ + +/* Run flags */ + +/** Test is run in same thread */ +#define GF_DIAG_RUN_NORMAL 1 +#define GF_DIAG_RUN_NEW_THREAD 2 +#define GF_DIAG_RUN_NEW_PROCESS 4 + + +/** @def GF_DIAG_CRC_STATUS + Helper macro to check the status of a call to GF_DIAG_FRAME_DONE + and increment a fail count if the status was a failure. + + eg: + @code GF_DIAG_CRC_STATUS(GF_DIAG_FRAME_DONE("DxTest"), GF_Diag_CrcFailCount); + @endcode + + @param status The status of a call to GF_DIAG_FRAME_DONE + @param gf_diag_crcFailCount The var containing the current failure count + + @see GF_DIAG_FRAME_DONE +*/ +#define GF_DIAG_CRC_STATUS(status, gf_diag_crcFailCount) + +#ifdef GF_DIAG_ENABLED + +/* + * See doxygen comments above for info on the following macros + */ +#define GF_DIAG_MAIN(unused1, unused2, testName) \ + int TestMain(int argc, char *argv[], GFDiagHandle handle) + +#define GF_DIAG_INITIALIZE(handle, argc, argv) \ + ((PGFDIAGTABLE)handle)->DiagInitialize((handle), (argc), (argv)) + +#define GF_DIAG_GET_VERSION(handle, str, len) \ + ((PGFDIAGTABLE)handle)->DiagGetVersion((handle), (str), (len)) + +#define GF_DIAG_SET_IDLE_CHIP_CALLBACK(handle, callbackFn, callbackData) \ + ((PGFDIAGTABLE)handle)->DiagSetIdleChipCallback(handle, callbackFn, callbackData) + +#define GF_DIAG_SET_RENDER_SURFACE(handle, surface) \ + ((PGFDIAGTABLE)handle)->DiagSetRenderSurface((handle), (surface)) + +#define GF_DIAG_FRAME_DONE(handle) \ + ((PGFDIAGTABLE)handle)->DiagFrameDone((handle)) + +#define GF_DIAG_CLEANUP(handle) \ + ((PGFDIAGTABLE)handle)->DiagCleanup((handle)) + +#define GF_DIAG_PRINT(handle, x) \ + ((PGFDIAGTABLE)handle)->DiagPrint(handle, x) + +#define GF_DIAG_RUN_TEST(handle, testName, pCmdLine, flag, pDiagChildHandle) \ + ((PGFDIAGTABLE)handle)->DiagRunTest(handle, testName, pCmdLine, flag, pDiagChildHandle) + +#define GF_DIAG_WAIT_FOR_TEST(handle) \ + ((PGFDIAGTABLE)handle)->DiagWaitForTest(handle) + +#define GF_DIAG_GET_CONTEXT(handle, pContext) \ + ((PGFDIAGTABLE)handle)->DiagGetContext(handle, pContext) + + +static void +GFDiagPrintf( GFDiagHandle handle, const char *fmt, ... ) +{ + char buf[1024]; + va_list list; + + va_start(list, fmt); + + GFSprintfVAL(buf, fmt, list); + + GF_DIAG_PRINT(handle, buf); + + va_end(list); +} + +#define GF_DIAG_PRINTF(x) GFDiagPrintf x + +#else + +/* + * Do this exactly like nvplat...so this will have an OS specific + * implementation in the final GFDiag.h + */ +#if NVOS_IS_LINUX || NVOS_IS_WINDOWS +#define GF_DIAG_MAIN(unused1, unused2, testName) \ + int TestMain(int argc, char *argv[]) +#define GF_DIAG_MAIN_DEFAULT_1ARG(unused1, unused2, testName, arg1) \ + int TestMain(int argc, char *argv[]) +#define GF_DIAG_MAIN_DEFAULT_2ARGS(unused1, unused2, testName, arg1, arg2) \ + int TestMain(int argc, char *argv[]) +#define GF_DIAG_MAIN_DEFAULT_3ARGS(unused1, unused2, testName, arg1, arg2, arg3) \ + int TestMain(int argc, char *argv[]) +#else +#define GF_DIAG_MAIN(unused1, unused2, testName) \ + int argc = 1; \ + char *argv[] = { #testName }; \ + int main() +#define GF_DIAG_MAIN_DEFAULT_1ARG(unused1, unused2, testName, arg1) \ + int argc = 2; \ + char *argv[] = { #testName, arg1 }; \ + int main() +#define GF_DIAG_MAIN_DEFAULT_2ARGS(unused1, unused2, testName, arg1, arg2) \ + int argc = 3; \ + char *argv[] = { #testName, arg1, arg2 }; \ + int main() +#define GF_DIAG_MAIN_DEFAULT_3ARGS(unused1, unused2, testName, arg1, arg2, arg3) \ + int argc = 4; \ + char *argv[] = { #testName, arg1, arg2, arg3 }; \ + int main() +#endif + +#define GF_DIAG_INITIALIZE(testName, argc, argv) GF_SUCCESS +#define GF_DIAG_CLEANUP(testName) GF_SUCCESS + +/* These should be removed once all the Apps & MODS are updated */ +#define GF_DIAG_GET_VERSION(testName, str, len) GF_SUCCESS +#define GF_DIAG_SET_IDLE_CHIP_CALLBACK(testName, callbackFn, callbackData) GF_SUCCESS +#define GF_DIAG_SET_RENDER_SURFACE(testName, surface) GF_SUCCESS +#define GF_DIAG_FRAME_DONE(testName) GF_SUCCESS +#define GF_DIAG_PRINT(handle, x) GF_SUCCESS +#define GF_DIAG_RUN_TEST(handle, testName, pCmdLine, flag, pDiagChildHandle) GF_SUCCESS +#define GF_DIAG_WAIT_FOR_TEST(handle) GF_SUCCESS +#define GF_DIAG_GET_CONTEXT(handle, pContext) GF_SUCCESS + +#define GF_DIAG_PRINTF(x) GFPrintf x + +#endif /* GF_DIAG_ENABLED */ + +#ifdef __cplusplus +} +#endif + +/* NV_MODS */ +#else + +/* GFDiag is always enabled in NV_MODS builds */ +#define GF_DIAG_ENABLED 1 + +#ifndef INCLUDED_GFMODS_H +#include "../GFMods/src/GFMods.h" +#endif + +#endif /* NV_MODS */ + +#define CHECK_STATUS_MSG(f,TEXT) \ + do { \ + if(ISGFERROR( ( status = (f) ) )) \ + { \ + GF_DIAG_PRINTF((TEXT)); \ + } \ + } while(0) + + +#define CHECK_STATUS_CLEANUP_MSG(f , TEXT) \ + do { \ + if(ISGFERROR( ( status = (f) ) )) \ + { \ + GF_DIAG_PRINTF(TEXT); \ + goto Cleanup; \ + } \ + } while(0) + +#define CHECK_STATUS_AND_DISPLAY_CLEANUP_MSG(f , TEXT) \ + do { \ + if(ISGFERROR( ( status = (f) ) )) \ + { \ + GF_DIAG_PRINTF((TEXT,f)); \ + goto Cleanup; \ + } \ + } while(0) +#endif /* __GFDIAG_H__ */ diff --git a/Start_WM/test6/inc/GFDispCmdData.h b/Start_WM/test6/inc/GFDispCmdData.h new file mode 100755 index 00000000..5106900b --- /dev/null +++ b/Start_WM/test6/inc/GFDispCmdData.h @@ -0,0 +1,1740 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#if !defined __GFDISPCMDDATA_H__ +#define __GFDISPCMDDATA_H__ + +// Display Signal Options 0 + +#define GF_DEFAULT_TABLE 0x01 // Display Default Table Support +#define GF_DXAPI_SUPPORT 0x02 // DxAPI Support +#define GF_FMARK_SUPPORT 0x04 // FMARK Supported by panel + +#define GFSDXAPI_PROC0 0x80000000 // PROC0 in Display DxAPI table in Script +#define GFSDXAPI_PROC1 0x80000001 // PROC1 in Display DxAPI table in Script +#define GFSDXAPI_PROC2 0x80000002 // PROC2 in Display DxAPI table in Script +#define GFSDXAPI_PROC3 0x80000003 // PROC3 in Display DxAPI table in Script +#define GFSDXAPI_PROC4 0x80000004 // PROC4 in Display DxAPI table in Script +#define GFSDXAPI_PROC5 0x80000005 // PROC5 in Display DxAPI table in Script +#define GFSDXAPI_PROC6 0x80000006 // PROC6 in Display DxAPI table in Script +#define GFSDXAPI_PROC7 0x80000007 // PROC7 in Display DxAPI table in Script +#define GFSDXAPI_PROC8 0x80000008 // PROC8 in Display DxAPI table in Script +#define GFSDXAPI_PROC9 0x80000009 // PROC9 in Display DxAPI table in Script +#define GFSDXAPI_PROC10 0x8000000A // PROC10 in Display DxAPI table in Script +#define GFSDXAPI_PROC11 0x8000000B // PROC11 in Display DxAPI table in Script +#define GFSDXAPI_PROC12 0x8000000C // PROC12 in Display DxAPI table in Script +#define GFSDXAPI_PROC13 0x8000000D // PROC13 in Display DxAPI table in Script +#define GFSDXAPI_PROC14 0x8000000E // PROC14 in Display DxAPI table in Script +#define GFSDXAPI_PROC15 0x8000000F // PROC14 in Display DxAPI table in Script +#define GFSDXAPI_PROC16 0x80000010 // PROC16 in Display DxAPI table in Script +#define GFSDXAPI_PROC17 0x80000011 // PROC17 in Display DxAPI table in Script +#define GFSDXAPI_PROC18 0x80000012 // PROC18 in Display DxAPI table in Script +#define GFSDXAPI_PROC19 0x80000013 // PROC19 in Display DxAPI table in Script +#define GFSDXAPI_PROC20 0x80000014 // PROC20 in Display DxAPI table in Script +#define GFSDXAPI_PROC21 0x80000015 // PROC21 in Display DxAPI table in Script +#define GFSDXAPI_PROC22 0x80000016 // PROC22 in Display DxAPI table in Script +#define GFSDXAPI_PROC23 0x80000017 // PROC23 in Display DxAPI table in Script +#define GFSDXAPI_PROC24 0x80000018 // PROC24 in Display DxAPI table in Script +#define GFSDXAPI_PROC25 0x80000019 // PROC25 in Display DxAPI table in Script +#define GFSDXAPI_PROC26 0x8000001A // PROC26 in Display DxAPI table in Script +#define GFSDXAPI_PROC27 0x8000001B // PROC27 in Display DxAPI table in Script +#define GFSDXAPI_PROC28 0x8000001C // PROC28 in Display DxAPI table in Script +#define GFSDXAPI_PROC29 0x8000001D // PROC29 in Display DxAPI table in Script +#define GFSDXAPI_PROC30 0x8000001E // PROC30 in Display DxAPI table in Script +#define GFSDXAPI_PROC31 0x8000001F // PROC31 in Display DxAPI table in Script +#define GFSDXAPI_PROC_END 0x8000FFFF // PROC End in Display DxAPI table in Script + +#define OFFSET_DISP_SIGNAL_OPTIONS0 0x00000101 + +#define GFSCMD_H_PULSE0 0x00088101 +#define GFSCMD_H_PULSE1 0x000A8101 +#define GFSCMD_H_PULSE2 0x000C8101 +#define GFSCMD_V_PULSE0 0x00108101 +#define GFSCMD_V_PULSE1 0x00128101 +#define GFSCMD_V_PULSE2 0x00138101 +#define GFSCMD_V_PULSE3 0x00148101 +#define GFSCMD_M0 0x00188101 +#define GFSCMD_M1 0x001A8101 + +#define GF_H_PULSE0_DISABLE 0x00000000 +#define GF_H_PULSE0_ENABLE 0x00000100 +#define GF_H_PULSE1_DISABLE 0x00000000 +#define GF_H_PULSE1_ENABLE 0x00000400 +#define GF_H_PULSE2_DISABLE 0x00000000 +#define GF_H_PULSE2_ENABLE 0x00001000 +#define GF_V_PULSE0_DISABLE 0x00000000 +#define GF_V_PULSE0_ENABLE 0x00010000 +#define GF_V_PULSE1_DISABLE 0x00000000 +#define GF_V_PULSE1_ENABLE 0x00040000 +#define GF_V_PULSE2_DISABLE 0x00000000 +#define GF_V_PULSE2_ENABLE 0x00080000 +#define GF_V_PULSE3_DISABLE 0x00000000 +#define GF_V_PULSE3_ENABLE 0x00100000 +#define GF_M0_DISABLE 0x00000000 +#define GF_M0_ENABLE 0x01000000 +#define GF_M1_DISABLE 0x00000000 +#define GF_M1_ENABLE 0x02000000 + + +// Display Signal Options 1 + +#define OFFSET_DISP_SIGNAL_OPTIONS1 0x00000102 +#define GFSCMD_DI 0x00108102 +#define GFSCMD_PP 0x00128102 + +#define GF_DI_DISABLE 0x00000000 +#define GF_DI_ENABLE 0x00010000 +#define GF_PP_DISABLE 0x00000000 +#define GF_PP_ENABLE 0x00040000 + +#define OFFSET_H_PULSE0_CONTROL 0x0000010c + +#define GFSCMD_H_PULSE0_MODE 0x0003810c +#define GFSCMD_H_PULSE0_POLARITY 0x0004810c +#define GFSCMD_H_PULSE0_V_QUAL 0x0006810c +#define GFSCMD_H_PULSE0_LAST 0x0008810c + +#define GF_H_PULSE0_MODE_NORMAL 0x00000000 +#define GF_H_PULSE0_MODE_ONE_CLOCK 0x00000008 +#define GF_H_PULSE0_POLARITY_HIGH 0x00000000 +#define GF_H_PULSE0_POLARITY_LOW 0x00000010 +#define GF_H_PULSE0_V_QUAL_ALWAYS 0x00000000 +#define GF_H_PULSE0_V_QUAL_VACTIVE 0x00000080 +#define GF_H_PULSE0_V_QUAL_VACTIVE1 0x000000A0 +#define GF_H_PULSE0_LAST_START_A 0x00000000 +#define GF_H_PULSE0_LAST_END_A 0x00000100 +#define GF_H_PULSE0_LAST_START_B 0x00000200 +#define GF_H_PULSE0_LAST_END_B 0x00000300 +#define GF_H_PULSE0_LAST_START_C 0x00000400 +#define GF_H_PULSE0_LAST_END_C 0x00000500 +#define GF_H_PULSE0_LAST_START_D 0x00000600 +#define GF_H_PULSE0_LAST_END_D 0x00000700 + +#define OFFSET_H_PULSE0_POSITION_A 0x0000010d +#define GFSCMD_H_PULSE0_POSITION_A 0x0000810d + +#define OFFSET_H_PULSE1_CONTROL 0x00000111 + +#define GFSCMD_H_PULSE1_MODE 0x00038111 +#define GFSCMD_H_PULSE1_POLARITY 0x00048111 +#define GFSCMD_H_PULSE1_V_QUAL 0x00068111 +#define GFSCMD_H_PULSE1_LAST 0x00088111 + +#define GF_H_PULSE1_MODE_NORMAL 0x00000000 +#define GF_H_PULSE1_MODE_ONE_CLOCK 0x00000008 +#define GF_H_PULSE1_POLARITY_HIGH 0x00000000 +#define GF_H_PULSE1_POLARITY_LOW 0x00000010 +#define GF_H_PULSE1_V_QUAL_ALWAYS 0x00000000 +#define GF_H_PULSE1_V_QUAL_VACTIVE 0x00000080 +#define GF_H_PULSE1_V_QUAL_VACTIVE1 0x000000A0 +#define GF_H_PULSE1_LAST_START_A 0x00000000 +#define GF_H_PULSE1_LAST_END_A 0x00000100 +#define GF_H_PULSE1_LAST_START_B 0x00000200 +#define GF_H_PULSE1_LAST_END_B 0x00000300 +#define GF_H_PULSE1_LAST_START_C 0x00000400 +#define GF_H_PULSE1_LAST_END_C 0x00000500 +#define GF_H_PULSE1_LAST_START_D 0x00000600 +#define GF_H_PULSE1_LAST_END_D 0x00000700 + +#define OFFSET_H_PULSE1_POSITION_A 0x00000112 +#define GFSCMD_H_PULSE1_POSITION_A 0x00008112 + +#define OFFSET_H_PULSE2_CONTROL 0x00000116 +#define GFSCMD_H_PULSE2_MODE 0x00038116 +#define GFSCMD_H_PULSE2_POLARITY 0x00048116 +#define GFSCMD_H_PULSE2_V_QUAL 0x00068116 +#define GFSCMD_H_PULSE2_LAST 0x00088116 + +#define GF_H_PULSE2_MODE_NORMAL 0x00000000 +#define GF_H_PULSE2_MODE_ONE_CLOCK 0x00000008 +#define GF_H_PULSE2_POLARITY_HIGH 0x00000000 +#define GF_H_PULSE2_POLARITY_LOW 0x00000010 +#define GF_H_PULSE2_V_QUAL_ALWAYS 0x00000000 +#define GF_H_PULSE2_V_QUAL_VACTIVE 0x00000080 +#define GF_H_PULSE2_V_QUAL_VACTIVE1 0x000000A0 +#define GF_H_PULSE2_LAST_START_A 0x00000000 +#define GF_H_PULSE2_LAST_END_A 0x00000100 +#define GF_H_PULSE2_LAST_START_B 0x00000200 +#define GF_H_PULSE2_LAST_END_B 0x00000300 +#define GF_H_PULSE2_LAST_START_C 0x00000400 +#define GF_H_PULSE2_LAST_END_C 0x00000500 +#define GF_H_PULSE2_LAST_START_D 0x00000600 +#define GF_H_PULSE2_LAST_END_D 0x00000700 + +#define OFFSET_H_PULSE2_POSITION_A 0x00000117 +#define GFSCMD_H_PULSE2_POSITION_A 0x00008117 + +#define GFSCMD_V_PULSE0_POLARITY 0x0004811b +#define GFSCMD_V_PULSE0_DELAY_CNTRL 0x0006811b +#define GFSCMD_V_PULSE0_LAST 0x0008811b + +#define GF_V_PULSE0_POLARITY_HIGH 0x00000000 +#define GF_V_PULSE0_POLARITY_LOW 0x00000010 +#define GF_V_PULSE0_NODELAY 0x00000000 +#define GF_V_PULSE0_DELAY 0x00000040 +#define GF_V_PULSE0_DELAY1 0x00000080 +#define GF_V_PULSE0_LAST_START_A 0x00000000 +#define GF_V_PULSE0_LAST_END_A 0x00000100 +#define GF_V_PULSE0_LAST_START_B 0x00000200 +#define GF_V_PULSE0_LAST_END_B 0x00000300 +#define GF_V_PULSE0_LAST_START_C 0x00000400 +#define GF_V_PULSE0_LAST_END_C 0x00000500 + +#define OFFSET_V_PULSE0_POSITION_A 0x0000011c +#define GFSCMD_V_PULSE0_POSITION_A 0x0000811c + +#define GF_V_PULSE0_START_A 0x00000000 +#define GF_V_PULSE0_END_A 0x00010000 + +#define GFSCMD_V_PULSE1_POLARITY 0x0004811f +#define GFSCMD_V_PULSE1_DELAY_CNTRL 0x0006811f +#define GFSCMD_V_PULSE1_LAST 0x0008811f + +#define GF_V_PULSE1_POLARITY_HIGH 0x00000000 +#define GF_V_PULSE1_POLARITY_LOW 0x00000010 +#define GF_V_PULSE1_NODELAY 0x00000000 +#define GF_V_PULSE1_DELAY1 0x00000040 +#define GF_V_PULSE1_DELAY2 0x00000080 +#define GF_V_PULSE1_LAST_START_A 0x00000000 +#define GF_V_PULSE1_LAST_END_A 0x00000100 +#define GF_V_PULSE1_LAST_START_B 0x00000200 +#define GF_V_PULSE1_LAST_END_B 0x00000300 +#define GF_V_PULSE1_LAST_START_C 0x00000400 +#define GF_V_PULSE1_LAST_END_C 0x00000500 + +#define OFFSET_V_PULSE1_POSITION_A 0x00000120 +#define GFSCMD_V_PULSE1_POSITION_A 0x00008120 + +#define OFFSET_M0_CONTROL 0x00000127 +#define GFSCMD_M0_CLOCK_SELECT 0x00008127 +#define GFSCMD_M0_PHASE_CONTROL 0x00048127 +#define GFSCMD_M0_PHASE_RESET 0x00068127 +#define GFSCMD_M0_POLARITY 0x00078127 +#define GFSCMD_M0_PERIOD 0x00088127 +#define GFSCMD_M0_H_POSITION 0x00108127 + +#define GF_M0_CLOCK_SELECT_PCLK 0x00000000 +#define GF_M0_CLOCK_SELECT_LCLK 0x00000002 +#define GF_M0_CLOCK_SELECT_FCLK 0x00000003 +#define GF_M0_PHASE_CONTROL_FREE_RUN 0x00000000 +#define GF_M0_PHASE_CONTROL_VACTIVE_RESTART 0x00000020 +#define GF_M0_PHASE_CONTROL_FRAME_INVERT 0x00000030 +#define GF_M0_PHASE_RESET_NOT_RESET 0x00000000 +#define GF_M0_PHASE_RESET_RESET 0x00000040 +#define GF_M0_POLARITY_HIGH 0x00000000 +#define GF_M0_POLARITY_LOW 0x00000080 +#define GF_M0_PERIOD_VAL 0x00000100 +#define GF_M0_H_POSITION_VAL 0x00010000 + +#define OFFSET_M1_CONTROL 0x00000128 +#define GFSCMD_M1_CLOCK_SELECT 0x00008128 +#define GFSCMD_M1_PHASE_CONTROL 0x00048128 +#define GFSCMD_M1_PHASE_RESET 0x00068128 +#define GFSCMD_M1_POLARITY 0x00078128 +#define GFSCMD_M1_PERIOD 0x00088128 +#define GFSCMD_M1_H_POSITION 0x00108128 + +#define GF_M1_CLOCK_SELECT_PCLK 0x00000000 +#define GF_M1_CLOCK_SELECT_LCLK 0x00000002 +#define GF_M1_CLOCK_SELECT_FCLK 0x00000003 +#define GF_M1_PHASE_CONTROL_FREE_RUN 0x00000000 +#define GF_M1_PHASE_CONTROL_VACTIVE_RESTART 0x00000020 +#define GF_M1_PHASE_CONTROL_FRAME_INVERT 0x00000030 +#define GF_M1_PHASE_RESET_NOT_RESET 0x00000000 +#define GF_M1_PHASE_RESET_RESET 0x00000040 +#define GF_M1_POLARITY_HIGH 0x00000000 +#define GF_M1_POLARITY_LOW 0x00000080 +#define GF_M1_PERIOD_VAL 0x00000100 +#define GF_M1_H_POSITION_VAL 0x00010000 + +#define GF_DISP_CLOCK_CONTROL_0 0x0000012f + +#define GFSCMD_SHIFT_CLK_DIVIDER 0x0000812f +#define GFSCMD_PIXEL_CLK_DIVIDER 0x0008812f + +//#define GF_SHCLKD_1_256_VAL 0x00000000 +#define GF_PCD1 0x00000000 +#define GF_PCD1H 0x00000100 +#define GF_PCD2 0x00000200 +#define GF_PCD3 0x00000300 +#define GF_PCD4 0x00000400 +#define GF_PCD6 0x00000500 +#define GF_PCD8 0x00000600 +#define GF_PCD9 0x00000700 +#define GF_PCD12 0x00000800 +#define GF_PCD16 0x00000900 +#define GF_PCD13 0x00000a00 +#define GF_PCD18 0x00000b00 +#define GF_PCD24 0x00000c00 + +#define OFFSET_DISP_INTERFACE_CONTROL 0x00000130 +#define GFSCMD_DISP_DATA_FORMAT 0x00008130 + +#define GFSCMD_DISP_DATA_ALIGNMENT 0x00088130 +#define GFSCMD_DISP_DATA_ORDER 0x00098130 + +#define GF_DF1P1C_PRLL 0x00000000 +#define GF_DF1P2C24B_PRLL 0x00000001 +#define GF_DF1P2C18B_PRLL 0x00000002 +#define GF_DF1P2C16B_PRLL 0x00000003 +#define GF_DF1CNL_SRL 0x00000004 +#define GF_DF2CNL_SRL 0x00000005 +#define GF_DF3CNL_SRL 0x00000006 +#define GF_DF_SPI 0x00000007 +#define GF_MSB 0x00000000 +#define GF_LSB 0x00000100 +#define GF_RED_BLUE 0x00000000 +#define GF_BLUE_RED 0x00000200 + +#define OFFSET_DISP_COLOR_CONTROL 0x00000131 +#define GFSCMD_BASE_COLOR_SIZE 0x00008131 +#define GFSCMD_DITHER_CONTROL 0x00088131 +#define GFSCMD_ORD_DITHER_ROTATION 0x000C8131 +#define GFSCMD_DISP_COLOR_SWAP 0x00108131 +#define GFSCMD_BLANK_COLOR 0x00118131 +#define GFSCMD_NON_BASE_COLOR 0x00128131 +#define GFSCMD_LCD_MD0 0x00188131 + +#define GF_BASE666 0x00000000 +#define GF_BASE111 0x00000001 +#define GF_BASE222 0x00000002 +#define GF_BASE333 0x00000003 +#define GF_BASE444 0x00000004 +#define GF_BASE555 0x00000005 +#define GF_BASE565 0x00000006 +#define GF_BASE332 0x00000007 +#define GF_BASE888 0x00000008 +#define GF_DISABLE 0x00000000 +#define GF_ORDERED 0x00000200 +#define GF_ERRDIFF 0x00000300 +#define GF_ORD_DITHER_ROTATION_VAL 0x00000000 +#define GF_SWAP_RGB 0x00000000 +#define GF_SWAP_BGR 0x00010000 +#define GF_BLANK_ZERO 0x00000000 +#define GF_BLANK_ONES 0x00020000 +#define GF_NON_BASE_ZERO 0x00000000 +#define GF_NON_BASE_ONES 0x00040000 +#define GF_LCD_MD0_LOW 0x00000000 +#define GF_LCD_MD0_HIGH 0x01000000 + + +#define OFFSET_SHIFT_CLOCK_OPTIONS 0x00000132 + +#define GFSCMD_SC0_H_QUALIFIER 0x00008132 +#define GFSCMD_SC0_V_QUALIFIER 0x00038132 +#define GFSCMD_SC0_CLK_DIVIDER 0x00068132 +#define GFSCMD_SC1_H_QUALIFIER 0x00108132 +#define GFSCMD_SC1_V_QUALIFIER 0x00138132 +#define GFSCMD_SC1_CLK_DIVIDER 0x00158132 + +#define GF_SC0_H_DISABLE 0x00000000 +#define GF_SC0_H_NO_HQUAL 0x00000001 +#define GF_SC0_H_HACTIVE 0x00000002 +#define GF_SC0_H_EXT_HACTIVE 0x00000003 +#define GF_SC0_H_HPULSE0 0x00000004 +#define GF_SC0_H_EXT_HPULSE0 0x00000005 +#define GF_SC0_V_NO_VQUAL 0x00000000 +#define GF_SC0_V_RESERVED 0x00000008 +#define GF_SC0_V_VACTIVE 0x00000010 +#define GF_SC0_V_EXT_VACTIVE 0x00000018 +#define GF_SC0_V_VPULSE0 0x00000020 +#define GF_SC0_V_EXT_VPULSE0 0x00000028 +#define GF_SC0_DIV1 0x00000000 +#define GF_SC0_DIV2 0x00000040 +#define GF_SC0_DIV4 0x00000080 + +#define GF_SC1_H_DISABLE 0x00000000 +#define GF_SC1_H_NO_HQUAL 0x00010000 +#define GF_SC1_H_HACTIVE 0x00020000 +#define GF_SC1_H_EXT_HACTIVE 0x00030000 +#define GF_SC1_H_HPULSE1 0x00040000 +#define GF_SC1_H_EXT_HPULSE1 0x00050000 +#define GF_SC1_V_NO_VQUAL 0x00000000 +#define GF_SC1_V_RESERVED 0x00080000 +#define GF_SC1_V_VACTIVE 0x00100000 +#define GF_SC1_V_EXT_VACTIVE 0x00180000 +#define GF_SC1_V_VPULSE1 0x00200000 +#define GF_SC1_V_EXT_VPULSE1 0x00280000 +#define GF_SC1_DIV1 0x00000000 +#define GF_SC1_DIV2 0x00400000 +#define GF_SC1_DIV4 0x00800000 + +#define OFFSET_DATA_ENABLE_OPTIONS 0x00000133 + +#define GFSCMD_DE_SELECT_ACTIVE 0x00008133 +#define GFSCMD_DE_CONTROL 0x00038133 + +#define GF_DE_ACTIVE_ALL_LINES 0x00000000 +#define GF_DE_ACTIVE_NOBLANK 0x00000001 +#define GF_DE_ONECLK 0x00000000 +#define GF_DE_NORMAL 0x00000004 +#define GF_DE_ONE_CLK_PRECD_ACTIVE 0x00000008 +#define GF_DE_ONE_PIXEL_CLK_EARLY 0x0000000C + + +#define OFFSET_SERIAL_INTERFACE_OPTIONS 0x00000134 +#define GFSCMD_SDT_STP_MODE 0x00008134 +#define GFSCMD_SDT_STP_DURATION 0x00028134 +#define GFSCMD_STH_DURATION 0x00068134 +#define GFSCMD_STP_CONTRO 0x00078134 + +#define GF_SDT_STP_DISABLE 0x00000000 +#define GF_SDT_STP_RESERVED 0x00000001 +#define GF_SDT_STP_ENABLE_DUP 0x00000002 +#define GF_SDT_STP_ENABLE 0x00000003 +#define GF_SDT_STP_DURATION_VAL 0x00000000 +#define GF_ONE_CLOCK 0x00000000 +#define GF_TWO_CLOCK 0x00000040 +#define GF_STP_NORMAL 0x00000000 +#define GF_STP_EXTENDED 0x00000080 + + +#define OFFSET_LCD_LSPI_OPTIONS 0x00000135 +#define GFSCMD_LCD_SPI_CS_MAIN 0x00008135 +#define GFSCMD_LCD_SPI_DC 0x00018135 +#define GFSCMD_SPI_CS_CONTROL_LCD_IS_SPI 0x00028135 +#define GFSCMD_LCD_SPI_DIRECTION_LSB2MSB 0x00048135 + +#define GF_CS_MAIN 0x00000000 +#define GF_CS_SUB 0x00000001 +#define GF_LDC_LOW 0x00000000 +#define GF_LDC_HIGH 0x00000002 +#define GF_LCD_IS_SPI 0x00000000 +#define GF_LCD_SPI 0x00000004 +#define GF_IS_SPI 0x00000008 +#define GF_FORCED 0x0000000C +#define GF_MSB2LSB 0x00000000 +#define GF_LSB2MSB 0x00000010 + + +#define OFFSET_SIGNAL_RAISE 0x00000005 +#define GFSCMD_SIGNAL_RAISE_VECTOR 0x00008005 +#define GFSCMD_SIGNAL_RAISE_SELECT 0x00088005 +#define GFSCMD_SIGNAL_RAISE_CHANNEL_ID 0x00108005 + +#define GF_RAISE_VECTOR_VAL 0x00000000 +#define GF_RAISE_NONE 0x00000000 +#define GF_RAISE_FRAME_END 0x00000100 +#define GF_RAISE_VBLANK 0x00000200 +#define GF_RAISE_VPULSE3 0x00000300 +#define GF_RAISE_CHANNEL_ID_VAL 0x00000000 + + +#define OFFSET_SIGNAL_REFCOUNT 0x00000006 +#define GFSCMD_SIGNAL_REFCOUNT_VECTOR 0x00008006 +#define GFSCMD_SIGNAL_REFCOUNT_SELECT 0x00108006 + +#define GF_REFCOUNT_VECTOR_VAL 0x00000000 +#define GF_REFCOUNT_NONE 0x00000000 +#define GF_REFCOUNT_FRAME_END 0x00010000 + + + +// Display Power Control + +#define OFFSET_DISPLAY_POWER_CONTROL 0x00000009 +#define GFSCMD_PW0_CONTROL 0x00008009 +#define GFSCMD_PW1_CONTROL 0x00028009 +#define GFSCMD_PW2_CONTROL 0x00048009 +#define GFSCMD_PW3_CONTROL 0x00068009 +#define GFSCMD_PW4_CONTROL 0x00088009 +#define GFSCMD_PM0_CONTROL 0x00108009 +#define GFSCMD_PM1_CONTROL 0x00128009 +#define GFSCMD_SPI_CONTROL 0x00188009 +#define GFSCMD_HSPI_CONTROL 0x00198009 + +#define GF_PW0_DISABLE 0x00000000 +#define GF_PW0_ENABLE 0x00000001 +#define GF_PW1_DISABLE 0x00000000 +#define GF_PW1_ENABLE 0x00000004 +#define GF_PW2_DISABLE 0x00000000 +#define GF_PW2_ENABLE 0x00000010 +#define GF_PW3_DISABLE 0x00000000 +#define GF_PW3_ENABLE 0x00000040 +#define GF_PW4_DISABLE 0x00000000 +#define GF_PW4_ENABLE 0x00010000 +#define GF_PM0_DISABLE 0x00000000 +#define GF_PM0_ENABLE 0x00040000 +#define GF_PM1_DISABLE 0x00000000 +#define GF_PM1_ENABLE 0x00400000 +#define GF_SPI_DISABLE 0x00000000 +#define GF_SPI_ENABLE 0x01000000 +#define GF_HSPI_DISABLE 0x00000000 +#define GF_HSPI_ENABLE 0x02000000 + +// Pin Output Enable registers + +#define OFFSET_PIN_OUTPUT_ENABLE0 0x00000802 +#define GFSCMD_LD0_PIN_OUTPUT 0x00008802 +#define GFSCMD_LD1_PIN_OUTPUT 0x00028802 +#define GFSCMD_LD2_PIN_OUTPUT 0x00048802 +#define GFSCMD_LD3_PIN_OUTPUT 0x00068802 +#define GFSCMD_LD4_PIN_OUTPUT 0x00088802 +#define GFSCMD_LD5_PIN_OUTPUT 0x000a8802 +#define GFSCMD_LD6_PIN_OUTPUT 0x000c8802 +#define GFSCMD_LD7_PIN_OUTPUT 0x000e8802 +#define GFSCMD_LD8_PIN_OUTPUT 0x00108802 +#define GFSCMD_LD9_PIN_OUTPUT 0x00128802 +#define GFSCMD_LD10_PIN_OUTPUT 0x00148802 +#define GFSCMD_LD11_PIN_OUTPUT 0x00168802 +#define GFSCMD_LD12_PIN_OUTPUT 0x00188802 +#define GFSCMD_LD13_PIN_OUTPUT 0x001a8802 +#define GFSCMD_LD14_PIN_OUTPUT 0x001c8802 +#define GFSCMD_LD15_PIN_OUTPUT 0x001e8802 +#define GFSCMD_LD0_LD15_PIN_OUTPUT 0x00208802 + + +#define GF_LD0_OUTPUT_ENABLE 0x00000000 +#define GF_LD0_OUTPUT_DISABLE 0x00000001 +#define GF_LD1_OUTPUT_ENABLE 0x00000000 +#define GF_LD1_OUTPUT_DISABLE 0x00000004 +#define GF_LD2_OUTPUT_ENABLE 0x00000000 +#define GF_LD2_OUTPUT_DISABLE 0x00000010 +#define GF_LD3_OUTPUT_ENABLE 0x00000000 +#define GF_LD3_OUTPUT_DISABLE 0x00000040 +#define GF_LD4_OUTPUT_ENABLE 0x00000000 +#define GF_LD4_OUTPUT_DISABLE 0x00000100 +#define GF_LD5_OUTPUT_ENABLE 0x00000000 +#define GF_LD5_OUTPUT_DISABLE 0x00000400 +#define GF_LD6_OUTPUT_ENABLE 0x00000000 +#define GF_LD6_OUTPUT_DISABLE 0x00001000 +#define GF_LD7_OUTPUT_ENABLE 0x00000000 +#define GF_LD7_OUTPUT_DISABLE 0x00004000 +#define GF_LD8_OUTPUT_ENABLE 0x00000000 +#define GF_LD8_OUTPUT_DISABLE 0x00010000 +#define GF_LD9_OUTPUT_ENABLE 0x00000000 +#define GF_LD9_OUTPUT_DISABLE 0x00040000 +#define GF_LD10_OUTPUT_ENABLE 0x00000000 +#define GF_LD10_OUTPUT_DISABLE 0x00100000 +#define GF_LD11_OUTPUT_ENABLE 0x00000000 +#define GF_LD11_OUTPUT_DISABLE 0x00400000 +#define GF_LD12_OUTPUT_ENABLE 0x00000000 +#define GF_LD12_OUTPUT_DISABLE 0x01000000 +#define GF_LD13_OUTPUT_ENABLE 0x00000000 +#define GF_LD13_OUTPUT_DISABLE 0x04000000 +#define GF_LD14_OUTPUT_ENABLE 0x00000000 +#define GF_LD14_OUTPUT_DISABLE 0x10000000 +#define GF_LD15_OUTPUT_ENABLE 0x00000000 +#define GF_LD15_OUTPUT_DISABLE 0x40000000 +#define GF_LD0_LD15_OUTPUT_ENABLE 0x00000000 +#define GF_LD0_LD15_OUTPUT_DISABLE 0x55555555 + + +#define OFFSET_PIN_OUTPUT_ENABLE1 0x00000803 +#define GFSCMD_LD16_PIN_OUTPUT 0x00008803 +#define GFSCMD_LD17_PIN_OUTPUT 0x00028803 +#define GFSCMD_LPW0_PIN_OUTPUT 0x00108803 +#define GFSCMD_LPW1_PIN_OUTPUT 0x00128803 +#define GFSCMD_LPW2_PIN_OUTPUT 0x00148803 +#define GFSCMD_LSC0_PIN_OUTPUT 0x00188803 +#define GFSCMD_LSC1_PIN_OUTPUT 0x001a8803 +#define GFSCMD_LVS_PIN_OUTPUT 0x001c8803 +#define GFSCMD_LHS_PIN_OUTPUT 0x001e8803 +#define GFSCMD_LD16_LD17_PIN_OUTPUT 0x00208803 + +#define GF_LD16_OUTPUT_ENABLE 0x00000000 +#define GF_LD16_OUTPUT_DISABLE 0x00000001 +#define GF_LD17_OUTPUT_ENABLE 0x00000000 +#define GF_LD17_OUTPUT_DISABLE 0x00000004 +#define GF_LPW0_OUTPUT_ENABLE 0x00000000 +#define GF_LPW0_OUTPUT_DISABLE 0x00010000 +#define GF_LPW1_OUTPUT_ENABLE 0x00000000 +#define GF_LPW1_OUTPUT_DISABLE 0x00040000 +#define GF_LPW2_OUTPUT_ENABLE 0x00000000 +#define GF_LPW2_OUTPUT_DISABLE 0x00100000 +#define GF_LSC0_OUTPUT_ENABLE 0x00000000 +#define GF_LSC0_OUTPUT_DISABLE 0x01000000 +#define GF_LSC1_OUTPUT_ENABLE 0x00000000 +#define GF_LSC1_OUTPUT_DISABLE 0x04000000 +#define GF_LVS_OUTPUT_ENABLE 0x00000000 +#define GF_LVS_OUTPUT_DISABLE 0x10000000 +#define GF_LHS_OUTPUT_ENABLE 0x00000000 +#define GF_LHS_OUTPUT_DISABLE 0x40000000 +#define GF_LD16_LD17_OUTPUT_ENABLE 0x00000000 +#define GF_LD16_LD17_OUTPUT_DISABLE 0x00000005 + + +#define DC_PIN_OUTPUT_ENABLE2 0x00000804 +#define GFSCMD_LHP0_PIN_OUTPUT 0x00008804 +#define GFSCMD_LHP1_PIN_OUTPUT 0x00028804 +#define GFSCMD_LHP2_PIN_OUTPUT 0x00048804 +#define GFSCMD_LVP0_PIN_OUTPUT 0x00088804 +#define GFSCMD_LVP1_PIN_OUTPUT 0x000A8804 +#define GFSCMD_LM0_PIN_OUTPUT 0x00108804 +#define GFSCMD_LM1_PIN_OUTPUT 0x00128804 +#define GFSCMD_LDI_PIN_OUTPUT 0x00148804 +#define GFSCMD_LPP_PIN_OUTPUT 0x00168804 + +#define GF_LHP0_OUTPUT_ENABLE 0x00000000 +#define GF_LHP0_OUTPUT_DISABLE 0x00000001 +#define GF_LHP1_OUTPUT_ENABLE 0x00000000 +#define GF_LHP1_OUTPUT_DISABLE 0x00000004 +#define GF_LHP2_OUTPUT_ENABLE 0x00000000 +#define GF_LHP2_OUTPUT_DISABLE 0x00000010 +#define GF_LVP0_OUTPUT_ENABLE 0x00000000 +#define GF_LVP0_OUTPUT_DISABLE 0x00000100 +#define GF_LVP1_OUTPUT_ENABLE 0x00000000 +#define GF_LVP1_OUTPUT_DISABLE 0x00000404 +#define GF_LM0_OUTPUT_ENABLE 0x00000000 +#define GF_LM0_OUTPUT_DISABLE 0x00010000 +#define GF_LM1_OUTPUT_ENABLE 0x00000000 +#define GF_LM1_OUTPUT_DISABLE 0x00040000 +#define GF_LDI_OUTPUT_ENABLE 0x00000000 +#define GF_LDI_OUTPUT_DISABLE 0x00100000 +#define GF_LPP_OUTPUT_ENABLE 0x00000000 +#define GF_LPP_OUTPUT_DISABLE 0x00400000 + +#define OFFSET_OUTPUT_ENABLE3 0x00000805 +#define GFSCMD_LSCK_PIN_OUTPUT 0x00008805 +#define GFSCMD_LSDA_PIN_OUTPUT 0x00028805 +#define GFSCMD_LCSN_PIN_OUTPUT 0x00048805 +#define GFSCMD_LDC_PIN_OUTPUT 0x00068805 +#define GFSCMD_LSPI_PIN_OUTPUT 0x00088805 + +#define GF_LSCK_OUTPUT_ENABLE 0x00000000 +#define GF_LSCK_OUTPUT_DISABLE 0x00000001 +#define GF_LSDA_OUTPUT_ENABLE 0x00000000 +#define GF_LSDA_OUTPUT_DISABLE 0x00000004 +#define GF_LCSN_OUTPUT_ENABLE 0x00000000 +#define GF_LCSN_OUTPUT_DISABLE 0x00000010 +#define GF_LDC_OUTPUT_ENABLE 0x00000000 +#define GF_LDC_OUTPUT_DISABLE 0x00000040 +#define GF_LSPI_OUTPUT_ENABLE 0x00000000 +#define GF_LSPI_OUTPUT_DISABLE 0x00000100 + + +// Pin Output Polarity registers + +#define OFFSET_PIN_OUTPUT_POLARITY0 0x00000806 +#define GFSCMD_LD0_PIN_POLARITY 0x00008806 +#define GFSCMD_LD1_PIN_POLARITY 0x00028806 +#define GFSCMD_LD2_PIN_POLARITY 0x00048806 +#define GFSCMD_LD3_PIN_POLARITY 0x00068806 +#define GFSCMD_LD4_PIN_POLARITY 0x00088806 +#define GFSCMD_LD5_PIN_POLARITY 0x000a8806 +#define GFSCMD_LD6_PIN_POLARITY 0x000c8806 +#define GFSCMD_LD7_PIN_POLARITY 0x000e8806 +#define GFSCMD_LD8_PIN_POLARITY 0x00108806 +#define GFSCMD_LD9_PIN_POLARITY 0x00128806 +#define GFSCMD_LD10_PIN_POLARITY 0x00148806 +#define GFSCMD_LD11_PIN_POLARITY 0x00168806 +#define GFSCMD_LD12_PIN_POLARITY 0x00188806 +#define GFSCMD_LD13_PIN_POLARITY 0x001a8806 +#define GFSCMD_LD14_PIN_POLARITY 0x001c8806 +#define GFSCMD_LD15_PIN_POLARITY 0x001e8806 +#define GFSCMD_LD0_LD15_PIN_POLARITY 0x00208806 + + +#define GF_LD0_POLARITY_HIGH 0x00000000 +#define GF_LD0_POLARITY_LOW 0x00000001 +#define GF_LD1_POLARITY_HIGH 0x00000000 +#define GF_LD1_POLARITY_LOW 0x00000004 +#define GF_LD2_POLARITY_HIGH 0x00000000 +#define GF_LD2_POLARITY_LOW 0x00000010 +#define GF_LD3_POLARITY_HIGH 0x00000000 +#define GF_LD3_POLARITY_LOW 0x00000040 +#define GF_LD4_POLARITY_HIGH 0x00000000 +#define GF_LD4_POLARITY_LOW 0x00000100 +#define GF_LD5_POLARITY_HIGH 0x00000000 +#define GF_LD5_POLARITY_LOW 0x00000400 +#define GF_LD6_POLARITY_HIGH 0x00000000 +#define GF_LD6_POLARITY_LOW 0x00001000 +#define GF_LD7_POLARITY_HIGH 0x00000000 +#define GF_LD7_POLARITY_LOW 0x00004000 +#define GF_LD8_POLARITY_HIGH 0x00000000 +#define GF_LD8_POLARITY_LOW 0x00010000 +#define GF_LD9_POLARITY_HIGH 0x00000000 +#define GF_LD9_POLARITY_LOW 0x00040000 +#define GF_LD10_POLARITY_HIGH 0x00000000 +#define GF_LD10_POLARITY_LOW 0x00100000 +#define GF_LD11_POLARITY_HIGH 0x00000000 +#define GF_LD11_POLARITY_LOW 0x00400000 +#define GF_LD12_POLARITY_HIGH 0x00000000 +#define GF_LD12_POLARITY_LOW 0x01000000 +#define GF_LD13_POLARITY_HIGH 0x00000000 +#define GF_LD13_POLARITY_LOW 0x04000000 +#define GF_LD14_POLARITY_HIGH 0x00000000 +#define GF_LD14_POLARITY_LOW 0x10000000 +#define GF_LD15_POLARITY_HIGH 0x00000000 +#define GF_LD15_POLARITY_LOW 0x40000000 +#define GF_LD0_LD15_POLARITY_HIGH 0x00000000 +#define GF_LD0_LD15_POLARITY_LOW 0x55555555 + +#define OFFSET_PIN_OUTPUT_POLARITY1 0x00000807 +#define GFSCMD_LD16_PIN_POLARITY 0x00008807 +#define GFSCMD_LD17_PIN_POLARITY 0x00028807 +#define GFSCMD_LPW0_PIN_POLARITY 0x00108807 +#define GFSCMD_LPW1_PIN_POLARITY 0x00128807 +#define GFSCMD_LPW2_PIN_POLARITY 0x00148807 +#define GFSCMD_LSC0_PIN_POLARITY 0x00188807 +#define GFSCMD_LSC1_PIN_POLARITY 0x001a8807 +#define GFSCMD_LVS_PIN_POLARITY 0x001c8807 +#define GFSCMD_LHS_PIN_POLARITY 0x001e8807 +#define GFSCMD_LD16_LD17_PIN_POLARITY 0x00208807 + +#define GF_LD16_POLARITY_HIGH 0x00000000 +#define GF_LD16_POLARITY_LOW 0x00000001 +#define GF_LD17_POLARITY_HIGH 0x00000000 +#define GF_LD17_POLARITY_LOW 0x00000004 +#define GF_LPW0_POLARITY_HIGH 0x00000000 +#define GF_LPW0_POLARITY_LOW 0x00010000 +#define GF_LPW1_POLARITY_HIGH 0x00000000 +#define GF_LPW1_POLARITY_LOW 0x00040000 +#define GF_LPW2_POLARITY_HIGH 0x00000000 +#define GF_LPW2_POLARITY_LOW 0x00100000 +#define GF_LSC0_POLARITY_HIGH 0x00000000 +#define GF_LSC0_POLARITY_LOW 0x01000000 +#define GF_LSC1_POLARITY_HIGH 0x00000000 +#define GF_LSC1_POLARITY_LOW 0x04000000 +#define GF_LVS_POLARITY_HIGH 0x00000000 +#define GF_LVS_POLARITY_LOW 0x10000000 +#define GF_LHS_POLARITY_HIGH 0x00000000 +#define GF_LHS_POLARITY_LOW 0x40000000 +#define GF_LD16_LD17_POLARITY_HIGH 0x00000000 +#define GF_LD16_LD17_POLARITY_LOW 0x00000005 + +#define DC_PIN_OUTPUT_POLARITY2 0x00000808 +#define GFSCMD_LHP0_PIN_POLARITY 0x00008808 +#define GFSCMD_LHP1_PIN_POLARITY 0x00028808 +#define GFSCMD_LHP2_PIN_POLARITY 0x00048808 +#define GFSCMD_LVP0_PIN_POLARITY 0x00088808 +#define GFSCMD_LVP1_PIN_POLARITY 0x000A8808 +#define GFSCMD_LM0_PIN_POLARITY 0x00108808 +#define GFSCMD_LM1_PIN_POLARITY 0x00128808 +#define GFSCMD_LDI_PIN_POLARITY 0x00148808 +#define GFSCMD_LPP_PIN_POLARITY 0x00168808 + +#define GF_LHP0_POLARITY_HIGH 0x00000000 +#define GF_LHP0_POLARITY_LOW 0x00000001 +#define GF_LHP1_POLARITY_HIGH 0x00000000 +#define GF_LHP1_POLARITY_LOW 0x00000004 +#define GF_LHP2_POLARITY_HIGH 0x00000000 +#define GF_LHP2_POLARITY_LOW 0x00000010 +#define GF_LVP0_POLARITY_HIGH 0x00000000 +#define GF_LVP0_POLARITY_LOW 0x00000100 +#define GF_LVP1_POLARITY_HIGH 0x00000000 +#define GF_LVP1_POLARITY_LOW 0x00000404 +#define GF_LM0_POLARITY_HIGH 0x00000000 +#define GF_LM0_POLARITY_LOW 0x00010000 +#define GF_LM1_POLARITY_HIGH 0x00000000 +#define GF_LM1_POLARITY_LOW 0x00040000 +#define GF_LDI_POLARITY_HIGH 0x00000000 +#define GF_LDI_POLARITY_LOW 0x00100000 +#define GF_LPP_POLARITY_HIGH 0x00000000 +#define GF_LPP_POLARITY_LOW 0x00400000 + +#define OFFSET_OUTPUT_POLARITY3 0x00000809 +#define GFSCMD_LSCK_PIN_POLARITY 0x00008809 +#define GFSCMD_LSDA_PIN_POLARITY 0x00028809 +#define GFSCMD_LCSN_PIN_POLARITY 0x00048809 +#define GFSCMD_LDC_PIN_POLARITY 0x00068809 +#define GFSCMD_LSPI_PIN_POLARITY 0x00088809 + +#define GF_LSCK_POLARITY_HIGH 0x00000000 +#define GF_LSCK_POLARITY_LOW 0x00000001 +#define GF_LSDA_POLARITY_HIGH 0x00000000 +#define GF_LSDA_POLARITY_LOW 0x00000004 +#define GF_LCSN_POLARITY_HIGH 0x00000000 +#define GF_LCSN_POLARITY_LOW 0x00000010 +#define GF_LDC_POLARITY_HIGH 0x00000000 +#define GF_LDC_POLARITY_LOW 0x00000040 +#define GF_LSPI_POLARITY_HIGH 0x00000000 +#define GF_LSPI_POLARITY_LOW 0x00000100 + +// Pin Output data registers + +#define OFFSET_PIN_OUTPUT_DATA0 0x0000080a +#define GFSCMD_LD0_PIN_OUTPUT_DATA 0x0000880a +#define GFSCMD_LD1_PIN_OUTPUT_DATA 0x0002880a +#define GFSCMD_LD2_PIN_OUTPUT_DATA 0x0004880a +#define GFSCMD_LD3_PIN_OUTPUT_DATA 0x0006880a +#define GFSCMD_LD4_PIN_OUTPUT_DATA 0x0008880a +#define GFSCMD_LD5_PIN_OUTPUT_DATA 0x000a880a +#define GFSCMD_LD6_PIN_OUTPUT_DATA 0x000c880a +#define GFSCMD_LD7_PIN_OUTPUT_DATA 0x000e880a +#define GFSCMD_LD8_PIN_OUTPUT_DATA 0x0010880a +#define GFSCMD_LD9_PIN_OUTPUT_DATA 0x0012880a +#define GFSCMD_LD10_PIN_OUTPUT_DATA 0x0014880a +#define GFSCMD_LD11_PIN_OUTPUT_DATA 0x0016880a +#define GFSCMD_LD12_PIN_OUTPUT_DATA 0x0018880a +#define GFSCMD_LD13_PIN_OUTPUT_DATA 0x001a880a +#define GFSCMD_LD14_PIN_OUTPUT_DATA 0x001c880a +#define GFSCMD_LD15_PIN_OUTPUT_DATA 0x001e880a +#define GFSCMD_LD0_LD15_PIN_OUTPUT_DATA 0x0020880a + + +#define GF_LD0_DATA_LOW 0x00000002 +#define GF_LD0_DATA_HIGH 0x00000003 +#define GF_LD1_DATA_LOW 0x00000008 +#define GF_LD1_DATA_HIGH 0x0000000c +#define GF_LD2_DATA_LOW 0x00000020 +#define GF_LD2_DATA_HIGH 0x00000030 +#define GF_LD3_DATA_LOW 0x00000080 +#define GF_LD3_DATA_HIGH 0x000000c0 +#define GF_LD4_DATA_LOW 0x00000200 +#define GF_LD4_DATA_HIGH 0x00000300 +#define GF_LD5_DATA_LOW 0x00000800 +#define GF_LD5_DATA_HIGH 0x00000c00 +#define GF_LD6_DATA_LOW 0x00002000 +#define GF_LD6_DATA_HIGH 0x00003000 +#define GF_LD7_DATA_LOW 0x00008000 +#define GF_LD7_DATA_HIGH 0x0000c000 +#define GF_LD8_DATA_LOW 0x00020000 +#define GF_LD8_DATA_HIGH 0x00030000 +#define GF_LD9_DATA_LOW 0x00080000 +#define GF_LD9_DATA_HIGH 0x000c0000 +#define GF_LD10_DATA_LOW 0x00200000 +#define GF_LD10_DATA_HIGH 0x00300000 +#define GF_LD11_DATA_LOW 0x00800000 +#define GF_LD11_DATA_HIGH 0x00c00000 +#define GF_LD12_DATA_LOW 0x02000000 +#define GF_LD12_DATA_HIGH 0x03000000 +#define GF_LD13_DATA_LOW 0x08000000 +#define GF_LD13_DATA_HIGH 0x0c000000 +#define GF_LD14_DATA_LOW 0x20000000 +#define GF_LD14_DATA_HIGH 0x30000000 +#define GF_LD15_DATA_LOW 0x80000000 +#define GF_LD15_DATA_HIGH 0xc0000000 +#define GF_LD0_LD15_DATA_LOW 0xaaaaaaaa +#define GF_LD0_LD15_DATA_HIGH 0xffffffff + +#define OFFSET_PIN_OUTPUT_DATA1 0x0000080b +#define GFSCMD_LD16_PIN_OUTPUT_DATA 0x0000880b +#define GFSCMD_LD17_PIN_OUTPUT_DATA 0x0002880b +#define GFSCMD_LPW0_PIN_OUTPUT_DATA 0x0010880b +#define GFSCMD_LPW1_PIN_OUTPUT_DATA 0x0012880b +#define GFSCMD_LPW2_PIN_OUTPUT_DATA 0x0014880b +#define GFSCMD_LSC0_PIN_OUTPUT_DATA 0x0018880b +#define GFSCMD_LSC1_PIN_OUTPUT_DATA 0x001a880b +#define GFSCMD_LVS_PIN_OUTPUT_DATA 0x001c880b +#define GFSCMD_LHS_PIN_OUTPUT_DATA 0x001e880b +#define GFSCMD_LD16_LD17_PIN_OUTPUT_DATA 0x0020880b + +#define GF_LD16_DATA_LOW 0x00000002 +#define GF_LD16_DATA_HIGH 0x00000003 +#define GF_LD17_DATA_LOW 0x00000008 +#define GF_LD17_DATA_HIGH 0x0000000c +#define GF_LPW0_DATA_LOW 0x00020000 +#define GF_LPW0_DATA_HIGH 0x00030000 +#define GF_LPW1_DATA_LOW 0x00080000 +#define GF_LPW1_DATA_HIGH 0x000c0000 +#define GF_LPW2_DATA_LOW 0x00200000 +#define GF_LPW2_DATA_HIGH 0x00300000 +#define GF_LSC0_DATA_LOW 0x02000000 +#define GF_LSC0_DATA_HIGH 0x03000000 +#define GF_LSC1_DATA_LOW 0x08000000 +#define GF_LSC1_DATA_HIGH 0x0c000000 +#define GF_LVS_DATA_LOW 0x20000000 +#define GF_LVS_DATA_HIGH 0x30000000 +#define GF_LHS_DATA_LOW 0x80000000 +#define GF_LHS_DATA_HIGH 0xc0000000 +#define GF_LD16_LD17_DATA_LOW 0x0000000a +#define GF_LD16_LD17_DATA_HIGH 0x0000000f + + +#define OFFSET_PIN_OUTPUT_DATA2 0x0000080c +#define GFSCMD_LHP0_PIN_OUTPUT_DATA 0x0000880c +#define GFSCMD_LHP1_PIN_OUTPUT_DATA 0x0002880c +#define GFSCMD_LHP2_PIN_OUTPUT_DATA 0x0004880c +#define GFSCMD_LVP0_PIN_OUTPUT_DATA 0x0008880c +#define GFSCMD_LVP1_PIN_OUTPUT_DATA 0x000A880c +#define GFSCMD_LM0_PIN_OUTPUT_DATA 0x0010880c +#define GFSCMD_LM1_PIN_OUTPUT_DATA 0x0012880c +#define GFSCMD_LDI_PIN_OUTPUT_DATA 0x0014880c +#define GFSCMD_LPP_PIN_OUTPUT_DATA 0x0016880c + +#define GF_LHP0_DATA_LOW 0x00000002 +#define GF_LHP0_DATA_HIGH 0x00000003 +#define GF_LHP1_DATA_LOW 0x00000008 +#define GF_LHP1_DATA_HIGH 0x0000000c +#define GF_LHP2_DATA_LOW 0x00000020 +#define GF_LHP2_DATA_HIGH 0x00000030 +#define GF_LVP0_DATA_LOW 0x00000200 +#define GF_LVP0_DATA_HIGH 0x00000300 +#define GF_LVP1_DATA_LOW 0x00000800 +#define GF_LVP1_DATA_HIGH 0x00000c00 +#define GF_LM0_DATA_LOW 0x00020000 +#define GF_LM0_DATA_HIGH 0x00030000 +#define GF_LM1_DATA_LOW 0x00080000 +#define GF_LM1_DATA_HIGH 0x000c0000 +#define GF_LDI_DATA_LOW 0x00200000 +#define GF_LDI_DATA_HIGH 0x00300000 +#define GF_LPP_DATA_LOW 0x00800000 +#define GF_LPP_DATA_HIGH 0x00c00000 + +#define OFFSET_OUTPUT_DATA3 0x0000080d +#define GFSCMD_LSCK_PIN_OUTPUT_DATA 0x0000880d +#define GFSCMD_LSDA_PIN_OUTPUT_DATA 0x0002880d +#define GFSCMD_LCSN_PIN_OUTPUT_DATA 0x0004880d +#define GFSCMD_LDC_PIN_OUTPUT_DATA 0x0006880d +#define GFSCMD_LSPI_PIN_OUTPUT_DATA 0x0008880d + +#define GF_LSCK_DATA_LOW 0x00000002 +#define GF_LSCK_DATA_HIGH 0x00000003 +#define GF_LSDA_DATA_LOW 0x00000008 +#define GF_LSDA_DATA_HIGH 0x0000000c +#define GF_LCSN_DATA_LOW 0x00000020 +#define GF_LCSN_DATA_HIGH 0x00000030 +#define GF_LDC_DATA_LOW 0x00000080 +#define GF_LDC_DATA_HIGH 0x000000c0 +#define GF_LSPI_DATA_LOW 0x00000200 +#define GF_LSPI_DATA_HIGH 0x00000300 + +// Pin Input Enable + +#define GFSCMD_LSPI_PIN_INPUT 0x00088811 +#define GF_LSPI_INPUT_ENABLE 0x00000000 +#define GF_LSPI_INPUT_DISABLE 0x00000100 + +#define GFSCMD_LDC_PIN_INPUT 0x00088411 +#define GF_LDC_INPUT_ENABLE 0x00000000 +#define GF_LDC_INPUT_DISABLE 0x00000040 + +#define GFSCMD_LPP_PIN_INPUT 0x00168811 +#define GF_LPP_INPUT_ENABLE 0x00000000 +#define GF_LPP_INPUT_DISABLE 0x00400000 + +// Pin Output Select + +#define DC_PIN_OUTPUT_SELECT0 0x00000814 +#define GFSCMD_LD0_OUTPUT_SELECT 0x00008814 +#define GFSCMD_LD1_OUTPUT_SELECT 0x00048814 +#define GFSCMD_LD2_OUTPUT_SELECT 0x00088814 +#define GFSCMD_LD3_OUTPUT_SELECT 0x000C8814 +#define GFSCMD_LD4_OUTPUT_SELECT 0x00108814 +#define GFSCMD_LD5_OUTPUT_SELECT 0x00148814 +#define GFSCMD_LD6_OUTPUT_SELECT 0x00188814 +#define GFSCMD_LD7_OUTPUT_SELECT 0x001C8814 +#define GFSCMD_LD0_LD7_OUTPUT_SELECT 0x00208814 + +#define GF_LD0_PIN_FOR_LD0 0 +#define GF_LD0_PIN_FOR_LD0_OUT 1 +#define GF_LD0_PIN_FOR_SC_ 4 +#define GF_LD1_PIN_FOR_LD1 0 +#define GF_LD1_PIN_FOR_LD1_OUT 1 +#define GF_LD1_PIN_FOR_SC 4 +#define GF_LD2_PIN_FOR_LD2 0 +#define GF_LD2_PIN_FOR_LD2_OUT 1 +#define GF_LD2_PIN_FOR_SD0_ 4 +#define GF_LD3_PIN_FOR_LD3 0 +#define GF_LD3_PIN_FOR_LD3_OUT 1 +#define GF_LD3_PIN_FOR_SD0 4 +#define GF_LD4_PIN_FOR_LD4 0 +#define GF_LD4_PIN_FOR_LD4_OUT 1 +#define GF_LD4_PIN_FOR_SD1_ 4 +#define GF_LD5_PIN_FOR_LD5 0 +#define GF_LD5_PIN_FOR_LD5_OUT 1 +#define GF_LD5_PIN_FOR_SD1 4 +#define GF_LD6_PIN_FOR_LD6 0 +#define GF_LD6_PIN_FOR_LD6_OUT 1 +#define GF_LD6_PIN_FOR_STH 4 +#define GF_LD7_PIN_FOR_LD7 0 +#define GF_LD7_PIN_FOR_LD7_OUT 1 +#define GF_LD7_PIN_FOR_SDT 4 +#define GF_LD0_LD7_PIN_FOR_LD0_LD7 0x00000000 +#define GF_LD0_LD7_PIN_FOR_LD0_LD7_OUT 0x11111111 +#define GF_LD0_LD7_PIN_FOR_LPD0_LPD7_OUT 0x22222222 + +#define DC_PIN_OUTPUT_SELECT1 0x00000815 +#define GFSCMD_LD8_OUTPUT_SELECT 0x00008815 +#define GFSCMD_LD9_OUTPUT_SELECT 0x00048815 +#define GFSCMD_LD10_OUTPUT_SELECT 0x00088815 +#define GFSCMD_LD11_OUTPUT_SELECT 0x000C8815 +#define GFSCMD_LD12_OUTPUT_SELECT 0x00108815 +#define GFSCMD_LD13_OUTPUT_SELECT 0x00148815 +#define GFSCMD_LD14_OUTPUT_SELECT 0x00188815 +#define GFSCMD_LD15_OUTPUT_SELECT 0x001C8815 +#define GFSCMD_LD8_LD15_OUTPUT_SELECT 0x00208815 + +#define GF_LD8_PIN_FOR_LD8 0 +#define GF_LD8_PIN_FOR_LD8_OUT 1 +#define GF_LD8_PIN_FOR_LPD8_OUT 2 +#define GF_LD8_PIN_FOR_STP 4 +#define GF_LD9_PIN_FOR_LD9 0 +#define GF_LD9_PIN_FOR_LD9_OUT 1 +#define GF_LD9_PIN_FOR_LPD9_OUT 2 +#define GF_LD9_PIN_FOR_SD2_ 4 +#define GF_LD10_PIN_FOR_LD10 0 +#define GF_LD10_PIN_FOR_LD10_OUT 1 +#define GF_LD10_PIN_FOR_SD2 4 +#define GF_LD11_PIN_FOR_LD11 0 +#define GF_LD11_PIN_FOR_LD11_OUT 1 +#define GF_LD12_PIN_FOR_LD12 0 +#define GF_LD12_PIN_FOR_LD12_OUT 1 +#define GF_LD13_PIN_FOR_LD13 0 +#define GF_LD13_PIN_FOR_LD13_OUT 1 +#define GF_LD14_PIN_FOR_LD14 0 +#define GF_LD14_PIN_FOR_LD14_OUT 1 +#define GF_LD15_PIN_FOR_LD15 0 +#define GF_LD15_PIN_FOR_LD15_OUT 1 +#define GF_LD8_LD15_PIN_FOR_LD8_LD15 0x00000000 +#define GF_LD8_LD15_PIN_FOR_LD8_LD15_OUT 0x11111111 +#define GF_LD8_LD15_PIN_FOR_LPD8_LPD15_OUT 0x22222222 + +#define DC_PIN_OUTPUT_SELECT2 0x00000816 +#define GFSCMD_LD16_OUTPUT_SELECT 0x00008816 +#define GFSCMD_LD17_OUTPUT_SELECT 0x00048816 + +#define GF_LD16_PIN_FOR_LD16 0 +#define GF_LD16_PIN_FOR_LD16_OUT 1 +#define GF_LD17_PIN_FOR_LD17 0 +#define GF_LD17_PIN_FOR_LD17_OUT 1 + +#define OFFSET_PIN_OUTPUT_SELECT3 0x00000817 +#define GFSCMD_LPW0_OUTPUT_SELECT 0x00008817 +#define GFSCMD_LPW1_OUTPUT_SELECT 0x00048817 +#define GFSCMD_LPW2_OUTPUT_SELECT 0x00088817 +#define GFSCMD_LSC0_OUTPUT_SELECT 0x00108817 +#define GFSCMD_LSC1_OUTPUT_SELECT 0x00148817 +#define GFSCMD_LVS_OUTPUT_SELECT 0x00188817 +#define GFSCMD_LHS_OUTPUT_SELECT 0x001c8817 + +#define GF_LPW0_PIN_FOR_PW0 0 +#define GF_LPW0_PIN_FOR_PW0_OUT 1 +#define GF_LPW0_PIN_FOR_PW1 2 +#define GF_LPW0_PIN_FOR_PM0 3 +#define GF_LPW0_PIN_FOR_PW2 4 +#define GF_LPW1_PIN_FOR_PW1 0 +#define GF_LPW1_PIN_FOR_PW1_OUT 1 +#define GF_LPW1_PIN_FOR_PW2 2 +#define GF_LPW1_PIN_FOR_PM1 3 +#define GF_LPW1_PIN_FOR_PW3 4 +#define GF_LPW2_PIN_FOR_PW2 0 +#define GF_LPW2_PIN_FOR_PW2_OUT 1 +#define GF_LPW2_PIN_FOR_PW3 2 +#define GF_LPW2_PIN_FOR_PM0 3 +#define GF_LPW2_PIN_FOR_PW4 4 +#define GF_LSC0_PIN_FOR_LSC0 0 +#define GF_LSC0_PIN_FOR_LSC0_OUT 1 +#define GF_LSC1_PIN_FOR_LSC1 0 +#define GF_LSC1_PIN_FOR_LSC1_OUT 1 +#define GF_LSC1_PIN_FOR_LSC1_DE 2 +#define GF_LVS_PIN_FOR_VSYNC 0 +#define GF_LVS_PIN_FOR_LVS_OUT 1 +#define GF_LVS_PIN_FOR_PM1 3 +#define GF_LHS_PIN_FOR_HSYNC 0 +#define GF_LHS_PIN_FOR_LHS_OUT 1 +#define GF_LHS_PIN_FOR_PM0 3 + +#define OFSSET_PIN_OUTPUT_SELECT4 0x00000818 +#define GFSCMD_LHP0_OUTPUT_SELECT 0x00008818 +#define GFSCMD_LHP1_OUTPUT_SELECT 0x00048818 +#define GFSCMD_LHP2_OUTPUT_SELECT 0x00088818 +#define GFSCMD_LVP0_OUTPUT_SELECT 0x00108818 +#define GFSCMD_LVP1_OUTPUT_SELECT 0x00148818 + +#define GF_LHP0_PIN_FOR_LHP0 0 +#define GF_LHP0_PIN_FOR_LHP0_OUT 1 +#define GF_LHP0_PIN_FOR_LD21 2 +#define GF_LHP0_PIN_FOR_PM0 3 +#define GF_LHP1_PIN_FOR_LHP1 0 +#define GF_LHP1_PIN_FOR_LHP1_OUT 1 +#define GF_LHP1_PIN_FOR_LD18 2 +#define GF_LHP1_PIN_FOR_PM1 3 +#define GF_LHP2_PIN_FOR_LHP2 0 +#define GF_LHP2_PIN_FOR_LHP2_OUT 1 +#define GF_LHP2_PIN_FOR_LD19 2 +#define GF_LHP2_PIN_FOR_PM0 3 +#define GF_LHP2_PIN_FOR_LVP2 4 +#define GF_LVP0_PIN_FOR_LVP0 0 +#define GF_LVP0_PIN_FOR_LVP0_OUT 1 +#define GF_LVP0_PIN_FOR_PM0 3 +#define GF_LVP1_PIN_FOR_LVP1 0 +#define GF_LVP1_PIN_FOR_LVP1_OUT 1 +#define GF_LVP1_PIN_FOR_LD20 2 +#define GF_LVP1_PIN_FOR_PM1 3 +#define GF_LVP1_PIN_FOR_PW4 4 + +#define OFFSET_PIN_OUTPUT_SELECT5 0x00000819 +#define GFSCMD_LM0_OUTPUT_SELECT 0x00008819 +#define GFSCMD_LM1_OUTPUT_SELECT 0x00048819 +#define GFSCMD_LDI_OUTPUT_SELECT 0x00088819 +#define GFSCMD_LPP_OUTPUT_SELECT 0x000c8819 + +#define GF_LM0_PIN_FOR_LM0 0 +#define GF_LM0_PIN_FOR_LM0_OUT 1 +#define GF_LM0_PIN_FOR_SCS 2 +#define GF_LM0_PIN_FOR_PM0 3 +#define GF_LM0_PIN_FOR_LVP2 4 +#define GF_LM1_PIN_FOR_M1 0 +#define GF_LM1_PIN_FOR_LM1_OUT 1 +#define GF_LM1_PIN_FOR_LD21 2 +#define GF_LM1_PIN_FOR_PM1 3 +#define GF_LM1_PIN_FOR_LVP3 4 +#define GF_LDI_PIN_FOR_DI 0 +#define GF_LDI_PIN_FOR_LDI_OUT 1 +#define GF_LDI_PIN_FOR_LD22 2 +#define GF_LDI_PIN_FOR_PM0 3 +#define GF_LDI_PIN_FOR_SCS 4 +#define GF_LPP_PIN_FOR_PP 0 +#define GF_LPP_PIN_FOR_LPP_OUT 1 +#define GF_LPP_PIN_FOR_LD23 2 +#define GF_LPP_PIN_FOR_PM1 3 +#define GF_LPP_PIN_FOR_LVP3 4 + +#define OFFSET_PIN_OUTPUT_SELECT6 0x0000081a +#define GFSCMD_LSCK_OUTPUT_SELECT 0x0000881a +#define GFSCMD_LSDA_OUTPUT_SELECT 0x0004881a +#define GFSCMD_LCSN_OUTPUT_SELECT 0x0008881a +#define GFSCMD_LDC_OUTPUT_SELECT 0x000c881a +#define GFSCMD_LSPI_OUTPUT_SELECT 0x0010881a + +#define GF_LSCK_PIN_FOR_SCK 0 +#define GF_LSCK_PIN_FOR_LSCK_OUT 1 +#define GF_LSCK_PIN_FOR_PM0 3 +#define GF_LSDA_PIN_FOR_SDA 0 +#define GF_LSDA_PIN_FOR_LSDA_OUT 1 +#define GF_LSDA_PIN_FOR_SCS 2 +#define GF_LSDA_PIN_FOR_PM1 3 +#define GF_LCS_PIN_FOR_MCS 0 +#define GF_LCS_PIN_FOR_LCS_OUT 1 +#define GF_LCS_PIN_FOR_PM0 3 +#define GF_LDC_PIN_FOR_SDC 0 +#define GF_LDC_PIN_FOR_LDC_OUT 1 +#define GF_LDC_PIN_FOR_LD22 2 +#define GF_LDC_PIN_FOR_PM1 3 +#define GF_LSPI_PIN_FOR_SPI 0 +#define GF_LSPI_PIN_FOR_LSPI_OUT 1 +#define GF_LSPI_PIN_FOR_DE 2 +#define GF_LSPI_PIN_FOR_PM0 3 +#define GF_LSPI_PIN_FOR_PCLK 4 + + +//#define OFFSET_PIN_MISC_CONTROL 0x0000081b +//#define DISP_CLOCK_OUTPUT_MASK +//#define DISP_CLOCK_OUTPUT_SHIFT +//#define DISP_CLOCK_OUTPUT_DISABLE +//#define DISP_CLOCK_OUTPUT_ENABLE + +#define OFFSET_PM0_CONTROL 0x0000081c +#define GFSCMD_PM0_CLOCK_SELECT 0x0000881c +#define GFSCMD_PM0_CLOCK_DIVIDER 0x0004881c +#define GFSCMD_PM0_PERIOD 0x0012881c + +#define GF_PM0_SHIFT_CLOCK 0x00000000 +#define GF_PM0_PIXEL_CLOCK 0x00000001 +#define GF_PM0_LINE_CLOCK 0x00000002 +#define GF_PM0_FRAME_CLOCK 0x00000003 +#define GF_PM0_CLOCK_DIVIDER_VAL 0x00000010 +#define GF_PM0_PERIOD_VAL 0x00040000 + +#define OFFSET_PM0_DUTY_CYCLE 0x0000081d +#define GFSCMD_PM0_DUTY_CYCLE 0x0000881d + +#define GF_PM0_DUTY_CYCLE_VAL 0x00000000 + +#define OFFSET_PM1_CONTROL 0x0000081e +#define GFSCMD_PM1_CLOCK_SELECT 0x0000881e +#define GFSCMD_PM1_CLOCK_DIVIDER 0x0004881e +#define GFSCMD_PM1_PERIOD 0x0012881e + +#define GF_PM1_SHIFT_CLOCK 0x00000000 +#define GF_PM1_PIXEL_CLOCK 0x00000001 +#define GF_PM1_LINE_CLOCK 0x00000002 +#define GF_PM1_FRAME_CLOCK 0x00000003 +#define GF_PM1_CLOCK_DIVIDER_VAL 0x00000010 +#define GF_PM1_PERIOD_VAL 0x00040000 + +#define OFFSET_PM1_DUTY_CYCLE 0x0000081f +#define GFSCMD_PM1_DUTY_CYCLE 0x0000881f + +#define GF_PM1_DUTY_CYCLE_VAL 0x00000000 + +//////////////////////// +#define OFFSET_SPI_CONTROL 0x00000820 +#define GFSCMD_SPI_SERIAL_CLK_CONTROL 0x00008820 +#define GFSCMD_SPI_DATA_DIRECTION 0x00038820 +#define GFSCMD_SPI_BITS_PER_CYCLE 0x00048820 +#define GFSCMD_SPI_CLK_DIVIDER_1_32 0x00108820 +#define GFSCMD_SPI_STATUS 0x00188820 + +#define GF_SPI_1SCLK_CS_RISING_EDGE_ACTV 0x00000000 +#define GF_SPI_2SCLK_CS_RISING_EDGE_ACTV 0x00000001 +#define GF_SPI_1SCLK_CS_FALLING_EDGE_ACTV 0x00000002 +#define GF_SPI_2SCLK_CS_FALLING_EDGE_ACTV 0x00000003 +#define GF_SPI_MSB2LSB 0x00000000 +#define GF_SPI_LSB2MSB 0x00000008 +#define GF_SPI8 0x00000000 +#define GF_SPI8DC 0x00000010 +#define GF_SPI12 0x00000020 +#define GF_SPI16 0x00000030 +#define GF_SPI16DC 0x00000040 +#define GF_START_BYTE_PLUS_SPI16 0x00000050 +#define GF_SPI18 0x00000060 +#define GF_SPI24 0x00000070 +//#define GF_SPI_CLK_DIVIDER_1_32_VAL +#define GF_SPI_STATUS_DISABLE 0x00000000 +#define GF_STATUS_ENABLE_HOST_SPI 0x01000000 +#define GF_STATUS_ENABLE_HOST_IS_SPI 0x02000000 +#define GF_STATUS_ENABLE_ALL_SPI_CYCL 0x03000000 + +//#define OFFSET_HSPI_START_BYTE 0x00000821 +#define GFSCMD_HSPI_DATA_START_BYTE 0x00008821 +#define GFSCMD_HSPI_START_BYTE 0x00008821 +//#define GFSCMD_HSPI_COMMAND_START_BYTE 0x00088821 + +//#define OFFSET_HSPI_WRITE_DATA_CD 0x00000822 +#define GFSCMD_HSPI_WRITE_DATA_A 0x00008822 +#define GFSCMD_HSPI_WRITE_DATA_B 0x00088822 +#define GFSCMD_HSPI_WRITE_DATA_AB 0x00208822 + +//#define OFFSET_HSPI_WRITE_DATA_CD 0x00000823 +#define GFSCMD_HSPI_WRITE_DATA_C 0x00008823 +#define GFSCMD_HSPI_WRITE_DATA_D 0x00088823 +#define GFSCMD_HSPI_WRITE_DATA_CD 0x00208823 + +#define GF_HSPI_CMD_CYCLE1 0 +#define GF_HSPI_CMD_CYCLE2 0 +#define GF_HSPI_CMD_CYCLE3 0 +#define GF_HSPI_CMD_CYCLE4 0 + +#define GF_HSPI_DATA_CYCLE1 1 +#define GF_HSPI_DATA_CYCLE2 2 +#define GF_HSPI_DATA_CYCLE3 4 +#define GF_HSPI_DATA_CYCLE4 8 + +#define GF_HSPI_MAIN_CS_CYCLE1 1 +#define GF_HSPI_MAIN_CS_CYCLE2 2 +#define GF_HSPI_MAIN_CS_CYCLE3 4 +#define GF_HSPI_MAIN_CS_CYCLE4 8 + +#define GF_HSPI_SUB_CS_CYCLE1 1 +#define GF_HSPI_SUB_CS_CYCLE2 2 +#define GF_HSPI_SUB_CS_CYCLE3 4 +#define GF_HSPI_SUB_CS_CYCLE4 8 + +////////////////////////// + +#if 0 +// LCD SPI interface signals + +#define DC_P_LCD_SPI_OPTIONS 0x00000135 +#define GF_LCD_SPI_CS 0x00008135 +#define GF_LCD_SPI_DC 0x00018135 +#define GF_SPI_CS_CONTROL 0x00028135 +#define GF_LCD_SPI_DIRECTION 0x00048135 + +#define GF_LCD_SPI_CS_MAIN 0x00000000 +#define GF_LCD_SPI_CS_SUB 0x00000001 +#define GF_LCD_SPI_DC_LOW 0x00000000 +#define GF_LCD_SPI_DC_HIGH 0x00000002 +#define GF_SPI_CS_CONTROL_LCD_IS_SPI 0x00000000 +#define GF_SPI_CS_CONTROL_LCD_SPI 0x00000004 +#define GF_SPI_CS_CONTROL_IS_SPI 0x00000008 +#define GF_SPI_CS_CONTROL_FORCED 0x0000000C +#define GF_LCD_SPI_DIRECTION_MSB2LSB 0x00000000 +#define GF_LCD_SPI_DIRECTION_LSB2MSB 0x00000010 +#endif + +// Class: Initialization Sequence (IS) + +#define OFSSET_P_INIT_SEQ_CONTROL 0x00000141 +#define GFSCMD_SEND_INIT_SEQUENCE 0x00008141 +#define GFSCMD_INIT_SEQUENCE_MODE_PLCD 0x00018141 +#define GFSCMD_INIT_SEQ_DC_SIGNAL_NODC 0x00048141 +#define GFSCMD_INIT_SEQ_DC_CONTROL 0x00078141 +#define GFSCMD_FRAME_INIT_SEQ_CYCLES 0x00088141 + +#define GF_SEND_INIT_SEQUENCE_DISABLE 0x00000000 +#define GF_SEND_INIT_SEQUENCE_ENABLE 0x00000001 +#define GF_INIT_SEQUENCE_MODE_PLCD_INIT 0x00000000 +#define GF_INIT_SEQUENCE_MODE_SPI_INIT 0x00000002 +#define GF_INIT_SEQ_SIGNAL_NODC 0x00000000 +#define GF_INIT_SEQ_SIGNAL_VSYNC 0x00000010 +#define GF_INIT_SEQ_SIGNAL_VPULSE0 0x00000020 +#define GF_INIT_SEQ_SIGNAL_VPULSE1 0x00000030 +#define GF_INIT_SEQ_SIGNAL_VPULSE2 0x00000040 +#define GF_INIT_SEQ_SIGNAL_VPULSE3 0x00000050 +#define GF_INIT_SEQ_CONTROL 0x00000080 + +//#define GF_FRAME_INIT_SEQ_CYCLES 0x00000100 + + +// SPI Init Sequence Write Data bits 31-0 +#define DC_P_SPI_INIT_SEQ_DATA_A 0x00000142 +#define GFSCMD_SPI_INIT_SEQ_DATA_A 0x00008142 + +// SPI Init Sequence Write Data bits 63-32 +#define DC_P_SPI_INIT_SEQ_DATA_B 0x00000143 +#define GFSCMD_SPI_INIT_SEQ_DATA_B 0x00008143 + +// SPI Init Sequence Write Data bits 95-64 +#define DC_P_SPI_INIT_SEQ_DATA_C 0x00000144 +#define GFSCMD_SPI_INIT_SEQ_DATA_C 0x00008144 + +// SPI Init Sequence Write Data bits 127-96 +#define DC_P_SPI_INIT_SEQ_DATA_D 0x00000145 +#define GFSCMD_SPI_INIT_SEQ_DATA_D 0x00008145 + +#define OFFSET_DISPLAY_COMMAND 0x00000003 +#define GFSCMD_DISPLAY_CTRL_MODE 0x00058003 + +#define GF_CTRL_MODE_STOP 0x00000000 +#define GF_CTRL_MODE_C_DISPLAY 0x00000020 +#define GF_CTRL_MODE_NC_DISPLAY 0x00000040 +#define GF_CTRL_MODE_NOCHANGE 0x000000C0 + + +/* Other Commands */ + +#define GF_NO_DATA 0x00000000 +#define GFSCMD_LVDD_ON 0x01020000 +#define GFSCMD_LVDD_OFF 0x01020001 + +#define GFSCMD_RESET_LHP2 0x0104880c +#define GFSCMD_RESET_LVP0 0x0108880c +#define GFSCMD_MS_DELAY 0x01005A5A +#define GFSCMD_WAIT_VBLANK 0x01005555 +#define GFSCMD_END_OF_TABLE 0x0100ffff +#define GFSCMD_I2C_A_PAL_PLL2_CLK 0x0100F000 + +#define GFSDEFAULT_CMD 0x10000000 // Default settings +#define GFSDEFAULT_BACKLIGHT0 0x10000001 +#define GF_ON_LPW2 0x00000000 +#define GF_ON_LPW0 0x00000001 + +#define GFSDEFAULT_BACKLIGHT1 0x10000002 +#define GF_ON_LM1 0x00000000 +#define GF_ON_LPW1 0x00000001 + +#define GFPDRV_CMD 0x20000000 +#define GFHOST_CMD 0x40000000 +#define GFSCMD_PANEL_PKT_HEADER_START 0x40000000 + +#define GF_DLY_AFTR_DATA_SENT_MASK 0x00002000 +#define GF_A_2MS_DLY_AFTR_DATA_SENT 0x00000000 +#define GF_A_NO_DLY_AFTR_DATA_SENT 0x00002000 + +#define GF_RAISE_WAIT_AFTR_DATA_SENT_MASK 0x00001000 +#define GF_A_RAISE_WAIT_AFTR_DATA_SENT 0x00001000 + +#define GF_DATA_BURST_MASK 0x000000ff +#define GF_A_DATA_BURST0 0x00000000 +#define GF_A_DATA_BURST1 0x00000001 +#define GF_A_DATA_BURST2 0x00000002 +#define GF_A_DATA_BURST3 0x00000003 +#define GF_A_DATA_BURST4 0x00000004 +#define GF_A_DATA_BURST5 0x00000005 +#define GF_A_DATA_BURST6 0x00000006 +#define GF_A_DATA_BURST7 0x00000007 +#define GF_A_DATA_BURST8 0x00000008 + +#define GF_CS_MASK 0x000f0000 +#define GF_A_MCS_ACTVH 0x00010000 +#define GF_A_MCS_ACTVL 0x00020000 +#define GF_A_SCS_ACTVH 0x00030000 +#define GF_A_SCS_ACTVL 0x00040000 + +#define GF_RS_DC_MASK 0x00f00000 +#define GF_A_RS_DC_IXH_DATAL 0x00100000 +#define GF_A_RS_DC_IXL_DATAL 0x00200000 +#define GF_A_RS_DC_IXL_DATAH 0x00300000 +#define GF_A_RS_DC_IXH_DATAH 0x00400000 + +#define GF_IFACE_MASK 0x00008f00 +#define GF_A_IFACE_PRLL 0x00008000 + +#define GF_A_IFACE_PRLL_8 0x00008100 +#define GF_A_IFACE_PRLL_9 0x00008200 +#define GF_A_IFACE_PRLL_16 0x00008300 +#define GF_A_IFACE_PRLL_18 0x00008400 +#define GF_A_IFACE_SPI_8 0x00000100 +#define GF_A_IFACE_SPI_8DC 0x00000200 +#define GF_A_IFACE_SPI_12 0x00000300 +#define GF_A_IFACE_SPI_16 0x00000400 +#define GF_A_IFACE_SPI_16DC 0x00000500 +#define GF_A_IFACE_SPI_16_START8 0x00000600 +#define GF_A_IFACE_SPI_18 0x00000700 +#define GF_A_IFACE_SPI_24 0x00000800 +#define GF_A_IF_LSB_ALINED 0x00004000 +#define GF_A_IF_MSB_ALINED 0x00000000 +#define GF_IF_ALINED_MASK 0x00004000 + +#define GF_CLK_PER_PIXEL_MASK 0x3f000000 +#define GF_A_1CLK_PIXEL 0x01000000 +#define GF_A_2CLK_PIXEL 0x02000000 +#define GF_A_3CLK_PIXEL 0x03000000 +#define GF_A_4CLK_PIXEL 0x04000000 +#define GF_A_24CLK_PIXEL 0x18000000 + +// Parellel +#define GF_A_DATA_VLD_MASK 0xC0000000 +#define GF_A_DATA_VLD_CLK_RISE 0x40000000 +#define GF_A_DATA_VLD_CLK_FALL 0x80000000 + +// Serial + +#define GF_SPI_SCLK_CS_EDGE_ACTV_MASK 0xC0000000 +#define GF_A_SPI_1SCLK_CS_RISING_EDGE_ACTV 0x40000000 +#define GF_A_SPI_2SCLK_CS_RISING_EDGE_ACTV 0x00000000 +#define GF_A_SPI_1SCLK_CS_FALLING_EDGE_ACTV 0xC0000000 +#define GF_A_SPI_2SCLK_CS_FALLING_EDGE_ACTV 0x80000000 + +#define GF_A_SPI_CS_ACTVH 0x00010000 +#define GF_A_SPI_CS_ACTVL 0x00020000 + +#define GF_SPI_RS_DC_MASK 0x00f00000 +#define GF_A_SPI_RS_DC_IXH_DATAL 0x00100000 +#define GF_A_SPI_RS_DC_IXL_DATAL 0x00200000 +#define GF_A_SPI_RS_DC_IXL_DATAH 0x00300000 +#define GF_A_SPI_RS_DC_IXH_DATAH 0x00400000 + + +#define GF_B_ 0x00000000 +#define GF_C_ 0x00000000 + +#define GF_SPI_DATA_START_BYTE 0x00000000 +#define GF_SPI_CMD_START_BYTE 0x00000000 +#define GF_PANEL_DRV_CMD_DATA ~0x0000ffff +#define GFSCMD_PANEL_PKT_HEADER_END 0x40008000 + +#define GFPERIODIC_CMD 0x4000C000 +#define GFSCMD_PERIODIC_PKT_HEADER_START 0x4000C000 +#define GFSCMD_PERIODIC_PKT_HEADER_SIZE 0x0000000A + +#define GF_IS_PERDC_MSB9_LSB9_SWAP_MASK 0x00800000 +#define GF_IS_PERDC_MSB9_LSB9_SWAP 0x00800000 + +#define GF_IS_PERDC_PARLL_CYCLE_MASK 0x0000000f +#define GF_IS_PERDC_PARLL_CYCLE0 0x00000000 +#define GF_IS_PERDC_PARLL_CYCLE1 0x00000001 +#define GF_IS_PERDC_PARLL_CYCLE2 0x00000002 +#define GF_IS_PERDC_PARLL_CYCLE3 0x00000003 +#define GF_IS_PERDC_PARLL_CYCLE4 0x00000004 +#define GF_IS_PERDC_PARLL_CYCLE5 0x00000005 +#define GF_IS_PERDC_PARLL_CYCLE6 0x00000006 +#define GF_IS_PERDC_PARLL_CYCLE7 0x00000007 +#define GF_IS_PERDC_PARLL_CYCLE8 0x00000008 +#define GF_IS_PERDC_PARLL_CYCLE9 0x00000009 +#define GF_IS_PERDC_PARLL_CYCLE10 0x0000000A +#define GF_IS_PERDC_PARLL_CYCLE11 0x0000000B +#define GF_IS_PERDC_PARLL_CYCLE12 0x0000000C + +#define GF_IS_PERDC_PARLL_IF_MASK 0xf0000000 +#define GF_IS_PERDC_PARLL_IF_8 0x00000000 +#define GF_IS_PERDC_PARLL_IF_9 0x10000000 +#define GF_IS_PERDC_PARLL_IF_18 0x20000000 +#define GF_IS_PERDC_PARLL_IF_16 0x30000000 + +#define GF_IS_PERDC_PARLL_MAX_DATA_MASK 0x0000ff00 +#define GF_IS_PERDC_PARLL_MAX_DATA_IF_8 0x00005900 +#define GF_IS_PERDC_PARLL_MAX_DATA_IF_9 0x00005900 +#define GF_IS_PERDC_PARLL_MAX_DATA_IF_16 0x00006B00 +#define GF_IS_PERDC_PARLL_MAX_DATA_IF_18 0x00006B00 + +#define GFIS_PRLL_EN_RS_DC_C 0 +#define GFIS_PRLL_EN_RS_DC_D 0 + +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_1_D (1 << (108-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_2_D (1 << (111-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_3_D (1 << (114-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_4_D (1 << (117-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_5_D (1 << (120-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_6_D (1 << (123-96)) + +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_1_D (1 << (109-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_2_D (1 << (112-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_3_D (1 << (115-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_4_D (1 << (118-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_5_D (1 << (121-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_6_D (1 << (124-96)) + +#define GFIS_PRLL_RS_CD_18_CYCLE_1_H_D (1 << (110-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_1_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_2_H_D (1 << (113-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_2_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_3_H_D (1 << (116-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_3_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_4_H_D (1 << (119-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_4_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_5_H_D (1 << (122-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_5_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_6_H_D (1 << (125-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_6_L_D 0x00000000 + +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_1_C (1 << (90-64)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_2_C (1 << (93-64)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_3_D (1 << (96-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_4_D (1 << (99-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_5_D (1 << (102-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_6_D (1 << (105-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_7_D (1 << (108-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_8_D (1 << (111-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_9_D (1 << (114-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_10_D (1 << (117-96)) + +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_1_C (1 << (91-64)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_2_C (1 << (94-64)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_3_D (1 << (97-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_4_D (1 << (100-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_5_D (1 << (103-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_6_D (1 << (106-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_7_D (1 << (109-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_8_D (1 << (112-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_9_D (1 << (115-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_10_D (1 << (118-96)) + +#define GFIS_PRLL_RS_CD_9_CYCLE_1_H_C (1 << (92-64)) +#define GFIS_PRLL_RS_CD_9_CYCLE_1_L_C 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_2_H_C (1 << (95-64)) +#define GFIS_PRLL_RS_CD_9_CYCLE_2_L_C 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_3_H_D (1 << (98-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_3_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_4_H_D (1 << (101-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_4_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_5_H_D (1 << (104-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_5_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_6_H_D (1 << (107-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_6_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_7_H_D (1 << (110-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_7_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_8_H_D (1 << (113-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_8_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_9_H_D (1 << (116-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_9_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_10_H_D (1 << (119-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_10_L_D 0x00000000 + +// Serial + +#define GF_IS_PERDC_SERIAL_CYCLE_MASK 0x0000000f +#define GF_IS_PERDC_SERIAL_CYCLE0 0x00000000 +#define GF_IS_PERDC_SERIAL_CYCLE1 0x00000001 +#define GF_IS_PERDC_SERIAL_CYCLE2 0x00000002 +#define GF_IS_PERDC_SERIAL_CYCLE3 0x00000003 +#define GF_IS_PERDC_SERIAL_CYCLE4 0x00000004 +#define GF_IS_PERDC_SERIAL_CYCLE5 0x00000005 +#define GF_IS_PERDC_SERIAL_CYCLE6 0x00000006 +#define GF_IS_PERDC_SERIAL_CYCLE7 0x00000007 +#define GF_IS_PERDC_SERIAL_CYCLE8 0x00000008 +#define GF_IS_PERDC_SERIAL_CYCLE9 0x00000009 +#define GF_IS_PERDC_SERIAL_CYCLE10 0x0000000A +#define GF_IS_PERDC_SERIAL_CYCLE11 0x0000000B +#define GF_IS_PERDC_SERIAL_CYCLE12 0x0000000C + +#define GF_IS_PERDC_SERIAL_IF_MASK 0xf0000000 +#define GF_IS_PERDC_SERIAL_IF_8 0x80000000 +#define GF_IS_PERDC_SERIAL_IF_9 0x90000000 +#define GF_IS_PERDC_SERIAL_IF_12 0xA0000000 +#define GF_IS_PERDC_SERIAL_IF_16 0xB0000000 +#define GF_IS_PERDC_SERIAL_IF_18 0xC0000000 +#define GF_IS_PERDC_SERIAL_IF_24 0xD0000000 + +#define GF_IS_PERDC_SERIAL_MAX_DATA_MASK 0x0000ff00 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_8 0x00005900 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_9 0x00005900 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_12 0x00006A00 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_16 0x00006B00 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_18 0x00006C00 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_24 0x00006D00 + +#define GFIS_SERIAL_EN_RS_DC_C 0 +#define GFIS_SERIAL_EN_RS_DC_D 0 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_1_D (1 << (96-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_2_D (1 << (98-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_3_D (1 << (100-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_4_D (1 << (102-96)) + +#define GFIS_SERIAL_RS_CD_24_CYCLE_1_H_D (1 << (97-96)) +#define GFIS_SERIAL_RS_CD_24_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_24_CYCLE_2_H_D (1 << (99-96)) +#define GFIS_SERIAL_RS_CD_24_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_24_CYCLE_3_H_D (1 << (101-96)) +#define GFIS_SERIAL_RS_CD_24_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_24_CYCLE_4_H_D (1 << (103-96)) +#define GFIS_SERIAL_RS_CD_24_CYCLE_4_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_1_D (1 << (108-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_2_D (1 << (110-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_3_D (1 << (112-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_4_D (1 << (114-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_5_D (1 << (116-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_6_D (1 << (118-96)) + +#define GFIS_SERIAL_RS_CD_18_CYCLE_1_H_D (1 << (109-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_2_H_D (1 << (111-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_3_H_D (1 << (113-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_4_H_D (1 << (115-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_5_H_D (1 << (117-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_6_H_D (1 << (119-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_6_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_1_D (1 << (112-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_2_D (1 << (114-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_3_D (1 << (116-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_4_D (1 << (118-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_5_D (1 << (120-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_6_D (1 << (122-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_7_D (1 << (124-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_7_D (1 << (124-96)) + +#define GFIS_SERIAL_RS_CD_16_CYCLE_1_H_D (1 << (113-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_2_H_D (1 << (115-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_3_H_D (1 << (117-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_4_H_D (1 << (119-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_5_H_D (1 << (121-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_6_H_D (1 << (123-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_6_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_7_H_D (1 << (125-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_7_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_1_D (1 << (109-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_2_D (1 << (111-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_3_D (1 << (113-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_4_D (1 << (115-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_5_D (1 << (117-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_6_D (1 << (119-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_7_D (1 << (121-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_8_D (1 << (123-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_9_D (1 << (125-96)) + +#define GFIS_SERIAL_RS_CD_12_CYCLE_1_H_D (1 << (110-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_2_H_D (1 << (112-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_3_H_D (1 << (114-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_4_H_D (1 << (116-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_5_H_D (1 << (118-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_6_H_D (1 << (120-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_6_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_7_H_D (1 << (122-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_7_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_8_H_D (1 << (124-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_8_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_9_H_D (1 << (126-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_9_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_1_D (1 << (99-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_2_D (1 << (101-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_3_D (1 << (103-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_4_D (1 << (105-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_5_D (1 << (107-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_6_D (1 << (109-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_7_D (1 << (111-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_8_D (1 << (113-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_9_D (1 << (115-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_10_D (1 << (117-96)) + +#define GFIS_SERIAL_RS_CD_9_CYCLE_1_H_D (1 << (100-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_2_H_D (1 << (102-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_3_H_D (1 << (104-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_4_H_D (1 << (106-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_5_H_D (1 << (108-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_6_H_D (1 << (110-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_6_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_7_H_D (1 << (112-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_7_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_8_H_D (1 << (114-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_8_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_9_H_D (1 << (116-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_9_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_10_H_D (1 << (118-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_10_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_1_D (1 << (96-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_2_D (1 << (98-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_3_D (1 << (100-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_4_D (1 << (102-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_5_D (1 << (104-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_6_D (1 << (106-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_7_D (1 << (108-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_8_D (1 << (110-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_9_D (1 << (112-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_10_D (1 << (114-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_11_D (1 << (116-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_12_D (1 << (118-96)) + +#define GFIS_SERIAL_RS_CD_8_CYCLE_1_H_D (1 << (97-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_2_H_D (1 << (99-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_3_H_D (1 << (101-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_4_H_D (1 << (103-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_5_H_D (1 << (105-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_6_H_D (1 << (107-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_6_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_7_H_D (1 << (109-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_7_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_8_H_D (1 << (111-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_8_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_9_H_D (1 << (113-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_9_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_10_H_D (1 << (115-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_10_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_11_H_D (1 << (117-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_11_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_12_H_D (1 << (119-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_12_L_D 0x00000000 + +#define GFSCMD_PERIODIC_PKT_HEADER_END 0x4000E000 + +#define GFSCMD_I2C_PKT_HEADER_START 0x4000A000 + +#define GF_I2C_DATA_BURST_MASK 0x000000ff +#define GF_I2C_A_DATA_BURST0 0x00000000 +#define GF_I2C_A_DATA_BURST1 0x00000001 +#define GF_I2C_A_DATA_BURST2 0x00000002 +#define GF_I2C_A_DATA_BURST3 0x00000003 +#define GF_I2C_A_DATA_BURST4 0x00000004 +#define GF_I2C_A_DATA_BURST5 0x00000005 +#define GF_I2C_A_DATA_BURST6 0x00000006 +#define GF_I2C_A_DATA_BURST7 0x00000007 +#define GF_I2C_A_DATA_BURST8 0x00000008 + +#define GF_HW_SW_I2C_MASK 0x00000300 +#define GF_HW_I2C 0x00000000 +#define GF_SW_I2C 0x00000100 +#define GF_I2C_B_WRITE_ID 0x00000000 +#define GF_I2C_C_READ_ID 0x00000000 +#define GFSCMD_I2C_PKT_HEADER_END 0x4000B000 + + +//SDIO GPIOs + +#define GFSCMD_GPIO_SD_INIT 0x00008f00 //One time Init SD GPIO +#define GF_NO_DATA 0x00000000 + +#define GFSCMD_GPIO_SD_PIN_SDGP0 0x00008f01 +#define GFSCMD_GPIO_SD_PIN_SDGP1 0x00018f01 +#define GFSCMD_GPIO_SD_PIN_CMD 0x00028f02 +#define GFSCMD_GPIO_SD_PIN_CLK 0x00038f02 +#define GFSCMD_GPIO_SD_PIN_DATA0 0x00048f00 +#define GFSCMD_GPIO_SD_PIN_DATA1 0x00048f01 +#define GFSCMD_GPIO_SD_PIN_DATA2 0x00048f02 +#define GFSCMD_GPIO_SD_PIN_DATA3 0x00048f03 + +#define GF_GPIO_PIN_OUTPUT_ENABLE 0x00000000 +#define GF_GPIO_PIN_INPUT_ENABLE 0x00000001 +#define GF_GPIO_PIN_DISABLE 0x00000002 +#define GF_GPIO_PIN_HIGH 0x00000003 +#define GF_GPIO_PIN_LOW 0x00000004 + +#endif //__GFDISPCMDDATA_H__ diff --git a/Start_WM/test6/inc/GFDx.h b/Start_WM/test6/inc/GFDx.h new file mode 100755 index 00000000..cca38e76 --- /dev/null +++ b/Start_WM/test6/inc/GFDx.h @@ -0,0 +1,1847 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFDx.h + GFSDK Display Initialization API header file. + */ + +#ifndef GF_DX_H +#define GF_DX_H + +#include "GFDispCmdData.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupDx DxAPI Display Initialization API +
        +
      • @ref pageDxAppNotes +
          +
        • @ref pageDxAppNotes1 +
        +
      +*/ +/*@{*/ + +/** GFDxAPI color info to be used during programming GFDxErase*/ +#define GFDX_COLOR_RED 0xF800F800 +#define GFDX_COLOR_GREEN 0x07E007E0 +#define GFDX_COLOR_BLUE 0x001F001F + + + +/** GFDxAPI error code: Function not supported. */ +#define GFDX_ERROR_NO_SUPPORT (GFDX_ERROR | 2) +/** GFDxAPI error code: Invalid attribute ID for GFDxSetAttribute() / GFDxGetAttribute(). */ +#define GFDX_ERROR_INVALID_ATTRIBUTE (GFDX_ERROR | 6) + +/** + This struct is used by GFDxGetProperty(). + * */ +typedef struct _GFDXPROPERTY +{ + /** standard GF property, following info is available as cap */ + GFPROPERTY Prop; + /** Not supported */ + NvU16 LcdWidth; + /** Not supported */ + NvU16 LcdHeight; + /** Not supported */ + NvU16 LcdIndex; + /** Not supported */ + char LcdName[18]; + /** Not supported */ + NvU16 SubLcdWidth; + /** Not supported */ + NvU16 SubLcdHeight; + /** Not supported */ + NvU16 SubLcdIndex; + /** Not supported */ + char SubLcdName[18]; + +} GFDXPROPERTY, *PGFDXPROPERTY; + +#define DC_P_A_BLEND_2WIN_B DC_P_B_BLEND_2WIN_A +#define DC_P_A_BLEND_2WIN_C DC_P_B_BLEND_2WIN_C + +#define DC_P_C_BLEND_2WIN_A DC_P_B_BLEND_2WIN_A +#define DC_P_C_BLEND_2WIN_B DC_P_B_BLEND_2WIN_C + +//#define DC_P_B_BLEND_2WIN_B DC_P_B_BLEND_2WIN_C +#define P_B_CKEY_ENABLE_2WIN_B_CKEY0 P_B_CKEY_ENABLE_2WIN_C_CKEY0 +#define P_B_CKEY_ENABLE_2WIN_B_CKEY1 P_B_CKEY_ENABLE_2WIN_C_CKEY1 +#define P_B_BLEND_CONTROL_2WIN_B_MASK P_B_BLEND_CONTROL_2WIN_C_MASK +#define P_B_BLEND_CONTROL_2WIN_B_ALPHA_WEIGHT P_B_BLEND_CONTROL_2WIN_C_ALPHA_WEIGHT +#define P_B_BLEND_CONTROL_2WIN_B_DEPENDENT_WEIGHT P_B_BLEND_CONTROL_2WIN_C_DEPENDENT_WEIGHT +#define P_B_BLEND_WEIGHT0_2WIN_B_MASK P_B_BLEND_WEIGHT0_2WIN_C_MASK +#define P_B_BLEND_WEIGHT0_2WIN_B_SHIFT P_B_BLEND_WEIGHT0_2WIN_C_SHIFT +#define P_B_BLEND_WEIGHT1_2WIN_B_MASK P_B_BLEND_WEIGHT1_2WIN_C_MASK +#define P_B_BLEND_WEIGHT1_2WIN_B_SHIFT P_B_BLEND_WEIGHT1_2WIN_C_SHIFT + +//#define DC_P_B_BLEND_3WIN_AB DC_P_B_BLEND_3WIN_AC +#define DC_P_A_BLEND_3WIN_BC DC_P_B_BLEND_3WIN_AC +#define P_B_CKEY_ENABLE_3WIN_AB_CKEY0 P_B_CKEY_ENABLE_3WIN_AC_CKEY0 +#define P_B_CKEY_ENABLE_3WIN_AB_CKEY1 P_B_CKEY_ENABLE_3WIN_AC_CKEY1 +#define P_B_BLEND_CONTROL_3WIN_AB_MASK P_B_BLEND_CONTROL_3WIN_AC_MASK +#define P_B_BLEND_CONTROL_3WIN_AB_ALPHA_WEIGHT P_B_BLEND_CONTROL_3WIN_AC_ALPHA_WEIGHT +#define P_B_BLEND_CONTROL_3WIN_AB_DEPENDENT_WEIGHT P_B_BLEND_CONTROL_3WIN_AC_DEPENDENT_WEIGHT +#define P_B_BLEND_WEIGHT0_3WIN_AB_MASK P_B_BLEND_WEIGHT0_3WIN_AC_MASK +#define P_B_BLEND_WEIGHT0_3WIN_AB_SHIFT P_B_BLEND_WEIGHT0_3WIN_AC_SHIFT +#define P_B_BLEND_WEIGHT1_3WIN_AB_MASK P_B_BLEND_WEIGHT1_3WIN_AC_MASK +#define P_B_BLEND_WEIGHT1_3WIN_AB_SHIFT P_B_BLEND_WEIGHT1_3WIN_AC_SHIFT + +//#define DC_P_B_BLEND_3WIN_BC DC_P_B_BLEND_3WIN_AC +#define DC_P_C_BLEND_3WIN_AB DC_P_B_BLEND_3WIN_AC +#define P_B_CKEY_ENABLE_3WIN_BC_CKEY0 P_B_CKEY_ENABLE_3WIN_AC_CKEY0 +#define P_B_CKEY_ENABLE_3WIN_BC_CKEY1 P_B_CKEY_ENABLE_3WIN_AC_CKEY1 +#define P_B_BLEND_CONTROL_3WIN_BC_MASK P_B_BLEND_CONTROL_3WIN_AC_MASK +#define P_B_BLEND_CONTROL_3WIN_BC_ALPHA_WEIGHT P_B_BLEND_CONTROL_3WIN_AC_ALPHA_WEIGHT +#define P_B_BLEND_CONTROL_3WIN_BC_DEPENDENT_WEIGHT P_B_BLEND_CONTROL_3WIN_AC_DEPENDENT_WEIGHT +#define P_B_BLEND_WEIGHT0_3WIN_BC_MASK P_B_BLEND_WEIGHT0_3WIN_AC_MASK +#define P_B_BLEND_WEIGHT0_3WIN_BC_SHIFT P_B_BLEND_WEIGHT0_3WIN_AC_SHIFT +#define P_B_BLEND_WEIGHT1_3WIN_BC_MASK P_B_BLEND_WEIGHT1_3WIN_AC_MASK +#define P_B_BLEND_WEIGHT1_3WIN_BC_SHIFT P_B_BLEND_WEIGHT1_3WIN_AC_SHIFT + +/** + Definition of attribute ids for Set/GetAttributes() + */ +typedef enum _GFDXATTRIBUTES + { + /** Width of the LCD fixed (240 for a 240x320 panel) */ + GFDX_ATTR_LCDWIDTH, + /** Height of the LCD fixed (320 for a 240x320 panel) */ + GFDX_ATTR_LCDHEIGHT, + /** NVIDIA panel index, This function overwrites environment panel Index setting */ + GFDX_ATTR_LCDTYPE, + /** Name of the panel (upto 16 chars,"PHILIPS_LP7123A") */ + GFDX_ATTR_LCDNAME, + /** Width of the display area usually same as LCDWIDTH, + Parameters: W[15:0] */ + GFDX_ATTR_WIDTH, + /** Height of the display area, can be less if emulating smaller size, + Parameters: H[15:0] */ + GFDX_ATTR_HEIGHT, + /** set/gets width height together to avoid artifacts, + Parameters: W[15:0], H[31:16] */ + GFDX_ATTR_WH_WA, + /** set/gets x, y start position of window A, + Parameters: X[15:0], Y[31:16] */ + GFDX_ATTR_XY_POS_WA, + /** Color Depth Bits per pixel: 1,2,4,8,12,15(RGB555),16(RGB565), 32(ARGB888), + GFDX_COLOR_DEPTH_YCbCr422, + GFDX_COLOR_DEPTH_YUV422, + GFDX_COLOR_DEPTH_YCbCr420P, + GFDX_COLOR_DEPTH_YUV420P, + GFDX_COLOR_DEPTH_YUV422P, + GFDX_COLOR_DEPTH_YCbCr422P, + GFDX_COLOR_DEPTH_YCbCr422R, + GFDX_COLOR_DEPTH_YUV422R, + GFDX_COLOR_DEPTH_YCbCr422RA, + GFDX_COLOR_DEPTH_YUV422RA, + */ + GFDX_ATTR_BPP_WA, + /** On/Off Horizontal & Vertical Pixel Doubling for window A, + Parameters: GFDXA_PIX_DBL_H, GFDXA_PIX_DBL_V or 0-Disable */ + GFDX_ATTR_PIXEL_DBL_WA, + /** Start Address for Window A Buffer 0 */ + GFDX_ATTR_ADDR_WA_B0, + /** Start Address for Window A Buffer 1 */ + GFDX_ATTR_ADDR_WA_B1, + /** Stride for Window A Buffer 0 */ + GFDX_ATTR_STRIDE_WA_B0, + /** Stride for Window A Buffer 1 */ + GFDX_ATTR_STRIDE_WA_B1, + /** Enable/Disable Windows A, Parameters: 1-Enable 0-Disable */ + GFDX_ATTR_ENABLE_WA, + /** Enable/Disable Buf0, Buf1, VI, GE Double Buffer (see def), + Parameters: GFDXA_DB_BUF0, GFDXA_DB_BUF1, GFDXA_DB_GE, GFDXA_DB_VI, + GFDXA_DB_EPP, GFDXA_DB_MPEGE, GFDXA_DB_HOST + */ + GFDX_ATTR_DBL_BUF_WA, + /** Sets/Gets GC Rotate bits for window A, for internal use only */ + GFDX_ATTR_ROTATE_BIT_WA, + /** Set/Get H Direction Increment/Decrement for window A, for internal use only */ + GFDX_ATTR_H_DIRECTION_WA, + /** Set/Get V Direction Increment/Decrement for window A, for internal use only */ + GFDX_ATTR_V_DIRECTION_WA, + /** Enable/Disable Palette for WinA */ + GFDX_ATTR_PALETTE_EN_WA, + /** Set/Get Palette 666 R[31-24], G[23-16], B[15-8], Index[7-0] WinA */ + GFDX_ATTR_PALETTE_WA, + /** Set/Get Palette 888 R[31-24], G[23-16], B[15-8], Index[7-0] WinA */ + GFDX_ATTR_PALETTE888_WA, + /** Enable/Disable DV WinA , + Parameters: GFDX_ATTR_DV_ENABLE, GFDX_ATTR_DV_DISABLE + */ + GFDX_ATTR_DV_CONTROL_EN_WA, + /** Set/Get DV Control R[26-24], G[18-16], B[10-8] WinA */ + GFDX_ATTR_DV_CONTROL_WA, + /** Color Key0 Lower range for overlay, there are two sets of color keys KEY0 & KEY1, + Parameters: R[23-16],G[15-8],B[7-0], Each KEY has Lower and Upper range */ + GFDX_ATTR_COLOR_KEY0_LOWER_RANGE, + /** Color Key0 Upper range for overlay, there are two sets of color keys KEY0 & KEY1, + Parameters: R[23-16],G[15-8],B[7-0], Each KEY has Lower and Upper range */ + GFDX_ATTR_COLOR_KEY0_UPPER_RANGE, + /** Color Key1 Lower range for overlay, there are two sets of color keys KEY0 & KEY1, + Parameters: R[23-16],G[15-8],B[7-0], Each KEY has Lower and Upper range */ + GFDX_ATTR_COLOR_KEY1_LOWER_RANGE, + /** Color Key1 Upper range for overlay, there are two sets of color keys KEY0 & KEY1, + Parameters: R[23-16],G[15-8],B[7-0], Each KEY has Lower and Upper range */ + GFDX_ATTR_COLOR_KEY1_UPPER_RANGE, + /** Color Key enbled but pixel color is not in range, + Parameters: GFDXA_BLEND_CONTROL_NOKEY_ALPHA_WEIGHT else 0 for Fix Weight */ + GFDX_ATTR_COLOR_NOKEY_WA, + /** Weight0 for Color Key not match area, + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT0_WA, + /** Weight1 for Color Key not match area, + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT1_WA, + /** Color Key0 Enble/Disable for WinA, + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE or GFDXA_BLEND_COLOR_KEY0_DISABLE */ + GFDX_ATTR_COLOR_KEY0_1WIN_WA, + /** Color Key1 Enble/Disable for WinA, + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE or GFDXA_BLEND_COLOR_KEY1_DISABLE */ + GFDX_ATTR_COLOR_KEY1_1WIN_WA, + /** Blend Control for WinA where does not Overlap with other Window, + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or 0 for Fix Weight */ + GFDX_ATTR_COLOR_1WIN_WA, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0, + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT0_WA, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1, + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT1_WA, + /** Color Key0 Enble/Disable for WinA, Overlap with WinB, + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY01 + else 2WIN_A_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY1 + else 2WIN_A_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_B_WA, + /** Color Key1 Enble/Disable for WinA, Overlap with WinB, + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY01 + else 2WIN_A_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY0 + else 2WIN_A_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_B_WA, + /** Blend Control for WinA area that overlap with WinB only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_B_WA, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_B_WEIGHT0_WA, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_B_WEIGHT1_WA, + /** Color Key0 Enble/Disable for WinA, Overlap with WinC + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY01 + else 2WIN_A_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY1 + else 2WIN_A_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_C_WA, + /** Color Key1 Enble/Disable for WinA, Overlap with WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY01 + else 2WIN_A_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY0 + else 2WIN_A_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_C_WA, + /** Blend Control for WinA area that overlap with WinC only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_C_WA, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_C_WEIGHT0_WA, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_C_WEIGHT1_WA, + /** Color Key0 Enble/Disable for WinA, Overlap with WinA & WinC Only + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 3WIN_AC_CKEY1 enbled then ENABLE_3WIN_AC_CKEY01 + else 3WIN_AC_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 3WIN_AC_CKEY1 enbled then ENABLE_3WIN_AC_CKEY1 + else 3WIN_AC_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_3WIN_BC_WA, + /** Color Key1 Enble/Disable for WinA, Overlap with WinA & WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 3WIN_AC_CKEY1 enbled then ENABLE_3WIN_AC_CKEY01 + else 3WIN_AC_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 3WIN_AC_CKEY1 enbled then ENABLE_3WIN_AC_CKEY0 + else 3WIN_AC_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_3WIN_BC_WA, + /** Blend Control for WinA area that overlap with WinA & WinC only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_3WIN_BC_WA, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_3WIN_BC_WEIGHT0_WA, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_3WIN_BC_WEIGHT1_WA, + /** set/gets width height together to avoid artifacts */ + GFDX_ATTR_WH_WB, + /** set/gets source width height together to avoid artifacts, + Parameters: W[15:0], H[31:16] */ + GFDX_ATTR_SRC_WH_WB, + /** set/gets x, y start position of window B, + Parameters: X[15:0], Y[31:16] */ + GFDX_ATTR_XY_POS_WB, + /** Color Depth Bits per pixel: 1,2,4,8,12,15(RGB555),16(RGB565), 32(ARGB888), + GFDX_COLOR_DEPTH_YCbCr422, + GFDX_COLOR_DEPTH_YUV422, + GFDX_COLOR_DEPTH_YCbCr420P, + GFDX_COLOR_DEPTH_YUV420P, + GFDX_COLOR_DEPTH_YUV422P, + GFDX_COLOR_DEPTH_YCbCr422P, + GFDX_COLOR_DEPTH_YCbCr422R, + GFDX_COLOR_DEPTH_YUV422R, + GFDX_COLOR_DEPTH_YCbCr422RA, + GFDX_COLOR_DEPTH_YUV422RA, + */ + GFDX_ATTR_BPP_WB, + /** On/Off Horizontal & Vertical Pixel Doubling for Window B, + Parameters: GFDXA_PIX_DBL_H, GFDXA_PIX_DBL_V or 0-Disable */ + GFDX_ATTR_PIXEL_DBL_WB, + /** Upscales/Downscales window */ + GFDX_ATTR_SCALE_WB, + /** Start Address for Window B Buffer 0 */ + GFDX_ATTR_ADDR_WB_B0, + /** U Start Address for Window B Buffer 0 */ + GFDX_ATTR_ADDR_U_WB_B0, + /** V Start Address for Window B Buffer 0 */ + GFDX_ATTR_ADDR_V_WB_B0, + /** Stride for Window B Buffer 0 */ + GFDX_ATTR_STRIDE_WB_B0, + /** UV Stride for Window B Buffer 0 */ + GFDX_ATTR_STRIDE_UV_WB_B0, + /** Start Address for Window B Buffer 1 */ + GFDX_ATTR_ADDR_WB_B1, + /** U Start Address for Window B Buffer 1 */ + GFDX_ATTR_ADDR_U_WB_B1, + /** V Start Address for Window B Buffer 1 */ + GFDX_ATTR_ADDR_V_WB_B1, + /** Stride for Window B Buffer 1 */ + GFDX_ATTR_STRIDE_WB_B1, + /** UV Stride for Window B Buffer 1 */ + GFDX_ATTR_STRIDE_UV_WB_B1, + /** Enable/Disable Windows B, Parameters: 1-Enable 0-Disable */ + GFDX_ATTR_ENABLE_WB, + /** Enable/Disable Buf0, Buf1, VI, GE Double Buffer (see def), + Parameters: GFDXA_DB_BUF0, GFDXA_DB_BUF1, GFDXA_DB_GE, GFDXA_DB_VI, + GFDXA_DB_EPP, GFDXA_DB_MPEGE, GFDXA_DB_HOST + */ + GFDX_ATTR_DBL_BUF_WB, + /** Sets/Gets GC Rotate bits for window B, for internal use only */ + GFDX_ATTR_ROTATE_BIT_WB, + /** Set/Get H Direction Increment/Decrement for window B, for internal use only */ + GFDX_ATTR_H_DIRECTION_WB, + /** Set/Get V Direction Increment/Decrement for window B, for internal use only */ + GFDX_ATTR_V_DIRECTION_WB, + /** Enable/Disable Palette for WinB */ + GFDX_ATTR_PALETTE_EN_WB, + /** Set/Get Palette 666 R[31-24], G[23-16], B[15-8], Index[7-0] WinB */ + GFDX_ATTR_PALETTE_WB, + /** Set/Get Palette 888 R[31-24], G[23-16], B[15-8], Index[7-0] WinB */ + GFDX_ATTR_PALETTE888_WB, + /** Enable/Disable DV WinB , + Parameters: GFDX_ATTR_DV_ENABLE, GFDX_ATTR_DV_DISABLE + */ + GFDX_ATTR_DV_CONTROL_EN_WB, + /** Set/Get DV Control R[26-24], G[18-16], B[10-8] WinB */ + GFDX_ATTR_DV_CONTROL_WB, + /** Color Key enbled but pixel color is not in range + Parameters: GFDXA_BLEND_CONTROL_NOKEY_ALPHA_WEIGHT else 0 for Fix Weight */ + GFDX_ATTR_COLOR_NOKEY_WB, + /** Weight0 for Color Key not match area + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT0_WB, + /** Weight1 for Color Key not match area + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT1_WB, + /** Color Key0 Enble/Disable for WinB + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE or GFDXA_BLEND_COLOR_KEY0_DISABLE */ + GFDX_ATTR_COLOR_KEY0_1WIN_WB, + /** Color Key1 Enble/Disable for WinB + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE or GFDXA_BLEND_COLOR_KEY1_DISABLE */ + GFDX_ATTR_COLOR_KEY1_1WIN_WB, + /** Blend Control for WinB where does not Overlap with other Window + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or 0 for Fix Weight */ + GFDX_ATTR_COLOR_1WIN_WB, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT0_WB, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT1_WB, + /** Color Key0 Enble/Disable for WinB, Overlap with WinA + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY01 + else 2WIN_B_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY1 + else 2WIN_B_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_A_WB, + /** Color Key1 Enble/Disable for WinB, Overlap with WinA + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY01 + else 2WIN_B_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY0 + else 2WIN_B_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_A_WB, + /** Blend Control for WinB where does not Overlap with other Window + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_A_WB, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_A_WEIGHT0_WB, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_A_WEIGHT1_WB, + /** Color Key0 Enble/Disable for WinB, Overlap with WinC + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY01 + else 2WIN_B_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY1 + else 2WIN_B_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_C_WB, + /** Color Key1 Enble/Disable for WinB, Overlap with WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY01 + else 2WIN_B_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY0 + else 2WIN_B_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_C_WB, + /** Blend Control for WinB area that overlap with WinC only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_C_WB, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_C_WEIGHT0_WB, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_C_WEIGHT1_WB, + /** Color Key0 Enble/Disable for WinB, Overlap with WinA & WinC Only + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 3WIN_BC_CKEY1 enbled then ENABLE_3WIN_BC_CKEY01 + else 3WIN_BC_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 3WIN_BC_CKEY1 enbled then ENABLE_3WIN_BC_CKEY1 + else 3WIN_BC_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_3WIN_AC_WB, + /** Color Key1 Enble/Disable for WinB, Overlap with WinA & WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 3WIN_BC_CKEY1 enbled then ENABLE_3WIN_BC_CKEY01 + else 3WIN_BC_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 3WIN_BC_CKEY1 enbled then ENABLE_3WIN_BC_CKEY0 + else 3WIN_BC_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_3WIN_AC_WB, + /** Blend Control for WinB area that overlap with WinA & WinC only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_3WIN_AC_WB, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_3WIN_AC_WEIGHT0_WB, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_3WIN_AC_WEIGHT1_WB, + + /** set/gets width height together to avoid artifacts */ + GFDX_ATTR_WH_WC, + /** set/gets source width height together to avoid artifacts, + Parameters: W[15:0], H[31:16] */ + GFDX_ATTR_SRC_WH_WC, + /** set/gets x, y start position of window C, + Parameters: X[15:0], Y[31:16] */ + GFDX_ATTR_XY_POS_WC, + /** Color Depth Bits per pixel: 1,2,4,8,12,15(RGB555),16(RGB565), 32(ARGB888), + GFDX_COLOR_DEPTH_YCbCr422, + GFDX_COLOR_DEPTH_YUV422, + GFDX_COLOR_DEPTH_YCbCr420P, + GFDX_COLOR_DEPTH_YUV420P, + GFDX_COLOR_DEPTH_YUV422P, + GFDX_COLOR_DEPTH_YCbCr422P, + GFDX_COLOR_DEPTH_YCbCr422R, + GFDX_COLOR_DEPTH_YUV422R, + GFDX_COLOR_DEPTH_YCbCr422RA, + GFDX_COLOR_DEPTH_YUV422RA, + */ + GFDX_ATTR_BPP_WC, + /** Set Trigger for encode window, 0- Disable, 1- Enable, 2-single Shot*/ + GFDX_ATTR_TRIGGER_WENC, + /** On/Off Horizontal & Vertical Pixel Doubling for Window C, + Parameters: GFDXA_PIX_DBL_H, GFDXA_PIX_DBL_V or 0-Disable */ + GFDX_ATTR_PIXEL_DBL_WC, + /** Upscales/Downscales window */ + GFDX_ATTR_SCALE_WC, + /** Start Address for window C Buffer 0 */ + GFDX_ATTR_ADDR_WC_B0, + /** U Start Address for window C Buffer 0 */ + GFDX_ATTR_ADDR_U_WC_B0, + /** V Start Address for window C Buffer 0 */ + GFDX_ATTR_ADDR_V_WC_B0, + /** Stride for window C Buffer 0 */ + GFDX_ATTR_STRIDE_WC_B0, + /** UV Stride for window C Buffer 0 */ + GFDX_ATTR_STRIDE_UV_WC_B0, + /** Start Address for window C Buffer 1 */ + GFDX_ATTR_ADDR_WC_B1, + /** U Start Address for window C Buffer 1 */ + GFDX_ATTR_ADDR_U_WC_B1, + /** V Start Address for window C Buffer 1 */ + GFDX_ATTR_ADDR_V_WC_B1, + /** Stride for window C Buffer 1 */ + GFDX_ATTR_STRIDE_WC_B1, + /** UV Stride for window C Buffer 1 */ + GFDX_ATTR_STRIDE_UV_WC_B1, + /** Enable/Disable Windows C, Parameters: 1-Enable 0-Disable */ + GFDX_ATTR_ENABLE_WC, + /** Enable/Disable Buf0, Buf1, VI, GE Double Buffer (see def), + Parameters: GFDXA_DB_BUF0, GFDXA_DB_BUF1, GFDXA_DB_GE, GFDXA_DB_VI, + GFDXA_DB_EPP, GFDXA_DB_MPEGE, GFDXA_DB_HOST + */ + GFDX_ATTR_DBL_BUF_WC, + /** Sets/Gets GC Rotate bits for window C, for internal use only */ + GFDX_ATTR_ROTATE_BIT_WC, + /** Set/Get H Direction Increment/Decrement for window C, for internal use only */ + GFDX_ATTR_H_DIRECTION_WC, + /** Set/Get V Direction Increment/Decrement for window C, for internal use only */ + GFDX_ATTR_V_DIRECTION_WC, + /** Enable/Disable Palette for WinC */ + GFDX_ATTR_PALETTE_EN_WC, + /** Set/Get Palette 666 R[31-24], G[23-16], B[15-8], Index[7-0] WinC */ + GFDX_ATTR_PALETTE_WC, + /** Set/Get Palette 888 R[31-24], G[23-16], B[15-8], Index[7-0] WinC */ + GFDX_ATTR_PALETTE888_WC, + /** Enable/Disable DV WinC, + Parameters: GFDX_ATTR_DV_ENABLE, GFDX_ATTR_DV_DISABLE + */ + GFDX_ATTR_DV_CONTROL_EN_WC, + /** Set/Get DV Control R[26-24], G[18-16], B[10-8] WinA */ + GFDX_ATTR_DV_CONTROL_WC, + /** Color Key enbled but pixel color is not in range + Parameters: GFDXA_BLEND_CONTROL_NOKEY_ALPHA_WEIGHT else 0 for Fix Weight */ + GFDX_ATTR_COLOR_NOKEY_WC, + /** Weight0 for Color Key not match area + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT0_WC, + /** Weight1 for Color Key not match area + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT1_WC, + /** Color Key0 Enble/Disable for WinC + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE or GFDXA_BLEND_COLOR_KEY0_DISABLE */ + GFDX_ATTR_COLOR_KEY0_1WIN_WC, + /** Color Key1 Enble/Disable for WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE or GFDXA_BLEND_COLOR_KEY1_DISABLE */ + GFDX_ATTR_COLOR_KEY1_1WIN_WC, + /** Blend Control for WinC where does not Overlap with other Window + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or 0 for Fix Weight */ + GFDX_ATTR_COLOR_1WIN_WC, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT0_WC, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT1_WC, + /** Color Key0 Enble/Disable for WinC, Overlap with WinA + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY01 + else 2WIN_C_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY1 + else 2WIN_C_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_A_WC, + /** Color Key1 Enble/Disable for WinC, Overlap with WinA + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY01 + else 2WIN_C_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY0 + else 2WIN_C_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_A_WC, + /** Blend Control for WinC area that overlap with WinA only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_A_WC, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_A_WEIGHT0_WC, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_A_WEIGHT1_WC, + /** Color Key0 Enble/Disable for WinC, Overlap with WinB + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY01 + else 2WIN_C_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY1 + else 2WIN_C_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_B_WC, + /** Color Key1 Enble/Disable for WinC, Overlap with WinB + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY01 + else 2WIN_C_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY0 + else 2WIN_C_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_B_WC, + /** Blend Control for WinC area that overlap with WinB only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_B_WC, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_B_WEIGHT0_WC, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_B_WEIGHT1_WC, + /** Color Key0 Enble/Disable for WinC, Overlap with WinA & WinB Only + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 3WIN_AB_CKEY1 enbled then ENABLE_3WIN_AB_CKEY01 + else 3WIN_AB_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 3WIN_AB_CKEY1 enbled then ENABLE_3WIN_AB_CKEY1 + else 3WIN_AB_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_3WIN_AB_WC, + /** Color Key1 Enble/Disable for WinC, Overlap with WinA & WinB + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 3WIN_AB_CKEY1 enbled then ENABLE_3WIN_AB_CKEY01 + else 3WIN_AB_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 3WIN_AB_CKEY1 enbled then ENABLE_3WIN_AB_CKEY0 + else 3WIN_AB_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_3WIN_AB_WC, + /** Blend Control for WinC area that overlap with WinA & WinB only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_3WIN_AB_WC, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_3WIN_AB_WEIGHT0_WC, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_3WIN_AB_WEIGHT1_WC, + /** GC Color Key for overlay, Not supported */ + GFDX_ATTR_COLOR_KEY, + /** GC Color Key Mask for overlay, Not supported */ + GFDX_ATTR_COLOR_KEY_MASK, + /** Set overlap type (see def), Not supported */ + GFDX_ATTR_OVERLAP_TYPE, + /** Gets VDisplay End for GE Start Window programming, Not supported */ + GFDX_ATTR_V_DISPLAY_END, + /** Gets range for clock divider L=0:H=15 */ + GFDX_ATTR_PWM0_CLK_RANGE, + /** Gets range for duty cycle L=0:H=255 */ + GFDX_ATTR_PWM0_DTY_RANGE, + /** Controls Backlight0 clock divider for PWM0 Bits[5:0] */ + GFDX_ATTR_PWM0_CLOCK, + /** Controls Backlight0 duty cycle for PWM0 Bits[7:0] */ + GFDX_ATTR_PWM0_DUTYCY, + /** Gets range for clock divider L=0:H=15 */ + GFDX_ATTR_PWM1_CLK_RANGE, + /** Gets range for duty cycle L=0:H=255 */ + GFDX_ATTR_PWM1_DTY_RANGE, + /** Controls Backlight1 clock divider for PWM1 Bits[5:0] */ + GFDX_ATTR_PWM1_CLOCK, + /** Controls Backlight1 duty cycle for PWM1 Bits[7:0] */ + GFDX_ATTR_PWM1_DUTYCY, + /** LCD Type 0-Main Lcd, 1-Sub Lcd */ + GFDX_ATTR_DISP_TYPE, + /** SW register 1 for program usage */ + GFDX_ATTR_SW_REG_1, + /** SW register 2 for program usage */ + GFDX_ATTR_SW_REG_2, + /** set/gets width height of screen encode window, + Parameters: W[15:0], H[31:16] */ + GFDX_ATTR_WH_WENC, + /** set/gets x, y start position of screen encode window, + Parameters: X[15:0], Y[31:16] */ + GFDX_ATTR_XY_POS_WENC, + /** Enable/Disable screen encode window. Parameters: 1-Enable 0-Disable. + * Please note that this sets the encode rate to its maximum value of + * 1.000 so if you plan to change it after enabling, + * use attribute GFDX_ATTR_WENC_RATE. */ + GFDX_ATTR_ENABLE_WENC, + /** Get Device ID & Rev, Not supported */ + GFDX_ATTR_DEVICE_INFO, + /** Enable CRC, Set Wait 1 or 2 VSync + Parameters: GFDXA_CRC_WAIT_VSYNC1, GFDXA_CRC_WAIT_VSYNC2, GFDXA_CRC_DISABLE + */ + GFDX_ATTR_CRC_ENABLE, + /** Get Check Sum */ + GFDX_ATTR_CRC_CHECK_SUM, + /** Not supported, Not supported */ + GFDX_ATTR_HC_SHAPE, + /** load Hardware Cursor Image, Not supported */ + GFDX_ATTR_HC_SHAPE_EXT, + /** set cursor hot spot, Not supported */ + GFDX_ATTR_HC_HOTSPOT, + /** set foreground and background color, Not supported */ + GFDX_ATTR_HC_COLOR, + /** Set Hardware Cursor new Position, Not supported */ + GFDX_ATTR_HC_POSITION, + /** Enable, Disable Hardware Cursor, Not supported */ + GFDX_ATTR_HC_SHOW, + /** free internal buffer, Not supported */ + GFDX_ATTR_HC_RELEASE, + /** Set Start or Stop Frame + Parameters: GFDX_MAIN_START, GFDX_MAIN_STOP, GFDX_SUB_START, GFDX_SUB_STOP + */ + GFDX_ATTR_STOP_START, + /** Set Start or Stop Frame + Parameters: GFDX_MAIN_ONE_FRAME, GFDX_SUB_ONE_FRAME + */ + GFDX_ATTR_SEND_ONE_FRAME, + /** Set No change */ + GFDX_ATTR_NOCHANGE, + /** Get Pre Init LCD Resolution Bit[0-15] Width, Bit[16-31] Height*/ + GFDX_ATTR_PRE_INIT_LCD_RES, + /** NVIDIA panel index internal to API use */ + GFDX_ATTR_INTERNAL_LCDTYPE, + /** Setting this attribute will bypass any hardware writes in DxAPI which go through + * the GFDX_CHANNEL_xx macros. The runtime environment GFSDK_DXINIT_BYPASS uses + * this attribue to disable hardware writes during DxSetDisplay(). + * Parameters: GFDX_SET_WRITE_SHADOW or GFDX_CLR_WRITE_SHADOW + */ + GFDX_ATTR_WRITE_SHADOW_ONLY, + /** Backlight0 ON GPIO LPW2 Low */ + GFDX_ATTR_BACKLIGHT0_ON, + /** Backlight1 ON GPIO LM1 Low */ + GFDX_ATTR_BACKLIGHT1_ON, + /** Backlight0 OFF GPIO LPW2 High */ + GFDX_ATTR_BACKLIGHT0_OFF, + /** Backlight1 OFF GPIO LM1 High*/ + GFDX_ATTR_BACKLIGHT1_OFF, + /** configure BACKLIGHT0 as GPIO on LPW2*/ + GFDX_ATTR_BACKLIGHT0_CONFIGURE_GPIO, + /** configure BACKLIGHT1 as GPIO on LM1*/ + GFDX_ATTR_BACKLIGHT1_CONFIGURE_GPIO, + /** configure BACKLIGHT0 as PWM on LPW2*/ + GFDX_ATTR_BACKLIGHT0_CONFIGURE_PWM, + /** configure BACKLIGHT1 as PWM on LM1 */ + GFDX_ATTR_BACKLIGHT1_CONFIGURE_PWM, + + /** Set Stop Frame Options, + Parameters: GFDX_MAIN_STOP_POLARITY_HIGH, GFDX_MAIN_STOP_POLARITY_LOW, GFDX_SUB_STOP_POLARITY_HIGH + GFDX_SUB_STOP_POLARITY_LOW, GFDX_MAIN_STOP_INPUT_PIN_ENABLE, GFDX_MAIN_STOP_INPUT_PIN_DISABLE, + GFDX_SUB_STOP_INPUT_PIN_ENABLE, GFDX_SUB_STOP_INPUT_PIN_DISABLE, GFDX_STOP_WINDOW_A_NC_ENABLE, + GFDX_STOP_WINDOW_A_NC_DISABLE, GFDX_STOP_WINDOW_B_NC_ENABLE, GFDX_STOP_WINDOW_B_NC_DISABLE, + GFDX_STOP_WINDOW_B_NC_ENABLE, GFDX_STOP_WINDOW_B_NC_DISABLE + */ + GFDX_ATTR_STOP_FRAME_OPTIONS, + /** Set Non Continuos Display */ + GFDX_ATTR_NC_DISPLAY, + /** Horizontal and Vertical Filter Support Window B + Parameters: GFDX_H_FILTER_ENABLE, GFDX_H_FILTER_DISABLE, GFDX_V_FILTER_ENABLE, GFDX_V_FILTER_DISABLE + */ + GFDX_ATTR_H_V_FILTER_WB, + /** Horizontal and Vertical Filter Support Window C + Parameters: GFDX_H_FILTER_ENABLE, GFDX_H_FILTER_DISABLE, GFDX_V_FILTER_ENABLE, GFDX_V_FILTER_DISABLE + */ + GFDX_ATTR_H_V_FILTER_WC, + + /** Get Supported Display Script Options + Parameters: GFDX_DEFAULT_TABLE, GFDX_DXAPI_SUPPORT, GFDX_FMARK_SUPPORT + */ + GFDX_ATTR_DISPLAY_SCRIPT_OPTIONS, + /** Rate of window decode output frames when sending continuously. + * please note that the rate is overwritten with the maximum value (i.e. 1.000 + * which is represented by a fixed point fraction 16.16) if you use attribute + * GFDX_ATTR_ENABLE_WENC, so you need to overwrite with this attribute. + * Parameters: any number between 0x0 and 0x10000 (i.e. 0.0 an 1.000) + */ + GFDX_ATTR_WENC_RATE + +} GFDXATTRIBUTES; + +// Stop Frame Options +#define GFDX_MAIN_STOP_POLARITY_HIGH 0x00000001 +#define GFDX_MAIN_STOP_POLARITY_LOW 0x80000001 +#define GFDX_MAIN_STOP_INPUT_PIN_ENABLE 0x00000002 +#define GFDX_MAIN_STOP_INPUT_PIN_DISABLE 0x80000002 + +#define GFDX_SUB_STOP_POLARITY_HIGH 0x00000004 +#define GFDX_SUB_STOP_POLARITY_LOW 0x80000004 +#define GFDX_SUB_STOP_INPUT_PIN_ENABLE 0x00000006 +#define GFDX_SUB_STOP_INPUT_PIN_DISABLE 0x80000006 + +#define GFDX_STOP_WINDOW_A_NC_ENABLE 0x00000010 +#define GFDX_STOP_WINDOW_A_NC_DISABLE 0x80000010 +#define GFDX_STOP_WINDOW_B_NC_ENABLE 0x00000011 +#define GFDX_STOP_WINDOW_B_NC_DISABLE 0x80000011 +#define GFDX_STOP_WINDOW_C_NC_ENABLE 0x00000012 +#define GFDX_STOP_WINDOW_C_NC_DISABLE 0x80000012 + +// Horizontal and Vertical Filter Support Window B & C + +#define GFDX_H_FILTER_ENABLE 0x00000100 +#define GFDX_H_FILTER_DISABLE 0x80000100 +#define GFDX_V_FILTER_ENABLE 0x00004000 +#define GFDX_V_FILTER_DISABLE 0x80004000 +#define GFDX_V_FILTER_OPTIMIZE_ENABLE 0x00010000 +#define GFDX_V_FILTER_OPTIMIZE_DISABLE 0x80010000 + +// Display Script Options + +#define GFDX_DEFAULT_TABLE 0x00000001 +#define GFDX_DXAPI_SUPPORT 0x00000002 +#define GFDX_FMARK_SUPPORT 0x00000004 + + +/** Attribute value for GFDX_ATTR_WRITE_SHADOW_ONLY. + * Setting this attribute will disable all channel hardware writes in DxAPI. + * The runtime environment GFSDK_DXINIT_BYPASS uses this attribue to disable + * hardware writes in DxSetDisplay(). + */ +#define GFDX_SET_WRITE_SHADOW 0x00000001 +/** Attribute value for GFDX_ATTR_WRITE_SHADOW_ONLY. + * This attribute is used to clear the effect of #GFDX_SET_WRITE_SHADOW. + * It must be used explicitly to re-enable hardware writes in DxAPI. + */ +#define GFDX_CLR_WRITE_SHADOW 0x80000001 + + + +#define GFDX_COLOR_DEPTH_YCbCr422 (16UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV422 (17UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YCbCr420P (18UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV420P (19UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YCbCr422P (20UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV422P (21UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YCbCr422R (22UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV422R (23UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YCbCr422RA (24UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV422RA (25UL | 0x80000000) + +#define GFDX_SWAP_MASK 0x000f0000 +#define GFDX_NO_SWAP 0x00000000 +#define GFDX_BYTE_SWAP 0x00010000 +#define GFDX_ORDER_SWAP 0x00020000 +#define GFDX_WORD_SWAP 0x00030000 + +#define GFDX_COLOR_DEPTH_YUV422_YVYU (17UL | 0x80000000 | GFDX_NO_SWAP) +#define GFDX_COLOR_DEPTH_YUV422_VYUY (17UL | 0x80000000 | GFDX_BYTE_SWAP) +#define GFDX_COLOR_DEPTH_YUV422_UYVY (17UL | 0x80000000 | GFDX_ORDER_SWAP) +#define GFDX_COLOR_DEPTH_YUV422_YUYV (17UL | 0x80000000 | GFDX_WORD_SWAP) + +#define GFDX_COLOR_DEPTH_YCbCr422_YVYU (16UL | 0x80000000 | GFDX_NO_SWAP) +#define GFDX_COLOR_DEPTH_YCbCr422_VYUY (16UL | 0x80000000 | GFDX_BYTE_SWAP) +#define GFDX_COLOR_DEPTH_YCbCr422_UYVY (16UL | 0x80000000 | GFDX_ORDER_SWAP) +#define GFDX_COLOR_DEPTH_YCbCr422_YUYV (16UL | 0x80000000 | GFDX_WORD_SWAP) + + +// Horizontal Filter Coefficients + +#define GF_H_P00C0 0x0 +#define GF_H_P00C1 (0x0 << 3 ) +#define GF_H_P00C2 (0x80 << 8 ) +#define GF_H_P00C3 (0x0 << 16) +#define GF_H_P00C4 (0x0 << 24) +#define GF_H_P00C5 (0x0 << 29) +#define GF_H_P00CX GF_H_P00C0|GF_H_P00C1|GF_H_P00C2|GF_H_P00C3|GF_H_P00C4|GF_H_P00C5 + +#define GF_H_P01C0 0x1 +#define GF_H_P01C1 (0x1c << 3 ) +#define GF_H_P01C2 (0x7c << 8 ) +#define GF_H_P01C3 (0x8 << 16) +#define GF_H_P01C4 (0x1e << 24) +#define GF_H_P01C5 (0x1 << 29) +#define GF_H_P01CX GF_H_P01C0|GF_H_P01C1|GF_H_P01C2|GF_H_P01C3|GF_H_P01C4|GF_H_P01C5 + +#define GF_H_P02C0 0x1 +#define GF_H_P02C1 (0x18 << 3 ) +#define GF_H_P02C2 (0x7a << 8 ) +#define GF_H_P02C3 (0x11 << 16) +#define GF_H_P02C4 (0x1b << 24) +#define GF_H_P02C5 (0x1 << 29) +#define GF_H_P02CX GF_H_P02C0|GF_H_P02C1|GF_H_P02C2|GF_H_P02C3|GF_H_P02C4|GF_H_P02C5 + +#define GF_H_P03C0 0x2 +#define GF_H_P03C1 (0x15 << 3 ) +#define GF_H_P03C2 (0x73 << 8 ) +#define GF_H_P03C3 (0x1b << 16) +#define GF_H_P03C4 (0x19 << 24) +#define GF_H_P03C5 (0x2 << 29) +#define GF_H_P03CX GF_H_P03C0|GF_H_P03C1|GF_H_P03C2|GF_H_P03C3|GF_H_P03C4|GF_H_P03C5 + +#define GF_H_P04C0 0x2 +#define GF_H_P04C1 (0x13 << 3 ) +#define GF_H_P04C2 (0x6d << 8 ) +#define GF_H_P04C3 (0x25 << 16) +#define GF_H_P04C4 (0x17 << 24) +#define GF_H_P04C5 (0x2 << 29) +#define GF_H_P04CX GF_H_P04C0|GF_H_P04C1|GF_H_P04C2|GF_H_P04C3|GF_H_P04C4|GF_H_P04C5 + +#define GF_H_P05C0 0x3 +#define GF_H_P05C1 (0x11 << 3 ) +#define GF_H_P05C2 (0x66 << 8 ) +#define GF_H_P05C3 (0x2f << 16) +#define GF_H_P05C4 (0x15 << 24) +#define GF_H_P05C5 (0x2 << 29) +#define GF_H_P05CX GF_H_P05C0|GF_H_P05C1|GF_H_P05C2|GF_H_P05C3|GF_H_P05C4|GF_H_P05C5 + +#define GF_H_P06C0 0x3 +#define GF_H_P06C1 (0x11 << 3 ) +#define GF_H_P06C2 (0x5e << 8 ) +#define GF_H_P06C3 (0x38 << 16) +#define GF_H_P06C4 (0x13 << 24) +#define GF_H_P06C5 (0x3 << 29) +#define GF_H_P06CX GF_H_P06C0|GF_H_P06C1|GF_H_P06C2|GF_H_P06C3|GF_H_P06C4|GF_H_P06C5 + +#define GF_H_P07C0 0x3 +#define GF_H_P07C1 (0x10 << 3 ) +#define GF_H_P07C2 (0x55 << 8 ) +#define GF_H_P07C3 (0x43 << 16) +#define GF_H_P07C4 (0x12 << 24) +#define GF_H_P07C5 (0x3 << 29) +#define GF_H_P07CX GF_H_P07C0|GF_H_P07C1|GF_H_P07C2|GF_H_P07C3|GF_H_P07C4|GF_H_P07C5 + +#define GF_H_P08C0 0x3 +#define GF_H_P08C1 (0x11 << 3 ) +#define GF_H_P08C2 (0x4c << 8 ) +#define GF_H_P08C3 (0x4c << 16) +#define GF_H_P08C4 (0x11 << 24) +#define GF_H_P08C5 (0x3 << 29) +#define GF_H_P08CX GF_H_P08C0|GF_H_P08C1|GF_H_P08C2|GF_H_P08C3|GF_H_P08C4|GF_H_P08C5 + +#define GF_H_P09C0 0x3 +#define GF_H_P09C1 (0x12 << 3 ) +#define GF_H_P09C2 (0x43 << 8 ) +#define GF_H_P09C3 (0x55 << 16) +#define GF_H_P09C4 (0x10 << 24) +#define GF_H_P09C5 (0x3 << 29) +#define GF_H_P09CX GF_H_P09C0|GF_H_P09C1|GF_H_P09C2|GF_H_P09C3|GF_H_P09C4|GF_H_P09C5 + +#define GF_H_P0AC0 0x3 +#define GF_H_P0AC1 (0x13 << 3 ) +#define GF_H_P0AC2 (0x38 << 8 ) +#define GF_H_P0AC3 (0x5e << 16) +#define GF_H_P0AC4 (0x11 << 24) +#define GF_H_P0AC5 (0x3 << 29) +#define GF_H_P0ACX GF_H_P0AC0|GF_H_P0AC1|GF_H_P0AC2|GF_H_P0AC3|GF_H_P0AC4|GF_H_P0AC5 + +#define GF_H_P0BC0 0x2 +#define GF_H_P0BC1 (0x15 << 3 ) +#define GF_H_P0BC2 (0x2f << 8 ) +#define GF_H_P0BC3 (0x66 << 16) +#define GF_H_P0BC4 (0x11 << 24) +#define GF_H_P0BC5 (0x3 << 29) +#define GF_H_P0BCX GF_H_P0BC0|GF_H_P0BC1|GF_H_P0BC2|GF_H_P0BC3|GF_H_P0BC4|GF_H_P0BC5 + +#define GF_H_P0CC0 0x2 +#define GF_H_P0CC1 (0x17 << 3 ) +#define GF_H_P0CC2 (0x25 << 8 ) +#define GF_H_P0CC3 (0x6d << 16) +#define GF_H_P0CC4 (0x13 << 24) +#define GF_H_P0CC5 (0x2 << 29) +#define GF_H_P0CCX GF_H_P0CC0|GF_H_P0CC1|GF_H_P0CC2|GF_H_P0CC3|GF_H_P0CC4|GF_H_P0CC5 + +#define GF_H_P0DC0 0x2 +#define GF_H_P0DC1 (0x19 << 3 ) +#define GF_H_P0DC2 (0x1b << 8 ) +#define GF_H_P0DC3 (0x73 << 16) +#define GF_H_P0DC4 (0x15 << 24) +#define GF_H_P0DC5 (0x2 << 29) +#define GF_H_P0DCX GF_H_P0DC0|GF_H_P0DC1|GF_H_P0DC2|GF_H_P0DC3|GF_H_P0DC4|GF_H_P0DC5 + +#define GF_H_P0EC0 0x1 +#define GF_H_P0EC1 (0x1b << 3 ) +#define GF_H_P0EC2 (0x11 << 8 ) +#define GF_H_P0EC3 (0x7a << 16) +#define GF_H_P0EC4 (0x18 << 24) +#define GF_H_P0EC5 (0x1 << 29) +#define GF_H_P0ECX GF_H_P0EC0|GF_H_P0EC1|GF_H_P0EC2|GF_H_P0EC3|GF_H_P0EC4|GF_H_P0EC5 + +#define GF_H_P0FC0 0x1 +#define GF_H_P0FC1 (0x1e << 3 ) +#define GF_H_P0FC2 (0x8 << 8 ) +#define GF_H_P0FC3 (0x7c << 16) +#define GF_H_P0FC4 (0x1c << 24) +#define GF_H_P0FC5 (0x1 << 29) +#define GF_H_P0FCX GF_H_P0FC0|GF_H_P0FC1|GF_H_P0FC2|GF_H_P0FC3|GF_H_P0FC4|GF_H_P0FC5 + +// Vertical Filter Coefficients +#define GF_V_P00C0 0x80 +#define GF_V_P01C0 0x78 +#define GF_V_P02C0 0x70 +#define GF_V_P03C0 0x68 +#define GF_V_P04C0 0x60 +#define GF_V_P05C0 0x58 +#define GF_V_P06C0 0x50 +#define GF_V_P07C0 0x48 +#define GF_V_P08C0 0x40 +#define GF_V_P09C0 0x38 +#define GF_V_P0AC0 0x30 +#define GF_V_P0BC0 0x28 +#define GF_V_P0CC0 0x20 +#define GF_V_P0DC0 0x18 +#define GF_V_P0EC0 0x10 +#define GF_V_P0FC0 0x8 + +/** Hardware Cursor definition */ +typedef struct _HC_COLOR +{ + NvU32 foreground; + NvU32 background; +} HC_COLOR, *PHC_COLOR; + +typedef struct _HC_POSITION +{ + NvU32 x; + NvU32 y; +} HC_POSITION, *PHC_POSITION; + +typedef struct _HC_HOTSPOT +{ + NvU32 x; + NvU32 y; +} HC_HOTSPOT, *PHC_HOTSPOT; + +enum +{ + CD64X64, + CD32X32 +}; + +typedef struct _HC_MASK +{ + NvU32 *data; + NvU32 size; + NvU32 dimension; +} HC_MASK, *PHC_MASK; + +typedef struct _DisplayTimingEntry +{ + /** Horizontal Ref. Need not to be changed, set 0 for default setting */ + NvU16 usHRef; + /** Vertical Ref. Need not to be changed, set 0 for default setting */ + NvU16 usVRef; + /** Horizontal Sync Width, set 0 for default setting */ + NvU16 usHSyncWidth; + /** Vertical Sync Width, set 0 for default setting */ + NvU16 usVSyncWidth; + /** Horizontal Back Porch, set 0 for default setting */ + NvU16 usHBackPorch; + /** Vertical Back Porch, set 0 for default setting */ + NvU16 usVBackPorch; + /** Horizontal Active, Set same as Window Width */ + NvU16 usHActive; + /** Vertical Active, Set same as Window Height */ + NvU16 usVActive; + /** Horizontal Total, set 0 for default setting */ + NvU16 usHTotal; + /** Vertical Total, set 0 for default setting */ + NvU16 usVTotal; + /** Window Width */ + NvU16 usPanelVX; + /** Window Height */ + NvU16 usPanelVY; + /** Window Start X Position */ + NvU16 usPosX; + /** Window Start Y Position */ + NvU16 usPosY; + /** Window Sel 0-WinA (GFDX_DISPTMG_SEL_WINA), 1-WinB (GFDX_DISPTMG_SEL_WINB) */ + NvU16 SelWin; + NvU16 Reserved1; + NvU16 Reserved2; + NvU16 Reserved3; +} DISPLAYTIMINGENTRY, *PDISPLAYTIMINGENTRY; + +// Display Timing + +#define GFDX_DISPTMG_SEL_WINA 0 +#define GFDX_DISPTMG_SEL_WINB 1 + +/** redefine some of the constants for compatibility */ +#define GFDX_ATTR_WIDTH_HEIGHT GFDX_ATTR_WH_WA +#define GFDX_ATTR_XY_POSITION GFDX_ATTR_XY_POS_WA +#define GFDX_ATTR_BPP GFDX_ATTR_BPP_WA +#define GFDX_ATTR_PIXEL_DOUBLE GFDX_ATTR_PIXEL_DBL_WA +#define GFDX_ATTR_STARTADDR GFDX_ATTR_ADDR_WA_B0 +#define GFDX_ATTR_STRIDE GFDX_ATTR_STRIDE_WA_B0 + +/** definition of GFDX_ATTR_PIXEL_DOUBLE */ +#define GFDXA_PIX_DBL_H 0x01 /* Horizontal pixel doubling on */ +#define GFDXA_PIX_DBL_V 0x02 /* Vertical pixel doubling on */ + +/** definition of GFDX_ATTR_DOUBLE_BUF control (0,2,1,3 is same as hw) */ +#define GFDXA_DB_BUF0 0x00 /* GC display buffer address is from buf0 */ +#define GFDXA_DB_BUF1 0x02 /* GC display buffer address is from buf1 */ +#define GFDXA_DB_HOST 0x06 /* GC display buffer address is from Host */ +#define GFDXA_DB_GE 0x01 /* GC display buffer address is from GE */ +#define GFDXA_DB_VI 0x03 /* GC display buffer address is from VI */ +#define GFDXA_DB_EPP 0x04 +#define GFDXA_DB_MPEGE 0x05 + +/** definition of GFDX_ATTR_ROTATE_BIT_W? */ +#define GFDXA_ROTATE_BITS_0 0x00000000 // no rotation, x+,y+,startAddr = 0 +#define GFDXA_ROTATE_BITS_90 0x00000500 // +90 (anti-clock), x-, y+, start= stride-3 (TL) +#define GFDXA_ROTATE_BITS_180 0x00000300 // +180(anti-clock), x-, y-, start= height*stride-3 (BR) +#define GFDXA_ROTATE_BITS_270 0x00000600 // +270(anti-clock), x+, y-, start= (height-1)*stride (BL) + +/** definition of Color Key and Alpha Blending*/ +#define GFDXA_BLEND_CONTROL_NOKEY_ALPHA_WEIGHT 0x00000001 + +#define GFDXA_BLEND_COLOR_KEY0_ENABLE 0x00000001 +#define GFDXA_BLEND_COLOR_KEY1_ENABLE 0x00000002 +#define GFDXA_BLEND_COLOR_KEY0_DISABLE 0x00000000 +#define GFDXA_BLEND_COLOR_KEY1_DISABLE 0x00000000 +#define GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT 0x00000004 +#define GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT 0x00000008 + +/** Disable CRC capture. */ +#define GFDXA_CRC_DISABLE 0x00000000 +/** Wait for 1 VSYNC and capture CRC for one frame. */ +#define GFDXA_CRC_WAIT_VSYNC1 0x00000001 +/** Wait for 2 VSYNC and capture CRC for one frame. */ +#define GFDXA_CRC_WAIT_VSYNC2 0x00000003 + +/** Set Direction for Rotation*/ +#define GFDX_ATTR_H_DIRECTION_DECREMENT 0x00000001 +#define GFDX_ATTR_H_DIRECTION_INCREMENT 0x00000000 +#define GFDX_ATTR_V_DIRECTION_DECREMENT 0x00000004 +#define GFDX_ATTR_V_DIRECTION_INCREMENT 0x00000000 + +/** definition of Palette Enable/Disable*/ +#define GFDX_ATTR_PALETTE_ENABLE 0x00010000 +#define GFDX_ATTR_PALETTE_DISABLE 0x00000000 +#define GFDX_ATTR_DV_ENABLE 0x00100000 +#define GFDX_ATTR_DV_DISABLE 0x00000000 + +#define GFDX_ATTR_WENC_DISABLE 0x00000000 +#define GFDX_ATTR_WENC_ENABLE 0x00000001 +#define GFDX_ATTR_WENC_TRIG_DISABLE 0x00000000 +#define GFDX_ATTR_WENC_TRIG_ENABLE 0x00000001 +#define GFDX_ATTR_WENC_TRIG_ONE_SHOT 0x00000002 + +/** Read CRC Check Sum */ +#define GFDXA_CRC_READ_CHECK_SUM 0x00000001 + +/** + Sub-LCD support + */ +#define LCD_MAIN 0 +#define LCD_SUB 1 +#define MAX_LCD 2 + +/** + Start-Stop Frame support + */ +#define GFDX_MAIN_START 0x00000001 +#define GFDX_MAIN_STOP 0x00000002 +#define GFDX_SUB_START 0x00000003 +#define GFDX_SUB_STOP 0x00000004 +#define GFDX_MAIN_ONE_FRAME 0x00000001 +#define GFDX_SUB_ONE_FRAME 0x00000002 + +#define GF_DISPLAY_NORMAL 0x00000000 +#define GF_DISPLAY_PARTIAL 0x00000001 + +#ifdef PROJECT_SEC_G1 +#define GF_DISPLAY_NTSC_V570 0x00000002 +#define GF_DISPLAY_NTSC_V490 0x00000003 +#define GF_DISPLAY_NTSC_V700 0x00000004 +#define GF_DISPLAY_PAL 0x00000005 +#endif + +/** + DxEnableDisplay support + */ +#define GF_PANEL_DRV_ONOFF 0x00000100 +#define GF_PANEL_DRV_SLP_WKUP 0x00000200 + +/** + Clock selections, profile and options + */ +#define GFDX_OSC 0x00000001 +#define GFDX_ROSC 0x00000002 +#define GFDX_PLL1 0x00000003 +#define GFDX_PLL_QUERY 0x80000000 +#define GFDX_POWER 0x00010000 +#define GFDX_PERFORMANCE 0x00020000 + +/** + Option for GFDxVSync: Waits until vertical blank (default). + */ +#define GFDX_VSYNC_WAIT 0x0000 +/** + Option for GFDxVSync: Checks and immediately returns vertical blank status. + Returns GF_SUCCESS if in vertical blank, else returns GF_ERROR. + */ +#define GFDX_VSYNC_CHECK 0x0001 +/** + Option for GFDxVSync: Puts Wait token in the command FIFO and the CPU returns + immediately. Uses FRAME_END interrupt bit. + */ +#define GFDX_VSYNC_HW_WAIT 0x0002 +/** + Option for GFDxVSync: Raise and wait in the command fifo for VBLANK. + */ +#define GFDX_VBLANK_HW_WAIT 0x0003 +/** + Option for GFDxVSync: Raise and wait in the command fifo for VPULSE3. + */ +#define GFDX_VPULSE3_HW_WAIT 0x0004 + +/** Dx Hardware has multiple windows (some registers are replicated per + window - the window must be exlicitly selected to write to the correct + register in the window). Use this enum to select which window + to write to for APIs that support this - window selection is mostly + done through the attribute name, eg: _WA, _WB, etc. + */ +typedef enum _GFDXWINDOWSELECT +{ + DX_WINDOW_SELECT_NONE = 0, + DX_WINDOW_SELECT_NORMAL = 1, /* all windows */ + DX_WINDOW_SELECT_A = 2, + DX_WINDOW_SELECT_B = 4, + DX_WINDOW_SELECT_C = 8 +} GFDXWINDOWSELECT; + +/** Color Space Conversion coefficients. Use GFDxSetCSCCoeff() and + GFDxGetCSCCoeff() to write/read the coefficients to/from hardware. + */ +typedef struct _GFDXCSCCOEFF +{ + NvU32 YOF; + NvU32 KYRGB; + NvU32 KUR; + NvU32 KVR; + NvU32 KUG; + NvU32 KVG; + NvU32 KUB; + NvU32 KVB; +} GFDXCSCCOEF; + +typedef struct _DXSCRIPTCMD +{ + NvU32 ScriptCmdType; /** Script Command */ + NvU32 DataBurstCount; /** Burst count 0-255, not Valid for GFSCMD */ + NvU32 PanelDriverCmd; /** Valid Only if ScriptCmdType = GFPDRV_CMD */ + NvU32 *PanelIndexData; /** Data pointer */ + NvU32 GFData; /** Valid only if ScriptCmdType is GFSCMD */ + NvU32 reserved1; +} DXSCRIPTCMD, *PDXSCRIPTCMD; + +typedef struct _GFLCDTABLE { + /** For usage see GFDxSetDisplay()*/ + GF_RETTYPE (* DxSetDisplay)(GFDxHandle DxHandle, int lcdSel, NvU32 ulStartAddr, + NvU32 ulStride, unsigned bpp); + /** For usage see GFDxEnableDisplay()*/ + GF_RETTYPE (* DxEnableDisplay)(GFDxHandle DxHandle, int lcdSel, unsigned bOn); + /** For usage see GFDxSetAttribute()*/ + GF_RETTYPE (* DxSetAttribute)(GFDxHandle DxHandle, int lcdSel, unsigned aid, NvU32 attr); + /** For usage see GFDxGetAttribute()*/ + GF_RETTYPE (* DxGetAttribute)(GFDxHandle DxHandle, int lcdSel, unsigned aid, NvU32 *attr); + /** For usage see GFDxSetAttributeWithCS()*/ + GF_RETTYPE (* DxSetAttributeWithCS)(GFDxHandle DxHandle, int lcdSel, unsigned aid, NvU32 attr); + /** For usage see GFDxGetAttributeWithCS()*/ + GF_RETTYPE (* DxGetAttributeWithCS)(GFDxHandle DxHandle, int lcdSel, unsigned aid, NvU32 *attr); + /** For usage see GFDxRotate()*/ + GF_RETTYPE (* DxRotate)(GFDxHandle DxHandle, int lcdSel, unsigned nRotate, NvU32 ulStartAddr); + /** For usage see GFDxErase()*/ + GF_RETTYPE (* DxErase)(GFDxHandle DxHandle, int lcdSel, NvU32 ulStartAddr, NvU32 color); + /** For usage see GFDxSwitchLCD()*/ + GF_RETTYPE (* DxSwitchLCD)(GFDxHandle DxHandle, int lcdSel, int Option); + /** LCD Configurations */ + void * pLcdConfig; + /** For usage see GFDxScriptCmd()*/ + GF_RETTYPE (* DxScriptCmd)(GFDxHandle DxHandle, int lcdSel, PDXSCRIPTCMD pDxScriptCmd, NvU32 Option); + /** For usage see GFDxScriptCmdWithCS()*/ + GF_RETTYPE (* DxScriptCmdWithCS)(GFDxHandle DxHandle, int lcdSel, PDXSCRIPTCMD pDxScriptCmd, NvU32 Option); + /** For usage see GFDxDisplayTiming()*/ + GF_RETTYPE (* DxDisplayTiming)(GFDxHandle DxHandle, int lcdSel, PDISPLAYTIMINGENTRY pDxTiming, NvU32 Option); + /** For usage see GFDxDisplayTimingWithCS()*/ + GF_RETTYPE (* DxDisplayTimingWithCS)(GFDxHandle DxHandle, int lcdSel, PDISPLAYTIMINGENTRY pDxTiming, NvU32 Option); + /** For usage see GFDxSetDisplayEx()*/ + GF_RETTYPE (* DxSetDisplayEx)(GFDxHandle DxHandle, int lcdSel, NvU32 ulStartAddr, + NvU32 ulStride, unsigned bpp, unsigned bOn); +} GFLCDTABLE; + +/* Publicly exposed DX API function table */ +typedef struct _GFDXTABLE +{ + /** For usage see GFDxGetProperty()*/ + GF_RETTYPE (* DxGetProperty)(GFDxHandle DxHandle, PGFDXPROPERTY pDxProp); + /** For usage see GFDxVSync()*/ + GF_RETTYPE (* DxVSync)(GFDxHandle DxHandle, NvU16 option); + /** For usage see GFDxSetDisplayWithCS()*/ + GF_RETTYPE (* DxSetDisplayWithCS)(GFDxHandle DxHandle, int lcdSel, + NvU32 ulStartAddr, NvU32 ulStride, unsigned bpp); + /** For usage see GFDxEnableDisplayWithCS()*/ + GF_RETTYPE (* DxEnableDisplayWithCS)(GFDxHandle DxHandle, int lcdSel, + unsigned bOn); +// Removed to make the WinCE dll binary compatible with SC4 dll. +// GF_RETTYPE (* DxHSync)(GFDxHandle DxHandle, NvU16 option); + + /** For per LCD functions. ()*/ + GFLCDTABLE Lcd[MAX_LCD]; + /** For usage see GFDxEraseWithCS()*/ + GF_RETTYPE (* DxEraseWithCS)(GFDxHandle DxHandle, int lcdSel, + NvU32 ulStartAddr, NvU32 color); + /** For usage see GFDxSetCSCCoeff()*/ + GF_RETTYPE (* DxSetCSCCoeff)( GFDxHandle DxHandle, GFDXWINDOWSELECT window, + GFDXCSCCOEF *coef ); + /** For usage see GFDxGetCSCCoeff()*/ + GF_RETTYPE (* DxGetCSCCoeff)( GFDxHandle DxHandle, GFDXWINDOWSELECT window, + GFDXCSCCOEF *coef ); + /** For usage see GFDxVSyncWithCS()*/ + GF_RETTYPE (* DxVSyncWithCS)(GFDxHandle DxHandle, NvU16 option); + /** For usage see GFDxSetCSCCoeffWithCS()*/ + GF_RETTYPE (* DxSetCSCCoeffWithCS)( GFDxHandle DxHandle, GFDXWINDOWSELECT window, + GFDXCSCCOEF *coef ); + /** For usage see GFDxGetCSCCoeffWithCS()*/ + GF_RETTYPE (* DxGetCSCCoeffWithCS)( GFDxHandle DxHandle, GFDXWINDOWSELECT window, + GFDXCSCCOEF *coef ); + /** For usage see GFDxSetDisplayExWithCS()*/ + GF_RETTYPE (* DxSetDisplayExWithCS)(GFDxHandle DxHandle, int lcdSel, + NvU32 ulStartAddr, NvU32 ulStride, unsigned bpp, unsigned bOn); +} GFDXTABLE, *PGFDXTABLE; + +/** Filter coefficients */ +typedef struct GFDxHorizontalFilter_t +{ + NvU32 filter[16]; +} GFDxHorizontalFilter; + +typedef struct GFDxVerticalFilter_t +{ + NvU32 filter[16]; +} GFDxVerticalFilter; + +/** + Typesafe function for opening Dx component. + This function is implicitly called by the resource manager (GFRm) in response + to an application’s call to GFRmComponentGet() for the GFDxAPI + component. It is not supposed to be called by an application. It is included + here only for the purpose of GFDxAPI source code customization. + + @param hrm (GFRmHandle) Handle to Rm component. + @param phDx (GFDxHandle *) Handle to Dx component. + @param state (GF_STATE_TYPE) + @param hCh (GFRmChHandle) Handle to Channel. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +GF_RETTYPE GFDxOpen(GFRmHandle hRm, GFDxHandle *phDx, + GF_STATE_TYPE state, GFRmChHandle hCh); + +/** + Typesafe function for closing Dx component. + This function is implicitly called by the resource manager (GFRm) in response + to an application’s call to GFRmComponentGet() for the GFDxAPI + component. It is included here only for the purpose of GFDxAPI source code + customization. + + @param phDx (GFDxHandle *) Handle to Dx component. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + * +*/ +void GFDxClose(GFDxHandle *phDx); + +/** + This funtion returns the fixed properties of the display hardware. + + @param DxHandle (GFDxHandle) Handle to Dx Component + @param pDxProp (PGFDXPROPERTY) See #GFDXPROPERTY + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxGetProperty( handle, pDxProp ) \ + ((PGFDXTABLE)handle)->DxGetProperty( handle, pDxProp ) + +/** + This functions waits for a vertical sync and returns to the caller. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param option (NvU16) Search for Option for GFDxVSync for more info. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxVSync(handle, option) \ + ((PGFDXTABLE)handle)->DxVSync( handle, option ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxVSync(). + */ +#define GFDxVSyncWithCS(handle, option) \ + ((PGFDXTABLE)handle)->DxVSyncWithCS( handle, option ) + +/** + IMPORTANT NOTE: This function is not available. + */ +#define GFDxHSync(handle, option) \ + ((PGFDXTABLE)handle)->DxHSync( handle, option ) + +/** + This function initializes the main LCD or sub-LCD display. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param Handle (DxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param ulStartAddr (NvU32) display start address for main or sub-LCD (should be set to 0). + GFDxSetAttribute() should be called to set the display start + address for the main LCD or sub-LCD. + @param ulStride (NvU32) Default stride if 0; otherwise use the passed value. + GFDxSetAttribute() should be called to set the display stride + for the main LCD or sub-LCD. + @param bpp (unsigned) Default should be 16 bits/pixel for main LCD or sub-LCD. + GFDxSetAttribute() should be called to set the display bpp for + the main LCD or sub-LCD. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSetDisplay( handle, lcdSel, ulStartAddr, ulStride, bpp ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSetDisplay( handle, lcdSel, ulStartAddr, ulStride, bpp ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxSetDisplay(). + */ +#define GFDxSetDisplayWithCS( handle, lcdSel, ulStartAddr, ulStride, bpp ) \ + ((PGFDXTABLE)handle)->DxSetDisplayWithCS( handle, lcdSel, ulStartAddr, \ + ulStride, bpp ) + +/** + This function initializes the main LCD or sub-LCD display. + IMPORTANT NOTE: This function extends GFDxSetDisplay() function by adding an option to enable/disable + the LCD display. + + @param Handle (DxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param ulStartAddr (NvU32) display start address for main or sub-LCD (should be set to 0). + GFDxSetAttribute() should be called to set the display start + address for the main LCD or sub-LCD. + @param ulStride (NvU32) Default stride if 0; otherwise use the passed value. + GFDxSetAttribute() should be called to set the display stride + for the main LCD or sub-LCD. + @param bpp (unsigned) Default should be 16 bits/pixel for main LCD or sub-LCD. + GFDxSetAttribute() should be called to set the display bpp for + the main LCD or sub-LCD. + @param bOn (unsigned) 1 to Enable Display, + 0 to disable Display. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSetDisplayEx( handle, lcdSel, ulStartAddr, ulStride, bpp, bOn ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSetDisplayEx( handle, lcdSel, ulStartAddr, ulStride, bpp, bOn ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxSetDisplayEx(). + */ +#define GFDxSetDisplayExWithCS( handle, lcdSel, ulStartAddr, ulStride, bpp, bOn ) \ + ((PGFDXTABLE)handle)->DxSetDisplayExWithCS( handle, lcdSel, ulStartAddr, \ + ulStride, bpp, On) + +/** + This function enables/disables LCD display with proper power sequencing. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param Handle (DxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param bOn (unsigned) Bit0: 1 to Enable Display, + 0 to disable Display. + Also Option for Panel Driver On/Off + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxEnableDisplay( handle, lcdSel, bOn ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxEnableDisplay( handle, lcdSel, bOn ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxEnableDisplay(). + */ +#define GFDxEnableDisplayWithCS( handle, lcdSel, bOn ) \ + ((PGFDXTABLE)handle)->DxEnableDisplayWithCS( handle, lcdSel, bOn ) + +/** + GFDxSetAttribute() sets the display attributes for a main panel or + subpanel. All the GFDxAPI attributes should be set after the + GFDxSetDisplay() + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param aid (unsigned) Attribute IDs. See #GFDXATTRIBUTES Enumeration Type + @param attr (NvU32) Attribute value for main LCD or sub-LCD. Should be + written with attribute ID in aid. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSetAttribute( handle, lcdSel, aid, attr) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSetAttribute( handle, lcdSel, aid, attr ) + +/** + Execute script command from DxApiTable. Send cmd/data to panel. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param ScriptCmdType (PDXSCRIPTCMD) Script Command + @param Option (NvU32) Reserved, not used. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxScriptCmd( handle, lcdSel, pDxScriptCmd, Option) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxScriptCmd( handle, lcdSel, pDxScriptCmd, Option ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxScriptCmd(). + */ +#define GFDxScriptCmdWithCS( handle, lcdSel, pDxScriptCmd, Option) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxScriptCmdWithCS( handle, lcdSel, pDxScriptCmd, Option ) + +/** Sets the timing registers. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param pDxTiming (PDISPLAYTIMINGENTRY) See #PDISPLAYTIMINGENTRY. + @param Option (NvU32) GF_DISPLAY_PARTIAL or GF_DISPLAY_NORMAL. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxDisplayTiming( handle, lcdSel, pDxTiming, Option) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxDisplayTiming( handle, lcdSel, pDxTiming, Option ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxDisplayTiming(). + */ +#define GFDxDisplayTimingWithCS( handle, lcdSel, pDxTiming, Option) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxDisplayTimingWithCS( handle, lcdSel, pDxTiming, Option ) + +/** + This function returns the bit depth, the destination stride, the start address, + the associated surface of the display buffer, or the graphics command + execution control. The location of the returned attribute value is pointed to by + attr. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param aid (unsigned) Attribute ID. see #GFDXATTRIBUTES. + @param attr (NvU32 *) pointer to attribute value. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxGetAttribute( handle, lcdSel, aid, pAttr) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxGetAttribute( handle, lcdSel, aid, pAttr ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxSetAttribute(). + */ +#define GFDxSetAttributeWithCS( handle, lcdSel, aid, attr) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSetAttributeWithCS( handle, lcdSel, aid, attr ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxGetAttribute(). + */ +#define GFDxGetAttributeWithCS( handle, lcdSel, aid, pAttr) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxGetAttributeWithCS( handle, lcdSel, aid, pAttr ) + +/** + IMPORTANT NOTE: this function is not available. + */ +#define GFDxRotate( handle, lcdSel, nRotate, ulStartAddr ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxRotate( handle, lcdSel, nRotate, ulStartAddr ) + +/** + This function clears the main or subdisplay screen with the given color. It also + clears the display buffer of the main or subpanel window. Window A buffer 0 + is used as a display buffer. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param ulStartAddr (NvU32) Start Address. (The offset in bytes of the + display frame buffer.) + @param color (NvU32) Clear screen with this color. The 32-bit value + has a 16-bit color duplicated in the upper and + lower parts. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxErase( handle, lcdSel, ulStartAddr, color ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxErase( handle, lcdSel, ulStartAddr, color ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxErase(). + */ +#define GFDxEraseWithCS( handle, lcdSel, ulStartAddr, color ) \ + ((PGFDXTABLE)handle)->DxEraseWithCS( handle, lcdSel, ulStartAddr, color ) + +/** + This function enables swithcing between the main LCD and sub-LCD. + IMPORTANT NOTE: This function has critical sections and is thread-safe. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param Option (NvU32) 0 for switch (Must be set to 0) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSwitchLCD( handle, lcdSel, Option ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSwitchLCD( handle, lcdSel, Option ) + +/** + This function sets the hardware Color Space Conversion (CSC) Coefficients. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param window (GFDXWINDOWSELECT) Controller window. see #GFDXWINDOWSELECT. + @param coef (GFDXCSCCOEF *) CSC coefficients. see #GFDXCSCCOEF. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSetCSCCoeff( handle, window, coef ) \ + ((PGFDXTABLE)handle)->DxSetCSCCoeff( handle, window, coef ) + +/** + This function gets the hardware Color Space Conversion (CSC) Coefficients. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param window (GFDXWINDOWSELECT) Controller window. see #GFDXWINDOWSELECT. + @param coef (GFDXCSCCOEF *) CSC coefficients. see #GFDXCSCCOEF. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxGetCSCCoeff( handle, window, coef ) \ + ((PGFDXTABLE)handle)->DxGetCSCCoeff( handle, window, coef ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxSetCSCCoeff(). + */ +#define GFDxSetCSCCoeffWithCS( handle, window, coef ) \ + ((PGFDXTABLE)handle)->DxSetCSCCoeffWithCS( handle, window, coef ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxGetCSCCoeff(). + */ +#define GFDxGetCSCCoeffWithCS( handle, window, coef ) \ + ((PGFDXTABLE)handle)->DxGetCSCCoeffWithCS( handle, window, coef ) +/*@}*/ + +/** GFDxSetDefaultPanelMode - sets the default mode for multi-mode panels. + + @param handle A handle to a Dx instance + @param mode The panel mode + + Some panels support multiple modes. To support mode switching, the + default panel mode must be known. + */ +GF_RETTYPE +GFDxSetDefaultPanelMode( GFDxHandle handle, NvU32 mode ); + +/** GFDxSwitchPanelMode - switch from the current mode to a new mode. + + @param handle A handle to a Dx instance + @param mode The panel mode + + This switches from the current mode to a new mode. This calls a display + script with the name "SwitchMode__to_" where x is the current mode + and y is the new mode. + */ +GF_RETTYPE +GFDxSwitchPanelMode( GFDxHandle handle, NvU32 mode ); + +/** GFDxSPIRegEnable - enable register reads and writes over SPI. + + @param handle A handle to a Dx instance + @param enable Either enable or disable register read/writes. + + Enabling SPI register reads/writes may change the pin mapping which + may prevent the rest of the display api from behaving properly (pixel + data may no longer output to the panel). Disabling will restore + the pin mapping. + */ +void +GFDxSpiRegEnable( GFDxHandle handle, NvBool enable ); + +/** GFDxSPIRegWrite - write a 16 bit register over SPI. + + @param handle A handle to a Dx instance + @param address The address to write + @param data The data to write + */ +GF_RETTYPE +GFDxSpiRegWrite( GFDxHandle handle, NvU16 address, NvU16 data ); + +/** GFDxSPIRegRead - read a 16 bit register over SPI. + + @param handle A handle to a Dx instance + @param address The address to read from + @param data The data to read (out param) + */ +GF_RETTYPE +GFDxSpiRegRead( GFDxHandle handle, NvU16 address, NvU16 *data ); + +/** GFDxSpiPixelInit - send init sequence to the panel and setup the pixel + write hardware. + + @param handle A handle to a Dx instance + @param seq_data_a The first 32 bits of init data + @param seq_data_b The second 32 bits of init data + @param seq_data_c The third 32 bits of init data + @param seq_data_d The fourth 32 bits of init data + + Note that this only support SPI16 mode, msb2lsb data ordering. + + Some panels may need the init sequence before every frame, in which + case, this should always be called before GFDxSpiPixelWrite(). + */ +GF_RETTYPE +GFDxSpiPixelInit( GFDxHandle handle, NvU32 seq_data_a, + NvU32 seq_data_b, NvU32 seq_data_c, NvU32 seq_data_d ); + +/** GFDxSpiPixelWrite - writes the given pixel to the panel over SPI. + + @param handle A handle to a Dx instance + @param pixel The pixels to write + */ +GF_RETTYPE +GFDxSpiPixelWrite( GFDxHandle handle, NvUPtr pixels ); + +/** GFDxSpiScript - send commands to the spi hardware via an in-memory script. + + @param handle A handle to a Dx instance + @param script The script to execute + */ +GF_RETTYPE +GFDxSpiScript( GFDxHandle handle, NvU32 *script ); + +/** GFDxSetPixelClock - sets the pixel clock divider in half step increments. + + @param handle A handle to the Dx instance + @param divider The pixel clock divider (actually shift clock - pixel clock + will be the same as shift clock) + + Note: the divider is in half step increments: 1 = 1, 2 = 1.5, 3 = 2, etc. + */ +GF_RETTYPE +GFDxSetPixelClock( GFDxHandle handle, NvU32 divider ); + +/** GFDxGetPixelClock - gets the current shift clock divider value. + + @param handle A handle to the Dx instance + @param divider The pixel clock divider (actually shift clock - pixel clock + will be the same as shift clock) + + */ +GF_RETTYPE +GFDxGetPixelClock( GFDxHandle handle, NvU32 *divider ); + +/** GFDxSetFilter - sets the window filtering coefficients. + + @param handle A handle to the Dx instance + @param window The target window for the new coefficients + @param hfilter The horizontal filtering coefficients + @param vfilter The vertical filtering coefficients + + Window A does NOT support filtering. + Window C only supports horizontal filtering (the vfilter param must be + null) + Window B supports both h and v filtering + + Passing null to both h and v filter will disabling filtering. + + DX_WINDOW_SELECT_NONE and DX_WINDOW_SELECT_NORMAL should not be used. + */ +GF_RETTYPE +GFDxSetFilter( GFDxHandle handle, GFDXWINDOWSELECT window, + GFDxHorizontalFilter *hfilter, GFDxVerticalFilter *vfilter ); + +#ifdef PROJECT_SEC_G1 +/** GFDxSetFilter - sets the clock and timing to support focus TV encoder. + + @param handle A handle to the Dx instance + @param option The Normal/NTSC/PAL mode to set + */ +GF_RETTYPE +GFDxSetMode( GFDxHandle handle, NvU32 option ); +#endif + +#ifdef __cplusplus +} +#endif + +/** @page pageDxAppNotes DxAPI Application Notes + + @section pageDxAppNotes1 Todo + +*/ + +#endif /* GF_DX_H */ diff --git a/Start_WM/test6/inc/GFEPP.h b/Start_WM/test6/inc/GFEPP.h new file mode 100755 index 00000000..36d28219 --- /dev/null +++ b/Start_WM/test6/inc/GFEPP.h @@ -0,0 +1,89 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFEPP.h + GFSDK EPP API +*/ + +#ifndef __GFEPP_H__ +#define __GFEPP_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupEPP EPPAPI EPP API +*/ +/*@{*/ + +typedef struct _GFEPPBUFFERINFO +{ + NvU32 flag; + PGFRECT pSrcRect; + void *pLine; + NvU32 alphaValue; + NvU32 numofSurfs; + PGFRMSURFACE *ppSurf; +} GFEPPBUFFERINFO, *PEPPBUFFERINFO; + + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFEPPOpen(GFRmHandle hRm, GFEPPHandle *phEPP, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFEPPClose(GFEPPHandle *phEPP); + +GF_RETTYPE GFEPPSetBuffers(GFEPPHandle EPPHandle, PEPPBUFFERINFO pBuf); +GF_RETTYPE GFEPPRaiseBuffer(GFEPPHandle EPPHandle, NvU32, NvU32* pCmdS, NvU32* pIndex); +GF_RETTYPE GFEPPRaiseFrame(GFEPPHandle EPPHandle, NvU32, NvU32* pCmdS, NvU32* pIndex); + + +#define EPPBUFFERINFO_FLAG_SRC_VI 0x00000001 + //incoming video from VI +#define EPPBUFFERINFO_FLAG_SRC_SB 0x00000002 + //incoming video from SB +#define EPPBUFFERINFO_FLAG_SRC_GC 0x00000003 + //incoming video from display +#define EPPBUFFERINFO_FLAG_SRC_MASK 0x0000000F + +#define EPPBUFFERINFO_FLAG_SRC_VI_YUV444 0x00000010 + //incoming video from VI +#define EPPBUFFERINFO_FLAG_SRC_VI_BAYER 0x00000020 + //incoming video from VI, Raw Bayer data +#define EPPBUFFERINFO_FLAG_SRC_VI_RGB 0x00000030 + //incoming video from VI, Raw RGB data +#define EPPBUFFERINFO_FLAG_SRC_VI_MASK 0x000000F0 + +#define EPPBUFFERINFO_FLAG_PRE_PROC 0x00000100 + //pre process filter enable +#define EPPBUFFERINFO_FLAG_AVERAGE 0x00000200 + //enable average for 420 planar or 444 to 422 conversion. +#define EPPBUFFERINFO_FLAG_C_SIGN 0x00000400 + //chroma sign +#define EPPBUFFERINFO_FLAG_DMA 0x00000800 + //enable DMA +#define EPPBUFFERINFO_FLAG_DUP 0x00001000 + //duplicate +#define EPPBUFFERINFO_FLAG_H_DIRECTION 0x00002000 +#define EPPBUFFERINFO_FLAG_V_DIRECTION 0x00004000 +#define EPPBUFFERINFO_FLAG_XY_SWAP 0x00008000 + +#define EPPBUFFERINFO_FLAG_SRC_SB_YUV 0x00010000 +#define EPPBUFFERINFO_FLAG_SRC_SB_RGB 0x00020000 +#define EPPBUFFERINFO_FLAG_SRC_SB_MASK 0x000F0000 + + //BE CAREFUL WITH THE STRIDE PROGRAMMING! + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif // _GFEPP_H_ diff --git a/Start_WM/test6/inc/GFFDev.h b/Start_WM/test6/inc/GFFDev.h new file mode 100755 index 00000000..6826085b --- /dev/null +++ b/Start_WM/test6/inc/GFFDev.h @@ -0,0 +1,321 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFFDev.h + GFSDK File Device API header file. +*/ + +#ifndef __GFFDEV_H__ +#define __GFFDEV_H__ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupFDev FDevAPI File Device API +
        +
      • @ref pageFDevAppNotes +
          +
        • @ref pageFDevAppNotes1 +
        +
      +*/ +/*@{*/ + +/** FDev capability flag. + @see GFFDevMount() + */ +#define GFFDEV_CAP_STANDARD 0x00010000 /**< Standard C Library */ + +/** FDev capability flag. + @see GFFDevMount() + */ +#define GFFDEV_CAP_DEVICE_SD 0x00000001 /**< SD Device Supported */ + +/** FDev capability flag. + @see GFFDevMount() + */ +#define GFFDEV_CAP_FAT 0x00020000 /**< Fat FileSystem */ + +/** FDev capability flag. + @see GFFDevMount() + */ +#define GFFDEV_CAP_DEVICE_MASK 0x00000FFF + +/** FDev capability flag - default on the selected OS. + Linux, Windows -> Standard, else -> SD + @see GFFDevMount() + */ +#if !NVOS_IS_WINDOWS && !NVOS_IS_LINUX +#define GFFDEV_CAP_DEFAULT_FOR_OS GFFDEV_CAP_DEVICE_SD +#else +#define GFFDEV_CAP_DEFAULT_FOR_OS GFFDEV_CAP_STANDARD +#endif + +/** Parameter enum for GFFDevSeekFile. + @see GFFDevSeekFile + */ +typedef enum +{ + GFFDEV_SEEK_SET = 0, /**< Set fileHandle relative to beginning of file */ + GFFDEV_SEEK_CUR, /**< Set fileHandle relative to specified offset location */ + GFFDEV_SEEK_END /**< Set fileHandle relative to end of file */ +} GFFDEVSEEKTYPE; + +/** Public File Info structure. + Matches Microsoft's struct _finddata_t . + + @see FDevFindFirstFile() + @see FDevFindNextFile() + */ +typedef struct _GFFDEVFILEINFO +{ + unsigned attrib; + NvU32 time_create; /**< -1 for FAT file systems */ + NvU32 time_access; /**< -1 for FAT file systems */ + NvU32 time_write; + NvU32 size; + char name[260]; +} GFFDEVFILEINFO, *PGFFDEVFILEINFO; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFFDevOpen(GFRmHandle hRm, GFFDevHandle *phFDev, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFFDevClose(GFFDevHandle *phFDev); + +/** @name Functions +@{*/ + +/** Mounts a filesystem. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param capType (NvU32) capability type + + The filesystem pointed to by #FDevHandle will be mounted based on + the #capType. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevMount(GFFDevHandle FDevHandle, NvU32 capType); + +/** Unmounts a mounted filesystem. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error +*/ +GF_RETTYPE GFFDevUnmount(GFFDevHandle FDevHandle); + +/** Opens a file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (const char *) name of the file + @param fileSpec (const char *) read/write/etc flags + @param pFileHandle (#GFFDevFileHandle) Pointer to the handle of the opened file - + will be filled in by #GFFDevOpenFile() + + Opens a file on the mounted filesystem with #fileName. Open flags, + given by #fileSpec, are the same as libc's fopen. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevOpenFile(GFFDevHandle FDevhandle, + const char *fileName, + const char *fileSpec, + GFFDevFileHandle *pFileHandle); + +/** Closes an open file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param pFileHandle (#GFFDevFileHandle *) Pointer to the open file + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevCloseFile(GFFDevHandle FDevhandle, + GFFDevFileHandle *pFileHandle); + +/** Reads data from a file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileHandle (#GFFDevFileHandle) Handle to the open file + @param pReadBuf (void *) Buffer for file bytes + @param pCount (NvU32 *) Pointer to number of bytes to read, will be + written to the actual number of bytes read. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevReadFile(GFFDevHandle FDevhandle, + GFFDevFileHandle fileHandle, + void * pReadBuf, + NvU32 *pCount); + +/** Writes data to an open file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileHandle (#GFFDevFileHandle) Handle to open file + @param pWriteBuf (void *) pointer to bytes to write to the file + @param pCount (NvU32 *) pointer to number of bytes to write, will + be written to actual number of bytes written. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevWriteFile(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle, + void * pWriteBuf, + NvU32 *pCount ); + +/** Sets the file read/write position. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileHandle (#GFFDevFileHandle) Handle to open file + @param offset (NvS32) offset to be used with #where + @param where (#GFFDEVSEEKTYPE) file offset base + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevSeekFile(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle, + NvS32 offset, + GFFDEVSEEKTYPE where); + +/** Gets the current file position. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileHandle (#GFFDevFileHandle) Handle to open file + @param pOffset (NvU32 *) pointer to offset, will be filled in + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevTellFile(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle, + NvU32 *pOffset); + +/** Gets the file size. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (#GFFDevFileHandle) Handle of open file + @param pSize (NvU32 *) pointer to file size, will be filled in. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevGetFileSize(GFFDevHandle FDevHandle, + const char *fileName, + NvU32 *pSize); + +/** Renames a file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param oldFileName (const char *) name of existing file + @param newFileName (const char *) name to which to rename the file + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevRenameFile(GFFDevHandle FDevHandle, + const char *oldFileName, + const char *newFileName); + +/** Removes a file from the filesystem + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (#GFFDevFileHandle) Handle of open file + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevDeleteFile(GFFDevHandle FDevHandle, + const char *fileName); + +/** Gets the first file in a directory. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param dirName (const char *) Name of the directory to enumerate + @param pFileInfo (#GFFDEVFILEINFO *) pointer to the file info for the + first file + @param pDirHandle (#GFFDevDirHandle *) pointer to the handle to the directory + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevFindFirstFile(GFFDevHandle FDevHandle, + const char *dirName, + GFFDEVFILEINFO *pFileInfo, + GFFDevDirHandle *pDirHandle); + +/** Gets the next file in the directory. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param pFileInfo (#GFFDEVFILEINFO *) pointer ot the info for the next file + @param pDirHandle (#GFFDevDirHandle *) pointer to the directory handle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevFindNextFile(GFFDevHandle FDevHandle, + GFFDEVFILEINFO *pFileInfo, + GFFDevDirHandle *pDirHandle); + +/** Closes the directory. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param pDirHandle (#GFFDevDirHandle *) pointer to the directory handle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevFindCloseFile(GFFDevHandle FDevHandle, + GFFDevDirHandle *pdirHandle); + +/** Flushes all buffered data to the file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (#GFFDevFileHandle) Handle of open file + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevFlushFile(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle); + +/** Gets the filesystem blocks for the file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (#GFFDevFileHandle) Handle of open file + @param size (NvU32) size of the file + @param ppBlockList (#PGFBLOCKLIST *) block list to be allocated + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevBlockListAlloc(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle, + NvU32 size, + PGFBLOCKLIST *ppBlockList ); + +/** Gets the FDev API properties + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param pBlockList (#PGFBLOCKLIST) Block list to deallocate + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevBlockListFree(GFFDevHandle FDevHandle, + PGFBLOCKLIST pBlockList ); + +/*@}*/ +/*@}*/ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/** @page pageFDevAppNotes FDevAPI Application Notes + + @section pageFDevAppNotes1 Todo + +*/ + +#endif /* __GFFDEV_H__ */ + diff --git a/Start_WM/test6/inc/GFGx.h b/Start_WM/test6/inc/GFGx.h new file mode 100755 index 00000000..5a974df4 --- /dev/null +++ b/Start_WM/test6/inc/GFGx.h @@ -0,0 +1,1927 @@ +/* + * Copyright (c) 2005 - 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software and related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ +/** @file GFGx.h + GFSDK Graphics API header file. +*/ + +#ifndef __GFGx_H__ +#define __GFGx_H__ + +#include "GFRm.h" + +/* GFGxAPI error codes */ +#include "GFGxError.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + +/** @addtogroup groupGx GxAPI Graphics API +*/ + /*
        +
      • @ref pageGxAppNotes +
          +
        • @ref pageGxAppNotes1 +
        +
      + */ + +/*@{*/ + +/**** GX CAPABILITIES DEFINITIONS ****/ + +/** GFGxAPI capability definition : bitblt support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_BLT 0x00000001UL // BitBlt +/** GFGxAPI capability definition : linedraw support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_LINE 0x00000002UL // Line draw +/** GFGxAPI capability definition : clipping support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_CLIP 0x00000004UL // Clipping +/** GFGxAPI capability definition : stretchblt support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_STRETCHBLT 0x00000008UL // StretchBlt +/** GFGxAPI capability definition : alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHABLENDING 0x00000010UL // Alpha blending +/** GFGxAPI capability definition : alphablending and transparency support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_COLOR_CMP 0x00000020UL // Alpha blending + +/* NEW CAPABILITY FLAGS */ + +/** GFGxAPI capability definition : fast rotation support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_FAST_ROTATION 0x00000040UL // Fast Rotation + +/** GFGxAPI capability definition : inside clipping support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_CLIPPING_INSIDE 0x00000100UL // Inside Clipping +/** GFGxAPI capability definition : fadeblt support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_FADE_BLT 0x00000200UL // Fade Blt + +/** GFGxAPI capability definition : color pattern support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_COLOR_PATTERN 0x00001000UL // Color Pattern +/** GFGxAPI capability definition : color pattern transparency support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_CLR_PAT_TRANSPARENT 0x00002000UL // Color Pattern Transparency +/** GFGxAPI capability definition : alphablending and fading support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_AND_FADING 0x00004000UL // ALpha Blending & fading +/** GFGxAPI capability definition : 1BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_1BPP 0x00008000UL // Planar 1 BPP Alpha +/** GFGxAPI capability definition : 2BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_2BPP 0x00010000UL // Planar 2 BPP Alpha +/** GFGxAPI capability definition : 4BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_4BPP 0x00020000UL // Planar 4 BPP Alpha +/** GFGxAPI capability definition : 8BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_8BPP 0x00040000UL // Planar 8 BPP Alpha +/** GFGxAPI capability definition : SRC4DST4BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_SRC4DST4 0x00080000UL // Planar 44 BPP Alpha + // 8 bpp plane, src * 4 + dst*4 +/** GFGxAPI capability definition : 32BPP to 16BPP alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_32BLEND16 0x00200000UL // 32 bits source blending +/** GFGxAPI capability definition : src 1555 alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_SRC1555 0x00400000UL // Src alpha 1555 +/** GFGxAPI capability definition : src 4444 alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_SRC4444 0x00800000UL // Src alpha 4444 +/** GFGxAPI capability definition : src fixed alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_FIXED 0x01000000UL // Fixed alpha + +/**** CLIPPING FLAGS ****/ + +/* disable clipping */ +/** GFGxAPI CLIPPING flags : disable clipping. + @see GFGxSetClip() +*/ +#define GFGX_SETCLIP_DISABLE 0x00000000UL + +/* enable clipping */ +/** GFGxAPI CLIPPING flags : enable clipping. + @see GFGxSetClip() +*/ +#define GFGX_SETCLIP_ENABLE 0x00000001UL + +/* set clipping rectangle */ +/** GFGxAPI CLIPPING flags : set clipping rectangle. + @see GFGxSetClip() +*/ +#define GFGX_SETCLIP_SETRECT 0x00000002UL + +/* set inside clipping - default is outside clipping*/ +/** GFGxAPI CLIPPING flags : set inside clipping, default is outside. + @see GFGxSetClip() +*/ +#define GFGX_SETCLIP_INSIDE 0x00000004UL + + +/**** LINE DRAW FLAGS ****/ + +/* don't draw last pixel */ +/** GFGxAPI LINE DRAW flags : do not draw last pixel. + @see GFGxLine() +*/ +#define GFGX_LINE_NOT_DRAW_LAST_PIXEL 0x00000001UL + +/**** BITBLT - SOURCE FLAGS ****/ + +/* source is screen */ +/** GFGxAPI BITBLT Source flags : source comes from video mem. + @see GFGxBlt() +*/ +#define GFGX_BLT_SRC_VIDEO 0x00000000UL + +/* color source in system memory */ +/** GFGxAPI BITBLT Source flags : colour source comes from system mem. + @see GFGxBlt() +*/ +#define GFGX_BLT_SRC_SYSMEM_COLOR 0x00000001UL + +/* mono source in system memory */ +/** GFGxAPI BITBLT Source flags : mono source comes from system mem. + @see GFGxBlt() +*/ +#define GFGX_BLT_SRC_SYSMEM_MONO 0x00000002UL + +/* source is solid color */ +/** GFGxAPI BITBLT Source flags : source is solid (unique color). + @see GFGxBlt() +*/ +#define GFGX_BLT_SRC_SOLID 0x00000004UL + + +/**** BITBLT - PATTERN FLAGS ****/ + +/* pattern is mono */ +/** GFGxAPI BITBLT Pattern flags : pattern is mono. + @see GFGxBlt() +*/ +#define GFGX_BLT_PAT_MONO 0x00000008UL + +/* pattern is color */ +/** GFGxAPI BITBLT Pattern flags : pattern is color. + @see GFGxBlt() +*/ +#define GFGX_BLT_PAT_COLOR 0x00000010UL + +/* pattern is solid color */ +/** GFGxAPI BITBLT Pattern flags : pattern is solid (unique color). + @see GFGxBlt() +*/ +#define GFGX_BLT_PAT_SOLID 0x00000020UL + +/* pattern is cached */ +/** GFGxAPI BITBLT Pattern flags : pattern is cached in video mem. + The pattern ID for the cached pattern is returned in the pPatID + field in GFGXBLTPARAM sruct. User needs to make sure that a valid + pointer is passed in pPatID. + @see GFGxBlt() +*/ +#define GFGX_BLT_PAT_CACHE 0x00000040UL + + +/**** BITBLT - MODE FLAGS ****/ +/**** Linear / XY Mode / Surface Flag ****/ + +/* XY Mode Blt */ +/** GFGxAPI BITBLT Mode flags : X/Y mode is used. + @see GFGxBlt() +*/ +#define GFGX_BLT_MODE_XY 0x00000000UL + +/* Linear Mode Blt */ +/** GFGxAPI BITBLT Mode flags : linear mode is used. + @see GFGxBlt() +*/ +#define GFGX_BLT_MODE_LINEAR 0x00000080UL + +/* Surface to Surface blt */ +/** GFGxAPI BITBLT Mode flags : surface to surface mode is used. + @see GFGxBlt() +*/ +#define GFGX_BLT_SURFACE 0x00000100UL + + +/**** BITBLT - CLIPPING FLAGS ****/ + +/* enable clipping */ +/** GFGxAPI BITBLT Clipping flags : enable clipping. + @see GFGxBlt() +*/ +#define GFGX_BLT_CLIP 0x00000200UL + +/**** BITBLT - SOURCE TRANSPARENCY FLAGS ****/ + +/* color source transparent blt (if source pixel matches colorCompare, +do not overwrite) */ +/** GFGxAPI BITBLT Source Transparency flags : enable color source transparency + (if source pixel matches colorCompare, do not overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_SRC_COLOR 0x00000400UL + +/* color source inverse transparent blt (if source pixel matches +colorCompare, overwrite) */ +/** GFGxAPI BITBLT Source Transparency flags : enable color source inverse + transparency (if source pixel matches colorCompare, overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_SRC_COLOR_INV 0x08000000UL + + +/* mono source transparent blt (if source bit is 0, no +overwrite on corresponding destination location) */ +/** GFGxAPI BITBLT Source Transparency flags : enable mono source transparency + (if source bit is 0, no overwrite on corresponding destination location). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_SRC_MONO 0x00000800UL + +/* mono source inverted transparent blt (if source bit +is 1, no overwrite on corresponding destination location) */ +/** GFGxAPI BITBLT Source Transparency flags : enable mono source inverse + transparency (if source bit is 1, no overwrite on corresponding destination + location). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_SRC_MONO_INV 0x00001000UL + + +/**** BITBLT - DESTINATION TRANSPARENCY FLAGS ****/ + +/* destination transparent blt (if destination pixel matches colorCompare, +overwrite) */ +/** GFGxAPI BITBLT Destination Transparency flags : enable destination + transparency (if destination pixel matches colorCompare, overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_DST 0x00002000UL + +/* destination transparent inverse blt (if destination pixel matches +colorCompare, donot overwrite) */ +/** GFGxAPI BITBLT Destination Transparency flags : enable destination inverse + transparency (if destination pixel matches colorCompare, do not overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_DST_INV 0x10000000UL + +/**** BITBLT - PATTERN TRANSPARENCY FLAGS ****/ + +/* Mono pattern transparent Blt */ +/** GFGxAPI BITBLT Pattern Transparency flags : enable mono pattern transparency + (if pattern bit is 0, no overwrite on corresponding destination location). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_PAT_MONO 0x00004000UL + +/* Mono pattern inverted transparent Blt */ +/** GFGxAPI BITBLT Pattern Transparency flags : enable mono pattern inverse + transparency (if pattern bit is 1, no overwrite on corresponding destination + location). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_PAT_MONO_INV 0x00008000UL + +/* Color pattern transparency Blt */ +/** GFGxAPI BITBLT Pattern Transparency flags : enable color pattern transparency + (if pattern pixel matches colorCompare, do not overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_PAT_COLOR 0x00010000UL + +/* Color pattern transparency Blt */ +/** GFGxAPI BITBLT Pattern Transparency flags : enable color pattern inverse + transparency (if pattern pixel matches colorCompare, overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_PAT_COLOR_INV 0x20000000UL + +/**** Fade Blt ****/ +/** GFGxAPI BITBLT flags : enable fade blt. + @see GFGxBlt() +*/ +#define GFGX_BLT_FADE_BLT 0x00020000UL + +/* Enable alpha blending */ +/** GFGxAPI BITBLT flags : enable alphablending. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_BLENDING 0x00080000UL + + + +/**** ALPHABLENDING FLAGS ****/ + +/* Fixed alpha operation */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is fixed value. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_FIXED ( 0x00200000UL) + +/* Inverse Fixed alpha */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse fixed value. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_FIXED_INV (0x00400000UL) + +/* Source alpha ARGB1555 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB1555. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_SRC_1555_T (0x00800000UL) + +/* Inverse Source alpha ARGB1555 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB1555. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_SRC_1555_T_INV (0x01000000UL) + +/* Source alpha ARGB4444 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB4444. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_SRC_4444 (0x02000000UL) + +/* Inverse Source ARGB4444 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB4444. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_SRC_4444_INV (0x04000000UL) + +/* new flags */ + +/** GFGxAPI BITBLT Alphablending mask. + @see GFGxBlt() +*/ +#define GFGXEX1_MASK 0x3FFFFFFF + +/* Fixed alpha operation */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is fixed value. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_FIXED (0x40000000 | 0x00000001UL) + +/* Inverse Fixed alpha */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse fixed value. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_FIXED_INV (0x40000000 | 0x00000002UL) + +/* Source alpha ARGB1555 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB1555. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_1555_T (0x40000000 | 0x00000004UL) + +/* Inverse Source alpha ARGB1555 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB1555. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_1555_T_INV (0x40000000 | 0x00000008UL) + +/* Source alpha ARGB4444 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB4444. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_4444 (0x40000000 | 0x00000010UL) + +/* Inverse Source ARGB4444 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB4444. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_4444_INV (0x40000000 | 0x00000020UL) + +/* Source alpha ARGB8888 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB8888. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_8888 (0x40000000 | 0x00000040UL) + +/* Inverse source alpha ARGB8888 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB8888. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_8888_INV (0x40000000 | 0x00000080UL) + +/* Destination alpha ARGB8888 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is destination ARGB8888. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_DST_8888 (0x40000000 | 0x00000100UL) + +/* Inverse Destination alpha 8888 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse destination ARGB8888. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_DST_8888_INV (0x40000000 | 0x00000200UL) + +/* Planar 1BPP alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 1BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_1BPP (0x40000000 | 0x00000400UL ) + +/* Planar 1BPP Inv alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 1BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_1BPP_INV (0x40000000 | 0x00000800UL) + +/* Planar 2BPP alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 2BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_2BPP (0x40000000 | 0x00001000UL) + +/* Planar 2BPP Inv alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 2BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_2BPP_INV (0x40000000 | 0x00002000UL) + +/* Planar 4BPP alpha Blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 4BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_4BPP (0x40000000 | 0x00004000UL) + +/* Planar 4BPP Inv alpha Blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 4BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_4BPP_INV (0x40000000 | 0x00008000UL) + +/* Planar 8BPP alpha Blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 8BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_8BPP (0x40000000 | 0x00010000UL) + +/* Planar 8Bpp Inv alpha Blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 8BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_8BPP_INV (0x40000000 | 0x00020000UL) + +/* Planar 44BPP alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is SRC4DST4BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_44BPP (0x40000000 | 0x00040000UL) + +/* Planar 32 bpp src blending 16 bpp dst */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 32BPP src to 16BPP dst. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_32BPP16 (0x40000000 | 0x00080000UL) + +/*Planar Inv 32 bpp src blending 16 bpp dst */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 32BPP src to + 16BPP dst. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_32BPP16_INV (0x40000000 | 0x00100000UL) + +/* Alpha planar is already in video mem, no need to transfer it from sys mem */ +#define GFGXEX1_BLT_PLANAR_NOTRANSFER (0x40000000 | 0x00200000UL) + +/**** FAST ROTATION FLAGS ****/ +/** GFGxAPI BITBLT Fast Rotation mask. + @see GFGxFastRotate() +*/ +#define GFGXEX2_MASK 0x3FFFFFFF + +/* Fast Rotation Modes */ + +/* Square (in place rotation) */ +/** GFGxAPI BITBLT Fast Rotation flags : dst is same than src. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_SQUARE (0x80000000 | 0x00000001UL) + +/* Source to Destination Rotation ( 2 buffers) */ +/** GFGxAPI BITBLT Fast Rotation flags : dst is different than src. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_SRC_DST_COPY (0x80000000 | 0x00000002UL) + +/* Disable Fast Rotation */ +/** GFGxAPI BITBLT Fast Rotation flags : disable fast rotation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_DISABLE (0x80000000 | 0x00000004UL) + +/* Fast Rotation Types */ + +/* Flip-X */ +/** GFGxAPI BITBLT Fast Rotation flags : FLIP-X transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_FLIP_X (0x80000000 | 0x00000008UL) + +/* Flip-Y */ +/** GFGxAPI BITBLT Fast Rotation flags : FLIP-Y transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_FLIP_Y (0x80000000 | 0x00000010UL) + +/* Trans-LR */ +/** GFGxAPI BITBLT Fast Rotation flags : TRANSPOSE LEFT-RIGHT transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_TRANS_LR (0x80000000 | 0x00000020UL) + +/* Trans-RL */ +/** GFGxAPI BITBLT Fast Rotation flags : TRANSPOSE RIGHT-LEFT transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_TRANS_RL (0x80000000 | 0x00000040UL) + +/* 90 deg Rotation */ +/** GFGxAPI BITBLT Fast Rotation flags : 90° rotation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_ROT_90 (0x80000000 | 0x00000080UL) + +/* 180 deg Rotation */ +/** GFGxAPI BITBLT Fast Rotation flags : 180° rotation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_ROT_180 (0x80000000 | 0x00000100UL) + +/* 270 deg Rotation */ +/** GFGxAPI BITBLT Fast Rotation flags : 270° rotation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_ROT_270 (0x80000000 | 0x00000200UL) + +/* Identity */ +/** GFGxAPI BITBLT Fast Rotation flags : identity transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_IDENTITY (0x80000000 | 0x00000400UL) + + +/** GFGXAPI STRETCHBLT flag in GFGXBLTPARAM struct + This flag waits for the StretchBlt engine to be idle. + If enabled it will block the CPU thread until the StretchBlt is done. + It is effective only for GFGxStretchBlt(). + For other api's it is ignored. + @see GFGxBlt() +*/ +#define GFGX_STRETCHBLT_WAITFOR_FINISH 0x00100000UL + + +/* + * Definition of attribute ids for Set/GetAttributes() + */ + +/** GFGxAPI attributes definition. + @see GFGxGetAttribute(), GFGxSetAttribute() +*/ +typedef enum _GFGXATTRIBUTES + { + /** Current bits per pixel. */ + GFGX_ATTR_BPP, + /** Frame buffer line width in bytes. */ + GFGX_ATTR_STRIDE, + /** Ptr to start address of the display frame buffer. */ + GFGX_ATTR_ADDR_PTR, + /** Start address offset. */ + GFGX_ATTR_ADDR, + /** Surface for GFGxAPI operations. */ + GFGX_ATTR_SURFACE, + /** Palette RGB888. */ + GFGX_ATTR_PALETTE_RGB888 +} GFGXATTRIBUTES; + +/* Blt parameter struct */ +/** GFGxAPI BLT parameter structure. + @see GFGxBlt() +*/ +typedef struct _GFGXBLTPARAM +{ + /** Destination x in pixels (relative to left). */ + NvS16 dx; + /** Destination y in scan lines (relative to top). */ + NvS16 dy; + /** Width of the source rectangle in pixels. */ + NvS16 w; + /** Height of the source rectangle in pixels. */ + NvS16 h; + /** Source x in pixels (relative to left). */ + NvS16 sx; + /** Source y in scan lines (relative to top). */ + NvS16 sy; + /** Width of the source rectangle in pixels (for Stretch Blt only). */ + NvS16 sw; + /** Height of the source rectangle in scan lines (for Stretch Blt only). */ + NvS16 sh; + /** Color depth */ + NvU16 bpp; + /** Number of bytes per scanline for bitmap. */ + NvS16 stride; + /** Foreground color (used if pixel data is 1 on 1BPP source bitmap). */ + NvU32 fgColor; + /** Background color (used if pixel data is 0 on 1BPP source bitmap). */ + NvU32 bgColor; + /** Pointer to source bitmap. */ + NvU8 *pBits; + /** Pattern offset in x direction. */ + NvS16 px; + /** Pattern offset in y direction. */ + NvS16 py; + /** Pattern foreground color (used if pixel data is 1 on 1BPP pattern bitmap).*/ + NvU32 patFgColor; + /** Pattern background color (used if pixel data is 0 on 1BPP pattern bitmap).*/ + NvU32 patBgColor; + /** Pattern color key for transparent blt.*/ + NvU32 patColorCmp; + /** Pointer to pattern bitmap. */ + NvU8 *pPatBits; + /** Number of bytes per scanline for pattern. */ + NvU32 patStride; + /** Width of pattern. */ + NvU32 patW; + /** Height of pattern. */ + NvU32 patH; + + /** pointer to Pattern ID when GFGX_BLT_PAT_CACHE flag is set. */ + /** GFGxBlt() will return the patID in this field */ + NvU32 *pPatID; + + // Miscellaneous parameters + /** Color key for transparent blt. */ + NvU32 colorCompare; + /** Main flags setting. */ + NvU32 flags; + /** Raster operation code (ROP3). */ + NvU16 rop3; + + // Surface parameters + /** Pointer to dst surface pointer. */ + PGFRMSURFACE *ppDestSurf; + /** Pointer to src surface pointer. */ + PGFRMSURFACE *ppSrcSurf; + /** Source start address. */ + NvU32 srcStartAddr; + /** Destination start address. */ + NvU32 dstStartAddr; + /** Number of bytes per scanline for destination. */ + NvS16 dstStride; + + // alpha blending parameters + /** Alpha value for GFGX_BLT_ALPHA_FIXED or alphaFg for GFGX_BLT_ALPHA_SRC_1555_T. */ + NvU16 alpha; + /** Background alpha for GFGX_BLT_ALPHA_SRC_1555_T. */ + NvU16 alphaBg; + /** Pointer to alpha plane. */ + NvU8 *pAlphaplane; + + // Fading parameters + /** Fading coefficient. */ + NvU32 fadeCoeff; + /** Fading offset. */ + NvU32 fadeOffset; + + /** Alphablending flag. */ + NvU32 flagex1; + + /** Fast rotation flag. */ + NvU32 flagex2; + +} GFGXBLTPARAM; + + +/** @name Functions +@{*/ + +/** This function returns version and capabilities of API and hardware. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pGxProp (PGFPROPERTY) Pointer to property structure to be filled in + + @retval #GF_SUCCESS pGxProp filled in successfully + @retval #GF_ERROR Some error occured + + The #GFPROPERTY structure passed with parameter pGxProp will be + filled in on successfull return. + + The GFPROPERTY::Capability field will hold a combination of flagbits + indicating capabilities specific to the GFGxAPI : + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFGX_CAP_BLT BitBlt supported.
      #GFGX_CAP_LINE Line Draw supported.
      #GFGX_CAP_CLIP Clipping supported.
      #GFGX_CAP_STRETCHBLTStretchblt supported.
      #GFGX_CAP_ALPHABLENDING Alphablending supported.
      #GFGX_CAP_ALPHA_COLOR_CMPAlphablending and transparency supported.
      #GFGX_CAP_FAST_ROTATION Fast rotation supported.
      #GFGX_CAP_CLIPPING_INSIDE Inside clipping supported.
      #GFGX_CAP_FADE_BLT Fadeblt supported.
      #GFGX_CAP_COLOR_PATTERN Color pattern supported.
      #GFGX_CAP_CLR_PAT_TRANSPARENTColor pattern transparency supported.
      #GFGX_CAP_ALPHA_AND_FADING Alphablending and fading supported.
      #GFGX_CAP_ALPHA_PLANAR_1BPP 1BPP alpha planar supported.
      #GFGX_CAP_ALPHA_PLANAR_2BPP 2BPP alpha plane supported.
      #GFGX_CAP_ALPHA_PLANAR_4BPP 4BPP alpha plane supported.
      #GFGX_CAP_ALPHA_PLANAR_8BPP 8BPP alpha plane supported.
      #GFGX_CAP_ALPHA_PLANAR_SRC4DST4SRC4DST4BPP alpha plane supported.
      #GFGX_CAP_ALPHA_PLANAR_32BLEND16 32BPP to 16BPP alphablending supported.
      #GFGX_CAP_ALPHA_SRC1555Src 1555 alphablending supported.
      #GFGX_CAP_ALPHA_SRC4444 Src 4444 alphablending supported.
      #GFGX_CAP_ALPHA_FIXED Src fixed alphablending supported.
      + + It is recommended, but not mandatory, that you call this function to query + for the GFGxAPI version and capabilities before proceeding to call any of + the other GFGxAPI functions. + + @see GFPROPERTY +*/ +GF_RETTYPE GFGxGetProperty(GFGxHandle GxHandle, + PGFPROPERTY pGxProp); +/** This function fills a rectangle in video memory with the specified solid color. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param x,y (NvS16) left-top corner of the rectangle (x in pixels, y in scan lines) + @param w,h (NvS16) width & height of the rectangle (w in pixels, h in scan lines) + @param color (NvU32) color to be filled (8BPP index, or 16BPP-32BPP TrueColor) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxFillRectEx() +*/ +GF_RETTYPE GFGxFillRect(GFGxHandle GxHandle, + NvS16 x, NvS16 y, + NvS16 w, NvS16 h, + NvU32 color); +/** This function is commonly used in scrolling an image in video memory. It copies + a rectangular image in the video memory to another location in the same video + memory. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle (dx in pixels, dy in scan lines) + @param w,h (NvS16) width & height of rectangles (w in pixels, h in scan lines) + @param sx,sy (NvS16) left-top corner of source rectangle (sx in pixels, sy in scan lines) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFGxCopyRect() checks for the destruction of the copied image in video memory + caused by overlapping source and destination locations. + + Also, if the destination for the rectangle exceeds the limit of the video memory, + wrapping is done in hardware and no error code is returned. + + + @see GFGxCopyRectEx(), GFGxCopyRectDirect() +*/ +GF_RETTYPE GFGxCopyRect(GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy); + +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap is specified in monochrome (1BPP) pixels. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle (dx in pixels, dy in scan lines) + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle (sx in pixels, sy in scan lines) + @param fgColor (NvU16) color applied to source data bit 1 (The color depth should be same as the frame buffer) + @param bgColor (NvU16) color applied to source data bit 0 (The color depth should be same as the frame buffer) + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to monochome (1bpp) bitmap + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransMonoBitmap() +*/ +GF_RETTYPE GFGxCopyMonoBitmap( GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvU32 fgColor, NvU32 bgColor, + NvS16 srcStride, + NvU8 *pMonoBits); +/** This function copies the bitmap from video memory to system memory. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle (dx in pixels, dy in scan lines) + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle (sx in pixels, sy in scan lines) + @param dstStride (NvS16) destination stride in bytes + @param pDstAddr (NvU8*) pointer to destination buffer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFGxReadBlt( GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvS16 dstStride, + NvU8 *pDstStartAddr); +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap is specified in monochrome (1BPP) pixels and can be transparent. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param color (NvU16) color applied to non-transparent source data bit + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to monochome (1bpp) bitmap + @param selectTrans (NvS16) transparency select: 0 or 1 + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function is similar to GFGxCopyMonoBitmap() except for the selectTrans parameter. + This parameter indicates whether bit data equal to 0 or 1 is going to be transparent. + This function could be used for drawing a transparent text string or character. + + + @see GFGxCopyMonoBitmap() +*/ +GF_RETTYPE GFGxCopyTransMonoBitmap( GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvU32 color, + NvS16 srcStride, + NvU8 *pMonoBits, + NvS16 selectTrans ); +/** This function is used to blit/blend a given source rectangle to/with the given + destination location in the video memory. + + Overlap rectangles are handled properly. Source and destination rectangles must + have same size. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pBltParam (#GFGXBLTPARAM*) refer to structure definition + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + This routine is more generic. It supports System Memory to Video Memory Blts and + Video to Video Memory Blts involving Source and Pattern data.The Source and Pattern + data can be either Color or Monochrome(1 Bpp). Monochrome Blts are supported by performing + a Monochrome to Color Expansion. + + Tiling mode is also supported for Mono Patttern Blts. The size of the pattern in this case + should be 16x16. Tiling is not supported for Color Patterns. + + The following features can also be enabled during Blts : + + - Color Source and Mono Source Transparency + - Destination Transparency, + - Color Pattern and Mono Pattern Transparency + - Alphablending ( Both Planar and Source Alpha) + - Fading + - Microsoft Windows compatible ROP3 + - Clipping + + GFGxBlt() supports both raster operations and alpha blending operations.The two types + of operations are mutually exclusive. + + Please refer to the supported GFGxBlt() flags starting with GFGX_BLT_* and GFGXEX1_BLT_*. + + + @see GFGxCopyRect(), GFGxCopyRectDirect(), GFGxBltSurface(), GFGxCopyMonoBitmap(), + GFGxCopyTransMonoBitmap(), GFGxCopyColorBitmap() +*/ +GF_RETTYPE GFGxBlt( GFGxHandle GxHandle, + const GFGXBLTPARAM *pBltParam ); + +/** + This function performs a surface-to-surface blit. The color depth of the source + surface must match that of the destination. Also, the width and height of the + source must be the same as the destination's width and height. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param ppDestSurf (#PGFRMSURFACE*) pointer to destination surface pointer + @param ppSrcSurf (#PGFRMSURFACE) pointer so source surface pointer + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param rop3 (NvU16) raster operation code + @param srcStartAddr (NvU32) start address relative to the source surface + @param dstStartAddr (NvU32) start address relative to the destination surface + @param flags (NvU32) Transparent blit flag. See Below + @param colorCompare (NvU32) color key for transparent blit. If there is no transparent blit, colorCompare = 0 + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Transparent blit flag is one of the following: + - GFGX_BLT_TRANSPARENT_SRC_COLOR + - GFGX_BLT_TRANSPARENT_SRC_MONO + - GFGX_BLT_TRANSPARENT_SRC_MONO_INV + - GFGX_BLT_TRANSPARENT_DST + - GFGX_BLT_TRANSPARENT_PAT_COLOR + - GFGX_BLT_TRANSPARENT_PAT_COLOR_INV + - GFGX_BLT_TRANSPARENT_PAT_MONO + - GFGX_BLT_TRANSPARENT_PAT_MONO_INV + Refer to GFGX_BLT_X flag definitions for further information. If no transparent blit, flag = 0 + + Alphablending is not supported. + + + @see GFGxCopyRect(), GFGxCopyRectDirect(), GFGxBltSurface(), GFGxCopyMonoBitmap(), + GFGxCopyTransMonoBitmap(), GFGxCopyColorBitmap() +*/ +GF_RETTYPE GFGxBltSurface( GFGxHandle GxHandle, PGFRMSURFACE *ppDestSurf, + PGFRMSURFACE *ppSrcSurf, + NvS16 w, NvS16 h, NvU16 rop3, + NvU32 srcStartAddr, NvU32 dstStartAddr, + NvU32 flags, NvU32 colorCompare); + +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap's color depth must match the destination's video memory's color depth. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyMonoBitmap() +*/ +GF_RETTYPE GFGxCopyColorBitmap( GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits ); + +/** This function draws a line from a point x1, y1 to another point x2, y2 with a specified color + and ROP2 code. GFGxSetClip() should be called before calling GFGxLine(). If clipping is needed, + it is assumed that clipping is enabled and clipping rectangle was set by GFGxSetClip(). If + clipping is not set, the line wraps if it is too long, and no error code is returned. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param x1,y1 (NvU16) (x,y) destination point coords (in pixels, scan lines) + @param x2,y2 (NvU16) (x,y) source point coords in (pixels, scan lines) + @param rop2 (NvU16) ROP2 code + @param color (NvU16) color key for transparent blt or pattern color + @param flags (NvU16) refer to GFGX_LINE_X flag definitions + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Set flags to GFGX_LINE_NOT_DRAW_LAST_PIXEL if the last pixel is not to be + drawn. + +*/ +GF_RETTYPE GFGxLine( GFGxHandle GxHandle, + NvU16 x1, NvU16 y1, NvU16 x2, NvU16 y2, + NvU16 rop2, NvU32 color, NvU16 flags ); + +/** This function enables or disables clipping and also sets the clipping rectangle for subsequent + blit and line drawing functions. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pClipRect (#PGFRECT) pointer to the clipping rectangle + @param clipFlag (NvU32) See below + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Set clipFlag to one of the following: + - GFGX_SETCLIP_DISABLE + - GFGX_SETCLIP_ENABLE + - GFGX_SETCLIP_SETRECT + Refer to GFGX_SETCLIP_X flag definitions + + Clipping Sample Code + // Initialize clipping and rectangle parameters. + clipRect.top = 10; + clipRect.left = 10; + clipRect.right = 60; + clipRect.bottom = 60; + // Set the clipping rectangle and enable clipping. + GFGxSetClip( GxHandle, &clipRect, (GFGX_SETCLIP_SETRECT| + GFGX_SETCLIP_ENABLE) ); + // Call drawing function: Rectangle Fill, Pattern Fill, etc. + GFGXFillRect( GxHandle, 20, 20, 30, 30, 0x07E0 ); + // Disable clipping. + GFGxSetClip( GxHandle, NULL, GFGX_SETCLIP_DISABLE ); + + +*/ +GF_RETTYPE GFGxSetClip( GFGxHandle GxHandle, + PGFRECT pClipRect, NvU32 clipFlag); + +/** This function ensures synchronization between 2D operations and others modules operations. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param timeout (NvU32) obsolete parameter + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + When several modules share the same channel (like 3D,2D), it may be necessary to + synchronize the command flow with the 2D module execution. Putting a GFGxNotBusy() + call after a 2D operation ensures that commands which follow the 2D command are + executed after full completion of the 2D command. + + As opposed to GFGxWaitNotBusy(), this function doesn't block the CPU thread. + Graphics engine may not be idle when returning from the function. Control returns + to the CPU right after a wait command is placed in the graphics engine command FIFO. + The GoForce hardware begins executing the commands following the engine idle + command only after the graphics engine becomes idle. + + + @see GFGxWaitNotBusy() +*/ +GF_RETTYPE GFGxNotBusy( GFGxHandle GxHandle, + NvU32 timeout ); +/** This function sets the new value into the palette entry at index location. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param palVal (NvU32) New palette entry value + @param index (NvU16) Index of the palette entry + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The index value ranges from [0..255] inclusively. Parameter palVal is in RGB format, + where bits [0-7] represent the red value, bits [8-15] the green value, and bits [16-23] + the blue value. + + When this function is called, the physical palette entry is modified permanently. + + This function is used only for the 8-bits per-pixel mode and does not apply to the RGB 16 and + 32-bits mode. + + + @see GFGxGetPal(), GFGxSetPalRange(), GFGxGetPalRange() +*/ +GF_RETTYPE GFGxSetPal(GFGxHandle GxHandle, + NvU32 palVal, NvU16 index); + +/** This function sets the a range of new values pointed by pPalRange into the palette entries + starting at startIndex location and ending at endIndex inclusively. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pPalRange (NvU32*) Pointer to a range of palette entry values + @param startIndex (NvU16) Starting index of palette entries + @param endIndex (NvU16) Ending index of palette entries + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The index value ranges from [0..255] inclusively. Each palette entry value is in RGB format, + where bits [0-7] represent the red value, bits [8-15] the green value, and bits [16-23] + the blue value. + + When this function is called, the physical palette entry is modified permanently. + + This function is used only for the 8-bits per-pixel mode and does not apply to the RGB 16 and + 32-bits mode. + + + @see GFGxGetPal(), GFGxSetPalRange(), GFGxGetPalRange() +*/ +GF_RETTYPE GFGxSetPalRange(GFGxHandle GxHandle, + NvU32 * palRange, + NvU16 startIndex, NvU16 endIndex); + +/** This function returns the palette entry value at index location. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pPalVal (NvU32*) pointer to palette entry value + @param index (NvU16) index of the palette entry + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The index value ranges from [0..255] inclusively. The returned palette entry value is stored + in the location pointed to by pPalVal. + + This function is used only for the 8-bits per-pixel mode and does not apply to the RGB 16 and + 32-bits mode. + + + @see GFGxSetPal(), GFGxSetPalRange(), GFGxGetPalRange() +*/ +GF_RETTYPE GFGxGetPal(GFGxHandle GxHandle, + NvU32 * pPalVal, + NvU16 index); +/** This function returns the palette entry values starting from location startIndex to endIndex + inclusively. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pPalArray (NvU32*) Pointer to a range of palette entry values + @param startIndex (NvU16) Starting index of palette entries + @param endIndex (NvU16) Ending index of palette entries + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The index value ranges from [0..255] inclusively. The returned values are stored into + variables pointed to by pPalArray. + + This function is used only for the 8-bits per-pixel mode and does not apply to the RGB 16 and + 32-bits mode. + + + @see GFGxSetPal(), GFGxGetPal(), GFGxSetPalRange() +*/ + +GF_RETTYPE GFGxGetPalRange(GFGxHandle GxHandle, + NvU32 * pPalArray, + NvU16 startIndex, NvU16 endIndex); +/** This function transfers a color bitmap of exact full screen size from system memory to video memory. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pBltParam (#GFGXBLTPARAM*) refere to structure definition + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxBlt() +*/ + +GF_RETTYPE GFGxBltFullScreen(GFGxHandle GxHandle, + const GFGXBLTPARAM *pBltParam); +/** This function copies a rectangular image in the video memory to another location in the same video + memory without taking care of overlapping cases. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of rectangles + @param sx,sy (NvS16) left-top corner of source rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This is a special case of GxCopyRect(). It does not check on destructions of copied image + on video memory due to overlapping source and destination locations. + + + @see GFGxCopyRectEx(), GFGxCopyRect() +*/ +GF_RETTYPE GFGxCopyRectDirect(GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy); +/** This function copies a source bitmap from system memory to the video memory with + certain restrictions. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param bitmapPtr (NvU32*) Pointer to color bitmap + @param size_in_bytes (NvU16) Total bytes to transfer + @param rect (#GFRECT) Destination rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This is a special case of GxCopyColorBitmap(). Conditions below must be verified : + - The source bitmap pointer, pColorBits, has to be a 32-bit (DWORD) aligned address. + - The size of each line of the source bitmap must be 64-bits (8 bytes, QWORD) aligned. + - There must not be any skipping bytes between lines. + - Total bitmap size has to be smaller than or equal to 2K (2048) bytes. + - The source bitmap's color depth MUST match the destination video memory's color depth. + + + @see GxCopyColorBitmap() +*/ +GF_RETTYPE GFGxCopyPackedColorBitmap(GFGxHandle GxHandle, + NvU32 *pColorBits, + NvU16 bitmapSize, + GFRECT rect); +/** This function sets a given attribute. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param aid (NvU32) Attribute id, such as width, height etc + @param attr (NvU32) Attribute value + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Attribute id can be one of the following : + + + + + + + + + + + + + +
      #GFGX_ATTR_BPP Current bits per pixel.
      #GFGX_ATTR_STRIDE Frame buffer line width in bytes.
      #GFGX_ATTR_ADDR_PTR Ptr to start address of the display frame buffer.
      #GFGX_ATTR_ADDRStart address offset.
      #GFGX_ATTR_SURFACE Surface for GFGxAPI operations.
      #GFGX_ATTR_PALETTE_RGB888 Palette RGB888.
      + + + @see GFGxGetAttribute() +*/ + +GF_RETTYPE GFGxSetAttribute(GFGxHandle GxHandle, + NvU32 aid,NvU32 attr); +/** This function gets an attribute. Certain attributes are fixed. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param aid (NvU32) attribute id, such as width, height etc + @param attr (NvU32*) pointer to returned attribute value + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Attribute id can be one of the following : + + + + + + + + + + + + + + +
      #GFGX_ATTR_BPP Current bits per pixel.
      #GFGX_ATTR_STRIDE Frame buffer line width in bytes.
      #GFGX_ATTR_ADDR_PTR Ptr to start address of the display frame buffer.
      #GFGX_ATTR_ADDRStart address offset.
      #GFGX_ATTR_SURFACE Surface for GFGxAPI operations.
      #GFGX_ATTR_PALETTE_RGB888 Palette RGB888.
      + + @see GFGxSetAttribute() +*/ +GF_RETTYPE GFGxGetAttribute(GFGxHandle GxHandle, + NvU32 aid, NvU32 *attr); +/** This function checks whether the graphics engine is busy or idle. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param timeout (NvU32) obsolete parameter + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The function will wait until the graphics engine is idle. For example, if you want + to write to the frame buffer but the graphics engine is busy the function can be used + to wait until it is idle. + + As opposed to GFGxNotBusy(), this function blocks the CPU thread while waiting for + the graphics engine to become idle. + + + @see GFGxNotBusy() +*/ +GF_RETTYPE GFGxWaitNotBusy( GFGxHandle GxHandle, + NvU32 timeout ); +/** This function is used to stretch or shrink an image, which can be in system memory or video memory. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pBltParam (#GFGXBLTPARAM*) refere to structure definition + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The function has these limitations : + - supports 16 and 32BPP color depths, + + @see GFGxBlt() +*/ + +GF_RETTYPE GFGxStretchBlt( GFGxHandle GxHandle, + const GFGXBLTPARAM *pBltParam ); +/*******************************New API's based on enhancing old API's****************************/ + +/** This function fills a rectangle in the video memory with the specified solid color. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param x,y (NvS16) left-top corner of the rectangle + @param w,h (NvS16) width & height of the rectangle + @param color (NvU32) color to be filled (8BPP index, or 16BPP-32BPP TrueColor) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxFillRect() +*/ + /* Old API's with enhancement */ +GF_RETTYPE GFGxFillRectEx(GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 x, NvS16 y, + NvS16 w, NvS16 h, + NvU32 color); +/** This function copies a rectangular image in the video memory to another location in the same + video memory. It is commonly used in scrolling an image in video memory. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of rectangles + @param sx,sy (NvS16) left-top corner of source rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFGxCopyRectEx() checks for the destruction of the copied image in video memory + caused by overlapping source and destination locations. Also, if the destination + for the rectangle exceeds the limit of the video memory, wrapping is done in hardware + and no error code is returned. + + + @see GFGxCopyRect(), GFGxCopyRectDirect() +*/ +GF_RETTYPE GFGxCopyRectEx(GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy); +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap is specified in monochrome (1BPP) pixels. + Video memory location is specified by the surface parameter. + + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param fgColor (NvU16) color applied to source data bit 1 + @param bgColor (NvU16) color applied to source data bit 0 + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to monochome (1bpp) bitmap + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransMonoBitmap() +*/ +GF_RETTYPE GFGxCopyMonoBitmapEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvU32 fgColor, NvU32 bgColor, + NvS16 srcStride, + NvU8 *pMonoBits); +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap is specified in monochrome (1BPP) pixels and can be transparent. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param color (NvU16) color applied to non-transparent source data bit + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to monochome (1bpp) bitmap + @param selectTrans (NvS16) transparency select: 0 or 1 + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function is similar to GFGxCopyMonoBitmapEx() except for the selectTrans + parameter. This parameter indicates whether bit data equal to 0 or 1 is going to be + transparent. + + This function could be used for drawing a transparent text string or character. + + + @see GFGxCopyMonoBitmapEx() +*/ +GF_RETTYPE GFGxCopyTransMonoBitmapEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvU32 color, + NvS16 srcStride, + NvU8 *pMonoBits, + NvS16 selectTrans); + +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap's color depth must match the destination's video memory's color depth. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyMonoBitmap() +*/ +GF_RETTYPE GFGxCopyColorBitmapEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits + ); + +/** This function draws a line from a point x1, y1 to another point x2, y2 with a specified color + and ROP2 code. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param x1,y1 (NvU16) (x,y) destination point coords + @param x2,y2 (NvU16) (x,y) source point coords + @param rop2 (NvU16) ROP2 code + @param color (NvU16) color key for transparent blt or pattern color + @param flags (NvU16) refere to GFGX_LINE_X flag definitions + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxLine() +*/ +GF_RETTYPE GFGxLineEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvU16 x1, NvU16 y1, + NvU16 x2, NvU16 y2, + NvU16 rop2, NvU32 color, + NvU16 flags); + +GF_RETTYPE GFGxBltFullScreenEx(GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + const GFGXBLTPARAM *pBltParam); +/** This function copies a rectangular image in the video memory to another location in the same video + memory without taking care of overlapping cases. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of rectangles + @param sx,sy (NvS16) left-top corner of source rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This is a special case of GxCopyRect(). It does not check on destructions + of copied image on video memory due to overlapping source and destination locations. + + + @see GFGxCopyRectEx(), GFGxCopyRect(), GFGxCopyRectDirect() +*/ +GF_RETTYPE GFGxCopyRectDirectEx(GFGxHandle GxHandle, + PGFRMSURFACE pSurfNvS16, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy); + +/** This function copies a source bitmap from system memory to the video memory with + certain restrictions. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param pColorBits (NvU32*) pointer to color bitmap + @param bitmapSize (NvU16) total bytes to transfer + @param rect (#GFRECT) destination rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This is a special case of GxCopyColorBitmap(). Conditions below must be verified : + - The source bitmap pointer, pColorBits, has to be a 32-bit (DWORD) aligned address. + - The size of each line of the source bitmap must be 64-bits (8 bytes, QWORD) aligned. + - There must not be any skipping bytes between lines. + - Total bitmap size has to be smaller than or equal to 2K (2048) bytes. + - The source bitmap's color depth MUST match the destination video memory's color depth. + + + @see GxCopyColorBitmap(), GFGxCopyPackedColorBitmap() +*/ +GF_RETTYPE GFGxCopyPackedColorBitmapEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvU32 *pColorBits, + NvU16 bitmapSize, + GFRECT rect +/** This function performs a surface-to-surface blit. The color depth of the source + surface must match that of the destination. Also, the width and height of the + source must be the same as the destination's width and height. + Alphablending parameters can be specified. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param ppDestSurf (#PGFRMSURFACE*)pointer to destination surface pointer + @param ppSrcSurf (#PGFRMSURFACE) pointer so source surface pointer + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param rop3 (NvU16) raster operation code + @param srcStartAddr (NvU32) start address relative to the source surface + @param dstStartAddr (NvU32) start address relative to the destination surface + @param flags (NvU32) refer to GFGX_BLT_X flag definitions + @param flagex1 (NvU32) refer to alphablending flag definitions GFGXEX1_BLT_X + @param colorCompare (NvU32) color key for transparent blit + @param alpha (NvU16) alpha value for GFGX_BLT_ALPHA_FIXED or alphaFg + @param alphaBg (NvU16) background alpha + + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyRect(), GFGxCopyRectDirect(), GFGxBltSurface(), GFGxCopyMonoBitmap(), + GFGxCopyTransMonoBitmap(), GFGxCopyColorBitmap() +*/ ); +GF_RETTYPE GFGxBltSurfaceEx( GFGxHandle GxHandle, PGFRMSURFACE *ppDestSurf, + PGFRMSURFACE *ppSrcSurf, + NvS16 w, NvS16 h, NvU16 rop3, + NvU32 srcStartAddr, NvU32 dstStartAddr, + NvU32 flags, NvU32 flagex1, NvU32 colorCompare, + NvU16 alpha, NvU16 alphaBg); + + /* New API's based on new features */ + +/*******************************New API's based on New Features***********************************/ + +/** This function is used to transform a given source rectangle to the given destination + location in the video memory. + + Rotation takes place in counterclockwise direction. + + Destination rectangle can be same than source rectangle or different.

      + Both source and destination must be in video memory. + + Common input data requirements : + + - the data buffer must be aligned on all edges (top, bottom, left, right), which also implies + that stride is
      multiple of 16 bytes, + - the base address of both source and destination must be aligned at a 128-bit word aligned, + - in GFGX_BLT_SURFACE mode, source and destination must be same format : GF_SURFACE_RGB8,
      + GF_SURFACE_RGB565, GF_SURFACE_ARGB8888, or GF_SURFACE_YUV420, + - GFGX_BLT_MODE_LINEAR and X/Y modes are also supported for GF_SURFACE_RGB8,
      GF_SURFACE_RGB565 + and GF_SURFACE_ARGB8888, + - width and height must be multiple of 16 pixels in 8bpp mode, 8 in 16bpp and 4 in 32bpp for
      + GF_SURFACE_RGB8, GF_SURFACE_RGB565 and GF_SURFACE_ARGB8888 surfaces, + - in GFGXEX2_FAST_ROTATE_SQUARE mode, width should be equal to height for 90, 270,
      + TRANS_LR and TRANS_RL modes. Also the destination surface should be same as source + surface. + + Specific GF_SURFACE_YUV420 input data requirements : + + - only GFGX_BLT_SURFACE mode is supported, with no offsets defined for both source and +
      destination (dstStartAddr = srcStartAddr = 0). + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pBltParam (#GFGXBLTPARAM*) refere to structure definition + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + This function can be used the same way than GFGxBlt, adding flagex2 information. + + The following transformations are supported : + + + + + + + + + + + + + + + + + +
      #GFGXEX2_FAST_ROTATE_FLIP_X FLIP-X.
      #GFGXEX2_FAST_ROTATE_FLIP_Y FLIP-Y.
      #GFGXEX2_FAST_ROTATE_TRANS_LR TRANSPOSE LEFT-RIGHT.
      #GFGXEX2_FAST_ROTATE_TRANS_RLTRANSPOSE RIGHT-LEFT.
      #GFGXEX2_FAST_ROTATE_ROT_90 90° rotation.
      #GFGXEX2_FAST_ROTATE_ROT_180180° rotation.
      #GFGXEX2_FAST_ROTATE_ROT_270 270° rotation.
      + + + @see GFGxBlt() +*/ +GF_RETTYPE GFGxFastRotate(GFGxHandle GxHandle, + const GFGXBLTPARAM *pBltParam); +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap's color depth must match the destination's video memory's color depth. + Source transparency is supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + @param pSrcColorKey (NvU32*) pointer to source color key. If NULL no transparency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyMonoBitmap(), GFGxCopyColorBitmap() +*/ +GF_RETTYPE GFGxCopyTransColorBitmap(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits, + NvU32 *pSrcColorKey); +/** This function copies a source bitmap from system memory to the video memory with a mono + pattern buffer combination. + The source bitmap's color depth must match the destination's video memory's color depth. + Source and mono pattern transparencies are supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + @param pSrcColorKey (NvU32*) pointer to source color key. If NULL no transparency. + @param rop3 (NvU8) raster operation code + @param pPatBuffer (NvU8*) pointer to pattern buffer + @param patFgColor (NvU32) pattern foreground color + @param patBgColor (NvU32) pattern background color + @param patW, patH (NvU32) width & height of pattern buffer + @param patStride (NvU32) pattern stride in bytes + @param pSelectPatTrans (NvU16*) pointer to pattern color key. If NULL no transparency. + + Depending of pattern size, replicated mode is used or not. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransColorBitmap(), GFGxCopyColorBitmap() +*/ +GF_RETTYPE GFGxCopyTransColorBitmapWithMonoPattern(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits, + NvU32 *pSrcColorKey, + NvU8 rop3, + NvU8 *pPatBuffer, + NvU32 patFgColor, + NvU32 patBgColor, + NvU32 patW, + NvU32 patH, + NvU32 patStride, + NvU16 *pSelectPatTrans); +/** This function copies a source bitmap from system memory to the video memory with a colour + pattern buffer combination. + The source bitmap and pattern's color depth must match the destination's video memory's color depth. + Source and color pattern transparencies are supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + @param pSrcColorKey (NvU32*) pointer to source color key. If NULL no transparency. + @param rop3 (NvU8) raster operation code + @param pPatBuffer (NvU8*) pointer to pattern buffer + @param patW, patH (NvU32) width & height of pattern buffer + @param patStride (NvU32) pattern stride in bytes + @param pPatColorKey (NvU32*) pointer to pattern color key. If NULL no transparency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransColorBitmap(), GFGxCopyColorBitmap(), GFGxCopyTransColorBitmapWithMonoPattern() +*/ +GF_RETTYPE GFGxCopyTransColorBitmapWithColorPattern(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits, + NvU32 *pSrcColorKey, + NvU8 rop3, + NvU8 *pPatBuffer, + NvU32 patW, + NvU32 patH, + NvU32 patStride, + NvU32 *pPatColorKey); +/** This function copies a source bitmap from system memory to the video memory with a mono + pattern buffer combination. + The source bitmap and pattern are mono (1BPP). + Mono source and mono pattern transparencies are supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcFgColor (NvU32) source foreground color + @param srcBgColor (NvU32) source background color + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to source bitmap + @param pSelectSrcTrans (NvU16*) pointer to source color key. If NULL no transparency. + @param rop3 (NvU8) raster operation code + @param pPatBuffer (NvU8*) pointer to pattern buffer + @param patFgColor (NvU32) pattern foreground color + @param patBgColor (NvU32) pattern background color + @param patW, patH (NvU32) width & height of pattern buffer + @param patStride (NvU32) pattern stride in bytes + @param pSelectPatTrans (NvU16*) pointer to pattern color key. If NULL no transparency. + + Depending of pattern size, replicated mode is used or not. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransColorBitmap(), GFGxCopyTransMonoBitmap() +*/ +GF_RETTYPE GFGxCopyTransMonoBitmapWithMonoPattern(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvU32 srcFgColor, + NvU32 srcBgColor, + NvS16 srcStride, + NvU8 *pMonoBits, + NvU16 *pSelectSrcTrans, + NvU8 rop3, + NvU8 *pPatBuffer, + NvU32 patFgColor, + NvU32 patBgColor, + NvU32 patW, + NvU32 patH, + NvU32 patStride, + NvU16 *pSelectPatTrans); +/** This function copies a source bitmap from system memory to the video memory with a color + pattern buffer combination. + The source bitmap is mono (1BPP). + Mono source and color pattern transparencies are supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcFgColor (NvU32) source foreground color + @param srcBgColor (NvU32) source background color + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to source bitmap + @param pSelectSrcTrans (NvU16*) pointer to source color key. If NULL no transparency. + @param rop3 (NvU8) raster operation code + @param pPatBuffer (NvU8*) pointer to pattern buffer + @param patW, patH (NvU32) width & height of pattern buffer + @param patStride (NvU32) pattern stride in bytes + @param pPatColorKey (NvU32*) pointer to pattern color key. If NULL no transparency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransMonoBitmap(), GFGxCopyTransMonoBitmapWithMonoPattern() +*/ +GF_RETTYPE GFGxCopyTransMonoBitmapWithColorPattern(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvU32 srcFgColor, + NvU32 srcBgColor, + NvS16 srcStride, + NvU8 *pMonoBits, + NvU16 *pSelectSrcTrans, + NvU8 rop3, + NvU8 *pPatBuffer, + NvU32 patW, + NvU32 patH, + NvU32 patStride, + NvU32 *pPatColorKey); + +/** This function purges the graphics cache used to store pattern buffers when + GFGX_BLT_PAT_CACHE is used. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + + @retval #GF_SUCCESS Success + @retval #GFGX_ERROR_NULL_PARAMETER Invalid GxHandle + + @see GFGxBlt() +*/ +GF_RETTYPE GFGxCachePurge(GFGxHandle GxHandle); + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFGxOpen(GFRmHandle hRm, GFGxHandle *phGx, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFGxClose(GFGxHandle *phGx); + +/*@}*/ +/*@}*/ + +#ifdef __cplusplus +} +#endif + +/** @page pageGxAppNotes GxAPI Application Notes + + @section pageGxAppNotes1 Todo + +*/ + +#endif // _GFGx_H_ diff --git a/Start_WM/test6/inc/GFGxError.h b/Start_WM/test6/inc/GFGxError.h new file mode 100755 index 00000000..64e84624 --- /dev/null +++ b/Start_WM/test6/inc/GFGxError.h @@ -0,0 +1,46 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFGxError.h + * GFSDK Gx Graphics API header file. + */ + +#ifndef __GFGXERROR_H__ +#define __GFGXERROR_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** GFGxAPI error code: Bad parameter. */ +#define GFGX_ERROR_ILLEGAL_PARAMETER (GFGX_ERROR | 0x00000001L) +#define GFGX_ERROR_NULL_SURFACE (GFGX_ERROR | 0x00000002L) +/** GFGxAPI error code: Color depth not supported. */ +#define GFGX_ERROR_COLORDEPTH_NOT_SUPPORTED (GFGX_ERROR | 0x00000003L) +#define GFGX_ERROR_ILLEGAL_ALPHA_MODE (GFGX_ERROR | 0x00000004L) +#define GFGX_ERROR_ILLEGAL_ROTATION_FLAG (GFGX_ERROR | 0x00000005L) +#define GFGX_ERROR_GETTING_COMPONENT (GFGX_ERROR | 0x00000006L) +#define GFGX_ERROR_NO_PRIMARY_SURFACE (GFGX_ERROR | 0x00000007L) +#define GFGX_ERROR_NO_COLORCONVERT_SUPPORT (GFGX_ERROR | 0x00000008L) +#define GFGX_ERROR_NULL_PARAMETER (GFGX_ERROR | 0x00000009L) +/** GFGxAPI error code: Function not supported. */ +#define GFGX_ERROR_NOT_SUPPORTED (GFGX_ERROR | 0x0000000AL) + + + +#ifdef __cplusplus +} +#endif + +#endif // __GFGXERROR_H__ + + + diff --git a/Start_WM/test6/inc/GFI2C.h b/Start_WM/test6/inc/GFI2C.h new file mode 100755 index 00000000..458a21c0 --- /dev/null +++ b/Start_WM/test6/inc/GFI2C.h @@ -0,0 +1,314 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFI2C.h + GFSDK I2C API header file. +*/ + +#ifndef __I2C_H__ +#define __I2C_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/** @addtogroup groupI2C I2CAPI I2C API +*/ +/*@{*/ + +/** GFI2C Error code: Function was passed an illegal parameter. */ +#define GFI2C_ERROR_ILLEGAL_PARAMETER (GFI2C_ERROR | 0x00000001L) +/** GFI2C Error code: I2C slave device did not respond with ack signal. */ +#define GFI2C_ERROR_ACKNOWLEDGE_FAILURE (GFI2C_ERROR | 0x00000002L) +/** GFI2C Error code: Polling routine generated a timeout error. */ +#define GFI2C_ERROR_TIMEOUT_ERROR (GFI2C_ERROR | 0x00000003L) + +/** Enum specifies attribute ids for GFI2CSetAttribute() + @see GFI2CSetAttribute() +*/ +typedef enum _GFI2CATTRIBUTES +{ + GFI2C_ATTR_PULLUP, /**< Set internal I2C pullups, see GFI2C_ATTR_PULLUP_FLAGS. */ + GFI2C_ATTR_SW, /**< Set to use GPIO for SW I2C */ + GFI2C_ATTR_HW, /**< Set to use HW I2C (default) */ + GFI2C_ATTR_TIMING, /**< I2C timing mode, valid for GFI2C_ATTR_HW mode only, see GFI2C_TIMING */ + GFI2C_ATTR_RESPTIMEOUT /**< Set I2C Ack response timeout in ms */ + +} GFI2CATTRIBUTES; + +/** Flag bits for for GFI2C_ATTR_PULLUP attribute. + + Usage example: + 
      +    attr = (SP_SCL_PULLUP_DISABLE | SP_SDA_PULLUP_DISABLE)
+    GFI2CSetAttribute(I2CHandle, GFI2C_ATTR_PULLUP, attr)
+
      + + @see GFI2CSetAttribute(), GFI2CATTRIBUTES +*/ +typedef enum _GFI2C_ATTR_PULLUP_FLAGS +{ + SDA_PULLDOWN_DISABLE = 0, //!< Flag to disable I2C data pull down + SDA_PULLDOWN_ENABLE = 1, //!< Flag to enable I2C data pull down + SDA_PULLUP_DISABLE = 0, //!< Flag to disable I2C data pull up + SDA_PULLUP_ENABLE = 1, //!< Flag to enable I2C data pull up + SCL_PULLDOWN_DISABLE = 0, //!< Flag to disable I2C clock pull down + SCL_PULLDOWN_ENABLE = 1, //!< Flag to enable I2C clock pull down + SCL_PULLUP_DISABLE = 0, //!< Flag to disable I2C data pull up + SCL_PULLUP_ENABLE = 0, //!< Flag to enable I2C clock pull up + SCL_DEFAULT = 0, //!< Flag sets I2C clock back to default + SDA_DEFAULT = 0 //!< Flag sets I2C data back to default + +} GFI2C_ATTR_PULLUP_FLAGS; + +/** Timing modes for GFI2C_ATTR_TIMING attribute. + + The timing mode has effect for I2C HW mode (GFI2C_ATTR_HW) only. + + It affects the programming of IC_IC_CONFIG_0/THDCTL and + IC_TCOMMAND_0/SPEED_CTL registers. +*/ +typedef enum _GFI2C_TIMING +{ + /** Standard timing (default). + IC_TCOMMAND_0, SPEED_CTL is programmed to STD_MODE (standard timing). + */ + GFI2C_TIMING_STANDARD = 0, + + /** Fast mode with 2 clocks extended hold time. + IC_TCOMMAND_0, SPEED_CTL is programmed to FAST_MODE. + IC_IC_CONFIG_0, THDCTL is programmed to b'10 (add 2 clocks to hold time). + */ + GFI2C_TIMING_FASTADD2CLK + +} GFI2C_TIMING; + +typedef struct _GFI2CTABLE +{ + GF_RETTYPE (* I2CWrite)( GFI2CHandle I2CHandle, + NvU32 slaveAddr, + NvU8 *pDataBytes, + NvU32 len, + NvU32 delayInMSec ); + + GF_RETTYPE (* I2CRead)( GFI2CHandle I2CHandle, + NvU32 slaveAddr, + NvU8 *pDataBytes, + NvU32 len, + NvU32 delayInMSec ); + + GF_RETTYPE (* I2CRestartRead)( GFI2CHandle I2CHandle, + NvU32 slaveAddr, + NvU32 index, + NvU8 *pDataBytes, + NvU32 len, + NvU32 delayInMSec ); + + GF_RETTYPE (* I2CScan)( GFI2CHandle I2CHandle, + NvU16 slaveAddr ); + + GF_RETTYPE (* I2CPowerSwitch)( GFI2CHandle I2CHandle, NvU8 status); + + GF_RETTYPE (* I2CGetProperty)( GFI2CHandle I2CHandle, + PGFPROPERTY pI2CProp ); + + GF_RETTYPE (* I2CSetAttribute)(GFI2CHandle I2CHandle, NvU32 aid, NvU32 attr); + GF_RETTYPE (* I2CSetClock)( GFI2CHandle I2CHandle, NvU32 selectclock); + GF_RETTYPE (* I2CWritePrepare)( GFI2CHandle I2CHandle, + NvU32 slaveAddr, + NvU32 *pData, + NvU32 len, + NvU32 *pBuffer, + NvU32 *bufferSize); + GF_RETTYPE (* I2CRestartWrite)( GFI2CHandle I2CHandle, + NvU32 slaveAddr1, + NvU8 *pIndexBytes, + NvU32 lenIndex, + NvU32 slaveAddr2, + NvU8 *pDataBytes, + NvU32 lenData, + NvU32 delayInMSec ); + +} GFI2CTABLE, *PGFI2CTABLE; + +/** Open GFI2C component. + @param hRm RM handle + @param phI2C Returns I2C component handle on success + @param state Channel allocation mode + @param hCh Channel to use, or NULL to allocate new +*/ +GF_RETTYPE GFI2COpen(GFRmHandle hRm, GFI2CHandle *phI2C, GF_STATE_TYPE state, GFRmChHandle hCh); + +/** Close GFi@c component. + @param phI2C I2C component handle, will be reset to NULL. Can be NULL. +*/ +void GFI2CClose(GFI2CHandle *phI2C); + +/** This routine writes out len bytes of data during one I2C transfer. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + @param pDataBytes (NvU8) Pointer to data bytes to be written + @param len (NvU32) Number of bytes of data to be written + @param delayInMSec (NvU32) Optional delay inserted after transfer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CWrite(I2CHandle, slaveAddr, pDataBytes, len, delayInMSec) \ + ((PGFI2CTABLE)I2CHandle)->I2CWrite(I2CHandle, slaveAddr, pDataBytes, len, delayInMSec) + +/** This routine reads len bytes of data during one I2C transfer. A typical I2C slave + device requires its address already be set by a preceding GFI2CWrite() function. + These functions should be executed together with no other activity in between. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + @param pDataBytes (NvU8) Pointer to data bytes read from device + @param len (NvU32) Number of bytes of data to be read + @param delayInMSec (NvU32) Optional delay inserted after transfer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CRead(I2CHandle, slaveAddr, pDataBytes, len, delayInMSec) \ + ((PGFI2CTABLE)I2CHandle)->I2CRead(I2CHandle, slaveAddr, pDataBytes, len, delayInMSec) + +/** This function reads in len or fewer bytes of data from an I2C slave device. It differs + from the GFI2CRead() function in that it does so with a combination of an I2C write and + read. There is an I2C write of the slave address and index byte then followed by a START + condition. There is no STOP condition in-between the write and read transactions. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + @param index (NvU32) 2nd byte index of slave device register + @param pDataBytes (NvU8) Pointer to data bytes read from device + @param len (NvU32) Number of bytes of data to be read + @param delayInMSec (NvU32) Optional delay inserted after transfer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CRestartRead(I2CHandle, slaveAddr, index, pDataBytes, len, delayInMSec) \ + ((PGFI2CTABLE)I2CHandle)->I2CRestartRead(I2CHandle, slaveAddr, index, pDataBytes, len, delayInMSec) + +/** This routine writes out a I2C slave address and checks for an ACK. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CScan(I2CHandle, slaveAddr) \ + ((PGFI2CTABLE)I2CHandle)->I2CScan(I2CHandle, slaveAddr) + +/** This function has been replaced by camera scripting. Camera power is now + controlled by a function in the camera scripts. +*/ +#define GFI2CPowerSwitch(I2CHandle, status) \ + ((PGFI2CTABLE)I2CHandle)->I2CPowerSwitch(I2CHandle, status) + +/** This routine sets various I2C attributes. The aid parameter passes an + enumeration GFI2CATTRIBUTES that selects the attribute operation. Each + attribute has a set of defined values passed in the parameter attr, that + it will operate on. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param aid (NvU32) attribute flag + @param attr (NvU32) attribute data value + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see GFI2CATTRIBUTES + +*/ +#define GFI2CSetAttribute( I2CHandle, aid, attr) \ + ((PGFI2CTABLE)I2CHandle)->I2CSetAttribute(I2CHandle, aid, attr ) + +/** This routine sets the I2C clock output on the SCL pin. The parameter + selectclock specifies the new I2C clock in kilohertz. The default + is 100. If selectclock = 0, then the default will be set. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param selectclock (NvU32) new clock value in kHz. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CSetClock(I2CHandle, selectclock) \ + ((PGFI2CTABLE)I2CHandle)->I2CSetClock(I2CHandle, selectclock) + +/** This routine Provide properties about I2C. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param pProp (GFPROPERTY) pointer to GFPROPERTY struct. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +#define GFI2CGetProperty(I2CHandle, pProp) \ + ((PGFI2CTABLE)I2CHandle)->I2CGetProperty(I2CHandle, pProp) + +/** This function prepares a buffer that contains the command sequence for an + I2C write. This may concatenated onto another command sequence and written + to the channel as a combination of two transactions. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + @param pData (NvU8) Pointer to data bytes to be written + @param len (NvU32) Number of bytes of data to be read + @param pBuffer (NvU8) Pointer to command sequence for I2C write + @param bufferSize (NvU32) Number of commands returned + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CWritePrepare(I2CHandle, slaveAddr, pData, len, pBuffer, bufferSize) \ + ((PGFI2CTABLE)I2CHandle)->I2CWritePrepare(I2CHandle, slaveAddr, pData, len, pBuffer, bufferSize) + +/** This function writes lenData bytes of data to an I2C slave device. It differs + from the GFI2CWrite() function in that it does so with a combination of two I2C writes + There is an I2C write of the slave address and index bytes then followed by a START + condition. There is no STOP condition in-between the write and write transactions. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr1 (NvU32) I2C address of 1st slave device + @param pDataIndex (NvU8) Pointer to index data to be written to the 1st device + @param lenIndex (NvU32) index data length + @param slaveAddr2 (NvU32) I2C address of 2nd slave device + @param pDataBytes (NvU8) Pointer to data bytes written to 2nd device + @param lenData (NvU32) Number of bytes of data to be read + @param delayInMSec (NvU32) Optional delay inserted after transfer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CRestartWrite(I2CHandle, slaveAddr1, pIndexBytes, lenIndex, \ + slaveAddr2, pDataBytes, lenData, delayInMSec) \ + ((PGFI2CTABLE)I2CHandle)->I2CRestartWrite(I2CHandle, slaveAddr1, pIndexBytes, lenIndex, \ + slaveAddr2, pDataBytes, lenData, delayInMSec) + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif /* __I2C_H__ */ + diff --git a/Start_WM/test6/inc/GFI2S.h b/Start_WM/test6/inc/GFI2S.h new file mode 100755 index 00000000..bbfd876e --- /dev/null +++ b/Start_WM/test6/inc/GFI2S.h @@ -0,0 +1,49 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* +* File: GFi2s.h +* I2S header file. +*/ + + +#ifndef __I2S_H__ +#define __I2S_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFI2SOpen(GFRmHandle hRm, GFI2SHandle *phI2S, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFI2SClose(GFI2SHandle *phI2S); + +GF_RETTYPE GFI2SSetTransmitBuffer(GFI2SHandle I2SHandle, + NvU32 startAddr, + NvU32 sizeBytes, + NvU32 numBuffers); + +GF_RETTYPE GFI2SSetTransmitState(GFI2SHandle I2SHandle, + NvU32 state); + +GF_RETTYPE GFI2SSetReceiveBuffer(GFI2SHandle I2SHandle, + NvU32 startAddr, + NvU32 sizeBytes, + NvU32 numBuffers); + +GF_RETTYPE GFI2SSetReceiveState(GFI2SHandle I2SHandle, + NvU32 state); + +#ifdef __cplusplus +} +#endif + +#endif /* __I2S_H__ */ diff --git a/Start_WM/test6/inc/GFINTx.h b/Start_WM/test6/inc/GFINTx.h new file mode 100755 index 00000000..2b45eb76 --- /dev/null +++ b/Start_WM/test6/inc/GFINTx.h @@ -0,0 +1,114 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFINTx.h + GFSDK Interrupt API header file. +*/ + +#ifndef __GFINTx_H__ +#define __GFINTx_H__ + +#include "GFRmOEM.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupINTx INTxAPI Interrupt API +*/ +/*@{*/ + +#define GF_INTR_START 0 +#define GF_INTR_END 15 + +/* Embedded memory controller interrupt */ +#define GF_EMC_INTR (15) + +/* MC interrupt. */ +#define GF_MC_INTR (14) + +/* SD interrupt. */ +#define GF_SD_INTR (13) + +/* I2C interrupt. */ +#define GF_IC_INTR (12) + +/* I2s interrupt. */ +#define GF_I2S_INTR (11) + +/* Display interrupt. */ +#define GF_DISPLAY_INTR (10) + +/* 3d interrupt. */ +#define GF_GR3D_INTR (9) + +/* 2d interrupt. */ +#define GF_GR2D_INTR (8) + +/* DSP interrupt. */ +#define GF_DSP_INTR (7) + +/* ISP interrupt. */ +#define GF_ISP_INTR (6) + +/* SDGP1 input falling edge interrupt. */ +#define GF_EPP_INTR (5) + +/* VI interrupt. */ +#define GF_VI_INTR (4) + +/* JPEG Encoder interrupt. */ +#define GF_JPEGE_INTR (3) + +/* Mpeg Encoder interrupt. */ +#define GF_ME_INTR (2) + +/* Graphics MPD interrupt. */ +#define GF_GRMPD_INTR (1) + +/* Host interface interrupt. */ +#define GF_HOST_INTR (0) + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFINTxOpen(GFRmHandle hRm, GFINTxHandle *phINTx, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFINTxClose(GFINTxHandle *phINTx); + +/* ### Helper Macros ### */ +GF_RETTYPE GFINTxGetProperty(GFINTxHandle INTxHandle, + PGFPROPERTY pINTxProp); + + +GF_RETTYPE GFINTxDisable(GFINTxHandle INTxHandle, + NvU32 idInt); + +GF_RETTYPE GFINTxEnable(GFINTxHandle INTxHandle, + NvU32 idInt); + +/** Wait for system level interrupt request. + @param handle Handle to INTx API + @param idInt System level interrupt ID + @param timeout Timeout in miliseconds, or 0 to wait endlessly + @retval GF_SUCCESS Interrupt request received + @retval GF_WAIT_TIME_OUT Timeout without interrupt request received +*/ +GF_RETTYPE GFINTxWaitForIRQ(GFINTxHandle INTxHandle, + NvU32 idInt, + NvU32 timeout); + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif // __GFINTx_H__ +/* End of file. */ + diff --git a/Start_WM/test6/inc/GFIsp.h b/Start_WM/test6/inc/GFIsp.h new file mode 100755 index 00000000..b3c7e512 --- /dev/null +++ b/Start_WM/test6/inc/GFIsp.h @@ -0,0 +1,1654 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFIsp.h + GFSDK Image Signal Processing API header file. +*/ + +#ifndef _GF_ISP__ +#define _GF_ISP__ + +//#define DVS_DEVELOPMENT + +#include "GFCamera.h" +#include "GFVx.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupIsp IspAPI Image Signal Processing API + + As image resolution increases (three megapixels and up), image signal + processing inside the imager module becomes complex and costly, and the + required bandwidth to transfer processed data to the GPU increases. + + One solution to this problem is to incorporate image signal processing (ISP1) + capabilities inside the GPU, and let the imager send raw Bayer Pattern Data + from the CMOS or CCD sensor to the GPU. This reduces bandwidth as ISP + programming is easier and much faster compared to having the ISP unit + inside the imager. + + The ISP pipeline consists of various stages of image processing operations to + enhance the image so that its digital representation is as close to the natural + look as possible. The ISP pipeline consists of the following stages: + - Optical Black Compensation (OB) + - De-Knee Linearization + - Lens Shading Compensation + - White Balance Gain Adjustment (M1, M2, M3 statistics gathering) + - Bad Pixel Compensation + - Noise Reduction + - Demosaicing + - Edge Enhancement (M4 statistics gathering) + - Color Noise Reduction + - Color Correction + - Gamma Correction + - RGB to YUV conversion + + Besides these pipeline stages, the ISP module also provides a statistics + collection mechanism that can be applied to multiple regions of the image. + Image statistics information can be used to compute Auto Exposure (AE), + Auto White Balance (AWB) and Auto Focus (AF). + + The GFISPAPI sets up parameters for each pipeline functional block. If + needed, the user can also choose to bypass each individual functional block. + Once all blocks are set up, image data flows through them automatically. + + Figure 1, "Block Diagram of the ISP Interface," shows the ISP with + respect to other input blocks such as video input (VI) and the encoder + preprocessor (EPP). + + @image html ISPFigure1.bmp + + Figure 2, "Internal ISP Data Flow," shows the data flow inside the + ISP. + + @image html ISPFigure2.bmp + +*/ +/*@{*/ + +/** @defgroup groupIspCapability ISP Capability Flags + These flags represent the various capabilities of the ISP. + @see GFISPPROPERTY +*/ +/*@{*/ + +/** IspAPI property flag: Bayer format input supported. + @see GFISPGetProperty() +*/ +#define GFISP_CAP_FORMAT_BAYER 0x00000001 + +/** IspAPI property flag: Stacked format input supported. + @see GFISPGetProperty() +*/ +#define GFISP_CAP_FORMAT_STACKED 0x00000002 + +/** IspAPI property flag: Three optical black regions supported. + @see GFISPGetProperty(), GFISPOBCONTROL +*/ +#define GFISP_CAP_THREE_OB_REGIONS 0x00000004 + +/** IspAPI property flag: Four optical black regions supported. + @see GFISPGetProperty(), GFISPOBCONTROL +*/ +#define GFISP_CAP_FOUR_OB_REGIONS 0x00000008 + +/** IspAPI property flag: Frame-based optical black supported. + @see GFISPGetProperty(), GFISPOBCONTROL +*/ +#define GFISP_CAP_FRAME_OB 0x00000010 + +/** IspAPI property flag: Line-based optical black supported. + @see GFISPGetProperty(), GFISPOBCONTROL +*/ +#define GFISP_CAP_LINE_OB 0x00000020 + +/** IspAPI property flag: Column-based optical black supported. + @see GFISPGetProperty() +*/ +#define GFISP_CAP_COLUMN_OB 0x00000040 + +/** IspAPI property flag: Deknee (input linearization) supported. + @see GFISPGetProperty(), GFISPDEKNEECONTROL +*/ +#define GFISP_CAP_DE_KNEE 0x00000100 + +/** IspAPI property flag: Lens shading supported. + @see GFISPGetProperty(), GFISPLENSSHADING +*/ +#define GFISP_CAP_LENSSHADING 0x00000200 + +/** IspAPI property flag: White balance supported. + @see GFISPGetProperty(), GFISPWBCONTROL +*/ +#define GFISP_CAP_WB 0x00000400 + +/** IspAPI property flag: Demosaic supported. + @see GFISPGetProperty(), GFISPDEMOSAICCONTROL +*/ +#define GFISP_CAP_DEMOSIAC 0x00000800 + +/** IspAPI property flag: Edge enhancement supported. + @see GFISPGetProperty(), GFISPEDGEENHANCECONTROL +*/ +#define GFISP_CAP_EDGEENHANCE 0x00001000 + +/** IspAPI property flag: Bad pixel concealment supported. + @see GFISPGetProperty(), GFISPBADPIXELCONTROL +*/ +#define GFISP_CAP_BADPIXEL 0x00002000 + +/** IspAPI property flag: Noise reduction supported. + @see GFISPGetProperty(), GFISPNOISECONTROL1 +*/ +#define GFISP_CAP_NOISEREDUCTION1 0x00004000 + +/** IspAPI property flag: Color noise reduction supported. + @see GFISPGetProperty(), GFISPNOISECONTROL2 +*/ +#define GFISP_CAP_NOISEREDUCTION2 0x00008000 + +/** IspAPI property flag: Color correction supported. + @see GFISPGetProperty(), GFISPCOLORCORRECTION +*/ +#define GFISP_CAP_COLORCORRECTION 0x00100000 + +/** IspAPI property flag: Gamma correction supported. + @see GFISPGetProperty(), GFISPGAMMACONTROL +*/ +#define GFISP_CAP_GAMMACORRECTION 0x00200000 + +/** IspAPI property flag: YUV conversion supported. + @see GFISPGetProperty(), GFISPYUVCONVERSION +*/ +#define GFISP_CAP_YUVCONVERSION 0x00400000 + +/** IspAPI property flag: M1 window statistics supported. + @see GFISPGetProperty(), GFISPM1WINDOW +*/ +#define GFISP_CAP_M1 0x01000000 + +/** IspAPI property flag: M2 window statistics supported. + @see GFISPGetProperty(), GFISPM2WINDOW +*/ +#define GFISP_CAP_M2 0x02000000 + +/** IspAPI property flag: M3 window statistics supported. + @see GFISPGetProperty(), GFISPM3WINDOW +*/ +#define GFISP_CAP_M3 0x04000000 + +/** IspAPI property flag: M4 window statistics supported. + @see GFISPGetProperty(), GFISPM4WINDOW +*/ +#define GFISP_CAP_M4 0x08000000 + +/** IspAPI property flag: Negative effect supported. + @see GFISPGetProperty() +*/ +#define GFISP_CAP_NEGATIVEEFFECT 0x80000000 +/*@}*/ + +//#define MANUAL_ENABLE_WAIT_FOR_OUTPUT_END 1 + +/** Struct for ISP version and capabilities. + @see GFISPGetProperty +*/ +typedef struct _GFISPPROPERTY +{ + NvU32 size; /**< Actual size of GFISPPROPERTY data structure. */ + NvU32 version; /**< Version of GFISPAPI. */ + + NvU32 cap; /**< Combination of @ref groupIspCapability. Each bit corresponds to one ISP capability. */ + NvU32 maxWidth, /**< Maximum supported image width. */ + maxHeight; /**< Maximum image height. */ + NvU32 supportedScriptVersion; /**< Version of script supported by ISP API. Incorrect script version may cause some API calls to fail. */ +} GFISPPROPERTY, *PGFISPPROPERTY; + + +/** Definition of attribute ids for GFISPGetAttribute() and GFISPSetAttribute(). +*/ +typedef enum _GFISPATTRIBUTES { + GFISP_ATTR_ENABLE_ISP, /**< The master switch of ISP. 1 = Enable ISP processing, 0 = Disable */ + GFISP_ATTR_ENABLE_OB, /**< The master switch for optical black. 1 = Enable OB, 0 = Disable */ + GFISP_ATTR_ENABLE_SENSOR_MANUAL_OB, /**< The master switch for SENSOR Manual optical black. 1 = Enable OB, 0 = Disable */ + GFISP_ATTR_ENABLE_SENSOR_AUTO_OB, /**< The master switch for SENSOR Auto optical black. 1 = Enable OB, 0 = Disable */ + GFISP_ATTR_ENABLE_FOB, /**< Switch for frame based optical black. 1 = Enable frame based optical black, 0 = Disable */ + GFISP_ATTR_ENABLE_FOB_SELFRESET, /**< Switch for self-reset for frame based optical black. 1 = Enable (reset every frame), 0 = Disable */ + GFISP_ATTR_ENABLE_FOB_TEMPORAL, /**< Switch for temporal filtering for frame based optical black. 1 = Enable temporal filtering, 0 = Disable */ + GFISP_ATTR_ENABLE_LOB, /**< Switch for line based optical black. 1 = Enable line based OB, 0 = Disable */ + GFISP_ATTR_ENABLE_DEKNEE, /**< Switch for deknee. 1 = Enable deknee, 0 = Disable */ + GFISP_ATTR_ENABLE_LENS_SHADING, /**< Switch for lens shading correction. 1 = Enable lens shading correction, 0 = Disable */ + GFISP_ATTR_ENABLE_WB, /**< The master switch for white balance. 1 = Enable white balance, 0 = Disable */ + GFISP_ATTR_ENABLE_AWB, /**< Switch for built-in automatic white balance. 1 = Automatic/dynamic (real-time) white balance, 0 = Preprogrammed mode white balance */ + GFISP_ATTR_AWB_HOLD, /**< Switch to pause automatic white balance. Only effective when GFISP_ATTR_ENABLE_AWB=1. 1 = Start applying current AWB gain value to all future frames, 0 = Restore normal AWB mode */ + GFISP_ATTR_ENABLE_DEMOSAIC, /**< Switch for demosaic processing. 1 = Enable demosaic processing, 0 = Disable */ + GFISP_ATTR_ENABLE_EDGE_ENHANCE, /**< Switch for edge enhancement. 1 = Enable edge enhancement, 0 = Disable */ + GFISP_ATTR_ENABLE_NOISE_CONTROL1, /**< Switch for noise control 1. Noise control method 1 is built in the demosaic unit. 1 = Enable noise control 1, 0 = Disable */ + GFISP_ATTR_ENABLE_BAD_PIXEL, /**< Switch for bad pixel concealment. 1 = Enable bad pixel detection and concealment, 0 = Disable */ + GFISP_ATTR_ENABLE_COLOR_CORRECTION, /**< Switch for color correction. 1 = Enable color correction, 0 = Disable */ + GFISP_ATTR_ENABLE_NOISE_CONTROL2, /**< Switch for noise control 2. Noise control method 2 is built in the color correction unit. 1 = Enable noise control 2, 0 = Disable */ + GFISP_ATTR_ENABLE_GAMMA_CORRECTION, /**< Switch for gamma correction. 1 = Enable gamma correction, 0 = Disable */ + GFISP_ATTR_ENABLE_YUV_CONVERSION, /**< Switch for RGB to YUV conversion. 1 = Enable RGB-YUV conversion, 0 = Disable */ + GFISP_ATTR_ENABLE_NEGATIVE_EFFECT, /**< Switch for negative effect. 1 = Negate whole output image, 0 = Normal image */ + GFISP_ATTR_ENABLE_M2, /**< Switch for M2 statistics. 1 = Enable M2 statistics gathering, 0 = Disable */ + GFISP_ATTR_ENABLE_M3, /**< Switch for M3 statistics. 1 = Enable M3 statistics gathering, 0 = Disable */ + GFISP_ATTR_ENABLE_M4, /**< Switch for M4 statistics. 1 = Enable M4 statistics gathering, 0 = Disable */ + GFISP_ATTR_ENABLE_STATS_RAISE, /**< Switch for statistics raise. 1 = Generate raise vector when statistics gathering is complete, 0 = Disable */ + GFISP_ATTR_ENABLE_STATS_INT, /**< Switch for statistics interrupt. 1 = Generate interrupt when statistics gathering is complete, 0 = Disable */ + GFISP_ATTR_STATS_LINE_END, /**< The line at which statistics gathering is complete. When the line counter reaches STATS_LINE_END, the raise vector and/or interrupt are generated (if enabled). */ +#ifdef MANUAL_ENABLE_WAIT_FOR_OUTPUT_END + GFISP_ATTR_ENABLE_WAIT_FOR_OUTPUT_END, /**< Temporary used to enable wait for OUTPUT_END. 1 = Wait for output end, 0 = Disable */ +#endif + /* Special effects */ + GFISP_ATTR_ENABLE_EMBOSS, /**< Switch for emboss special effect. 1 = Enable emboss special effect, 0 = Disable */ + GFISP_ATTR_ENABLE_SOLARIZE, /**< Switch for solarize special effect. 1 = Enable solarize special effect, 0 = Disable */ + GFISP_ATTR_ENABLE_SEPIA, /**< Switch for sepia special effect. 1 = Enable sepia special effect, 0 = Disable */ + GFISP_ATTR_ENABLE_MONOCHROME, /**< Switch for monochrome special effect. 1 = Enable monochrome special effect, 0 = Disable */ + /* Video settings */ + GFISP_ATTR_CONTRAST, /**< Contrast control. Acts as offset for Y data. Range is [0, 128]. */ + GFISP_ATTR_BRIGHTNESS, /**< Brightness control. Modifies slope of Y data. Range is [0, 256]. */ + GFISP_ATTR_HUE, /**< Hue control. Modifies slope of UV data. Range is [0, 128]. */ + GFISP_ATTR_SATURATION_U, /**< Hue control. Modifies slope of UV data. Range is [0, 256]. */ + GFISP_ATTR_SATURATION_V, /**< Hue control. Modifies slope of UV data. Range is [0, 256]. */ + /* Software 3A control */ + GFISP_ATTR_ENABLE_3A_AE, /**< Switch for software auto exposure. 1 = Enable auto exposure and disable sensor exposure, 0 = Disable */ + GFISP_ATTR_ENABLE_3A_AWB, /**< Switch for software auto white balance. 1 = Enable auto white balance and disable sensor exposure, 0 = Disable */ + GFISP_ATTR_ENABLE_3A_AF, /**< Switch for software auto focus. 1 = Enable auto focus and disable sensor auto focus, 0 = Disable */ + + GFISP_ATTR_ENABLE_SENSOR_AE, /**< Switch for sensor auto exposure. 1 = Enable sensor auto exposure and disable software expoture, 0 = Disable */ + GFISP_ATTR_ENABLE_SENSOR_AWB, /**< Switch for sensor auto white balance. 1 = Enable sensor auto white balance and disable software white balance, 0 = Disable */ + GFISP_ATTR_ENABLE_SENSOR_AF, /**< Switch for sensor auto focus. 1 = Enable sensor auto focus and disable software auto focus, 0 = Disable */ + GFISP_ATTR_ENABLE_AUTO_CC_VIVIDITY /**< Flag for auto vividity. 1 = Enable auto vividity, 0 = Disable auto vividity*/ +} GFISPATTRIBUTES; + + +/** Definition of parameter ids and data structures for #GFISPGetParameter and #GFISPSetParameter. +*/ +typedef enum _GFISPPARAMETERS { + GFISP_PARA_TIMING, /**< Get/Set timing parameters. @see GFISPIMGTIMING */ + GFISP_PARA_M1WINDOW, /**< Get/Set M1 statistics parameters. @see GFISPM1WINDOW */ + GFISP_PARA_M2WINDOW, /**< Get/Set M2 statistics parameters. @see GFISPM2WINDOW */ + GFISP_PARA_M3WINDOW, /**< Get/Set M3 statistics parameters. @see GFISPM3WINDOW */ + GFISP_PARA_M4WINDOW, /**< Get/Set M4 statistics parameters. @see GFISPM4WINDOW */ + GFISP_PARA_OB, /**< Get/Set optical black parameters. @see GFISPOBCONTROL */ + GFISP_PARA_DEKNEE, /**< Get/Set deknee parameters. @see GFISPDEKNEECONTROL */ + GFISP_PARA_LENSSHADING, /**< Get/Set lens shading parameters. @see GFISPLENSSHADING */ + GFISP_PARA_WB, /**< Get/Set white balance parameters. @see GFISPWBCONTROL */ + GFISP_PARA_DEMOSAIC, /**< Get/Set demosaic parameters. @see GFISPDEMOSAICCONTROL */ + GFISP_PARA_EDGEENHANCE, /**< Get/Set edge enhancement parameters. @see GFISPEDGEENHANCECONTROL */ + GFISP_PARA_NOISECONTROL1, /**< Get/Set noise control 1 parameters. @see GFISPNOISECONTROL1 */ + GFISP_PARA_NOISECONTROL2, /**< Get/Set noise control 2 parameters. @see GFISPNOISECONTROL2 */ + GFISP_PARA_BADPIXEL, /**< Get/Set bad pixel parameters. @see GFISPBADPIXELCONTROL */ + GFISP_PARA_COLORCORRECT, /**< Get/Set color correction parameters. @see GFISPCOLORCORRECTION */ + GFISP_PARA_GAMMACORRECT, /**< Get/Set gamma correction parameters. @see GFISPGAMMACONTROL */ + GFISP_PARA_YUVCONVERT, /**< Get/Set YUV conversion parameters. @see GFISPYUVCONVERSION */ + GFISP_PARA_SETMODE, /**< Get/Set ISP mode as specified in script. @see GFISPSETMODE */ + GFISP_PARA_3A_AE, /**< Get/Set 3A AE parameters. @see GFISP3AAE */ + GFISP_PARA_3A_AWB, /**< Get/Set 3A AWB parameters. @see GFISP3AAWB */ + GFISP_PARA_3A_AF , /**< Get/Set 3A AF parameters. @see GFISP3AAF */ + GFISP_PARA_3A_PREV_MODE_AWB, + GFISP_PARA_3A_AWB_SAT_Y_LIMITS, + GFISP_PARA_3A_FRAME_RATE_LOW_LIMIT, + GFISP_PARA_3A_FRAME_RATE_HIGH_LIMIT, + GFISP_PARA_3A_FRAME_RATE_CHOICE, + GFISP_PARA_ISO_SENSITIVITY, /**< Get/Set ISO Sensitivity for 3AAE. */ + GFISP_PARA_REDUCE_GAIN_COMPRESS_GAMMA, /**< Reduce/Restore sensor gain and compensate gain change through Gamma curve Compression/Restoration. + To be used only with SetParameter fn. @see GFISPGAINGAMMACTRL */ + GFISP_PARA_IMAGE_STABILIZATION, /**< Set Image Stabilization. 1 = Enable Image Stabilization, 0 = Disable */ + GFISP_PARA_EXPOSURE_CONTROL, /**< Get/Set exposure control parameters. @see GFISPEXPOSURECONTROL */ + GFISP_PARA_EXPOSURE, /**< Get/Set exposure manually. @see GFISPMANUALEXPOSURE */ + GFISP_ISP_SENSOR_CAPABILITY, /**< ISP 3A Capability >*/ + GFISP_PARA_SENSOR_REGISTER /**< SENSOR Register Read wrtie parameter>*/ + +} GFISPPARAMETERS; + +/** Number of fractional bits of fixed point parameters. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_FIXEDPOINTPARAMETER_FBITS 8 +/** Total number of bits of fixed point parameters. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_FIXEDPOINTPARAMETER_BITS 16 +/** Macro to convert floating point to fixed point. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_CONVERT_FLOAT_TO_FIXED_SIGNED(x) ((NvS16)(x * (2 << GFISP_FIXEDPOINTPARAMETER_FBITS))) +/** Macro to convert floating point to fixed point. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_CONVERT_FLOAT_TO_FIXED_UNSIGNED(x) ((NvU16)(x * (2 << GFISP_FIXEDPOINTPARAMETER_FBITS))) +/** Macro to convert fixed point to floating point. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_CONVERT_FIXED_TO_FLOAT(x) (((float)x) / (2 << GFISP_FIXEDPOINTPARAMETER_FBITS)) + + +/** Enum for which pixel of the R, G, G, B pattern the active frame starts on. + @see GFISPIMGTIMING +*/ +typedef enum +{ + GFISP_RGGB = 0, + GFISP_GRBG = 1, + GFISP_GBRG = 2, + GFISP_BGGR = 3 +} GFISP_BAYERPATTERN_SEL; + +/** Timing Generator Control. + + Whole timing frame consists of scanned part and idle parts (void periods in between lines + and frames). Overall scanned image frame is specified by H_SCAN_SIZE and V_SCAN_SIZE which + includes H and V blank periods. Line and pixel counters are set to 1 at transitions of active + edge of V and H sync input pulses. Note that coordinate in the whole frame starts with + (1,1) instead of (0,0). + + In horizotal direction, H sync active edge indicates start of scan line and it initiates + pixel count from 1 to H_SCAN_SIZE (end of line). After H_SCAN_SIZE pixels are received, + the ISP module goes into void period, in which it waits for next arrival of H sync active + edge. In practice, H blank period is composed of inactive period during H_SCAN SIZE and the + void period in between end of line and start next line. + + Same applies to vertical direction. + + Active part (non-blanking part) consists of "optical black" lines at top and bottom of the + image frame and left and right of image line, and active lines with active pixels in the + middle. + + @see GFISPGetParameter, GFISPSetParameter +*/ +typedef struct _GFISPIMGTIMING +{ + NvU16 hScanSize, /**< Number of pixel clock periods per scan line (including H blanking). */ + vScanSize; /**< Number of line periods per scan frame (including V blanking). */ + NvU8 hSyncEdge, /**< Active edge selection for horizontal sync. 0 = positive transition, 1 = negative transition. */ + vSyncEdge; /**< Active edge selection for vertical sync. 0 = positive transition, 1 = negative transition. */ + GFISP_BAYERPATTERN_SEL bayerSel; /**< Bayer timing format. Specifies which pixel of the R, G, G, B pattern the active frame starts on. */ + + GFRECT ActiveRect; /**< Active image area. */ + GFRECT OutputRect; /**< Output image area. */ +} GFISPIMGTIMING, *PGFISPIMGTIMING; + + +/** Enum for the number of samples to take across the M1 statistics window. + @see GFISPM1WINDOW +*/ +typedef enum +{ + GFISP_M1SAMPLE32 = 0, + GFISP_M1SAMPLE64 = 1 +} GFISP_M1_SAMPLE_SEL; + +/** M1 statistics window control. + + The GFISPAPI provides four methods that programmers can use to gather + statistics on pixel values. Based on the values, the programmer can take + appropriate compensating action as needed. The four methods are M1 + Window, M2 Window, M3 Window, and M4 Window. + + This structure describes the M1 Window method, which measures average/ + peak pixel values inside the specified area. It returns eight values—four + values (RGGB) represent average pixels, and four values represent peak + pixels. The measurement result can be used for white balance, either + automatically by AWB or manually by the programmer. + + Refer to the function #GFISPReadMWindowValues() for reading the + measured values. + + @see GFISPGetParameter, GFISPSetParameter, GFISPReadMWindowValues +*/ +typedef struct _GFISPM1WINDOW +{ + GFRECT M1WindowRect; /**< M1 Window size/position. */ + GFISP_M1_SAMPLE_SEL horzSampSel, /**< Horizontal sample density. */ + vertSampSel; /**< Vertical sample density. */ + NvU16 PeakMax; /**< Maximum limit of peak detection. */ + NvU16 TemporalFilterStrength; /**< Selects temporal filter coefficients. Valid range is [0-7]. Value 0 effectively turns off temporal filter. */ +} GFISPM1WINDOW, *PGFISPM1WINDOW; + + +/** M2 statistics window control. + + The GFISPAPI provides four methods that programmers can use to gather + statistics on pixel values. Based on the values, the programmer can take + appropriate compensating action as needed. The four methods are M1 + Window, M2 Window, M3 Window, and M4 Window. + + This structure describes the M2 Window method for gathering statistics on + pixel values. The M2 Window method measures the number of pixels at + specified ranges inside a specified area. A histogram with four bins is + generated. + + Refer to the function #GFISPReadMWindowValues() for reading the + measured values. + + @see GFISPGetParameter, GFISPSetParameter, GFISPReadMWindowValues, GFISP_ATTR_ENABLE_M2 +*/ +typedef struct _GFISPM2WINDOW +{ + GFRECT M2WindowRect; /**< M2 Window size/pos. */ + NvU16 HistBinL1, /**< Cut point of 1st bin. */ + HistBinL2, /**< Cut point of 2nd bin. */ + HistBinL3; /**< Cut point of 3rd bin. */ + NvU16 reserved; +} GFISPM2WINDOW, *PGFISPM2WINDOW; + + +/** M3 statistics window control. + + The GFISPAPI provides four methods that programmers can use to gather + statistics on pixel values. Based on the values, the programmer can take + appropriate compensating action as needed. The four methods are M1 + Window, M2 Window, M3 Window, and M4 Window. + + This structure describes the M3 Window method for gathering statistics on + pixel values, The M3 Window method generates a group of pixel samples + from the specified area. Each sub-window generates one 32-bit value. + + The horizontal interval of M3 sub-windows is derived from M3 window + line width divided by M3 window horizontal count, rounded down. + + The vertical interval of M3 sub-windows is derived from M3 window + frame height divided by M3 window vertical count, rounded down. + + Refer to the function #GFISPReadMWindowValues() for reading the + measured values. + + @see GFISPGetParameter, GFISPSetParameter, GFISPReadMWindowValues, GFISP_ATTR_ENABLE_M3 +*/ +typedef struct _GFISPM3WINDOW +{ + GFRECT M3WindowRect; /**< M3 Window size/pos. */ + NvU8 SubWindowCountH, /**< Number of sub-windows in horizontal direction. Can be {16,32,64}. */ + SubWindowCountV; /**< Number of sub-windows in vertical direction. Can be {16,32,64}. */ + NvU16 SubWindowWidth, /**< Width of sub-windows. Can be {2,4,8,16,32}. */ + SubWindowHeight; /**< Height of sub-windows. Can be {2,4,8,16,32}. */ + NvU16 reserved; +} GFISPM3WINDOW, *PGFISPM3WINDOW; + + +/** M4 statistics window control. + + The GFISPAPI provides four methods that programmers can use to gather + statistics on pixel values. Based on the values, the programmer can take + appropriate compensating action as needed. The four methods are M1 + Window, M2 Window, M3 Window, and M4 Window. + + This structure describes the M4 Window method for gathering statistics on + pixel values. The M4 Window method takes statistical measurements for + auto-focus control. It generates two values for each sub-window. One value + represents the high frequency factor inside the sub-window. The other value + represents sub-window luminance. + + There are {1, 2, 3, 4, 6, 9} sub-windows in {1,2,3}x{1,2,3} configurations. + + SC15 implementation has the following constraints + * SubWindowintervalH >= SubWindowWidth + * SubWindowintervalV >= SubWindowHeight + + Refer to the function #GFISPReadMWindowValues() for reading the + measured values. + + @see GFISPGetParameter, GFISPSetParameter, GFISPReadMWindowValues, GFISP_ATTR_ENABLE_M4 +*/ +typedef struct _GFISPM4WINDOW +{ + NvU32 Left, /**< Specifies left of first M4 sub-window. */ + Top; /**< Specifies top of first M4 sub-window. */ + NvU8 SubWindowCountH, /**< Specifies the number of sub-windows in the horizontal direction. Can be {1,2,3}. */ + SubWindowCountV; /**< Specifies the number of sub-windows in the vertical direction. Can be {1,2,3}. */ + NvU16 SubWindowWidth, /**< Specifies the width of each sub-window. */ + SubWindowHeight; /**< Specifies the height of each sub-window. */ + NvU16 SubWindowIntervalH, /**< Specifies the horizontal interval of sub-windows. */ + SubWindowIntervalV; /**< Specifies the vertical interval of sub-windows. */ + NvU8 CoreLimit; /**< Top limit of noise coring for M4 statistics gathering. Valid range is [0-63]. */ + NvU8 reserved; +} GFISPM4WINDOW, *PGFISPM4WINDOW; + + +/** Enum for the Optical Black Mode. + @see GFISPOBCONTROL +*/ +typedef enum +{ + OB_MODE_FRAME = 0, + OB_MODE_AVG_FRAME_LINE = 1, + OB_MODE_LINE = 2 +} GFISP_OB_MODE_SEL; + + +/** Optical black control. + + The very first ISP operation to be applied to the input pixel signal is to + establish "black" level. This anchors signal activities to a black reference level, + or "zero" level. + + There are two methods of accomplishing optical blacking. One method is + performed on each frame and is called Frame-based Optical Blacking (FOB). + The other method is performed on each scan line and is called Line-based + Optical Blacking (LOB). + + Under FOB, optical black level can be established in one of two ways--by + setting it manually, or more commonly by letting the ISP measure it + automatically. In the automatic method the user can specify black regions + which surround the active imaging area. The pixel levels from these regions + are used to determine the input signal level of reference black, which is + mapped to "zero" level in the subsequent pixel processing. + + LOB is applied to each scan line and is used to detect and compensate for + fluctuations in the imager input signal level of reference black. + + The user can choose to use either FOB, or LOB, or both. + + Four optical black regions are defined through 16 coordinates. + + If ISP's OB capability is GFISP_CAP_THREE_OB_REGIONS, then: + - Only six of the 16 OB coordinates are used: + - OBTopRegionStartV, OBTopRegionHeight, + - OBLeftRegionStartH, OBLeftRegionWidth, + - OBBottomRegionStartV, OBBottomRegionHeight + - Right OB region is not supported. + - Top region width is assumed equal to input width. + - Left region height is assumed equal to input height. + - Bottom region width is assumed equal to input width. + - Bottom region is only used if GFISP_ATTR_ENABLE_FOB_SELFRESET is disabled. + + If ISP's OB capability is GFISP_CAP_FOUR_OB_REGIONS, then all sixteen + OB coordinates are used. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_FOB, GFISP_ATTR_ENABLE_FOB_SELFRESET, GFISP_ATTR_ENABLE_FOB_TEMPORAL, GFISP_ATTR_ENABLE_MANUALOB, GFISP_ATTR_ENABLE_LOB +*/ +typedef struct _GFISPOBCONTROL +{ + NvU32 OBTopRegionStartV, OBTopRegionHeight, OBTopRegionStartH, OBTopRegionWidth; + NvU32 OBBottomRegionStartV, OBBottomRegionHeight, OBBottomRegionStartH, OBBottomRegionWidth; + NvU32 OBLeftRegionStartV, OBLeftRegionHeight, OBLeftRegionStartH, OBLeftRegionWidth; + NvU32 OBRightRegionStartV, OBRightRegionHeight, OBRightRegionStartH, OBRightRegionWidth; + + NvU8 FOBCoef; /**< Filter coefficient of FOB acquisition. Valid range is [0-15]. */ + NvU8 TOBCoef; /**< Temporal filter coefficient of FOB temporal filter. Valid range is [0-15]. */ + + NvU8 LOBWidth; /**< Width used for LOB. Valid values are {2, 4, 8}. */ + + NvU8 FOBAdjust; /**< Manual adjustment applied to the black level. Valid range is [0, 63]. */ + GFISP_OB_MODE_SEL OBMode; /**< Optical black mode vales {frame, avg of frame + line, line } */ +} GFISPOBCONTROL, *PGFISPOBCONTROL; + + +/** This structure describes one approximated linear segment for deknee. + @see GFISPDEKNEECONTROL +*/ +typedef struct _GFISPDEKNEEENTRY +{ + NvU16 start; /**< Start of a range. */ + NvU16 slope; /**< Slope of the linear. Unsigned fixed point format. Valid range is [0, 3 63/64] with precision of 1/64. */ +} GFISPDEKNEEENTRY, *PGFISPDEKNEEENTRY; + +/** Deknee control. + + Imagers tend to show some degree of non-linearity in their light-to-electric + transfer characteristics. Deknee unit attempts to improve the linearity. + + NVIDIA ISP implements Deknee as a piece-wise linear approximation of up + to 16 segments. + + This structure describes the start and slope values for the Deknee look-up + table. The caller may choose to divide the table into 4, 8, or 16 linear segments + (4, 8, or 16 entries in the table). + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_DEKNEE +*/ +typedef struct _GFISPDEKNEECONTROL +{ + NvU32 nEntries; /**< Number of entries in the pEntry table. Valid values are {4,8,16}. */ + GFISPDEKNEEENTRY *pEntries; /**< Deknee entry table. */ +} GFISPDEKNEECONTROL, *PGFISPDEKNEECONTROL; + + +/** Lens shading compensation control. + + An optical lens in front of the imager tends to introduce shading and + unevenness in the strength of incident light. It is strongest at the center and + diminishes as the distance from the center increases. Actual shading + characteristics vary depending on the choice of optics. + + This structure describes a method for compensating for this shading by + applying varying levels of gain to the pixel signal in the reverse function of + the shading. + + The GFISPAPI implements this as a second degree quadratic equation for + each color component at H and V: + + F = 1 + X * (Coef1 + Coef2 *X) + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_LENS_SHADING +*/ +typedef struct _GFISPLENSHADING +{ + NvU16 hCenter, /**< Horizontal center point of camera lens. */ + vCenter; /**< Vertical center point of camera lens. */ + + NvU16 rHorzCoef1, /**< First order coefficient for Horizontal Red. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + rHorzCoef2; /**< Second order coefficient for Horizontal Red. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 rVertCoef1, /**< First order coefficient for Vertical Red. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + rVertCoef2; /**< Second order coefficient for Vertical Red. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 gHorzCoef1, /**< First order coefficient for Horizontal Green. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + gHorzCoef2; /**< Second order coefficient for Horizontal Green. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 gVertCoef1, /**< First order coefficient for Vertical Green. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + gVertCoef2; /**< Second order coefficient for Vertical Green. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 bHorzCoef1, /**< First order coefficient for Horizontal Blue. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + bHorzCoef2; /**< Second order coefficient for Horizontal Blue. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 bVertCoef1, /**< First order coefficient for Vertical Blue. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + bVertCoef2; /**< Second order coefficient for Vertical Blue. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ +} GFISPLENSSHADING, *PGFISPLENSSHADING; + + + +/** White balance control. + + White Values + + RGB component signal levels are balanced to render white objects as white. + This is a normalization step of electronic signal of RGB color primaries. + Depending on the "color temperature" of the white reference, the relative + strength of RGB tri-stimulus values vary. In the electric signal, ER/EG/EB + corresponding to the RGB tri-stimulus values are normalized so that white (of + 100% strength) is represented by ER = EG = EB = 1. The original image in front + of the imager is reproduced only when a display device does precise reverse + conversion, which is a purely ideal case. Otherwise, the original image is + rendered in different shades of colors depending on the reference white for + which the display device is tuned. + + Gray Values + + RGB pixel values that represent "gray" objects may be obtained in various + ways. For example, a picture frame can be filled with a "white" object, or + average values for a large number of pixels can be calculated, or a set of + average values collected in many sampling spotscan be used to represent the + approximated "gray" object. + + Gain Factors and White Balance + + Digital gain values are dedicated to each of the four color channels (R, Gr, Gb, + B). + + Depending on how to set gain factors, there are two ways to use White + Balance. A commonly used method is called Dynamic WB, or AWB. Under + AWB, gain values are updated automatically by ISP internal AWB control + based on the average values and peak values in {R, G1, G2, B} color channels. + Refer to #GFISP_PARA_M1WINDOW. + + - If the frame exposure is high ("Top" level, controlled by ThresholdT2M/ + ThresholdM2T), gains are calculated from the average RGrGbB values. + - If the frame exposure is low ("Bottom" level, controlled by + ThresholdM2B/ThresholdB2M), gains are calculated from peak + RGrGbB values. + - If the frame exposure is in the middle range, gains are calculated from + both average and peak values. + + Under AWB, the user can send a command to freeze the current gain value by + setting GFISP_ATTR_AWB_HOLD to 1. Then the current AWB gain value is + applied to all future frames. + + The other method is called pre-programmed WB or Static WB. It sets preprogrammed + gain values and applies them all time. Under this mode, the + programmer determines the proper gain values based on the M1/M3 + measurement window output. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_WB, GFISP_ATTR_ENABLE_AWB, + GFISP_ATTR_AWB_HOLD, GFISPM1WINDOW +*/ +typedef struct _GFISPWBCONTROL +{ + // Static WB. + NvU16 RGain, /**< Static gain factor for Red. Only effective when GFISP_ATTR_ENABLE_AWB==0. */ + GrGain, /**< Static gain factor for Green on Red. Only effective when GFISP_ATTR_ENABLE_AWB==0. */ + BGain, /**< Static gain factor for Blue. Only effective when GFISP_ATTR_ENABLE_AWB==0. */ + GbGain; /**< Static gain factor for Green on Blue. Only effective when GFISP_ATTR_ENABLE_AWB==0. */ + + // Both statis and auto WB. + NvU16 TopClipLimit; /**< Lower limit of gain based clipping. Effective for both Static WB and Auto WB. Value 0 effectively turns off Top-clipping. */ + + // Auto WB. + NvU16 PeakRef; /**< White reference level for gain adjustment. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + + NvU16 RGainMax, RGainMin; /**< Max/Min Gain factor for Red. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + NvU16 GGainMax, GGainMin; /**< Max/Min Gain factor for Green. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + NvU16 BGainMax, BGainMin; /**< Max/Min Gain factor for Blue. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + + NvU16 ThresholdT2M, /**< Top-to-Middle transition level. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + ThresholdM2T, /**< Middle-to-Top transition level. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + ThresholdM2B, /**< Middle-to-Bottom transition level. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + ThresholdB2M; /**< Bottom-to-Middle transition level. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + +} GFISPWBCONTROL, *PGFISPWBCONTROL; + + +/** Demosaic mode enum for #GFISPDEMOSAICCONTROL. +*/ +typedef enum +{ + GFISP_DM3X3 = 0, // 3x3 one-shot demosaicing + GFISP_DM3X3BPNR = 1, // 3x3 demosaicing/bad-pixel/noise-reduction + GFISP_DM5X5 = 2, // 5x5 one-shot demosaicing + GFISP_DM5X5BP = 3, // 5x5 demosaicing/bad-pixel + GFISP_DM5X5BPNR = 4 // 5x5 demosaicing/bad-pixel/noise-reduction +} GFISP_DEMOSAIC_MODE_SEL; + +/** Demosaic control. + + This structure controls the demosaic process, which uses 2D interpolation to + convert Bayer format R/G/B pixel signals obtained from the imager to + generate R/G/B component values. + + Under the SC15 hardware implementation, the Demosaic unit is built with + bad pixel (BP) and noise reduction (NR) control inside, so picking demosaic + mode affects bad pixel and noise reduction control. Unless limited by + memory bandwidth, programmers should always pick BPNR modes. Otherwise, BP + and NR features are not available, even if you try to turn on BP or NR + controls with GFISPSetAttribute(). + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_DEMOSAIC, + GFISPBADPIXELCONTROL, GFISPNOISECONTROL1 +*/ +typedef struct _GFISPDEMOSAICCONTROL +{ + GFISP_DEMOSAIC_MODE_SEL DemosaicMode; /**< Demosaic mode selection. */ +} GFISPDEMOSAICCONTROL, *PGFISPDEMOSAICCONTROL; + + +/** Coring limit scaling selection enum for #GFISPEDGEENHANCECONTROL. */ +typedef enum +{ + GFISP_GCLIMIT_SCALE_4 = 0, // range [1,4.5] + GFISP_GCLIMIT_SCALE_8 = 1, // range [1,8.5] + GFISP_GCLIMIT_SCALE_16= 2, // range [1,16.5] + GFISP_GCLIMIT_SCALE_32= 3 // range [1,32.5] +} GFISP_GCORINGLIMIT_SCALE_SEL; + +/** Edge enhancement control. + + This structure controls the edge enhancement process, accomplished by the + following: + -# Extracting the high frequency component (HF) of the pixel + -# Amplifying HF if the extracted value is "large" (that is, coring) + -# Adding the amplified HF back to the Y channel of the pixel. + + In the SC15 implementation, edge enhancement control resides in the + Demosaic unit. It is effective only if DM3X3BPNR, DM5X5NR, or DM5X5BPNR + demosaic mode is selected. The threshold that's used for coring is not a predetermined + fixed value, but instead is adaptive depending on the brightness + level. If the pixel surround is bright (more visible), the coring threshold will + be larger, which means only stronger edges are enhanced. Weaker edges are + considered more noise-prone and therefore are not enhanced. + + Two control parameters are used to determine the adaptive coring threshold: + GCoringLimit and GCoreScaleSel. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_EDGE_ENHANCE +*/ +typedef struct _GFISPEDGEENHANCECONTROL +{ + NvU16 StrengthLevel; /**< How heavily the edge enhancement is applied. Unsigned fixed-point format. Valid range is [0, 3 7/8] with a precision of 1/8, plus [4, 15 1/2] with a precision of 1/2. */ + + NvU16 GCoringLimit; /**< Minimum coring level. The coring level increases when the pixel's surrounding brightness level goes up. Valid range is [0-63]. */ + GFISP_GCORINGLIMIT_SCALE_SEL GCoringScaleSel; /**< Scaling factor of GCoringLimit. Specifies the influence of the brightness level to the coring level. The higher the GCoreScaleSel is, the larger the coring level grows under the same brightness. */ +} GFISPEDGEENHANCECONTROL, *PGFISPEDGEENHANCECONTROL; + + +/** Noise Reduction 1 control. + + There are two noise reduction functions in ISP datapath: + -# 3D noise reduction + -# False color reduction + + GFISPNOISECONTROL1 applies to the first method. + It resides in Demosaic unit along with edge enhancement. It is effective + only if DM3X3BPNR, DM5X5NR, or DM5X5BPNR demosaic mode is selected. + + This method reduces noise not only in the image plane but also in the + intensity domain. In other words, low pass filtering is applied to pixels that + have a similar pixel value and are also close to the same location. + FilterStrengthLevel defines the filter kernel size on the intensity + domain. Larger FilterStrengthLevel generates a smoother but blurry + image. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_NOISE_CONTROL1 +*/ +typedef struct _GFISPNOISECONTROL1 +{ + NvU16 FilterStrengthLevel; /**< Weighted average scaling factor. Valid range is [0,7]. */ +} GFISPNOISECONTROL1, *PGFISPNOISECONTROL1; + + +/** Noise Reduction 2 control. + + There are two noise reduction functions in ISP datapath: + -# 3D noise reduction + -# False color reduction + + GFISPNOISECONTROL2 applies to the second method. + It resides in color correction unit. + + This method reduces the colorfulness of pixels at shadow region or at edges + to de-emphasize color noise and color aliasing effects. HighLimit and + TransitionWidth specify the pixels that will undergo the color reduction. + If the luminance level of the pixel is larger than (HighLimit + + TransitionWidth), the pixel's colorfulness is intact. If the luminance level + is smaller than HighLimit, the colorfulness is reduced to a minimum (i.e., no + color correction is applied). Pixels with luminance levels between these limits + pass through an intermediate colorfulness reduction factor. CCScaleFactor + specifies how much color reduction should be applied at edge pixels. Larger + CCScaleFactor creates a more noticeable color reduction at the edges. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_NOISE_CONTROL2 +*/ +typedef struct _GFISPNOISECONTROL2 +{ + NvU16 HighLimit; /**< Upper-limit level of noise reduction curve. */ + NvU16 TransitionWidth; /**< Width of noise reduction curve. Valid values are {16, 32, 64, 128}. */ + NvU16 CCScaleFactor; /**< Slope of noise reduction curve. Unsigned fixed point format. Valid range is [0, 31]. */ +} GFISPNOISECONTROL2, *PGFISPNOISECONTROL2; + + + +/** Bad pixel control. + + This structure controls a method to conceal bad pixels. + + The process resides in the Demosaic unit along with edge enhancement + and noise control 1. It is effective only if DM3X3BPNR or DM5X5BPNR demosaic + mode is selected. + + If a pixel value deviates greatly from its surrounding pixels, the pixel is + considered to be a bad pixel. The deviation is defined in terms of the + percentage of the average value of the surrounding pixels. + + Two ratio coefficients are used: + - If the pixel is within a flat area, LowCoef is used, + - If the pixel is at an edge region, UpCoef is used. + If the average of the surrounding pixels is lower than DarkLevel, it is + considered to be at a shadow region, and DarkLevel instead of the average + value will be used to calculate the deviation threshold. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_BAD_PIXEL +*/ +typedef struct _GFISPBADPIXELCONTROL +{ + NvU16 DarkLevel; /**< Bad-pixel dark level. */ + NvU16 UpCoef, /**< Coefficient for upper threshold. Unsigned fixed point format. Valid range is [0, 1 7/8] with precision of 1/8. */ + LowCoef; /**< Coefficient for lower threshold. Unsigned fixed point format. Valid range is [0, 1 7/8] with precision of 1/8. */ +} GFISPBADPIXELCONTROL, *PGFISPBADPIXELCONTROL; + + +/** Color correction control. + + This structure controls the color correction process. + + In a strict sense, the color correction module transforms a given color space + (based on the optical characteristics of the imager) to a specific color space + such as described by the CCIR 601 standard. The color component signals are + then handled according to that standard color space from that point on. + + For high-end cameras, color correction is used to match some sensitive colors + such as flesh tone to a desired shade of colors, and is handled primarily by + experts who know what they are doing. + + In practice, there may be a simpler means with fewer control parameters, + where the color shade of images is adjusted to suit the viewer's taste. So, gain + and offset of R, G, and B pixels are individually adjusted. + + GFISP color correction consists of 3x3 matrix factors for the camera RGB + (cRGB) to standard RGB (sRGB) conversion. Subjective adjustment of color + can also be included. + - Coefficients on the main diagonal are unsigned. Valid range is [0, 7 255/256]. + - Off-diagonal coefficients are unsigned. Valid range is [-7 255/256, 7 255/256]. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_COLOR_CORRECTION +*/ +typedef struct _GFISPCOLORCORRECTION +{ + NvU16 R2R; /**< Red-to-red coefficient. Unsigned fixed point format. Valid range is [0, 7 255/256]. */ + NvS16 R2G; /**< Red-to-green coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvS16 R2B; /**< Red-to-blue coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvS16 G2R; /**< Green-to-red coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvU16 G2G; /**< Green-to-green coefficient. Unsigned fixed point format. Valid range is [0, 7 255/256]. */ + NvS16 G2B; /**< Green-to-blue coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvS16 B2R; /**< Blue-to-red coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvS16 B2G; /**< Blue-to-green coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvU16 B2B; /**< Blue-to-blue coefficient. Unsigned fixed point format. Valid range is [0, 7 255/256]. */ + NvS16 Vividity; /**< Multiplier to boost the diagonal elements. Signed fixed point format. Valid Range [-64/256, 64/256]. */ + NvS16 VividityScaleFactor; /**< Multiplier to boost the diagonal elements. Signed fixed point format. Valid Range [-OffDiagona/64, OffDiagonal/64]. */ + NvU16 GainStart; /**< Starting Gain for Auto Vividity . */ + NvU16 GainEnd; /**< End Gain for Auto Vividity. */ +} GFISPCOLORCORRECTION, *PGFISPCOLORCORRECTION; + + +/** This structure describes one approximated linear segment for gamma. + @see GFISPGAMMACONTROL +*/ +typedef struct _GFISPGAMMAENTRY +{ + NvU16 inputStart; /**< Input start value of line segment. Valid range is [0, 1023]. */ + NvU16 outputStart; /**< Output start value of line segment. Valid range is [0, 255]. */ + NvS16 slope; /**< Slope of the line segment. Signed fixed point format. Valid range is [-7 63/64, 7 63/64]. */ + NvU16 reserved; +} GFISPGAMMAENTRY, *PGFISPGAMMAENTRY; + +/** Gamma correction control. + + This structure controls the gamma correction process. + + Gamma correction applies non-linear characteristics to compensate for the + non-linear characteristics of display devices such as cathode ray tubes driven + by R, G, B primary color signals. So, in a strict sense, this must be applied to + R, G, B signals. + + In SC15 implementation, gamma correction is approximated using up to 16 + line segments. Each line entry must be provided in ascending order (within + the input range). + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_GAMMA_CORRECTION +*/ +typedef struct _GFISPGAMMACONTROL +{ + NvU32 nEntries; /**< Number of entries in the pEntries table. Valid range is [1-16]. */ + GFISPGAMMAENTRY *pEntries; /**< Gamma entry table. */ +} GFISPGAMMACONTROL, *PGFISPGAMMACONTROL; + + +/** Y signal range selection enum for #GFISPYUVCONVERSION. +*/ +typedef enum +{ + GFISP_YRANGE_FULL = 0, /**< Range of [0,255]. */ + GFISP_YRANGE_NEARFULL = 1, /**< Rage of [1,254] (exclude 00 and FF). */ + GFISP_YRANGE_ITU601 = 2 /**< ITU601 standard. */ +} GFISP_YRANGE_SEL; + +/** RGB to YUV conversion control. + This structure controls the YUV conversion process, which converts RGB + color space to corresponding YUV color space, based on the 3x3 matrix. + + {Y, U, V} shall have offset values that are not shown in the formula above. +*/ +typedef struct _GFISPYUVCONVERSION +{ + GFISP_YRANGE_SEL YRangeSel; /**< YUV output signal range. */ + NvS16 YOff; /**< Y value offset. Valid range is [-128, 127]. */ + + // 3x3 YUV conversion matrix. + // G2Y is unsigned fixed point format. Valid range is [0, 1 255/256]. + // R2Y and B2Y are unsigned fixed point format. Valid range is [0, 255/256]. + // R2U, G2U, B2U, R2V, G2V, B2V are signed fixed point format. + // Valid range is [-255/256, 255/256]. + NvS16 R2Y; /**< Red-to-Y coefficient. Unsigned fixed point format. Valid range is [0, 255/256]. */ + NvS16 G2Y; /**< Green-to-Y coefficient. Unsigned fixed point format. Valid range is [0, 1 255/256]. */ + NvS16 B2Y; /**< Blue-to-Y coefficient. Unsigned fixed point format. Valid range is [0, 1 255/256]. */ + NvS16 R2U; /**< Red-to-U coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 G2U; /**< Green-to-U coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 B2U; /**< Blue-to-U coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 R2V; /**< Red-to-V coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 G2V; /**< Green-to-V coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 B2V; /**< Blue-to-V coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ +} GFISPYUVCONVERSION, *PGFISPYUVCONVERSION; + +/** Isp set mode + This structure set ISP parameters to the specified mode, as specidied in the ISP script. +*/ +typedef struct _GFISPSETMODE +{ + NvS32 Mode; /**< Mode number. */ +} GFISPSETMODE, *PGFISPSETMODE; + +/** 3A AE parameter + These enum contains 3A AE control parameters. +*/ + +typedef enum +{ + GFISP_AE_FRAME_CHOICE_FIXED = 0, /**< fixed frame rate. At lowlux AE will use only digital gain to increase brightness */ + GFISP_AE_FRAME_CHOICE_FLEXIBLE = 1 /**< At lowlux AE will increase frame height first (i.e., lower frame rate) to increase brightness Frame height is bounded by FrameHeight at GFISP_AE_SENSORINFO. */ +}GFISP_AE_FRAME_CHOICE; + +typedef enum +{ + GFISP_AE_METERING_CHOICE_EVALUATIVE = 0, /**< calculate luminance average by propriotary algorithm */ + GFISP_AE_METERING_CHOICE_SPOT = 1, /**< calculate luminance average from center window only */ + GFISP_AE_METERING_CHOICE_CENTER = 2, /**< GFISP_AE_METERING_CHOICE_CENTER: calculate luminance average from weighted sum of center window and whole frame */ + GFISP_AE_METERING_CHOICE_MATRIX = 3 /**< calculate luminance average from weighted sum of 3x3 sub-windows */ +}GFISP_AE_METERING_CHOICE; + +typedef enum +{ + GFISP_AE_ANTIFLICKER_CHOICE_50HZ = 0, /**< use AEStep_50Hz in GFISP_AE_SENSORINFO as exposure steps */ + GFISP_AE_ANTIFLICKER_CHOICE_60HZ = 1, /**< use AEStep_60Hz in GFISP_AE_SENSORINFO as exposure steps */ + GFISP_AE_ANTIFLICKER_CHOICE_MANUAL = 2, /**< use ManualAntiFlickerStep in GFISP_AE_CONTROL1 as exposure steps */ + GFISP_AE_ANTIFLICKER_CHOICE_AUTO = 3 /**< enable auto anti-flickering */ +}GFISP_AE_ANTIFLICKER_CHOICE; + +/** 3A AE parameter + This structure contains 3A AE parameters. +*/ +typedef struct _GFISP3AAE +{ + NvU16 AETarget; /**< [0..255]. Target average luminance value for AE convergence. Higher value renders brighter image. */ + NvU16 AEToleranceIn; /**< [0..255]. Convergence tolerance from AESTATE_OUT to AESTATE_IN */ + NvU16 AEToleranceOut; /**< [0..255]. Convergence tolerance from AESTATE_OUT to AESTATE_IN. Normally AEToleranceOut >= AEToleranceIn */ + GFISP_AE_FRAME_CHOICE FrameRateChoice; /**< GFISP_AE_FRAME_CHOICE */ + GFISP_AE_METERING_CHOICE MeteringChoice; /**< GFISP_AE_METERING_CHOICE */ + GFISP_AE_ANTIFLICKER_CHOICE AntiFlickerChoice; /**< GFISP_AE_ANTIFLICKER_CHOICE */ + NvU8 ConvergeSpeed; /**< [1..15]. AE convergence speed. 1 being the fastest (immediate update) */ + NvS32 Status; /**< 3A AE Status. Read only */ + + NvU32 ManualAntiFlickerStep; // manual exposure step. Used when AntiFlickerChoice=GFISP_AE_ANTIFLICKER_CHOICE_MANUAL + NvS32 CenterWeight, FrameWeight; // weights for MeteringChoice=GFISP_AE_METERING_CHOICE_CENTER + NvS32 Metering11, Metering12, Metering13,// weights for MeteringChoice=GFISP_AE_METERING_CHOICE_MATRIX + Metering21, Metering22, Metering23, + Metering31, Metering32, Metering33; + NvU16 AdditionalLumaIncreaseForFlatScene;// [0..255]. give final exposure additional increase if scene is flat. + NvU16 BacklightTbright; // [0..255]. Threshold for determining "bright regions" (for backlight checking) + NvU16 BacklightTdark; // [0..255]. Threshold for determining "dark regions" (for backlight checking) + NvU16 TOverexposed; // [0..255]. Threshold for determining overexposed condition. + NvU16 TDark; // [0..255]. Threshold for determining dark condition. + NvU8 AutoNoiseControl; /**< Auto Noise Control */ +} GFISP3AAE, *PGFISP3AAE; + +/* Exposure parameter USED for Manual Exposure and Gain settings +*/ +typedef struct _GFISPEXPOSURECONTROL +{ + NvU32 MaxFrameHeight; // longest exposure time allowed. >= DefaultFrameHeight, in unit + // of per scanline. + // For constant framerate application, set MaxFrameHeight=FrameHeight. + + NvU32 DefaultFrameHeight; // sensor's default time difference betwee two consecutive VSYNC pulses, + // in unit of per scanline. + NvU32 DefaultFrameHeightIS; // Limit the frame height corresponding to ET of 1/60 sec + + NvU16 MaxGain; // [1..128]. max digital gains allowed. Normally set to 2 (=200%) + // if anti-flickering is on. If larger sensitivity boost is needed + // at lowlux condition set MaxGain to higher value. + NvU16 MinGain; //Minimum Exposure Gain in ISP Format + + NvU16 MaxGainIS; // max digital gain allowed in the case of image stabilization + +}GFISPEXPOSURECONTROL, *PGFISPEXPOSURECONTROL; + +/* Manual Exposure and Gain settings +*/ +typedef struct _GFISPMANUALEXPOSURE +{ + NvU32 Exposure; // exposure time + NvU32 Gain; // digital gain +}GFISPMANUALEXPOSURE, *PGFISPMANUALEXPOSURE; + + +/** 3A AWB parameter + This structure contains 3A AWB parameters. +*/ + +typedef enum +{ + GFISP_AWB_WBMODE_CLOUDY = 0, /**<: for cloudy conditions (7,000K - 8,000K) */ + GFISP_AWB_WBMODE_SUNNY = 1, /**<: for sunny conditions (5,500K - 6,000K) */ + GFISP_AWB_WBMODE_FLASH = 2, /**<: for strobe or xenon flashes (~5,000K) */ + GFISP_AWB_WBMODE_FLUORESCENT = 3, /**<: for indoor office conditions (~3,000K) */ + GFISP_AWB_WBMODE_INCANDESCENT = 4, /**<: for indoor home conditions (~2,800K) */ +}GFISP_AWB_WBCUSTOM; + +typedef enum +{ + GFISP_AWB_COPLEXITY_HIGH = 0, /***/ + GFISP_AWB_COPLEXITY_MEDIUM = 1, /***/ + GFISP_AWB_COPLEXITY_LOW = 2 /***/ +}GFISP_AWB_COMPLEXITY; + +typedef struct _GFISP3AAWB +{ + NvU8 fWBCustom; // =0 when WB Custom Setting OFF + // =1 when WB Custom Setting ON + GFISP_AWB_WBCUSTOM WBCustomK; // Choose one of the defined illum class when fWBCustom=1 + // GFISP_AWB_WBMODE_CLOUDY = 0, /**<: for cloudy conditions (7,000K - 8,000K) */ + // GFISP_AWB_WBMODE_SUNNY = 1, /**<: for sunny conditions (5,500K - 6,000K) */ + // GFISP_AWB_WBMODE_FLASH = 2 /**<: for strobe or xenon flashes (~5,000K) */ + // GFISP_AWB_WBMODE_FLUORESCENT = 3, /**<: for indoor office conditions (~3,000K) */ + // GFISP_AWB_WBMODE_INCANDESCENT = 4, /**<: for indoor home conditions (~2,800K) */ + // Must be < NumWBCustom + + GFISP_AWB_COMPLEXITY ComplexityMode; + NvS8 WBShift; /**< Moves up or down illuminant class. For white balance bracketing. */ + /**< timing and stability control */ + NvU8 ConvergeSpeed; /**< [0..6], 6 being the fastest (immediate update) */ + NvU8 ToleranceIn; /**< [0..255], tolerance for convergence. */ + NvU8 ToleranceOut; /**< [0..255], threshold for triggering new AWB update. Normally ToleranceIn < ToleranceOut, and both toelrances are small (e.g., 5 to 10). */ + NvU32 FilterCoefficient; /**< [0-20] Filter coefficient used for scene change detection . */ + NvU32 M3FilterCoefficient; /**< [0-60] Filter coefficient used for temporal low pass filtering of M3 Buffer . */ + NvU32 UseM3LPFilter; /**< Flag for M3 Low Pass Filter. 1 = Enable LPF, 0 = Disable */ + NvU32 KXYCorrelation; /**< To be used for scene change detection. */ + + NvS32 Status; /**< 3A AWB Status. Read only */ +} GFISP3AAWB, *PGFISP3AAWB; + +typedef enum +{ + GFISP_AFSTATE_IN = 0, + GFISP_AFSTATE_OUT = 1, + GFISP_AFSTATE_INIT = 2 +}GFISP_AF_STATE; + +typedef enum +{ + GFISP_AF_TYPE_CENTER = 1, + GFISP_AF_TYPE_AUTO_EVALUATE = 2, + GFISP_AF_TYPE_FACE_PRIORITY = 3 +}GFISP_AF_TYPE; + +typedef enum +{ + GFISP_AF_MODE_CONTINUOUS = 0, + GFISP_AF_MODE_SINGLE = 1 +}GFISP_AF_MODE; + +/** 3A AF parameter + This structure contains 3A AF parameters. +*/ +typedef struct _GFISP3AAF +{ + GFISP_AF_STATE Status; /**< 3A AF Status. Read only */ + GFISP_AF_MODE Mode; + NvU8 Speed; + NvU8 LockTillAE; + NvU8 LockTillAWB; + NvU8 TakeSnapshot; +} GFISP3AAF, *PGFISP3AAF; + +/** ISP 3A Capability. +To get the 3A capability for a particular sensor. +*/ +typedef struct _GFISPSENSORCAPABILITY +{ + NvU8 AWBCapability; /***/ + NvU8 AECapability; /***/ + NvU8 AFCapability; /***/ + NvU8 ManualOBCapability; /***/ + NvU8 AutoOBCapability; /***/ +}GFISPSENSORCAPABILITY, *PGFISPSENSORCAPABILITY; + + + +typedef enum +{ + GFISP_SENSOR_I2C_8_BIT_REGISTER = 0, + GFISP_SENSOR_I2C_16_BIT_REGISTER = 1, +} REGISTERTYPE; + +typedef struct _GFISPSENSORRWREGISTER +{ + REGISTERTYPE RegisterType; //0: 8-bit register , 1: 16-bit register + NvU32 Addr; /**< Address : data read-write address>*/ + NvU32 Data; /**< Value of data at that address >*/ +}GFISPSENSORRWREGISTER, *PGFISPSENSORRWREGISTER; + +/** 3A algorithm type + These enum contains 3A algorithm type required for checking convergence. +*/ +typedef enum +{ + GFISP_CB_REGISTER_3A_AWB = 0, + GFISP_CB_REGISTER_3A_AE = 1, + GFISP_CB_REGISTER_3A_AF = 2 +} GFISP3ATYPE; + +/** Enabling or disabling the "gain reduction and gamma compression" property for reducing noise introduced due to high gain +* in case of Image Stabilization. +*/ +typedef enum +{ + GFISP_REDUCE_GAIN_COMPRESS_GAMMA_ON, + GFISP_REDUCE_GAIN_COMPRESS_GAMMA_OFF +} GFISPGAINGAMMACTRL; +/** Public exposed ISP API function table. See @ref groupIspFunctions. */ +typedef struct _GFISPTABLE +{ + GF_RETTYPE (* ISPGetProperty) ( GFIspHandle ISPHandle, PGFISPPROPERTY pIspProp ); + +#if defined(DVS_DEVELOPMENT) + GF_RETTYPE (* ISPSetup) ( GFIspHandle ISPHandle, GFVxHandle VxHandle, PGFCAMERARESOLUTIONTYPE pCameraResolution, GFVXBLT vxBlt ); +#else + GF_RETTYPE (* ISPSetup) ( GFIspHandle ISPHandle, PGFCAMERARESOLUTIONTYPE pCameraResolution ); +#endif + + GF_RETTYPE (* ISPSetResolution) ( GFIspHandle ISPHandle, PGFCAMERARESOLUTIONTYPE pCameraResolution ); + + GF_RETTYPE (* ISPGetAttribute) ( GFIspHandle ISPHandle, + GFISPATTRIBUTES aid, + NvU32 *attr); + GF_RETTYPE (* ISPSetAttribute) ( GFIspHandle ISPHandle, + GFISPATTRIBUTES aid, + NvU32 attr); + + GF_RETTYPE (* ISPSetAttributeToDefault) (GFIspHandle ISPHandle, GFISPATTRIBUTES aid); + + GF_RETTYPE (* ISPGetParameter) ( GFIspHandle ISPHandle, + GFISPPARAMETERS pid, + NvU32 *pSize, + void *pPara); + GF_RETTYPE (* ISPSetParameter) ( GFIspHandle ISPHandle, + GFISPPARAMETERS pid, + NvU32 size, + void *pPara); + + GF_RETTYPE (* ISPSetParameterToDefault) (GFIspHandle ISPHandle, GFISPPARAMETERS pid); + + GF_RETTYPE (* ISPTriggerMWindowGather) (GFIspHandle ISPHandle); + + GF_RETTYPE (* ISPReadMWindowValues) ( GFIspHandle ISPHandle, + NvS32 szM1Buffer, + NvU32 *pM1Buffer, + NvS32 szM2Buffer, + NvU32 *pM2Buffer, + NvS32 szM3Buffer, + NvU32 *pM3Buffer, + NvS32 szM4Buffer, + NvU32 *pM4Buffer); + + GF_RETTYPE (* ISPOEMScriptFunc) (GFIspHandle ISPHandle, + NvU32 ScriptFuncTag, + NvU32 size, + NvU32 *pBuffer); + + GF_RETTYPE (* ISP3APeriodicTrigger)(GFIspHandle ISPHandle); + + GF_RETTYPE (* ISPAeBracketingSetET) (NvS32 mode, NvU32 *pRetExposure, NvS32 *pRetGain); + + GF_RETTYPE (* ISPAwbBracketingSetIllum) (NvS32 mode, NvU16 *pRetCCT); + + GF_RETTYPE (* ISPRegister3ACallback) (GFIspHandle ISPHandle, GFISP3ATYPE type, void (*func)(void *), void *pParameter); + +} GFISPTABLE, *PGFISPTABLE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFIspOpen(GFRmHandle hRm, GFIspHandle *phIsp, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFIspClose(GFIspHandle *phIsp); + +/** @defgroup groupIspFunctions ISP Function macros + These function macros represent the function calls for GFISPAPI. +*/ +/*@{*/ + +/** Returns information about the GFISPAPI. + + @param handle Valid handle to GFISPAPI component. + @param pIspProp Pointer to a #GFISPPROPERTY struct. + For the sake of future expansion, the caller should put the size of + the structure into the #GFISPPROPERTY::size field; GFISPAPI will not + fill the structure beyond this size. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_SIZE_TOO_SMALL Error: size parameter is too small to fit even partial results. + + This function returns information about the GFISPAPI, including the + following: + - GFISPAPI module version + - ISP capability + - ISP limit parameters + It is good practice to use this function to query for the API version and + capabilities before using other GFISPAPI functions. + + @see GFISPPROPERTY, groupIspCapability +*/ +#define GFISPGetProperty( handle, pIspProp ) \ + ((PGFISPTABLE)handle)->ISPGetProperty( handle, pIspProp ) + +/** Sets up the ISP API for use with a particular camera. + + @param handle Valid handle to GFISPAPI component. + @param pCameraResolution Pointer to a #GFCAMERARESOLUTIONTYPE structure + with valid BayerInfo. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + + You must call GFISPGetProperty before calling any other ISP API functions, + with the exception of GFISPGetProperty. This function initializes ISP + to work with a particular resolution of camera. + +*/ +#if defined(DVS_DEVELOPMENT) +#define GFISPSetup( handle, vxhandle, pCameraResolution, vxBlt ) \ + ((PGFISPTABLE)handle)->ISPSetup( handle, vxhandle, pCameraResolution, vxBlt ) +#else +#define GFISPSetup( handle, pCameraResolution ) \ + ((PGFISPTABLE)handle)->ISPSetup( handle, pCameraResolution ) +#endif + +/** Resizes/repositions all windows based on resolution data. + + @param handle Valid handle to GFISPAPI component. + @param pCameraResolution Pointer to a #GFCAMERARESOLUTIONTYPE structure + with valid BayerInfo. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + This function resizes and repositions the windows for several ISP parameters + based on the provided BayerInfo struct. Affected parameters are: + - Timing + - M1-M4 statistics windows + - Optical black regions + - Lens shading center point + +*/ +#define GFISPSetResolution( handle, pCameraResolution ) \ + ((PGFISPTABLE)handle)->ISPSetResolution( handle, pCameraResolution ) + +/** Get an attribute of the GFISPAPI. + + @param handle Valid handle to GFISPAPI component. + @param aid Attribute ID. One of #GFISPATTRIBUTES enumeration type. + @param pAttrData Pointer to an #NvU32 to be filled with the attribute value. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPATTRIBUTES +*/ +#define GFISPGetAttribute( handle, aid, pAttrData ) \ + ((PGFISPTABLE)handle)->ISPGetAttribute( handle, aid, pAttrData ) + +/** Set an attribute of the GFISPAPI. + + @param handle Valid handle to GFISPAPI component. + @param aid Attribute ID. A #GFISPATTRIBUTES enumeration type value. + @param attrData Pointer to an #NvU32 to be filled with the attribute value. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + Under the NVIDIA ISP implementation, certain ISP functions can be turned + on or off independent of parameter settings. In most cases, this function + simply switches certain ISP functions on or off. + + To set parameters for specific ISP functions, see GFISPSetParameter(). + + @see GFISPATTRIBUTES +*/ +#define GFISPSetAttribute( handle, aid, attrData ) \ + ((PGFISPTABLE)handle)->ISPSetAttribute( handle, aid, attrData ) + +/** Set an attribute of the GFISPAPI to its default value. + + @param handle Valid handle to GFISPAPI component. + @param aid Attribute ID. A #GFISPATTRIBUTES enumeration type value. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPATTRIBUTES +*/ +#define GFISPSetAttributeToDefault( handle, aid ) \ + ((PGFISPTABLE)handle)->ISPSetAttributeToDefault( handle, aid ) + +/** Get parameters for a given ISP functional block. + + @param handle Valid handle to GFISPAPI component. + @param pid Parameter ID. A #GFISPPARAMETERS enumeration type value. + @param pSize Pointer to an #NvU32 to be filled with the parameter size. Can be NULL. + @param pPara Pointer to a certain GFISPAPI data structure, depending on #pid. Can be NULL. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPPARAMETERS +*/ +#define GFISPGetParameter( handle, pid, pSize, pPara ) \ + ((PGFISPTABLE)handle)->ISPGetParameter( handle, pid, pSize, pPara ) + +/** Set parameters for a given ISP functional block. + + @param handle Valid handle to GFISPAPI component. + @param pid Parameter ID. A #GFISPPARAMETERS enumeration type value. + @param size #NvU32 with actual size of GFISPAPI structure pointed to by #pPara. + @param pPara Pointer to a certain GFISPAPI data structure, depending on #pid. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_SIZE_TOO_SMALL #size parameter is too small + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPPARAMETERS +*/ +#define GFISPSetParameter( handle, pid, size, pPara ) \ + ((PGFISPTABLE)handle)->ISPSetParameter( handle, pid, size, pPara ) + +/** Set parameters for a given ISP functional block to their default value. + + @param handle Valid handle to GFISPAPI component. + @param pid Parameter ID. A #GFISPPARAMETERS enumeration type value. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPPARAMETERS +*/ +#define GFISPSetParameterToDefault( handle, pid ) \ + ((PGFISPTABLE)handle)->ISPSetParameterToDefault( handle, pid ) + +/** Triggers MWindow statistics to be gathered on the next frame. + + @param handle Valid handle to GFISPAPI component. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + This function will trigger MWindow statistics to be gathered for + any of the M2, M3, M4 statistics that are turned on. M1 statistics + are constantly gathered. The statistics will become available at + the end of the next frame, and can be read by calling + GFISPReadMWindowValues(). + + Calling GFISPTriggerMWindowGather implicitly sets + #GFISP_ATTR_ENABLE_STATS_INT to 1. + + @see GFISPReadMWindowValues +*/ +#define GFISPTriggerMWindowGather( handle ) \ + ((PGFISPTABLE)handle)->ISPTriggerMWindowGather( handle ) + +/** Reads gathered MWindow statistics if they are ready. + + @param handle Valid handle to GFISPAPI component. + @param szM1Buffer Maximum size of M1Buffer provided by caller (in bytes). The + GFISPAPI fills the buffer as much as it can. If zero, the GFISPAPI + doesn't fill the M1Buffer. + @param pM1Buffer Array of 8 data. First four 32-bit values will be filled with average + RGGB pixel values. Next four values will be filled with peak pixel values. + Can be NULL, then the GFISPAPI doesn't fill M1Buffer. + @param szM2Buffer Maximum size of M2Buffer provided by caller (in bytes). The + GFISPAPI fills the buffer as much as it can. If zero, the GFISPAPI + doesn't fill the M2Buffer. + @param pM2Buffer Array of 16 data. Data is arranged in 32-bit words as follows: + {R1, Gr1, Gb1, B1, + R2, Gr2, Gb2, B2, ...} + Can be NULL, then the GFISPAPI doesn't fill M2Buffer. + @param szM3Buffer Maximum size of M3Buffer provided by caller (in bytes). The + GFISPAPI fills the buffer as much as it can. If zero, the GFISPAPI + doesn't fill the M3Buffer. + @param pM3Buffer Array to hold pixel samples. The size matches the M3 Window specification. + The data is arranged as follows: + {R1, R2, R3, R4}, + {Gr1, Gr2, Gr3, Gr4}, + {Gb1, Gb2, Gb3, Gb4}, + {B1, B2, B3, B4}, + {R5, R6, R7, R8}, + ... + Can be NULL, then the GFISPAPI doesn't fill M3Buffer. + @param szM4Buffer Maximum size of M4Buffer provided by caller (in bytes). The + GFISPAPI fills the buffer as much as it can. If zero, the GFISPAPI + doesn't fill the M4Buffer. + @param pM4Buffer Array of 2*M4WindowNumber data. Data is arranged as follows: + {HF1, Luma1, HF2, Luma2, ...} + Can be NULL, then the GFISPAPI doesn't fill M4Buffer. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_STATISTICS_NOT_READY M2/M3/M4 statistics not ready. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + Call this function to read the MWindow values gathered by the last call to + GFISPTriggerMWindowGather(). The user may either poll for statistics ready + by checking the return code, or use the interrupt mechanism to only call + GFISPReadMWindowValues once the statistics are ready. + + After the statistics are gathered, they will remain available for reading + until the next call to GFISPTriggerMWindowGather(). + + M1 statistics are gathered every frame regardless of whether + GFISPTriggerMWindowGather() has been called. The user can read + the last frame's M1 statistics without ever triggering a gather by + passing 0 and NULL for the M2-M4 parameters to GFISPReadMWindowValues(). + + @see GFISPTriggerMWindowGather +*/ +#define GFISPReadMWindowValues( handle, szM1Buffer, pM1Buffer, \ + szM2Buffer, pM2Buffer, szM3Buffer, pM3Buffer, szM4Buffer, pM4Buffer ) \ + ((PGFISPTABLE)handle)->ISPReadMWindowValues( handle, szM1Buffer, pM1Buffer, \ + szM2Buffer, pM2Buffer, szM3Buffer, pM3Buffer, szM4Buffer, pM4Buffer ) + +/** Call Oem function defined in ISP script. + + @param handle Valid handle to GFISPAPI component. + @param ScriptFuncTag Function tag used by the script. + @param size Number of entries in the buffer pointed to by #pBuffer. + @param pBuffer Point to a @param #NvU32 buffer that will be passed to script function. + Use it to send parameter to script function and get data back. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + Call this function to access script function OemScriptFunc(). +*/ +#define GFISPOEMScriptFunc( handle, ScriptFuncTag, size, pBuffer ) \ + ((PGFISPTABLE)handle)->ISPOEMScriptFunc( handle, ScriptFuncTag, size, pBuffer ) + +/** Trigger periodic software 3A function. + + @param handle Valid handle to GFISPAPI component. + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + Call this function at every vertical blank to trigger periodic software 3A function +*/ +#define GFISP3APeriodicTrigger( handle ) \ + ((PGFISPTABLE)handle)->ISP3APeriodicTrigger( handle ) + +/** Exposure Bracketing Function + @param handle Valid handle to GFISPAPI component + @param mode Range: 0 Exposure value output by AC Algo + -1 Less by one-third stop than AC Output + 1 More by one-third stop than AC Output + @param.pRetExpsoure Expsoure at current mode is returned through this pointer + @param pGain Gain at current mode is returned through this pointer + @retval GF_SUCCESS or GF_ERROR + + Call this function three times with different modes each time in order to record images with exposure bracketing +*/ +#define GFISPAeBracketingSetET(handle, mode, pRetExposure, pRetGain) \ + ((PGFISPTABLE)handle)->ISPAeBracketingSetET( mode, pRetExposure, pRetGain ) + +/** White Balance Bracketing Function + @param handle Valid handle to GFISPAPI component + @param mode Range: 0 Exposure value output by AC Algo + -1 Less by one Illuminant than AC Output + 1 More by one Illuminant than AC Output + @param pRetCCT Color Temprature at current mode is returned through this pointer + @retval GF_SUCCESS or GF_ERROR + + Call this function three times with different modes each time in order to record images with White Balance bracketing +*/ +#define GFISPAwbBracketingSetIllum(handle, mode, pRetCCT) \ + ((PGFISPTABLE)handle)->ISPAwbBracketingSetIllum( mode, pRetCCT ) + +/** Register callback function for the convergence of software Auto White balance + + @param handle Valid handle to GFISPAPI component. + @param algoType whether AWB, AE or AF + @param func Pointer to the callback function + @param pParameter pointer to the argument of function call + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR If invalid function pointer is passed + + Call this function when application wants to know whether the auto white balance algorithm is converged or not. + When algorithm converges it calls the function func which is registered as callback function. +*/ +#define GFISPRegister3ACallback(handle, algoType, func, pParameter) \ + ((PGFISPTABLE)handle)->ISPRegister3ACallback( handle, algoType, func, pParameter ) + +/*@}*/ // End function macros + +/*@}*/ // End ISP API Doxygen + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* _GF_ISP__ */ diff --git a/Start_WM/test6/inc/GFIspError.h b/Start_WM/test6/inc/GFIspError.h new file mode 100755 index 00000000..4f173424 --- /dev/null +++ b/Start_WM/test6/inc/GFIspError.h @@ -0,0 +1,37 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFIspError.h + * GFSDK Image Signal Processor API error code header file. + */ + +#ifndef __GFISPERROR_H__ +#define __GFISPERROR_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#define GFISP_ERROR_ILLEGAL_PARAMETER (GFISP_ERROR | 0x00000001L) +#define GFISP_ERROR_BAD_HANDLE (GFISP_ERROR | 0x00000002L) +#define GFISP_ERROR_SIZE_TOO_SMALL (GFISP_ERROR | 0x00000003L) +#define GFISP_ERROR_STATISTICS_NOT_READY (GFISP_ERROR | 0x00000004L) +#define GFISP_ERROR_CALL_SETUP_FIRST (GFISP_ERROR | 0x00000005L) +#define GFISP_ERROR_OUT_OF_MEMORY (GFISP_ERROR | 0x00000006L) + +#ifdef __cplusplus +} +#endif + +#endif // __GFISPERROR_H__ + + + diff --git a/Start_WM/test6/inc/GFJxDec.h b/Start_WM/test6/inc/GFJxDec.h new file mode 100755 index 00000000..879f10ed --- /dev/null +++ b/Start_WM/test6/inc/GFJxDec.h @@ -0,0 +1,508 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFJxDec.h +GFSDK JPEG Decode API header file. +*/ +#ifndef _GF_JPEG_DEC__ +#define _GF_JPEG_DEC__ + +#include "nvtypes.h" +#include "GFVx.h" + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif + +/** @addtogroup groupJx JxDecAPI JPEG Decoder API +*/ + /*
        +
      • @ref pageGxAppNotes +
          +
        • @ref pageGxAppNotes1 +
        +
      + */ + +/*@{*/ + +// JXDECCapFlags + +/** JxDecAPI property flag: Support for Sequential encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_SEQUENTIAL_DCT 0x00000001 + +/** JxDecAPI property flag: Support for Progressive encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_PROGRESS_DCT 0x00000002 + +/** JxDecAPI property flag: Support for lossless encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_LOSSLESS 0x00000004 + +/** JxDecAPI property flag: Support for hierarchical encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_HIERARCHICAL 0x00000008 + +/** JxDecAPI property flag: Support for 8 bits encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_8_BIT 0x00000010 + +/** JxDecAPI property flag: "No" Support for 12 bits encoded JPEG Presently. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_12_BIT 0x00000020 + +/** JxDecAPI property flag: Support for Interleaved mode. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_INTERLEAVE 0x00000040 + +/** JxDecAPI property flag: "No" Support presently for Interleaved mode. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_NO_INTERLEAVE 0x00000080 + +/** JxDecAPI property flag: Support for Huffman Coding. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_HUFFMAN 0x00000100 + +/** JxDecAPI property flag: No Support for Arithematic Coding presently. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_ARITHMETIC 0x00000200 + +/** JxDecAPI property flag: No Support for Interchange format coding. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_INTERCHANGE 0x00000400 + +/** JxDecAPI property flag: Support for Pixel Based Cropping(MCU based Cropping). + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_CROPPING 0x00001000 + +/** JxDecAPI property flag: Support for YUV444 encoded JPEG images. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_YUV444 0x00002000 + +/** JxDecAPI property flag: Support for YUV422 encoded JPEG images. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_YUV422 0x00004000 + +/** JxDecAPI property flag: YUV422 Rotation Supported. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_ROTATED_YUV422 0x00008000 + +/** JxDecAPI property flag: Support for YUV420 encoded JPEG images. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_YUV420 0x00010000 + +/** JxDecAPI property flag: Support for Gray Scale encoded JPEG images. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_GRAY_SCALE 0x00020000 + +/** JxDecAPI property flag: Support for Extended RGB format 24/32 bpp. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_EXTEND_RGB 0x00040000 + +/** JxDecAPI property flag: Support for YUV420 output decoded format. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_420_OUTPUT 0x00080000 + +/** JxDecAPI property flag: Support for YUV422 output decoded format. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_422_OUTPUT 0x00100000 + +/** Image source dimensions and color format of the input JPEG to be decoded. + This structure is passed as parameter to GFJxDecGetImageInfo(). + + @see GFRMSURFACE::ColorFormat, GFJxDecGetImageInfo() +*/ +typedef struct _GFJXDECIMAGEINFO +{ + NvU32 IIFlag; /**< Deprecated, do not use. + This variable is set to the same error code as returned by GFJxDecGetImageInfo(). + @deprecated + */ + NvU32 Width; /**< Width of the input image */ + NvU32 Height; /**< Height of the input image */ + NvU32 ColorFormat; /**< Color Format of input image (YUV420, YUV422, ...) + @see GFRMSURFACE.ColorFormat */ +}GFJXDECIMAGEINFO, *PGFJXDECIMAGEINFO; + +/** GFJxDecStart parameter structure. + This structure specifies target surface, scaling, source + and destination cropping for the decode operation. + + @see GFJxDecStart() +*/ +typedef struct _GFJXDECSTART +{ + NvU32 SFlag; /**< Deprecated, do not use. @deprecated */ + PGFRMSURFACE pDestSurf; /**< Destination Surface to hold the decoded image. + The color format of the surface controls the output color format. + If no destination cropping rectangle is given, the decoded picture + is scaled to match the surface size. + */ + PGFRECT pCroppingRect; /**< Source cropping area to be decoded, or NULL for no cropping. + Top-left position of the cropping rectangle must be aligned + to an MCU boundary. + */ + PGFRECT pDestRect; /**< Destination cropping area, or NULL for no cropping. + If a destination cropping rectangle is given, the decoded picture + will be scaled to fit this rectangle. + */ + NvU32 Error; /**< Deprecated, do not use. + This variable will be set to the same value as returned by GFJxDecStart(). + @deprecated + */ +} GFJXDECSTART, *PGFJXDECSTART; + + +//SFlag: not used anymore. Cropping is decided on whether +//the pCroppingRect is NULL or not +#define GF_JXDEC_SFLAG_CROPPING 0 + +/** GF_DECODER_IDLE is returned if hardware decoder is idle by GFJxDecGetStatus(). + @see GFJxDecGetStatus() +*/ +#define GF_DECODER_IDLE 0x00000001 + +/** GF_DECODER_BUSY is returned if hardware decoder is busy by GFJxDecGetStatus(). + @see GFJxDecGetStatus() +*/ +#define GF_DECODER_BUSY 0x00000002 + + +/** JxDecAPI Pass JX_DEC_SET_READBITSTREAM to GFJxDecSet to register call back function +@see GFJxDecSet() +*/ +#define JX_DEC_SET_READBITSTREAM 1 + +/** Structure holding the callback function pointer. + Used in registering the callback function +*/ +typedef struct _GFJXDECCALLBACK +{ + void *pPara; /**< Not used anymore */ + NvU32 (*pCallBack)(void * pPara, NvU8 ** ppBuffer, NvS32 * BufferLength); + /**< + Application callback function pointer. + Register a callback function for fetching JPEG Image data. + + @param *pPara Not used anymore + @param ppBuffer Buffer Pointer + @param BufferLength Buffer Length in bytes, 0 if no bytes read. + + @retval The number of bytes read successfully, 0 if no bytes read. + */ + +}GFJXDECCALLBACK, *PGFJXDECCALLBACK; + +/** Structure holding the callback function pointer. + Used in registering the callback function +*/ +typedef struct _GFJXDECGETIMAGECALLBACK +{ + void *pPara; + /**< pPara is a parameter passed from application, + and application wants API to call back with this parameter + */ + NvU32 (*pCallBack)(void * pPara, PGFRMSURFACE pImageSurf, PGFRECT pImageRect, NvU32 uiImageFlag); + /**< + Application callback function pointer. + Register a callback function for fetching decoded JPEG Image data. + + @param *pPara Parameter to pass on to application callback function + @param pImageSurf Surface Pointer + @param pImageRect Source rectangle + @param uiImageFlag + + + +
      #JX_DEC_IF_LAST_PORTION_IMAGEThis is the last portion of decoded image
      + @retval 0 + */ +}GFJXDECGETIMAGECALLBACK, *PGFJXDECGETIMAGECALLBACK; + + +/** This is the last portion of the Image. + @see GFJXDECGETIMAGECALLBACK +*/ +#define JX_DEC_IF_LAST_PORTION_IMAGE 0x00000001 //this is the last portion of decoded image + +//Attribute uiFeature + +/** Set get decoded image call back(inorder to dump the decoded YUV from JPEG). + @see GFJXDECGETIMAGECALLBACK, GFJxDecGetImageInfo +*/ +#define JX_DEC_GETIMAGE 0x00000001 + +/** Pass JX_DEC_GETIMAGE_COLORFORMAT with GFJxDecGetAttribute to get JPEG image color format. */ +#define JX_DEC_GETIMAGE_COLORFORMAT 0x00000002 + + +/** Call this function get the JxDec Component's handle. + @param hRm (#GFRmHandle) Handle to the Resource Manager + @param phJxDec (#GFJxDECHandle) Pointer to the JxDecAPI Handle + @param state Set to Default state. + @param hCh (#GFRmChHandle) Channel Handle + @retval #GF_SUCCESS JxDec component registered successfully + @retval #GF_ERROR Some error occured +*/ +GF_RETTYPE GFJxDecOpen(GFRmHandle hRm, GFJxDecHandle *phJxDec, GF_STATE_TYPE state, GFRmChHandle hCh); + + +/** The function releases the JxDec's Component handle. + @param phJxDec (#GFJxDECHandle) Pointer to the JxDecAPI Handle +*/ +void GFJxDecClose(GFJxDecHandle *phJxDec); + +/** This function returns version and capabilities of JPEG decoder. + + @param hJxDec Handle to JxDecAPI + @param pJXProp Pointer to property structure to be filled in + + @retval #GF_SUCCESS \a pJXProp filled in successfully + @retval #GF_ERROR Some error occured + + @see GFPROPERTY +*/ +GF_RETTYPE GFJxDecGetProperty(GFJxDecHandle hJxDec, PGFPROPERTY pJXProp); + +/** This function returns the status of the JPEG Decoder + + @param hJxDec Handle to JxDecAPI + @param pStatus Returns status, GF_DECODER_BUSY or GF_DECODER_IDLE. +*/ +GF_RETTYPE GFJxDecGetStatus(GFJxDecHandle hJxDec, NvU32* pStatus); + +/** The funtion gets the information about the input image and fills it into the pInfo + + If the function fails, it will return an error code describing the failure cause. + + @param hJxDec Handle to JxDecAPI + @param pInfo Pointer to Image Information structure to be filled in + + @retval GF_SUCCESS \a pInfo filled in successfully + @retval GF_JXDEC_IFLAG_INVALID_MARKER Invalid Marker in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_HDR_LEN Invalid header (marker) length in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_SIG Invalid Image Signature(eg: JFIF, AVI, ..) in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_DQT Invalid Quantization Table in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_DHT Invalid Huffman Tables in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_VALUE Invalid image parameters (eg: width, height , ...) in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_FORMAT Invalid format in JPEG file + @retval GF_JXDEC_IFLAG_PROGRESSIVE_MARKER Invalid Marker in JPEG file + @see GFJXDECIMAGEINFO +*/ +GF_RETTYPE GFJxDecGetImageInfo(GFJxDecHandle hJxDec, PGFJXDECIMAGEINFO pInfo); + +/** This function sets up a callback function + @param hJxDec Handle to JxDecAPI + @param uiFeature Feature ID to set + @param pInfo Feature specific parameter + + + + + + + + +
      \a uiFeature\a pInfo interpretationMeaning
      JX_DEC_SET_READBITSTREAMGFJXDECCALLBACK*Set up Jpeg bitstream feed callback
      + + @retval #GF_SUCCESS If successful + @retval #GFJXD_ERROR_INVALID_PARAMETER Invalid parameter + + @see GFJXDECCALLBACK +*/ +GF_RETTYPE GFJxDecSet(GFJxDecHandle hJxDec, NvU32 uiFeature, void* pInfo); + +/** Set attributes for the decoder. + @param hJxDec Handle to JxDecAPI, + @param attrID Attribute ID to be set + @param pInfo Attruvyte specific parameter + + + + + + +
      #JX_DEC_GETIMAGE Get the YUV decoded JPEG image into a file, Sets the decoder image callback
      #JX_DEC_GETIMAGE_COLORFORMAT Set get decoded image color format.
      + + @retval #GF_SUCCESS +*/ +GF_RETTYPE GFJxDecSetAttribute(GFJxDecHandle hJxDec, NvU32 attrID, NvU32* pInfo); + +/** Gets attributes for the decoder + @param hJxDec Handle to JxDecAPI, + @param attrID Attribute ID to read + @param pInfo Pointer to block returning attribute specific data + + + + + +
      #JX_DEC_GETIMAGE Get the YUV decoded JPEG image into a file, Sets the decoder image callback
      #JX_DEC_GETIMAGE_COLORFORMAT Set get decoded image color format.
      +*/ +GF_RETTYPE GFJxDecGetAttribute(GFJxDecHandle hJxDec, NvU32 attrID, NvU32* pInfo); + +/** Setup JxDecAPI for JPEG decoding a frame. + + If GFJxDecStart() fails, it will return an error code describing the failure cause. + If GFJxDecStart() succeeded, GFJxDecEnd() must be called later. + + @param hJxDec Handle to JxDecAPI + @param pStart Pointer to #GFJXDECSTART parameter structure. + + @retval GF_SUCCESS Success + @retval GFRM_ERROR_OUT_MEMORY Not enough free GPU or system memory + @retval GF_JXDEC_NOT_SUPPORT_DESTSURFACE_FORMAT Destination Surface format not supported by the decoder + @retval GF_JXDEC_DECODER_WIDTH_TOO_BIG Image source width exceeds max decoder width + @retval GF_JXDEC_DECODER_HEIGHT_TOO_BIG Image source height exceeds max decoder height + + @see GFJXDECSTART, GFJxDecSetAttribute(),GFJxDecEnd() +*/ +GF_RETTYPE GFJxDecStart(GFJxDecHandle hJxDec, PGFJXDECSTART pStart); + +/** Decode the image + @param hJxDec Handle to JxDecAPI + @param uiFlag Reserved, must be 0. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see GFJxDecGetImageInfo(), GFJxDecStart(), GFJxDecSetAttribute(), GFJxDecEnd() + +*/ +GF_RETTYPE GFJxDecDecodeImage(GFJxDecHandle hJxDec, NvU32 uiFlag); + +/** End or cancel decoding a frame. + Must be called only, if GFJxDecStart() has been called before. + @param hJxDec Handle to JxDecAPI +*/ +GF_RETTYPE GFJxDecEnd(GFJxDecHandle hJxDec); + + +/** GFJxDecAPI Error Codes. */ +enum +{ + /** GFJxDecAPI API called with invalid parameters. */ + GFJXD_ERROR_INVALID_PARAMETER = GFJXD_ERROR, + + /** Operation not supported. */ + GFJXD_ERROR_NOT_SUPPORTED, + + /** Encountered incomplete bitstream during decoding. */ + GFJXD_ERROR_INCOMPLETE_BITSTREAM, + + /** GFJxDecStart() return code: Can't support this destination surface type. + @see GFJXDECSTART, GFJxDecStart() + */ + GF_JXDEC_NOT_SUPPORT_DESTSURFACE_FORMAT, + + /** GFJxDecStart() return code: Image width is too big for hardware decoder to handle + @see GFJXDECSTART, GFJxDecStart() + */ + GF_JXDEC_DECODER_WIDTH_TOO_BIG, + + /** GFJxDecStart() return code: Image height is too big for hardware decoder to handle + @see GFJXDECSTART, GFJxDecStart() + */ + GF_JXDEC_DECODER_HEIGHT_TOO_BIG, + + /** GFJxDecGetImageInfo() return code: If set then the input marker is Invalid, + if unset its a valid marker. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_MARKER, + + /** GFJxDecGetImageInfo() return code: If set then the Header Length is Invalid, + if unset its a valid header length. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_HDR_LEN, + + /** GFJxDecGetImageInfo() return code: If set then the Signature(eg: JFIF, AVI, ..) is Invalid, + if unset its a valid signature. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_SIG, + + /** GFJxDecGetImageInfo() return code: If set then the there occured an error in reading the Quantization Table, + if unset the Quantization Table was read clean. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_DQT, + + /** GFJxDecGetImageInfo() return code: If set then the Huffman Tables were not loaded properly + if unset Huffman Tables were loaded. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_DHT, + + /** GFJxDecGetImageInfo() return code: If set then there was an invalid value(eg : erroneous/incomplete bitstream) in the stream, + if unset its a valid Iflag. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_VALUE, + + /** GFJxDecGetImageInfo() return code: If set then the progressive marker not supported, + if unset its a valid marker. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + + GF_JXDEC_IFLAG_PROGRESSIVE_MARKER, + /** GFJxDecGetImageInfo() return code: If set then there was an invalid header format encountered in the stream, + if unset its a valid Iflag. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_FORMAT +}; + + +/** @page pageJxDecAppNotes JxDecAPI Application Notes + @section pageJxDecAppNotes Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start GFSDK usage. + -# Call GFJxDecOpen() to obtain JxDecHandle which will be passed to different functions of JxDecAPI. + -# Query the properties through GFJxDecGetProperty() to check whether the desired JxDec features can be supported. + -# Call GFRmSurfaceAlloc() to allocate one surface to hold the decoded image. + -# Register the call back function using GFJxDecSet() + -# Call GFJxDecGetImageInfo() to get the JPEG image information, such as width and height. + -# GFJxDecStart() is the next function to call. This function will setup the decoder. + -# Call GFJxDecDecodeImage() to do the real decoding. + -# After the whole bitstream has been fed, call GFJxDecEnd() to end the decoding process. + -# Release surface by calling GFRmSurfaceFree(). + -# Release JPEG decoder by calling GFJxDecClose(). +*/ + +/*@}*/ + +#ifdef __cplusplus +} +#endif +#endif + diff --git a/Start_WM/test6/inc/GFJxEnc.h b/Start_WM/test6/inc/GFJxEnc.h new file mode 100755 index 00000000..c5170b44 --- /dev/null +++ b/Start_WM/test6/inc/GFJxEnc.h @@ -0,0 +1,1306 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFJxEnc.h + GFSDK JPEG Encode API header file. +*/ + +#ifndef _GF_JPEG_ENC__ +#define _GF_JPEG_ENC__ + +#include "GF.h" +#include "GFRm.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupJxEnc JxEncAPI JPEG Encoder API +
        +
      • @ref pageJxEncAppNotes +
          +
        • @ref pageJxEncAppNotes1 +
        +
      +*/ +/*@{*/ + +/** JxEncAPI property flag: JPEG quantization table is programmable. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_QTABLE 0x00000001 + +/** JxEncAPI property flag: Interrupt data capture mode and polling mode + supported, if this flag is off then only polling mode is supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_INTERRUPT 0x00000004 + +/** JxEncAPI property flag: Digital zoom supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_DIGITAL_ZOOM 0x00000008 + +/** JxEncAPI property flag: Motion JPEG mode supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_MOTION_JPEG 0x00000010 + +/** JxEncAPI property flag: Rate control supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_RATE_CONTROL 0x00000020 + +/** JxEncAPI property flag: Planar YUV422 data supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_422_PLANAR 0x00000040 + +/** JxEncAPI property flag: Rotation supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_ROTATION 0x00000080 + + +/** Image source/target dimensions and data source for JPEG encoding. + + This structure is passed as parameter to GFJxEncStart() and describes + data source, source cropping rectangle and destination image size. + + The surface the application wants to encode is pSrcSurf. If the application + wants to encode an image from a camera or to re-encode a JPEG bitstream, + this field should be set to NULL. If the application wants to encode an + image from the display, this field should point to the primary surface. If + an application wants to encode an existing image, it must create a system + memory surface to hold the image and set this field to the system memory + surface. + + @see GFJxEncStart() +*/ +typedef struct _GFJXENCSTART +{ + PGFRMSURFACE pSrcSurf;/**< Surface to encode, + NULL for camera or re-encode JPEG + */ + PGFRECT pSrcRect; /**< Source image area need to encode */ + NvU32 DestWidth; /**< Final encoded image width */ + NvU32 DestHeight; /**< Final encode image height */ + NvU32 uiOptions; /**< Bitmask of flags to control encoding + + + + + + + +
      #GF_CAPT_BITSTREAM If set only bitstream is output, if + unset JFIF header will be added
      #GF_CAPT_PIECE_MEALPiecemeal encoding @todo clarify + meaning
      + */ + NvU32 Error; /**< Returns detailed error code on GFJxEncStart() failure + + + + + + + +
      #GF_CAPT_ERROR_VIDEO_MEMORY_NOT_BIG_ENOUGHNot enough free video memory, try to release + unnecessary video surfaces
      #GF_CAPT_ERROR_WRONG_CONFIGWrong input parameters, for example srcRect + size greater than pSrcSurf dimensions
      #GF_CAPT_ERROR_NO_CALLBACKNo callback function available
      + */ +} GFJXENCSTART, *PGFJXENCSTART; + +/** JxEncAPI GFJXENCSTART::uiOptions flagbit: If set only bitstream is output, + if unset JFIF header will be added. + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_BITSTREAM 1 + +/** JxEncAPI GFJXENCSTART::uiOptions flagbit: Piecemeal encoding + @todo clarify meaning + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_PIECE_MEAL 2 + +/** JxEncAPI GFJXENCSTART::Error return code: Not enough free video memory. + Try to release unnecessary video surfaces. + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_ERROR_VIDEO_MEMORY_NOT_BIG_ENOUGH 1 + +/** JxEncAPI GFJXENCSTART::Error return code: Wrong input parameters. + E.g. srcRect size greater than pSrcSurf dimensions. + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_ERROR_WRONG_CONFIG 2 + +/** JxEncAPI GFJXENCSTART::Error return code: No callback function available. + @todo clarify + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_ERROR_NO_CALLBACK 4 + +/** Descriptor for JPEG encode buffers. + This structure describes a buffer and its fill status for encoded + JPEG data or raw YUV transfered from the JPEG encoder to the + application. It is used with GFJxEncCapture() and GFJxEncFetchImage() + in either polling or callback data fetch mode. + + @see GFJxEncCapture(), GFJxEncFetchImage(), GFJxEncPRComplete() +*/ +typedef struct _GFJXENC_BUF { + NvU8 *pBuf; /**< Pointer to the buffer */ + NvU32 bufSize; /**< Size of the buffer in bytes */ + NvU32 nBytesCaptured; /**< Number of bytes captured, + app initializes to 0 + */ +} GFJXENC_BUF, *PGFJXENC_BUF; + +/** Fetch buffer descriptor for use with GFJxEncFetchImage(). + This data structure is used by GFJxEncInterruptHandler() to fetch encoded + image data when IntType is GFJX_ENC_STREAM_BUF_INTR or GFJX_ENC_DONE_INTR. +*/ +typedef struct _GFJXENC_FETCH_BUF{ + PGFJXENC_BUF pBuf; + NvU32 numOfBuf; + NvU32 status; +} GFJXENC_FETCH_BUF, *PGFJXENC_FETCH_BUF; + + +/** JxEncAPI data fetch status code: All data of the current frame was fetched. + @see GFJxEncFetchImage(), GFJxEncCapture() +*/ +#define JXENC_DATA_COMPLETE 0x1 + +/** JxEncAPI data fetch status code: Data was fetched only partially. + The application should make more calls to GFJxEncFetchImage() to fetch + the rest. + @see GFJxEncFetchImage(), GFJxEncCapture() +*/ +#define JXENC_MORE_FETCH 0x2 + +/** JxEncAPI data fetch status code: New frame was encoded and is ready to + fetch. + @see GFJxEncFetchImage(), GFJxEncCapture() +*/ +#define JXENC_NEW_FRAME 0x8 + +/** JxEncAPI data fetch status code: Time out error occured while encoded data is fetching. + fetch. + @see GFJxEncFetchImage(), GFJxEncCapture() +*/ +#define JXENC_TIME_OUT 0x10 + +// definition of uiFeature for GFJxEncSetAttribute +//the following definations are for set only + +/** JxEncAPI attribute: Choose preset QTable, coefficients in luma and chroma + Qtable are all 1. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_100QUALITY 0 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable A and B, + divided by 2. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_85QUALITY 1 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable A and B. + + Interpretation of associated data block: None. + + Attribute is set-only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_75QUALITY 2 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable C and D. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_50QUALITY 3 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable C and D, + multiplied by 2. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_25QUALITY 4 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable C and D, + multiplied by 4. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_12QUALITY 5 + +//the following definations can be used for set and get + +/** JxEncAPI attribute: Set custom luma QTable. + + Interpretation of associated data block: + A table of 64 16-bit (type NvU16) entries with quantization coefficients + to be used for luma MCU's. + + Attribute can be set and get. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_LQTABLE 6 + +/** JxEncAPI attribute: Set custom chroma QTable. + + Interpretation of associated data block: + A table of 64 16-bit (type NvU16) entries with quantization coefficients + to be used for chroma MCU's. + + Attribute can be set and get. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_CQTABLE 7 + +/** JxEncAPI attribute: Decimation filter enable/disable. + + Interpretation of associated data block: + 
      +    NvU32 decimation enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_FILTER 8 + +/** JxEncAPI attribute: Huffman bit stuffing. + + Interpretation of associated data block: + 
      +    NvU32 Huffman stuffing enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_HUFF_BSTUFF 13 + +/** JxEncAPI attribute: Motion JPEG capturing mode enable/disable. + + Interpretation of associated data block: + 
      +    NvU32 Motion JPEG capturing mode enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_MOTION_JPEG 14 + +/** JxEncAPI attribute: Raw data capturing mode enable/disable. + + Interpretation of associated data block: + 
      +    NvU32 Raw data capturing mode enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_RAW_DATA 15 + +/** JxEncAPI attribute: Re-encode a JPEG bitstream. + + Registration of callback function for JPEG re-encode application: + 
      +    #PGFJXDECCALLBACK structure
+
      + + Attribute is set only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_BITSTREAM 16 + +/** JxEncAPI attribute: JPEG encoding colour format. + + Only YUV420 and YUV422 encoding is supported. The JPEG encoder converts + the incoming image to the configured colour format, and then encodes it + in the JPEG bitstream. + + Only YUV420 and YUV422 are + valid. + + Interpretation of associated data block: + 
      +    NvU32 Colour format identifier, one of:
+          #GF_SURFACE_PLANAR_YUV422
+          #GF_SURFACE_YUV420
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute(), GFRMSURFACE::ColorFormat +*/ +#define JX_ENC_ENCODE_FORMAT 17 + +/** JxEncAPI attribute: Maximum JPEG byte size. + + The JPEG encoder will not generate a JPEG bitstream larger than this. + + Interpretation of associated data block: + 
      +    NvU32 Maximum size in bytes
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_MAX_SIZE 18 + +/** JxEncAPI attribute: Camera focal point. + + Image area which is close to the focal point will be encoded with higher + quality. Takes effect only when #JX_ENC_MAX_SIZE is set. + + Interpretation of associated data block: + 
      +    NvU32 Focal point X position
+    NvU32 Focal point Y position
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute(), #JX_ENC_DEGRADATION, + #JX_ENC_MAX_SIZE +*/ +#define JX_ENC_FOCAL_POINT 19 + +/** JxEncAPI attribute: Image quality degradation from focal point. + + Image areas further from the focal point get encoded with fewer bits. + The number of bits is linearly degraded based on the percentage of + degradation in the X and Y directions. This attribute takes effect only + when JX_ENC_MAX_SIZE is set. + + Interpretation of associated data block: + 
      +    NvU32 X direction degradation percentage
+    NvU32 Y direction degradation percentage
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute(), #JX_ENC_FOCAL_POINT, + #JX_ENC_MAX_SIZE +*/ +#define JX_ENC_DEGRADATION 20 + +/** JxEncAPI attribute: JPEG encode rotation and flip control. + + Interpretation of associated data block: + 
      +    NvU32 Rotation and flip control, one of the following constants
+            #JX_ENC_ROTATE_0
+            #JX_ENC_ROTATE_90
+            #JX_ENC_ROTATE_180
+            #JX_ENC_ROTATE_270
+          optionally logically ORed with zero or more of the following flags
+            #JX_ENC_H_FLIP
+            #JX_ENC_V_FLIP
+
      + + Default is #JX_ENC_ROTATE_0. + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATION 21 + +/** JxEncAPI attribute: Rotation and flip control for rartial rotation API. + + Enables and configures the partial rotation engine for partially rotated + JPEG encoding. Partially rotated JPEG encoding allows for rotated encoding + of large image sizes with a small image capture buffer. + + Interpretation of associated data block: + 
      +    NvU32 Rotation and flip control, one of the following constants
+            #JX_PRENC_ROTATE_UNSET - reset and disable partial rotation engine
+            #JX_ENC_ROTATE_0
+            #JX_ENC_ROTATE_90
+            #JX_ENC_ROTATE_180
+            #JX_ENC_ROTATE_270
+          if not #JX_PRENC_ROTATE_UNSET optionally logically ORed with zero or
+          more of the following flags
+            #JX_ENC_H_FLIP
+            #JX_ENC_V_FLIP
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_PARTIAL_ROTATE 22 + +/** JxEncAPI attribute: Bypass FIFO. + + Interpretation of associated data block: + 
      +    NvU32 Raw data capturing mode enable
+          0 = Fetching encoded data through DMA FIFO
+          1 = Fetching encoded data directly through output buffer not through
+              DMA FIFO
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_BYPASS_FIFO 23 + +/** JxEncAPI attribute: Piece-Meal encoding. + + Interpretation of associated data block: + 
      +    NvU32 Piece-Meal encoding enable
+          0 = enable
+          1 = disable
+
      + + Attribute is get only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_PIECE_MEAL 24 + +/** JxEncAPI attribute: Fetch Low bitstream. + + Registration of callback function for fetching raw data stream from JPEG encoder: + 
      +    #PGFJXDECCALLBACK structure
+
      + + Attribute is set only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ + +#define JX_ENC_RAW_DATA_STREAM 25 + +/** JxEncAPI attribute: Fetch Low JPEG bitstream. + + Registration of callback function for fetching JPEG raw data stream from JPEG encoder: + 
      +    #PGFJXDECCALLBACK structure
+
      + + Attribute is set only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ + +#define JX_ENC_RAW_JPEG_CAPTURE 26 + +/** JxEncAPI attribute: Set Timeout value + + + Interpretation of associated data block: + 
      +    NvU32 timeout   timeout value
+        0       = no timeout
+        > 0     = timeout value
+
      + + Attribute is set only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ + +#define JX_ENC_TIMEOUT_CONF 27 + +/** JxEncAPI attribute: Stop preview enable/disable. + + Interpretation of associated data block: + 
      +    NvU32 Stop preview mode enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ + +#define JX_ENC_STOP_PREVIEW 28 + + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + Non-rotated JPEG encode. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ + +#define JX_ENC_ROTATE_0 0x0 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode rotated 90 degrees. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATE_90 0x1 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode rotated 180 degrees. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATE_180 0x2 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode rotated 270 degrees. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATE_270 0x3 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode horizontally flipped. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_H_FLIP 0x10 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode vertically flipped. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_V_FLIP 0x20 + +/** Option for attribute #JX_ENC_PARTIAL_ROTATE: Reset and disable partial + rotation. + Pass this to GFJxEncSetAttribute() for attribute #JX_ENC_PARTIAL_ROTATE + to unset the Partial Rotation Flag and reset the PR Engine. + @see #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATE_UNSET 0xff + +typedef void (*GFJX_ENC_CALLBACK)(void *userData); + +/** JxEncAPI interrupt operation types. + Constants to specify operation for a call to GFJxEncInterruptControl(). + @see GFJX_ENC_INTERRUPT_TYPE, GFJxEncInterruptControl() +*/ +typedef enum +{ + /** Enable interrupt/status assertion for an interrupt type. */ + GFJX_ENC_INTERRUPT_ENABLE, + + /** Disable interrupt/status assertion for an interrupt type. */ + GFJX_ENC_INTERRUPT_DISABLE, + + /** Clear interrupt/status assertion for an interrupt type. */ + GFJX_ENC_INTERRUPT_CLEAR, + + /** Query for interrupt/status assertion for an interrupt type. */ + GFJX_ENC_INTERRUPT_QUERY_STATUS, + + /** Set DMA FIFO threshold. */ + GFJX_ENC_INTERRUPT_SET_DMA_FIFO_THRESHOLD, + + /** Get DMA FIFO threshold. */ + GFJX_ENC_INTERRUPT_GET_DMA_FIFO_THRESHOLD, + + /** Set strean buffer threshold. */ + GFJX_ENC_INTERRUPT_SET_BUF_THRESHOLD, + + /** Get strean buffer threshold. */ + GFJX_ENC_INTERRUPT_GET_BUF_THRESHOLD + +} GFJX_ENC_INTERRUPT_OPERATION_TYPE; + + +/** JxEncAPI interrupt types. + @see GFJX_ENC_INTERRUPT_OPERATION_TYPE, GFJxEncInterruptControl() +*/ +typedef enum +{ + /** JPEG read DMA FIFO low threshold. + Interrupt/status is asserted if the JPEG read DMA FIFO status is less + than the JPEG read DMA FIFO threshold value. + */ + GFJX_ENC_DMA_FIFO_LOW_INTR = 0, + + /** JPEG read DMA FIFO high threshold. + Interrupt/status is asserted if the JPEG read DMA FIFO status is + greater than or equal to the JPEG read DMA FIFO threshold value. + */ + GFJX_ENC_DMA_FIFO_HIGH_INTR = 0x1, + + /** Stream buffer threshold interrupt. */ + GFJX_ENC_STREAM_BUF_INTR = 0x2, + + /** Main buffer end hit interrupt. */ + GFJX_ENC_MAIN_BUF_HIT_INTR = 0x4, + + /** Encoding done interrupt. */ + GFJX_ENC_DONE_INTR = 0x8, + + /** Encoded stream transfer done interrupt. */ + GFJX_ENC_TRANSFER_DONE_INTR = 0x10, + + /** Maximum bit count hit interrupt. */ + GFJX_ENC_MAX_BIT_HIT_INTR = 0x20, + + /** Circular buffer overflow interrupt. */ + GFJX_ENC_CIR_BUF_OVERFLOW_INTR = 0x40 + +} GFJX_ENC_INTERRUPT_TYPE; + +/** JxEncAPI virtual function pointer table. */ +typedef struct _GFJXENCTABLE +{ + GF_RETTYPE (* JxEncGetProperty)(GFJxEncHandle hJxEnc, PGFPROPERTY pJXProp); + GF_RETTYPE (* JxEncSetAttribute)(GFJxEncHandle hJxEnc, + NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* JxEncGetAttribute)(GFJxEncHandle hJxEnc, + NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* JxEncStart)(GFJxEncHandle hJxEnc, PGFJXENCSTART pStart); + GF_RETTYPE (* JxEncFetchImage)(GFJxEncHandle hJxEnc, + PGFJXENC_BUF aBuf, NvU32 nBuf, NvU32 *pStatus); + GF_RETTYPE (* JxEncEnd)(GFJxEncHandle hJxEnc); + GF_RETTYPE (* JxEncSetupInterrupt)(GFJxEncHandle hJxEnc, + void (*Inter)(void *), void *IPara); + GF_RETTYPE (* JxEncCapture)(GFJxEncHandle hJxEnc, + PGFJXENC_BUF aBuf, NvU32 nBuf, NvU32 *pStatus); + GF_RETTYPE (* JxEncInterruptControl)(GFJxEncHandle hJxEnc, + GFJX_ENC_INTERRUPT_TYPE IntType, GFJX_ENC_INTERRUPT_OPERATION_TYPE op, + void * pData); + GF_RETTYPE (* JxEncInterruptHandler)(GFJxEncHandle hJxEnc, + GFJX_ENC_INTERRUPT_TYPE IntType, void * pData); // Reserved. + GF_RETTYPE (*JxEncPRComplete)(GFJxEncHandle hJxEnc, + PGFJXENC_BUF inBuf,NvU32 inBufNum,PGFJXENC_BUF outBuf, + NvU32 outBufNum,PGFJXENC_BUF dcacBuf,NvU32 dcacBufNum); + GF_RETTYPE (*JxEncBracket)(GFJxEncHandle hJxEnc, + GFJX_ENC_CALLBACK before, + GFJX_ENC_CALLBACK after, + void *userData); +} GFJXENCTABLE, *PGFJXENCTABLE; + +#ifdef PROJECT_SEC_G1 +// Attribute constant and data structure for EXIF +#define JX_ENC_SET_EXIF_INFO 30 + +typedef struct _GFJXENCEXIFINFO +{ + NvS8 CameraMaker[32]; + NvS8 CameraModel[40]; + NvS8 FirmwareVersion[5]; + NvU32 FNumberNum; + NvU32 FNumberDenom; + NvS32 ExpBiasNum; + NvS32 ExpBiasDenom; + NvU16 WhiteBalance; + NvU32 DigitalZoomNum; + NvU32 DigitalZoomDenom; +} GFJXENCEXIFINFO; +#endif + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFJxEncOpen(GFRmHandle hRm, GFJxEncHandle *phJxEnc, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFJxEncClose(GFJxEncHandle *phJxEnc); + +/* #### JxEnc Helper macros. Maybe useful for backward compatible API. #### */ + +/** @name Functions +@{*/ + +/** This function returns version and capabilities of API and hardware. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param pJXProp (PGFPROPERTY) Pointer to property structure to be filled in + + @retval #GF_SUCCESS \a pJXProp filled in successfully + @retval #GF_ERROR Some error occured + + The #GFPROPERTY structure passed with parameter \a pJXProp will be + filled in on successfull return. The GFPROPERTY::Capability field + will hold a combination of flagbits indicating capabilities specific + to the JxEncAPI: + + + + + + + + + + + + + + + + +
      #GF_JX_ENC_CAP_QTABLE JPEG quantization table is programmable.
      #GF_JX_ENC_CAP_INTERRUPT Interrupt data capture mode and polling mode supported, + if this flag is off then only polling mode is supported.
      #GF_JX_ENC_CAP_DIGITAL_ZOOMDigital zoom supported.
      #GF_JX_ENC_CAP_MOTION_JPEG Motion JPEG mode supported.
      #GF_JX_ENC_CAP_RATE_CONTROLRate control supported.
      #GF_JX_ENC_CAP_422_PLANAR Planar YUV422 data supported.
      #GF_JX_ENC_CAP_ROTATION Rotation supported.
      + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the JxEncAPI functions. + + @see GFPROPERTY +*/ +#define GFJxEncGetProperty(hJxEnc, pJXProp) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncGetProperty(hJxEnc, pJXProp) + +/** Set configuration of a feature of the JPEG encoder hardware. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param uiFeature (NvU32) Feature type identifier, see table. + @param pInfo (NvU32*) Pointer to feature specific input parameter block. + Pointer type will be reinterpreted according to + feature type. + + @retval #GF_SUCCESS Configuration changed successfully + @retval #GF_ERROR Some error occured + + The feature to be set is identified with parameter \a uiFeature, + specific input parameters are passed via a block in parameter \a pInfo. + The contents of this data block is interpreted depending on the + feature to be set. + + The following features are defined, for the data to be provided in + \a pInfo see the individual attribute's documentation. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      \b Attribute \b Direction \b Synopsis
      #JX_ENC_SET_100QUALITYset Choose preset QTable, coefficients in luma + and chroma Qtable are all 1.
      #JX_ENC_SET_85QUALITY set Choose preset QTable, standard Qtable A and B, + divided by 2.
      #JX_ENC_SET_75QUALITY set Choose preset QTable, standard Qtable A and B.
      #JX_ENC_SET_50QUALITY set Choose preset QTable, standard Qtable C and D.
      #JX_ENC_SET_25QUALITY set Choose preset QTable, standard Qtable C and D, + multiplied by 2.
      #JX_ENC_SET_12QUALITY set Choose preset QTable, standard Qtable C and D, + multiplied by 4.
      #JX_ENC_LQTABLE set, getSet custom luma QTable.
      #JX_ENC_CQTABLE set, getSet custom chroma QTable.
      #JX_ENC_FILTER set, getDecimation filter enable/disable.
      #JX_ENC_HUFF_BSTUFF set, getHuffman bit stuffing.
      #JX_ENC_MOTION_JPEG set, getMotion JPEG capturing mode enable/disable.
      #JX_ENC_RAW_DATA set, getRaw data capturing mode enable/disable.
      #JX_ENC_BITSTREAM set Re-encode a JPEG bitstream.
      #JX_ENC_ENCODE_FORMAT set, getJPEG encoding colour format.
      #JX_ENC_MAX_SIZE set, getMaximum JPEG byte size.
      #JX_ENC_FOCAL_POINT set, getCamera focal point.
      #JX_ENC_DEGRADATION set, getImage quality degradation from focal point.
      #JX_ENC_ROTATION set, getJPEG encode rotation and flip control.
      #JX_ENC_PARTIAL_ROTATEset, getRotation and flip control for Partial Rotation API.
      #JX_ENC_BYPASS_FIFO set, getBypass FIFO.
      #JX_ENC_PIECE_MEAL get Piece-Meal encoding.
      #JX_ENC_STOP_PREVIEW set, getStop preview mode enable/disable.
      #JX_ENC_RAW_JPEG_CAPTURE set Fetch Low JPEG bitstream.
      #JX_ENC_RAW_DATA_STREAM set Fetch Low bitstream.
      #JX_ENC_TIMEOUT_CONF set, getSet Timeout value.
      + + Most of the time an application should only set a quantization table for + luminance or chrominance. These quantization tables are in the same format + as standard quantization tables (1 to 255). Other features are hardware + dependent. + + @see GFJxEncGetAttribute() +*/ +#define GFJxEncSetAttribute(hJxEnc, uiFeature, pInfo) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncSetAttribute(hJxEnc, uiFeature, pInfo) + +/** Get current configuration of a feature of the JPEG encoder hardware. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param uiFeature (NvU32) Feature type identifier, + see table in GFJxEncSetAttribute(). + @param pInfo (NvU32*) Pointer to feature specific input parameter block. + Pointer type will be reinterpreted according to + feature type. + + @retval #GF_SUCCESS \a pInfo filled in successfully + @retval #GF_ERROR Some error occured + + @see GFJxEncSetAttribute() +*/ +#define GFJxEncGetAttribute(hJxEnc, uiFeature, pInfo) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncGetAttribute(hJxEnc, uiFeature, pInfo) + +/** Setup JxEncAPI for JPEG encoding. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param pStart (#PGFJXENCSTART) Pointer to #GFJXENCSTART structure for + definition of encode source and destination + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured, check GFJXENCSTART::Error for + detailed error reason code. + + Before starting capture, the application should call this function to setup + the encoder. Once this function has been called, the application can use + GFJxEncCapture() to capture as many frames as desired. JxEncCapture() + starts and optionally fetches data for a frame. JxEncFetchImageData() + fetches the image data to host CPU side. An application should keep calling + it until all encoded data is processed. Finally GFJxEncEnd() has to be + called to release the encoder. + + Parameter \a pStart passes a #GFJXENCSTART structure describing image data + source, source cropping area, and destination size. + + Encoding is from one of the following sources: + - VI (Camera, cropping and scale up/down is done via VxVIPSet(), + Rotation/flip is done via JxEncSelectEPPRotation() ) + - Screen encoding (GC, source is primary surface) + - Bitstream encoding. This is used to re-encode a JPEG bit stream, and + invokes JxDecAPI internally to decode the existing bitstream. + The following options are available for bitstream re-encoding: + - Crop image size + - Scale up + - Change QTables + - Apply rate control + - Rotation (0, 90, 180, 270, H-Flip, V-Flip) + + On failure an error reason code is returned in field GFJXENCSTART::Error of + parameter \a pStart. + + @see GFJXENCSTART, GFJxEncSetAttribute(), GFJxEncCapture(), + GFJxEncFetchImage(), GFJxEncEnd() +*/ +#define GFJxEncStart(hJxEnc, pStart) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncStart(hJxEnc, pStart) + +/** Polls JxEncAPI for data fetch from JPEG encoder. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param aBuf (#PGFJXENC_BUF) Pointer to array of #GFJXENC_BUF structures + @param nBuf (NvU32) Number of pointers passed with \a aBuf. + @param pStatus (NvU32) Returns data fetch status, see table + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Captures the JPEG encoded bit stream in the given application owned + buffers. Capturing the encoded image can be done in polling or interrupt + mode. This function should be called after GFJxEncCapture(). It is usually + called from either the application's fetching poll loop, or the interrupt + callback routine set up with GFJxEncSetupInterrupt(). + + The application must fill all the fields in the referenced buffer + structures and must make sure each PGFJXENC_BUF::nBytesCaptured is set + to 0. The PGFJXENC_BUF::nBytesCaptured field is updated by the JXEncAPI + to show the actual number of bytes captured. JXEncAPI keeps filling the + buffers in the array until it exhausts all the buffers. If all the buffers + are exhausted and there is more data to be copied, the function returns + and sets \a pStatus to #JXENC_MORE_FETCH. The application should then keep + calling GFJxEncFetchImage() to fetch the remaining data. Each buffer in + the array should be a multiple of 64 bytes for best performance. + + The status of the data fetch is returned in \a pStatus as one of the + following reason codes: + + + + + + +
      #JXENC_DATA_COMPLETEAll data of the current frame was + fetched.
      #JXENC_MORE_FETCH Data was fetched only partially. + The application should make more calls to GFJxEncFetchImage() to + fetch the rest.
      #JXENC_NEW_FRAME A new frame was encoded and is ready + to fetch.
      #JXENC_TIME_OUT Timeout on GFJxEncFetchImage +
      + + @see GFJxEncCapture(), GFJxEncSetupInterrupt(), #GFJXENC_BUF +*/ +#define GFJxEncFetchImage(hJxEnc, aBuf, nBuf, pStatus) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncFetchImage(hJxEnc, aBuf, nBuf, pStatus) + +/** Polls JxEncAPI for data fetch from JPEG encoder. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function disables the encoder and releases internal resources related + to the current capture. + + @see GFJxEncStart() +*/ +#define GFJxEncEnd(hJxEnc) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncEnd(hJxEnc) + +/** Register a callback function for fetching encoded JPEG data. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param Inter (void(*)(void *)) Application callback function pointer + @param IPara (void*) Parameter to pass on to application callback function + + @retval #GF_SUCCESS Callback installed successfully + @retval #GF_ERROR Some error occured + + This function can be used to register a callback function for fetching + encoded JPEG data. This function must be called before GFJxEncCapture(). + The callback function must meet the following prototype: + + 
      +    void InterruptCallback(void* lPara);
+
      + + Whenever encoding is triggered, JXEncAPI calls the registered interrupt + callback function, passing on the application defined parameter \a IPara. + + Inside the callback function, the application can call GFJxEncFetchImage() + to portionally fetch the encoded datastream. + + If no callback function shall be used, the application could alternatively + use a polling scheme. + + @see GFJxEncCapture() +*/ +#define GFJxEncSetupInterrupt(hJxEnc, Inter, IPara) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncSetupInterrupt(hJxEnc, Inter, IPara) + +/** Trigger JPEG encoder for one frame and optionally display capture preview. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param aBuf (#PGFJXENC_BUF) Pointer to array #GFJXENC_BUF structures + @param nBuf (NvU32) Number of pointers passed with \a aBuf, if + passing 0 then the function is non-blocking + @param pStatus (NvU32) Returns data fetch status, for reason codes + see table at GFJxEncFetchImage() + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Triggers the JPEG encoder for a frame and optionally displays the same + frame in a preview window in decimated form. + + Encoded data can be fetched via a polling scheme or via an interrupt + handler set up with GFJxEncSetupInterrupt(). In any case + GFJxEncFetchImage() is used to transfer encoded data to application + buffers. + + If application set up an interrupt handler to fetch encoded data, then + \a nBuf should be passed as 0. + + This function can optionally fetch data right after triggering encoding to + buffers provided via \a aBuf. This will block the CPU until all data is + returned or buffer space is exhausted. If \a nBuf is 0, the function + returns right away and \a pStatus is updated to #JXENC_NEW_FRAME to + indicate data is pending. The application should then call + GFJxEncFetchImage() either from an interrupt handler or from same thread to + fetch the encoded/raw data. + + If \a nBuf is not 0, it specifies the number of buffers in the array + \a aBuf. The function will block until it runs out of buffers. It + will return #JXENC_MORE_FETCH in parameter \a pStatus if more data is + available. The application must call GFJxEncFetchImage() to fetch the + remaining data. See GFJxEncFetchImage() for information on return + status codes and how the passed buffers are handled. + + JPEG Encoding from camera or raw data capture from camera happens in + realtime, so if the internal circular buffer in GPU memory is not big + enough then GFJxEncFetchImage() should be called more fequently to empty + the outputBuf and avoid buffer overflows. + + @see GFJxEncSetupInterrupt(), GFJxEncFetchImage(), #GFJXENC_BUF +*/ +#define GFJxEncCapture(hJxEnc, aBuf, nBuf, pStatus) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncCapture(hJxEnc, aBuf, nBuf, pStatus) + +/** JxEncAPI Component-level interrupt control. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param IntType (#GFJX_ENC_INTERRUPT_TYPE) JxEncAPI interrupt type + @param op (#GFJX_ENC_INTERRUPT_OPERATION_TYPE) GFJxEncAPI interrupt + operation + @param pData (void*) Pointer to input or output data block, see table + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GF_ERROR_BAD_PARAMETER Invalid parameters + + The following operations (parameter op) are defined for this call. + + Operation #GFJX_ENC_INTERRUPT_ENABLE + + Enable status/interrupt generation for interrupts of type specified by + \a IntType. + + Depending on the interrupt type additional action and the parameter + \a pData is interpreted as following: + + + + + + + + + + + + + + + + + +
      #GFJX_ENC_DMA_FIFO_LOW_INTR JPEG read DMA FIFO status/interrupt generation is put into low + threshold mode, i.e. interrupt/status is asserted if the JPEG + read DMA FIFO status is less than the threshold value. + + \a pData points to block containing:
      + NvU32 DMA FIFO low threshold value in range 0..15 + + \a pData can be NULL to leave the threshold value unchanged. +
      #GFJX_ENC_DMA_FIFO_HIGH_INTRJPEG read DMA FIFO status/interrupt generation is put into + high threshold mode, i.e. interrupt/status is asserted if the + JPEG read DMA FIFO status is greater than or equal toless than + the threshold value. + + \a pData points to block containing:
      + NvU32 DMA FIFO high threshold value in range 0..15 + + \a pData can be NULL to leave the threshold value unchanged. +
      #GFJX_ENC_STREAM_BUF_INTR \a pData points to block containing:
      + NvU32 JPEG stream buffer threshold value in bytes, must + be multiple of 8 + + \a pData can be NULL to leave the threshold value unchanged. +
      otherwise\a pData is ignored
      + + Operation #GFJX_ENC_INTERRUPT_DISABLE + + Disable status/interrupt generation for interrupts of type specified by + \a IntType. + + Operation #GFJX_ENC_INTERRUPT_CLEAR + + Clear status/interrupt assertion for interrupt of type specified by + \a IntType. + + Operation #GFJX_ENC_INTERRUPT_QUERY_STATUS + + Return current status/interrupt assertion for interrupt of type + specified by \a IntType. The state is returned in the block referenced + by \a pData. + + Interpretation of associated data block \a pData + 
      +        NvU32 Interrupt/status assertion state, one of:
+              GF_INTERRUPT_ON_STATUS_TRUE = asserted
+              GF_INTERRUPT_ON_STATUS_FALSE = not asserted
+
      + + Operation #GFJX_ENC_INTERRUPT_SET_DMA_FIFO_THRESHOLD + + Set DMA FIFO threshold value that controls interrupt/status assertion + for interrupt types #GFJX_ENC_DMA_FIFO_LOW_INTR and + #GFJX_ENC_DMA_FIFO_HIGH_INTR. + + Interpretation of associated data block \a pData + 
      +        NvU32 DMA FIFO threshold value in range 0..15
+
      + + Operation #GFJX_ENC_INTERRUPT_GET_DMA_FIFO_THRESHOLD + + Return DMA FIFO threshold value that controls interrupt/status + assertion for interrupt types #GFJX_ENC_DMA_FIFO_LOW_INTR and + #GFJX_ENC_DMA_FIFO_HIGH_INTR. + + Interpretation of associated data block \a pData + 
      +        NvU32 DMA FIFO threshold value in range 0..15
+
      + + Operation #GFJX_ENC_INTERRUPT_SET_BUF_THRESHOLD + + Set JPEG stream buffer threshold value that controls interrupt/status + assertion for interrupt type #GFJX_ENC_STREAM_BUF_INTR. + + Interpretation of associated data block \a pData + 
      +        NvU32 DMA read buffer threshold value in bytes, must be multiple of 8
+
      + + Operation #GFJX_ENC_INTERRUPT_GET_BUF_THRESHOLD + + Return JPEG stream buffer threshold value that controls + interrupt/status assertion for interrupt type + #GFJX_ENC_STREAM_BUF_INTR. + + Interpretation of associated data block \a pData + 
      +        NvU32 DMA read buffer threshold value in bytes, must be multiple of 8
+
      + + @see GFJX_ENC_INTERRUPT_TYPE, GFJX_ENC_INTERRUPT_OPERATION_TYPE +*/ +#define GFJxEncInterruptControl(hJxEnc, IntType, op, pData)\ + ((PGFJXENCTABLE)hJxEnc)->JxEncInterruptControl(hJxEnc, IntType, op, pData) + +/** Standard interrupt handler for fetching encoded JPEG data. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param IntType (#GFJX_ENC_INTERRUPT_TYPE) JxEncAPI interrupt type + @param pData (void*) Pointer to input or output data block, + depending on \a IntType. See table. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + + + +
      \a IntType Interpretation of \a pData
      #GFJX_ENC_STREAM_BUF_INTR, GFJX_ENC_DONE_INTR#PGFJXENC_FETCH_BUF
      + + Usually this callback is not used, because the interrupt service thread + at the application level can call GFJxEncFetchImage() directly to + complete the task of fetching encoded data. + + @todo clarify + @see GFJxEncFetchImage() +*/ +#define GFJxEncInterruptHandler(hJxEnc, IntType, pData)\ + ((PGFJXENCTABLE)hJxEnc)->JxEncInterruptHandler(hJxEnc, IntType, pData) + +/** Generate final JPEG bitstream from a partially rotated bitstream. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param inBuf (#PGFJXENC_BUF) Pointer to array of #GFJXENC_BUF structs + holding fragmented input bitstream + @param inBufNum (NvU32) Size of array \a inBuf + @param outBuf (#PGFJXENC_BUF) Pointer to array of #GFJXENC_BUF structs + to output fragmented JPEG bitstream + @param outBufNum (NvU32) Size of array \a outBuf + @param dcacBuf (#PGFJXENC_BUF) ? + @param dcacBufNum (NvU32) Size of array \a dcacBuf + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @todo clarify +*/ +#define GFJxEncPRComplete(hJxEnc,inBuf,inBufNum,outBuf,outBufNum,dcacBuf,dcacBufNum)\ + ((PGFJXENCTABLE)hJxEnc)->JxEncPRComplete(hJxEnc,inBuf,inBufNum,outBuf,outBufNum,dcacBuf,dcacBufNum) + +/** Provide callbacks for immediately before and after any encode events. + These will be called by JxEncode() when it is invoked. + Calling this routine a second time will overwrite previously set + values. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param before (#GFJX_ENC_CALLBACK) proc to call before capture + @param after (#GFJX_ENC_CALLBACK) proc to call after capture + @param userData (void *) data to be supplied to before() and + after() when they are invoked. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +#define GFJxEncBracket(hJxEnc, before, after, userData) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncBracket(hJxEnc, before, after, userData) + +/*@}*/ +/*@}*/ + /** @page pageJxEncAppNotes JxEncAPI Application Notes + + @section pageJxEncAppNotes1 Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start GFSDK usage. + The description is for a typical case where encoding of a still image being captured + from a camera is done and preview shown on the display. + + 1. In case of camera encoding, setup the camera & initialize VIP.
      + + 2. Obtain the handle specific to JPEG encoder by calling GFJxEncOpen().
      + + 3. Call GFRmSurfaceAlloc() to allocate one referance surface for encoding purposes.
      + + 4. Call GFJxEncSetAttribute() if specific features need to be set, + such as encoding width, encoding height, rotation, quality factor, etc.
      + + 5. Start the encoding by calling GFJxEncStart().
      + + 6. If the current source image is from the CPU, the application should call GFJxEncFeedImage() + to feed the image to the GFJxEncAPI via GFJxEncCapture().
      + + 7. The application should fetch the encoded stream by calling GFJxEncFetchImage(). + Application should keep it calling till whole encoded data is out.
      + + 8. For exiting, free all relevent resources and call GFJxEncEnd() to free the JPEG encoder component.
      + + */ +#ifdef __cplusplus +} // only need to export C interface if + // used by C++ source code +#endif + +#endif //_GF_JPEG_ENC__ diff --git a/Start_WM/test6/inc/GFMinimalIsp.h b/Start_WM/test6/inc/GFMinimalIsp.h new file mode 100755 index 00000000..5f5546d3 --- /dev/null +++ b/Start_WM/test6/inc/GFMinimalIsp.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2007 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef __GFMINIMALISP_H_ +#define __GFMINIMALISP_H_ + +#include "GF.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +GF_RETTYPE GFMinimalIspOpen(GFRmHandle hRm, GFMinimalIspHandle *phIsp, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMinimalIspClose(GFMinimalIspHandle *phIsp); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/Start_WM/test6/inc/GFMmProc.h b/Start_WM/test6/inc/GFMmProc.h new file mode 100755 index 00000000..1489db73 --- /dev/null +++ b/Start_WM/test6/inc/GFMmProc.h @@ -0,0 +1,1766 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFMmProc.h + GFSDK Multimedia Processor API header file. +*/ + +#ifndef __GFMmProc_H__ +#define __GFMmProc_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupMmProc MmProcAPI Multimedia Processor API +*/ +/*@{*/ + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFMmProcOpen(GFRmHandle hRm, GFMmProcHandle *phMmProc, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMmProcClose(GFRmHandle hRm, GFMmProcHandle *phMmProc); + +//***************************************************************************** +//***************************************************************************** +// +// Packages +// +//***************************************************************************** +//***************************************************************************** + +// +// These defines are used to import or remove functionality within the audio +// engine. +// +//#define GFMMPROC_BASIC_AUDIO + +// +// Adds audio controls to the package beyond basic playback. +// +//#define GFMMPROC_BASIC_AUDIO + +// +// Adds advanced multimedia processing and functionality. +// +// NOTE: Currently the advanced feature set requires the basic level of audio +// support. This requirement may not be present in future revisions. +// +//#define GFMMPROC_BASIC_AUDIO +//#define GFMMPROC_ADVANCED + +// +// Adds 3D audio controls (requires GFMMPROC_ADVANCED). +// +//#define GFMMPROC_BASIC_AUDIO +//#define GFMMPROC_ADVANCED +//#define GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS + +// +// Adds advanced controls (requires GFMMPROC_ADVANCED). +// +//#define GFMMPROC_BASIC_AUDIO +//#define GFMMPROC_ADVANCED +//#define GFMMPROC_ADVANCED_CONTROLS + +// +// Adds global effect audio controls (requires GFMMPROC_ADVANCED_CONTROLS). +// +//#define GFMMPROC_BASIC_AUDIO +//#define GFMMPROC_ADVANCED +//#define GFMMPROC_ADVANCED_CONTROLS +//#define GFMMPROC_ADVANCED_AUDIO_EFFECT_CONTROLS + + +//***************************************************************************** +//***************************************************************************** +// +// Defines +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_BASIC_AUDIO || defined GFMMPROC_ADVANCED +#define GFMMPROC_TIME_UNITS_PER_SECOND 1000000 +#endif + +typedef GF_HANDLE GFMMPROC_OBJECT; + + +//***************************************************************************** +// Object +//***************************************************************************** +// +typedef struct _GFMMPROC_OBJECT_TABLE +{ + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + +} GFMMPROC_OBJECT_TABLE; + +#define GFMMPROC_OBJECT_DEFAULT_STR "Object" +#define GFMMPROC_OBJECT_MANAGER_STR "Manager" +#define GFMMPROC_OBJECT_GLOBAL_MANAGER_STR "GlobalManager" +#define GFMMPROC_OBJECT_PLAYER_STR "Player" +#define GFMMPROC_OBJECT_SOUND_SOURCE_3D_STR "SoundSource3D" +#define GFMMPROC_OBJECT_SPECTATOR_STR "Spectator" +#define GFMMPROC_OBJECT_MODULE_STR "Module" +#define GFMMPROC_OBJECT_MEDIA_PROCESSOR_STR "MediaProcessor" +#define GFMMPROC_OBJECT_CODEC_STR "Codec" + +#define GFMMPROC_CONTROL_DEFAULT_STR "Control" +#define GFMMPROC_CONTROL_MIDI_STR "MIDI" +#define GFMMPROC_CONTROL_PITCH_STR "Pitch" +#define GFMMPROC_CONTROL_RATE_STR "Rate" +#define GFMMPROC_CONTROL_RECORD_STR "Record" +#define GFMMPROC_CONTROL_STOP_TIME_STR "StopTime" +#define GFMMPROC_CONTROL_TEMPO_STR "Tempo" +#define GFMMPROC_CONTROL_TONE_STR "Tone" +#define GFMMPROC_CONTROL_VOLUME_STR "Volume" + +#define GFMMPROC_CONTROL_AUDIO_FORMAT_STR "AudioFormat" +#define GFMMPROC_CONTROL_EFFECT_STR "Effect" +#define GFMMPROC_CONTROL_EFFECT_ORDER_STR "EffectOrder" +#define GFMMPROC_CONTROL_FORMAT_STR "Format" +#define GFMMPROC_CONTROL_MIDI_CHANNEL_STR "MIDIChannel" +#define GFMMPROC_CONTROL_PAN_STR "Pan" +#define GFMMPROC_CONTROL_PRIORITY_STR "Priority" + +#define GFMMPROC_CONTROL_COMMIT_STR "Commit" +#define GFMMPROC_CONTROL_ORIENTATION_STR "Orientation" +#define GFMMPROC_CONTROL_DIRECTIVITY_STR "Directivity" +#define GFMMPROC_CONTROL_DISTANCE_ATTENUATION_STR "DistanceAttenuation" +#define GFMMPROC_CONTROL_DOPPLER_STR "Doppler" +#define GFMMPROC_CONTROL_LOCATION_STR "Location" +#define GFMMPROC_CONTROL_MACROSCOPIC_STR "Macroscopic" +#define GFMMPROC_CONTROL_OBSTRUCTION_STR "Obstruction" +#define GFMMPROC_CONTROL_3DCOEFFICIENTS_STR "3DCoefficients" + +#define GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_STR "AudioVirtualizer" +#define GFMMPROC_CONTROL_EFFECT_ACOUSTIC_ECHO_CANCELLATION_STR "AcousticEchoCancellation" +#define GFMMPROC_CONTROL_EFFECT_SBC_STR "SBC" +#define GFMMPROC_CONTROL_EFFECT_SBR_STR "SBR" +#define GFMMPROC_CONTROL_EFFECT_DRC_STR "DRC" +#define GFMMPROC_CONTROL_EFFECT_CHORUS_STR "Chorus" +#define GFMMPROC_CONTROL_EFFECT_EQUALIZER_STR "Equalizer" +#define GFMMPROC_CONTROL_EFFECT_REVERB_STR "Reverb" +#define GFMMPROC_CONTROL_REVERB_SOURCE_STR "ReverbSource" + + +#define GFMmProcObjectIsInstance(handle, objectType) \ + ((GFMMPROC_OBJECT_TABLE*)handle)->MmProcObjectIsInstance(handle, objectType) + +GF_HANDLE GFMmProcObjectAlloc(GFMmProcHandle component, const char* objectType); +void GFMmProcObjectFree(GF_HANDLE handle); + +#if defined GFMMPROC_BASIC_AUDIO || defined GFMMPROC_ADVANCED + +typedef GF_HANDLE GFMMPROC_STREAM; + +//***************************************************************************** +// Stream +//***************************************************************************** +// +typedef struct _GFMMPROC_STREAM_TABLE +{ + void (*MmProcStreamClose)(GFMMPROC_STREAM handle); + NvS32 (*MmProcStreamGetBuffer)(GFMMPROC_STREAM handle, NvU32 tag, void** descriptor, void** buffer); + void (*MmProcStreamReleaseBuffer)(GFMMPROC_STREAM handle, NvU32 tag, NvU32 status, NvU32 size); + void (*MmProcStreamReset)(GFMMPROC_STREAM handle); + +} GFMMPROC_STREAM_TABLE; + +#define GFMMPROC_STREAM_END_OF_MEDIA 0x00000001 + +#define GFMmProcStreamClose(handle) \ + ((GFMMPROC_STREAM_TABLE*)handle)->MmProcStreamClose(handle) +#define GFMmProcStreamGetBuffer(handle, tag, descriptor, buffer) \ + ((GFMMPROC_STREAM_TABLE*)handle)->MmProcStreamGetBuffer(handle, tag, descriptor, buffer) +#define GFMmProcStreamReleaseBuffer(handle, tag, status, size) \ + ((GFMMPROC_STREAM_TABLE*)handle)->MmProcStreamReleaseBuffer(handle, tag, status, size) +#define GFMmProcStreamReset(handle) \ + ((GFMMPROC_STREAM_TABLE*)handle)->MmProcStreamReset(handle) + +#endif // #if defined GFMMPROC_BASIC_AUDIO || defined GFMMPROC_ADVANCED + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_BASIC_AUDIO +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_BASIC_AUDIO + +typedef GFMMPROC_OBJECT GFMMPROC_CONTROL; +typedef GF_HANDLE GFMMPROC_CONTROLLABLE; +typedef GFMMPROC_OBJECT GFMMPROC_MANAGER; +typedef GFMMPROC_CONTROLLABLE GFMMPROC_PLAYER; +typedef GF_HANDLE GFMMPROC_PLAYER_LISTENER; +typedef GF_HANDLE GFMMPROC_TIME_BASE; +typedef enum { + GFMMPROC_CODEC_TYPE_UNSPECIFIED = 0, + GFMMPROC_CODEC_TYPE_I2S, + GFMMPROC_CODEC_TYPE_AC97 +} GFMMPROC_CODEC_TYPE; + +//***************************************************************************** +// Control +//***************************************************************************** +// +typedef GFMMPROC_OBJECT_TABLE GFMMPROC_CONTROL_TABLE; + + +//***************************************************************************** +// Controllable +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROLLABLE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + GFMMPROC_CONTROL (*MmProcControllableGetControl)(GFMMPROC_CONTROLLABLE handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcControllableGetControls)(GFMMPROC_CONTROLLABLE handle); + +} GFMMPROC_CONTROLLABLE_TABLE; + +#define GFMmProcControllableGetControl(handle, controlType) \ + ((GFMMPROC_CONTROLLABLE_TABLE*)handle)->MmProcControllableGetControl(handle, controlType) +#define GFMmProcControllableGetControls(handle) \ + ((GFMMPROC_CONTROLLABLE_TABLE*)handle)->MmProcControllableGetControls(handle) + + +//***************************************************************************** +// Manager +//***************************************************************************** +// +typedef struct _GFMMPROC_MANAGER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + GFMMPROC_PLAYER (*MmProcManagerCreatePlayer)(GFMMPROC_MANAGER handle, char* locator); +// GFMMPROC_PLAYER (*MmProcManagerCreatePlayerForDataSource)(GFMMPROC_MANAGER handle, DataSource source); + GFMMPROC_PLAYER (*MmProcManagerCreatePlayerForStream)(GFMMPROC_MANAGER handle, GFMMPROC_STREAM stream, char* contentType); + char* (*MmProcManagerGetSupportedContentTypes)(GFMMPROC_MANAGER handle, char* protocol); + char* (*MmProcManagerGetSupportedProtocols)(GFMMPROC_MANAGER handle, char* contentType); + GFMMPROC_TIME_BASE (*MmProcManagerGetSystemTimeBase)(GFMMPROC_MANAGER handle); + void (*MmProcManagerPlayTone)(GFMMPROC_MANAGER handle, NvU32 note, NvU32 duration, NvU32 volume); + void (*MmProcManagerProcess)(GFMMPROC_MANAGER handle); + GFMMPROC_CODEC_TYPE (*MmProcManagerGetCodecType)(GFMMPROC_MANAGER handle); + void (*MmProcManagerCodecWrite)(GFMMPROC_MANAGER handle, NvU32 offset, NvU32 value); + NvU32 (*MmProcManagerCodecRead)(GFMMPROC_MANAGER handle, NvU32 offset); + +} GFMMPROC_MANAGER_TABLE; + +#define GFMMPROC_MANAGER_MIDI_DEVICE_LOCATOR "device://midi" +#define GFMMPROC_MANAGER_TONE_DEVICE_LOCATOR "device://tone" + +#define GFMmProcManagerCreatePlayer(handle, locator) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCreatePlayer(handle, locator) +//#define GFMmProcManagerCreatePlayerForDataSource(handle, source) Add multiline delineator here +// ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCreatePlayerForDataSource(handle, source) +#define GFMmProcManagerCreatePlayerForStream(handle, stream, contentType) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCreatePlayerForStream(handle, stream, contentType) +#define GFMmProcManagerGetSupportedContentTypes(handle, protocol) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerGetSupportedContentTypes(handle, protocol) +#define GFMmProcManagerGetSupportedProtocols(handle, contentType) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerGetSupportedProtocols(handle, contentType) +#define GFMmProcManagerGetSystemTimeBase(handle) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerGetSystemTimeBase(handle) +#define GFMmProcManagerPlayTone(handle, note, duration, volume) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerPlayTone(handle, note, duration, volume) +#define GFMmProcManagerProcess(handle) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerProcess(handle) +#define MmProcManagerGetCodecType(handle) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerGetCodecType(handle) +#define MmProcManagerCodecWrite(handle, offset, value) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCodecWrite(handle, offset, value) +#define MmProcManagerCodecRead(handle, offset) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCodecRead(handle, offset) + + +//***************************************************************************** +// Player +//***************************************************************************** +// +typedef struct _GFMMPROC_PLAYER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Controllable Methods + // + GFMMPROC_CONTROL (*MmProcControllableGetControl)(GFMMPROC_CONTROLLABLE handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcControllableGetControls)(GFMMPROC_CONTROLLABLE handle); + + void (*MmProcPlayerAddPlayerListener)(GFMMPROC_PLAYER handle, GFMMPROC_PLAYER_LISTENER playerListener); + void (*MmProcPlayerClose)(GFMMPROC_PLAYER handle); + void (*MmProcPlayerDeallocate)(GFMMPROC_PLAYER handle); + char* (*MmProcPlayerGetContentType)(GFMMPROC_PLAYER handle); + NvS64 (*MmProcPlayerGetDuration)(GFMMPROC_PLAYER handle); + NvS64 (*MmProcPlayerGetMediaTime)(GFMMPROC_PLAYER handle); + NvU32 (*MmProcPlayerGetState)(GFMMPROC_PLAYER handle); + GFMMPROC_TIME_BASE (*MmProcPlayerGetTimeBase)(GFMMPROC_PLAYER handle); + NvU32 (*MmProcPlayerPrefetch)(GFMMPROC_PLAYER handle); + void (*MmProcPlayerPull)(GFMMPROC_PLAYER handle, NvS32 allow); + void (*MmProcPlayerRealize)(GFMMPROC_PLAYER handle); + void (*MmProcPlayerRemovePlayerListener)(GFMMPROC_PLAYER handle, GFMMPROC_PLAYER_LISTENER playerListener); + void (*MmProcPlayerSetLoopCount)(GFMMPROC_PLAYER handle, NvS32 count); + NvS64 (*MmProcPlayerSetMediaTime)(GFMMPROC_PLAYER handle, NvS64 now); + void (*MmProcPlayerSetTimeBase)(GFMMPROC_PLAYER handle, GFMMPROC_TIME_BASE master); + void (*MmProcPlayerStart)(GFMMPROC_PLAYER handle); + void (*MmProcPlayerStop)(GFMMPROC_PLAYER handle); + +} GFMMPROC_PLAYER_TABLE; + +#define GFMMPROC_PLAYER_UNREALIZED 100 +#define GFMMPROC_PLAYER_REALIZED 200 +#define GFMMPROC_PLAYER_PREFETCHED 300 +#define GFMMPROC_PLAYER_STARTED 400 +#define GFMMPROC_PLAYER_CLOSED 0 +#define GFMMPROC_PLAYER_TIME_UNKNOWN -1 + +#define GFMmProcPlayerAddPlayerListener(handle, playerListener) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerAddPlayerListener(handle, playerListener) +#define GFMmProcPlayerClose(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerClose(handle) +#define GFMmProcPlayerDeallocate(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerDeallocate(handle) +#define GFMmProcPlayerGetContentType(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetContentType(handle) +#define GFMmProcPlayerGetDuration(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetDuration(handle) +#define GFMmProcPlayerGetMediaTime(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetMediaTime(handle) +#define GFMmProcPlayerGetState(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetState(handle) +#define GFMmProcPlayerGetTimeBase(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetTimeBase(handle) +#define GFMmProcPlayerPrefetch(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerPrefetch(handle) +#define GFMmProcPlayerPull(handle, allow) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerPull(handle, allow) +#define GFMmProcPlayerRealize(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerRealize(handle) +#define GFMmProcPlayerRemovePlayerListener(handle, playerListener) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerRemovePlayerListener(handle, playerListener) +#define GFMmProcPlayerSetLoopCount(handle, count) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerSetLoopCount(handle, count) +#define GFMmProcPlayerSetMediaTime(handle, now) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerSetMediaTime(handle, now) +#define GFMmProcPlayerSetTimeBase(handle, master) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerSetMediaTime(handle, master) +#define GFMmProcPlayerStart(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerStart(handle) +#define GFMmProcPlayerStop(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerStop(handle) + + +//***************************************************************************** +// PlayerListener +//***************************************************************************** +// +typedef struct _GFMMPROC_PLAYER_LISTENER_TABLE +{ + void (*MmProcPlayerListenerPlayerUpdate)(GFMMPROC_PLAYER_LISTENER handle, GFMMPROC_PLAYER player, const char* event, void* eventData); + +} GFMMPROC_PLAYER_LISTENER_TABLE; + +#define GFMMPROC_PLAYER_LISTENER_BUFFERING_STARTED "bufferingStarted" +#define GFMMPROC_PLAYER_LISTENER_BUFFERING_STOPPED "bufferingStopped" +#define GFMMPROC_PLAYER_LISTENER_CLOSED "closed" +#define GFMMPROC_PLAYER_LISTENER_END_OF_MEDIA "endOfMedia" +#define GFMMPROC_PLAYER_LISTENER_DEVICE_AVAILABLE "deviceAvailable" +#define GFMMPROC_PLAYER_LISTENER_DEVICE_UNAVAILABLE "deviceUnavailable" +#define GFMMPROC_PLAYER_LISTENER_DURATION_UPDATED "durationUpdated" +#define GFMMPROC_PLAYER_LISTENER_ERROR "error" +#define GFMMPROC_PLAYER_LISTENER_FORMAT_CHANGED "formatChanged" +#define GFMMPROC_PLAYER_LISTENER_RECORD_ERROR "recordError" +#define GFMMPROC_PLAYER_LISTENER_RECORD_STARTED "recordStarted" +#define GFMMPROC_PLAYER_LISTENER_RECORD_STOPPED "recordStopped" +#define GFMMPROC_PLAYER_LISTENER_STARTED "started" +#define GFMMPROC_PLAYER_LISTENER_STOPPED "stopped" +#define GFMMPROC_PLAYER_LISTENER_STOPPED_AT_TIME "stoppedAtTime" +#define GFMMPROC_PLAYER_LISTENER_VOLUME_CHANGED "volumeChanged" + +#define GFMmProcPlayerListenerPlayerUpdate(handle, player, event, eventData) \ + ((GFMMPROC_PLAYER_LISTENER_TABLE*)handle)->MmProcPlayerListenerPlayerUpdate(handle, player, event, eventData) + + +//***************************************************************************** +// TimeBase +//***************************************************************************** +// +typedef struct _GFMMPROC_TIME_BASE_TABLE +{ + NvU32 (*MmProcTimeBaseGetTime)(GFMMPROC_TIME_BASE handle); + +} GFMMPROC_TIME_BASE_TABLE; + +#define GFMmProcTimeBaseGetTime(handle) \ + ((GFMMPROC_TIME_BASE_TABLE*)handle)->MmProcTimeBaseGetTime(handle) + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_BASIC_AUDIO_CONTROLS +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_BASIC_AUDIO_CONTROLS + +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_MIDI; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_PITCH; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_RATE; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_RECORD; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_STOP_TIME; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_TEMPO; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_TONE; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_VOLUME; + + + +//***************************************************************************** +// MIDIControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_MIDI_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32* (*MmProcControlMidiGetBankList)(GFMMPROC_CONTROL_MIDI hande, NvS32 custom); + NvS8 (*MmProcControlMidiGetChannelVolume)(GFMMPROC_CONTROL_MIDI hande, NvU8 channel); + char* (*MmProcControlMidiGetKeyName)(GFMMPROC_CONTROL_MIDI hande, NvS32 bank, NvS32 program, NvS32 key); + NvS32* (*MmProcControlMidiGetProgram)(GFMMPROC_CONTROL_MIDI hande, NvU8 channel); + NvS32* (*MmProcControlMidiGetProgramList)(GFMMPROC_CONTROL_MIDI hande, NvS32 bank); + char* (*MmProcControlMidiGetProgramName)(GFMMPROC_CONTROL_MIDI hande, NvS32 bank, NvS32 program); + NvS32 (*MmProcControlMidiIsBankQuerySupported)(GFMMPROC_CONTROL_MIDI hande); + NvS32 (*MmProcControlMidiLongMidiEvent)(GFMMPROC_CONTROL_MIDI hande, NvS8* data, NvS32 offset, NvS32 length); + void (*MmProcControlMidiShortMidiEvent)(GFMMPROC_CONTROL_MIDI hande, NvS32 type, NvS32 data1, NvS32 data2); + +} GFMMPROC_CONTROL_MIDI_TABLE; + +#define GFMMPROC_CONTROL_MIDI_CONTROL_CHANGE 176 +#define GFMMPROC_CONTROL_MIDI_NOTE_ON 144 + +#define GFMmProcControlMidiGetBankList(handle, custom) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetBankList(handle, custom) +#define GFMmProcControlMidiGetChannelVolume(handle, channel) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetChannelVolume(handle, channel) +#define GFMmProcControlMidiGetKeyName(handle, bank, program, key) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetKeyName(handle, bank, program, key) +#define GFMmProcControlMidiGetProgram(handle, channel) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetProgram(handle, channel) +#define GFMmProcControlMidiGetProgramList(handle, bank) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetProgramList(handle, bank) +#define GFMmProcControlMidiGetProgramName(handle, bank, program) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetProgramName(handle, bank, program) +#define GFMmProcControlMidiIsBankQuerySupported(handle) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiIsBankQuerySupported(handle) +#define GFMmProcControlMidiLongMidiEvent(handle) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiLongMidiEvent(handle, data, offset, length) +#define GFMmProcControlMidiShortMidiEvent(handle, type, data1, data2) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->(handle, type, data1, data2) + + +//***************************************************************************** +// PitchControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_PITCH_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlPitchGetMaxPitch)(GFMMPROC_CONTROL_PITCH handle); + NvS32 (*MmProcControlPitchGetMinPitch)(GFMMPROC_CONTROL_PITCH handle); + NvS32 (*MmProcControlPitchGetPitch)(GFMMPROC_CONTROL_PITCH handle); + NvS32 (*MmProcControlPitchSetPitch)(GFMMPROC_CONTROL_PITCH handle, NvS32 millisemitones); + +} GFMMPROC_CONTROL_PITCH_TABLE; + +#define GFMmProcControlPitchGetMaxPitch(handle) \ + ((GFMMPROC_CONTROL_PITCH_TABLE*)handle)->MmProcControlPitchGetMaxPitch(handle) +#define GFMmProcControlPitchGetMinPitch(handle) \ + ((GFMMPROC_CONTROL_PITCH_TABLE*)handle)->MmProcControlPitchGetMinPitch(handle) +#define GFMmProcControlPitchGetPitch(handle) \ + ((GFMMPROC_CONTROL_PITCH_TABLE*)handle)->MmProcControlPitchGetPitch(handle) +#define GFMmProcControlPitchSetPitch(handle, millisemitones) \ + ((GFMMPROC_CONTROL_PITCH_TABLE*)handle)->MmProcControlPitchSetPitch(handle, millisemitones) + + +//***************************************************************************** +// RateControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_RATE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlRateGetMaxRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateGetMinRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateGetRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateSetRate)(GFMMPROC_CONTROL_RATE handle, NvS32 millirate); + +} GFMMPROC_CONTROL_RATE_TABLE; + +#define GFMmProcControlRateGetMaxRate(handle) \ + ((GFMMPROC_CONTROL_RATE_TABLE*)handle)->MmProcControlRateGetMaxRate(handle) +#define GFMmProcControlRateGetMinRate(handle) \ + ((GFMMPROC_CONTROL_RATE_TABLE*)handle)->MmProcControlRateGetMinRate(handle) +#define GFMmProcControlRateGetRate(handle) \ + ((GFMMPROC_CONTROL_RATE_TABLE*)handle)->MmProcControlRateGetRate(handle) +#define GFMmProcControlRateSetRate(handle, millirate) \ + ((GFMMPROC_CONTROL_RATE_TABLE*)handle)->MmProcControlRateSetRate(handle, millirate) + + +//***************************************************************************** +// RecordControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_RECORD_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlRecordCommit)(GFMMPROC_CONTROL_RECORD handle); + char* (*MmProcControlRecordGetContentType)(GFMMPROC_CONTROL_RECORD handle); + void (*MmProcControlRecordSetRecordLocation)(GFMMPROC_CONTROL_RECORD handle, char* locator); + void (*MmProcControlRecordSetRecordStream)(GFMMPROC_CONTROL_RECORD handle, GFMMPROC_STREAM stream, char* contentType); + NvS32 (*MmProcControlRecordSetRecordSizeLimit)(GFMMPROC_CONTROL_RECORD handle, NvS32 size); + void (*MmProcControlRecordStartRecord)(GFMMPROC_CONTROL_RECORD handle); + void (*MmProcControlRecordStopRecord)(GFMMPROC_CONTROL_RECORD handle); + void (*MmProcControlRecordReset)(GFMMPROC_CONTROL_RECORD handle); + +} GFMMPROC_CONTROL_RECORD_TABLE; + +#define GFMmProcControlRecordCommit(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordCommit(handle) +#define GFMmProcControlRecordGetContentType(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordGetContentType(handle) +#define GFMmProcControlRecordSetRecordLocation(handle, locator) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordSetRecordLocation(handle, locator) +#define GFMmProcControlRecordSetRecordStream(handle, stream, contentType) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordSetRecordStream(handle, stream, contentType) +#define GFMmProcControlRecordSetRecordSizeLimit(handle, size) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordSetRecordSizeLimit(handle, size) +#define GFMmProcControlRecordStartRecord(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordStartRecord(handle) +#define GFMmProcControlRecordStopRecord(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordStopRecord(handle) +#define GFMmProcControlRecordReset(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordReset(handle) + + +//***************************************************************************** +// StopTimeControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_STOP_TIME_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS64 (*MmProcControlStopTimeGetStopTime)(GFMMPROC_CONTROL_STOP_TIME handle); + void (*MmProcControlStopTimeSetStopTime)(GFMMPROC_CONTROL_STOP_TIME handle, NvS64 stopTime); + +} GFMMPROC_CONTROL_STOP_TIME_TABLE; + +#define GFMMPROC_CONTROL_STOP_TIME_RESET -1 + +#define GFMmProcControlStopTimeGetStopTime(handle) \ + (GFMMPROC_CONTROL_STOP_TIME_TABLE*)handle)->MmProcControlStopTimeGetStopTime(handle) +#define GFMmProcControlStopTimeSetStopTime(handle, stopTime) \ + ((GFMMPROC_CONTROL_STOP_TIME_TABLE*)handle)->MmProcControlStopTimeSetStopTime(handle, stopTime) + + +//***************************************************************************** +// TempoControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_TEMPO_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Rate Methods + // + NvS32 (*MmProcControlRateGetMaxRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateGetMinRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateGetRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateSetRate)(GFMMPROC_CONTROL_RATE handle, NvS32 millirate); + + NvS32 (*MmProcControlTempoGetTempo)(GFMMPROC_CONTROL_TEMPO handle); + NvS32 (*MmProcControlTempoSetTempo)(GFMMPROC_CONTROL_TEMPO handle, NvS32 millitempo); + +} GFMMPROC_CONTROL_TEMPO_TABLE; + +#define GFMmProcControlTempoGetTempo(handle) \ + ((GFMMPROC_CONTROL_TEMPO_TABLE*)handle)->MmProcControlTempoGetTempo(handle) +#define GFMmProcControlTempoSetTempo(handle) \ + ((GFMMPROC_CONTROL_TEMPO_TABLE*)handle)->MmProcControlTempoSetTempo(handle, millitempo) + + +//***************************************************************************** +// ToneControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_TONE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlToneSetSequence)(GFMMPROC_CONTROL_TONE handle, NvS8* sequence); + +} GFMMPROC_CONTROL_TONE_TABLE; + +#define GFMMPROC_CONTROL_TONE_VERSION -2 +#define GFMMPROC_CONTROL_TONE_TEMPO -3 +#define GFMMPROC_CONTROL_TONE_RESOLUTION -4 +#define GFMMPROC_CONTROL_TONE_BLOCK_START -5 +#define GFMMPROC_CONTROL_TONE_BLOCK_END -6 +#define GFMMPROC_CONTROL_TONE_PLAY_BLOCK -7 +#define GFMMPROC_CONTROL_TONE_SET_VOLUME -8 +#define GFMMPROC_CONTROL_TONE_REPEAT -9 +#define GFMMPROC_CONTROL_TONE_C4 60 +#define GFMMPROC_CONTROL_TONE_SILENCE -1 + +#define GFMmProcControlToneSetSequence(handle, sequence) \ + ((GFMMPROC_CONTROL_TONE_TABLE*)handle)->MmProcControlToneSetSequence(handle, sequence) + + +//***************************************************************************** +// VolumeControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_VOLUME_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlVolumeGetLevel)(GFMMPROC_CONTROL_VOLUME handle); + NvS32 (*MmProcControlVolumeIsMuted)(GFMMPROC_CONTROL_VOLUME handle); + NvS32 (*MmProcControlVolumeSetLevel)(GFMMPROC_CONTROL_VOLUME handle, NvS32 level); + void (*MmProcControlVolumeSetMute)(GFMMPROC_CONTROL_VOLUME handle, NvS32 mute); + +} GFMMPROC_CONTROL_VOLUME_TABLE; + +#define GFMmProcControlVolumeGetLevel(handle) \ + ((GFMMPROC_CONTROL_VOLUME_TABLE*)handle)->MmProcControlVolumeGetLevel(handle) +#define GFMmProcControlVolumeIsMuted(handle) \ + ((GFMMPROC_CONTROL_VOLUME_TABLE*)handle)->MmProcControlVolumeIsMuted(handle) +#define GFMmProcControlVolumeSetLevel(handle, level) \ + ((GFMMPROC_CONTROL_VOLUME_TABLE*)handle)->MmProcControlVolumeSetLevel(handle, level) +#define GFMmProcControlVolumeSetMute(handle, mute) \ + ((GFMMPROC_CONTROL_VOLUME_TABLE*)handle)->MmProcControlVolumeSetMute(handle, mute) + + +#endif // GFMMPROC_BASIC_AUDIO_CONTROLS + +#endif // GFMMPROC_BASIC_AUDIO + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_ADVANCED +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_ADVANCED + +typedef GF_HANDLE GFMMPROC_MODULE; +typedef GFMMPROC_MODULE GFMMPROC_EFFECT_MODULE; +typedef GFMMPROC_MANAGER GFMMPROC_GLOBAL_MANAGER; +typedef GFMMPROC_CONTROLLABLE GFMMPROC_MEDIA_PROCESSOR; +typedef GF_HANDLE GFMMPROC_MEDIA_PROCESSOR_LISTENER; +typedef GFMMPROC_CONTROLLABLE GFMMPROC_SPECTATOR; +typedef GFMMPROC_MODULE GFMMPROC_SOUND_SOURCE_3D; + + +//***************************************************************************** +// Module +//***************************************************************************** +// +typedef struct _GFMMPROC_MODULE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Controllable Methods + // + GFMMPROC_CONTROL (*MmProcControllableGetControl)(GFMMPROC_CONTROLLABLE handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcControllableGetControls)(GFMMPROC_CONTROLLABLE handle); + + void (*MmProcModuleAddMIDIChannel)(GFMMPROC_MODULE handle, GFMMPROC_PLAYER player, NvS32 channel); + void (*MmProcModuleAddPlayer)(GFMMPROC_MODULE handle, GFMMPROC_PLAYER player); + void (*MmProcModuleRemoveMIDIChannel)(GFMMPROC_MODULE handle, GFMMPROC_PLAYER player, NvS32 channel); + void (*MmProcModuleRemovePlayer)(GFMMPROC_MODULE handle, GFMMPROC_PLAYER player); + +} GFMMPROC_MODULE_TABLE; + +#define GFMmProcModuleAddMIDIChannel(handle, player, channel) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleAddMIDIChannel(handle, player, channel) +#define GFMmProcModuleAddPlayer(handle, player) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleAddPlayer(handle, player) +#define GFMmProcModuleGetControl(handle, controlType) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleGetControl(handle, controlType) +#define GFMmProcModuleGetControls(handle) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleGetControls(handle) +#define GFMmProcModuleRemoveMIDIChannel(handle, player, channel) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleRemoveMIDIChannel(handle, player, channel) +#define GFMmProcModuleRemovePlayer(handle, player) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleRemovePlayer(handle, player) + + +//***************************************************************************** +// EffectModule +//***************************************************************************** +// +typedef GFMMPROC_MODULE_TABLE GFMMPROC_EFFECT_MODULE_TABLE; + + +//***************************************************************************** +// GlobalManager +//***************************************************************************** +// +typedef struct _GFMMPROC_GLOBAL_MANAGER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Manager Methods + // + GFMMPROC_PLAYER (*MmProcManagerCreatePlayer)(GFMMPROC_MANAGER handle, char* locator); +// GFMMPROC_PLAYER (*MmProcManagerCreatePlayerForDataSource)(GFMMPROC_MANAGER handle, DataSource source); + GFMMPROC_PLAYER (*MmProcManagerCreatePlayerForStream)(GFMMPROC_MANAGER handle, GFMMPROC_STREAM stream, char* type); + char* (*MmProcManagerGetSupportedContentTypes)(GFMMPROC_MANAGER handle, char* protocol); + char* (*MmProcManagerGetSupportedProtocols)(GFMMPROC_MANAGER handle, char* contentType); + GFMMPROC_TIME_BASE (*MmProcManagerGetSystemTimeBase)(GFMMPROC_MANAGER handle); + void (*MmProcManagerPlayTone)(GFMMPROC_MANAGER handle, NvU32 note, NvU32 duration, NvU32 volume); + void (*MmProcManagerProcess)(GFMMPROC_MANAGER handle); + GFMMPROC_CODEC_TYPE (*MmProcManagerGetCodecType)(GFMMPROC_MANAGER handle); + void (*MmProcManagerCodecWrite)(GFMMPROC_MANAGER handle, NvU32 offset, NvU32 value); + NvU32 (*MmProcManagerCodecRead)(GFMMPROC_MANAGER handle, NvU32 offset); + + GFMMPROC_EFFECT_MODULE (*MmProcGlobalManagerCreateEffectModule)(GFMMPROC_GLOBAL_MANAGER handle); + GFMMPROC_MEDIA_PROCESSOR (*MmProcGlobalManagerCreateMediaProcessor)(GFMMPROC_GLOBAL_MANAGER handle); + GFMMPROC_SOUND_SOURCE_3D (*MmProcGlobalManagerCreateSoundSource3D)(GFMMPROC_GLOBAL_MANAGER handle); + GFMMPROC_CONTROL (*MmProcGlobalManagerGetControl)(GFMMPROC_GLOBAL_MANAGER handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcGlobalManagerGetControls)(GFMMPROC_GLOBAL_MANAGER handle); + GFMMPROC_SPECTATOR (*MmProcGlobalManagerGetSpectator)(GFMMPROC_GLOBAL_MANAGER handle); + char* (*MmProcGlobalManagerGetSupportedMediaProcessorInputTypes)(GFMMPROC_GLOBAL_MANAGER handle); + NvS32 (*MmProcGlobalManagerGetUnitsPerMeter)(GFMMPROC_GLOBAL_MANAGER handle); + void (*MmProcGlobalManagerSetUnitsPerMeter)(GFMMPROC_GLOBAL_MANAGER handle, NvS32 newScalingFactor); + +} GFMMPROC_GLOBAL_MANAGER_TABLE; + +#define GFMmProcGlobalManagerCreateEffectModule(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerCreateEffectModule(handle) +#define GFMmProcGlobalManagerCreateMediaProcessor(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerCreateMediaProcessor(handle) +#define GFMmProcGlobalManagerCreateSoundSource3D(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerCreateSoundSource3D(handle) +#define GFMmProcGlobalManagerGetControl(handle, controlType) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetControl(handle, controlType) +#define GFMmProcGlobalManagerGetControls(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetControls(handle) +#define GFMmProcGlobalManagerGetSpectator(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetSpectator(handle) +#define GFMmProcGlobalManagerGetSupportedMediaProcessorInputTypes(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetSupportedMediaProcessorInputTypes(handle) +#define GFMmProcGlobalManagerGetUnitsPerMeter(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetUnitsPerMeter(handle) +#define GFMmProcGlobalManagerSetUnitsPerMeter(handle, newScalingFactor) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerSetUnitsPerMeter(handle, newScalingFactor) + + +//***************************************************************************** +// MediaProcessor +//***************************************************************************** +// +typedef struct _GFMMPROC_MEDIA_PROCESSOR_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Controllable Methods + // + GFMMPROC_CONTROL (*MmProcControllableGetControl)(GFMMPROC_CONTROLLABLE handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcControllableGetControls)(GFMMPROC_CONTROLLABLE handle); + + void (*MmProcMediaProcessorAbort)(GFMMPROC_MEDIA_PROCESSOR handle); + void (*MmProcMediaProcessorAddMediaProcessorListener)(GFMMPROC_MEDIA_PROCESSOR handle, + GFMMPROC_MEDIA_PROCESSOR_LISTENER mediaProcessorListener); + void (*MmProcMediaProcessorComplete)(GFMMPROC_MEDIA_PROCESSOR handle); + NvS32 (*MmProcMediaProcessorGetProgress)(GFMMPROC_MEDIA_PROCESSOR handle); + void (*MmProcMediaProcessorRemoveMediaProcessorListener)(GFMMPROC_MEDIA_PROCESSOR handle, + GFMMPROC_MEDIA_PROCESSOR_LISTENER mediaProcessorListener); + void (*MmProcMediaProcessorStart)(GFMMPROC_MEDIA_PROCESSOR handle); + void (*MmProcMediaProcessorStop)(GFMMPROC_MEDIA_PROCESSOR handle); + GFMMPROC_PLAYER (*MmProcMediaProcessorSetInput)(GFMMPROC_MEDIA_PROCESSOR handle, GFMMPROC_STREAM input, char* contentType, NvS32 length); + GFMMPROC_PLAYER (*MmProcMediaProcessorSetOutput)(GFMMPROC_MEDIA_PROCESSOR handle, GFMMPROC_STREAM output, char* contentType); + +} GFMMPROC_MEDIA_PROCESSOR_TABLE; + +#define GFMMPROC_MEDIA_PROCESSOR_UNKNOWN -1 + +#define GFMmProcMediaProcessorAbort(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorAbort(handle) +#define GFMmProcMediaProcessorAddMediaProcessorListener(handle, mediaProcessorListener) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorAddMediaProcessorListener(handle, mediaProcessorListener) +#define GFMmProcMediaProcessorComplete(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorComplete(handle) +#define GFMmProcMediaProcessorGetProgress(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorGetProgress(handle) +#define GFMmProcMediaProcessorRemoveMediaProcessorListener(handle, mediaProcessorListener) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorRemoveMediaProcessorListener(handle, mediaProcessorListener) +#define GFMmProcMediaProcessorStart(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorStart(handle) +#define GFMmProcMediaProcessorStop(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorStop(handle) +#define GFMmProcMediaProcessorSetInput(handle, input, contentType, length) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorSetInput(handle, input, contentType, length) +#define GFMmProcMediaProcessorSetOutput(handle, output, contentType) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorSetOutput(handle, output, contentType) + + +//***************************************************************************** +// MediaProcessorListener +//***************************************************************************** +// +typedef struct _GFMMPROC_MEDIA_PROCESSOR_LISTENER_TABLE +{ + void (*MmProcMediaProcessorListenerMediaProcessorUpdate)(GFMMPROC_MEDIA_PROCESSOR_LISTENER handle, + GFMMPROC_MEDIA_PROCESSOR processor, char* event, + void* eventData); + +} GFMMPROC_MEDIA_PROCESSOR_LISTENER_TABLE; + +#define GFMMPROC_MEDIA_PROCESSOR_LISTENER_PROCESSING_COMPLETED "processingCompleted" +#define GFMMPROC_MEDIA_PROCESSOR_LISTENER_PROCESSING_ERROR "processingError" + +#define GFMmProcMediaProcessorListenerMediaProcessorUpdate(handle, processor, event, eventData) \ + ((GFMMPROC_MEDIA_PROCESSOR_LISTENER_TABLE*)handle)->MmProcMediaProcessorListenerMediaProcessorUpdate(handle, processor, event, eventData) + + +//***************************************************************************** +// Spectator +//***************************************************************************** +// +typedef GFMMPROC_CONTROLLABLE_TABLE GFMMPROC_SPECTATOR_TABLE; + + +//***************************************************************************** +// SoundSource3D +//***************************************************************************** +// +typedef GFMMPROC_MODULE_TABLE GFMMPROC_SOUND_SOURCE_3D_TABLE; + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS + +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_COMMIT; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_ORIENTATION; +typedef GFMMPROC_CONTROL_ORIENTATION GFMMPROC_CONTROL_DIRECTIVITY; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_DISTANCE_ATTENUATION; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_DOPPLER; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_LOCATION; +typedef GFMMPROC_CONTROL_ORIENTATION GFMMPROC_CONTROL_MACROSCOPIC; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_OBSTRUCTION; + +#include "GFAudio.h" + +//***************************************************************************** +// CommitControl +//***************************************************************************** +typedef struct _GFMMPROC_CONTROL_COMMIT_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlCommitCommit)(GFMMPROC_CONTROL_COMMIT handle); + NvS32 (*MmProcControlCommitIsDeferred)(GFMMPROC_CONTROL_COMMIT handle); + void (*MmProcControlCommitSetDeferred)(GFMMPROC_CONTROL_COMMIT handle, NvS32 deferred); + +} GFMMPROC_CONTROL_COMMIT_TABLE; + +#define GFMmProcControlCommitCommit(handle) \ + ((GFMMPROC_CONTROL_COMMIT_TABLE*)handle)->MmProcControlCommitCommit(handle) +#define GFMmProcControlCommitIsDeferred(handle) \ + ((GFMMPROC_CONTROL_COMMIT_TABLE*)handle)->MmProcControlCommitIsDeferred(handle) +#define GFMmProcControlCommitSetDeferred(handle, deferred) \ + ((GFMMPROC_CONTROL_COMMIT_TABLE*)handle)->MmProcControlCommitSetDeferred(handle, deferred) + + + +//***************************************************************************** +// OrientationControl +//***************************************************************************** +typedef struct _GFMMPROC_CONTROL_ORIENTATION_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlOrientationGetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32* frontVector, NvVectorS32* aboveVector); + void (*MmProcControlOrientationSetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32 frontVector, NvVectorS32 aboveVector); + +} GFMMPROC_CONTROL_ORIENTATION_TABLE; + +#define GFMmProcControlOrientationGetOrientation(handle, frontVector, aboveVector) \ + ((GFMMPROC_CONTROL_ORIENTATION_TABLE*)handle)->MmProcControlOrientationGetOrientation(handle, frontVector, aboveVector) +#define GFMmProcControlOrientationSetOrientation(handle, frontVector, aboveVector) \ + ((GFMMPROC_CONTROL_ORIENTATION_TABLE*)handle)->MmProcControlOrientationSetOrientation(handle, frontVector, aboveVector) + + +//***************************************************************************** +// DirectivityControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_DIRECTIVITY_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Orientation Methods + // + void (*MmProcControlOrientationGetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32* frontVector, NvVectorS32* aboveVector); + void (*MmProcControlOrientationSetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32 frontVector, NvVectorS32 aboveVector); + + void (*MmProcControlDirectivityGetParameters)(GFMMPROC_CONTROL_DIRECTIVITY handle, NvVectorS32* vector); + void (*MmProcControlDirectivitySetParameters)(GFMMPROC_CONTROL_DIRECTIVITY handle, + NvS32 minAngle, NvS32 maxAngle, NvS32 rearLevel); + +} GFMMPROC_CONTROL_DIRECTIVITY_TABLE; + +#define GFMmProcControlDirectivityGetParameters(handle, vector) \ + ((GFMMPROC_CONTROL_DIRECTIVITY_TABLE*)handle)->MmProcControlDirectivityGetParameters(handle, vector) +#define GFMmProcControlDirectivitySetParameters(handle, minAngle, maxAngle, rearLevel) \ + ((GFMMPROC_CONTROL_DIRECTIVITY_TABLE*)handle)->MmProcControlDirectivitySetParameters(handle, minAngle, maxAngle, rearLevel) + + +//***************************************************************************** +// DistanceAttenuationControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlDistanceAttenuationGetMaxDistance)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle); + NvS32 (*MmProcControlDistanceAttenuationGetMinDistance)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle); + NvS32 (*MmProcControlDistanceAttenuationGetMuteAfterMax)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle); + NvS32 (*MmProcControlDistanceAttenuationGetRolloffFactor)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle); + void (*MmProcControlDistanceAttenuationSetParameters)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle, + NvS32 minDistance, NvS32 maxDistance, + NvS32 muteAfterMax, NvS32 rolloffFactor); + +} GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE; + +#define GFMmProcControlDistanceAttenuationGetMaxDistance(handle) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationGetMaxDistance(handle) +#define GFMmProcControlDistanceAttenuationGetMinDistance(handle) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationGetMinDistance(handle) +#define GFMmProcControlDistanceAttenuationGetMuteAfterMax(handle) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationGetMuteAfterMax(handle) +#define GFMmProcControlDistanceAttenuationGetRolloffFactor(handle) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationGetRolloffFactor(handle) +#define GFMmProcControlDistanceAttenuationSetParameters(handle, minDistance, maxDistance, muteAfterMax, rolloffFactor) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationSetParameters(handle, minDistance, maxDistance, muteAfterMax, rolloffFactor) + + +//***************************************************************************** +// DopplerControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_DOPPLER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlDopplerGetVelocityCartesian)(GFMMPROC_CONTROL_DOPPLER handle, NvVectorS32* vector); + NvS32 (*MmProcControlDopplerIsEnabled)(GFMMPROC_CONTROL_DOPPLER handle); + void (*MmProcControlDopplerSetEnabled)(GFMMPROC_CONTROL_DOPPLER handle, NvS32 dopplerEnabled); + void (*MmProcControlDopplerSetVelocityCartesian)(GFMMPROC_CONTROL_DOPPLER handle, NvVectorS32 vector); + void (*MmProcControlDopplerSetVelocitySpherical)(GFMMPROC_CONTROL_DOPPLER handle, + NvS32 azimuth, NvS32 elevation, NvS32 radius); + +} GFMMPROC_CONTROL_DOPPLER_TABLE; + +#define GFMmProcControlDopplerGetVelocityCartesian(handle, vector) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerGetVelocityCartesian(handle, vector) +#define GFMmProcControlDopplerIsEnabled(handle) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerIsEnabled(handle) +#define GFMmProcControlDopplerSetEnabled(handle, dopplerEnabled) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerSetEnabled(handle, dopplerEnabled) +#define GFMmProcControlDopplerSetVelocityCartesian(handle, vector) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerSetVelocityCartesian(handle, vector) +#define GFMmProcControlDopplerSetVelocitySpherical(handle, azimuth, elevation, radius) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerSetVelocitySpherical(handle, azimuth, elevation, radius) + + +//***************************************************************************** +// LocationControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_LOCATION_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlLocationGetCartesian)(GFMMPROC_CONTROL_LOCATION handle, NvVectorS32* vector); + void (*MmProcControlLocationSetCartesian)(GFMMPROC_CONTROL_LOCATION handle, NvVectorS32 vector); + void (*MmProcControlLocationSetSpherical)(GFMMPROC_CONTROL_LOCATION handle, NvS32 azimuth, NvS32 elevation, NvS32 radius); + void (*MmProcControlLocationSetCoefficients)(GFMMPROC_CONTROL_LOCATION handle,GFMMPROC_SOUND_SOURCE_3D SS3D,GFMMPROC_SPECTATOR spec, NvS32 CurrVec[],NvS32 TargVec[]); + void (*MmProcControlLocationGetCoefficients)(GFMMPROC_CONTROL_LOCATION handle, void* Coeff); + +} GFMMPROC_CONTROL_LOCATION_TABLE; + +#define GFMmProcControlLocationGetCartesian(handle, vector) \ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationGetCartesian(handle, vector) +#define GFMmProcControlLocationSetCartesian(handle, vector) \ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationSetCartesian(handle, vector) +#define GFMmProcControlLocationSetSpherical(handle, azimuth, elevation, radius) \ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationSetSpherical(handle, azimuth, elevation, radius) +#define GFMmProcControlLocationSetCoefficients(handle, SS3D,spec, CurrVec,TargVec) \ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationSetCoefficients(handle, SS3D,spec, CurrVec,TargVec) +#define GFMmProcControlLocationGetCoefficients(handle,pCoeff)\ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationGetCoefficients(handle,pCoeff) + +//***************************************************************************** +// MacroscopicControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_MACROSCOPIC_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Orientation Methods + // + void (*MmProcControlOrientationGetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32* frontVector, NvVectorS32* aboveVector); + void (*MmProcControlOrientationSetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32 frontVector, NvVectorS32 aboveVector); + + void (*MmProcControlMacroscopicGetSize)(GFMMPROC_CONTROL_MACROSCOPIC handle, NvVectorS32* vector); + void (*MmProcControlMacroscopicSetSize)(GFMMPROC_CONTROL_MACROSCOPIC handle, NvVectorS32 vector); + +} GFMMPROC_CONTROL_MACROSCOPIC_TABLE; + +#define GFMmProcControlMacroscopicGetSize(handle, vector) \ + ((GFMMPROC_CONTROL_MACROSCOPIC_TABLE*)handle)->MmProcControlMacroscopicGetSize(handle, vector) +#define GFMmProcControlMacroscopicSetSize(handle, vector) \ + ((GFMMPROC_CONTROL_MACROSCOPIC_TABLE*)handle)->MmProcControlMacroscopicSetSize(handle, vector) + + +//***************************************************************************** +// ObstructionControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_OBSTRUCTION_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlObstructionGetHFLevel)(GFMMPROC_CONTROL_OBSTRUCTION handle); + NvS32 (*MmProcControlObstructionGetLevel)(GFMMPROC_CONTROL_OBSTRUCTION handle); + void (*MmProcControlObstructionSetHFLevel)(GFMMPROC_CONTROL_OBSTRUCTION handle, NvS32 HFLevel); + void (*MmProcControlObstructionSetLevel)(GFMMPROC_CONTROL_OBSTRUCTION handle, NvS32 level); + +} GFMMPROC_CONTROL_OBSTRUCTION_TABLE; + +#define GFMmProcControlObstructionGetHFLevel(handle) \ + ((GFMMPROC_CONTROL_OBSTRUCTION_TABLE*)handle)->MmProcControlObstructionGetHFLevel(handle) +#define GFMmProcControlObstructionGetLevel(handle) \ + ((GFMMPROC_CONTROL_OBSTRUCTION_TABLE*)handle)->MmProcControlObstructionGetLevel(handle) +#define GFMmProcControlObstructionSetHFLevel(handle, HFLevel) \ + ((GFMMPROC_CONTROL_OBSTRUCTION_TABLE*)handle)->MmProcControlObstructionSetHFLevel(handle, HFLevel) +#define GFMmProcControlObstructionSetLevel(handle, level) \ + ((GFMMPROC_CONTROL_OBSTRUCTION_TABLE*)handle)->MmProcControlObstructionSetLevel(handle, level) + + +#endif // GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS + + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_ADVANCED_CONTROLS +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_ADVANCED_CONTROLS + +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_AUDIO_FORMAT; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_EFFECT; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_EFFECT_ORDER; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_FORMAT; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_MIDI_CHANNEL; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_PAN; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_PRIORITY; + + + +//***************************************************************************** +// FormatControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_FORMAT_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlFormatGetEstimatedBitRate)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetFormat)(GFMMPROC_CONTROL_FORMAT handle); + NvS32 (*MmProcControlFormatGetIntParameterValue)(GFMMPROC_CONTROL_FORMAT handle, char* parameter); + NvS32 (*MmProcControlFormatGetMetadataOverride)(GFMMPROC_CONTROL_FORMAT handle); + NvS32 (*MmProcControlFormatGetMetadataSupportMode)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetStrParameterValue)(GFMMPROC_CONTROL_FORMAT handle, char* parameter); + char* (*MmProcControlFormatGetSupportedFormats)(GFMMPROC_CONTROL_FORMAT handle); + NvS32* (*MmProcControlFormatGetSupportedIntParameterRange)(GFMMPROC_CONTROL_FORMAT handle, char* parameter); + char* (*MmProcControlFormatGetSupportedIntParameters)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetSupportedMetadataKeys)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetSupportedStrParameters)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetSupportedStrParameterValues)(GFMMPROC_CONTROL_FORMAT handle, char* parameter); + void (*MmProcControlFormatSetFormat)(GFMMPROC_CONTROL_FORMAT handle, char* format); + void (*MmProcControlFormatSetMetadata)(GFMMPROC_CONTROL_FORMAT handle, char* key, char* value); + void (*MmProcControlFormatSetMetadataOverride)(GFMMPROC_CONTROL_FORMAT handle, NvS32 override); + void (*MmProcControlFormatSetParameterStr)(GFMMPROC_CONTROL_FORMAT handle, char* parameter, char* value); + NvS32 (*MmProcControlFormatSetParameterInt)(GFMMPROC_CONTROL_FORMAT handle, char* parameter, NvS32 value); + +} GFMMPROC_CONTROL_FORMAT_TABLE; + +#define GFMMPROC_CONTROL_FORMAT_METADATA_NOT_SUPPORTED 0 +#define GFMMPROC_CONTROL_FORMAT_METADATA_SUPPORTED_FIXED_KEYS 1 +#define GFMMPROC_CONTROL_FORMAT_METADATA_SUPPORTED_FREE_KEYS 2 + +#define GFMMPROC_CONTROL_FORMAT_PARAM_BITRATE "bitrate" +#define GFMMPROC_CONTROL_FORMAT_PARAM_BITRATE_TYPE "bitrate type" +#define GFMMPROC_CONTROL_FORMAT_PARAM_BITS_PER_SAMPLE "bits per sample" +#define GFMMPROC_CONTROL_FORMAT_PARAM_CHANNELS "channels" +#define GFMMPROC_CONTROL_FORMAT_PARAM_FRAMERATE "frame rate" +#define GFMMPROC_CONTROL_FORMAT_PARAM_QUALITY "quality" +#define GFMMPROC_CONTROL_FORMAT_PARAM_SAMPLERATE "sample rate" +#define GFMMPROC_CONTROL_FORMAT_PARAM_TRACK "track" +#define GFMMPROC_CONTROL_FORMAT_PARAM_TRACKS_AVAILABLE "tracks available" +#define GFMMPROC_CONTROL_FORMAT_PARAM_VERSION_TYPE "version type" + +#define GFMMPROC_CONTROL_FORMAT_TRACK_ALL -1 +#define GFMMPROC_CONTROL_FORMAT_TRACK_DEFAULT 0 +#define GFMMPROC_CONTROL_FORMAT_TRACK_ONE 1 + + +#define GFMmProcControlFormatGetEstimatedBitRate(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetEstimatedBitRate(handle) +#define GFMmProcControlFormatGetFormat(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetFormat(handle) +#define GFMmProcControlFormatGetIntParameterValue(handle, parameter) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetIntParameterValue(handle, parameter) +#define GFMmProcControlFormatGetMetadataOverride(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetMetadataOverride(handle) +#define GFMmProcControlFormatGetMetadataSupportMode(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetMetadataSupportMode(handle) +#define GFMmProcControlFormatGetStrParameterValue(handle, parameter) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetStrParameterValue(handle, parameter) +#define GFMmProcControlFormatGetSupportedFormats(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedFormats(handle) +#define GFMmProcControlFormatGetSupportedIntParameterRange(handle, parameter) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedIntParameterRange(handle, parameter) +#define GFMmProcControlFormatGetSupportedIntParameters(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedIntParameters(handle) +#define GFMmProcControlFormatGetSupportedMetadataKeys(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedMetadataKeys(handle) +#define GFMmProcControlFormatGetSupportedStrParameters(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedStrParameters(handle) +#define GFMmProcControlFormatGetSupportedStrParameterValues(handle, parameter) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedStrParameterValues(handle, parameter) +#define GFMmProcControlFormatSetFormat(handle, format) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetFormat(handle, format) +#define GFMmProcControlFormatSetMetadata(handle, key, value) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetMetadata(handle, key, value) +#define GFMmProcControlFormatSetMetadataOverride(handle, override) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetMetadataOverride(handle, override) +#define GFMmProcControlFormatSetParameterStr(handle, parameter, value) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetParameterStr(handle, parameter, value) +#define GFMmProcControlFormatSetParameterInt(handle, parameter, value) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetParameterInt(handle, parameter, value) + + + +//***************************************************************************** +// AudioFormatControl +//***************************************************************************** +// +typedef GFMMPROC_CONTROL_FORMAT_TABLE GFMMPROC_CONTROL_AUDIO_FORMAT_TABLE; + + +//***************************************************************************** +// EffectControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + +} GFMMPROC_CONTROL_EFFECT_TABLE; + +#define GFMMPROC_CONTROL_EFFECT_SCOPE_LIVE_ONLY 1 +#define GFMMPROC_CONTROL_EFFECT_SCOPE_RECORD_ONLY 2 +#define GFMMPROC_CONTROL_EFFECT_SCOPE_LIVE_AND_RECORD 3 + +#define GFMmProcControlEffectGetPreset(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectGetPreset(handle) +#define GFMmProcControlEffectGetPresetNames(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectGetPresetNames(handle) +#define GFMmProcControlEffectGetScope(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectGetScope(handle) +#define GFMmProcControlEffectIsEnabled(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectIsEnabled(handle) +#define GFMmProcControlEffectIsEnforced(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectIsEnforced(handle) +#define GFMmProcControlEffectSetEnabled(handle, enable) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectSetEnabled(handle, enable) +#define GFMmProcControlEffectSetEnforced(handle, enforced) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectSetEnforced(handle, enforced) +#define GFMmProcControlEffectSetPreset(handle, preset) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectSetPreset(handle, preset) +#define GFMmProcControlEffectSetScope(handle, scope) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectSetScope(handle, scope) + + +//***************************************************************************** +// EffectOrderControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_ORDER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlEffectOrderGetEffectOrder)(GFMMPROC_CONTROL_EFFECT_ORDER handle, GFMMPROC_CONTROL_EFFECT effect); + GFMMPROC_CONTROL_EFFECT (*MmProcControlEffectOrderGetEffectOrders)(GFMMPROC_CONTROL_EFFECT_ORDER handle); + NvS32 (*MmProcControlEffectOrderSetEffectOrder)(GFMMPROC_CONTROL_EFFECT_ORDER handle, GFMMPROC_CONTROL_EFFECT effect, NvS32 order); + +} GFMMPROC_CONTROL_EFFECT_ORDER_TABLE; + +#define GFMmProcControlEffectOrderGetEffectOrder(handle, effect) \ + ((GFMMPROC_CONTROL_EFFECT_ORDER_TABLE*)handle)->(handle, effect) +#define GFMmProcControlEffectOrderGetEffectOrders(handle) \ + ((GFMMPROC_CONTROL_EFFECT_ORDER_TABLE*)handle)->MmProcControlEffectOrderGetEffectOrders(handle) +#define GFMmProcControlEffectOrderSetEffectOrder(handle, effect, order) \ + ((GFMMPROC_CONTROL_EFFECT_ORDER_TABLE*)handle)->MmProcControlEffectOrderSetEffectOrder(handle, effect, order) + + +//***************************************************************************** +// MIDIChannelControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_MIDI_CHANNEL_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + GFMMPROC_CONTROL (*MmProcControlMidiChannelGetChannelControl)(GFMMPROC_CONTROL_MIDI_CHANNEL handle, char* controlType, NvS32 channel); + GFMMPROC_CONTROL* (*MmProcControlMidiChannelGetChannelControls)(GFMMPROC_CONTROL_MIDI_CHANNEL handle, NvS32 channel); + +} GFMMPROC_CONTROL_MIDI_CHANNEL_TABLE; + +#define GFMmProcControlMidiChannelGetChannelControl(handle, controlType, channel) \ + ((GFMMPROC_CONTROL_MIDI_CHANNEL_TABLE*)handle)->MmProcControlMidiChannelGetChannelControl(handle, controlType, channel) +#define GFMmProcControlMidiChannelGetChannelControls(handle, channel) \ + ((GFMMPROC_CONTROL_MIDI_CHANNEL_TABLE*)handle)->MmProcControlMidiChannelGetChannelControls(handle, channel) + + +//***************************************************************************** +// PanControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_PAN_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlPanGetPan)(GFMMPROC_CONTROL_PAN handle); + NvS32 (*MmProcControlPanSetPan)(GFMMPROC_CONTROL_PAN handle, NvS32 pan); + +} GFMMPROC_CONTROL_PAN_TABLE; + +#define GFMmProcControlPanGetPan(handle) \ + ((GFMMPROC_CONTROL_PAN_TABLE*)handle)->MmProcControlPanGetPan(handle) +#define GFMmProcControlPanSetPan(handle, pan) \ + ((GFMMPROC_CONTROL_PAN_TABLE*)handle)->MmProcControlPanSetPan(handle, pan) + + +//***************************************************************************** +// PriorityControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_PRIORITY_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlPriorityGetPriority)(GFMMPROC_CONTROL_PRIORITY handle); + void (*MmProcControlPrioritySetPriority)(GFMMPROC_CONTROL_PRIORITY handle, NvS32 level); + +} GFMMPROC_CONTROL_PRIORITY_TABLE; + +#define GFMmProcControlPriorityGetPriority(handle) \ + ((GFMMPROC_CONTROL_PRIORITY_TABLE*)handle)->MmProcControlPriorityGetPriority(handle) +#define GFMmProcControlPrioritySetPriority(handle, level) \ + ((GFMMPROC_CONTROL_PRIORITY_TABLE*)handle)->MmProcControlPrioritySetPriority(handle, level) + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_ADVANCED_AUDIO_EFFECT_CONTROLS +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_ADVANCED_AUDIO_EFFECT_CONTROLS + +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_ACOUSTIC_ECHO_CANCELLATION; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_CHORUS; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_EQUALIZER; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_REVERB; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_DRC; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_REVERB_SOURCE; + +//***************************************************************************** +// AudioVirtualizerControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectAudioVirtualizerGetSpread)(GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER handle); + void (*MmProcControlEffectAudioVirtualizerSetSpread)(GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER handle, NvS32 width); + +} GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_TABLE; + +#define GFMmProcControlEffectAudioVirtualizerGetSpread(handle) \ + ((GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_TABLE*)handle)->MmProcControlEffectAudioVirtualizerGetSpread(handle) +#define GFMmProcControlEffectAudioVirtualizerSetSpread(handle, width) \ + ((GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_TABLE*)handle)->MmProcControlEffectAudioVirtualizerSetSpread(handle, width) + + +//***************************************************************************** +// AcousticEchoCancellationControl +//***************************************************************************** +// +typedef GFMMPROC_CONTROL_EFFECT_TABLE GFMMPROC_CONTROL_EFFECT_ACOUSTIC_ECHO_CANCELLATION_TABLE; + +//***************************************************************************** +// SBCControl +//***************************************************************************** +// +typedef GFMMPROC_CONTROL_EFFECT_TABLE GFMMPROC_CONTROL_EFFECT_SBC_TABLE; + +//***************************************************************************** +// SBRControl +//***************************************************************************** +// +typedef GFMMPROC_CONTROL_EFFECT_TABLE GFMMPROC_CONTROL_EFFECT_SBR_TABLE; + + +//***************************************************************************** +// ChorusControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectChorusGetAverageDelay)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetMaxAverageDelay)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetMaxModulationDepth)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetMaxModulationRate)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetMinModulationRate)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetModulationDepth)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetModulationRate)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetWetLevel)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + void (*MmProcControlEffectChorusSetAverageDelay)(GFMMPROC_CONTROL_EFFECT_CHORUS handle, NvS32 delay); + void (*MmProcControlEffectChorusSetModulationDepth)(GFMMPROC_CONTROL_EFFECT_CHORUS handle, NvS32 depth); + void (*MmProcControlEffectChorusSetModulationRate)(GFMMPROC_CONTROL_EFFECT_CHORUS handle, NvS32 rate); + NvS32 (*MmProcControlEffectChorusSetWetLevel)(GFMMPROC_CONTROL_EFFECT_CHORUS handle, NvS32 level); + +} GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE; + +#define GFMmProcControlEffectChorusGetAverageDelay(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetAverageDelay(handle) +#define GFMmProcControlEffectChorusGetMaxAverageDelay(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetMaxAverageDelay(handle) +#define GFMmProcControlEffectChorusGetMaxModulationDepth(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetMaxModulationDepth(handle) +#define GFMmProcControlEffectChorusGetMaxModulationRate(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetMaxModulationRate(handle) +#define GFMmProcControlEffectChorusGetMinModulationRate(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetMinModulationRate(handle) +#define GFMmProcControlEffectChorusGetModulationDepth(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetModulationDepth(handle) +#define GFMmProcControlEffectChorusGetModulationRate(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetModulationRate(handle) +#define GFMmProcControlEffectChorusGetWetLevel(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetWetLevel(handle) +#define GFMmProcControlEffectChorusSetAverageDelay(handle, delay) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusSetAverageDelay(handle, delay) +#define GFMmProcControlEffectChorusSetModulationDepth(handle, depth) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusSetModulationDepth(handle, depth) +#define GFMmProcControlEffectChorusSetModulationRate(handle, rate) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusSetModulationRate(handle, rate) +#define GFMmProcControlEffectChorusSetWetLevel(handle, level) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusSetWetLevel(handle, level) + + +//***************************************************************************** +// EqualizerControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectEqualizerGetBand)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 frequency); + NvS32 (*MmProcControlEffectEqualizerGetBandLevel)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 band); + NvS32 (*MmProcControlEffectEqualizerGetBass)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + NvS32 (*MmProcControlEffectEqualizerGetCenterFreq)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 band); + NvS32 (*MmProcControlEffectEqualizerGetMaxBandLevel)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + NvS32 (*MmProcControlEffectEqualizerGetMinBandLevel)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + NvS32 (*MmProcControlEffectEqualizerGetNumberOfBands)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + NvS32 (*MmProcControlEffectEqualizerGetTreble)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + void (*MmProcControlEffectEqualizerSetBandLevel)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 level, NvS32 band); + NvS32 (*MmProcControlEffectEqualizerSetBass)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 level); + NvS32 (*MmProcControlEffectEqualizerSetTreble)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 level); + NvS32 (*MmProcControlEffectEqualizerSetBandX)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 *levelptr); + +} GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE; + +#define GFMMPROC_CONTROL_EFFECT_EQUALIZER_UNDEFINED -1004 + +#define GFMmProcControlEffectEqualizerGetBand(handle, frequency) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->(handle, frequency) +#define GFMmProcControlEffectEqualizerGetBandLevel(handle, band) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetBandLevel(handle, band) +#define GFMmProcControlEffectEqualizerGetBass(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetBass(handle) +#define GFMmProcControlEffectEqualizerGetCenterFreq(handle, band) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetCenterFreq(handle, band) +#define GFMmProcControlEffectEqualizerGetMaxBandLevel(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetMaxBandLevel(handle) +#define GFMmProcControlEffectEqualizerGetMinBandLevel(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetMinBandLevel(handle) +#define GFMmProcControlEffectEqualizerGetNumberOfBands(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetNumberOfBands(handle) +#define GFMmProcControlEffectEqualizerGetTreble(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetTreble(handle) +#define GFMmProcControlEffectEqualizerSetBandLevel(handle, level, band) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerSetBandLevel(handle, level, band) +#define GFMmProcControlEffectEqualizerSetBass(handle, level) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerSetBass(handle, level) +#define GFMmProcControlEffectEqualizerSetTreble(handle, level) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerSetTreble(handle, level) +#define GFMmProcControlEffectEqualizerSetBandX(handle, levelptr) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerSetBandX(handle, levelptr) + + +//***************************************************************************** +// Dynamic Range Control (DRC) +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_DRC_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectDRCGetDRCEnable)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetDRCEnable)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); + NvS32 (*MmProcControlEffectDRCGetNoiseGateTh)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetNoiseGateTh)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); + NvS32 (*MmProcControlEffectDRCGetLowerCompTh)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetLowerCompTh)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); + NvS32 (*MmProcControlEffectDRCGetUpperCompTh)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetUpperCompTh)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); + NvS32 (*MmProcControlEffectDRCGetClipTh)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetClipTh)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); +} GFMMPROC_CONTROL_EFFECT_DRC_TABLE; + +#define GFMmProcControlEffectDRCGetDRCEnable(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetDRCEnable(handle) +#define GFMmProcControlEffectDRCSetDRCEnable(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetDRCEnable(handle, Param) +#define GFMmProcControlEffectDRCGetNoiseGateTh(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetNoiseGateTh(handle) +#define GFMmProcControlEffectDRCSetNoiseGateTh(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetNoiseGateTh(handle, Param) +#define GFMmProcControlEffectDRCGetLowerCompTh(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetLowerCompTh(handle) +#define GFMmProcControlEffectDRCSetLowerCompTh(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetLowerCompTh(handle, Param) +#define GFMmProcControlEffectDRCGetUpperCompTh(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetUpperCompTh(handle) +#define GFMmProcControlEffectDRCSetUpperCompTh(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetUpperCompTh(handle, Param) +#define GFMmProcControlEffectDRCGetClipTh(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetClipTh(handle) +#define GFMmProcControlEffectDRCSetClipTh(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetClipTh(handle, Param) + + + + +//***************************************************************************** +// ReverbControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_REVERB_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectReverbGetReverbLevel)(GFMMPROC_CONTROL_EFFECT_REVERB handle); + NvS32 (*MmProcControlEffectReverbGetReverbTime)(GFMMPROC_CONTROL_EFFECT_REVERB handle); + NvS32 (*MmProcControlEffectReverbSetReverbLevel)(GFMMPROC_CONTROL_EFFECT_REVERB handle, NvS32 level); + void (*MmProcControlEffectReverbSetReverbTime)(GFMMPROC_CONTROL_EFFECT_REVERB handle, NvS32 time); + +} GFMMPROC_CONTROL_EFFECT_REVERB_TABLE; + +#define GFMmProcControlEffectReverbGetReverbLevel(handle) \ + ((GFMMPROC_CONTROL_EFFECT_REVERB_TABLE*)handle)->MmProcControlEffectReverbGetReverbLevel(handle) +#define GFMmProcControlEffectReverbGetReverbTime(handle) \ + ((GFMMPROC_CONTROL_EFFECT_REVERB_TABLE*)handle)->MmProcControlEffectReverbGetReverbTime(handle) +#define GFMmProcControlEffectReverbSetReverbLevel(handle, level) \ + ((GFMMPROC_CONTROL_EFFECT_REVERB_TABLE*)handle)->MmProcControlEffectReverbSetReverbLevel(handle, level) +#define GFMmProcControlEffectReverbSetReverbTime(handle, time) \ + ((GFMMPROC_CONTROL_EFFECT_REVERB_TABLE*)handle)->MmProcControlEffectReverbSetReverbTime(handle, time) + + +//***************************************************************************** +// ReverbSourceControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_REVERB_SOURCE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlReverbSourceGetRoomLevel)(GFMMPROC_CONTROL_REVERB_SOURCE handle); + void (*MmProcControlReverbSourceSetRoomLevel)(GFMMPROC_CONTROL_REVERB_SOURCE handle, NvS32 level); + +} GFMMPROC_CONTROL_REVERB_SOURCE_TABLE; + +#define GFMMPROC_CONTROL_REVERB_SOURCE_DISCONNECT -2147483648 + +#define GFMmProcControlReverbSourceGetRoomLevel(handle) \ + ((GFMMPROC_CONTROL_REVERB_SOURCE_TABLE*)handle)->MmProcControlReverbSourceGetRoomLevel(handle) +#define GFMmProcControlReverbSourceSetRoomLevel(handle, level) \ + ((GFMMPROC_CONTROL_REVERB_SOURCE_TABLE*)handle)->MmProcControlReverbSourceSetRoomLevel(handle, level) + + + +#endif // GFMMPROC_ADVANCED_AUDIO_EFFECT_CONTROLS + +#endif // GFMMPROC_ADVANCED_CONTROLS + +#endif // GFMMPROC_ADVANCED + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/Start_WM/test6/inc/GFMxDec.h b/Start_WM/test6/inc/GFMxDec.h new file mode 100755 index 00000000..78cc7c5c --- /dev/null +++ b/Start_WM/test6/inc/GFMxDec.h @@ -0,0 +1,727 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. +* +* NVIDIA Corporation and its licensors retain all intellectual property +* and proprietary rights in and to this software, related documentation +* and any modifications thereto. Any use, reproduction, disclosure or +* distribution of this software and related documentation without an +* express license agreement from NVIDIA Corporation is strictly prohibited. +*/ + +/** @file GFMxDec.h +GFSDK MPEG Decode API header file. +*/ + +#ifndef _GF_MPEG_DEC__ +#define _GF_MPEG_DEC__ + +#include "nvtypes.h" +#include "GFVx.h" +#include "GFDef.h" + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif + + /** @addtogroup groupMxDec MxDecAPI MPEG Decode API +
        +
      • @ref pageMxDecAppNotes +
          +
        • @ref pageMxDecAppNotes1 +
        +
      + */ + /*@{*/ + + /****************************************************************************************************/ + // MXDECCapFlags + /** MxDecAPI property flag: Support for Simple Profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_SIMPLE 0x00000001 + /** MxDecAPI property flag: Support for simple profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ + +#define GF_MXDEC_CAP_SCALE 0x00000002 + /** MxDecAPI property flag: Support for simple scale profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ + +#define GF_MXDEC_CAP_CORE 0x00000004 + /** MxDecAPI property flag: Support for CORE profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ + +#define GF_MXDEC_CAP_MAIN 0x00000008 + /** MxDecAPI property flag: Support for MAIN profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ + + /** MxDecAPI property flag: Support for N_bit profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_N_BIT 0x00000010 + + /** MxDecAPI property flag: Support for LEVEL 1. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_LEVEL1 0x00000100 + + /** MxDecAPI property flag: Support for LEVEL 2. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_LEVEL2 0x00000200 + + /** MxDecAPI property flag: Support for LEVEL 3. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_LEVEL3 0x00000400 + + /** MxDecAPI property flag: Support for LEVEL 4. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_LEVEL4 0x00000800 + + /** MxDecAPI property flag: Support for Post Processing's de-blocking. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_DB 0x00001000 + + /** MxDecAPI property flag: Support for Post Processing's de-ringing. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_DR 0x00002000 + + /****************************************************************************************************/ + /** This structure holds the video object plane (VOP) information. */ + typedef struct _GFMXDECVOP + { + NvU32 uiVOPinfo; /**< Set new VOP information */ + NvU32 uiFFORWARD; /**< FCODE_FORWARD, ignore this value if it is I frame */ + PGFRMSURFACE pRef; /**< Reference VOP, ignore this item, if current VOP is an I */ + PGFRMSURFACE pCur; /**< Current VOP */ + PGFRECT pRefRect; /**< Specifies a rectangular area within the pRef surface for the + GFMxDecAPI to use with the reference image. This field only takes + effect when MXDEC_VOP_SPECIFY_REFSURF_RECT is set. The rectangle’s + top and left should be aligned by the application, which should call + GFMxDecGetAttribute() with MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT + and MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT to get the required + alignment. The rectangle's width and height should exactly match the + image width and height that is encoded in the bit stream. */ + + PGFRECT pCurRect; /**< Specifies a rectangular area of the pCur surface within which the + GFMxDecAPI should place the decoded image output. This field only takes + effect if MXDEC_VOP_SPECIFY_CURSURF_RECT is set. The rectangle’s top and + left should be aligned by the application, which should call GFMxDecGetAttribute() + with MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT and + MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT to get the required alignment. + The rectangle's width and height should exactly match the image width and + height that is encoded in the bit stream. */ + }GFMXDECVOP, *PGFMXDECVOP; + + /****************************************************************************************************/ + //uiVOPinfo values + /** GFMXDECVOP::uiVOPinfo : If set, this is P VOP. If unset, it is I VOP. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_P_VOP 0x1 + + /** GFMXDECVOP::uiVOPinfo : This parameter comes as a part of the bitstream. + This indicates that rounding should be performed while doing Motion Compensation. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_ROUNDING_ONE 0x2 + + /** GFMXDECVOP::uiVOPinfo : If set, this bitstream is short video header format. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_SHORT_HEADER 0x4 + + /** GFMXDECVOP::uiVOPinfo : If set, If this flag is set, pRefSurfRect must be set. + GFMxDec will reference image in pRefSurfRect area of pRef surface. Otherwise, GFMxDec will reference the whole pRef surface area. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_SPECIFY_REFSURF_RECT 0x8 + + /** GFMXDECVOP::uiVOPinfo : If this flag is set, pCurSurfRect must be set. GFMxDec will output decoded image to + pCurSurfRect area of pCur surface. Otherwise, GFMxDec will output to pCur surface starting from top left corner , the width and + height are equal to pCur surface width and height. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_SPECIFY_CURSURF_RECT 0x10 + + /****************************************************************************************************/ + /** This structure holds the postprocessing information. */ + typedef struct _GFMXDECPP + { + PGFRMSURFACE* pDestSurf; /**< Pointer to an array of surfaces that will hold the result from Post Processing + pointer to an array of surfaces to accommodate auto post processing. */ + PGFRMSURFACE* pSrcSurf; /**< Pointer to an array of surfaces to be post processed pointer to an array of surfaces + to accommodate auto post processing. */ + PGFRECT pRect; /**< Rectangular area to be processed for both source and destination surfaces. + @see GFRECT */ + NvU32 numofDestSurf; /**< Number of Destination Surfaces. If MXDEC_PP_AUTO flag is set, this parameter must be filled. */ + NvU32 numofSrcSurf; /**< Number of Source Surfaces. If MXDEC_PP_AUTO flag is set, this parameter must be filled. */ + NvU8 * lpQuantiser; /**< Pointer to array of quantization steps (QPs) for macroblocks in + the source VOP. The GFMxDecAPI automatically saved the last + two decoded VOP’s QP tables. The application may not need to + reload the table if it can make sure the source VOP is one of the + last decoded VOPs. This field must be filled if + MXDEC_PP_RELOAD_QUANTIZER is set. */ + NvU32 PPOption; /**< Post-processing option. */ + /**< + + + + + + + + + + +
      #MXDEC_PP_DB_ONTurn on DeBlocking filter for this frame
      #MXDEC_PP_DR_ONTurn on DeRinging filter for this frame
      #MXDEC_PP_AUTOAuto trigger Post Processing by Hardware
      #MXDEC_PP_RELOAD_QUANTIZERReload the source VOP's qunantizers
      #MXDEC_PP_OP_ASYNCEnables ASYNC mode
      + */ + } GFMXDECPP, *PGFMXDECPP; + + /****************************************************************************************************/ + // PPOption + /** GFMXDECPP::PPOption : Turn on DeBlocking filter for this frame. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_DB_ON 0x1 + + /** GFMXDECPP::PPOption : Turn on DeRinging filter for this frame. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_DR_ON 0x2 + + /** GFMXDECPP::PPOption : Auto trigger Post Processing by Hardware. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_AUTO 0x4 + + /** GFMXDECPP::PPOption : Reload the source VOP's qunantizers. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_RELOAD_QUANTIZER 0x8 + + /** GFMXDECPP::PPOption : enables ASYN mode. GFMxDecPostProcessing() + will return after pushing the commands but without waiting for them to + complete. This option is useful to achieve some paralellism because + post-processed frame is usually not used right away for rendering. So + there is enough time for hardware to complete the decoding before this + frame will be used by app. It is ok to call PostProcessing even when + decoding of this frame is not complete. Inside GPU, hardware synchronizes + with the decoder. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_OP_ASYNC 0x00000010 + + /****************************************************************************************************/ + //pStatus + /** Argument pStatus in GFMxDecGetStatus() : GFMxDecGetStatus() can be called by the application to indicate whether 1 frame + has been decoded or not. + @see GFMXDECTABLE::MxDecGetStatus */ +#define GF_DECODER_FRAME_DONE 0x00000010 + + /** Argument pStatus in GFMxDecGetStatus() : GFMxDecGetStatus() can be called by the application to indicate whether post-processing + engine is done with the frame or not. + @see GFMXDECTABLE::MxDecGetStatus */ +#define GF_DECODER_PP_FRAME_DONE 0x00000020 + + /****************************************************************************************************/ + /** GFMxDecSet::uiFeature : Application sets this attribute to register a callback function and + its correpnding parameter to read bitstream data */ +#define MXDEC_SET_READBITSTREAM 1 + + /** GFMxDecSet::uiFeature Application needs to set this flag in order to send MPEG4 bitstream data in Prefill Mode; + When this is set: + - application does not need to register any bitstream-read callback function as data will be fed upfront. + - application needs to set an attribute MXDEC_ATTR_PRE_DETERMINED_BOUNDARY to indicate that data will be fed on frame boundary. + @see GFMXDECTABLE::MxDecSet */ +#define GFMXDEC_OPTION_PREFILLBUFFER 0x00000002 + + /****************************************************************************************************/ + /** Structure holding the callback function pointer. + Used in registering the callback function + The callback function is a function which the API calls to request a portion of the bit stream from the application. + @see GFMXDECTABLE::MxDecSet + */ + typedef struct _GFMXDECCALLBACK + { + void *pPara; /**< pPara is a parameter passed from application and the application + wants the API to callback with this parameter. */ + NvU32 (*pCallBack)(void * pPara, NvU8 ** ppBuffer, NvS32 * BufferLength, NvU32 uFlag); + /**< + Application callback function pointer. + Register a callback function for fetching MPEG stream data. + + If application set MXDEC_ATTR_PRE_DETERMINED_BOUNDARY, application should + return MXDEC_BOUNDARY_REACHED when the boundary is detected. + If APP does not set MXDEC_ATTR_PRE_DETERMINED_BOUNDARY, 0 should be returned. + + @param *pPara Parameter to pass on to application callback function + @param ppBuffer Buffer Pointer + @param BufferLength Parameter to pass on to application callback function + @param uFlag Flag for reading bitstream backward/forward. + + + + + +
      #MXDEC_READ_BITSTREAM_FORWARDRead bitstream in forward direction
      #MXDEC_READ_BITSTREAM_BACKWARDRead bitstream in backward direction
      + + @retval The number of bytes read successfully, 0 if no bytes read. + */ + }GFMXDECCALLBACK, *PGFMXDECCALLBACK; + + /****************************************************************************************************/ + /** Returned by application when MXDEC_ATTR_PRE_DETERMINED_BOUNDARY is set and boundary is detected. */ +#define MXDEC_BOUNDARY_REACHED 0x00000001 + + // for backward/forward reading bitstream flags + /** Read bitstream in forward direction. + @see GFMXDECCALLBACK + */ +#define MXDEC_READ_BITSTREAM_FORWARD 0x00000002 + + /** Read bitstream in backward direction. + @see GFMXDECCALLBACK + */ +#define MXDEC_READ_BITSTREAM_BACKWARD 0x00000003 + + /****************************************************************************************************/ + //uiVOLinfo + /** GFMXDECMP4SETVOL::uiVOLinfo : If set indicates that VOL is in short header format. + @see GFMXDECMP4SETVOL*/ +#define MXDEC_MP4_SET_SHORT_HEADER 0x00000001 + + /****************************************************************************************************/ + /** This structure hold information of the PreFill buffer. + */ + typedef struct _GFMXDECPREFILLBUFFER + { + NvU8* pPreFillBuffer; /**< Input, Prefill buffer pointer filled by application. */ + NvU32 PreFillBufferLength; /**< Input, Length of pref-fill buffer. */ + NvU32 PreFillBufferBytesConsumed; /**< Output, Amount of bytes consumed by the component. */ + NvU32 prefill_enabled; /**< Flag to identify if prefill buffer is supplied by application. */ + } GFMXDECPREFILLBUFFER; + + /****************************************************************************************************/ + /** This structure hold the information needed for decoding a Video Object Layer (VOL). + @see GFMXDECTABLE::MxDecMP4DecVOL */ + typedef struct _GFMXDECMP4DECVOL + { + NvU32 uiVOLinfo; /**< Indicates format of the VOL. Set by API. */ + /**< + + + + + + + + + + + + + + + + + + +
      #MXDEC_MP4_SHORT_HEADERShort header format detected
      #MXDEC_MP4_DATA_PARTITIONData Partitioning mode detected
      #MXDEC_MP4_PROFILE_LEVELProfile and level field is valid
      #MXDEC_MP4_PRIORITYPriority field is valid
      #MXDEC_MP4_VSOTYPEVisual object type field is valid
      #MXDEC_MP4_VIDEO_SIGNALVideoFormat and VideoRange fields are valid
      #MXDEC_MP4_COLOR_DESCRIPTIONColor, Transfer and Matrix fields are valid
      #MXDEC_MP4_VOIDVObjectID field is valid
      #MXDEC_MP4_VOLIDVOLID field is valid
      + */ + NvU32 uiWidth; /**< Display width, set by API */ + NvU32 uiHeight; /**< Display height, set by API */ + unsigned int Profile; /**< Mpeg4 Profile. Set by API.*/ + /**< + + +
      #MXDEC_MP4_SIMPLE_PROFILEProfile is simple profile
      #MXDEC_MP4_ADVANCE_SIMPLE_PROFILEProfile is advance simple profile
      + */ + unsigned int Level; /**< Mpeg4 Level. Set by API. */ + unsigned int VObjectID; /**< Video Object ID. Set by API. */ + unsigned int VOLID; /**< Video Object Layer ID. Set by API. */ + unsigned int Priority; /**< Priority(of what (???)). Set by API. */ + unsigned int VSOType; /**< VSO(full form(???)) Type. Set by API. */ + unsigned int VideoFormat; /**< Video Format (what are the possible values (???)). Set by API. */ + unsigned int VideoRange; /**< Video Range. Set by API. */ + unsigned int Color; /**< Color primaries. */ + unsigned int Transfer; /**< Transfer charateristics. */ + unsigned int Matrix; /**< Matrix coefficients(???). */ + GFMXDECPREFILLBUFFER prefill; + }GFMXDECMP4DECVOL, *PGFMXDECMP4DECVOL; + + /****************************************************************************************************/ + //uiVOLinfo + /** GFMXDECMP4DECVOL::uiVOLinfo : Short header format detected. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_SHORT_HEADER 0x00000001 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Data Partitioning mode detected. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_DATA_PARTITION 0x00000002 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Profile and level field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_PROFILE_LEVEL 0x00000004 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Priority field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_PRIORITY 0x00000008 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Visual object type field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_VSOTYPE 0x00000010 + + /** GFMXDECMP4DECVOL::uiVOLinfo : VideoFormat and VideoRange fields are valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_VIDEO_SIGNAL 0x00000020 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Color, Transfer and Matrix fields are valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_COLOR_DESCRIPTION 0x00000040 + + /** GFMXDECMP4DECVOL::uiVOLinfo : VObjectID field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_VOID 0x00000080 + + /** GFMXDECMP4DECVOL::uiVOLinfo : VOLID field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_VOLID 0x00000100 + + /****************************************************************************************************/ + //Profile + /** GFMXDECMP4DECVOL::Profile : Profile is simple profile. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_SIMPLE_PROFILE 0x00000000 + + /** GFMXDECMP4DECVOL::Profile : Profile is advance simple profile. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_ADVANCE_SIMPLE_PROFILE 0x00000009 + + /****************************************************************************************************/ + //resync options + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next nearest VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEAREST_VOL 0x1 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next nearest VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEAREST_VOP 0x2 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next nearest I-VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEAREST_I_VOP 0x4 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEXT_VOL 0x8 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEXT_VOP 0x10 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next I-VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEXT_I_VOP 0x20 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous nearest VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_NEAREST_VOL 0x40 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous nearest VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_NEAREST_VOP 0x80 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous nearest I-VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_NEAREST_I_VOP 0x100 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_PREVIOUS_VOL 0x200 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_PREVIOUS_VOP 0x400 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous I-VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_PREVIOUS_I_VOP 0x800 + + /****************************************************************************************************/ + /** This structure hold the information needed for decoding a Video Object Plane (VOP). + @see GFMXDECTABLE::MxDecMP4DecVOP */ + typedef struct _GFMXDECMP4DECVOP + { + PGFRMSURFACE pRef; /**< Reference VOP, ignore this item, if current VOP is an I. Set by application. */ + PGFRMSURFACE pCur; /**< Current VOP. Set by application. */ + PGFRECT pRefRect; /**< Reference rectangle. Set by application. + pRefRect specifies a rectangle area for GFMxDec to reference the reference image. + This rectangle area should be within the pRef surface. The rectangle top, left should + be aligned by application. Application should call GFMxDecGetAttribute() with + MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT and MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT + attributions to get the required alignment. This rectangle's width and height should + exactly match with the image width and height which has been coded in bit stream. If + pRefRect is NULL, GFMxDec will use pRef surface width and height as reference image dimension. + */ + PGFRECT pCurRect; /**< Current rectangle. Set by application. + pCurRect specifies a rectangle area for GFMxDec to output the decoded image. + This field only take effect when MXDEC_MP4_DEC_VOP_SPECIFY_REFSURF_RECT flag is set. + This rectangle area should be within the pCur surface. The rectangle top, left should be + aligned by application. Application should call GFMxDecGetAttribute() with + MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT and MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT + attributions to get the required alignment. This rectangle's width and height should exactly + match with the image width and height which has been coded in bit stream. If pCurRect is NULL, + GFMxDec will use pCur surface dimension as decoded image dimension. + */ + NvU32 uiVOPinfo; /**< Get current VOP information. Set by API. + + +
      #MXDEC_MP4_VOP_PVOP is coded as P-VOP
      #MXDEC_MP4_NOT_CODEDVOP is not coded
      (???)What about I-VOP?(???)
      + */ + NvU32 uiTimeStamp; /**< Time to display this VOP, in milliseconds. Set by API. */ + NvU8 *pMBInfo; /**< Pointer to array where information of whether the MB is decoded or not is stored. + Each element will tell if this corresponding MB is wrong. Set by API. */ + NvU32 uiVOPOption; /**< Must be used to set ASYNC option */ + + GFMXDECPREFILLBUFFER prefill; + }GFMXDECMP4DECVOP, *PGFMXDECMP4DECVOP; + + /** GFMXDECMP4DECVOP::uiVOPOption: enables ASYNC mode. GFMxDecMP4DecVOP() + will return after pushing the commands but without waiting for them to + complete. This option is useful to achieve some paralellism because + decoded frame is usually not used right away for rendering. So + there is enough time for hardware to complete the decoding before this + frame will be used by app. It is ok to call PostProcessing even when + decoding of this frame is not complete. Inside GPU, hardware synchronizes + with the decoder. */ +#define MXDEC_MP4DECVOP_OP_ASYNC 0x00000001 + + + /****************************************************************************************************/ + //uiVOPinfo + /** GFMXDECMP4DECVOP::uiVOPinfo : VOP is coded as P-VOP. + @see GFMXDECMP4DECVOP */ +#define MXDEC_MP4_VOP_P 0x00000001 + + /** GFMXDECMP4DECVOP::uiVOPinfo : VOP is not coded. + @see GFMXDECMP4DECVOP */ +#define MXDEC_MP4_NOT_CODED 0x00000002 //Not coded VOP + + /****************************************************************************************************/ + //when GF_ERROR is return check the following flag + /** This flag is set when atleast one MB is wrong. If application has setup pMBinfo, it can check which MB is wrong. */ +#define MXDEC_MP4_BAD_MB 0x00010000 + + /****************************************************************************************************/ + +#define MXDEC_ATTR_PRE_DETERMINED_BOUNDARY 0x00000001 + /**< MxDecAPI Attribute : Application will determine the decoding boundary, for MPEG4, this boundary means VOL + and VOP boundary. For certain file formats, those boundary information are stored in the video file, application + can easily use those information to determine the boundary. If APP wants API to detect the boundary, application + should not disable this attribute. This is mainly for streaming case, where application does not have those handy + boundary information. API will automatically detect those boundaries. Application does not need to parse the + bitstream to detect those boundaries.\n + Value to be passed to GFMxDecSetAttribute for setting this attribute: + +
      *pInfo == 1Application will determine the decoding boudary
      *pInfo == 0Application will not determine the decoding boudary
      + @see GFMXDECTABLE::MxDecSetAttribute + */ + +#define MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT 0x00000002 + /**< MxDecAPI Attribute : This attribute only can be used for GFMxDecGetAttribute. If application wants to set pDestRect + in GFMXDECVOP or GFMXDECMP4DECVOP, application must use this attribute to get alignment information and align the rectangle + top & left corner accordingly. Value returned by GFMxDecGetAttribute:\n + *pInfo: Top field alignment in term of lines + @see GFMXDECTABLE::MxDecGetAttribute + */ + +#define MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT 0x00000003 + /**< MxDecAPI Attribute : This attribute only can be used for GFMxDecGetAttribute. If application wants to set pDestRect + in GFMXDECVOP or GFMXDECMP4DECVOP, application must use those attributes to get alignment information and align the rectangle + top & left corner accordinately. Value returned by GFMxDecGetAttrubute:\n + *pInfo: left field alignment in term of pixels + @see GFMXDECTABLE::MxDecGetAttribute + */ + +#define GF_MXDEC_ATTR_DEC_ENABLE_RAISE_WAIT 0x00000004 + /**< MxDecAPI Attribute : This attribute only can be used for GFMxDecSetAttribute. + Value passed to GFMxDecSetAttribute:\n + + + + + +
      *pInfo == 1Raisevectors are allocated per Surface.\n + There will be 2 (3 if PostProcessing is ON) sets of raise-wait happening\n + 1) Decoder raises On_Frame_Decoded, and VxBlt waits.\n + 2) (If enabled in APP) PostProcessing API raises On_PP_Frame_Done, and VxBlt waits.\n + 3) VxBlt raises On_Bltted, and Decoder waits.
      *pInfo == 0 (Default)We do not allocate surface raise vectors but a single raise vector.\n + 1) In Decoder, we poll Frame_done, and return only after its done.\n + 2) In PostProcessing we poll PP_Frame_done, and return only after its done.\n + 3) It is observed that Frame_done & PP_Frame_done bits are affected only if raise is done on those.\n + Thats why single raise vector is still needed. This raise vector is not in any suface but in MxDecHandle.
      + @see GFMXDECTABLE::MxDecSetAttribute + */ + +#define MXDEC_ATTR_DISABLE_EC 0x00000005 + /**< MxDecAPI Attribute : Application can disable Error Concealment (EC) by setting this attribute. By default, EC is enabled. + Decoder has The Error Robustness (ER) and Concealment (EC) for mpeg4 decoding. + + Error Robustness (Always ON) : + The ER means the code will detect any error in the bitstream at proper places and will still proceed ahead for decoding the + remaining stream, for posible non-errored data. + + Error Concealment (Default ON): Can be disabled by this very attribute MXDEC_ATTR_DISABLE_EC. + EC means, the decoder will try to use previously decoded information to simulate the lost data. The below steps of EC: + + Lost Motion Vector recovery and concealment: + 1. Rational interpolation: Predict the lost MV from the current frame + 2. Use MV from prev frame + 3. Use MV from step 3 and 4, to reconstruct 2 sets of the texture data for lost MB. + + @see GFMXDECTABLE::MxDecSetAttribute */ + +#define MXDEC_ATTR_MP4_DEC_GET_MBERR_MAP_MATRIX 0x00000006 + /**< MxDecAPI Attribute : This attribute only can be used for GFMxDecGetAttribute. If application wants to get MB error map for + till recently decoded frame. Input parameter is a character array pMBErrMapMatrix of size "number of MBs in a frame". On returning + this call fills this char array with 1s & 0s. 1: MB correctly decoded & 0: MB corrupted. This is cumulative err map till this call + is made. In this API call after copying the err map to the char array, internal map is resit to all clean MBs. \n + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU8 * pMBErrMapMatrix
+
      + @see GFMXDECTABLE::MxDecGetAttribute + */ + + /****************************************************************************************************/ + + /** Typesafe function for opening this component. + + @param hRm (GFRmHandle) Handle specific to Resource Manager API + @param phMxDec (GFMxDecHandle *) Pointer to handle specific to MxDecAPI + @param state (GF_STATE_TYPE) The state is used to decide if a new ChHandle is to be allocated for MxDec component or not. + The values that state can take are: + + + +
      #GF_STATE_DEFAULT
      #GF_STATE_NEW_OR_SHARE
      #GF_STATE_NEW_ONLY
      #GF_STATE_SHARE_ONLY
      + + @param hCh (GFRmChHandle) Resource Manager Channel Handle + + @retval GF_SUCCESS : If successful + @retval GF_ERROR : If error occured + */ + /**< Typesafe functions for opening and closing this component. + This API also checks for hardware resources needed through GFRmHwResourceConstraint(). + Trying to open a second video instance will fail due to existing open context. + */ + +GF_RETTYPE GFMxDecOpen(GFRmHandle hRm, GFMxDecHandle *phMxDec, + GF_STATE_TYPE state, GFRmChHandle hCh); + + /** Typesafe function for opening this component. + + @param phMxDec (GFMxDecHandle *) Pointer to handle specific to MxDecAPI + + Close the video instance. + */ +void GFMxDecClose(GFMxDecHandle *phMxDec); + +GF_RETTYPE GFMxDecGetProperty (GFMxDecHandle MxHandle, PGFPROPERTY pMXProp); +GF_RETTYPE GFMxDecPostProcessing (GFMxDecHandle pdec, PGFMXDECPP pP); +GF_RETTYPE GFMxDecSetAttribute (GFMxDecHandle pdec, NvU32 uiFeature, NvU32 *pInfo); +GF_RETTYPE GFMxDecGetAttribute (GFMxDecHandle pdec, NvU32 uiFeature, NvU32 *pInfo); +GF_RETTYPE GFMxDecSet (GFMxDecHandle pdec, NvU32 uiFeature, void *pInfo); +GF_RETTYPE GFMxDecMP4DecVOL (GFMxDecHandle pdec, PGFMXDECMP4DECVOL pVOL); +GF_RETTYPE GFMxDecMP4DecVOP (GFMxDecHandle pdec, PGFMXDECMP4DECVOP pVOP); +GF_RETTYPE GFMxDecMP4DecResync (GFMxDecHandle pdec, NvU32 ResyncOption); + + //return value +#define GFMXDEC_ERROR_NOT_SUPPORT_FORMAT (GFMXD_ERROR | 0x00000001) + /**< This error is returned when the input file format is not supported by the decoder. */ +#define GFMXDEC_ERROR_HEADER_DAMAGED (GFMXD_ERROR | 0x00000002) + /**< This error is returned when the header of the mpeg4 stream is damaged. */ +#define GFMXDEC_ERROR_NO_VOL_HEADER (GFMXD_ERROR | 0x00000003) + /**< This error is returned when no Video Object Layer (VOL) header is detected. */ +#define GFMXDEC_ERROR_NOT_ENOUGH_SYSTEM_MEM (GFMXD_ERROR | 0x00000004) + /**< This error is returned when system is out of memory. */ + + //return value +#define GFMXDEC_ERROR_DETECTED_VOL (GFMXD_ERROR | 0x00000005) + /**< This error is returned when VOL was detected while decoding VOP. */ +#define GFMXDEC_ERROR_END_OF_FILE (GFMXD_ERROR | 0x00000006) + /**< This error is returned when end of file is reached. */ +#define GFMXDEC_ERROR_CORRUPTED_VOP (GFMXD_ERROR | 0x00000007) + /**< This error is returned when the VOP is corrupted and cannot be recovered. */ + + //return value +#define GFMXDEC_ERROR_RESYNC_END_OF_FILE (GFMXD_ERROR | 0x00000008) + /**< This error is returned when end of file is reached while looking for resync marker. */ +#define GFMXDEC_ERROR_RESYNC_DETECTED_VOL (GFMXD_ERROR | 0x00000009) + /**< This error is returned when a VOL start is detected while searching for VOP resync marker. */ +#define GFMXDECMP4_DSP_TIMEOUT (GFMXD_ERROR | 0x00000010) + /**< This error is returned when DSP does not return anything for a predetermined timeout period. This error indicates possibility of DSP hang. */ +#define GFMXDEC_ERROR_START_CODE (GFMXD_ERROR | 0x00000011) + /**< This error is returned when no start code is found in a chunk of data. */ + + /*@}*/ + + /** @page pageMxDecAppNotes MxDecAPI Application Notes + @section pageMxDecAppNotes1 Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start + GFSDK usage. + + + 1. Initialize the display panel by using GFRmIxInit().\n + + 2. Open the display component by calling GFDxOpen() to get the GFMxDecAPI Dxhandle.\n + + 3. Initialize the display start address, stride and bits per pixel using GFDxSetDisplay().\n + + 4. Get the various attributes of the display panel (width, height, etc) using GFDxGetAttribute().\n + + 5. For clearing the screen, open the graphics component using GFGxOpen() and use GFGxFillRect() for filling the screen with + some color (say, black).\n + + 6. Open the FDev component for performing file I/O using GFFDevOpen() and mount it using GFFDevMount().\n + + 7. Open the Vx component using GFVxOpen() and get the GFVxAPI VxHandle. \n + + 8. Query the properties with GFVxGetProperty() to see whether this GFVxAPI version supports MPEG decoding.\n + + 9. If it supports MPEG decoding, call GFMxDecOpen() to get the GFMxDecAPI MxHandle.\n + + 10. Call GFMxDecGetProperty() to query properties. Check whether this GFMxDAPI version can support the desired + MPEG profile and level.\n + + 11. If the properties check out, call GFRmSurfaceAlloc() to allocate at least one reference surface and one + current surface for decoding purposes.\n + + 12. If the postprocessing engine is needed, allocate one surface to hold the postprocessing results.\n + + 13. For display purposes, the decoder application could call GFVxBlt() for the following two scenarios. \n + (a) Performing color space conversion and then a stretch blit to the primary surface directly. \n + (b) Blitting to the overlay surface.\n + Please refer to the latest GFVxAPI document for additional information. \n + + 14. The decoder application should decode VOP-by-VOP. Call GFMxDecSetVOP() to set up the VOP’s characteristics.\n + + 15. After the decoder application has decoded enough macroblocks, call GFMxDecSetMBs() to trigger the hardware + to decode those macroblocks until all macroblocks in the current VOP are finished. GFMxDecSetMBs() may initiate + the postprocessing engine or video engine automatically.\n + + 16. Before exiting the application, the decoder application should call GFRmSurfaceFree() to free the surfaces + that have been allocated. \n + + 17. Call GFMxClose() with the MxHandle to release the resources of the decoder module.\n + + 18. Similarly, call the close functions of the other components which have been opened.\n + + */ + +#ifdef __cplusplus +} // only need to export C interface if +// used by C++ source code +#endif + +#endif + diff --git a/Start_WM/test6/inc/GFMxDecH264.h b/Start_WM/test6/inc/GFMxDecH264.h new file mode 100755 index 00000000..351ca7ca --- /dev/null +++ b/Start_WM/test6/inc/GFMxDecH264.h @@ -0,0 +1,1536 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. +* +* NVIDIA Corporation and its licensors retain all intellectual property +* and proprietary rights in and to this software, related documentation +* and any modifications thereto. Any use, reproduction, disclosure or +* distribution of this software and related documentation without an +* express license agreement from NVIDIA Corporation is strictly prohibited. +*/ + +/** @file GFMxDecH264.h +GFSDK H264 Decode API header file. +*/ + +#ifndef _GF_MPEG_DEC_H264__ +#define _GF_MPEG_DEC_H264__ + +#include "nvtypes.h" +#include "GFVx.h" +#include "GFDef.h" + +#ifdef __cplusplus +extern "C" { +#endif + + /** @addtogroup groupMxDecH264 MxDecH264API H264 Decode API + + The H.264/AVC decoder API handles H.264/AVC baseline-compliant bit + streams for this version, but has been defined to handle all of the three + profiles for future expansion. + + The H.264/AVC decoder API has two sets of API—a high level API and a low + level API. + + Using the High Level API + + The high level API has a built-in entropy decoder. It decodes the bit stream + and performs error concealment if the bit stream has an error. This high level + API calls the low level API internally. When using the high level API, the + application can ignore the low level API. + + The MxDecH264API high level functions include the following: + - GFMxDecH264DecSequence() + - GFMxDecH264DecPicture() + - GFMxDecH264Set() + - GFMxDecH264DecSEI() + - GFMxDecH264DecNewFrameNum() + + Using the Low Level API + + The low level API is essentially a macroblock decoder engine. It decodes + macroblock by macroblock. When using the low level API, the application + needs to handle the entropy decoding and error concealment. The low level + API assumes that the information passed from caller is correct, and does not + have any error concealment functionality build in. The application which + called the low level API must make sure that no macroblocks are missing for + any picture. + + The MxDecH264API low level functions include the following: + - GFMxDecH264SetSequence() + - GFMxDecH264SetPicture() + - GFMxDecH264SetSlice() + - GFMxDecH264SetMBs() + + Application Notes + +
        +
      • @ref pageMxDecH264AppNotes +
          +
        • @ref pageMxDecH264AppNotes1 +
        • @ref pageMxDecH264AppNotes2 +
        +
      + */ + /*@{*/ + + /** MxDecH264API property flag: Baseline profile supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_BASELINE 0x00000001UL + + /** MxDecH264API property flag: Main profile supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_MAIN 0x00000002UL + + /** MxDecH264API property flag: Extended profile supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_EXTENDED 0x00000004UL + + /** MxDecH264API property flag: LEVEL 1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL10 0x00000100UL + + /** MxDecH264API property flag: LEVEL 1.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL11 0x00000200UL + + /** MxDecH264API property flag: LEVEL 1.2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL12 0x00000400UL + + /** MxDecH264API property flag: LEVEL 1.3 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL13 0x00000800UL + + /** MxDecH264API property flag: LEVEL 2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL20 0x00001000UL + + /** MxDecH264API property flag: LEVEL 2.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL21 0x00002000UL + + /** MxDecH264API property flag: LEVEL 2.2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL22 0x00004000UL + + /** MxDecH264API property flag: LEVEL 3 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL30 0x00008000UL + + /** MxDecH264API property flag: LEVEL 3.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL31 0x00010000UL + + /** MxDecH264API property flag: LEVEL 3.2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL32 0x00020000UL + + /** MxDecH264API property flag: LEVEL 4 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL40 0x00040000UL + + /** MxDecH264API property flag: LEVEL 4.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL41 0x00080000UL + + /** MxDecH264API property flag: LEVEL 4.2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL42 0x00100000UL + + /** MxDecH264API property flag: LEVEL 5 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL50 0x00200000UL + + /** MxDecH264API property flag: LEVEL 5.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL51 0x00400000UL + + /** MxDecH264API property flag: Post Processing de-blocking supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_DB 0x01000000UL + + /** MxDecH264API property flag: Post Processing de-ringing supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_DR 0x02000000UL + + /** VUI Parameters for GFMXDECH264DECSEQUENCE + */ + typedef struct _GFMXDECH264DECVUI + { + NvU32 num_units_in_tick; + NvU32 time_scale; + NvU32 fixed_frame_rate_flag; + }GFMXDECH264DECVUI, *PGFMXDECH264DECVUI; + + /** Parameter structure for MxDecH264DecSequence(). + Both input and output parameters are passed via this structure to MxDecH264DecSequence(). + @see MxDecH264DecSequence() + */ + typedef struct _GFMXDECH264DECSEQUENCE + { + NvU32 uiSequenceOption; /**< Input flags, see GFMXDECH264_DECSEQUENCEOPTION_* */ + NvU32 SequenceInfo; /**< Output flags, see GF_MXDEC_H264_DEC_SEQUENCE_* */ + NvU16 profile_idc; /**< Output, H264 profile ID */ + NvU16 level_idc; /**< Output, H264 level ID */ + NvU16 seq_parameter_set_id;/** PicOrderCnt(CurrPic) + Greater than 1 specifies that the pan-scan rectangle information persists until + - A new coded video sequence begins + - A picture in an access unit containing a pan-scan rectangle SEI message with the + same value of pan_scan_rect_id is output having + (PicOrderCnt() > PicOrderCnt(CurrPic)) && (PicOrderCnt()<= PicOrderCnt(CurrPic) + pan_scan_rect_repetition_period ) + */ + } GFMXDECH264DECSEIPANSCAN, *PGFMXDECH264DECSEIPANSCAN; + + typedef struct _GFMXDECH264DECSEISUBSEQLAYER + { + NvU32 num_sub_seq_layers_minus1; /**< Output, Specifies the number of sub-sequence layers in the sequence */ + NvU32 accurate_statistics_flag; /**< Output, This flag when equal to 1 indicates that the values of average_bit_rate and + average_frame_rate are rounded from statistically correct values. + When equal to 0 indicates that the average_bit_rate and the average_frame_rate are estimates + and may deviate somewhat from the correct values. + */ + NvU32 average_bit_rate; /**< Output, Indicates the average bit rate in units of 1000 bits per second. */ + NvU32 average_frame_rate; /**< Output, Indicates the average frame rate in units of frames/(256 seconds). */ + } GFMXDECH264DECSEISUBSEQLAYER, *PGFMXDECH264DECSEISUBSEQLAYER; + + typedef struct _GFMXDECH264DECSEISUBSEQ + { + NvU32 sub_seq_layer_num; /**< Output, Identifies the sub-sequence layer number of the target sub-sequence */ + NvU32 sub_seq_id; /**< Output, Identifies the target sub-sequence. */ + NvU32 duration_flag; /**< Output, Equal to 0 indicates that the duration of the target sub-sequence is not specified. */ + NvU32 sub_seq_duration; /**< Output, Specifies the duration of the target sub-sequence in clock ticks of a 90-kHz clock. */ + NvU32 average_rate_flag; /**< Output, equal to 0 indicates that the average bit rate and the average frame rate of the target + sub-sequence are unspecified + */ + NvU32 accurate_statistics_flag; /**< Output, Same as accurate_statistics_flag in _GFMXDECH264DECSEISUBSEQLAYER*/ + NvU32 average_bit_rate; /**< Output, Indicates the average bit rate in (1000 bits)/second of the target sub-sequence.*/ + NvU32 average_frame_rate; /**< Output, Indicates the average frame rate in units of frames/(256 seconds) of the target sub-sequence.*/ + NvU32 num_referenced_subseqs; /**< Output, Specifies the number of sub-sequences that contain pictures that are used as reference pictures + for inter prediction in the pictures of the target sub-sequence. + */ + NvU32 ref_sub_seq_layer_num; + NvU32 ref_sub_seq_id; + NvU32 ref_sub_seq_direction; /**< Output, ref_sub_seq_layer_num, ref_sub_seq_id, and ref_sub_seq_direction identify the sub-sequence + that contains pictures that are used as reference pictures for inter prediction in the pictures + of the target sub-sequence. + */ + } GFMXDECH264DECSEISUBSEQ, *PGFMXDECH264DECSEISUBSEQ; + + + + /** ulBitMask, ulBitpayloadType: Application will set the corresponding bit of ulBitMask depending upon its requirement of the + particular payload type of SEI Message. + H264 Decoder API will set the corresponding bit of ulBitpayloadType depending upon the availability of the + particular payload type indicated by ulBitMask flag in the SEI NAL unit. + + @see ulBitpayloadType, ulBitMask in _GFMXDECH264DECSEI + */ + + /** Bit 0: SEI message for buffering period. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_BUFFERING_PERIOD 0x00000001UL + + /** Bit 1: SEI message for picture timing. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_PICTURE_TIMING 0x00000002UL + + /** Bit 2: SEI message for Pan Scan Rect. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_PAN_SCAN 0x00000004UL + + /** Bit 11: SEI message for Sequence Layer Characterization. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_SEQ_LAYER_CHARECTERIZATION 0x00000800UL + + /** Bit 12: SEI message for Sequence Characterization. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_SEQ_CHARECTERIZATION 0x00001000UL + + /** Parameter structure for MxDecH264DecSEI(). + Both input and output parameters are passed via this structure to MxDecH264DecSEI(). + @see MxDecH264DecSEI() + */ + typedef struct _GFMXDECH264DECSEI + { + NvU32 payloadType; /**< Output, Specifies the type of SEI payload */ + NvU32 payloadSize; /**< Output, Specifies the number of bytes in SEI payload */ + GFMXDECH264DECSEIBUFFERINGPERIOD buffperiod; /**< Output, Complete information after parsing the buffering period message of SEI NAL unit + GFMXDECH264DECSEIBUFFERINGPERIOD structure + */ + GFMXDECH264DECSEIPICTIMING pictiming; /**< Output, Complete information after parsing the pic_timing message of SEI NAL unit + GFMXDECH264DECSEIPICTIMING structure + */ + GFMXDECH264DECSEIPANSCAN panscan; /**< Output, Complete information after parsing the Pan Scan message of SEI NAL unit + GFMXDECH264DECSEIPANSCAN structure + */ + GFMXDECH264DECSEISUBSEQLAYER subseqlayer; /**< Output, Complete information after parsing the sub-Seqlayer message of SEI NAL unit + GFMXDECH264DECSEISUBSEQLAYER structure + */ + GFMXDECH264DECSEISUBSEQ subseq; /**< Output, Complete information after parsing the sub-Seqlayer message of SEI NAL unit + GFMXDECH264DECSEISUBSEQ structure + */ + NvU8 *pPreFillBuffer; /**< Input, Pointer bitstream for sequence header to decode */ + NvU32 PreFillBufferLength;/**< Input, Length of bitstream in bytes, must cover the entire sequence header */ + NvU32 ulBitpayloadType; /**< Output, Each Bit Informs a particular SEI message required by the application + so that the H264 decoder only parses that message related data stream + */ + NvU32 ulBitMask; /**< Input, Each Masking Bit indicated which information is required by the application */ + } GFMXDECH264DECSEI, *PGFMXDECH264DECSEI; + + /** GFMXDECH264DECSEQUENCE::SequenceInfo ouput flagbit: constraint_set0_flag is on in the bitstream. + */ +#define GF_MXDEC_H264_DEC_SEQUENCE_CONSTRAINT_SET0_FLAG 0x00000001 + + /** GFMXDECH264DECSEQUENCE::SequenceInfo ouput flagbit: constraint_set1_flag is on in the bitstream. + */ +#define GF_MXDEC_H264_DEC_SEQUENCE_CONSTRAINT_SET1_FLAG 0x00000002 + + /** GFMXDECH264DECSEQUENCE::SequenceInfo ouput flagbit: constraint_set2_flag is on in the bitstream. + */ +#define GF_MXDEC_H264_DEC_SEQUENCE_CONSTRAINT_SET2_FLAG 0x00000004 + + /** GFMXDECH264DECSEQUENCE::SequenceInfo output flagbit: Frame cropping. + If this flag is set GFMXDECH264DECSEQUENCE::CroppingRect contains a valid + frame cropping rectangle. + */ +#define GF_MXDEC_H264_DEC_SEQUENCE_FRAME_CROPPING_FLAG 0x00000008 + + /** GFMXDECH264DECSEQUENCE::uiSequenceOption input flagbit: Bitstream is passed with GFMxDecH264DecSequence(). + If this flag is set bitstream data is passed with the call to GFMxDecH264DecSequence() + instead via the read bitstrem callback. This can be used only with boundary detection + on application level. The bitstream data is passed via GFMXDECH264DECSEQUENCE::pPreFillBuffer and + GFMXDECH264DECSEQUENCE::PreFillBufferLength. + */ +#define GFMXDECH264_DECSEQUENCEOPTION_PREFILLBUFFER 0x00000001 + +#define GFMXDECH264_MAX_NUM_REF_FRAMES 17 + typedef struct + { + NvU32 POC; + NvU8 isNotDisplayed; + NvU8 RetainDuringDPBFlush; + NvU8 status; + }GFMXDECH264_DPB_DATA; + + + /** Parameter structure for MxDecH264DecPicture(). + Both input and output parameters are passed via this structure to MxDecH264DecPicture(). + @see MxDecH264DecPicture() + */ + typedef struct _GFMXDECH264DECPICTURE + { + NvU32 uiPictureOption; /**< Input flagbits, see GF_MXDEC_H264_DEC_PICTURE_SPECIFY_*. */ + PGFRECT pPictureRect; /**< Input, Target rectangle. + GFMXDECH264DECPICTURE::pPictureRect specifies a rectangle on the + output surface for GFMxDec to output the decoded image. + + This field only take effect when MXDEC_H264_DEC_PICTURE_SPECIFY_SURF_RECT + flag is set. + + The rectangle must be within the surface. The rectangle's top and + left position must be aligned by application. Call GFMxDecGetAttribute() + with #MXDEC_ATTR_H264_DEC_PICTURE_RECT_TOP_ALIGNMENT and + #MXDEC_ATTR_H264_DEC_PICTURE_RECT_LEFT_ALIGNMENT to read the alignment + requirements. The rectangle's width and height must match the video frame + width and height as returned from MxDecH264DecSequence() in + GFMXDECH264DECSEQUENCE::pic_width and GFMXDECH264DECSEQUENCE::pic_height. + + Note: Feature not yet implemented. + */ + NvU32 uiPictureInfo; /**< Output flags, see GF_MXDEC_H264_DEC_PICTURE_*. */ + PGFRMSURFACE reconstructedSurf; /**< Output, Surface holding the decoded picture. + If frame is not decoded then reconstructedSurf will not get initialsed i.e. NULL + So VXBLT is called if the reconstructedSurf is not NULL. + */ + NvU32 uiPictureOrderCount; /**< Output */ + NvU32 uiTimeStamp; /**< Output, frame timestamp in miliseconds, valid only if GF_MXDEC_H264_DEC_PICTURE_TIME_STAMP set. */ + NvU8 * pMBInfo; /**< Output, each element tells the particular MB is wrong or not. */ + NvU32 UsedAsReference; /**< Output */ + NvU8* pPreFillBuffer; /**< Input, Pointer bitstream for frame to decode + The bitstream pointer needs to be 4-bytes aligned. + */ + NvU32 PreFillBufferLength; /**< Input, Length of bitstream in bytes, must cover the entire frame */ + NvU32 PreFillBufferBytesConsumed; /**< Output, Amount of bytes consumed by the component */ + NvU16 flushDPB; /**< Output, set to !=0 by the decoder when it encounters a memory_management_control_operation = 5 + indication in the bitstream. The application should display (if the + NoOutputofPriorPics flag is not set) and flush the entire DPB, i.e remove + all previously stored frames from DPB. + Current frame should not be displayed/flushed. + + See \a NoOutputofPriorPics for more info. + */ + NvU16 NoOutputofPriorPics; /**< Output, set by the decoder when it encounters a no_output_of_prior_pics_flag in + the bitstream. If this set, then flushDPB will also be set. The application + should flush the entire DPB, i.e remove all previously stored frames from DPB. + Current frame should not be displayed/flushed. + + Summary: + + + + + +
      NoOutputofPriorPicsflushDPBApplications response
      1 1 Remove all previously stored frames. No display.
      0 1 Display all previously stored frames and then remove from DPB.
      0 0 Normal operation of decoder.
      + */ + NvU32 ReconSurfaceNumber; /**< Index of reconstructed surface, this is an index into GFMXDECH264SURFLIST::surfList[]. + valid only if GFMXDECH264DECPICTURE::reconstructedSurf is not NULL. + Invalid for streams with picture reordering. + */ + GFMXDECH264_DPB_DATA dpb_data[GFMXDECH264_MAX_NUM_REF_FRAMES]; + } GFMXDECH264DECPICTURE, *PGFMXDECH264DECPICTURE; + + //uiPictureOption + + /** GFMXDECH264DECPICTURE::uiPictureOption input flagbit: Use target rectangle. + If this flag is set, the GFMXDECH264DECPICTURE::pPictureRect will point to + a rectangle on the output surface, where the reconstructed frame is placed. + */ +#define GF_MXDEC_H264_DEC_PICTURE_SPECIFY_SURF_RECT 0x00000001 + + /** GFMXDECH264DECPICTURE::uiPictureOption input flagbit: Bitstream is passed with MxDecH264DecPicture(). + If this flag is set bitstream data is passed with the call to MxDecH264DecPicture() + instead via the read bitstrem callback. This can be used only with frame boundary detection + on application level. The bitstream data is passed via GFMXDECH264DECPICTURE::pPreFillBuffer and + GFMXDECH264DECPICTURE::PreFillBufferLength. + */ +#define GF_MXDEC_H264_DEC_PICTURE_SPECIFY_PREFILLBUFFER 0x00000002 + + //PictureInfo: + + /** GFMXDECH264DECSEQUENCE::PictureInfo output flagbit: Current picture is IDR. + */ +#define GF_MXDEC_H264_DEC_PICTURE_IDR 0x00000001 + + /** GFMXDECH264DECSEQUENCE::PictureInfo output flagbit: GFMXDECH264DECSEQUENCE::uiTimeStamp field is valid. + */ +#define GF_MXDEC_H264_DEC_PICTURE_TIME_STAMP 0x00000002 + + /** GFMXDECH264DECSEQUENCE::PictureInfo output flagbit: Decoded picture has at least one corrupted macroblock. + */ +#define GF_MXDEC_H264_DEC_PICTURE_BAD_MB 0x00000004 + + /** GFMXDECH264DECSEQUENCE::PictureInfo output flagbit: + Required by the application to decide whether post processing should be applied for a particular frame + DeblockingFlag is set, when Deblocking Filtering is disabled for all the slices + DeblockingFlag is reset even if deblocking filtering is enabled for atleast one slice + */ +#define GF_MXDEC_H264_DEC_PICTURE_DEBLOCKING_FILTER 0x00000008 + + typedef struct _GFMXDECH264SEQUENCE + { + NvU32 SequenceInfo; + NvU16 pic_width_in_mbs_minus1; + NvU16 pic_height_in_map_units_minus1; + } GFMXDECH264SEQUENCE, *PGFMXDECH264SEQUENCE; + //PictureInfo: +#define GF_MXDEC_H264_SEQUENCE_FRAME_MB_ONLY_FLAG 0x00000001 + //if frame_mb_only_flag is on, this flag must be on +#define GF_MXDEC_H264_SEQUENCE_MB_ADAPTIVE_FRAME_FIELD_FLAG 0x00000002 + //if mb_adaptive_frame_filed_flag is on, this flag must be on +#define GF_MXDEC_H264_SEQUENCE_DIRECT_8X8_INFERENCE_FLAG 0x00000004 + //if direct_8x8_inference_flag is on, this flag must be on + + + typedef struct _GFMXDECH264PICTURE + { + NvU32 PictureInfo; + PGFRMSURFACE reconstructedSurf; //surface to hold the decoded picture + PGFRECT pRect; + NvU8 weighted_bidpred_idc; + NvS8 chroma_qp_index_offset; + } GFMXDECH264PICTURE, *PGFMXDECH264PICTURE; + //PictureInfo: +#define GF_MXDEC_H264_PICTURE_WEIGHTED_PRED_FLAG 0x00000001 + //if weighted_pred_flag is on, this flag must be on +#define GF_MXDEC_H264_PICTURE_DEBLOCKING_FILTER_CONTROL_PRESENT_FLAG 0x00000002 + //if deblocing_filter_control_present_flag is on, this flag must be on +#define GF_MXDEC_H264_PICTURE_CONSTRAINED_INTRA_PRED_FLAG 0x00000004 + //if constrained_intra_pred_flag is on, this flag must be on +#define GF_MXDEC_H264_PICTURE_IDR 0x00000008 +#define GF_MXDEC_H264_PICTURE_SPECIFY_SURFACE_RECT 0x00000010 + // If this flag is set, pRect must be set. GFMxDec will reference image + // in pRect area of reference surface and output the decoded image in + // the pRect area of reconstructedSurf. Otherwise, GFMxDec will use + // the whole surface area. + + + typedef struct _GFMXDECH264WEIGHT + { + NvS8 luma_weight; + NvS8 luma_offset; + NvS8 Cb_weight; + NvS8 Cb_offset; + NvS8 Cr_weight; + NvS8 Cr_offset; + } GFMXDECH264WEIGHT, *PGFMXDECH264WEIGHT; + + + + typedef struct _GFMXDECH264SLICE + { + NvU32 SliceInfo; + NvU16 first_mb_in_slice; + NvU16 reserved; + NvU8 slice_type; + NvU8 num_ref_idx_l0_active_minues1; + NvU8 num_ref_idx_l1_active_minues1; + NvU8 disable_deblocking_filter_idc ; + NvU8 slice_alpha_c0_offset_div2; + NvU8 slice_beta_offset_div2; + PGFRMSURFACE ref_l0_surfaces[16]; + PGFRMSURFACE ref_l1_surfaces[16]; + GFMXDECH264WEIGHT weighttableL0[16]; + GFMXDECH264WEIGHT weighttableL1[16]; + } GFMXDECH264SLICE, *PGFMXDECH264SLICE; + //SliceInfo: +#define GF_MXDEC_H264_SLICE_FILED_PIC_FLAG 0x01 + //when filed_pic_flag is on, this flag must be set +#define GF_MXDEC_H264_SLICE_BOTTOM_FILED_FLAG 0x02 + //when bottom_field_flag is on, this flag must be set +#define GF_MXDEC_H264_SLICE_DIRECT_SPATIAL_MV_PRED_FLAG 0x04 + //when DIRECT_SPATIAL_MV_PRED_FLAG is on, this flag must be set + + + typedef struct _GFMXDECH264I4X4LPREDMODE + { + NvU32 uiPredMode0to7; //Luma4X4 Blk 0 to 7's prediction modes. + NvU32 uiPredMode8to15; //Luma4X4 Blk 8 to 15's prediction modes. + } GFMXDECH264I4X4LPREDMODE, *PGFMXDECH264I4X4LPREDMODE; + + typedef struct _GFMXDECH264MV + { + NvS16 Horizontal; + //Horizonal motion vector component. + NvS16 Vertical; + //Vertical motion vector component + } GFMXDECH264MV, *PGFMXDECH264MV; + + + typedef struct _GFMXDECH264REFIDX + { + NvU8 Ref_idx_l0[4]; //PartIdx's reference index + NvU8 Ref_idx_l1[4]; //PartIdx's reference index + } GFMXDECH264REFIDX, *PGFMXDECH264REFIDX; + + + typedef struct _GFMXDECH264SUBMBTYPE + { + NvU8 sub_mb_type[4]; //PartIdx's sub_mb_type + } GFMXDECH264SUBMBTYPE, *PGFMXDECH264SUBMBTYPE; + + + typedef struct _GFMXDECH264MB + { + NvU16 uiTotalSize; + //Total size in bytes for current macroblock, including this structure + //itself and necessary following structure behind of this structure. + //Reference the data following GFMXDECH264MB. + NvU16 uiTotalCOEFs;// total Coefs for this macroblock + NvU32 curMBAddress; // current macroblock address + NvU8 MBInfo; + // this is the mb_type in bit stream and mb_field_decoding_flag + NvU8 uiQP; //this is QPy + NvU8 coded_block_pattern; + //This field is only valid when current macroblock is not Intra_16x16 + NvU8 Intra_chroma_pred_mode; + //This field is valid only when current macroblock is Intra + GFMXDECH264SUBMBTYPE sub_mb_type; + union + { + GFMXDECH264I4X4LPREDMODE I4X4LPredMode; //Intra_4X4 only + GFMXDECH264REFIDX RefIdx; //Inter only + } mode; // TODO: Name this better + NvS32 numCoefsPerSubMB[32]; + NvS16 index; + } GFMXDECH264MB, *PGFMXDECH264MB; + + //MBInfo: +#define GF_MXDEC_H264_MB_FILED_DECODING_ENABLE 0x80 + //when mb_field_decoding_flag is on, this flag must be set +#define GF_MXDEC_H264_MB_SKIP_MB 0x40 + //skip MB + + //The data following GFMXDECH264MB: + //If current macroblock is skipped macroblock, no further data is needed. + + //If current macroblock is IPCM, there are 384 bytes following GFMXDECH264MB. + + //If current macroblock is Inter macroblock, and is using picture list 0 only, + //necessary number of GFMXDECH264MV are following. If current macroblock is + //using picture list 1 only, necessary number of GFMXDECH264MV are following. + //If current macroblock is using both picture list 0 and list 1, necessary + //number of GFMXDECH264MV for list 0, and necessary number of GFMXDECH264MV + //for list 1 are following GFMXDECH264MB. + + //For both Intra and Inter macroblock, the last portion of data which follows + //GFMXDECH264MB is GFMXDECH264MB.uiTotalCOEFs of GFMXDECH264COEF. + + + + // definition for attribute + + /** GFMxDecH264 Attribute: Application will determine the decoding boundaries. + For H.264/AVC, this boundary means sequence and picture boundary. For certain file formats, + those boundary information are stored in a meta data file. Alternatively the application + could parse NAL unit boundaries from the H264 stream and determine decoding units. + If application wants GFMxDecH264 to detect the boundary, it should not enable this + attribute. + + If prefill mode (see #GFMXDECH264_DECSEQUENCEOPTION_PREFILLBUFFER) is used, + this attribute must be enabled. Disabled by default. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 1: APP will determine the decoding boudary
+    0: APP will not determine the decoding boundary
+
      + + @see GFMxDecH264GetAttribute(), GFMxDecH264SetAttribute() + */ +#define GF_MXDEC_H264_ATTR_PRE_DETERMINED_BOUNDARY 0x00000001 + + /** GFMxDecH264 Attribute: Enforce display ordering for sequences containing out of order frames. + + Disabled by default. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 !=0: Enable reordering
+    0: Disable reordering
+
      + + @see GFMxDecH264GetAttribute(), GFMxDecH264SetAttribute() + */ +#define GF_MXDEC_H264_ATTR_DISPLAY_REORDERING 0x00000002 + +#define GF_MXDEC_H264_ATTR_DSP_STREAM_BUFFERING 0x00000003 + //This Attribute only can be used for GFMxDecH264SetAttribute + //If the Application wants to set the mode DSP_STREAM_BUFFERING in H264Decoder, enable the #define DSP_STREAM_BUFFERING in App, + //then APP will enable the attribute by calling the GFMxDecH264SetAttribute. + //this attribute is used to pass the buffer details, from Application to the host side of GFSDK H264 component. + + /** GFMxDecH264 Attribute: Enable decode surface locking in MxDecH264DecPicture(). + + MxDecH264DecPicture() returns the decoded surface number in GFMXDECH264DECPICTURE::ReconSurfaceNumber, + which is an index into the decode surface list GFMXDECH264SURFLIST::surfList[] set via + #GF_MXDEC_H264_SET_SURFACE_LIST. If surface locking is enabled, MxDecH264DecPicture() will + automatically 'lock' the returned surface and exclude it from its list of + surfaces used for further decoding. GFMxDecH264 can still read from a locked surface + (for reference frames), but it will not overwrite it. The application must not + write into a locked surface, since it still may be used as reference frame. + + This locking mechanism is intended for usecases, where the application directly displays + the decode surface as video overlay. See also @ref pageMxDecH264AppNotes2 + + With surface locking enable, each successfully decoded surface has to be unlocked by the + application with GFMxDecH264Set / #GF_MXDEC_H264_SET_UNLOCK_SURFACE. + + Since locked surfaces cannot be used for decoding, the number of decoding surfaces + set with #GF_MXDEC_H264_SET_SURFACE_LIST must be R+1+N, where R is the maximum number of + reference frames and N the maximum number of simultaneously locked surfaces. + Otherwise MxDecH264DecPicture() may fail. + + Disabled by default. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 !=0: Enable surface locking
+    0: Disable surface locking
+
      + + @see GFMxDecH264GetAttribute(), GFMxDecH264SetAttribute(), GF_MXDEC_H264_SET_UNLOCK_SURFACE, @ref pageMxDecH264AppNotes2 + */ +#define GF_MXDEC_H264_ATTR_SURFACE_LOCKING 0x00000004 + + /** GFMxDecH264 Attribute: Get H264 decoder's DSP handle. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 DSP handle
+
      + + GFMxDecH264GetAttribute() returns error GFMXDECH264_ERROR_INVALID_STATE, if DSP side not initialized. + Can be get only. + + @internal + @see GFMxDecH264GetAttribute() + */ +#define GF_MXDEC_H264_ATTR_GETDSPHANDLE 0x00000005 + +#define GF_MXDEC_H264_ATTR_DEC_PICTURE_RECT_TOP_ALIGNMENT 0x00000007 + //This attribute only can be used for GFMxDecGetAttribute + //If application wants to set pDestRect in GFMXDECPICTURE or GFMXDECH264DECPICTURE, + //application must use this attributes to get allignment information and + //align the rectangle top & left corner accordinately. + //*pInfo: top fieled alignment in term of lines + +#define GF_MXDEC_H264_ATTR_DEC_PICTURE_RECT_LEFT_ALIGNMENT 0x00000008 + //This attribute only can be used for GFMxDecGetAttribute + //If application wants to set pDestRect in GFMXDECH264PICTURE or GFMXDECH264DECPICTURE, + //application must use those attributes to get allignment information and + //align the rectangle top & left corner accordinately. + //*pInfo: left fieled alignment in term of pixels + +#define GF_MXDEC_H264_ATTR_DEC_ENABLE_RAISE_WAIT 0x00000009 + /* + * This attribute only can be used for GFMxDecSetAttribute + * if (*pInfo == 1) + * { + * Raisevectors are allocated per Surface. + * There will be 2 (3 if PostProcessing is ON) sets of raise-wait happening + * 1) Decoder raises On_Frame_Decoded, and VxBlt waits. + * 2) (If enabled in APP) PostProcessing API raises On_PP_Frame_Done, and VxBlt waits. + * 3) VxBlt raises On_Bltted, and Decoder waits. + * } + * else // DEFAULT + * { + * We do not allocate surface raise vectors but a single raise vector + * - In Decoder, we poll Frame_done, and return only after its done + * - In PostProcessing we poll PP_Frame_done, and return only after its done + * - I observed that Frame_done & PP_Frame_done bits are affected only if raise is done on those. Thats why single raise vector is still needed. + * This raise vector is not in any suface but in pdec. + * } + */ + +#define GF_MXDEC_H264_ATTR_LEN_OF_NALSIZE 0x0000000a + /*To support the decoding of .264 stream where NAL size appears instead of StartCode + This is to get the length of the NAL size value*/ +#define GF_MXDEC_H264_ATTR_NALSIZE_DECODING 0x0000000b + /* To support runtime decision making between the start code decoding and NAL size decoding*/ + + + /** GFMxDecH264 Attribute: Indicate to the H264 decoder that surfaces have + already been allocated by the Application before the sps is decoded. + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 (Height << 16)| (Width)
+
      + + Can be set only. + */ +#define GF_MXDEC_H264_ATTR_SURFACE_ALLOCATED 0x0000000c + + /** GFMxDecH264 Attribute: Set number of maximum supported reference frames. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 Number of reference frames 
+
      + + This can be called before or after GFMxDecH264Set(GF_MXDEC_H264_SET_SURFACE_LIST). + The number of reference frames must be smaller than the number of surfaces + set via GFMxDecH264Set(GF_MXDEC_H264_SET_SURFACE_LIST). + + If this attribute is not set, the number of supported reference frames will be + equal to one less the number of surfaces set in GFMxDecH264Set(GF_MXDEC_H264_SET_SURFACE_LIST). + + Can be set only. + + @see GF_MXDEC_H264_SET_SURFACE_LIST + */ +#define GF_MXDEC_H264_ATTR_MAXREFFRAMES 0x0000000d + + /** GFMxDecH264 Attribute: Get Error Map Matrix for MBs in last decoded frame. + + This attribute only can be used for GFMxDecGetAttribute. If application wants to get MB error map for + till recently decoded frame. Input parameter is a character array pMBErrMapMatrix of size "number of MBs in a frame". On returning + this call fills this char array with 1s & 0s. 1: MB correctly decoded & 0: MB corrupted. This is cumulative err map till this call + is made. In this API call after copying the err map to the char array, internal map is reset to all clean MBs. + Internal map is reset to all clean MBs also when I or SI slice is found. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU8 * pMBErrMapMatrix
+
      + + @internal + @see GFMxDecH264GetAttribute() + */ +#define GF_MXDEC_H264_ATTR_GET_MBERR_MAP_MATRIX 0x0000000e + +/** GFMxDecH264 Attribute: Set Error Concealment (EC) Mode ON or OFF. + + EC is Dynamically ON by default. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 !=0: Enable EC
+            0: Disable EC
+
      + + @see GFMxDecH264SetAttribute() +*/ +#define GF_MXDEC_H264_ATTR_SWITCH_EC_MODE 0x0000000f + +/** GFMxDecH264 Attribute: Set Single Slice Per Frame Mode ON or OFF. + + By default multiple slices per frame is assumed. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 !=0: Single slice per frame
+            0: Multiple slices per frame
+
      + + @see GFMxDecH264SetAttribute() +*/ +#define GF_MXDEC_H264_ATTR_SINGLE_SLICE_PER_FRAME 0x00000010 + + + +/** GFMxDecH264 Attribute: Put the h264 decoder in the TSPlayer + mode. This has to be done first, and sets up the h264 decoder to cooperate + with the TS Demux task on the AVP. Does nothing when decode is on the + host +*/ +#define GF_MXDEC_H264_ATTR_SET_TSPLAYER_MODE 0x00000011 + + +/** Parameter structure for MxDecH264PostProcessing(). + Both input and output parameters are passed via this structure to MxDecH264PostProcessing(). + @see MxDecH264PostProcessing() +*/ + + typedef struct _GFMXDECHH264PP + { + PGFRMSURFACE* pDestSurf;/**< input, + pointer to an array of surfaces that will + hold the result from Post Processing + pointer to an array of surfaces to + accommodate auto post processing + */ + PGFRMSURFACE* pSrcSurf; /**< input, + pointer to an array of surfaces to be //post processed + pointer to an array of surfaces to + accommodate auto post processing + */ + PGFRECT pRect; /**< input, + Rectangle area to be processed for both + src and dest surface + */ + + NvU32 numofDestSurf; /**< input, + If MXDEC_PP_AUTO flag is set, this + parameter must be filled + */ + NvU32 numofSrcSurf; /**< input, + If MXDEC_PP_AUTO flag is set, this + parameter must be filled + */ + NvU8 * lpQuantiser; /**< input, + point to array of QPs for Macro Blocks in + the source VOP. GFMX automatically saved + the last two decoded VOP's QP tables, + Decoder application may not need to reload + the table if it can make sure the source + VOP is the one within the last decoded + VOPs. If MXDEC_PP_RELOAD_QUANTIZER is set, + this field must be filled. + */ + NvU32 PPOption; /** + NvS32 >0 Surface index which was returned in GFMXDECH264DECPICTURE::ReconSurfaceNumber. + NvS32 -1 Reset all locked surfaces to unlocked + NvS32 -2 Reserved for internal use + + + @see GF_MXDEC_H264_ATTR_SURFACE_LOCKING + */ +#define GF_MXDEC_H264_SET_UNLOCK_SURFACE 3 + + /** GFMxDecH264Set() feature ID: Sync host side H264 state from DSP side. + @internal + */ +#define GF_MXDEC_H264_SET_SYNC_WITH_DSP 4 + + /** GFMxDecH264Set() feature ID: Set or reset DSP idle callback. + Can be called on DSP side only. + \a pInfo is a pointer to a #GFMXDECH264CALLBACK structure. + @internal + */ +#define GF_MXDEC_H264_SET_DSPIDLEHANDLER 5 + +/** GFMxDecH264Set() feature ID: Allow the DSP message poll thread to wake up and terminate. + Can be called on Host side only. + \a pInfo is ignored. + @internal +*/ +#define GF_MXDEC_H264_SET_EXITDSPMSGTHREAD 6 + + /** Parameter structure for GFMxDecH264Set() feature #GF_MXDEC_H264_SET_DSPIDLEHANDLER. + @internal + */ + typedef struct _GFMXDECH264DSPIDLECALLBACK + { + /** Application defined parameter to forward to GFMXDECH264DSPIDLECALLBACK::pCallBack. */ + void *pPara; + + /** Callback function, which is called from AVP idle loop. + @param pPara Application defined parameter, forwarded from GFMXDECH264DSPIDLECALLBACK::pPara + */ + void (*pCallBack)(void* pPara); + + } GFMXDECH264DSPIDLECALLBACK; + + + /** Parameter structure for GFMxDecH264Set() feature #GF_MXDEC_H264_SET_READBITSTREAM. */ + typedef struct _GFMXDECH264CALLBACK + { + /** Application defined parameter to forward to GFMXDECH264CALLBACK::pCallBack. */ + void *pPara; + + /** Callback function, which is called by MxDecH264 to fetch a portion of bitstream data. + @param pPara Application defined parameter, forwarded from GFMXDECH264CALLBACK::pPara + @param ppBuffer Callback returns address of the next portion of stream data in \a *ppBuffer + @param pBufferLength Callback returns number of bytes in \a ppBuffer in \a *pBufferLength + @param uFlag Specifies scan stream direction + + + +
      GF_MXDEC_H264_READ_BITSTREAM_FORWARD Forward scan
      GF_MXDEC_H264_READ_BITSTREAM_BACKWARDBackward scan
      + + @return If the #MXDEC_ATTR_PRE_DETERMINED_BOUNDARY attribute is set, the callback + should return #GF_MXDEC_H264_BOUNDARY_REACHED when a frame boundary is + detected, or 0 if no boundary is detected. + If the #MXDEC_ATTR_PRE_DETERMINED_BOUNDARY attribute is not set, the callback + should return 0. + */ + NvU32 (*pCallBack)(void* pPara, NvU8** ppBuffer, NvS32* pBufferLength, NvU32 uFlag); + + }GFMXDECH264CALLBACK, *PGFMXDECH264CALLBACK; + + + + /** GFMXDECH264CALLBACK::pCallBack return code */ +#define GF_MXDEC_H264_BOUNDARY_REACHED 0x00000001 + /** GFMXDECH264CALLBACK::pCallBack uFlag value: Stream forward scan. */ +#define GF_MXDEC_H264_READ_BITSTREAM_FORWARD 0x00000002 + /** GFMXDECH264CALLBACK::pCallBack uFlag value: Stream backward scan. */ +#define GF_MXDEC_H264_READ_BITSTREAM_BACKWARD 0x00000003 + + /** Maximum number of surface pointers GFMXDECH264SURFLIST::surfList[]. */ +#define MXDEC_H264_NUM_SURFACES 17 + + /** Parameter structure for GFMxDecH264Set() feature #GF_MXDEC_H264_SET_READBITSTREAM. */ + typedef struct _GFMXDECH264SURFLIST + { + /** Number of valid surfaces in GFMXDECH264SURFLIST::surfList[]. + The number of valid surfaces includes reference, decode surfaces and optional buffer frames. + Must be within range 1 and 17. + */ + NvU32 numSurfs; + + /** Surface pointer list. + + Assuming N is the number of reference frames, the first N+1 surfaces + in this list will be used as reference and decode surfaces. The currently + decoded surface can refer to the N remaining surfaces in this set as + reference frames. + + If surface locking mode (#GF_MXDEC_H264_ATTR_SURFACE_LOCKING) is enabled, + The remaining M = numSurfs - (N+1) surfaces are used as extra surfaces, + to fascilate pre-buffered decoding. + */ + PGFRMSURFACE surfList[MXDEC_H264_NUM_SURFACES]; + + }GFMXDECH264SURFLIST, *PGFMXDECH264SURFLIST; + + + typedef enum + { + GFMX_DEC_H264_INTERRUPT_ENABLE, + GFMX_DEC_H264_INTERRUPT_DISABLE, + GFMX_DEC_H264_INTERRUPT_CLEAR + } GFMX_DEC_H264_INTERRUPT_OPERATION_TYPE; // Interrupt operation. + + typedef enum + { + GFMX_DEC_H264_DSP_COMMAND_INTR, + GFMX_DEC_H264_POST_PROCESSING_DONE_INTR, + GFMX_DEC_H264_DECODE_DONE_INTR + } GFMX_DEC_H264_INTERRUPT_TYPE; + + typedef struct _GFMXDECH264TABLE + { + GF_RETTYPE (* MxDecH264GetProperty)(GFMxDecH264Handle hMxDecH264, PGFPROPERTY pMXProp ); + GF_RETTYPE (* MxDecH264GetStatus)(GFMxDecH264Handle hMxDecH264, NvU32 * pStatus); + GF_RETTYPE (* MxDecH264DecSequence)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264DECSEQUENCE pSequence); + GF_RETTYPE (* MxDecH264DecPicture)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264DECPICTURE pPicture); + GF_RETTYPE (* MxDecH264SetSequence)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264SEQUENCE pSequence); + GF_RETTYPE (* MxDecH264SetPicture)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264PICTURE pPicture); + GF_RETTYPE (* MxDecH264SetSlice)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264SLICE pSlice); + GF_RETTYPE (* MxDecH264SetMBs)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264MB pMBs); + GF_RETTYPE (* MxDecH264PostProcessing)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264PP pP); + GF_RETTYPE (* MxDecH264SetAttribute)(GFMxDecH264Handle hMxDecH264, NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* MxDecH264GetAttribute)(GFMxDecH264Handle hMxDecH264, NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* MxDecH264Set)(GFMxDecH264Handle hMxDecH264, NvU32 uiFeature, void * pInfo); + GF_RETTYPE (* MxDecH264InterruptControl)(GFMxDecH264Handle hMxDecH264, + GFMX_DEC_H264_INTERRUPT_TYPE IntType, GFMX_DEC_H264_INTERRUPT_OPERATION_TYPE op, + void * pData); + GF_RETTYPE (* MxDecH264InterruptHandler)(GFMxDecH264Handle hMxDecH264, + GFMX_DEC_H264_INTERRUPT_TYPE IntType, void * pData); // Reserved. + GF_RETTYPE (* MxDecH264DSPPoll)(GFMxDecH264Handle hMxDecH264, NvU32 timeout); + GF_RETTYPE (* MxDecH264DecSEI)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264DECSEI pSEI); + GF_RETTYPE (* MxDecH264DecNewFrameNum)(GFMxDecH264Handle hMxDecH264,NvU8* VideoBuffPtr,NvU32 VideoBufferLength); + } GFMXDECH264TABLE, *PGFMXDECH264TABLE; + + /**< Typesafe functions for opening and closing this component. + This API also checks for hardware resources needed through GFRmHwResourceConstraint(). + Trying to open a second video instance will fail due to existing open context. + */ +GF_RETTYPE GFMxDecH264Open(GFRmHandle hRm, GFMxDecH264Handle *phMxDecH264, + GF_STATE_TYPE state, GFRmChHandle hCh); + + /**< Close the video instance. + */ +void GFMxDecH264Close(GFMxDecH264Handle *phMxDecH264); + +#if NVCPU_IS_XTENSA +#define MXDH264OFFSET sizeof(GFMXDECH264TABLE) +#else +#define MXDH264OFFSET 0 +#endif + + + /** GFMxDecH264 error code: GFMxDecH264DecSequence() encountered end of bitstream. + @see GFMxDecH264DecSequence() + */ +#define GFMXDECH264_ERROR_SEQUENCE_END_OF_FILE (GFMXDH264_ERROR | 0x00000001) + + /** GFMxDecH264 error code: GFMxDecH264DecSequence() bitstream format not supported. + The sequence header specifies a bitstream format, that is not supported. Most likely + reason for this error is that the H.264 profile is not supported. + @see GFMxDecH264DecSequence() + */ +#define GFMXDECH264_ERROR_SEQUENCE_NOT_SUPPORTED (GFMXDH264_ERROR | 0x00000002) + + /** GFMxDecH264 error code: GFMxDecH264DecSequence() encountered out of GPU memory error. + The application can try to free GPU memory and call GFMxDecH264DecSequence() again. + @see GFMxDecH264DecSequence() + */ +#define GFMXDECH264_ERROR_SEQUENCE_NOT_ENOUGH_MEM (GFMXDH264_ERROR | 0x00000003) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() encountered sequence header. + The application should call GFMxDecH264DecSequence() in response to this return code, + to decode the sequence header. + @see GFMxDecH264DecPicture(), GFMxDecH264DecSequence() + */ +#define GFMXDECH264_ERROR_PICTURE_DETECTED_SEQUENCE (GFMXDH264_ERROR | 0x00000004) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() encountered end of bitstream. + @see GFMxDecH264DecPicture() + */ +#define GFMXDECH264_ERROR_PICTURE_END_OF_FILE (GFMXDH264_ERROR | 0x00000005) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() encountered an unrecoverable bitstream error. + The application should call GFMxDecH264DecPicture() again, MxDecH264 will then + scan for the next frame boundary and try to decode this frame. + @see GFMxDecH264DecPicture() + */ +#define GFMXDECH264_ERROR_PICTURE_CORRUPTED_PICTURE (GFMXDH264_ERROR | 0x00000006) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() encountered out of GPU memory error. + The application can try to free GPU memory and call GFMxDecH264DecPicture() again. + @see GFMxDecH264DecPicture() + */ +#define GFMXDECH264_ERROR_PICTURE_NOT_ENOUGH_MEM (GFMXDH264_ERROR | 0x00000007) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() returns status to inform application + whether picture parameter set is not initialized, which may happen either when picture + parameter set is absent or corrupted. pic_parameter_set_id is checked for negative value. + */ +#define GFMXDECH264_ERROR_PICTURE_PARAMETER_SET_NOT_INITIALIZED (GFMXDH264_ERROR | 0x00000008) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() returns error status to inform application + that picture parameter set is corrupted. + */ +#define GFMXDECH264_ERROR_PICTURE_PARAMETER_SET_CORRUPTED (GFMXDH264_ERROR | 0x00000009) + + /** GFMxDecH264 error code: GFMxDecH264 API was used in invalid state of the decoder. + */ +#define GFMXDECH264_ERROR_INVALID_STATE (GFMXDH264_ERROR | 0x0000000A) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() returns status to inform application that + all the surfaces where it could decode are locked. + */ +#define GFMXDECH264_ERROR_PICTURE_ALL_SURFACES_LOCKED (GFMXDH264_ERROR | 0x0000000B) + + /*For DecPic timeout on DSP side.*/ +#define GFMXDECH264_ERROR_MXDEC_PIC_TIMEOUT (GFMXDH264_ERROR + 0x0000000C) + + + /** GFMxDecH264 error code: GFMxDecH264DecSEI() is not supported in bitstream callback mode. + @see GFMxDecH264DecSEI() + */ +#define GFMXDECH264_ERROR_SEI_NOT_SUPPORTED_FOR_BITSTREAM_CALLBACK_MODE (GFMXDH264_ERROR | 0x0000000D) + + /** GFMxDecH264 error code: GFMxDecH264DecSEI() encountered end of bitstream. + @see GFMxDecH264DecSEI() + */ +#define GFMXDECH264_ERROR_SEI_END_OF_FILE (GFMXDH264_ERROR | 0x0000000E) + + /** GFMxDecH264 error code: GFMxDecH264DecSEI() cannot decode this NAL Unit as its not SEI. + @see GFMxDecH264DecSEI() + */ +#define GFMXDECH264_ERROR_SEI_NOT_SEI_RBSP (GFMXDH264_ERROR | 0x0000000F) + + /** GFMxDecH264 error code: GFMxDecH264DecSEI() Timed out on DSP side. + @see GFMxDecH264DecSEI() + */ +#define GFMXDECH264_ERROR_SEI_TIMEOUT (GFMXDH264_ERROR | 0x00000010) + + /** GFMxDecH264 error code: GFMxDecH264DecNewFrameNum() cannot decode this NAL Unit as + it does not contain frame number information. + @see GFMxDecH264DecNewFrameNum() + */ +#define GFMXDECH264_ERROR_DECFRAMENUM_NOTSUPPORTED (GFMXDH264_ERROR | 0x00000011) + + /* #### MxDecH264 Helper macros. Maybe useful for backward compatible API. #### */ + + /** This function returns version and capabilities of API and hardware. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pMXProp (PGFPROPERTY) Pointer to property structure to be filled in + + @retval #GF_SUCCESS \a pJXProp filled in successfully + @retval #GF_ERROR Some error occured + + The #GFPROPERTY structure passed with parameter \a pMXProp will be + filled in on successfull return. The GFPROPERTY::Capability field + will hold a combination of flagbits indicating capabilities specific + to the MxDecH264API: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GF_MXDEC_H264_CAP_BASELINEBaseline profile supported
      #GF_MXDEC_H264_CAP_MAINMain profile supported
      #GF_MXDEC_H264_CAP_EXTENDEDExtended profile supported
      #GF_MXDEC_H264_CAP_LEVEL10LEVEL 1.0 supported
      #GF_MXDEC_H264_CAP_LEVEL11LEVEL 1.1 supported
      #GF_MXDEC_H264_CAP_LEVEL12LEVEL 1.2 supported
      #GF_MXDEC_H264_CAP_LEVEL13LEVEL 1.3 supported
      #GF_MXDEC_H264_CAP_LEVEL20LEVEL 2.0 supported
      #GF_MXDEC_H264_CAP_LEVEL21LEVEL 2.1 supported
      #GF_MXDEC_H264_CAP_LEVEL22LEVEL 2.2 supported
      #GF_MXDEC_H264_CAP_LEVEL30LEVEL 3.0 supported
      #GF_MXDEC_H264_CAP_LEVEL31LEVEL 3.1 supported
      #GF_MXDEC_H264_CAP_LEVEL32LEVEL 3.2 supported
      #GF_MXDEC_H264_CAP_LEVEL40LEVEL 4.0 supported
      #GF_MXDEC_H264_CAP_LEVEL41LEVEL 4.1 supported
      #GF_MXDEC_H264_CAP_LEVEL42LEVEL 4.2 supported
      #GF_MXDEC_H264_CAP_LEVEL50LEVEL 5.0 supported
      #GF_MXDEC_H264_CAP_LEVEL51LEVEL 5.1 supported
      #GF_MXDEC_H264_CAP_DBPost Processing de-blocking supported
      #GF_MXDEC_H264_CAP_DRPost Processing de-ringing supported
      + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxDecH264API functions. + + @see GFPROPERTY + */ +#define GFMxDecH264GetProperty(hMxDecH264, pMXProp) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264GetProperty(hMxDecH264, pMXProp) + +#define GFMxDecH264GetStatus(hMxDecH264, pStatus) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264GetStatus(hMxDecH264, pStatus) + + /** Decode sequence header. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pSequence (PGFMXDECH264DECSEQUENCE) Pointer to #GFMXDECH264DECSEQUENCE parameter structure + + @retval GF_SUCCESS Sequence header was decoded successfully + + NAL units with nal_unit_type = 7 should be passed to GFMxDecH264DecSequence(). Such NAL units + contain Sequence Parameter Set (SPS). The nal_ref_idc should be a non-zero value. + + This function will be called whenever a sequence header is found in the bitstream, decode + it and return its characteristics. + + @see GFMXDECH264DECSEQUENCE + */ +#define GFMxDecH264DecSequence(hMxDecH264, pSequence)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264DecSequence(hMxDecH264, pSequence) + + /** Decode a picture. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pPicture (PGFMXDECH264DECPICTURE) Pointer to #GFMXDECH264DECPICTURE parameter structure + + @retval GF_SUCCESS Frame was decoded successfully + @retval GFMXDECH264_ERROR_PICTURE_DETECTED_SEQUENCE Sequence header detected + @retval GFMXDECH264_ERROR_PICTURE_END_OF_FILE End of stream encountered + @retval GFMXDECH264_ERROR_PICTURE_CORRUPTED_PICTURE Unrecoverable bitstream error during frame decode + @retval GFMXDECH264_ERROR_PICTURE_NOT_ENOUGH_MEM Out of GPU memory + + All NAL units with nal_unit_type other than 7, should be passed to GFMxDecH264DecPicture(). + In specific, for nal_unit_type value as 8, the NAL Unit contains a Picture Parameter Set (PPS) and + for nal_unit_type ranging between 1 and 5, the NAL units contain coded slices. + + GFMxDecH264DecPicture decodes one picture from the bit stream. If GFMxDecH264DecPicture detects an + error, it will perform error concealment. If the error is not concealable, GFMxDecH264DecPicture returns + the error back to the application. + If the current stream position is not on the start of a frame, the function scans forward until a frame + start or sequence header is detected. + + For actions to take on the particular return codes, refer to the return code documentation. + + @see GFMXDECH264DECPICTURE + */ +#define GFMxDecH264DecPicture(hMxDecH264, pPicture)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264DecPicture(hMxDecH264, pPicture) + + + /** Decode a SEI rbsp. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pSEI (PGFMXDECH264DECSEI) Pointer to #GFMXDECH264DECSEI parameter structure + + @retval GF_SUCCESS SEI rbsp was decoded successfully + @retval GFMXDECH264_ERROR_SEI_NOT_SUPPORTED_FOR_BITSTREAM_CALLBACK_MODE This API is not supported in bitstream callback mode + @retval GFMXDECH264_ERROR_PICTURE_END_OF_FILE End of stream encountered + @retval GFMXDECH264_ERROR_SEI_NOT_SEI_RBSP cannot decode this NAL Unit as its not SEI + + All NAL units with nal_unit_type 6 can be passed to GFMxDecH264DecSEI() for decoding in prefill mode. + + GFMxDecH264DecSEI decodes SEI rbsp. + + For actions to take on the particular return codes, refer to the return code documentation. + + @see GFMXDECH264DECSEI + */ +#define GFMxDecH264DecSEI(hMxDecH264, pSEI)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264DecSEI(hMxDecH264, pSEI) + + + /** Decode slice header and extract framenumber. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param VideoBuffPtr Pointer to bitstream + @param VideoBufferLength Length of bitstream data available in the buffer + + @retval framenum Framenumber of current nal unit data + @retval GFMXDECH264_ERROR_DECFRAMENUM_NOTSUPPORTED Nal unit type not supported + + NAL units with nal_unit_type 1 and 5 can be passed to parse slice header and extract + framenumber. + This function can be used in prefill buffer mode to find all nal units which + belongs to same frame before calling GFMxDecH264DecPicture. + + */ + + +#define GFMxDecH264DecNewFrameNum(hMxDecH264,VideoBuffPtr,VideoBufferLength) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264DecNewFrameNum(hMxDecH264,VideoBuffPtr,VideoBufferLength) + + +#define GFMxDecH264SetSequence(hMxDecH264, pSequence)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetSequence(hMxDecH264, pSequence) + +#define GFMxDecH264SetPicture(hMxDecH264, pPicture)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetPicture(hMxDecH264, pPicture) + +#define GFMxDecH264SetSlice(hMxDecH264, pSlice)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetSlice(hMxDecH264, pSlice) + +#define GFMxDecH264SetMBs(hMxDecH264, pMBs) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetMBs(hMxDecH264, pMBs) + +/** Post Processing on a decoded YUV surface. + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pP (PGFMXDECH264PP) Pointer to #GFMXDECH264PP parameter structure + + @retval GF_SUCCESS Applied post processing on decoded surface successfully + + GFMxDecH264PostProcessing() function can perform DeRinging and DeBlocking or DeBlocking only on a decoded YUV surface data. + + GFMXDECH264DECSEQUENCE::PictureInfo output flagbit (GF_MXDEC_H264_DEC_PICTURE_DEBLOCKING_FILTER) + is set by the API if H264 bit stream does not have in-the-loop DeBlocking. + This means app can perform out-of-the-loop DeBlocking by calling GFMxDecH264PostProcessing(). + If H264 bit stream has in-the-loop processing then hardware H264 decoder will perform in-the-loop DeBlokcing + and API resets this flag to zero to indicate that app should not perform DeBlocking. + + GFMxDecH264PostProcessing can be called any time. we need decoded YUV surface data and Qp values for each MB. + If video is decoded by our hardware decoder then Qp values are saved in the internal SRAM for the last frame. + + + @see GFMXDECH264PP + +*/ + + + +#define GFMxDecH264PostProcessing(hMxDecH264, pP) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264PostProcessing(hMxDecH264, pP) + +#define GFMxDecH264SetAttribute(hMxDecH264, uiFeature, pInfo) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetAttribute(hMxDecH264, uiFeature, pInfo) + +#define GFMxDecH264GetAttribute(hMxDecH264, uiFeature, pInfo) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264GetAttribute(hMxDecH264, uiFeature, pInfo) + + /** Set various runtime parameters. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param uiFeature (NvU32) ID of feature to set + @param pInfo (void*) Feature specific data + + @retval GF_SUCCESS Success + @retval GF_FAILURE Failure + + The following features identified by parameter \a uiFeature can be set, see documentation + for the individual \a uiFeature IDs for interpretation of data in parameter \a pInfo: + + + + + + + + + + + +
      uiFeatureMeaningpInfo interpretation
      #GF_MXDEC_H264_SET_READBITSTREAMSet up a stream callback function.GFMxDec calls + that callback function to request a portion of the bit stream from the application.#GFMXDECH264CALLBACK *
      #GF_MXDEC_H264_SET_SURFACE_LISTSet a list of surfaces for to be used to store reference and decode frames.#GFMXDECH264SURFLIST *
      #GF_MXDEC_H264_SET_UNLOCK_SURFACEUnlock one or all locked surface.NvS32
      + */ +#define GFMxDecH264Set(hMxDecH264, uiFeature, pInfo) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264Set(hMxDecH264, uiFeature, pInfo) + +#define GFMxDecH264InterruptControl(hMxDecH264, IntType, op, pData)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264InterruptControl(hMxDecH264, IntType, op, pData) + +#define GFMxDecH264InterruptHandler(hMxDecH264, IntType, pData)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264InterruptHandler(hMxDecH264, IntType, pData) + +#define GFMxDecH264DSPPoll(MxHandle, timeout)\ + ((PGFMXDECH264TABLE)((NvU32)MxHandle+MXDH264OFFSET))->MxDecH264DSPPoll(MxHandle, timeout) + + //Use the following flags in the setattribute function for the picture boundary mode. + //If you wish to send the sequence header separately from the first frame use the first flag(SEPARATE_SEQUENCE_HEADER) + //else use the second flag. +#define GFMXDECH264_SEPARATE_SEQUENCE_HEADER 0x1 +#define GFMXDECH264_COMBINED_SEQUENCE_HEADER 0x2 + + + /*@}*/ + + /** @page pageMxDecH264AppNotes MxDecH264API Application Notes + + @section pageMxDecH264AppNotes1 Programming Sequence + + Todo + + @section pageMxDecH264AppNotes2 Decode Surface Locking + + The H264 decoder can operate in a surface locking mode, which is activated by + attribute #GF_MXDEC_H264_ATTR_SURFACE_LOCKING. In this mode, GFMxDecH264DecPicture() + will automatically 'lock' the current surface with the decoded frame, and exclude it + from its surface pool available for decoding new frames. + + Surface locking is intended for usecases, were the decode surface is directly used as overlay. + For the duration it is displayed as overlay, the locked state ensures, that it won't be + overwritten. With this mechanism H264 decode and screen update can run in independent thread + contexts. + + If a surface from the pool is locked, it can still be used as a reference frame. + However it will never be reused and overwritten during a succeeding call to + GFMxDecH264DecPicture(). + + The application can re-add the locked surface to the set of writable surfaces by + calling GFMxDecH264Set / GF_MXDEC_H264_SET_UNLOCK_SURFACE. + + A locked surface is identified on return from GFMxDecH264DecPicture() via + GFMXDECH264DECPICTURE::ReconSurfaceNumber. This ID needs to be passed later to + GF_MXDEC_H264_SET_UNLOCK_SURFACE to perform the unlocking. + + The application has to ensure that at least + 1 surfaces + in the pool stay unlocked. If GFMxDecH264DecPicture() is called with unsufficient + free surfaces, error GFMXDECH264_ERROR_PICTURE_ALL_SURFACES_LOCKED will be returned. + + The number of surfaces set via GFMxDecH264Set / GF_MXDEC_H264_SET_SURFACE_LIST / + GFMXDECH264SURFLIST::surfList must be at least N+1+M, where N is the number of reference + frames and M the maximum allowed number of simulteneously locked surfaces. + + The lock-state of all surfaces can be reset via GFMxDecH264Set / GF_MXDEC_H264_SET_UNLOCK_SURFACE + passing -1 as surface ID. + */ + + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/Start_WM/test6/inc/GFMxDecRV9.h b/Start_WM/test6/inc/GFMxDecRV9.h new file mode 100755 index 00000000..a341d500 --- /dev/null +++ b/Start_WM/test6/inc/GFMxDecRV9.h @@ -0,0 +1,853 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFMxDecRV9.h + GFSDK RV9 Decode API header file. +*/ + +#ifndef _GF_MPEG_DEC_RV9__ +#define _GF_MPEG_DEC_RV9__ + +#include "nvtypes.h" +#include "GFVx.h" + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif +/** @addtogroup group MxDecRV9API +*/ +/*@{*/ + + +// MXDECRV9 CapabilityEx Flag +#define GF_MXDEC_RV9_CAPEx_USE_DSP 0x00000001 +// Whenever DSP is used for decoding +// Surace type should be = GF_SURFACE_VIDEO_MEMORY +// Surface hint type = GF_MEMORY_HINT_BOTTOM_UP +// In case of Host Used for decoding +// Surace type = GF_SURFACE_SYSTEM_MEMORY +// Surface hint type = 0 +// MXDECRV9CapFlags +/************************************************************************************************************/ + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_SIMPLE 0x00000001 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_MEDIUM 0x00000002 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_COMPLEX 0x00000004 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_LEVEL1 0x00000100 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_LEVEL2 0x00000200 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_LEVEL3 0x00000400 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_LEVEL4 0x00000800 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_DB 0x00001000 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_DR 0x00002000 +/*********************************************************************************************************************/ + + + + /** This structure holds various informations each of the frame to be decoded . +This structure is passed as parameter to GFMXDECRV9TABLE::MxDecRV9DecodeFrame. +*/ + +typedef struct _GFMXDECRV9FRAME +{ + + + NvU32 uiFrameOption; /**< uiFrameOption values + + + +
      #GF_MXDEC_RV9_DEC_FRAME_SPECIFY_SURF_RECTspecify rect area to hold the reconstructed image.
      + */ + PGFRECT pFrameRect; /**< not in use */ + NvU32 uiFrameType; /**< set new frame type information +
      + + + + + + +
      #GF_MXDEC_RV9_DISPLAY_FRAME
      #GF_MXDEC_RV9_KEY_FRAME
      #GF_MXDEC_RV9_P_FRAME
      #GF_MXDEC_RV9_B_FRAME
      #GF_MXDEC_RV9_DONT_DISPLAY_FRAME
      #GF_MXDEC_RV9_ERRONEOUS_FRAME
      + */ + PGFRMSURFACE pReconstructedSurf;/**< This is the surface to hold the decoded picture */ + NvU32 uiFrameSequenceCount; /**< set by GFMxDecRV9API */ + NvU32 uiTimeStamp; /**< in terms of millisecond */ + NvU8* pPreFillBuffer; /**< Input, Pointer bitstream for frame to decode */ + NvU32 PreFillBufferLength; /**< Input, Length of bitstream in bytes, must cover the entire frame */ + +}GFMXDECRV9FRAME, *PGFMXDECRV9FRAME; + +//uiFrameOption +/******************************************************************************************/ +/** uiFrameOption for GFMXDECRV9FRAME passed as an argument in MxDecRV9DecodeFrame(). \n +specify rect area to hold the reconstructed image.\n +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame. +*/ +#define GF_MXDEC_RV9_DEC_FRAME_SPECIFY_SURF_RECT 0x00000001 + +//uiFrameType values + +/******************************************************************************************/ +/** uiFrameType values for GFMXDECRV9FRAME set by MxDecRV9DecodeFrame(). \n + +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_DISPLAY_FRAME 0x0 + +/** uiFrameType values for GFMXDECRV9FRAME set by MxDecRV9DecodeFrame(). \n + The decoded Frame is I-frame. +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_KEY_FRAME 0x1 + +/** uiFrameType values for GFMXDECRV9FRAME set by MxDecRV9DecodeFrame(). \n +The Decoded Frame is P-frame. +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_P_FRAME 0x2 + +/** uiFrameType values for GFMXDECRV9FRAME set by MxDecRV9DecodeFrame(). \n + The decoded Frame is B-frame. +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_B_FRAME 0x4 + +/** uiFrameType values for GFMXDECRV9FRAME passed as an argument in MxDecRV9DecodeFrame(). \n + +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_DONT_DISPLAY_FRAME 0x8 + +/** uiFrameType values for GFMXDECRV9FRAME passed as an argument in MxDecRV9DecodeFrame(). \n + Decode frame is Erroneous +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_ERRONEOUS_FRAME 0x16 +/***********************************************************************************************************************/ + +/** This structure holds various informations needed for Post Processing of decoded frame . +This structure is passed as parameter to MxDecRV9PostProcessing(). +*/ +typedef struct _GFMXDECRV9PP +{ + PGFRMSURFACE pPPSurf; + /**< pointer to surface that will + hold the result from Post Processing + */ + PGFRECT pPPRect; + /**< Rectangle area to be processed for both + source and destination surface + */ + + PGFRMSURFACE pSrcSurf; + /**< pointer to surface that will + hold the result from Post Processing + */ + PGFRECT pSrcRect; + /**< Rectangle area to be processed for both + source and destination surface + */ +} GFMXDECRV9PP, *PGFMXDECRV9PP; + +// PPOption +#define GF_MXDEC_RV9_PP_SM_OFF 0x0 //Turn OFF Smoothing filter for this frame +#define GF_MXDEC_RV9_PP_SM_ON 0x1 //Turn ON Smoothing filter for this frame +#define GF_MXDEC_RV9_PP_DR_ON 0x2 //Turn ON DeRinging filter for this frame + + +// Hardware Status +/************************************************************************************************************/ + +#define GF_DECODER_FRAME_DONE 0x00000010 + + + +#define GF_DECODER_PP_FRAME_DONE 0x00000020 + +/*********************************************************************************************************/ +#define GF_DECODER_PP_FRAME_RV9 0x00000040// + + +/** Attribute MxDecRV9Set::uiFeature.\n + Application sets this attribute to register a callback function and + its correpnding parameter to read bitstream data . +@see GFMXDECRV9TABLE::MxDecRV9Set, pInfo should be a pointer to PGFMXDECRV9CALLBACK \n +*/ +#define GF_MXDEC_RV9_SET_READBITSTREAM 0x1 + + + +/** Attribute MxDecRV9Set::uiFeature \n + This will setup the surface list, including all of the ref surface and one reconstructed one. \n +@see GFMXDECRV9TABLE::MxDecRV9Set, pInfo should a pointer PGFMXDECRV9SURFLIST +*/ +#define GF_MXDEC_RV9_SET_SURFACE_LIST 0x2 + + + +/** Attribute MxDecRV9Set::uiFeature \n + This will Set the GFMxDecRV9API to decode the RV8 stream + By default GFMxDecRV9API will assume the stream to be RV9 stream\n +@see GFMXDECRV9TABLE::MxDecRV9Set +*/ +#define GF_MXDEC_RV9_BITSTREAM_RV8 0x4 + + +/** Attribute GFMxDecRV9SetAttribute::uiFeature and GFMxDecRV9GetAttribute::uiFeature \n + Application will determine the decoding boundary, for RV9, this boundary means VOL + and VOP boundary. For certain file formats, those boundary information are + stored in the video file, APP can easily use those information to determine + the boundary. + If APP wants API to detect the boundary,App should not disable this attribute. This is mainly for streaming case, APP does + not have those handy boundary information. API will automatically detects those + boundaries. APP does not need to parse the bitstream to detect those boundaries.\n + *pInfo: 1: APP will determine the decoding boudary\n + *pInfo: 0: APP will not determine the decoding boundary \n +@see GFMXDECRV9TABLE::MxDecRV9SetAttribute +*/ +#define GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY 0x00000001 + + + +/** Attribute GFMxDecRV9GetAttribute::uiFeature \n + This attribute only can be used for GFMxDecGetAttribute + If application wants to set pDestRect in GFMXDECVOP or GFMXDECMP4DECVOP, + application must use this attributes to get allignment information and + align the rectangle top & left corner accordinately.\n + *pInfo: top fieled alignment in term of lines \n +@see GFMXDECRV9TABLE::MxDecRV9GetAttribute +*/ +#define GF_MXDEC_ATTR_RV9_DEC_FRAME_RECT_TOP_ALIGNMENT 0x00000002 + + + +/** Attribute GFMxDecRV9GetAttribute::uiFeature \n + This attribute only can be used for GFMxDecGetAttribute + If application wants to set pDestRect in GFMXDECVOP or GFMXDECMP4DECVOP, + application must use those attributes to get allignment information and + align the rectangle top & left corner accordinately.\n + *pInfo: left fieled alignment in term of pixels\n + +@see GFMXDECRV9TABLE::MxDecRV9GetAttribute +*/ +#define GF_MXDEC_ATTR_RV9_DEC_FRAME_RECT_LEFT_ALIGNMENT 0x00000003 + + +/** Attribute GFMxDecRV9SetAttribute::uiFeature and GFMxDecRV9GetAttribute::uiFeature \n + Application will fill the buffer and push the data to the decoder. +*/ +#define GF_MXDEC_RV9_ATTR_PREFILLBUFFER 0x00000008 + +/********************************************************************************************************/ + +/** Structure holding the callback function pointer. +Used in registering the callback function +The callback function is a function which the API calls to request a portion of the bit stream from the application. +@see GFMXDECRV9TABLE::MxDecRV9Set +*/ + + + +typedef struct _GFMXDECRV9CALLBACK +{ + void *pPara;/**< pPara is a parameter passed from APP, + and APP wants API to call back with this parameter + */ + NvU32 (*pCallBack)(void * pPara, NvU8 ** ppBuffer, NvU32 * BufferLength,NvU32 uFlag); + /**< Application callback function pointer. + Register a callback function for fetching RV9 data. + + @param *pPara Parameter to pass on to application callback function + @param ppBuffer Buffer Pointer + @param BufferLength Parameter to pass on to application callback function + + If APP set GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY, + APP should return GF_MXDEC_RV9HD_BOUNDARY_REACHED when the boundary is + detected. + If APP does not set GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY, + 0 should be returned. + */ + +}GFMXDECRV9CALLBACK, *PGFMXDECRV9CALLBACK; + +#define GF_MXDEC_RV9HD_ENDOFFILE 0x00000200 +#define GF_MXDEC_RV9HD_APP_DETECT_BOUNDARY 0x00001000 +#define GF_MXDEC_RV9HD_BOUNDARY_REACHED 0x00002000 +#define GF_MXDEC_RV9HD_ENDOFFILE_REACHED 0x00004000 +#define GF_MXDEC_RV9HD_APP_PREFILLBUFFER 0x00008000 +#define GF_MXDEC_RV9HD_BEGININGOFFILE_REACHED 0x00010000 + + + +/** MxDecRV9API GFMXDECRV9CALLBACK::(*pCallBack)(, , ,uFlag)\n + for reading bitstream in forward direction +@see GFMXDECRV9CALLBACK +*/ +#define GF_MXDEC_RV9_READ_BITSTREAM_FORWARD 0x00000002 + +/** MxDecRV9API GFMXDECRV9CALLBACK::(*pCallBack)(, , ,uFlag) \n + for reading bitstream in reverse direction. +@see GFMXDECRV9CALLBACK +*/ +#define GF_MXDEC_RV9_READ_BITSTREAM_BACKWARD 0x00000003 + +//Resync options : + +/** MxDecRV9API GFMxDecRV9Resync( ,ResyncOption)\n + Resynchronize forward to the nearest I frame. If the GFMxDecRV9API is right + before an I frame, GFMxDecRV9Resync() returns immediately. Otherwise, + GFMxDecRV9Resync() moves forward, parsing bits until it reaches the first bit of the next I frame. +@see ResyncOption, GFMXDECRV9TABLE::MxDecRV9Resync +*/ + +#define GF_MXDEC_RV9_RESYNC_FORWARD_NEAREST_I_FRAME 0x00000001 + +/** MxDecRV9API GFMxDecRV9Resync(,ResyncOption)\n + Resynchronize backward to the nearest I frame. + GFMxDecRV9Resync() moves backward, parsing bits until it reaches the first bit of the previous I frame. +@see ResyncOption, GFMXDECRV9TABLE::MxDecRV9Resync +*/ +#define GF_MXDEC_RV9_RESYNC_BACKWARD_NEAREST_I_FRAME 0x00000002 + +/** MxDecRV9API GFMxDecRV9Resync(,ResyncOption)\n + Resynchronize backward to the nearest P frame. + GFMxDecRV9Resync() moves backward, parsing bits until it reaches the first bit of the previous P frame. +@see ResyncOption, GFMXDECRV9TABLE::MxDecRV9Resync +*/ +#define GF_MXDEC_RV9_RESYNC_BACKWARD_NEAREST_P_FRAME 0x00000004 + + + +/** this macro is used in GFMXDECRV9SURFLIST structure \n + Reference surfaces for RV9 decoder. */ +#define GF_MXDEC_RV9_NUM_SURFACES 3 + +/** This structure is used to Set up a list of surfaces for RV9 + decoder . +*/ + +typedef struct _GFMXDECRV9SURFLIST +{ + + PGFRMSURFACE SurfList[GF_MXDEC_RV9_NUM_SURFACES]; + /**< an array of PGFRMSURFACE + @see #GF_MXDEC_RV9_NUM_SURFACES + */ + + +}GFMXDECRV9SURFLIST, *PGFMXDECRV9SURFLIST; + +/** This structure is passed to MxDecRV9DecodePictureHeader() function, which sets + different fields of this structure. +*/ +typedef struct _GFMXDECRV9PICHDR +{ + NvU32 uiRV8StreamInfo; + /**< set by GFMxDecRV9API. Valid only if it is RV8 stream + + + + + + + + + + + +
      #GF_MXDEC_RV8_UMVUnrestricted Motion Vector
      #GF_MXDEC_RV8_DFIn loop Deblocking filter
      #GF_MXDEC_RV8_SSSlice Structured
      #GF_MXDEC_RV8_RPRReference Picture Resampling
      #GF_MXDEC_RV8_ROUNDRound off for half pixel motion compensation
      + */ + NvU32 uiRV9StreamInfo; + /**< set by GFMxDecRV9API. Valid only if it is RV9 stream + + + + + +
      #GF_MXDEC_RV9_INTERLACEInterlaced mode used
      #GF_MXDEC_RV9_DF_PASS_THRUIn loop Deblocking filter is disabled
      + */ + NvU32 uiWidth; /**< Video width */ + NvU32 uiHeight; /**< Video height */ + NvU32 uiTR; /**< Temporal reference in milliseconds */ + +}GFMXDECRV9PICHDR, *PGFMXDECRV9PICHDR; + +//uiRV8StreamInfo + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo \n + Unrestricted Motion Vector. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_UMV 0x00000001 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo \n + In loop Deblocking filter. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_DF 0x00000002 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo\n + Slice Structured. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_SS 0x00000004 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo \n + Reference Picture Resampling. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_RPR 0x00000008 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo \n + Round off for half pixel motion compensation. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_ROUND 0x00000010 + +//uiRV9StreamInfo + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV9StreamInfo \n + Interlaced mode used. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV9_INTERLACE 0x00000001 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV9StreamInfo \n + In loop Deblocking filter is disabled. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV9_DF_PASS_THRU 0x00000002 + +//resync options +//TBD + +//when GF_ERROR is return check the following flag +#define GF_MXDEC_RV9_BAD_MB 0x00010000 //there is at least one MB is wrong + //if APP set up pMBInfo, APP can check which MB is wrong + +/** MxDecRV9API interrupt operation types. +Constants to specify operation for a call to MxDecRV9InterruptControl(). +@see GF_MXDEC_RV9_INTERRUPT_OPERATION_TYPE, GFMXDECRV9TABLE::MxDecRV9InterruptControl +*/ +typedef enum +{ + /** Enable interrupt/status assertion for an interrupt type. */ + GF_MXDEC_RV9_INTERRUPT_ENABLE, + + /** Disable interrupt/status assertion for an interrupt type. */ + GF_MXDEC_RV9_INTERRUPT_DISABLE, + + /** Clear interrupt/status assertion for an interrupt type. */ + GF_MXDEC_RV9_INTERRUPT_CLEAR +} GF_MXDEC_RV9_INTERRUPT_OPERATION_TYPE; // Interrupt operation. + + + +/** MxDecRV9API interrupt types. +@see GF_MXDEC_RV9_INTERRUPT_TYPE, GFMXDECRV9TABLE::MxDecRV9InterruptControl and GFMXDECRV9TABLE::MxDecRV9InterruptHandler +*/ +typedef enum +{ + /** Interrupt type is DSP Command Interrupt */ + GF_MXDEC_RV9_DSP_COMMAND_INTR, + + /** Interrupt type Post Processing done */ + GF_MXDEC_RV9_POST_PROCESSING_DONE_INTR, + + /** Interrupt type is Decoding done Interrupt */ + GF_MXDEC_RV9_DECODE_DONE_INTR +} GF_MXDEC_RV9_INTERRUPT_TYPE; + +/** MxDecRV9API virtual function pointer table. */ +typedef struct _GFMXDECRV9TABLE +{ + + /** This function returns version and capabilities of API and hardware. + + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param pMXProp (PGFPROPERTY) Pointer to GFPROPERTY structure to be filled in + + @retval GF_SUCCESS \a pMXProp filled in successfully + @retval GF_ERROR Some error occured + + The GFPROPERTY structure passed with parameter \a pMXProp will be + filled in on successfull return. The GFPROPERTY::Capability field + will hold a combination of flagbits indicating capabilities specific + to the MxDecRV9API: + + + + + + + + + + + + + + + + + + + + +
      #GF_MXDEC_RV9_CAP_SIMPLE support simple profile.
      #GF_MXDEC_RV9_CAP_MEDIUM support medium profile.
      #GF_MXDEC_RV9_CAP_COMPLEX support complex profile
      #GF_MXDEC_RV9_CAP_LEVEL1support LEVEL 1.
      #GF_MXDEC_RV9_CAP_LEVEL2 support LEVEL 2.
      #GF_MXDEC_RV9_CAP_LEVEL3 support LEVEL 3.
      #GF_MXDEC_RV9_CAP_LEVEL4 support LEVEL 4.
      #GF_MXDEC_RV9_CAP_DB support Post Processing's smoothing filter for RV8 streams.
      #GF_MXDEC_RV9_CAP_DR support Post Processing's de-ringing.
      + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxDecRV9API functions. + + @see GFPROPERTY +*/ + GF_RETTYPE (* MxDecRV9GetProperty)(GFMxDecRV9Handle hMxDecRV9, PGFPROPERTY pMXProp ); + + + + GF_RETTYPE (* MxDecRV9GetStatus)(GFMxDecRV9Handle hMxDecRV9, NvU32 * pStatus); + + + /** This function applies the postprocessing filters to the source surface and outputs + the new image to the destitation surface. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param pP (#PGFMXDECRV9PP) Pointer to the PGFMXDECRV9PP. + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + GF_ERROR Return values for the above function + + @see PGFMXDECRV9PP +*/ + GF_RETTYPE (* MxDecRV9PostProcessing)(GFMxDecRV9Handle hMxDecRV9, PGFMXDECRV9PP pP); + + + /** This function sets the MxDecRV9API options. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param uiFeature : + + + + + +
      #GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY will determine the VOL and VOP boundary, for RV9.
      #GF_MXDEC_RV9_ATTR_PREFILLBUFFERApp will fill the buffer and push the data to the decoder.
      + @param pInfo Pointer to the information buffer. + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + +*/ + GF_RETTYPE (* MxDecRV9SetAttribute)(GFMxDecRV9Handle hMxDecRV9, NvU32 uiFeature, NvU32* pInfo); + + + /** This function gets the MxDecRV9API options. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param uiFeature : + + + + + +
      #GF_MXDEC_ATTR_RV9_DEC_FRAME_RECT_TOP_ALIGNMENT
      #GF_MXDEC_ATTR_RV9_DEC_FRAME_RECT_LEFT_ALIGNMENT
      #GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY
      #GF_MXDEC_RV9_ATTR_PREFILLBUFFER
      + @param pInfo Pointer to the information buffer. + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + +*/ + GF_RETTYPE (* MxDecRV9GetAttribute)(GFMxDecRV9Handle hMxDecRV9, NvU32 uiFeature, NvU32* pInfo); + + + /** This function sets the MxDecRV9API options. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param uiFeature : + + + + + + + +
      #GF_MXDEC_RV9_SET_READBITSTREAM will Set up readbitstream call back function.
      #GF_MXDEC_RV9_SET_SURFACE_LISTwill setup the surface list, including all of the ref surface and one reconstructed one.
      #GF_MXDEC_RV9_BITSTREAM_RV8 will Set the GFMxDecRV9API to decode the RV8 stream.
      + @param pInfo Pointer to the information buffer. + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + +*/ + GF_RETTYPE (* MxDecRV9Set)(GFMxDecRV9Handle hMxDecRV9, NvU32 uiFeature, void * pInfo); + + + + +/** This function Decodes the picture header and gives the related information in + PictureHeader. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param pPictureHeader Pointer to the #GFMXDECRV9PICHDR. + @retval GF_SUCCESS \a if it successfully decodes the Header + @retval GF_ERROR Some error occured + GF_ERROR Return values for the above function + + + + + + + + + +
      #GF_ERROR_RV9DECPICTUREHDR_DETECTED There is a sequence header in the bit stream. + Application need to decide this sequence is an error or this + is intended to be in the bit stream.
      #GF_ERROR_RV9DECPICTUREHDR_END_OF_FILE No more bit stream from application.
      #GF_ERROR_RV9DECPICTUREHDR_CORRUPTED GFMxDecRV9DecPicture encounters an un-recoverable error + in the bit stream. Application should call GFMxDecRV9Resync + API to skip this picture.
      #GF_ERROR_RV9DECPICTUREHDR_NOT_ENOUGH_MEM There is not enough memory.
      + + @see GFMXDECRV9PICHDR +*/ + GF_RETTYPE (* MxDecRV9DecodePictureHeader)(GFMxDecRV9Handle hMxDecRV9, PGFMXDECRV9PICHDR pPictureHeader); + + + /** This function decodes one frame from the bitstream. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param pFrame pointer to #PGFMXDECRV9FRAME + @retval GF_SUCCESS \a if successful + @retval #GF_MXDEC_RV9_FRAMEDEC_EOF_REACHED \a No more bit streams from the application. + +*/ + GF_RETTYPE (* MxDecRV9DecodeFrame)(GFMxDecRV9Handle hMxDecRV9, PGFMXDECRV9FRAME pFrame); + + + +/** GFMxDecRV9Resync re-synchronizes to a specific position of a bit stream.. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param ResyncOption : + + + + + + + +
      #GF_MXDEC_RV9_RESYNC_FORWARD_NEAREST_I_FRAME.Resynchronize forward to the nearest I frame.
      #GF_MXDEC_RV9_RESYNC_BACKWARD_NEAREST_I_FRAME.Resynchronize backward to the nearest I frame.
      #GF_MXDEC_RV9_RESYNC_BACKWARD_NEAREST_P_FRAME.Resynchronize backward to the nearest P frame.
      + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + +*/ + GF_RETTYPE (* MxDecRV9Resync)(GFMxDecRV9Handle hMxDecRV9, NvU32 ResyncOption); + + + + + GF_RETTYPE (* MxDecRV9InterruptControl)(GFMxDecRV9Handle hMxDecRV9, + GF_MXDEC_RV9_INTERRUPT_TYPE IntType, GF_MXDEC_RV9_INTERRUPT_OPERATION_TYPE op, + void * pData); + + + + /** This function provides component-level interrupt control for the + MxDecRV9API. It is optional because an interrupt service thread (IST) at the + application level can call the MxDecRV9API to complete the task. + @param hMxDecRV9(GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param IntType MxDecRV9API interrupt type as defined in + “#GF_MXDEC_RV9_INTERRUPT_TYPE” + @param pData Pointer to data being passed in or out. + @retval GF_SUCCESS \a if successful. + @retval GF_ERROR Some error occured. + +*/ + GF_RETTYPE (* MxDecRV9InterruptHandler)(GFMxDecRV9Handle hMxDecRV9, + GF_MXDEC_RV9_INTERRUPT_TYPE IntType, void * pData); // Reserved. + +} GFMXDECRV9TABLE, *PGFMXDECRV9TABLE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFMxDecRV9Open(GFRmHandle hRm, GFMxDecRV9Handle *phMxDecRV9, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMxDecRV9Close(GFMxDecRV9Handle *phMxDecRV9); + +#if NVCPU_IS_XTENSA +#define MXDRV9OFFSET sizeof(GFMXDECRV9TABLE) +#else +#define MXDRV9OFFSET 0 +#endif + + +//ERROR return values for the GFMxDecRV9DecodePictureHeader() + +/** ERROR return values for the GFMxDecRV9DecodePictureHeader() \n + There is a sequence header in the bit stream. + Application need to decide this sequence is an error or this + is intended to be in the bit stream. + @see GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_ERROR_RV9DECPICTUREHDR_DETECTED 0x00000001 + + +/**ERROR return values for the GFMxDecRV9DecodePictureHeader() \n + No more bit stream from application. + @see GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_ERROR_RV9DECPICTUREHDR_END_OF_FILE 0x00000002 + + +/** ERROR return values for the GFMxDecRV9DecodePictureHeader() \n + GFMxDecRV9DecPicture encounters an un-recoverable error + in the bit stream. Application should call GFMxDecRV9Resync + API to skip this picture. + @see GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_ERROR_RV9DECPICTUREHDR_CORRUPTED 0x00000003 + +/**ERROR return values for the GFMxDecRV9DecodePictureHeader() \n + There is not enough memory. +*/ +#define GF_ERROR_RV9DECPICTUREHDR_NOT_ENOUGH_MEM 0x00000004 + +//ERROR return values for MxDecRV9DecodeFrame() +/** ERROR return values for MxDecRV9DecodeFrame()\n + API returns this error when End of file is reached,i.e No more bit stream from application. + once this ERROR is returned, the application should provide more media files to decode or + exit gracefully.*/ +#define GF_MXDEC_RV9_FRAMEDEC_EOF_REACHED 0x00000001 + +/* #### MxDecRV9API Helper macros. Maybe useful for backward compatible API. #### */ + + +/* #### MxDecRV9 Helper macros. Maybe useful for backward compatible API. #### */ +#define GFMxDecRV9GetProperty(hMxDecRV9, pMXProp) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9GetProperty(hMxDecRV9, pMXProp) + +#define GFMxDecRV9GetStatus(hMxDecRV9, pStatus) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9GetStatus(hMxDecRV9, pStatus) + +#define GFMxDecRV9DecodePictureHeader(hMxDecRV9, pPictureHeader)\ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9DecodePictureHeader(hMxDecRV9, pPictureHeader) + +#define GFMxDecRV9PostProcessing(hMxDecRV9, pP) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9PostProcessing(hMxDecRV9, pP); + +#define GFMxDecRV9SetAttribute(hMxDecRV9, uiFeature, pInfo) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9SetAttribute(hMxDecRV9, uiFeature, pInfo) + +#define GFMxDecRV9GetAttribute(hMxDecRV9, uiFeature, pInfo) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9GetAttribute(hMxDecRV9, uiFeature, pInfo) + +#define GFMxDecRV9Set(hMxDecRV9, uiFeature, pInfo) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9Set(hMxDecRV9, uiFeature, pInfo) + +#define GFMxDecRV9DecodeFrame(hMxDecRV9, pFrame) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9DecodeFrame(hMxDecRV9, pFrame) + +#define GFMxDecRV9Resync(hMxDecRV9, ResyncOption) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9Resync(hMxDecRV9, ResyncOption) + +#define GFMxDecRV9InterruptControl(hMxDecRV9, IntType, op, pData)\ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9InterruptControl(hMxDecRV9, IntType, op, pData) + +#define GFMxDecRV9InterruptHandler(hMxDecRV9, IntType, pData)\ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9InterruptHandler(hMxDecRV9, IntType, pData) + + + +/*@}*/ +/*@}*/ + + +/** @page pageMxDecRV9AppNotes MxDecRV9API Application Notes + @section pageMxDecRV9AppNotes1 Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start + GFSDK usage. + + + + 1. Call GFMxDecRV9Open() to obtain RV9Handle. This handle will be passed to different functions of MxDecRV9API. + + 2. Call GFMxDecRV9GetProperty()to querry the properties.Check whether this + MxDecRV9API version can support the desired RV9 profile and level. + + 3. Set different attributes of RV9 decoder using GFMxDecRV9SetAttribute(), + #GFMXDECRV9TABLE::MxDecRV9SetAttribute. + + 4. Decode the picture header using GFMxDecRV9DecodePictureHeader(), + #GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader. + + 5. call GFRmSurfaceAlloc() to allocate at least one reference surface and one + current surface for decoding purposes. + + 6. If the postprocessing engine is needed, allocate one surface to hold the + postprocessing results. + + 7. For display purposes, the decoder application could call GFVxBlt() for + the following two scenarios. Please refer to the latest GFVxAPI document + for additional information. + + + + 8. The decoder application should decode on frame by frame basis. Call GFMxDecRV9DecodeFrame() to decode each frame. + once GF_MXDEC_RV9_FRAMEDEC_EOF_REACHED is returnd by API, application should exit gracefully. + #GFMXDECRV9TABLE::MxDecRV9DecodeFrame + + 9. If Post processing is enabled , call GFMxDecRV9PostProcessing(). + #GFMXDECRV9TABLE::MxDecRV9PostProcessing + + 10. Before exiting the application, the decoder application should call + GFRmSurfaceFree() to free the surfaces that have been allocated. + + 11. Call GFMxDecRV9Close() with RV9Handle to release the resources of the decoder module. + +*/ + + +#ifdef __cplusplus +} // only need to export C interface if + // used by C++ source code +#endif + +#endif diff --git a/Start_WM/test6/inc/GFMxDecVC1.h b/Start_WM/test6/inc/GFMxDecVC1.h new file mode 100755 index 00000000..da28a6ec --- /dev/null +++ b/Start_WM/test6/inc/GFMxDecVC1.h @@ -0,0 +1,732 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFMxDecVC1.h +GFSDK VC1 Decode API header file. +*/ + +#ifndef _GF_MPEG_DEC_VC1__ +#define _GF_MPEG_DEC_VC1__ + +#include "nvtypes.h" +#include "GFVx.h" +#include "GFDef.h" + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif + + /** @addtogroup groupMxDecVC1 MxDecVC1API VC1 Decode API + The VC1 decoder API handles WMV simple profile-compliant bit + streams for this version, but has been defined to handle all of the three + profiles for future expansion. + + The VC1 decoder API has two sets of API—a high level API and a low + level API. + + Using the High Level API + + The high level API has a built-in entropy decoder. It decodes the bit stream. + This high level API calls the low level API internally. When using the high level API, the + application can ignore the low level API. + + The MxDecVC1API high level functions include the following: + - GFMxDecVC1DecSequenceLayer() + - GFMxDecVC1DecPicture() + - GFMxDecVC1Set() + + Using the Low Level API + + The low level API is essentially a macroblock decoder engine. It decodes + macroblock by macroblock. When using the low level API, the application + needs to handle the entropy decoding. The low level + API assumes that the information passed from caller is correct, and does not + have any error concealment functionality build in. The application which + called the low level API must make sure that no macroblocks are missing for + any picture. + + The MxDecVC1API low level functions include the following: + - GFMxDecVC1SetPicture() + - GFMxDecVC1SetMBs() + - GFMxDecVC1SetPicture() + +
        +
      • @ref pageMxDecVC1AppNotes +
          +
        • @ref pageMxDecVC1AppNotes1 +
        +
      + */ + /*@{*/ + + // MXDECVC1CapFlags + + /** MxDecVC1API property flag: Simple profile supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_SIMPLE 0x00000001 + + /** MxDecVC1API property flag: Main profile supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_MAIN 0x00000002 + + /** MxDecVC1API property flag: Extended profile supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_ADVANCE 0x00000004 + + /** MxDecVC1API property flag: Low LEVEL supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LOWLEVEL 0x00000008 + + /** MxDecVC1API property flag: Medium LEVEL supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_MEDIUMLEVEL 0x00000010 + + /** MxDecVC1API property flag: High LEVEL supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_HIGHLEVEL 0x00000100 + + /** MxDecVC1API property flag: LEVEL 0 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL0 0x00000200 + + /** MxDecVC1API property flag: LEVEL 1 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL1 0x00000400 + + /** MxDecVC1API property flag: LEVEL 2 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL2 0x00000800 + + /** MxDecVC1API property flag: LEVEL 3 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL3 0x00001000 + + /** MxDecVC1API property flag: LEVEL 4 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL4 0x00002000 + + + /**Enable the DSP side profiling */ +//#define GF_ENABLE_PROFILER 1 + +// to divert the code for checking the non-working of hw modules as of now +#define USE_HW_MODULES + + /** Parameter structure for MxDecVC1DecSequenceLayer(). + Both input and output parameters are passed via this structure to MxDecVC1DecSequenceLayer(). + @see MxDecVC1DecSequenceLayer() + */ + + + typedef struct _GFMXDECVC1DECSEQUENCELAYER + { + + NvU32 uiSequenceOption; /**< Input flags, see GFMXDECVC1_DECSEQUENCEOPTION_* */ + NvU8 ucSequenceLayerInfo; /**< SequenceLayerInfo Definition */ + NvU16 usWidth; /**< Horizontal size of the coded picture in pixels */ + NvU16 usHeight; /**< Vertical size of the coded picture in pixels */ + NvU8 ucProfile; /**< Profile of the sequence */ + NvU8 ucLevel; /**< Level of the sequence */ + NvU32 uiHRDRate; /**< Peak transmission rate R in bits per second */ + NvU32 uiHRDBufferSize; /**< Buffer size B in milliseconds. */ + NvU32 uiFrameRate; /**< Rounding frame rate of the encoded clips */ + NvU8* pPreFillBuffer; /**< Input, Pointer bitstream for sequence header to decode */ + NvU32 PreFillBufferLength; /**< Input, Length of bitstream in bytes, must cover the entire sequence header */ + NvU32 PreFillBufferBytesConsumed;/**< Output, Amount of bytes consumed by the component */ + + } GFMXDECVC1DECSEQUENCELAYER, *PGFMXDECVC1DECSEQUENCELAYER; + + //SequenceLayerInfo: +#define MXDEC_VC1_CONSTANT_BITRATE 0x00000001 /**< Flag is set when the sequence is encoded at constant bitrate */ +#define MXDEC_VC1_MULTIRESOLUTION 0x00000002 /**< Flag indicating that the frames can be coded at smaller */ + //resolution. Resolution change is allowed only on I pictures. + //Information of the picture + + /** GFMXDECVC1DECSEQUENCELAYER::uiSequenceOption input flagbit: Bitstream is passed with GFMxDecVC1DecSequenceLayer(). + If this flag is set bitstream data is passed with the call to GFMxDecVC1DecSequenceLayer() + instead via the read bitstrem callback. This can be used only with boundary detection + on application level. The bitstream data is passed via GFMXDECVC1DECSEQUENCELAYER::pPreFillBuffer and + GFMXDECVC1DECSEQUENCELAYER::PreFillBufferLength. + */ +#define GFMXDECVC1_DECSEQUENCEOPTION_PREFILLBUFFER 0x00000001 + + + /** Parameter structure for MxDecVC1DecPicture(). + Both input and output parameters are passed via this structure to MxDecVC1DecPicture(). + @see MxDecVC1DecPicture() + */ + typedef struct _GFMXDECVC1DECPICTURE + { + /**< the following fields are set by app */ + NvU32 uiPictureOption; /**< Set by application. Set to 0 for this version.*/ + PGFRMSURFACE pRef; /**< Reference Picture Surface */ + PGFRMSURFACE pCur; /**< Current Picture Surface */ + PGFRECT pRefRect; /**< pRefSurfRect specified a rectangular area within + the pRef surface, and GFMxDecVC1 references the + image in the pRefSurfRect area of the pRef surface. + If pRefSurfRect is NULL, entire pRef surface is referred.*/ + + PGFRECT pCurRect; /**pCurSurfRect specified a rectangular area within + the pCur surface, and GFMxDecVC1 references the + image in the pCurSurfRect area of the pCur surface. + If CurSurfRect is NULL, entire pCur surface is referred. + */ + + /**< the following fields are set by MxDecVC1DecPicture API */ + NvU32 uiPictureInfo; /**< Current Picture Information. */ + + NvU8* pPreFillBuffer; /**< Input, Pointer bitstream for frame to decode */ + NvU32 PreFillBufferLength; /**< Input, Length of bitstream in bytes, must cover the entire frame */ + NvU32 PreFillBufferBytesConsumed; /**< Output, Amount of bytes consumed by the component */ + + NvU32 uiTimeStamp; /**< Value Specified in Picture Layer Header.*/ + NvU8 * pMBInfo; /**< each element tells the particular MB is wrong or not.*/ + +#ifdef GF_ENABLE_PROFILER + + NvU32 DSPTimers[10]; +#endif + + } GFMXDECVC1DECPICTURE, *PGFMXDECVC1DECPICTURE; + + //PictureInfo: +#define MXDEC_VC1_DEC_PICTURE_P 0x00000001 //Flag is set when current Picture is P type +#define MXDEC_VC1_DEC_NOT_CODED 0x00000010 //Flag is set when current picture is not coded. + +//uiPictureOption + +/** GFMXDECVC1DECPICTURE::uiPictureOption input flagbit: Use target rectangle. + If this flag is set, the GFMXDECVC1DECPICTURE::pPictureRect will point to + a rectangle on the output surface, where the reconstructed frame is placed. +*/ +#define GF_MXDEC_VC1_DEC_PICTURE_SPECIFY_SURF_RECT 0x00000001 + +/** GFMXDECVC1DECPICTURE::uiPictureOption input flagbit: Bitstream is passed with MxDecVC1DecPicture(). + If this flag is set bitstream data is passed with the call to MxDecVC1DecPicture() + instead via the read bitstrem callback. This can be used only with frame boundary detection + on application level. The bitstream data is passed via GFMXDECVC1DECPICTURE::pPreFillBuffer and + GFMXDECVC1DECPICTURE::PreFillBufferLength. +*/ +#define GF_MXDEC_VC1_DEC_PICTURE_SPECIFY_PREFILLBUFFER 0x00000002 + +/** GFMXDECVC1DECPICTURE::uiPictureOption input flagbit: If This Flag is Set Reading of + .rcv wrapper will be skipped for each picture. +*/ +#define GF_MXDEC_VC1_DEC_PICTURE_SPECIFY_SKIP_RCV_WRAPPER 0x00000004 + + /**Low level API Picture structure + */ + typedef struct _GFMXDECVC1PICTURE + { + NvU32 PictureInfo; /**< Current Picture Information defined in + //GFMXDECVC1PICTURE Definitions */ + PGFRMSURFACE pRef; /**< Reference Picture Surface */ + PGFRMSURFACE pCur; /**< Current Picture Surface */ + PGFRECT pRefRect; /**< pRefSurfRect specified a rectangular area + within the pRef surface, and GFMxDecVC1 + references the image in the pRefSurfRect + area of the pRef surface. If pRefSurfRect is NULL, + entire pRef surface is referred. */ + PGFRECT pCurRect; /**< pCurSurfRect specified a rectangular area + within the pCur surface, and GFMxDecVC1 + references the image in the pCurSurfRect + area of the pRef surface. If pCurSurfRect is NULL, + entire pCur surface is referred. */ + + } GFMXDECVC1PICTURE, *PGFMXDECVC1PICTURE; + //PictureInfo: +#define MXDEC_VC1_PICTURE_P_PICTURE 0x00000001 + //Indicates a P Picture when set otherwise a I Picture +#define MXDEC_VC1_PICTURE_SPECIFY_REFSURF_RECT 0x00000002 + //If this Flag is set, pRefSurfRect must be set, and GFMxDecVC1 + //references the image in the pRefSurfRect area of the pRef surface. + //Otherwise entire pRef surface is referred. +#define MXDEC_VC1_PICTURE_SPECIFY_CURSURF_RECT 0x00000004 + //If this Flag is set, pCurSurfRect must be set, and GFMxDecVC1 outputs + //the decoded image in the pCurSurfRect area of the pCur surface. + //Otherwise entire pCur surface is referred. +#define MXDEC_VC1_PICTURE_ROUNDING_ONE 0x00000008 + //PICTURE_ROUNDING_TYPE is one + + + /**motion vector information for current macroblock*/ + + typedef struct _GFMXDECVC1VECTOR + { + NvS16 sH_MV_DATA; /**< Horizonal motion vector data. */ + NvS16 sV_MV_DATA; /**< Vertical motion vector data. */ + } GFMXDECVC1VECTOR, *PGFMXDECVC1VECTOR; + + /**coefficient information for macroblock*/ + + typedef struct _GFMXDECVC1COEF + { + NvU8 uiLAST; /**< This last non-zero coefficient in current block */ + NvU8 uiRUN; /**< How many zeroes precede this coefficient */ + NvS16 iLEVEL; /**< This coefficient's level value */ + } GFMXDECVC1COEF, *PGFMXDECVC1COEF; + + /**macroblock information*/ + + typedef struct _GFMXDECVC1MB + { + NvU16 uiX; /**< MB's x position in the picture*/ + NvU16 uiY; /**< MB's y position in the picture*/ + NvU32 uiMBInfo; /**< MacroBlock characteristics*/ + NvU32 uiBlkType[6]; /**< Block characteristics*/ + NvU8 uiBlkCoded[6]; /**< Block characteristics*/ + NvU8 uiBlkNZC[6]; /**< Block characteristics*/ + NvU8 ucFirstCodedBlk; /**< First Coded Block in Macroblock*/ + NvU16 uiQuantiser; /**< current MB's quantiser*/ + GFMXDECVC1VECTOR Vector[4]; /**< motion vector zero ~ three*/ + NvU32 uiNumofCoef; /**< number of GFMXDECVC1COEF //structures for current MB*/ + + } GFMXDECVC1MB, *PGFMXDECVC1MB; + + //MBInfo: +#define MXDEC_VC1_MB_TYPE_INTER 0x1 //inter mb + + /*Quantiser Type of MacroBlock */ +#define MXDEC_VC1_MB_NON_UNIFORM_QUANTISER 0x2 //Non Uniform Quantiser + + +#define MXDEC_VC1_MB_AC_PRED_ON 0x80 //AC prediction is on +#define MXDEC_VC1_MB_FIELDTX 0x100 +#define MXDEC_VC1_MB_MV_1_MVS 0x200 //1 motion vector coded +#define MXDEC_VC1_MB_MV_4_MVS 0x400 //4 motion vector coded +#define MXDEC_VC1_MB_SKIPPED 0x800 //Macro Block not coded + + /* Motion vector direction bits [15:14] */ +#define MXDEC_VC1_MB_DIRECT 0x1000 +#define MXDEC_VC1_MB_FORWARD 0x2000 +#define MXDEC_VC1_MB_BACKWARD 0x4000 + +#define MXDEC_VC1_MB_AUTO_DISPLAY 0x8000 +#define MXDEC_VC1_MB_OVERLAP 0x10000 + + +#define MXDEC_VC1_MB_MV_MODE1MV_HALF_PEL_BILINEAR 0x20000 +#define MXDEC_VC1_MB_MV_MODE1MV_HALF_PEL 0x40000 +#define MXDEC_VC1_MB_MV_MODE_MIXED_MV 0x100000 +#define MXDEC_VC1_MB_MV_MODE_INTENSITY_COMP 0x200000 + +#define MXDEC_VC1_MB_MV_RANGE_64_32 0x400000 +#define MXDEC_VC1_MB_MV_RANGE_128_64 0x800000 +#define MXDEC_VC1_MB_MV_RANGE_512_128 0x1000000 +#define MXDEC_VC1_MB_MV_RANGE_1024_256 0x2000000 + + + //uiBlkInfo +#define MXDEC_VC1_BLK_CODED 0x1 + + +#define MXDEC_VC1_BLK_INTER 0x2 +#define MXDEC_VC1_BLK_INTER8X8 0x4 +#define MXDEC_VC1_BLK_INTER8X4 0x8 +#define MXDEC_VC1_BLK_INTER4X8 0x10 +#define MXDEC_VC1_BLK_INTER4X4 0x20 +#define MXDEC_VC1_BLK_INTER_ANY 0x40 + +#define MXDEC_VC1_BLK_INTRA 0x80 +#define MXDEC_VC1_BLK_INTRA_TOP 0x100 +#define MXDEC_VC1_BLK_INTRA_LEFT 0x200 + + +#define MXDEC_VC1_SUBBLK_0 0x1 +#define MXDEC_VC1_SUBBLK_1 0x2 +#define MXDEC_VC1_SUBBLK_2 0x4 +#define MXDEC_VC1_SUBBLK_3 0x8 + + + + //After GFMX decodes this Macro Block, it will auto trigger video engine to display + //this VOP if decoder application set auto blt on through GFVxBlt. + //If MXDEC_MB_AUTO_PP and MXDEC_MA_AUTO_DISPLAY both on, //GFMX will trigger Post Processing first, then trigger display engine. + + + // definition for attribute + + /** GFMxDecVC1 Attribute: Application will determine the decoding boundary, this boundary + means sequence and picture layer boundary. + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 1: APP will determine the decoding boudary
+    0: APP will not determine the decoding boundary
+
      + + @see GFMxDecVC1GetAttribute(), GFMxDecVC1SetAttribute() + */ +#define GF_MXDEC_VC1_ATTR_PRE_DETERMINED_BOUNDARY 0x00000001 + + /** GFMxDecVC1 Attribute: This attribute only can be used for GFMxDecGetAttribute + If application wants to set pDestRect in GFMXDECPICTURE or GFMXDECVC1DECPICTURE, + application must use this attributes to get allignment information and + align the rectangle top & left corner accordinately. + *pInfo: top fieled alignment in term of lines + */ +#define GF_MXDEC_VC1_ATTR_DEC_PICTURE_RECT_TOP_ALIGNMENT 0x00000010 + + /** GFMxDecVC1 Attribute: This attribute only can be used for GFMxDecVC1GetAttribute + If application wants to set pDestRect in GFMXDECVC1PICTURE or GFMXDECVC1DECPICTURE, + application must use those attributes to get allignment information and + align the rectangle top & left corner accordinately. + *pInfo: left fieled alignment in term of pixels + */ +#define GF_MXDEC_VC1_ATTR_DEC_PICTURE_RECT_LEFT_ALIGNMENT 0x00000011 + + /** GFMxDecVC1 Attribute: Save decoder internal state information. This attribute only can be used for GFMxDecVC1GetAttribute + *pInfo: state handle + */ +#define GF_MXDEC_VC1_ATTR_DEC_SAVE_STATE 0x00000012 + + /** GFMxDecVC1 Attribute: Restore decoder internal state information. This attribute only can be used for GFMxDecVC1SetAttribute + *pInfo: state handle + */ +#define GF_MXDEC_VC1_ATTR_DEC_RESTORE_STATE 0x00000013 + + /** GFMxDecVC1 Attribute: Delete particular state handle. This attribute only can be used for GFMxDecVC1SetAttribute + *pInfo: state handle + */ +#define GF_MXDEC_VC1_ATTR_DEC_DELETE_STATE 0x00000014 + +#define GF_MXDEC_VC1_ATTR_DEC_ENABLE_RAISE_WAIT 0x00000015 + //Use this attribute to enable RaiseWait mechanish. This is required for OpenMax application. + //Decoder works in FRAME_DONE polling mode by default.This attribute only can be used for GFMxDecVC1SetAttribute + //*pInfo: state handle. + + typedef struct _GFMXDECVC1PP + { + PGFRMSURFACE* pDestSurf;/**< pointer to an array of surfaces that will + hold the result from Post Processing + pointer to an array of surfaces to + accommodate auto post processing + */ + PGFRMSURFACE* pSrcSurf; /**< pointer to an array of surfaces to be //post processed + pointer to an array of surfaces to + accommodate auto post processing + */ + PGFRECT pRect; /**< Rectangle area to be processed for both + src and dest surface + */ + NvU32 numofDestSurf; /**< If MXDEC_PP_AUTO flag is set, this + parameter must be filled + */ + NvU32 numofSrcSurf; /**< If MXDEC_PP_AUTO flag is set, this + parameter must be filled + */ + NvU8 * lpQuantiser; /**< point to array of QPs for Macro Blocks in + the source VOP. GFMX automatically saved + the last two decoded VOP's QP tables, + Decoder application may not need to reload + the table if it can make sure the source + VOP is the one within the last decoded + VOPs. If MXDEC_PP_RELOAD_QUANTIZER is set, + this field must be filled. + */ + NvU32 PPOption; /** + + +
      Performing color space conversion and then a stretch blit to the primary surface directly.Blitting to the overlay surface.
      GF_MXDEC_VC1_READ_BITSTREAM_FORWARD Forward scan
      GF_MXDEC_VC1_READ_BITSTREAM_BACKWARDBackward scan
      + + @return If the #MXDEC_ATTR_PRE_DETERMINED_BOUNDARY attribute is set, the callback + should return #GF_MXDEC_VC1_BOUNDARY_REACHED when a frame boundary is + detected, or 0 if no boundary is detected. + If the #MXDEC_ATTR_PRE_DETERMINED_BOUNDARY attribute is not set, the callback + should return 0. + */ + + /**pPara is a parameter passed from APP, + and APP wants API to call back with this parameter */ + + NvU32 (*pCallBack)(void * pPara, NvU8 ** ppBuffer, NvS32 * BufferLength, NvU32 uFlag); + /** If APP set GF_MXDEC_ATTR_PRE_DETERMINED_BOUNDARY, + APP should return GF_MXDEC_VC1_BOUNDARY_REACHED when the boundary is + detected. + If APP does not set GF_MXDEC_ATTR_PRE_DETERMINED_BOUNDARY, + 0 should be returned. */ + + }GFMXDECVC1CALLBACK, *PGFMXDECVC1CALLBACK; + + /** GFMXDECVC1CALLBACK::pCallBack return code */ +#define GF_MXDEC_VC1_BOUNDARY_REACHED 0x00000001 + /** GFMXDECVC1CALLBACK::pCallBack uFlag value: Stream forward scan. */ +#define GF_MXDEC_VC1_READ_BITSTREAM_FORWARD 0x00000002 + /** GFMXDECVC1CALLBACK::pCallBack uFlag value: Stream backward scan. */ +#define GF_MXDEC_VC1_READ_BITSTREAM_BACKWARD 0x00000003 + + + + typedef enum + { + GFMX_DEC_VC1_INTERRUPT_ENABLE, + GFMX_DEC_VC1_INTERRUPT_DISABLE, + GFMX_DEC_VC1_INTERRUPT_CLEAR + } GFMX_DEC_VC1_INTERRUPT_OPERATION_TYPE; // Interrupt operation. + + typedef enum + { + GFMX_DEC_VC1_DECODE_DONE_INTR, + GFMX_DEC_VC1_POST_PROCESSING_DONE_INTR, + GFMX_DEC_VC1_DSP_COMMAND_INTR, + } GFMX_DEC_VC1_INTERRUPT_TYPE; + + typedef struct _GFMXDECVC1TABLE + { + GF_RETTYPE (* MxDecVC1GetProperty)(GFMxDecVC1Handle hMxDecVC1, PGFPROPERTY pMXProp ); + GF_RETTYPE (* MxDecVC1GetStatus)(GFMxDecVC1Handle hMxDecVC1, NvU32 * pStatus); + GF_RETTYPE (* MxDecVC1DecSequenceLayer)(GFMxDecVC1Handle hMxDecVC1, PGFMXDECVC1DECSEQUENCELAYER pSequenceLayer); + GF_RETTYPE (* MxDecVC1DecPicture)(GFMxDecVC1Handle hMxDecVC1, PGFMXDECVC1DECPICTURE pPicture); + GF_RETTYPE (* MxDecVC1SetPicture)(GFMxDecVC1Handle hMxDecVC1, PGFMXDECVC1PICTURE pPicture); + GF_RETTYPE (* MxDecVC1SetMBs)(GFMxDecVC1Handle hMxDecVC1, PGFMXDECVC1MB pMBs); + GF_RETTYPE (* MxDecVC1SetAttribute)(GFMxDecVC1Handle hMxDecVC1, NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* MxDecVC1GetAttribute)(GFMxDecVC1Handle hMxDecVC1, NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* MxDecVC1Set)(GFMxDecVC1Handle hMxDecVC1, NvU32 uiFeature, void * pInfo); + GF_RETTYPE (* MxDecVC1InterruptControl)(GFMxDecVC1Handle hMxDecVC1, + GFMX_DEC_VC1_INTERRUPT_TYPE IntType, GFMX_DEC_VC1_INTERRUPT_OPERATION_TYPE op, + void * pData); + GF_RETTYPE (* MxDecVC1InterruptHandler)(GFMxDecVC1Handle hMxDecVC1, + GFMX_DEC_VC1_INTERRUPT_TYPE IntType, void * pData); // Reserved. + GF_RETTYPE (* MxDecVC1DecResync)(GFMxDecVC1Handle hMxDecVC1, NvU32 ResyncOption); + } GFMXDECVC1TABLE, *PGFMXDECVC1TABLE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFMxDecVC1Open(GFRmHandle hRm, GFMxDecVC1Handle *phMxDecVC1, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMxDecVC1Close(GFMxDecVC1Handle *phMxDecVC1); + +#if NVCPU_IS_XTENSA +#define MXDVC1OFFSET sizeof(GFMXDECVC1TABLE) +#else +#define MXDVC1OFFSET 0 +#endif + + /** #### MxDecVC1 Helper macros. Maybe useful for backward compatible API. #### + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxDecVC1API functions. + + @see GFPROPERTY + */ + +#define GFMxDecVC1GetProperty(hMxDecVC1, pMXProp) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1GetProperty(hMxDecVC1, pMXProp) + +#define GFMxDecVC1GetStatus(hMxDecVC1, pStatus) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1GetStatus(hMxDecVC1, pStatus) + + /** Decode sequence header. + + @param hMxDecVC1 (GFMxDecVC1Handle) Handle to MxDecVC1 component + @param pSequence (PGFMXDECVC1DECSEQUENCELAYER) Pointer to #GFMXDECVC1DECSEQUENCELAYER parameter structure + + @retval GF_SUCCESS Sequence header was decoded successfully + + This function will be called whenever a sequence header is found in the bitstream, decode + it and return its characteristics. + + @see GFMXDECVC1DECSEQUENCELAYER + */ +#define GFMxDecVC1DecSequenceLayer(hMxDecVC1, pSequenceLayer)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1DecSequenceLayer(hMxDecVC1, pSequenceLayer) + + + //return value + /** GFMxDecVC1 error code: GFMxDecVC1DecSequenceLayer() encountered end of bitstream. + @see GFMxDecVC1DecSequenceLayer() + */ +#define GFMXDECVC1_SEQUENCELAYER_ERROR_END_OF_FILE (GFMXDVC1_ERROR | 0x00000001) + + /** GFMxDecVC1 error code: GFMxDecVC1DecSequenceLayer() bitstream format not supported. + The sequence header specifies a bitstream format, that is not supported. Most likely + reason for this error is that the VC1 profile is not supported. + @see GFMxDecVC1DecSequenceLayer() + */ +#define GFMXDECVC1_SEQUENCELAYER_ERROR_NOT_SUPPORT_FORMAT (GFMXDVC1_ERROR | 0x00000002) + + /** GFMxDecVC1 error code: GFMxDecVC1DecSequenceLayer() bitstream format is damaged due to + erroroneous stream. + @see GFMxDecVC1DecSequenceLayer() + */ +#define GFMXDECVC1_SEQUENCELAYER_ERROR_HEADER_DAMAGED (GFMXDVC1_ERROR | 0x00000003) + + /** GFMxDecVC1 error code: GFMxDecVC1DecSequenceLayer() encountered out of GPU memory error. + The application can try to free GPU memory and call GFMxDecVC1DecSequenceLayer() again. + @see GFMxDecVC1DecSequenceLayer() + */ +#define GFMXDECVC1_SEQUENCELAYER_ERROR_NOT_ENOUGH_SYSTEM_MEM (GFMXDVC1_ERROR | 0x00000004) + + + /** Decode a picture. + + @param GFMxDecVC1 (GFMxDecVC1Handle) Handle to MxDecVC1 component + @param pPicture (PGFMXDECVC1DECPICTURE) Pointer to #GFMXDECVC1DECPICTURE parameter structure + + @retval GF_SUCCESS Frame was decoded successfully + @retval GFMXDECVC1_PICTURE_ERROR_END_OF_FILE End of stream encountered + @retval GFMXDECVC1_PICTURE_ERROR_CORRUPTED_PICTURE Unrecoverable bitstream error during frame decode + @retval GFMXDECVC1_PICTURE_ERROR_NOT_ENOUGH_SYSTEM_MEM Out of GPU memory + @retval GFMXDECVC1_ERROR_RESYNC_END_OF_FILE Resync was found at end of bitstream. + @retval GFMXDECVC1_ERROR_P_PICTURE_FOUND_AT_START instead of Inter frame, intra was found in beginning. + @retval GFMXDECVC1_ERROR_DSP_TIMEOUT AVP times out + + GFMxDecVC1DecPicture decodes one picture from the bit stream. If GFMxDecVC1DecPicture detects an + error, GFMxDecVC1DecPicture returns the error back to the application. + If the current stream position is not on the start of a frame, the function scans forward until a frame + start or sequence header is detected. + + @see GFMXDECVC1DECPICTURE + */ +#define GFMxDecVC1DecPicture(hMxDecVC1, pPicture)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1DecPicture(hMxDecVC1, pPicture) + + //return value + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() encountered end of bitstream. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_PICTURE_ERROR_END_OF_FILE (GFMXDVC1_ERROR | 0x00000005) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() encountered an unrecoverable bitstream error. + The application should call GFMxDecVC1DecResync() again, MxDecVC1 will then + scan for the next frame boundary and try to decode this frame. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_PICTURE_ERROR_CORRUPTED_PICTURE (GFMXDVC1_ERROR | 0x00000006) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() encountered out of GPU memory error. + System memory is not enough to decode Picture. The application can try to free GPU memory and call + GFMxDecVC1DecPicture() again. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_PICTURE_ERROR_NOT_ENOUGH_SYSTEM_MEM (GFMXDVC1_ERROR | 0x00000007) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() upon calling GFMxDecVC1DecResync() + encountered end of bitstream. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_ERROR_RESYNC_END_OF_FILE (GFMXDVC1_ERROR | 0x00000008) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() got a + "P" frame without it's prior reference frame + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_ERROR_P_PICTURE_FOUND_AT_START (GFMXDVC1_ERROR | 0x00000009) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() DSP times out while decoding. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_ERROR_DSP_TIMEOUT (GFMXDVC1_ERROR | 0x0000000a) // dsp hang workaround :( + +#define GFMxDecVC1SetPicture(hMxDecVC1, pPicture)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1SetPicture(hMxDecVC1, pPicture) + +#define GFMxDecVC1SetMBs(hMxDecVC1, pMBs) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1SetMBs(hMxDecVC1, pMBs); + +#define GFMxDecVC1SetAttribute(hMxDecVC1, uiFeature, pInfo) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1SetAttribute(hMxDecVC1, uiFeature, pInfo) + +#define GFMxDecVC1GetAttribute(hMxDecVC1, uiFeature, pInfo) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1GetAttribute(hMxDecVC1, uiFeature, pInfo) + +#define GFMxDecVC1Set(hMxDecVC1, uiFeature, pInfo) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1Set(hMxDecVC1, uiFeature, pInfo) + +#define GFMxDecVC1DecResync(hMxDecVC1, ResyncOption) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1DecResync(hMxDecVC1, ResyncOption) + +#define GFMxDecVC1InterruptControl(hMxDecVC1, IntType, op, pData)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1InterruptControl(hMxDecVC1, IntType, op, pData) + +#define GFMxDecVC1InterruptHandler(hMxDecVC1, IntType, pData)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1InterruptHandler(hMxDecVC1, IntType, pData) + + + //resynch value +#define MXDEC_VC1_RESYNC_FORWARD_NEXT_PICTURE 0x00000001 + // resync to next picture +#define MXDEC_VC1_RESYNC_FORWARD_NEXT_I_PICTURE 0x00000002 + // resync to next I Picture +#define MXDEC_VC1_RESYNC_BACKWARD_PREVIOUS_PICTURE 0x00000004 + // resync to next picture +#define MXDEC_VC1_RESYNC_BACKWARD_PREVIOUS_I_PICTURE 0x00000008 + // resync to next I Picture + + //return value +#define VC1DECRESYNC_END_OF_FILE 0x00000002 // end of file whie resync + + /*@}*/ + + /** @page pageMxDecVC1AppNotes MxDecVC1API Application Notes + + @section pageMxDecVC1AppNotes1 Programming Sequence + + Todo + */ + + +#ifdef __cplusplus +} // only need to export C interface if +// used by C++ source code +#endif + +#endif + + diff --git a/Start_WM/test6/inc/GFMxDemTS.h b/Start_WM/test6/inc/GFMxDemTS.h new file mode 100755 index 00000000..3dbca68e --- /dev/null +++ b/Start_WM/test6/inc/GFMxDemTS.h @@ -0,0 +1,725 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFMxDemTS.h + GFSDK MPEG2 Transport Stream API (host) header file. +*/ + +#ifndef _GF_MPEG_TS__ +#define _GF_MPEG_TS__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup groupMxDemTS MxDemTSAPI MPEG2 Transport Stream Demux API + + This GFSDK component allows to create MPEG TS demux parsers either running + on the host or DSP side. TS data can be pushed from the application, + or be streamed from VIP. + + The are multiple types of parser objects, see also GFMXDEMTSPARSERTYPE: + 
      +    GFMXDEMTSPARSERTYPE_HOST      - demux running on host
+    GFMXDEMTSPARSERTYPE_DSP       - demux running on DSP  
+    GFMXDEMTSPARSERTYPE_DSPAVSYNC - demux running on DSP with additional AVSync functionality
+
      + + Programming Sequence for Parsers running on Host, TS data from host + + - Call GFMxDemTSParserCreate(), in parameter structure GFMXDEMTSPARSERREQUEST pass + parameters #GFMXDEMTSPARSERTYPE_HOST and #GFMXDEMTSPARSERDATASOURCE_PUSH, + pass callback functions to handle demuxed substreams + - Poll GFMxDemTSParserPushData() to pass the incoming TS stream + - Call GFMxDemTSParserDestroy() to destroy parser object + + Programming Sequence for Parsers running on DSP, TS data from host + + - Call GFMxDemTSParserCreate(), in parameter structure GFMXDEMTSPARSERREQUEST pass + parameters #GFMXDEMTSPARSERTYPE_DSP and #GFMXDEMTSPARSERDATASOURCE_PUSH, + pass callback functions to handle demuxed substreams + - Poll GFMxDemTSParserPushData() to pass the incoming TS stream + - Call GFMxDemTSParserDestroy() to destroy parser object + - Destroy the DSP message handling thread + + Programming Sequence for Parser running on DSP, TS data from VIP + + Only one parser at a time can be created to capture data from VIP. + For this mode the parser must run on DSP. +*/ +/*@{*/ + +/** GFMxDemTSParser Maximum number of supported Services. + For ISDB-T 1seg, the max is 8 according to ARIB TR-B14, p7-28 +*/ +#define GFMXDEMTS_MAX_SERVICE_NO 8 + +/** GFMxDemTSParser Maximum number of supported Audio PES. + For ISDB-T 1seg, the max is 2. +*/ +#define GFMXDEMTS_MAX_AUDIO_PID_NO 2 + +/** Get TS Audio PID. + For detail see #GFMXDEMTSPARSERAUDIOPIDLIST. + @param audio (NvU32) Combined type and ID value + */ +#define GFMXDEMTS_GET_AUDIO_PID(audio) (audio & 0x1FFFU) // Get the lower 13 bits + +/** Get TS Service Type. + For detail see #GFMXDEMTSPARSERAUDIOPIDLIST. + @param service (NvU32) Combined type and ID value +*/ +#define GFMXDEMTS_GET_AUDIO_TYPE(audio) (audio >> 16) + +/** TS Audio Pid List. */ +typedef struct _GFMXDEMTSPARSERAUDIOPIDLIST +{ + NvU32 uAudioPidList[GFMXDEMTS_MAX_AUDIO_PID_NO]; //!< low 16 bits Audio PID, high 16 bits Audio Type + NvU32 uNoOfAudioPids; //!< Number valid entries in uAudioPidList[] + +} GFMXDEMTSPARSERAUDIOPIDLIST; + +/** Get TS Service ID. + For detail see #GFMXDEMTSPARSERPMTPIDLIST. + @param service (NvU32) Combined type and ID value +*/ +#define GFMXDEMTS_GET_PMT_PID(service) ((((NvU32)(service) & 0xffff00) >> 8) | 0x1FC8) + +/** Get TS Service Type. + For detail see #GFMXDEMTSPARSERPMTPIDLIST. + @param service (NvU32) Combined type and ID value +*/ +#define GFMXDEMTS_GET_PMT_PID_TYPE(service) ((NvU32)(service) & 0x0000ff) + +/** TS Service List. + */ +typedef struct _GFMXDEMTSPARSERPMTPIDLIST +{ + /** Array of services: + Array entries format: + 
      +        32      24 23                           8 7               0
+        +---------+------------------------------+----------------+
+        | Invalid |             Service ID       |Service Type    |
+        +---------+------------------------------+----------------+
+
      + */ + NvU32 uPmtPidList[GFMXDEMTS_MAX_SERVICE_NO]; + + /** Number of valid entries in GFMXDEMTSPARSERPMTPIDLIST::uPmtPidList[]. */ + NvU32 uNoOfServices; + +} GFMXDEMTSPARSERPMTPIDLIST; + + +/** TS parser types, parameter values for GFMXDEMTSPARSEREQUEST. */ +typedef enum +{ + /** Parser running on host system. + + Parser objects of this type run the TS demux on the host system. + In contrast to GFMXDEMTSPARSERTYPE_DSP no hardware resources are involved, + and any number of parser objects of this type can be created. + + TS data source is always of type GFMXDEMTSPARSERDATASOURCE_PUSH, i.e. + it is provided by the application via GFMxDemTSParserProcessData(). + */ + GFMXDEMTSPARSERTYPE_HOST = 0, + + /** Parser running on DSP. + + Parser objects of this type will instanciate a task on the DSP + to perform the demux processing. Demuxed data is returned to the host. + Demuxed audio data can optionally be processed entirely on DSP side + via GFMXDEMTSPARSERREQUEST::pAudioBufDesc. + + This parser type is intended for verifying demux functionality. + + TS data can be provided either from the host (GFMXDEMTSPARSERDATASOURCE_PUSH), + or acquired automatically from VIP (GFMXDEMTSPARSERDATASOURCE_VIP2DSP). + */ + GFMXDEMTSPARSERTYPE_DSP, + + /** Parser running on DSP with attached AVSync object. + + Parser objects of this type will instanciate 2 tasks on the DSP, + one to perform the demux processing, and one to decode AV-synced H264 video. + Audio is processed on DSP side via GFMXDEMTSPARSERREQUEST::pAudioBufDesc. + + TS data can be provided either from the host (GFMXDEMTSPARSERDATASOURCE_PUSH), + or acquired automatically from VIP (GFMXDEMTSPARSERDATASOURCE_VIP2DSP). + */ + GFMXDEMTSPARSERTYPE_DSPAVSYNC + +} GFMXDEMTSPARSERTYPE; + +/** TS data sources, parameter values for GFMXDEMTSPARSEREQUEST. */ +typedef enum +{ + /** TS data is pushed by the application. + + TS data is fed from the application via function calls to + GFMxDemTSParserProcessData(). + */ + GFMXDEMTSPARSERDATASOURCE_PUSH = 0, + + /** TS data is intercepted by the DSP task directly from VIP. + + The TS parser task running on the DSP will open the VIP in Type-A + interface mode to receive TS data via an interrupt handler. + + This setting can be used only for parsers running on the DSP + (#GFMXDEMTSPARSERTYPE is GFMXDEMTSPARSERTYPE_DSP). + */ + GFMXDEMTSPARSERDATASOURCE_VIP2DSP + +} GFMXDEMTSPARSERDATASOURCE; + +/** TS Parser object states. */ +typedef enum +{ + GFMXDEMTSDSPPARSERSTATE_INSTANTIATED=0, //!< Parser object instanciated, but not initialized + GFMXDEMTSDSPPARSERSTATE_READY, //!< Parser object initialized, ready to parse + GFMXDEMTSDSPPARSERSTATE_ERROR, //!< Parser object dead due to unrecoverable error (out of mem, etc) + GFMXDEMTSDSPPARSERSTATE_SHUTDOWN, //!< Parser object initialized, ready to parse, but shutdown initiated + GFMXDEMTSDSPPARSERSTATE_PAUSE //!< Parser object paused + +} GFMXDEMTSPARSERSTATE; + +/** TS Parser demux status bits. */ +typedef enum +{ + GFMXDEMTSPARSERSTATUS_PMT_READY = 0x01, + GFMXDEMTSPARSERSTATUS_NIT_READY = 0x02, + GFMXDEMTSPARSERSTATUS_VIDEO_FOUND = 0x04, + GFMXDEMTSPARSERSTATUS_AUDIO_FOUND = 0x08, + // if the number of status goes beyond 8, please change m_uStatus to 16 bits or 32 bits in #CNvTransportParser + +} GFMXDEMTSPARSERSTATUS; + +/** Parameter structure for GFMxDemTSParserGetStatus(). */ +typedef struct +{ + GFMXDEMTSPARSERSTATE state; //!< Parser object state + NvU32 status; //!< Parser status bitmask, see #GFMXDEMTSPARSERSTATUS + NvU32 frameDropCount; //!< Counts dropped frames in AVSync + +} GFMxDemTSParserStatus; + +/** TS parser notify reasoncodes for GFMXDEMTSPARSERREQUEST::OnNotify callback. */ +typedef enum +{ + /** Incoming TS starved. */ + GFMXDEMTSPARSERNOTIFY_TSSTARVED = 0, + + /** Overflow of TS data coming from VIP. */ + GFMXDEMTSPARSERNOTIFY_TSOVERFLOW, + + /** Underflow in audio buffer at demux output side. */ + GFMXDEMTSPARSERNOTIFY_AUDIOUNDERFLOW, + + /** Overflow in audio buffer at demux output side. */ + GFMXDEMTSPARSERNOTIFY_AUDIOOVERFLOW, + + /** Underflow in video buffer at demux output side. */ + GFMXDEMTSPARSERNOTIFY_VIDEOUNDERFLOW, + + /** Overflow in video buffer at demux output side. */ + GFMXDEMTSPARSERNOTIFY_VIDEOOVERFLOW, + + /** Parser detected PMT change. + Associated data: + 
      +        NvU32 new PMT PID
+
      = 2*max ADTS frame size. + */ + NvU32 AudioBufferSize; + + /** Size of video demux buffer to claim in GPU memory. + This field is used only for parsers of type GFMXDEMTSPARSERTYPE_DSP and GFMXDEMTSPARSERTYPE_DSPAVSYNC. + Size must be power of 2 and <=2^24 bytes. + Optimum size depends on H264 bitrate, and should big enough to hold multiple NAL units. + */ + NvU32 VideoBufferSize; + + /** DSP-side handle (address to GFMXDECH264TABLE) of initialized GFMxDecH264 instance. + This address is in DSP address space. + + This field is used only for parsers of type GFMXDEMTSPARSERTYPE_DSPAVSYNC. + + @internal + */ + NvU32 MxDecH264DSPHandle; + + /** Video section callback. + Ignored for parser type GFMXDEMTSPARSERTYPE_DSPAVSYNC. + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param pllPTS Pointer to PTS, or NULL if not existent + @param pllDTS Pointer to DTS, or NULL if not existent + */ + GF_RETTYPE (*OnVideoData)(void* user, NvU8* pBytes, NvU32 cbBytes, NvU32 StreamID, NvS64* pllPTS, NvS64* pllDTS, int bPesStart); + + /** Audio section callback, or NULL to use shared DSP buffer. + + Can be NULL for parser type GFMXDEMTSPARSERTYPE_DSP. + Ignored for parser type GFMXDEMTSPARSERTYPE_DSPAVSYNC. + + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param pllPTS Pointer to PTS, or NULL if not existent + @param pllDTS Pointer to DTS, or NULL if not existent + */ + GF_RETTYPE (*OnAudioData)(void* user, NvU8* pBytes, NvU32 cbBytes, NvU32 StreamID, NvS64* pllPTS, NvS64* pllDTS, int bPesStart); + + /** PCR (Program Clock Reference) callback. + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param llPCRBase Clock + @param llPCRExt Clock + @param uDiscontinuity discontinuity flag + */ + void (*OnPCR)(void* user, NvS64 llPCRBase, NvU32 llPCRExt, NvU32 uDiscontinuity); + + /** Parser object error and status notify callback. + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param notifycode Notify reasoncode, see GFMXDEMTSPARSERNOTIFY + @param data Data specific to a notifycode + */ + void (*OnNotify)(void* user, NvU32 notifycode, void* data); + + /** Frame Decoded Callback + Will be called in sync with PTS of the frame. The passed surface will be locked, and the + application must unlock it later via GFMxDecH264Set() with feature ID GF_MXDEC_H264_SET_UNLOCK_SURFACE. + @param user Application defined parameter, forwarded from INvTransportParserCallback::user + @param surfaceID surface id + @param resolution high 16 bit for xres, low 16 bit for yres + @param pPTS Pointer to PTS of this frame + @param flags Flag bitmask, bit 0 set validity of PAN Scan Info + @param PanTopLeft Top-Left Offset for PAN Scan Rect, low 16 bit signed X, top 16 bit signed Y + @param PanBottomRight Bottom-Right Offset for PAN Scan Rect , low 16 bit signed X, top 16 bit signed Y + @param FrameType I/P Frame Type + */ + void (*OnFrameDecoded)(void* user, NvU32 sufaceID, NvU32 resolution, NvS64* pPTS, NvU32 flags, NvU32 PanTopLeft, NvU32 PanBottomRight, NvU32 FrameType); + + /** TS data callback + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param data TS data + @param size TS data size + */ + void (*OnTS)(void* user, NvU8* data, NvU32 size); + + /** Application private data, will be forwarded to callbacks */ + void* user; + + /** Returns address of circular buffer descriptor shared with audio decoder. + This address is in DSP address space. + This member is valid only, if GFMXDEMTSPARSERREQUEST::OnAudioData is NULL, + and if the parser is of type GFMXDEMTSPARSERTYPE_DSP. + */ + GF_RM_DSP_CIRCBUFFER* pAudioBufDesc; + +} GFMXDEMTSPARSERREQUEST; + +/** H264 Frame Type, the value is equal to Nal Type*/ +typedef enum +{ + MXDEMTS_H264_FRAME_IDR = 5, + MXDEMTS_H264_FRAME_P = 1, + MXDEMTS_H264_FRAME_INVALID = 0, +} MXDEMTS_H264_FRAME_TYPE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFMxDemTSOpen(GFRmHandle hRm, GFMxDemTSHandle *phMxDemTS, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMxDemTSClose(GFMxDemTSHandle *phMxDemTS); + +/** Create a TS parser. + + This function creates a TS parser running on the host. + + @param TsHandle Handle to TS component + @param pParserReq Parameter structure + @param pParserHandle Returns handle on success, unchanged on failure + + @retval GF_SUCCESS Success + @retval GF_ERROR_OUT_MEMORY Out of memory + @retval GFMXDEMTS_ERROR_CREATEDSPPARSER Failed to create parse object on DSP side + @retval GFMXDEMTS_ERROR_NODSPSUPPORT No DSP support in GFSDK +*/ +GF_RETTYPE GFMxDemTSParserCreate(GFMxDemTSHandle TsHandle, GFMXDEMTSPARSERREQUEST* pParserReq, GFMxDemTSParserHandle* pParserHandle); + +/** Destroy TS parser. + + Destroy an TS parser object previously created with GFMxDemTSParserCreate(). + Save to call on NULL handle. + + @param TsHandle Handle to TS component + @param pParserHandle Pointer to parser handle, will be reset to NULL on exit +*/ +void GFMxDemTSParserDestroy(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle* pParserHandle); + +/** Process a section of the TS stream. + + The input Transport Stream is parsed and the section type handlers passed + with GFMXDEMTSPARSERREQUEST are called as their sections are encountered in + the stream. + + A call of this function is usually triggered by an interrupt to feed the next + portion of an incoming Transport Stream. + + On each call of this function at least 188 byte (TS packet size) must be passed. + The Transport Stream is parsed in entities of 188 byte packets. If the passed buffer + contains an incomplete packet at the end, it will be copied to an internal buffer + and automatically combined with the second part on the next function call. + + Thus it is not required to pass in buffers aligned to TS packet starts, and the + buffer must not be a multiple of 188 bytes (TS packet size). However + doing so will guarant maximum demux performance since copying around incomplete packets + can be avoided. + + This function may only be called for parses created with #GFMXDEMTSPARSERDATASOURCE_PUSH. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pData Pointer to buffer containing TS, the buffer must contain + at least 188 bytes of stream data. Buffer start does not + need to be aligned with the start of an TS package. + @param pSize Pointer to buffer size, must be 188 or larger, will be updated + on exit with the number of bytes in the buffer, which where consumed. + If the parser was created on the DSP, this size must + not exceed the buffersize passed in GFMXDEMTSPARSERREQUEST::TSBufferSize. + On success GFMxDemTSParserPushData() will always consume all data, + on failure *pSize returns the number of bytes that were successfully + consumed before the failure occured. + @param timeout Time in ms to wait until DSP parser object gets ready to accept new data, + or 0 to block forever, (NvU32)-1 to return immediately if busy. + Ignored for DSP objects created with #GFMXDEMTSPARSERTYPE_HOST. + + @retval GF_SUCCESS Success + @retval GF_WAIT_TIME_OUT Timeout before data could be sent to DSP + @retval GF_ERROR_BUSY DSP was busy and data was not sent, call again, + returned only if \a timeout was (NvU32)-1 +*/ +GF_RETTYPE GFMxDemTSParserPushData(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU8* pData, NvU32* pSize, NvU32 timeout); + +/** (Re-)Start VIP TS data capture and demux on DSP. + + This function can be used only for parsers created as #GFMXDEMTSPARSERDATASOURCE_VIP2DSP. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success +*/ +GF_RETTYPE GFMxDemTSParserDSPStart(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Pause VIP TS data capture and demux on DSP. + + This function can be used only for parsers created as #GFMXDEMTSPARSERDATASOURCE_VIP2DSP. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param onOff Indicate Pause on or off + + @retval GF_SUCCESS Success +*/ +GF_RETTYPE GFMxDemTSParserDSPPause(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32 onOff); + +/** Step to the next Frame. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success +*/ +GF_RETTYPE GFMxDemTSParserDSPNextFrame(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Step to the next I Frame. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success +*/ +GF_RETTYPE GFMxDemTSParserDSPNextIFrame(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Get TS PmtPid List + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pPmtPidList Returns PMT PID List in current TS, with Service ID and Service Type combined + + @retval GF_SUCCESS Success + @retval GFMXDEMTS_ERROR_SERVICESLISTUNAVAILABLE NIT/PAT has not been parsed yet. + + @see GFMxDemTSSetPmtPid() +*/ +GF_RETTYPE GFMxDemTSParserGetPmtPidList(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, GFMXDEMTSPARSERPMTPIDLIST *pPmtPidList); + +/** Set TS Service + + PMT PID is set without any check. if the new PMT PID is successfully set, a + #GFMXDEMTSPARSERNOTIFY_TSPMTCHANGED notify will be sent to the caller application. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param uPmtPid uPmtPid to be set + + @retval GF_SUCCESS Success * + @see GFMxDemTSGetPmtPidList() + */ +GF_RETTYPE GFMxDemTSParserSetPmtPid(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32 uPmtPid); + +/** Get Active PmtPid + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pServiceID pointer to Active PmtPid. + + @retval GF_SUCCESS Success * + */ +GF_RETTYPE GFMxDemTSParserGetActivePmtPid(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32* pPmtPid); + +/** Get TS AudioPid List + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pAudioPidList Returns AUDIO PID List in current TS, with PID and Type combined + + @retval GF_SUCCESS Success + @retval GFMXDEMTS_ERROR_AUDIOPIDLISTUNAVAILABLE NIT/PAT has not been parsed yet. + + @see GFMxDemTSSetAudioPid() +*/ +GF_RETTYPE GFMxDemTSParserGetAudioPidList(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, GFMXDEMTSPARSERAUDIOPIDLIST *pAudioPidList); + +/** Set TS Audio Pid + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param uAudioPid uAudioPid to be set + + @retval GF_SUCCESS Success + @retval GFMXDEMTS_ERROR_AUDIOPIDUNAVAILABLE + @see GFMxDemTSGetAudioPidList() + */ +GF_RETTYPE GFMxDemTSParserSetAudioPid(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32 uAudioPid); + +/** Get Active AudioPid + + Audio PID is set if this AUDIO PID exists in current streams. Otherwise return an error + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pAudioPid pointer to Active AudioPid. + + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserGetActiveAudioPid(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32* pAudioPid); + +/** Reset All Table Version + + Reset all Table Versions, including PAT, NIT, and PMT. + For reset only PMT table version, see GFMxDemTSParserResetPmtTableVersion + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserResetAllTableVersions(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Reset PMT Table Version + + To reset all table version, see GFMxDemTSParserResetAllTableVersion + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserResetPmtTableVersion(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Set Play Speed + + Just used for normal play, for trick play, see xxx. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param PlaySpeed Play speed to set in 1.0 * 10^6. + A value of 100000 plays at 100% of the current sample rate. 100100 plays at 1.1%, + 100010 plays at 100.01%, the smallest increment 100001 plays at 100.001%. + Number less than 100000 will slow down the stream in the same way. + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserSetPlaySpeed(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32 PlaySpeed); + +/** Set VIP Capture + + @deprecated Do not use, will be removed from public API + + @param TsHandle Handle to TS component + @param VxHandle the Vx handle for setting VIP + @retval GF_SUCCESS Success * + */ +GF_RETTYPE GFMxDemTSSetVIP(GFMxDemTSHandle TsHandle, GFVxHandle VxHandle); + +/** VIP Capture on Host Side + + @deprecated Do not use, will be removed from public API + + it captures VIP data from host side, instead of DSP side. + For VIP Capture from DSP side, see #GFMXDEMTSPARSERREQUEST (GFMXDEMTSPARSERDATASOURCE_VIP2DSP) + + @param TsHandle Handle to TS component + @param pBuf Buffer to host VIP data + @param pBufSize Maximum buf size for input, and Number bytes captured for output + @retval GF_SUCCESS Success * + */ +GF_RETTYPE GFMxDemTSPollVIP(GFMxDemTSHandle TsHandle, NvU8* pBuf, NvU32 *pBufSize); + +/** Close VIP Capture + + @deprecated Do not use, will be removed from public API + + @param TsHandle Handle to TS component + @param VxHandle the Vx handle for setting VIP + @retval GF_SUCCESS Success * + */ +void GFMxDemTSCloseVIP(GFMxDemTSHandle TsHandle, GFVxHandle VxHandle); + +/** Get demux object state and status. + + Check Parser Status, can be called any time on the parser. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pStatus Returns parser object state and status. + + + + +
      Bits 0-7 Parser status bitmask, see #GFMXDEMTSPARSERSTATUS
      Bits 8-24 reserved for extension
      Bits 23-31Parser state, see #GFMXDEMTSPARSERSTATE
      + @retval GF_SUCCESS Success + @retval GFRM_ERROR_BAD_PARAMETER Invalid parser handle passed + */ +GF_RETTYPE GFMxDemTSParserGetStatus(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, GFMxDemTSParserStatus* pStatus); + +/** Clear Demux Buffers. + + This will clear demux input TS buffers. For parsers of type + GFMXDEMTSPARSERTYPE_DSPAVSYNC it will also clear ES (video and audio) output buffers. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserClearBuffers(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Enable or disable TS data to be returned from DSP to host. + + If disabled the GFMXDEMTSPARSERREQUEST::OnTS callback won't be called anymore. + This function has effect for parsers with datasource GFMXDEMTSPARSERDATASOURCE_VIP2DSP only. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param enable 0 to disable, !=0 to enable + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserDSPEnableOnTS(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, int enable); + +/** GFMxDemTSAPI Error code: Create Parser object on DSP failed. + @see GFMxDemTSParserCreate() +*/ +#define GFMXDEMTS_ERROR_CREATEDSPPARSER (GFMXDEMTS_ERROR + 0) + +/** GFMxDemTSAPI Error code: GFSDK not setup for DSP support. + @see GFMxDemTSParserCreate() +*/ +#define GFMXDEMTS_ERROR_NODSPSUPPORT (GFMXDEMTS_ERROR + 1) + +/** GFMxDemTSAPI Error code: GFMxDemTSGetPmtPidList() called when NIT/PAT not parsed yet. + @see GFMxDemTSGetPmtPidList() +*/ +#define GFMXDEMTS_ERROR_SERVICESLISTUNAVAILABLE (GFMXDEMTS_ERROR + 2) + +/** GFMxDemTSAPI Error code: GFMxDemTSSetPmtPid() when a wrong PMT PID is passed. + @see GFMxDemTSSetPmtPid() +*/ +#define GFMXDEMTS_ERROR_SERVICEUNAVAILABLE (GFMXDEMTS_ERROR + 3) + +/** GFMxDemTSAPI Error code: GFMxDemTSGetAudioPidList() called when PMT does not parsed yet, or + there is no Audio in current service. + @see GFMxDemTSGetAudioPidList() +*/ +#define GFMXDEMTS_ERROR_AUDIOPIDLISTUNAVAILABLE (GFMXDEMTS_ERROR + 4) + +/** GFMxDemTSAPI Error code: GFMxDemTSSetAudioPid() when a wrong Audio PID is passed. + @see GFMxDemTSSetAudioPid() +*/ +#define GFMXDEMTS_ERROR_AUDIOPIDUNAVAILABLE (GFMXDEMTS_ERROR + 5) + +/** GFMxDemTSAPI Error code: Signal frame decoded. + @internal +*/ +#define GFMXDEMTS_ERROR_AVSYNCFRAMEDECODED (GFMXDEMTS_ERROR + 6) + +/** GFMxDemTSAPI Error code: Cannot claim VIP. + @see GFMxDemTSParserCreate() +*/ +#define GFMXDEMTS_ERROR_VIPUNAVAILABLE (GFMXDEMTS_ERROR + 7) + +/** GFMxDemTSAPI Error code: GFMxDemTSParserGetActivePmtPid() called when there is pending PMT PID to be set. + @see GFMxDemTSParserGetActivePmtPid() +*/ +#define GFMXDEMTS_ERROR_GETSERVICEPMTPID (GFMXDEMTS_ERROR + 8) + +/** GFMxDemTSAPI Semaphore IDs. + These IDs can be used in the RmCreateSemaphore implementation of the + OS porting layer to identify GFMxDemTSAPI semaphores. +*/ +typedef enum +{ + GFMXDEMTS_SEMAPHORE_TSBUF = GF_MXDEMTSAPI<<24 + +} GFMXDEMTS_SEMAPHORE; + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif /* _GF_MPEG_TS__ */ diff --git a/Start_WM/test6/inc/GFMxEnc.h b/Start_WM/test6/inc/GFMxEnc.h new file mode 100755 index 00000000..74d4bee7 --- /dev/null +++ b/Start_WM/test6/inc/GFMxEnc.h @@ -0,0 +1,795 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. +* +* NVIDIA Corporation and its licensors retain all intellectual property +* and proprietary rights in and to this software, related documentation +* and any modifications thereto. Any use, reproduction, disclosure or +* distribution of this software and related documentation without an +* express license agreement from NVIDIA Corporation is strictly prohibited. +*/ + +/** @file GFMxEnc.h +GFSDK MPEG Encode API header file. +*/ + +// The following ifdef block is the standard way of creating macros which make exporting +// from a DLL simpler. All files within this DLL are compiled with the GFMXENC_EXPORTS +// symbol defined on the command line. this symbol should not be defined on any project +// that uses this DLL. This way any other project whose source files include this file see +// GFMXENC_API functions as being imported from a DLL, wheras this DLL sees symbols +// defined with this macro as being exported. +#ifndef _GF_MPEG_ENC__ +#define _GF_MPEG_ENC__ + +#include "GFVx.h" +#include "GFDef.h" + +/** @addtogroup groupMxEnc GFMxEncAPI MPEG4 Encode API +
        +
      • @ref pageMxEncAppNotes +
          +
        • @ref pageMxEncAppNotes1 +
        +
      +*/ +/*@{*/ + +/** MxEncAPI property flag: Support Simple Profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_SIMPLE 0x00000001 //Support Simple Profile +/** MxEncAPI property flag: Support Simple Scale Profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_SCALE 0x00000002 //Support Simple Scale Profile +/** MxEncAPI property flag: Support CORE Profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_CORE 0x00000004 //Support CORE Profile +/** MxEncAPI property flag: Support MAIN Profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_MAIN 0x00000008 //Support MAIN Profile +/** MxEncAPI property flag: Support N_bit profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_N_BIT 0x00000010 //Support N_bit Profile +/** MxEncAPI property flag: Support LEVEL 1. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_LEVEL1 0x00000100 //Support LEVEL 1 +/** MxEncAPI property flag: Support LEVEL 2. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_LEVEL2 0x00000200 //Support LEVEL 2 +/** MxEncAPI property flag: Support LEVEL 3. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_LEVEL3 0x00000400 //Support LEVEL 3 +/** MxEncAPI property flag: Support LEVEL 4. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_LEVEL4 0x00000800 //Support LEVEL 4 +/** MxEncAPI property flag: Support Data Partitioning Mode. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_DATA_PARTITIONING 0x00001000 //Support Data Partitioning Mode +/** MxEncAPI property flag: Support RVLC Mode. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_RVLC 0x00002000 //Support RVLC Mode +/** MxEncAPI property flag: Support Rate Control. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_RATE_CONTROL 0x00004000 +//support rate control +/** MxEncAPI property flag: Support Intra MacroBlock Refreshing. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_IMRF 0x000008000 //Support Intra Macroblock Refreshing +/** MxEncAPI property flag: Support Rotation. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_ROTATION 0x000010000 //Support Rotation + +/** GFMxEncSetVOL parameter struct. */ +typedef struct _GFMXENCVOL +{ + NvU32 uiVOLInfo; /**< VOL characteristics */ + /**< + + + + + + + + + + + +
      #GF_MXENC_VOL_SHORT_VIDEO_HEADER
      #GF_MXENC_VOL_BYPASS_VLC
      #GF_MXENC_VOL_RESYNC_MARK_ENABLE
      #GF_MXENC_VOL_DATA_PARTITION_ENABLE
      #GF_MXENC_VOL_REVERSIBLE_VLC_ENABLE
      #GF_MXENC_VOL_RATE_CONTROL_ENABLE
      #GF_MXENC_VOL_STUFFING_ENABLE
      #GF_MXENC_VOL_AUTO_IMRF_ENABLE
      #GF_MXENC_VOL_MC_IMRF_ENABLE
      #GF_MXENC_VOL_THUMBNAIL_ENABLE
      + */ + PGFRMSURFACE pSrcSurf;/**< Surface to encode*/ + PGFRECT pSrcRect; /** + #GF_MXENC_VOP_4MV_ENABLE + #GF_MXENC_VOP_HALF_PEL_ENABLE + #GF_MXENC_VOP_PACKET_BASED_ON_MB_NUM + #GF_MXENC_VOP_AC_PRE_ALWAYS_ON + #GF_MXENC_VOP_AC_PRE_DYNAMICALLY_ON + #GF_MXENC_VOP_CHANGE_EXPECTED_SIZE + #GF_MXENC_VOP_CHANGE_INITQP + #GF_MXENC_VOP_CHANGE_MIN_MAX_QP + #GF_MXENC_VOP_4MV_ENABLE + #GF_MXENC_VOP_REDUCE_FRAME_RATE + #GF_MXENC_VOP_ENCODE_I_ASAP + #GF_MXENC_VOP_IMRF_CONTROL_IP_RATIO + #GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE + #GF_MXENC_VOP_LOAD_IMRF_MATRIX + #GF_MXENC_VOP_TIMESTAMP_CPU + #GF_MXENC_VOP_TIMESTAMP_VI + #GF_MXENC_VOP_CHANGE_MAX_QP_RELIEF + + */ + + NvU16 uiPacketSize; /**< If GF_MXENC_VOP_PACKET_BASED_ON_MB_NUM flag is on, this field tells the number of macroblocks in a packet. Otherwise, this field tells number of bytes in a packet.*/ + NvU16 uiIntra_DC_VLC_Thr; /**< Intra DC VLC Threshold*/ + NvU16 uiHECNum; /**< Frequency to inset HEC marker. 0 means no HEC marker at all. 1~7 means to insert HEC after 1~7 resync marker(s).*/ + NvU16 uiExpectedISize; /**< If next encoded VOP is I, this field tells GFMxEncAPI the size of bit stream which application expects in number of DWORD.*/ + NvU16 uiExpectedPSize; /**< If next encoded VOP is P, this field tells GFMxEnc the size of bit stream which application expects in number of DWORD.*/ + NvU16 uiInitialIQP; /**< Initial QP value for I VOP*/ + NvU16 uiInitialPQP; /**< Initial QP value for P VOP */ + + NvU16 uiMaxIQP; /**< Max QP value for I VOP*/ + NvU16 uiMinIQP; /**< Min QP value for I VOP */ + + NvU16 uiMaxPQP; /**< Max QP value for P VOP*/ + NvU16 uiMinPQP; /**< Min QP value for P VOP */ + NvU16 uiMaxQPRelief; /**< Max qp Relief*/ + + NvU16 uiNumofP; /**< Number of consecutive P VOPs between two I VOPs.*/ + NvU16 uiRNumerator; /**< Desired Framerate value. This field must be filled if flag GF_MXENC_VOP_REDUCE_FRAME_RATE is on.*/ + NvU16 uiRDenominator; /**< Camera Framerate. This field must be filled if flag GF_MXENC_VOP_REDUCE_FRAME_RATE is on.*/ + + NvU8 uiIMRFIMinValue; /**< Those values will take effect only when GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever an I VOP is encoded, MxEnc will generate a random number in this range for each macroblock.*/ + NvU8 uiIMRFIMaxValue; /**< Those values will take effect only when GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever an I VOP is encoded, MxEnc will generate a random number in this range for each macroblock.*/ + NvU8 uiIMRFPMinValue; /**< Those values will take effect only when GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever a Macro Block counter is reduced to 0, an Intra Macro Block will be generated by MxEnc. MxEnc will generate a random number in this range for this macroblock.*/ + NvU8 uiIMRFPMaxValue; /**< Those values will take effect only when GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever a Macro Block counter is reduced to 0, an Intra Macro Block will be generated by MxEnc. MxEnc will generate a random number in this range for this macroblock.*/ + NvU8 uiIMRFDefaultCounter; /**< This value will be used as the new counter when the refresh counter in the matrix is decreased to 0.*/ + NvU8* pMIRFMatrix; /**< Pointer to an array that holds counter for each Macro Block. When this counter is decreased to 0, one Intra Macro Block will be inserted.*/ + + NvU32 uiTimeStampModel; /**< Time Stamp Model (VI or CPU). + + + +
      #GF_MXENC_VOP_TIMESTAMP_CPU
      #GF_MXENC_VOP_TIMESTAMP_VI
      + */ + +}GFMXENCVOP, *PGFMXENCVOP; + +//uiVOPInfo: +/**GFMXENCVOP::uiVOPInfo: Enable 4 motion vectors, GFMxEnc will pick 1 MV or 4 MV, depends on which mode is more efficient.*/ +#define GF_MXENC_VOP_4MV_ENABLE 0x00000001 + +/**GFMXENCVOP::uiVOPInfo : Enable Half Pel Motion Estimation search*/ +#define GF_MXENC_VOP_HALF_PEL_ENABLE 0x00000002 + +/**GFMXENCVOP::uiVOPInfo:New packet based on the number of MBs. Not the length of the bit stream*/ +#define GF_MXENC_VOP_PACKET_BASED_ON_MB_NUM 0x00000004 + +/**GFMXENCVOP::uiVOPInfo:AC prediction always on*/ +#define GF_MXENC_VOP_AC_PRE_ALWAYS_ON 0x00000008 + +/**GFMXENCVOP::uiVOPInfo:AC prediction dynamically on*/ +#define GF_MXENC_VOP_AC_PRE_DYNAMICALLY_ON 0x00000010 + +/**GFMXENCVOP::uiVOPInfo : Change the expected size for I and P encoded frames. uiExpectedISize, uiExpectedPSize must be filled*/ +#define GF_MXENC_VOP_CHANGE_EXPECTED_SIZE 0x00000020 + +/**GFMXENCVOP::uiVOPInfo : Change the initial QP for I and P. uiInitialIQP, uiInitialPQP must be filled*/ +#define GF_MXENC_VOP_CHANGE_INITQP 0x00000040 + +/**GFMXENCVOP::uiVOPInfo : Change the Min and Max QP for I and P frames. uiMaxIQP, uiMinIQP, uiMaxPQP, uiMinPQP must be filled*/ +#define GF_MXENC_VOP_CHANGE_MIN_MAX_QP 0x00000080 + +/**GFMXENCVOP::uiVOPInfo : Reduce the frame rate by skipping certain frames. uiRNumerator and uiRDenominator must be set.*/ +#define GF_MXENC_VOP_REDUCE_FRAME_RATE 0x00000100 + +/**GFMXENCVOP::uiVOPInfo : Encode I VOP as soon as possible*/ +#define GF_MXENC_VOP_ENCODE_I_ASAP 0x00000200 + +/**GFMXENCVOP::uiVOPInfo : Number of P VOPs between two I VOPs controlled by intra macro block refreshing. If this flag is off, it is controlled by uiNumofP*/ +#define GF_MXENC_VOP_IMRF_CONTROL_IP_RATIO 0x00000400 + +/**GFMXENCVOP::uiVOPInfo : Application can change the counter range by setting this flag and give the range in uiIMRFIMinValue, uiIMRFIMaxValue, uiIMRFPMinValue and uiIMRFPMaxValue. Application only can turn on this flag when GF_MXENC_VOL_AUTO_IMRF_ENABLE is on.*/ +#define GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE 0x00000800 + +/**GFMXENCVOP::uiVOPInfo : Application must fill in uiIMRFDefaultCounter and pIMRFMatrix when this flag is on. Application only can turn on this flag when GF_MXENC_VOL_MC_IMRF_ENABLE flag is on.*/ +#define GF_MXENC_VOP_LOAD_IMRF_MATRIX 0x00001000 + +/**GFMXENCVOP::uiVOPInfo : Timestamp is provided by CPU*/ +#define GF_MXENC_VOP_TIMESTAMP_CPU 0x00010000 + +/**GFMXENCVOP::uiVOPInfo: Timestamp is generated by VI*/ +#define GF_MXENC_VOP_TIMESTAMP_VI 0x00020000 + +/**GFMXENCVOP::uiVOPInfo : Change MAX QP RELIEF value for Rate Control Algorithm*/ +#define GF_MXENC_VOP_CHANGE_MAX_QP_RELIEF 0x00100000 + +/**typedef struct _GFMXENCRCC*/ + +typedef struct _GFMXENCRCC +{ + NvU16 uiIQP; /** + #MXENC_VOP_P_VOP + #MXENC_VOP_MORE_FETCH + #MXENC_VOP_PORTION_PACKET + #MXENC_VOP_MORE_VOP + #MXENC_VOP_BEGIN_VOP + #MXENC_VOP_END_VOP + #MXENC_VOP_BUFFER_OVERFLOW + + */ + NvU32 uiAverageQP; /** + #GF_MXENC_CAP_SIMPLE + #GF_MXENC_CAP_SCALE + #GF_MXENC_CAP_CORE + #GF_MXENC_CAP_MAIN + #GF_MXENC_CAP_N_BIT + #GF_MXENC_CAP_LEVEL1 + #GF_MXENC_CAP_LEVEL2 + #GF_MXENC_CAP_LEVEL3 + #GF_MXENC_CAP_LEVEL4 + #GF_MXENC_CAP_DATA_PARTITIONING + #GF_MXENC_CAP_RVLC + #GF_MXENC_CAP_RATE_CONTROL + #GF_MXENC_CAP_IMRF + #GF_MXENC_CAP_ROTATION + + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxEncAPI functions. +*/ + +GF_RETTYPE GFMxEncGetStatus(GFMxEncHandle hMxEnc, NvU32 * pStatus); +/**< This function returns the hardware encoder’s status. + + @param MXhandle (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (NvU32 * ) @see GFMxEncGetStatus Definitions. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ +//pStatus +/**GFMxEncGetStatus Definitions : If hardware encoder is busy encoding VOPs*/ +#define GF_ENCODER_BUSY 0x00000001 + +/**GFMxEncGetStatus Definitions : At least one VOP is ready for fetching */ +#define GF_ENCODER_VOP_READY 0x00000002 + + +GF_RETTYPE GFMxEncSetVOL(GFMxEncHandle hMxEnc, PGFMXENCVOL pVOL); +/**< This function sets the characteristics of a new video object layer (VOL) and +tells the GFMxEncAPI the VOL information. The GFMxEncAPI does not +generate a VOL bit stream. The application needs to prepare a VOL by itself. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCVOL ) Set new VOL information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + + +GF_RETTYPE GFMxEncSetVOP(GFMxEncHandle hMxEnc, PGFMXENCVOP pVOP); +/**< This function sets the characteristics of a new video object plane (VOP). This +function should be called after GFMxEncSetVOL() and before +GFMxEncStart(). If the application decides to change any VOP information +during the encoding time (after GFMxEncStart()), the application can call +this function to pass the new VOP information to the GFMxEncAPI. +Otherwise, the application should not call this function, allowing the +GFMxEncAPI to reduce overhead. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCVOP ) Set new VOP information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + + +GF_RETTYPE GFMxEncRateControlConfig(GFMxEncHandle hMxEnc, PGFMXENCRCC pRCC); +/**< This function initializes the GFMxEncAPI rate control block. This function is +optional for application because the GFMxEncAPI automatically initializes +the rate control block. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCRCC ) Set rate control information.. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + +GF_RETTYPE GFMxEncFeedImage(GFMxEncHandle hMxEnc, + PGFMXENCFEEDIMAGE pFeedImage); +/**< The application can call this function if the application has the source image to feed to the encoder. +This function should not be called if the image comes directly from the video +input port (VIP), for example, from a camera. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCFEEDIMAGE ) New image information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + + +GF_RETTYPE GFMxEncFetchImage(GFMxEncHandle hMxEnc,PGFMXENCFETCHVOP pFetchVOP); +/**< An application should call this function to fetch the encoded VOP bit stream +or encoded raw data. If the source image is from the host, the application +should call this function after GFMxEncFeedImage(). If the source image is +from a video camera connected to the VIP and the application is using a +polling scheme, the application should call this function at least at the +camera’s frame rate. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCFETCHVOP ) Structure to hold encoded VOP information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + +GF_RETTYPE GFMxEncStart(GFMxEncHandle hMxEnc); +/**< This function starts the GFMxEncAPI module for encoding the bit stream. +The GFMxEncAPI assumes the first VOP it outputs is the first VOP in the +current VOL. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + +GF_RETTYPE GFMxEncPause(GFMxEncHandle hMxEnc); +/**< This function pauses the encoding process until GFMxEncPause() is called +again to Resume encoding, or GFMxEncStop() is called to totally stop encoding. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + +GF_RETTYPE GFMxEncStop(GFMxEncHandle hMxEnc); +/**< This function stops the encoding process. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + +GF_RETTYPE GFMxEncSetupInterrupt(GFMxEncHandle hMxEnc,void (*Inter)(void *), void * IPara); +/**< An application can use this function to set up the interrupt callback function. +This function must be called before GFMxEncStart(). +If this function returns GF_SUCCESS, whenever a VOP is ready the +GFMxEncAPI calls the interrupt callback function. Inside of the callback +function, the application can call GFMxEncSetVOP() if it is needed, and call +GFMxEncFetchImage() to fetch the encoded VOP. +If GF_ERROR is returned, the application should use a polling scheme. + + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param (*Inter)(void *) (void) Pointer to encoder application’s interrupt callback function. + @param IPara (void *) Pointer to parameter of encoder application’s interrupt callback function. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + +GF_RETTYPE GFMxEncSetAttribute(GFMxEncHandle hMxEnc, NvU32 uiFeature, NvU32* pInfo); +/**< This function sets a feature of the MPEG encoder hardware. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param uiFeature (NvU32) @see GFMxEncSetAttribute Definitions + @param pInfo (NvU32*) Pointer to the information buffer. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes + + GFMxEncSetAttribute_Definitions: + + + + + +
      #MXENC_ATTR_KEEP_PREV_ENCODING_INTERNAL_RESOURCE
      #MXENC_PREVIEW_ROTATE_BUFFER
      #MXENC_GET_PREVIEW_BUFFER
      #MXENC_ENABLE_INTERRUPT_MODE
      + + MXENC_ENABLE_INTERRUPT_MODE MXENC_GET_PREVIEW_BUFFER MXENC_PREVIEW_ROTATE_BUFFER MXENC_ATTR_KEEP_PREV_ENCODING_INTERNAL_RESOURCE +*/ + + +GF_RETTYPE GFMxEncGetAttribute(GFMxEncHandle hMxEnc, NvU32 uiFeature, NvU32* pInfo); +/**< This function gets a feature of the MPEG encoder hardware.. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param uiFeature (NvU32) see GFMxEncGetAttribute_Definitions below. + @param pInfo (NvU32*) Pointer to the information buffer. + + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes + + + +GFMxEncGetAttribute_Definitions: +GF4800 and subsequent generation of GPUs have rotator block which can rotate +video frame before encoding. In a normal mode a Encoder doesn't need to +capture whole video frame before encoding but in rotation mode, it needs to +capture full video frame (YUV4:2:0) before encoding. This means rotation +mode requires more memory. +This option can be used to enable rotation with 4 basic modes which can be +ORed with two h-flip and v-flip options. +Total of 8 unique combination of rotation modes are available. +*pInfo rotation degree used with MXENC_ATTR_ROTATION + + + + + + + + + +
      #MXENC_ATTR_ROTATION
      #MXENC_ATTR_ROTATE_0
      #MXENC_ATTR_ROTATE_90
      #MXENC_ATTR_ROTATE_180
      #MXENC_ATTR_ROTATE_270
      #MXENC_ATTR_H_FLIP
      #MXENC_ATTR_V_FLIP
      + + + + +*/ + +/** @name GFMxEncGetAttribute_Definitions +*/ +//@{ + +/**GFMxEncGetAttribute_Definitions: +*/ + +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATION*/ +#define MXENC_ATTR_ROTATION 1 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATE_0*/ +#define MXENC_ATTR_ROTATE_0 0x0 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATE_90*/ +#define MXENC_ATTR_ROTATE_90 0x1 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATE_180*/ +#define MXENC_ATTR_ROTATE_180 0x2 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATE_270*/ +#define MXENC_ATTR_ROTATE_270 0x3 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_H_FLIP*/ +#define MXENC_ATTR_H_FLIP 0x10 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_V_FLIP*/ +#define MXENC_ATTR_V_FLIP 0x20 +//@} + + + +GF_RETTYPE GFMxEncInterruptControl(GFMxEncHandle MxHandle); +/**< This function enables the MxEnc interrupt. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + +/** @name GFMxEncAPI_Error_Codes +*/ +//@{ + +/** GFMXE_SUCCESS*/ +#define GFMXE_SUCCESS GF_SUCCESS +/** GFMXE_ERROR_NOT_SUPPORT_FORMAT */ +#define GFMXE_ERROR_NOT_SUPPORT_FORMAT (GFMXE_ERROR | 0x00000001) +/** GFMXE_ERROR_INVALID_PARAMETER */ +#define GFMXE_ERROR_INVALID_PARAMETER (GFMXE_ERROR | 0x00000002) +/** GFMXE_ERROR_NOT_ENOUGH_EMBEDDED_MEM */ +#define GFMXE_ERROR_NOT_ENOUGH_EMBEDDED_MEM (GFMXE_ERROR | 0x00000003) +/** GFMXE_ERROR_SET_ATTRIBUTE_FAILED */ +#define GFMXE_ERROR_SET_ATTRIBUTE_FAILED (GFMXE_ERROR | 0x00000004) + +//@} + + + /*@}*/ + + /** @page pageMxEncAppNotes MxEncAPI Application Notes + + @section pageMxEncAppNotes1 Programming Sequence + + Todo + */ + +#ifdef __cplusplus +} // only need to export C interface if +// used by C++ source code +#endif + +#endif //#ifndef _GF_MPEG_ENC__ diff --git a/Start_WM/test6/inc/GFMxEncH264.h b/Start_WM/test6/inc/GFMxEncH264.h new file mode 100755 index 00000000..f4f81228 --- /dev/null +++ b/Start_WM/test6/inc/GFMxEncH264.h @@ -0,0 +1,788 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. +* +* NVIDIA Corporation and its licensors retain all intellectual property +* and proprietary rights in and to this software, related documentation +* and any modifications thereto. Any use, reproduction, disclosure or +* distribution of this software and related documentation without an +* express license agreement from NVIDIA Corporation is strictly prohibited. +*/ + +/** @file GFMxEncH264.h +GFSDK H264 Encode API header file. +*/ + +// The following ifdef block is the standard way of creating macros which make exporting +// from a DLL simpler. All files within this DLL are compiled with the GFMXENC_EXPORTS +// symbol defined on the command line. this symbol should not be defined on any project +// that uses this DLL. This way any other project whose source files include this file see +// GFMXENC_API functions as being imported from a DLL, wheras this DLL sees symbols +// defined with this macro as being exported. +#ifndef _GF_MPEG_ENC_H264__ +#define _GF_MPEG_ENC_H264__ + +#include "GFVx.h" + +#include "GFDef.h" + +/** @addtogroup groupMxEncH264 MxEncH264API H264 Encode API +
        +
      • @ref pageMxEncH264AppNotes +
          +
        • @ref pageMxEncH264AppNotes1 +
        +
      +*/ +/*@{*/ + +/** @name GFMxEncH264 API Property Caps */ +//@{ +/** MxEncH264API property flag: Support baseline Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_BASELINE 0x00000001 //support baseline profile +/** MxEncH264API property flag: Support Main Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_MAIN 0x00000002 //support main profile +/** MxEncH264API property flag: Support extended Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_EXTENDED 0x00000004 //support extended profile +/** MxEncH264API property flag: Support high 10 Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_HIGH10 0x00000008 //support high 10 profile +/** MxEncH264API property flag: Support high 422 Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_HIGH422 0x00000010 //support high 422 profile +/** MxEncH264API property flag: Support high 444 Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_HIGH444 0x00000020 //support high 444 profile +/** MxEncH264API property flag: Level_IDC following H.264 spec definition. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_LEVEL_IDC(Capability) \ + ((Capability >> 12) & 0xfff)//Level_IDC following H.264 spec definition +/** MxEncH264API property flag: Support data partitioning mode. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_DATA_PARTITIONING 0x10000000 //support data partitioning mode +/** MxEncH264API property flag: Support rate control. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_RATE_CONTROL 0x20000000 //support rate control +/** MxEncH264API property flag: Support intra macro block refreshing. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_IMRF 0x40000000 //support intra macro block refreshing +/** MxEncH264API property flag: Support rotation. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_ROTATION 0x80000000 //support rotation + +//@} + + + + +/**typedef struct GFMXENCH264SETSEQUENCE_TAG*/ +typedef struct GFMXENCH264SETSEQUENCE_TAG +{ + NvU32 SequenceInfo; /**< Sequence characteristics */ + /**< + + + + + + + + + + + +
      #GF_MXENC_H264_SEQUENCE_CONSTRAINT_SET0_FLAG
      #GF_MXENC_H264_SEQUENCE_CONSTRAINT_SET1_FLAG
      #GF_MXENC_H264_SEQUENCE_CONSTRAINT_SET2_FLAG
      #GF_MXENC_H264_SEQUENCE_DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG
      #GF_MXENC_H264_SEQUENCE_FRAME_MBS_ONLY_FLAG
      #GF_MXENC_H264_SEQUENCE_RATE_CONTROL_ENABLE
      #GF_MXENC_H264_SEQUENCE_AUTO_IMRF_ENABLE
      #GF_MXENC_H264_SEQUENCE_MC_IMRF_ENABLE
      #GF_MXENC_H264_SEQUENCE_REALTIME_ENCODE
      #GF_MXENC_H264_SEQUENCE_DEBLK_I_SLICE
      + */ + NvU32 profile_idc; /** + #GF_MXENC_H264_PICTURE_CHANGE_INIT_QP + #GF_MXENC_H264_PICTURE_REDUCE_FRAME_RATE + #GF_MXENC_H264_PICTURE_ENCODE_IDR_ASAP + #GF_MXENC_H264_PICTURE_CHANGE_MIN_MAX_QP + #GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE + #GF_MXENC_H264_PICTURE_LOAD_IMRF_MATRIX + #GF_MXENC_H264_PICTURE_4MV_ENABLE + #GF_MXENC_H264_PICTURE_HALF_PEL_ENABLE + #GF_MXENC_H264_PICTURE_DEBLK_FILTER_ENABLE + #GF_MXENC_H264_PICTURE_MULTI_SLICE_ENABLE + + */ + NvU32 numofSlicesGroup; /**< Number of slice groups, default value = 0 */ + NvU32 sliceGroupMapType; /**< default value is 0 , interleaved slice groups */ + NvU32 num_of_ref_idx_10_active; /**< Specifies the maximum reference index for reference picture list 0 ,default value is 0 */ + NvU32 num_of_ref_idx_11_active; /**< Default value is 0 */ + NvS32 pic_init_qp; /**< Initial value of the slice QP*/ + NvS32 pic_init_qs; /**< Initial value of the slice QS */ + NvS32 chroma_qp_index_offset; /**< Specifies the offset that shall be added to QPY and QSY for addressing the table of QPC values. The value of chroma_qp_index_offset shall be in the range of -12 to +12, inclusive. */ + NvU32 uiMaxIDRQP; /**< Max QP value for IDR */ + NvU32 uiMinIDRQP; /**< Min QP value for IDR */ + + NvU32 uiMaxNONIDRQP; /**< Max QP value for non-IDR picture */ + NvU32 uiMinNONIDRQP; /**< Min QP value for non-IDR picture */ + + NvU32 SliceAlpha; /**< Aplha value for Deblocking */ + NvU32 SliceBeta; /**< Beta value for Deblocking */ + + /**< Packetisation for H264*/ + NvU32 uiPacketCtrlDisable; /**< Disables the packet mode control */ + NvU32 uiPacketMode; /**< If 1 ,then in macroblock mode else in bytes mode, bytes mode not supported */ + NvU32 uiPacketSize; /**< Packet size in MBs or bytes, packet size in bytes is not supported, Value can range from zero to the number of MBs in a frame */ + + NvU32 uiNumofPicBetween2IDRs; /**< Number of P frames in between consecutive I Frames */ + NvU32 uiRNumerator; /**< Desired Framerate value. This field must be filled if flag GF_MXENC_H264_PICTURE_REDUCE_FRAME_RATE is on. */ + NvU32 uiRDenominator; /**< Camera Framerate. This field must be filled if flag F_MXENC_H264_PICTURE_REDUCE_FRAME_RATE is on. */ + NvU32 uiIMRFIMinValue; /**< Those values will take effect only when GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever an I frame is encoded, MxEncH264 will generate a random number in this range for each macroblock */ + NvU32 uiIMRFIMaxValue; /**< Those values will take effect only when GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever an I frame is encoded, MxEncH264 will generate a random number in this range for each macroblock. */ + NvU32 uiIMRFPMinValue; /**< Those values will take effect only when GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever a Macro Block counter is reduced to 0, an Intra Macro Block will be generated by MxEncH264. MxEncH264 will generate a random number in this range for this macroblock. */ + NvU32 uiIMRFPMaxValue; /**< Those values will take effect only when GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever a Macro Block counter is reduced to 0, an Intra Macro Block will be generated by MxEncH264. MxEncH264 will generate a random number in this range for this macroblock. */ + NvU32 uiIMRFDefaultCounter; /**< This value will be used as the new counter when the refresh counter in the matrix is decreased to 0. */ + NvU8 *pIMRFMatrix; /**< Pointer to an array that holds counter for each Macro Block. When this counter is decreased to 0, one Intra Macro Block will be inserted.*/ + + +} GFMXENCH264SETPICTURE, *PGFMXENCH264SETPICTURE; + +/** @name GFMxEncH264 API Setpicture::PictureInfo */ +//@{ +/**GFMXENCH264SETPICTURE::PictureInfo: When application enables this flag, application must set pic_init_qp, pic_init_qs and chroma_qp_index_offset.*/ +#define GF_MXENC_H264_PICTURE_CHANGE_INIT_QP 0x00000001 + +/**GFMXENCH264SETPICTURE::PictureInfo:Reduce the frame rate by skipping certain frames, Must set uiRNumerator and uiRDenominator.*/ +#define GF_MXENC_H264_PICTURE_REDUCE_FRAME_RATE 0x00000002 + +/**GFMXENCH264SETPICTURE::PictureInfo: Encode IDR as soon as possible .*/ +#define GF_MXENC_H264_PICTURE_ENCODE_IDR_ASAP 0x00000004 + +/**GFMXENCH264SETPICTURE::PictureInfo:When application set this flag, application must set uiMaxIDRQP, uiMinIDRQP, uiMaxNONIDRQP and uiMinNONIDRQP .*/ +#define GF_MXENC_H264_PICTURE_CHANGE_MIN_MAX_QP 0x00000008 + +/**GFMXENCH264SETPICTURE::PictureInfo:Application changes the counter range by setting this, flag and giving the range in uiIMRFIMinValue uiIMRFIMaxValue, uiIMRFPMinValue, and uiIMRFPMaxValue, Applications can turn on this flag only when GF_MXENC_H264_SEQUENCE_AUTO_IMRF_ENABLE is on.*/ +#define GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE 0x00000010 + +/**GFMXENCH264SETPICTURE::PictureInfo: Application must fill in uiIMRFDefaultCounter and pIMRFMatrix if this flag is on, Application can turn on flag only if GF_MXENC_H264_PICTURE_MC_IMRF_ENABLE is on .*/ +#define GF_MXENC_H264_PICTURE_LOAD_IMRF_MATRIX 0x00000020 + +/**GFMXENCH264SETPICTURE::PictureInfo: Enable 4 motion vectors, GFMxEncH264 will pick 1 MV or 4 MV, depends on which mode is more efficient.*/ +#define GF_MXENC_H264_PICTURE_4MV_ENABLE 0x00000040 + +/**GFMXENCH264SETPICTURE::PictureInfo: Enable half pel motion estimation search.*/ +#define GF_MXENC_H264_PICTURE_HALF_PEL_ENABLE 0x00000080 + +/**GFMXENCH264SETPICTURE::PictureInfo: Enable Deblocking.*/ +#define GF_MXENC_H264_PICTURE_DEBLK_FILTER_ENABLE 0x00000100 + +/**GFMXENCH264SETPICTURE::PictureInfo: Enable Multi Slicing. Mutli-slicing is not supported*/ +#define GF_MXENC_H264_PICTURE_MULTI_SLICE_ENABLE 0x00000200 +//@} + +/** typedef struct GFMXENCH264RCC_TAG */ +typedef struct GFMXENCH264RCC_TAG +{ + NvU16 uiIQP; /** + #GF_MXENC_H264_NALS_SEQUENCE_PARAMETER_SET + #GF_MXENC_H264_NALS_PICTURE_PARAMETER_SET + #GF_MXENC_H264_NALS_IDR_PIC + #GF_MXENC_H264_NALS_NON_IDR_PIC + #GF_MXENC_H264_NALS_BEGIN_ACCESS_UNIT + #GF_MXENC_H264_NALS_PARTIAL_ACCESS_UNIT + #GF_MXENC_H264_NALS_END_ACCESS_UNIT + #GF_MXENC_H264_NALS_DATA_NOT_READY + #GF_MXENC_H264_NALS_MORE_FETCH + #GF_MXENC_H264_NALS_MORE_NALS + + */ + NvU32 uiTime; /**< In milliseconds, the encoded picture's time stamp. First picture may start from 0. */ + NvU32 uiFetchedSize; /**< Number of available bytes */ +}GFMXENCH264FETCHNALS, *PGFMXENCH264FETCHNALS; + +/** @name GFMXENCH264FETCHNALS::uiNALsInfo definitions */ +//@{ + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current NAL unit is a Sequence Parameter Set. */ +#define GF_MXENC_H264_NALS_SEQUENCE_PARAMETER_SET 0x00000001 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current NAL unit is a Picture Parameter Set. */ +#define GF_MXENC_H264_NALS_PICTURE_PARAMETER_SET 0x00000002 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current NAL unit belongs to an IDR Pic. */ +#define GF_MXENC_H264_NALS_IDR_PIC 0x00000004 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current NAL unit belongs to a Non-IDR Pic. */ +#define GF_MXENC_H264_NALS_NON_IDR_PIC 0x00000008 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current data is the start of a new Access Unit. */ +#define GF_MXENC_H264_NALS_BEGIN_ACCESS_UNIT 0x00000010 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current data is a Partial Access Unit. */ +#define GF_MXENC_H264_NALS_PARTIAL_ACCESS_UNIT 0x00000020 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current data is the End of the Access Unit. */ +#define GF_MXENC_H264_NALS_END_ACCESS_UNIT 0x00000040 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Data of current NAL is not ready yet.*/ +#define GF_MXENC_H264_NALS_DATA_NOT_READY 0x00000080 + +/**GFMXENCH264FETCHNALS::uiNALsInfo: Present NAL unit is larger than application's buffer size. Call FetchNALs again to get remaining data.*/ +#define GF_MXENC_H264_NALS_MORE_FETCH 0x00000100 + +/** GFMXENCH264FETCHNALS::uiNALsInfo: More NALs are encoded and ready to be fetched by the application. */ +#define GF_MXENC_H264_NALS_MORE_NALS 0x00000200 + +//@} + +/** @name GFMxEncH264SetAttribute Definitions */ +//@{ + +/**GFMxEncH264SetAttribute_Definitions::MXENC_H264_ATTR_ROTATION: +GF4800 and subsequent generation of GPUs have rotator block which can rotate +video frame before encoding. In a normal mode a Encoder doesn't need to +capture whole video frame before encoding but in rotation mode, it needs to +capture full video frame (YUV4:2:0) before encoding. This means rotation +mode requires more memory. +This option can be used to enable rotation with 4 basic modes which can be +ORed with two h-flip and v-flip options. +Total of 8 unique combination of rotation modes are available. +*pInfo rotation degree used with MXENC_ATTR_ROTATION +*/ +#define MXENC_H264_ATTR_ROTATION 1 + +#define MXENC_H264_ATTR_ROTATE_0 0x0 /**< No rotation */ +#define MXENC_H264_ATTR_ROTATE_90 0x1 /**< Rotate by 90 degree */ +#define MXENC_H264_ATTR_ROTATE_180 0x2 /**< Rotate by 180 degree */ +#define MXENC_H264_ATTR_ROTATE_270 0x3 /**< Rotate by 270 degree */ +#define MXENC_H264_ATTR_H_FLIP 0x10 /**< Flip horizontally */ +#define MXENC_H264_ATTR_V_FLIP 0x20 /**< Flip vertically */ + +/**GFMxEncH264SetAttribute_Definitions:MXENC_H264_INTRAREFRESH_MODE +This option allows you to change the INTRA REFRESH mode while encoding is in progress. +With this option, the application can switch/Turn ON MXENC_H264_INTRAREFRESH_AUTO or +MXENC_H264_INTRAREFRESH_MC. After switching to MXENC_H264_INTRAREFRESH_MC mode, the application +has to call GFMxEncH264SetPicture() with pPicture:pIMRFMatrix specifying the Intra Refresh pattern +*/ +#define MXENC_H264_INTRAREFRESH_MODE 2 +#define MXENC_H264_INTRAREFRESH_AUTO 0x1 /**< Set Intrarefresh pattern in Auto mode */ +#define MXENC_H264_INTRAREFRESH_MC 0x2 /**< Set Intrarefresh pattern in Motion Compensated mode */ + +//@} + +/** typedef enum GFMX_ENC_H264_INTERRUPT_OPERATION_TYPE : Set Interrupt Operation to perform */ +typedef enum +{ + GFMX_ENC_H264_INTERRUPT_ENABLE, /**< Enable Interrupt */ + GFMX_ENC_H264_INTERRUPT_DISABLE, /**< Disable Interrupt */ + GFMX_ENC_H264_INTERRUPT_CLEAR /**< Clear Interrupt */ +} GFMX_ENC_H264_INTERRUPT_OPERATION_TYPE; // Interrupt operation. + +/** typedef enum GFMX_ENC_H264_INTERRUPT_TYPE : Interrupt type*/ +typedef enum +{ + GFMX_ENC_H264_FRAME_ENCODE_DONE_INTR /**< Frame Encode Done Interrupt */ +} GFMX_ENC_H264_INTERRUPT_TYPE; + + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif + + /** MxEncH264API virtual function pointer table. + These functions serve as the entry point to the MxEncH264API from the application. + */ + typedef struct _GFMXEncH264TABLE + { + GF_RETTYPE (* MxEncH264GetProperty)(GFMxEncH264Handle hMxEncH264, PGFPROPERTY pMXProp ); + /**< This function returns a variety of information, including the version of the + GFMxEncH264API encoder module. It is a good practice to call this function to query + for the GFMxEncH264API version and its capabilities before using the rest of the + GFMxEncH264API functions. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pMXProp (PGFPROPERTY) Pointer to GFPROPERTY. + MxEncH264API property flag below. + + MxEncH264API property flag: + + + + + + + + + + + + +
      #GF_MXENC_H264_CAP_BASELINE
      #GF_MXENC_H264_CAP_MAIN
      #GF_MXENC_H264_CAP_EXTENDED
      #GF_MXENC_H264_CAP_HIGH10
      #GF_MXENC_H264_CAP_HIGH422
      #GF_MXENC_H264_CAP_HIGH444
      #GF_MXENC_H264_CAP_LEVEL_IDC
      #GF_MXENC_H264_CAP_DATA_PARTITIONING
      #GF_MXENC_H264_CAP_RATE_CONTROL
      #GF_MXENC_H264_CAP_IMRF
      #GF_MXENC_H264_CAP_ROTATION
      + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxEncH264API functions. + */ + + GF_RETTYPE (* MxEncH264GetStatus)(GFMxEncH264Handle hMxEncH264, NvU32 * pStatus); + /**< This function returns the hardware encoder’s status. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pStatus (NvU32 * ) Status returned by the encoder. @see GFMxEncH264GetStatus Definitions. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264SetSequence)(GFMxEncH264Handle hMxEncH264, PGFMXENCH264SETSEQUENCE pSequence); + /**< This function sets the characteristics of a new H264 video sequence and + tells the GFMxEncH264API the sequence information. The GFMxEncH264API does not + generate a sequence bit stream. The application needs to prepare a sequence by itself. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pSequence (PGFMXENCH264SETSEQUENCE ) Set new sequence information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264SetPicture)(GFMxEncH264Handle hMxEncH264, PGFMXENCH264SETPICTURE pPicture); + /**< This function sets the characteristics of a new picture. This + function should be called after GFMxEncH264SetSequence() and before + GFMxEncH264Start(). If the application decides to change any picture information + during the encoding time (after GFMxEncH264Start()), the application can call + this function to pass the new picture information to the GFMxEncH264API. + Otherwise, the application should not call this function, allowing the + GFMxEncH264API to reduce overhead. + + @paramhMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pPicture (PGFMXENCH264SETPICTURE ) Set new picture information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264RateControlConfig)(GFMxEncH264Handle hMxEncH264, PGFMXENCH264RCC pRCC); + /**< This function initializes the GFMxEncH264API rate control block. This function is + optional for application because the GFMxEncH264API automatically initializes + the rate control block. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pRCC (PGFMXENCH264RCC ) Set rate control information.. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264FeedImage)(GFMxEncH264Handle hMxEncH264, + PGFMXENCH264FEEDIMAGE pFeedImage); + /**< The application can call this function if the application has the source image to feed to the encoder. + This function should not be called if the image comes directly from the video + input port (VIP), for example, from a camera. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pStatus (PGFMXENCH264FEEDIMAGE ) New image information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264FetchNALs)(GFMxEncH264Handle hMxEncH264, + PGFMXENCH264FETCHNALS pFetchNALs); + /**< An application should call this function to fetch the encoded NAL bit stream + or encoded raw data. If the source image is from the host, the application + should call this function after GFMxEnch264FeedImage(). If the source image is + from a video camera connected to the VIP and the application is using a + polling scheme, the application should call this function at least at the + camera’s frame rate. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pFetchNALs (PGFMXENCH264FETCHNALS ) Structure to hold encoded NAL information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264Start)(GFMxEncH264Handle hMxEncH264); + /**< This function starts the GFMxEncH264API module for encoding the bit stream. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + GF_RETTYPE (* MxEncH264Pause)(GFMxEncH264Handle hMxEncH264); + /**< This function pauses the encoding process until GFMxEnch264Pause() is called + again to Resume encoding, or GFMxEncH264Stop() is called to totally stop encoding. + + @param hMxEnc (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264Stop)(GFMxEncH264Handle hMxEncH264); + /**< This function stops the encoding process. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264SetupInterrupt)(GFMxEncH264Handle hMxEncH264, + void (*Inter)(void *), void * IPara); + /**< An application can use this function to set up the interrupt callback function. + + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param (*Inter)(void *) (void) Pointer to encoder application’s interrupt callback function. + @param IPara (void *) Pointer to parameter of encoder application’s interrupt callback function. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264SetAttribute)(GFMxEncH264Handle hMxEncH264, NvU32 uiFeature, NvU32* pInfo); + /**< This function sets a feature of the H264 encoder. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param uiFeature (NvU32) @see GFMxEncH264SetAttribute Definitions + @param pInfo (NvU32*) Pointer to the information buffer. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + + GFMxEncH264SetAttribute_Definitions: + + + +
      #MXENC_H264_ATTR_ROTATION
      #MXENC_H264_INTRAREFRESH_MODE
      + + + */ + GF_RETTYPE (* MxEncH264GetAttribute)(GFMxEncH264Handle hMxEncH264, NvU32 uiFeature, NvU32* pInfo); + /**< This function gets a feature of the H264 encoder. + + @param hMxEnc (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param uiFeature (NvU32) see GFMxEncH264GetAttribute_Definitions below. + @param pInfo (NvU32*) Pointer to the information buffer. + + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes + + */ + + }GFMXENCH264TABLE, *PGFMXENCH264TABLE; + + // Typesafe functions for opening and closing this component + GF_RETTYPE GFMxEncH264Open(GFRmHandle hRm, GFMxEncH264Handle *phMxEncH264, + GF_STATE_TYPE state, GFRmChHandle hCh); + /**< Typesafe function for opening the H264 Encoder component. + + @param hRm (GFRmHandle) RM Handle got from GFRmOpen. + @param phMxEncH264 (GFMxEncH264Handle *) Handle specific to the GFMxEncH264API is returned in this. + @param state (GF_STATE_TYPE) . + @param hCh (GFRmChHandle) Channel handle + */ + + void GFMxEncH264Close(GFMxEncH264Handle *phMxEncH264); + /**< Typesafe function for closing the H264 Encoder component. + + @param phMxEncH264 (GFMxEncH264Handle *) Pointer to handle specific to H264 encoder component. + */ + + /** @name GFMxEncH264GetStatus Definitions */ + //@{ +#define GF_ENCODER_BUSY 0x00000001 /**< Encoder is busy */ +#define GF_ENCODER_VOP_READY 0x00000002 /**< At least one VOP is ready for fetching */ + //@} + +/** @name GFMxEncH264API Helper Macros. */ + //@{ + +#define GFMxEncH264GetProperty(hMxEncH264, pMXProp) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264GetProperty(hMxEncH264, pMXProp) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264GetProperty + */ + +#define GFMxEncH264GetStatus(hMxEncH264, pStatus) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264GetStatus(hMxEncH264, pStatus) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264GetStatus + */ + +#define GFMxEncH264SetSequence(hMxEncH264, pSequence) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264SetSequence(hMxEncH264, pSequence) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264SetSequence + */ + +#define GFMxEncH264SetPicture(hMxEncH264, pPicture)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264SetPicture(hMxEncH264, pPicture) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264SetPicture + */ + +#define GFMxEncH264RateControlConfig(hMxEncH264, pRCC)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264RateControlConfig(hMxEncH264, pRCC) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264RateControlConfig + */ + +#define GFMxEncH264FeedImage(hMxEncH264, pFeedImage)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264FeedImage(hMxEncH264, pFeedImage) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264FeedImage + */ + +#define GFMxEncH264FetchNALs(hMxEncH264, pFetchNALs)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264FetchNALs(hMxEncH264, pFetchNALs) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264FetchNALs + */ + +#define GFMxEncH264Start(hMxEncH264)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264Start(hMxEncH264) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264Start + */ + +#define GFMxEncH264Pause(hMxEncH264)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264Pause(hMxEncH264) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264Pause + */ + +#define GFMxEncH264Stop(hMxEncH264)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264Stop(hMxEncH264) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264Stop + */ + +#define GFMxEncH264SetupInterrupt(hMxEncH264, Inter,IPara)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264SetupInterrupt(hMxEncH264, Inter,IPara) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264SetupInterrupt + */ + +#define GFMxEncH264SetAttribute(hMxEncH264, uiFeature, pInfo) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264SetAttribute(hMxEncH264, uiFeature, pInfo) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264SetAttribute + */ + +#define GFMxEncH264GetAttribute(hMxEncH264, uiFeature, pInfo) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264GetAttribute(hMxEncH264, uiFeature, pInfo) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264GetAttribute + */ + + //@} + + /** @name GFMxEncH264API_Error_Codes + */ + //@{ + + /** GFMXEH264_SUCCESS*/ +#define GFMXEH264_SUCCESS GF_SUCCESS + /** GGFMXEH264_ERROR_NOT_SUPPORT_FORMAT*/ +#define GFMXEH264_ERROR_NOT_SUPPORT_FORMAT (GFMXEH264_ERROR | 0x00000001) + /** GFMXEH264_ERROR_INVALID_PARAMETER*/ +#define GFMXEH264_ERROR_INVALID_PARAMETER (GFMXEH264_ERROR | 0x00000002) + /** GFMXEH264_ERROR_NOT_ENOUGH_EMBEDDED_MEM*/ +#define GFMXEH264_ERROR_NOT_ENOUGH_EMBEDDED_MEM (GFMXEH264_ERROR | 0x00000003) + //@} + + + /*@}*/ + + /** @page pageMxEncH264AppNotes MxEncH264API Application Notes + + @section pageMxEncH264AppNotes1 Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start GFSDK usage. The description is for a typical case + where encoding of video being captured from a camera is done and preview shown on the display. + + 1. Initialize the display panel by using GFRmIxInit().\n + + 2. Open the display component by calling GFDxOpen() to get the GFMxDecAPI Dxhandle.\n + + 3. Initialize the display start address, stride and bits per pixel using GFDxSetDisplay().\n + + 4. Get the various attributes of the display panel (width, height, etc) using GFDxGetAttribute().\n + + 5. For clearing the screen, open the graphics component using GFGxOpen() and use GFGxFillRect() for filling the screen with + some color (say, green).\n + + 6. Open the Vx component using GFVxOpen() and get the GFVxAPI VxHandle. \n + + 7. Setup the camera. \n + + 8. Initialize VIP. \n + + 9. Obtain the handle specific to H264 encoder by calling GFMxEncH264Open(). \n + + 10. Call GFMxEncH264GetProperty() to query properties. Check whether this version can support the desired H264 profile and level. \n + + 11. If supported, call GFRmSurfaceAlloc() to allocate one surface for encoding purposes. \n + + 12. Call GFMxEncH264SetAttribute() if specific features need to be set. \n + + 13. Call GFMxEncH264SetSequence() for configuring the characteristics of a new H264 video sequence. \n + + 14. Call GFMxEncH264SetPicture() for setting the characteristics of a new picture. \n + + 15. If the current source image is from the CPU, the application should call GFMxEncH264FeedImage() to feed the + image to the GFMxEncH264API. If the current source image is coming from the VIP (for example. camera input), the + application should skip the GFMxEncH264FeedImage() call. + + 16. If the application uses an interrupt scheme, it must implement a callback function and set it up using GFMxEncH264SetupInterrupt. + Inside of the callback function, the application should call GFMxEncH264FetchNALs() to retrieve the encoded NALs. \n + + 17. Start the encoding by calling GFMxEncH264Start(). \n + + 18. The application should periodically call the callback function to get the data from the encoder. \n + + 19. The encoder can be paused by calling GFMxEncH264Pause() and can be resumed by calling GFMxEncH264Pause() again. \n + + 20. Before exiting, call GFMxEncH264Stop() to stop the encoder. \n + + 21. Call the callback function after waiting for some time to get the data for the last frame encoded. \n + + 22. Free all relevent resources and call GFMxEncH264Close() to free the H264 encoder component. \n + + */ + +#ifdef __cplusplus +} // only need to export C interface if +// used by C++ source code +#endif + +#endif //#ifndef _GF_MPEG_ENC_H264__ diff --git a/Start_WM/test6/inc/GFOSx.h b/Start_WM/test6/inc/GFOSx.h new file mode 100755 index 00000000..f3f48b0d --- /dev/null +++ b/Start_WM/test6/inc/GFOSx.h @@ -0,0 +1,39 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFOSx.h + GFSDK OS Abstraction API header file. +*/ + +#ifndef __GFOSx_H__ +#define __GFOSx_H__ + +#include "GFRmOEM.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupOSx OSxAPI OS Abstraction API +*/ +/*@{*/ + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFOSxOpen(GFRmHandle hRm, GFOSxHandle *phOSx, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFOSxClose(GFOSxHandle *phOSx); + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif // _GFOSx_H_ diff --git a/Start_WM/test6/inc/GFOption.h b/Start_WM/test6/inc/GFOption.h new file mode 100755 index 00000000..c54f0d7e --- /dev/null +++ b/Start_WM/test6/inc/GFOption.h @@ -0,0 +1,140 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFOption.h + GFSDK (Compile-time) Option header file. + Contains user level options and selected compile-time options. +*/ + +#ifndef __GFOPTION_H__ +#define __GFOPTION_H__ + +#include "cpuopsys.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + +/*************************************************************************** + * Hardware Dependent Options and Compile-time selections + ***************************************************************************/ + +/** @name Device ID options and compile-time selection + @anchor DeviceIDs + #GF_DEVICE_ID_DEFAULT option is for selecting any ID. +@{*/ + +#define GF_DEVICE_ID_DEFAULT 0x0000 +#define GF_DEVICE_ID_SC11 0x0011 +#define GF_DEVICE_ID_SC15 0x0015 +#define GF_DEVICE_ID_SC14 0x0014 + +#ifndef GF_DEVICE_ID +#define GF_DEVICE_ID GF_DEVICE_ID_SC15 + // Primary chip id +#endif /* GF_DEVICE_ID */ + +#define GF_DEVICE_ID_MASK 0x0000FFFF +#define GF_DEVICE_ID_SHIFT 0 +#define GF_DEVICE_ID_VALUE( val ) \ + (((val) >> GF_DEVICE_ID_SHIFT) & GF_DEVICE_ID_MASK) +/*@}*/ + +/** @name Device Revision options and compile-time selection + @anchor DeviceRevisions + #GF_DEVICE_REV_DEFAULT is for selecting any revision. + Always use 16bit when referring Device Revision only. +@{*/ +#define GF_REV_A1 0x00A1 +#define GF_REV_A2 0x00A2 +#define GF_REV_A3 0x00A3 +#define GF_REV_A4 0x00A4 + +#define GF_DEVICE_REV_DEFAULT 0x0000 +#ifndef GF_DEVICE_REV +#define GF_DEVICE_REV GF_DEVICE_REV_DEFAULT + //!< Primary chip revision +#endif /* GF_DEVICE_REV */ + +#define GF_DEVICE_REV_MASK 0x0000FFFF +#define GF_DEVICE_REV_SHIFT 16 +#define GF_DEVICE_REV_VALUE( val ) \ + (((val) >> GF_DEVICE_REV_SHIFT) & GF_DEVICE_REV_MASK) + +/*@}*/ + +#if defined(NVCPU_XTENSA) + +// On DSP, we always use direct addressing. +#define GF_DEVICE_ADDRESS_DEFAULT GF_DEVICE_ADDRESS_DIRECT +#define GF_DEVICE_ADDRESS GF_DEVICE_ADDRESS_DIRECT + +#else + +// On host CPU, direct & indirect addressing are available in runtime. Default +// is direct addressing. +#ifndef GF_DEVICE_ADDRESS_DEFAULT +#define GF_DEVICE_ADDRESS_DEFAULT GF_DEVICE_ADDRESS_DIRECT +#endif /* GF_DEVICE_ADDRESS_DEFAULT */ + +#ifndef GF_DEVICE_ADDRESS +#define GF_DEVICE_ADDRESS ( GF_DEVICE_ADDRESS_DIRECT \ + | GF_DEVICE_ADDRESS_INDIRECT16 \ + | GF_DEVICE_ADDRESS_INDIRECT8 \ + | GF_DEVICE_ADDRESS_INDIRECT32) +#endif /* GF_DEVICE_ADDRESS */ + +#endif + + + +/*************************************************************************** + * Operating system Dependent Options + ***************************************************************************/ + +/* The bootloader has already initialized the chip and display. To avoid + * writing the hardware again (which can cause screen flicker and other + * symptoms that the customer doesn't like), define this variable to 1. + */ +#ifndef GF_BOOTLOADER_PRESENT +#define GF_BOOTLOADER_PRESENT 0 +#endif + + + + +// If we're compiling for the bootloader right now, of course the +// bootloader cannot be present +#ifdef GF_BOOT_LIB +#undef GF_BOOTLOADER_PRESENT +#define GF_BOOTLOADER_PRESENT 0 +#endif + +/************************************************************************** + * GFSDK Library Auto Compiler Options + * Attempts to set up enough options if none is specified by Build Project. + **************************************************************************/ + +// XXX We should get rid of NV_DEBUG, so we don't have both DEBUG and NV_DEBUG +#if defined(NV_WINDOWS) && !defined(NV_WINDOWS_CE) +#ifdef _DEBUG +#ifndef NV_DEBUG +#define NV_DEBUG 1 +#endif +#endif +#endif + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFOPTION_H__ */ + diff --git a/Start_WM/test6/inc/GFRm.h b/Start_WM/test6/inc/GFRm.h new file mode 100755 index 00000000..6669abcd --- /dev/null +++ b/Start_WM/test6/inc/GFRm.h @@ -0,0 +1,2039 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFRm.h + GFSDK Resource Manager API header file. +*/ + +#ifndef __GFRM_H__ +#define __GFRM_H__ + +#include "GF.h" +#include "GFRmError.h" + +/** @addtogroup groupRm RmAPI Resource Manager API +
        +
      • @ref pageRmAppNotes +
          +
        • @ref pageRmAppNotes1 +
        +
      +*/ +/*@{*/ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#include "GFRmScr.h" + +/** Hardware Module IDs. + List of all the modules in the SCXX chips. +*/ +typedef enum +{ +#define GFRM_MODULE(x,y) MODID_##x, +#include "gfrm_module_ids.h" +#undef GFRM_MODULE + GFNUMOFMODULEIDS +} eGFModuleIDs; + +/** @name Power Planes/Islands + List of all the power planes in the SCXX chips. +@{*/ + +/** Power Plane ID: Core Power Plane. */ +#define GFPPID_AOCVDD 0x00000001 + +/** Power Plane ID: Video Codec Power Plane. */ +#define GFPPID_VECVDD 0x00000002 + +/** Power Plane ID: SRAM Power Plane. */ +#define GFPPID_MMCVDD 0x00000004 + +/** Power Plane ID: 3D Power Plane. */ +#define GFPPID_TDCVDD 0x00000008 + +/** Power Plane ID: SRAM I/O Power Plane. */ +#define GFPPID_EMVDD 0x00000010 + +/** Power Plane ID: Mostly Bus Interface Power Plane. */ +#define GFPPID_HVDD 0x00000020 + +/** Power Plane ID: Video I/O Power Plane. */ +#define GFPPID_VVDD 0x00000040 + +/** Power Plane ID: LCD I/O Power Plane. */ +#define GFPPID_LVDD 0x00000080 + +/** Power Plane ID: Audio I/O Power Plane. */ +#define GFPPID_ACVDD 0x00000100 + +/** Power Plane ID: SD I/O Power Plane. */ +#define GFPPID_SDVDD 0x00000200 + +/** Power Plane ID: Oscillator Power Plane. */ +#define GFPPID_AVDDOSC 0x00000400 + +/** Power Plane ID: PLL1 Power Plane. */ +#define GFPPID_AVDDP1 0x00000800 + +/** Power Plane ID: PLL2 Power Plane. */ +#define GFPPID_AVDDP2 0x00001000 + +/** Power Plane ID: DRAM Power Plane. */ +#define GFPPID_DRAM 0x00002000 + +/** Number of power plane IDs. */ +#define GFNUMOFPPIDS 14 + +/*@}*/ + +/** @name States for Component Manager and general services +@{*/ + +/** State for registering Component. + @see GF_STATE_TYPE, GFRmComponentGet(). +*/ +#define GF_STATE_REGISTER 0x00000001 + +/** State for unregistering Component. + @see GF_STATE_TYPE, GFRmComponentRelease(). + */ +#define GF_STATE_UNREGISTER 0x00000002 + +/** State for unregistering all Components (internal used only). + @see GF_STATE_TYPE, GFRmComponentRelease(). + */ +#define GF_STATE_UNREGISTER_ALL 0x00000004 + +/** General Enable State. + @see GF_STATE_TYPE. +*/ +#define GF_STATE_ENABLE 0x00000008 + +/** General Disable State. + @see GF_STATE_TYPE. +*/ +#define GF_STATE_DISABLE 0x00000010 + +/** General Done State. + @see GF_STATE_TYPE. +*/ +#define GF_STATE_DONE 0x00000020 + +/** State for instantiating a new or share Component. + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_NEW_OR_SHARE 0x00000100 + +/** State for instantiating a new Component only. + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_NEW_ONLY 0x00000200 + +/** State for instantiating a share Component only. + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_SHARE_ONLY 0x00000400 + +/** State indicating special Block Device Component (internal use). + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_BLOCK_DEVICE 0x80000000 + +/** Default Component instantiation State. + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_DEFAULT GF_STATE_NEW_OR_SHARE + +/** Mask for the regular States. + @see GF_STATE_TYPE. +*/ +#define GF_STATE_MASK 0x000000FF + +/*@}*/ + + +/** Attributes ID/Values. + @see GFRmGetAttribute(), GFRmSetAttribute(). +*/ +typedef enum +{ + /** Attribute for changing device bus addressing (direct/indirect) mode. */ + GF_ATTRIB_DEVICE_ADDRESS, + + /** Attribute for mapped/virtual/usable I/O base address. */ + GF_ATTRIB_IO_MAP_BASE, + + /** Attribute for mapped/virtual/usable embedded memory base. */ + GF_ATTRIB_EMBEDDED_MEM_MAP_BASE, + + /** Attribute for initial embedded internal memory size. */ + GF_ATTRIB_INIT_EMBEDDED_MEM_TOTAL, + + /** Attribute for initial available embedded internal memory size. */ + GF_ATTRIB_INIT_EMBEDDED_MEM_AVAIL, + + /** Attribute for initial embedded extended memory size. */ + GF_ATTRIB_INIT_EXT_EMBEDDED_MEM_TOTAL, + + /** Attribute for user specific object 0. */ + GF_ATTRIB_USER_OBJECT_0, + + /** Attribute for user specific object 1. */ + GF_ATTRIB_USER_OBJECT_1, + + /** Attribute for user specific object 2. */ + GF_ATTRIB_USER_OBJECT_2, + + /** Attribute for user specific object 3. */ + GF_ATTRIB_USER_OBJECT_3, + + /** Attribute for swapping memory allocation with shared embedded memory + MAX CHUNK scheme. For advanced user only. */ + GF_ATTRIB_SWAP_SHARE_MEMORY_ALLOC_ON_MAX_CHUNK, + + /** Get device information structure. + GFRmGetAttribute() parameter \a AttribData is of type PGFRMDEVICEINFO. + */ + GF_ATTRIB_DEVICE_INFO_STRUCT, + + /** For internal use only. */ + GF_ATTRIB_RMC_FLAG, + + /** Enable/Disable Hardware Resource Constraint. */ + GF_ATTRIB_HW_RESOURCE_CONSTRAINT, + + /** Enable embedded extended memory. */ + GF_ATTRIB_ENABLE_EXTENDED_MEMORY, + + /** Disable RMC trace, closing any log files that might be opened */ + GF_ATTRIB_DISABLE_RMC_TRACE, + + /** Set/Clr surface with absolute rotation option. */ + GF_ATTRIB_SURFACE_ABSOLUTE_ROTATE, + + /** Primary surface freeing policy. */ + GF_ATTRIB_PRIMSURF_FREEING_POLICY, + + /** Primary surface allocation policy. */ + GF_ATTRIB_PRIMSURF_ALLOCATION_POLICY, + + /** Internal use. */ + GF_ATTRIB_EFUSE_PRODUCT_SKU_ID, + + /** Internal use. */ + GF_ATTRIB_MAIN_PANEL_INDEX, + + /** GFRm attribute: Set DSP2Host communication mode. + + This attribute can be used to control how components wait + for messages from the DSP. The following options for \a AttribData are available: + - #GF_ATTRIB_DSPCOMMODE_POLLING -- Register polling. + This mode is intended for debuging only, since it allows only one client + to use DSP2Host interrupts. + - #GF_ATTRIB_DSPCOMMODE_EVENT -- Receive DSP2Host messages via an interrupt framework. + This mode requires an ISR/IST to be setup, that handles DSP interrupts and calls + GFRmDispatchMessage(). + + The default setting is register polling. + + Attribute can be get and set. + + @see GFRmSetAttribute(), GFRmGetAttribute(), GFRmQueueSetHandler(), GFRmDispatchMessage() + */ + GF_ATTRIB_DSPCOMMODE, + + /** Set surface for DSP debug console output. + + This sets a surface which will be used to output text from the DSP debug console. + The DSP XRM must be initialized before this function can be called. + + GFRmSetAttribute() parameter \a AttribData is of type #PGFRMSURFACE and defines a pointer to a + surface descriptor. + + @retval GF_SUCCESS Successfully send message + @retval GF_WAIT_TIME_OUT Timeout sending message + @retval GFRM_ERROR_BAD_PARAMETER Bad parameters, e.g. surface color format is not supported + + @see GFRmSetAttribute() + + Attribute can be set only. + */ + GF_ATTRIB_DSPCONSOLE_SURFACE, + + /** Internal use. */ + GF_ATTRIB_USE_CAMERA_SCRIPT, + + /** Internal use. */ + GF_ATTRIB_DEVICE_TYPE, + + /** Timeout in ms for RM IST to wait for interrupts. + Set to 0 to disable timeout, default setting is 1000 ms. + GFRmSetAttribute() parameter \a AttribData is of type NvU32 and defines timout in ms. + */ + GF_ATTRIB_INTX_TIMEOUT, + + /** Enable debug printout for GPU memory allocations. + + GFRmSetAttribute() parameter \a AttribData is of type NvU32, + - 0 means disable log (default) + - !=0 means enable log + + This GFRmSetAttribute() call always succeeds. + + @see GFRmSetAttribute() + + Attribute can be set only. + */ + GF_ATTRIB_GPUMEM_ENABLELOG + +} GF_ATTRIBUTE_TYPE; + +/** DSP2Host communication modes, polling. + @see GF_ATTRIB_DSPCOMMODE +*/ +#define GF_ATTRIB_DSPCOMMODE_POLLING 0 +/** DSP2Host communication modes, OS event synchronization. + @see GF_ATTRIB_DSPCOMMODE +*/ +#define GF_ATTRIB_DSPCOMMODE_EVENT 1 + +/** GFSDK (low-level) device interface type. (Read Only) + * @see GF_ATTRIB_DEVICE_TYPE. + **/ +#define GF_ATTRIB_DEVICE_TYPE_HARDWARE 0x00000000 +#define GF_ATTRIB_DEVICE_TYPE_SIMULATOR 0x00001000 + + +/** @name Component Types + +@{*/ + +/** Component Type: EPP Component. + @anchor ComponentTypes +*/ +#define GF_EPPAPI 0x00000001L + +/** Component Type: Gx (2D) API Component. */ +#define GF_GXAPI 0x00000002L + +/** Component Type: Vx (general Video and Video Input Port) API Component. */ +#define GF_VXAPI 0x00000003L + +/** Component Type: JxE (JPEG Encode) API Component. */ +#define GF_JXEAPI 0x00000004L + +/** Component Type: JxE (JPEG Decode) API Component. */ +#define GF_JXDAPI 0x00000005L + +/** Component Type: MxE (MPEG Encode) API Component. */ +#define GF_MXEAPI 0x00000006L + +/** Component Type: MxD (MPEG Decode) API Component. */ +#define GF_MXDAPI 0x00000007L + +// 0x8 is unused + +/** Component Type: Dx (Display and Flat Panel) API Component. */ +#define GF_DXAPI 0x00000009L + +// 0xA is unused + +/** Component Type: ISP (Image Signal Processing) API Component. */ +#define GF_ISPAPI 0x0000000BL + +/** Component Type: FDev (Pseudo File System/Device) API Component. */ +#define GF_FDEVAPI 0x0000000CL + +/** Component Type: BDevSD (SD Block Device) Component. */ +#define GF_BDEVSDAPI 0x0000000DL + +// 0xE is unused +// 0xF is unused + +/** Component Type: OSx (Operating System) API COmponent */ +#define GF_OSXAPI 0x00000010L + +/** Component Type: I2C API Component */ +#define GF_I2CAPI 0x00000011L + +/** Component Type: I2S API COmponent */ +#define GF_I2SAPI 0x00000012L + +/** Component Type: MMProc (Audio) API COmponent */ +#define GF_MMPROCAPI 0x00000013L + +/** Component Type: CAM (Camera) API Component */ +#define GF_CAMAPI 0x00000014L + +/** Component Type: 3D API Component */ +#define GF_3DAPI 0x00000015L + +/** Component Type: INTx (Interrupt) API COmponent */ +#define GF_INTXAPI 0x00000016L + +/** Component Type: MXDH264 (H264 Decoder) API COmponent */ +#define GF_MXDH264API 0x00000017L + +/** Component Type: MXEH264 (H264 Encoder) API Component */ +#define GF_MXEH264API 0x00000018L + +/** Component Type: RM (Resource Manager) Services (listed only for return status). */ +#define GF_RMAPI 0x00000019L + +/** Component Type: GxFB (Gx/2D API with Frame Buffer rendering) API. Internal Use. */ +#define GF_GXFBAPI 0x0000001AL + +/** MXDRV9 (RV9 Decoder) API COmponent */ +#define GF_MXDRV9API 0x0000001BL + +/** Component Type: MXDVC1 (VC1 Decoder) API Component */ +#define GF_MXDVC1API 0x0000001CL + +/** Component Type: MXDEMTS (MPEG TS Demux) API Component */ +#define GF_MXDEMTSAPI 0x0000001DL + +/** Component Type: Minimal ISP API Component (NvIsp) */ +#define GF_MINIMALISPAPI 0x0000001EL + +/** Component Type: NvISP API Component ID -- only used for GF_TRACE */ +#define NV_ISPAPI 0x0000001FL + +/*@}*/ + +/** NULL driver related. Internal use. */ +#define GF_USE_NULL_DRIVER 0x1 + +/** NULL driver related. Internal use. */ +#define GF_USE_HW_DRIVER 0x2 + + +/** @name Hardware Resources + @anchor HardwareResources + Flags 'hwEngineReq' in GFRmHwResourceConstraint(). (not working yet). + @see GFRmHwResourceConstraint(). +@{*/ + +/** Hardware resource flag: MPEG Decoder Engine. */ +#define GF_HWR_MPEGD 0x00000001 + +/** Hardware resource flag: JPEG Decoder is same as MPEG Decoder Engine. */ +#define GF_HWR_JPEGD 0x00000001 + +/** Hardware resource flag: MPEG Encoder Engine. */ +#define GF_HWR_MPEGE 0x00000002 + +/** Hardware resource flag: JPEG Encoder shares FrontEnd and BackEnd with JPEG Enc Engine. */ +#define GF_HWR_JPEGE 0x00000002 + +/** Hardware resource flag: Video Input Port. */ +#define GF_HWR_VIP 0x00000004 + +/** Hardware resource flag: EPP */ +#define GF_HWR_EPP 0x00000008 + + + +/** Options for GFRmHwResourceConstraint(). + (not working yet!) + @see GFRmHwResourceConstraint(). +*/ +typedef enum +{ + /** check availability and allocate hardware resource. */ + GF_HRC_ALLOCATE, + + /** free hardware resource. */ + GF_HRC_FREE, + + /** check availability of hardware resource. */ + GF_HRC_CHECK +} GF_HRC_OPTIONS; + +/*@}*/ + +/** Component ID structure. */ +typedef struct _GFRMCOMPONENTID +{ + NvU32 ComponentType; /**< Component Type, see @ref ComponentTypes. */ + GFRmChHandle CxtHandle; +} GFRMCOMPONENTID, *PGFRMCOMPONENTID; + +/* Component */ + +/* forward declaration */ +typedef struct _GFRMCOMPONENT GFRMCOMPONENT, *PGFRMCOMPONENT; + +typedef GF_HANDLE (* GFOPENFUNCTIONTYPE)(GFRmHandle pRm, GFRmChHandle); +typedef GF_RETTYPE (* GFCLOSEFUNCTIONTYPE)(GF_HANDLE *); + +/** Component Registration structure. + Internal use. + @internal +*/ +struct _GFRMCOMPONENT +{ + GFRMCOMPONENTID id; /**< Structure defining component. */ + GFOPENFUNCTIONTYPE Open; /**< Component Open callback. Called from GFRmComponentGet(). */ + GFCLOSEFUNCTIONTYPE Close; /**< Component Close callback. Called from GFRmComponentRelease(). */ +}; + + +/** @name Surface Types + @anchor SurfaceTypes + @see GFRmSurfaceAlloc(). +@{*/ + +/** Surface Type: Surface rotation orientation at 0 degree. */ +#define GF_SURFACE_ROTATE_0 0x00000000 + +/** Surface Type: Surface rotation orientation at 90 degree (relative to _ROTATE_0). */ +#define GF_SURFACE_ROTATE_90 0x10000000 + +/** Surface Type: Surface rotation orientation at 180 degree (relative to _ROTATE_0). */ +#define GF_SURFACE_ROTATE_180 0x20000000 + +/** Surface Type: Surface rotation orientation at 270 degree (relative to _ROTATE_0). */ +#define GF_SURFACE_ROTATE_270 0x30000000 + +/* + * GF_SURFACE_H_FLIP and GF_SURFACE_V_FLIP can be ORed with above 4 rotation + * options to create 16 combinations but in reality there are only 8 unique + * combinations. + */ + +/** Surface Type: Horizontal Flip. You can or'ed this flag with _ROTATE_ flag above too. */ +#define GF_SURFACE_H_FLIP 0x40000000 + +/** Surface Type: Vertical Flip. You can or'ed this flag with _ROTATE_ flag above too. */ +#define GF_SURFACE_V_FLIP 0x80000000 + +/** Surface Type: internal use. */ +#define GF_SURFACE_ROTATE_MASK 0xF0000000 + +/** Surface Type: internal use. */ +#define GF_SURFACE_PLANAR_ROTATE_MASK 0x30000000 + +/** Surface Type: internal use. */ +#define GF_SURFACE_ROTATE_SHIFT 28 // bits[31:28] + +/** Surface Type: internal use. */ +#define GF_SURFACE_ROTATE_WRAP 8 + +/** Surface Type: Primary Surface (default rotate orientation). */ +#define GF_SURFACE_PRIMARY 0x00000001 //primary surface + +/** Surface Type: Primary Surface with 0 degree rotation. */ +#define GF_SURFACE_PRIMARY_0 (GF_SURFACE_PRIMARY| GF_SURFACE_ROTATE_0) + +/** Surface Type: Primary Surface with 90 degree rotation. */ +#define GF_SURFACE_PRIMARY_90 (GF_SURFACE_PRIMARY| GF_SURFACE_ROTATE_90) + +/** Surface Type: Primary Surface with 180 degree rotation. */ +#define GF_SURFACE_PRIMARY_180 (GF_SURFACE_PRIMARY| GF_SURFACE_ROTATE_180) + +/** Surface Type: Primary Surface with 180 degree rotation. */ +#define GF_SURFACE_PRIMARY_270 (GF_SURFACE_PRIMARY| GF_SURFACE_ROTATE_270) + +/** Surface Type: Overlay Surface. */ +#define GF_SURFACE_OVERLAY 0x00000002 + +/** Surface Type: Surface to reside in embedded (video) memory. */ +#define GF_SURFACE_VIDEO_MEMORY 0x00000004 + +/** Surface Type: Surface to reside in system memory. */ +#define GF_SURFACE_SYSTEM_MEMORY 0x00000008 + +/** Surface Type: Sub primary surface (for Sub LCD). */ +#define GF_SURFACE_PRIMARY_SUB 0x00000100 //Sub primary surface + +/** Surface Type: Surface to be allocated from "share" embedded memory for + advanced use only. + Cannot be used with #GF_SURFACE_PRIMARY. + No effect with #GF_SURFACE_SYSTEM_MEMORY. +*/ +#define GF_SURFACE_SHARE 0x00001000 + +/** Surface Type: Allocate surface with pre-allocated memory handle. */ +#define GF_SURFACE_PREALLOCATED_MEM 0x00002000 + +/** Request to use new API */ +#define GF_SURFACE_NEW_API 0x01000000 + +/* + * Note: GF_SURFACE_ROTATE_ refers to caller's view of current logical + * orientation relative to Primary Surface. And Primary surface is + * always set to GF_SURFACE_ROTATE_0 even though physical LCD Display + * panel may require different physical orientation. + */ + +/*@}*/ + +/** @name Surface Hints + @anchor SurfaceHints + @see GFRmSurfaceAlloc(). +@{*/ + +/** Surface Hint: Alloc from highest possible position. */ +#define GF_SURFACE_HINT_TOP_DOWN 0x1 + +/** Surface Hint: Alloc from lowest possible position. */ +#define GF_SURFACE_HINT_BOTTOM_UP 0x2 + +/** Surface Hint: Alloc max chunck of memory. */ +#define GF_SURFACE_HINT_MAX_CHUNK 0x4 + +/** Surface Hint: Try allocations from external memory first before internal memory */ +#define GF_SURFACE_HINT_EXT_MEMORY_PREFERRED 0x8 + +/** Surface Hint: Try allocations only from external memory. */ +#define GF_SURFACE_HINT_EXT_MEMORY_ONLY 0x10 + +/** Surface Hint: Try allocations only from internal memory. */ +#define GF_SURFACE_HINT_INT_MEMORY_ONLY 0x20 + +/** Surface Hint: Alloc from embedded memory, YUV in the same contiguous memory. + Valid only for GF_SURFACE_YUV420. +*/ +#define GF_SURFACE_HINT_CONTIGUOUS_MEMORY 0x40 + +/** Surface Hint: Try allocations from internal memory first before external memory */ +#define GF_SURFACE_HINT_INT_MEMORY_PREFERRED 0x80 + +/** Surface Hint: Hints to align stride to 4 bytes - default for YUV422 */ +#define GF_SURFACE_HINT_STRIDE_ALIGN4 0x100 + +/** Surface Hint: Hints to align stride to 8 bytes */ +#define GF_SURFACE_HINT_STRIDE_ALIGN8 0x200 + +/** Surface Hint: Hints to align stride to 16 bytes */ +#define GF_SURFACE_HINT_STRIDE_ALIGN16 0x400 + +/** Surface Hint: Hints to align stride to 32 bytes */ +#define GF_SURFACE_HINT_STRIDE_ALIGN32 0x800 + +/** Surface Hint: Surface will be used for direct read by the applications */ +#define GF_SURFACE_NEED_DIRECT_CPU_READ 0x1000 + +/** Surface Hint: Surface will be used for direct write by the applications */ +#define GF_SURFACE_NEED_DIRECT_CPU_WRITE 0x2000 + +/** Surface Hint: Surface will be used for direct access by the applications + both read and write actions are allowed + */ +#define GF_SURFACE_NEED_DIRECT_CPU_ACCESS \ + (GF_SURFACE_NEED_DIRECT_CPU_READ | GF_SURFACE_NEED_DIRECT_CPU_WRITE) +/*@}*/ + +/** @name Primary surface allocation and freeing policies + @see GFRmSetAttribute(). +@{*/ + +/** Any avaliable memory. Use with GF_ATTRIB_PRIMSURF_ALLOCATION_POLICY. */ +#define GF_ATTRIB_PRIMSURF_ALLOCP_NONE 0x0 + +/** Allocate Primary surface from embedded extended memory. + Use with GF_ATTRIB_PRIMSURF_ALLOCATION_POLICY. +*/ +#define GF_ATTRIB_PRIMSURF_ALLOCP_USE_EXT_MEM 0x1 + +/** Allocate Primary surface from internal memory (SRAM). + Use with GF_ATTRIB_PRIMSURF_ALLOCATION_POLICY. +*/ +#define GF_ATTRIB_PRIMSURF_ALLOCP_USE_INT_MEM 0x2 + +/** Use with GF_ATTRIB_PRIMSURF_FREEING_POLICY. */ +#define GF_ATTRIB_PRIMSURF_FREEP_NONE 0x0 + +/** Never free, Default policy. Use with GF_ATTRIB_PRIMSURF_FREEING_POLICY. */ +#define GF_ATTRIB_PRIMSURF_FREEP_NEVER_FREE 0x0 + +/** Free when the ref count is zero. Use with GF_ATTRIB_PRIMSURF_FREEING_POLICY. */ +#define GF_ATTRIB_PRIMSURF_FREEP_FREE_ON_EMPTY 0x1 + +/** Force free. Use with GF_ATTRIB_PRIMSURF_FREEING_POLICY. */ +#define GF_ATTRIB_PRIMSURF_FREEP_FORCE_FREE 0x2 + +/*@}*/ + +/** Surface structure. + @see GFRmSurfaceAlloc(), GFRmSurfaceFree(). +*/ +typedef struct _GFRMSURFACE +{ + NvU32 width; /**< Width in pixels. */ + NvU32 height; /**< Height in lines. */ + NvU32 SurfaceType; /**< Surface type, see @ref SurfaceTypes. */ + NvU32 ColorFormat; /**< Surface color format, see @ref SurfaceTypes. */ + + NvU32 YStride; /**< Stride for RGB, YUV422 surfaces, or Y plane. */ + NvU32 UStride; /**< U plane stride */ + NvU32 VStride; /**< V plane stride */ + + GFRmMemHandle YMemHandle; /**< Opaque handle for RGB, YUV422 surface, or Y plane memory. */ + GFRmMemHandle VMemHandle; /**< Opaque handle for V plane memory. */ + GFRmMemHandle UMemHandle; /**< Opaque handle for U plane memory. */ + + NvU32 YOffset; /**< Physical address of RGB, YUV422 surfae, or Y plane. */ + NvU32 UOffset; /**< Physical address of U plane. */ + NvU32 VOffset; /**< Physical address of U plane. */ + + /* Direct addressable pointer to the memory region. Don't + use these pointers, unless you want to run only in + "direct addressing mode". Instead, use handles for reading + or writing to the memory from the host, and offsets for + programming the hardware registers. */ + + NvU8 *pY; /**< Pointer to non-planar surface or Y plane of YUV420, valid only for direct addressing. */ + NvU8 *pU; /**< for YUV420 surface, valid only for direct addressing. */ + NvU8 *pV; /**< for YUV420 surface, valid only for direct addressing. */ + + NvU32 memUsed; /**< Total number of bytes used by surfaces. */ + + //void *reserved; // Reserved. Do not modify +} GFRMSURFACE, *PGFRMSURFACE; + +/** Surface Request + @see GFRmSurfaceAlloc(), GFRmSurfaceFree(). +*/ +typedef struct _GFRMSURFACEREQUEST +{ + NvU32 width; /**< Width in pixels. */ + NvU32 height; /**< Height in lines. */ + NvU32 SurfaceType;/**< Surface type, see @ref SurfaceTypes. */ + NvU32 ColorFormat;/**< Surface color format, see @ref SurfaceTypes. */ + NvU32 hint; /**< Allocation hint or 0, see @ref SurfaceHints. */ + NvU8 *pMem; /**< Pointer to pre-allocated memory from which + to allocate the surface planes. */ + NvU32 memSize; /**< Size of pre-allocated Y plane memory. */ + NvU32 id; /**< User defined ID to track allocated block, debugging use */ + + /* Reserved for future */ + /* GF_RETTYPE (* pSurfaceCallBack) + ( GFRmHandle RmHandle, PGFRMSURFACE pSurface); */ + /* Reserved for future */ + /* PGFRMSURFACE pSurfaceShare; */ +} GFRMSURFACEREQUEST, *PGFRMSURFACEREQUEST; + +/** Device Info */ +typedef struct _GFRMDEVICEINFO +{ + NvU32 MinorRev; + NvU32 MajorRev; + NvU32 ChipID; + NvU32 Family; +} GFRMDEVICEINFO, *PGFRMDEVICEINFO; + +/** @name Surface Update Flags + @anchor SurfaceUpdateFlags + @see GFRmSurfaceUpdate() +@{*/ + +/** GFRmSurfaceUpdate() attribute type: Update surface rotation. + + The following values are valid for parameter \a data of GFRmSurfaceUpdate(): + 
      +    #GF_SURFACE_ROTATE_0
+    #GF_SURFACE_ROTATE_90
+    #GF_SURFACE_ROTATE_180
+    #GF_SURFACE_ROTATE_270
+
      + + @see GFRmSurfaceUpdate() +*/ +#define GF_SURFACE_UPDATE_ROTATE 0x00000001 + +/** GFRmSurfaceUpdate() attribute type: Update surface width. + + Meaning of parameter \a data of GFRmSurfaceUpdate(): + New surface width in pixels. + + The number of bytes required for the new width must not exceed the + surface stride. It is the responsibility of the caller to ensure this. + + @see GFRmSurfaceUpdate() +*/ +#define GF_SURFACE_UPDATE_WIDTH 0x00000002 + +/** GFRmSurfaceUpdate() attribute type: Update surface height. + + Meaning of parameter \a data of GFRmSurfaceUpdate(): + New surface height in line. + + The set height * surface stride must not exceed the memory allocated + for the surface. It is the responsibility of the caller to ensure this. + + @see GFRmSurfaceUpdate() +*/ +#define GF_SURFACE_UPDATE_HEIGHT 0x00000003 + +/** GFRmSurfaceUpdate() attribute type: Update surface width and stride. + + Meaning of parameter \a data of GFRmSurfaceUpdate(): + New surface width in pixels. + + YStride, UStride, and VStride will be updated automatically according + to alignment requirements. Supported colour formats: + - GF_SURFACE_YUV420 + + @see GFRmSurfaceUpdate() +*/ +#define GF_SURFACE_UPDATE_WIDTH_STRIDE 0x00000004 + +/*@}*/ + + +/** @name Memory types + @anchor MemoryTypes + @see GFRMMEMORYREQUEST, GFRmMemHandleAlloc() +@{*/ + +/** Memory Type: Host system memory. */ +#define GF_MEMORY_SYSTEM 0x01 +/** Memory Type: Any GPU memory */ +#define GF_MEMORY_EMBEDDED 0x02 +/** Memory Type: Memory mapped memory. */ +#define GF_MEMORY_MEMMAPPED 0x04 +/** Memory Type: External GPU memory only. */ +#define GF_MEMORY_EMBEDDED_EXT_ONLY GF_MEMORY_EMBEDDED_EXT +#define GF_MEMORY_EMBEDDED_EXT 0x08 +/** Memory Type: Internal GPU memory only. */ +#define GF_MEMORY_EMBEDDED_INT_ONLY GF_MEMORY_EMBEDDED_INT +#define GF_MEMORY_EMBEDDED_INT 0x10 +/** Memory type: Internal or external memory with preference to internal memory. */ +#define GF_MEMORY_EMBEDDED_INT_PREFERRED 0x20 +/** Memory type: External or internal memory with preference to external memory. */ +#define GF_MEMORY_EMBEDDED_EXT_PREFERRED 0x40 +/** Memory type: Direct Read access */ +#define GF_MEMORY_DIRECT_CPU_READ_ACCESS 0x80 +/** Memory type: Direct Write access */ +#define GF_MEMORY_DIRECT_CPU_WRITE_ACCESS 0x100 + +/** Memory type: Direct Read/Write access */ +#define GF_MEMORY_DIRECT_CPU_ACCESS (GF_MEMORY_DIRECT_CPU_WRITE_ACCESS | GF_MEMORY_DIRECT_CPU_READ_ACCESS) + +/*@}*/ + +/** @name Memory Share Types + @anchor MemoryShare + @see GFRMMEMORYREQUEST, GFRmMemHandleAlloc() +@{*/ + +/** Memory Share Flag: Internal use, used in GFRmMemInfo only. */ +#define GF_MEMORY_SHARE 0x80 + +/*@}*/ + +/** @name Memory Alignment + @anchor MemoryAlignment + @see GFRMMEMORYREQUEST, GFRmMemHandleAlloc() +@{*/ + +/** Memory alignment types, must match log2 of alignment size. */ +enum +{ + GF_MEMORY_ALIGN_NONE = 0, /**< Memory Alignment: Don't care. */ + GF_MEMORY_ALIGN2, /**< Memory Alignment: Aligned to 2 byte boundary. */ + GF_MEMORY_ALIGN4, /**< Memory Alignment: Aligned to 4 byte boundary. */ + GF_MEMORY_ALIGN8, /**< Memory Alignment: Aligned to 8 byte boundary. */ + GF_MEMORY_ALIGN16, /**< Memory Alignment: Aligned to 16 byte boundary. */ + GF_MEMORY_ALIGN32, /**< Memory Alignment: Aligned to 32 byte boundary. */ + GF_MEMORY_ALIGN64, /**< Memory Alignment: Aligned to 64 byte boundary. */ + GF_MEMORY_ALIGN128, /**< Memory Alignment: Aligned to 128 byte boundary. */ + GF_MEMORY_ALIGN256, /**< Memory Alignment: Aligned to 256 byte boundary. */ + GF_MEMORY_ALIGN512, /**< Memory Alignment: Aligned to 512 byte boundary. */ + GF_MEMORY_ALIGN1024, /**< Memory Alignment: Aligned to 1024 byte boundary. */ + GF_MEMORY_ALIGN2048, /**< Memory Alignment: Aligned to 2048 byte boundary. */ + GF_MEMORY_ALIGN4096, /**< Memory Alignment: Aligned to 4096 byte boundary. */ + GF_MEMORY_ALIGN_DSP = 0xFF /**< Memory Alignment: Aligned properly for DSP cacheline size. */ +}; + +/*@}*/ + +/** @name Memory Allocation Hints + @anchor MemoryHints + @see GFRMMEMORYREQUEST, GFRmMemHandleAlloc() +@{*/ +/* Memory Hint - Follow Surface Hint */ +/** Memory Allocation Hint: Allocate from high to low addresses. */ +#define GF_MEMORY_HINT_TOP_DOWN GF_SURFACE_HINT_TOP_DOWN +/** Memory Allocation Hint: Allocate from low to high addresses. */ +#define GF_MEMORY_HINT_BOTTOM_UP GF_SURFACE_HINT_BOTTOM_UP +/** Memory Allocation Hint: Allocate from maximum available chunk. */ +#define GF_MEMORY_HINT_MAX_CHUNK GF_SURFACE_HINT_MAX_CHUNK +/** Memory Allocation Hint: Allocate at fixed address. */ +#define GF_MEMORY_HINT_FIXED (GF_MEMORY_HINT_MAX_CHUNK << 1) +/** Memory Allocation Hint: Allocate for 3D. */ +#define GF_MEMORY_HINT_3D (GF_MEMORY_HINT_MAX_CHUNK << 2) + +/* These options are for DRAM as extended memory. This option specifies + * bank the buffer should come from. This will avoid + * bank clobbering between two buffers that are accessed in lock + * step. + */ + +/** Memory Allocation Hint: Allocate from even banks in external memory. */ +#define GF_MEMORY_HINT_EVEN_BANK (GF_MEMORY_HINT_MAX_CHUNK << 3) +/** Memory Allocation Hint: Allocate from odd banks in external memory. */ +#define GF_MEMORY_HINT_ODD_BANK (GF_MEMORY_HINT_MAX_CHUNK << 4) +/*@}*/ + +/** Memory allocation request. + @see GFRmMemHandleAlloc() +*/ +typedef struct _GFRMMEMORYREQUEST +{ + NvU32 length; /**< Size in bytes. */ + NvU32 hint; /**< Allocation hint or 0, see @ref MemoryHints. */ + struct + { + NvU16 type; /**< Memory type, see @ref MemoryTypes. */ + NvU8 share; /**< Share flags or 0, see @ref MemoryShare. */ + NvU8 align; /**< Alignment flags, see @ref MemoryAlignment. */ + } + flag; + NvU32 id; /**< User defined ID to track allocated block, debugging use */ +} GFRMMEMORYREQUEST, *PGFRMMEMORYREQUEST; + +/** OS Critical Section bits 0-15 are general purpose use +bit 16-31 are for internal use */ +#define GF_CRITICAL_SECTION_HW 0x00000001 +/** RM internal use */ +#define GF_CRITICAL_SECTION_SW2 0x00000004 +/** RM internal use */ +#define GF_CRITICAL_SECTION_SW4 0x00000010 +/** I2C critical section */ +#define GF_CRITICAL_SECTION_I2C 0x00000020 +/** RM All channel lock, internal use */ +#define GF_CRITICAL_SECTION_ALL_CHANNELS 0x00000040 + +/** Ix internal use */ +#define GF_CRITICAL_SECTION_SW8 0x00000100 + +/** RM DSP to Host communication, internal use */ +#define GF_CRITICAL_SECTION_D2H 0x00000200 + +/** The SHUTDOWN_DSP lock protects the race between + * UpdateDSPFreq/DSPDisable and HandleInterrupt (IST). + * (Update and DSPDisable turn off the DSP, HandleInt reads + * DSP regs) + */ +#define GF_CRITICAL_SECTION_SHUTDOWN_DSP 0x00000400 +/** The DSP lock protects the race between + * AddTask and RemoveTask. + */ +#define GF_CRITICAL_SECTION_DSP 0x00000401 + +/** Define the ID for the kernel semaphore */ +#define GF_DSP_KERNEL_SEM_ID 0x0CAFEFAD + +/** Shared memory lock - used for internal purposes */ +#define GF_CRITICAL_SECTION_SHM 0x00000800 + +/** RM Host to DSP communication, internal use */ +#define GF_CRITICAL_SECTION_H2D 0x00001000 + +/** Rm internal use: lock for channel structures */ +#define GF_CRITICAL_SECTION_CHSTRUCT 0x00004000 + +/** Dx internal use */ +#define GF_CRITICAL_SECTION_DX 0x00008000 + +/** Vx internal use */ +#define GF_CRITICAL_SECTION_VX 0x00000080 + +#ifdef PROJECT_SEC_G1 +/** JxDec internal use */ +#define GF_CRITICAL_SECTION_JXDEC 0x00002000 +#endif + +/** Rm internal use: lock for DSP messages */ +#define GF_CRITICAL_SECTION_DSPMSG_MIN 0x00010000 +#define GF_CRITICAL_SECTION_DSPMSG_MAX 0x20000000 + +/** Audio Shared Memory lock - used for multiprocess OS */ +#define GF_CRITICAL_SECTION_SWAUDIO 0x10002000 + +/** Maximiun id */ +#define GF_CRITICAL_SECTION_SWMAX 0x00010000 + +/** OS IRQ Callback */ +typedef void (* GFRMOSIRQCALLBACK)( void *pData ); + +struct _GFRMCOMMONSTRUCT; +struct _GFRMENVIRONMENTVARIABLES; +struct _GFRMEXTDATASTRUCT; + +/** Definition of Ix powerplane operations + */ +typedef enum _GFIX_POWERPLANE_OP_TYPE + { + GFIX_POWERPLANE_OP_ENABLE = 0, + GFIX_POWERPLANE_OP_DISABLE, + GFIX_POWERPLANE_OP_QUERY +} GFIX_POWERPLANE_OP_TYPE; + +/** Configuration structure that may be passed to GFRmOpen(). + See GFRmOpen() for details. +*/ +typedef struct _GFRMOPENSTRUCT +{ + NvU32 isFirstProcess; + NvU32 isDeviceMapped; + GF_RETTYPE retStatus; //!< Return error reason code, in case GFRmOpen() fails + + /** Declare which driver HW or NULL driver to use. + This is for GFSDK compiled for NULL driver case. + */ + NvU32 useDriver; +} GFRMOPENSTRUCT; + +/** @name Interface Manager Returned Functions +@{*/ + +/** Write a 32-bit register in the device. + + @param base I/O base address + @param offset Offset of register + @param data Data to write + */ +typedef void (*GF_FUNC_WRITE_32BIT)(void * base, NvU32 offset, NvU32 data); + +/** Read a 32-bit register in the device. + + @param base I/O base address + @param offset Offset of register + + @retval #NvU32 register value + */ +typedef NvU32 (*GF_FUNC_READ_32BIT)(void * base, NvU32 offset); + +/*@}*/ + +/** Interface Options for Read/Write Embedded FIFO (for Jx/Mx APIs) */ +#define GF_EMBFIFO_SWAP_BYTE 0x00000001 +#define GF_EMBFIFO_SWAP_WORD 0x00000002 + +/** Interface FIFO flags */ +/** Front-End FIFO */ +#define GF_FIFO_FEND 0x00000001 +/** GE (2D/Primary) FIFO */ +#define GF_FIFO_SRC 0x00000002 + +/** Interface Helper macro to generate Address Pointer */ +#define GFMAKEADDR(base, offset) (void *)base, offset + +/** Utility Debug Flag */ +#define GF_DEBUG_DEFAULT 0 + +/** 4th argument for GFRmOSGetTickCount */ +#define GF_USEC_TICKS 0 +#define GF_MSEC_TICKS 1 +#define GF_SEC_TICKS 2 + +/** Flags for the Context manager GF_CTX_DEFAULT, GF_CTX_NEW */ +#define GF_CTX_DEFAULT 1 +#define GF_CTX_NEW 2 +#define GF_CTX_SHARED 3 + +/* + ######################################################################## + * Function Prototypes for GFSDK Resource Manager (RM) Services + ######################################################################## + */ + +/* Object Manager */ + +/** GFRmOpen - Starts Resource Manager and GFSDK. + + @param RmOpenHandle Must be NULL. + @return Resource manager handle, or NULL on failure. + + This must be called prior using any GFSDK component APIs and RM services. + This function can be called multiple times, for each successfull call + the application must also call GFRmClose(). + + If this function fails, and a pointer to an open structure is passed in + \a RmOpenHandle, the a failure reasoncode will be returned in GF_OPEN_RETTYPE::retStatus. +*/ +GFRmHandle GFRmOpen(GFRMOPENSTRUCT *RmOpenHandle); + +/** GFRmClose - Ends Resource Manager and GFSDK. + + @param pRmHandle Ptr to RmHandle to be closed. + @retval GF_RETTYPE #GF_SUCCESS if successful.
      + #GF_ERROR on error.
      + + All GFSDK resources will be freed related to this process. + Calls to GFRmOpen are reference counted, GFDSK will be closed only for + the last call to this function. + */ +void GFRmClose(GFRmHandle *pRmHandle); + +/** GFRmCleanUp - Frees resources allocated to a terminated Resource Manager session. + + @param RmProcessID RM Process ID to clean up after. + @retval GF_RETTYPE #GF_SUCCESS if successful.
      + #GF_ERROR on error.
      + + All GFSDK resources will be freed related to this + process. + */ +GF_RETTYPE +GFRmCleanUp( GFRmHandle RmHandle, NvU32 RmProcessID ); + +// FIXME: ripped off from the API doc. GFRmRecover is not implemented as of +// yet - there's null implementation in GFRmObj.c. +/** GFRmRecover - Handles ESD failures. + + @param RmHandle The handle to the Resource Manager. + @param option + @retval GF_RETTYPE #GF_SUCCESS if successful.
      + #GF_ERROR on error.
      + + This function is used to recover from an ESD (electrostatic discharge) + failure. If the system software finds that the GoForce processor is not + responding, the software uses the CPU GPIO to reset the GoForce processor + and then calls this function. GFRmRecover() only calls Recover() + functions of registered components. For example, the GFDxAPI and GFGxAPI + have registered Recover() functions that can bring the GoForce processor + back from the reset to normal working mode. + */ +GF_RETTYPE +GFRmRecover( GFRmHandle RmHandle, NvU32 option ); + +/** GFRmGetProperty - Returns properties of RM. + + @param pRmProp Caller passes ptr to GFPROPERTY that will be filled + upon return. + + @retval #GF_SUCCESS if successful. + */ +GF_RETTYPE +GFRmGetProperty( GFRmHandle RmHandle, + GFPROPERTY *pRmProp ); + +/** GFRmSetAttribute - Sets RM attribute. + + @param AttribType Attribute to get of type #GF_ATTRIBUTE_TYPE. + @param AttribData Data specific to AttribType. + + @retval #GF_SUCCESS if successful. + */ +GF_RETTYPE +GFRmSetAttribute(GFRmHandle RmHandle, + GF_ATTRIBUTE_TYPE AttribType, + NvU32 AttribData); + +/** GFRmGetAttribute - Gets RM attribute. + + @param AttribType Attribute to get of type #GF_ATTRIBUTE_TYPE. + @param AttribData Data specific to AttribType. + See GF_ATTRIBUTE_TYPE for interpretation. + May pass input and/or output parameters. + + @retval #GF_SUCCESS if successful. + */ +GF_RETTYPE +GFRmGetAttribute(GFRmHandle RmHandle, + GF_ATTRIBUTE_TYPE AttribType, + NvU32 *pAttribData); + +/** Claim or release a hardware resource. + + The GoForce GPU has a few hardware engines which are used by + different component API. If a component API is using that hardware + engine, then other API component should not be allowed to use that + engine. For example we have MPEG Decoder engine in the hardware which + is used by GFMxDecAPI and GFJxDecAPI components. If one of the API is + using MPEGD Engine and app/system software tries to use other engines, + it should not be allowed. + For SC4/SC5/SC10/SC12 GPU, we have following constraints: + GFMxDecAPI MPEGD, optional Auto Trigger SB + GFJxDecAPI MPEGD, optional Auto Trigger SB + Both of these component API share same engine so we should only allow + one component to be opened at a time. + + GFMxEncAPI MPEGE, EPP (planar converter) + GFJxEncAPI JPEGE, EPP (planar converter) + Both of these component API share same fron-end planar converter so we + should only allow one component to be opened. + + StetchBlt is represented by VxBlt(). SB has one context where auto + trigger SB can be set. Manual SB command uses same context for manual + command and then restores the auto context. + There is no need to check for manual VxBlt(). + Autotrigger need checking but it is difficult to check in the VxBlt() + function. + + This function only deals with Component level constraints. + Constraint checking can be enabled if GF_ATTRIB_HW_RESOURCE_CONSTRAINT. + + @param RmHandle Handle to the resource manager. + @param options Action code + @param hwEngineReq Flag bitmask specifying 0 or more HW engines, see @ref HardwareResources + + @retval GF_SUCCESS Hardware resource is available. + @retval GFRM_ERROR_HWRESOURCE_NOT_AVAILABLE Hardware resource is not available. + @retval GFRM_ERROR_BAD_PARAMETER Bad parameters passed +*/ +GF_RETTYPE +GFRmHwResourceConstraint( GFRmHandle RmHandle, + GF_HRC_OPTIONS options, + NvU32 hwEngineReq ); + +/* Context Manager */ + +/** GFRmContextGet - Retrieves either a default or new context. + + @param RmHandle Handle to the resource manager. + @param flags #GF_CTX_DEFAULT or #GF_CTX_NEW + @param pContext Pointer to the retreived context. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + */ +GF_RETTYPE +GFRmContextGet( GFRmHandle RmHandle, + NvU32 flags, + GFRmChHandle *pContext); + +/** GFRmChFree - Free a channel (same thing as a context). + + @param hRm Resource manager handle. + @param phCh Pointer to the channel handle. + + @see GFRmContextGet + */ +void GFRmChFree(GFRmHandle hRm, GFRmChHandle *phCh); + + +/* Component Manager */ + +/** GFRmComponentRegister - Register Component with Resource Manager + + @param pComponent Ptr to component to be registerd. + @param RegisterState Parameter of type GF_STATE_TYPE. + Usually, GF_STATE_REGISTER is passed. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + + */ +GF_RETTYPE +GFRmComponentRegister( GFRmHandle RmHandle, + GFRMCOMPONENT *pComponent, + GF_STATE_TYPE RegisterState ); + +/** GFRmComponentGet - Gets a registered component, associated with the passed + context. + + @param ComponentType Desired component type. + @param state Parameter of type #GF_STATE_TYPE. + @param pComponent Ptr to Handle to component available. + NULL if not available. + @param hCh Context Handle. Can be allocated by a call to + #GFRmContextGet function. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + + Depending on the requested state, a newly instantiated component or + a shared component is returned. GF_STATE_DEFAULT is the default option + for the state parameter. If the hCh passed is NULL, then a default + context is associalted with the component. + + */ +GF_RETTYPE +GFRmComponentGet(GFRmHandle hRm, + NvU32 ComponentType, + GF_HANDLE *pComponent, + GF_STATE_TYPE state, + GFRmChHandle hCh); + +/** GFRmComponentRelease - Releases the specified component handle. + + @param hRm Handle to the resource manager. + @param phComponent Pointer to component handle to be released. + + The handle pointed to by phComponent will be cleared to NULL as a side + effect of calling this function. Also, this function has no effect if + the handle pointed to by phComponent is already NULL, so it is not + necessary to check whether a component handle is NULL before releasing it. + */ +void GFRmComponentRelease(GFRmHandle hRm, GF_HANDLE *phComponent); + +/* Surface Manager */ + +/** GFRmSurfaceAlloc - Allocate a Surface without synchronization. + + @param pSurfaceReq Pointer to surface request structure #GFRMSURFACEREQUEST. + @param ppSurface Pointer to surface pointer. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + @retval #GF_OUT_OF_MEMORY when low on memory. + */ +GF_RETTYPE +GFRmSurfaceAlloc( GFRmHandle RmHandle, + GFRMSURFACEREQUEST *pSurfaceReq, + PGFRMSURFACE *ppSurface ); + +/** GFRmSurfaceFree - Frees an allocated surface. + + @param ppSurface Pointer to surface pointer. + + *ppSurface is cleared to NULL. + */ +void +GFRmSurfaceFree(GFRmHandle hRm, + PGFRMSURFACE *ppSurface); + +/** GFRmSurfaceQueryPrimaryInfo - Make a query on Primary Surface. + + @param ppSurface Pointer to Primary surface pointer. + @param pRotate Ptr to current Rotation orientation. + @retval GF_RETTYPE #GF_SUCCESS on success. + #GF_ERROR on error. + + Returned surface pointer is for quick reference only and is a + pointer to transient structure. In other words, this will not + increment the reference count as GFRmSurfaceAlloc does. + */ +GF_RETTYPE +GFRmSurfaceQueryPrimaryInfo( GFRmHandle RmHandle, + PGFRMSURFACE *ppSurface, + NvU32 *pRotate, + NvU32 subSurfaceType ); + +/** Update surface attributes. + + @param ppSurface Pointer to Primary surface pointer. + @param type Type of attribute to update: + + + + +
      #GF_SURFACE_UPDATE_ROTATESet surface rotation
      #GF_SURFACE_UPDATE_WIDTH Set surface width
      #GF_SURFACE_UPDATE_HEIGHTSet surface height
      + @param data Data specific to the type. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + + Currently only one update flag is defined #GF_SURFACE_UPDATE_ROTATE + + */ +GF_RETTYPE +GFRmSurfaceUpdate( GFRmHandle RmHandle, + PGFRMSURFACE pSurface, + NvU32 type, + NvU32 data ); + +/* Memory Manager */ + +/** Allocate a linear piece of internal memory block. + + @param pMemoryReq Pointer to Memory Request struct #GFRMMEMORYREQUEST. + @param pMemHandle A Pointer to the memory handle. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + */ +GF_RETTYPE +GFRmMemHandleAlloc(GFRmHandle RmHandle, + GFRMMEMORYREQUEST *pMemoryReq, + GFRmMemHandle *pMemHandle ); + +/** Frees an allocated internal memory block. + + @param phMem A Pointer to the memory handle. + */ +void +GFRmMemHandleFree(GFRmHandle hRm, + GFRmMemHandle *phMem); + +/** Current memory info. Only supports embedded memory. + + @param pTotalFree Pointer to NvU32 holding total free memoory available. + @param flag Type of memory. Can be one the + #GF_MEMORY_EMBEDDED + #GF_MEMORY_EMBEDDED_EXT + #GF_MEMORY_EMBEDDED_INT + @param pMaxChunk Size of the max chunk. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + + GF_MEMORY_EMBEDDED returns the free memory available in both internal + and external memory. + */ +GF_RETTYPE +GFRmMemInfo (GFRmHandle RmHandle, + NvU32 *pTotalFree, + NvU32 *pMaxChunk, + NvU32 flag ); + + +/** Get an handle for the entire internal memory. Used for debugging purposes + only. +*/ +GFRmMemHandle GFRmMemGetIntMemHandle(GFRmHandle RmHandle); + +/** Get an handle for the entire external memory. Used for debugging purposes + only. +*/ +GFRmMemHandle GFRmMemGetExtMemHandle(GFRmHandle RmHandle); + +/** Handle to offset(sc15 view of hw address) conversion. + */ +NvU32 GFRmMemGetOffset(GFRmMemHandle hMem); + +/** Handle to DSP offset(DSP address address map) conversion. + */ +NvU32 GFRmMemGetDSPOffset(GFRmMemHandle hMem); + +/** Handle to virtual address conversion. + + Returned pointer cannot be dereferenced excpet in direct + addressing mode. + */ +void *GFRmMemGetPointer(GFRmMemHandle hMem); + +/** Get the DSP address with a particular caching attribute for a given memory + handle. + */ +NvU32 GFRmMemGetUncachedDSPAddr(GFRmMemHandle hMem); +NvU32 GFRmMemGetWriteBackDSPAddr(GFRmMemHandle hMem); +NvU32 GFRmMemGetWriteThroughDSPAddr(GFRmMemHandle hMem); + +/** Memory Handle reverse lookup from offset. + + This can be used only for the embedded memory. + */ +GF_RETTYPE +GFRmMemOffsetToHandle(GFRmHandle RmHandle, NvU32 offset, GFRmMemHandle *MemHandle); + +/** Converts offset to virtual address. + + @param offset Hardware offset as seen by the SCxx chip. + @param ppMemory Pointer to Virtual address. + + */ +GF_RETTYPE +GFRmMemOffsetToVirt(GFRmHandle RmHandle, NvU32 offset, void **ppMemory); + +/** Converts virtual to offset (SCxx hw view) + + @param offset Hardware offset SCxx view. + @param ppMemory Virtual address. + */ +GF_RETTYPE +GFRmMemVirtToOffset(GFRmHandle RmHandle, void *ppMemory, NvU32 *offset); + +/** Test if the memory offset is from external memory. + + Returns NV_TRUE if the offset is comming from + external memory, otherwise NV_FALSE. + */ +NvBool +GFRmIsExternalMemoryOffset(GFRmHandle RmHandle, + NvU32 offset); + +/** Test if the memory handle is from external memory. + + Returns NV_TRUE if the handle is comming from + external memory, otherwise NV_FALSE. + */ +NvBool +GFRmIsExternalMemoryHandle(GFRmHandle RmHandle, + GFRmMemHandle memhandle); + +/** Test if the memory offset is valid. + @return NV_TRUE if valid, or NV_FALSE otherwise. + */ +NvBool GFRmIsMemoryOffsetValid(GFRmHandle hRm, NvU32 Offset); + +/** Test for bufferoverflows in allocated GPU memory. + This does nothing for release builds. In GFSDK debug build + each GPU memory block will be guarded by leading and trailing + 8 byte marker sequences: + 
      +    Start of block: 0x0D,0xF0,0xAD,0xDE,0x0D,0xF0,0xAD,0xDE
+    End   of block: 0xDE,0xAD,0xFO,0xOD,0xDE,0xAD,0xFO,0xOD
+
      + This call checks if these guard markers have been overwritten + @return Index of corrupted memory block, or -1 if all are ok. +*/ +int GFRmMemEmbVerify(GFRmHandle RmHandle); + +/* CPU bound memory fill functions: + These functions will use CPU cycles to write 16 to 32-bit fixed data + pattern into GPU memory. These API's will use user specified channel + apperture to access memory directly and are equipped with Lock and Unlock + routines to be thread safe. +*/ + +/** Fill memory with fixed data pattern on a particular channel. + Function locks and unlocks the channel automatically. + @param ChHandle User-specified channel to use. + @param memHandle GPU memory handle to write fixed 32-bit data. + @param offset Byte offset relative to memHandle block, + must be 32-bit aligned. + @param fill 32-bit fixed data pattern. + @param words Number of DWORDs to write. +*/ +void +GFRmChMemFill32(GFRmChHandle ChHandle, GFRmMemHandle memHandle, NvU32 offset, + NvU32 fill, NvU32 words); + +/** Fill memory with fixed data pattern on a particular channel. + Function locks and unlocks the channel automatically. + @param ChHandle User-specified channel to use. + @param memHandle GPU memory handle to write fixed 16-bit data. + @param offset Byte offset relative to memHandle block, + must be 32-bit aligned. + @param fill 16-bit fixed data pattern. + @param words Number of DWORDs to write. +*/ +void +GFRmChMemFill16(GFRmChHandle ChHandle, GFRmMemHandle memHandle, NvU32 offset, + NvU16 fill, NvU32 words); + +/** Save/Restore functions - These functions Save embedded memory to system memory. + * This memory can then be restored back to sys mem when required. These functions + * are used during DeepPowerDown. + */ +GF_RETTYPE GFRmSaveMemory(GFRmHandle pRm, + void *sysMemPtr, + NvU32 memSize); + +GF_RETTYPE GFRmRestoreMemory(GFRmHandle pRm, + void *sysMemPtr, + NvU32 memSize); + +/* Linear video memory functions: + + These functions are used for transferring system memory to video memory, + filling video memory, and video memory to video memory operations. These + set of functions use the "1d" engine in hardware. All operations use + channels and will be synchronized with other commands. Optionally each + operation can be passed a flag to insert a "clear/raise/wait" sequence + which will guarantee that the operation has completed before processing + more commands in the command stream. For example, if a texture is being + downloaded, it is useful that the download be complete prior to some other + engine (3d maybe) using this memory. + + Prior to using functions, the 1d engine must be enabled. Disabling + will cause the channel passed in to be idled. This is required by hardware + so that the command processors state can be updated when the 1d engine + has its clock disabled and put into reset. + +*/ + + +/** Callback prototype for GFRmChLinearSetDMACallback(). */ +typedef void (*GF_FUNC_DMA_CALLBACK)(void *dstAddr, void *srcAddr, NvU32 lengthInWords); + +/** Setup an DMA callback for downloading data to SRAM. + * + * This function allows for the user to to setup a DMA callback when + * downloading code to the frame buffer. + * + * The callback function should return AFTER all data has been transferred to + * the device. The downloader writes all data to the framebuffer through + * the registered frame buffer window. This window is 4KBytes in length, + * so there will be a callback once for each 4Kbytes (or less to handle alignment + * constraints). + * + * Also, it is possible for downloads to be occuring on multiple channels + * concurrently, which means that this Callback function must be able to + * handle calls from different threads, and do whatever arbitration is required. + * + * For indirect addressing modes, inside the GFSDK a semaphore will be taken + * and held for the duration of this transaction, as multiple threads cannot + * access the device concurrently when using an indirect addressing model. + * + * @param ChHandle The channel that will be used for the download (channel aperture is used) + * @param dmaCallback Pointer to the callback function that is called to do the download + */ +GF_RETTYPE +GFRmChLinearSetDMACallback(GFRmChHandle ChHandle, + GF_FUNC_DMA_CALLBACK dmaCallback); + +/** Flag for GFRmChLinearSysToVidMemcpy(): use a clear/raise/wait. */ +#define GF_RM_LINEAR_USE_CRW 0x01 + +/** Flag for GFRmChLinearSysToVidMemcpy(): don't synchronize with channel's pushbuffer. */ +#define GF_RM_LINEAR_NO_PB_SYNC 0x02 + +/** Enable 1D engine for GFRmChLinear* functions. + * + * Call before using any GFRmChLinear* function. This enables the hardware that is + * used for these functions. Internally there is a reference count, so it is safe + * to call this multiple times. + * + * @param ChHandle Any valid channel handle should work. + * @see GFRmChLinearDisable() + */ + +GF_RETTYPE +GFRmChLinearEnable(GFRmChHandle ChHandle); + + +/** Disable 1D engine for GFRmChLinear* functions. + * + * When the internal reference count reaches zero, the accelerator's clocks will be turned + * off to save power + * + * @param ChHandle Any valid channel should work. + * @see GFRmChLinearEnable() + */ + +GF_RETTYPE +GFRmChLinearDisable(GFRmChHandle ChHandle); + + + +/** Downloads a system memory buffer to the GPU memory buffer. + * + * The main reason for using this is that + * the copy to video memory is serialized with other operations. A typical use would be something + * like: 3d-driver issues draw commands that use a texture. 3d-driver issues a clear/raise/wait to + * know when draw is complete. 3d-driver issues a download to update the texture. + * + * @param pCtx : Current context (channel) + * @param memHandle : Handle returned from the memory allocator + * @param dstOffset : Offset from the beginning of the block referenced in memHandle + * @param pSrc : Source memory address in system memory + * @param len : Length in bytes to copy + * @param flags : Flags to optionally modify copy behavior + * + * flags can be one of: + * + * GF_RM_LINEAR_USE_CRW -- use a clear/raise/wait to make the operation finish prior to other command + * in the command stream being executed. + * GF_RM_LINEAR_NO_PB_SYNC -- This means the download does not need to be synchronous with the pushbuffer + * and the RM can optionally use different more efficient path + * than the pushbuffer. + * + * @return Returns GF_SUCCESS on success + */ +GF_RETTYPE +GFRmChLinearSysToVidMemcpy(GFRmChHandle pCtx, + GFRmMemHandle memHandle, + NvU32 dstOffset, + void *srcPtr, + NvU32 bytes, + NvU32 flags); + +/** Fills a region of GPU memory with a constant value, by memory handle. + * + * @param ctx Current context (or channel) + * @param memHandle Handle to the memory to fill + * @param dstOffset Offset inside the memory handle + * @param data32 The value being replicated in memory. This value is + * interpreted differently depending on the align parameter. + * if align==4 all of data32 is used + * if align==2 lower 16-bits of data32 is used + * if align==1 lower 8-bits of data32 is used + * + * @param bytes Number of bytes to fill + * @param align must 1,2,4 + * @param flags Can be 0 or GF_RM_LINEAR_USE_CRW + */ +GF_RETTYPE +GFRmChLinearVidMemFill(GFRmChHandle ctx, + GFRmMemHandle memHandle, + NvU32 dstOffset, + NvU32 data32, + NvU32 bytes, + NvU32 align, + NvU32 flags); + +/** Copies memory within GPU memory, by memory handle. + * + * @param ctx The channel handle + * @param dstMemHandle memory handle returned from memalloc + * @param dstOffset Offset from the beginning of dstMemHandle + * @param srcMemhandle memory handle of the src memory + * @param srcOffset Offset from the beginning of srcMemHandle + * @param bytes Number of bytes to be copied. + * @param flags Must be 0 or GF_RM_LINEAR_USE_CRW + * + */ +GF_RETTYPE +GFRmChLinearVidMemcpy(GFRmChHandle ctx, + GFRmMemHandle dstMemHandle, + NvU32 dstOffset, + GFRmMemHandle srcMemHandle, + NvU32 srcOffset, + NvU32 bytes, + NvU32 flags); + + +/** @name OS Manager +@{*/ + +/** Enter Critical section, extended version. + @param id GF_CRITICAL_SECTION_xxx + */ +void GFRmOSEnterCSExt(GFRmHandle hRm, NvU32 id); + +/** Exit Critical section, extended version. + @param id GF_CRITICAL_SECTION_xxx + */ +void GFRmOSExitCSExt(GFRmHandle hRm, NvU32 id); + +/** Enter Hardware Access Critical section. + */ +void GFRmOSEnterCS(GFRmHandle hRm); + +/** Exit Hardware Access Critical section. + */ +void GFRmOSExitCS(GFRmHandle hRm); + +/** Waits for some number of milliseconds. + @param msec Number of milliseconds to wait. + */ +void GFRmOSWaitMSec(NvU32 msec); + +/** Get the current OS tick counter. + @return Low 32 bits of millisecond counter. +*/ +NvU32 GFRmGetTickCountMSec(void); + +/** Get the current OS tick counter. + + NOTE: This function is NOT guaranteed to exist on all + platforms. Drivers should NOT call this function; it's + meant only for benchmarking. + + @return 64 bit microsecond counter. + */ +NvU64 GFRmGetTickCountUSec(void); + +/** Waits for a keypress with a timeout, and returns the key. + + @param timeOutMSec (NvU32) Milliseconds to wait for the keypress. + @retval (int) The code for the key, or zero if we timed out. + */ +int GFRmWaitKey(NvU32 timeOutMSec); + +/*@}*/ + +/** @name Read/Write functions + + We provide APIs to read and write GPU registers and memory, independent of + which bus addressing mode is in use (direct or indirect, 16 or 32). + + WARNING: These functions are not safe in all cases. + 1. They do not take into account handshake mode. With fixed timings it may + be unsafe, for example, to use GFRmMemRd/Wr32 to access external memory. + 2. They do not take into account limitations on the # of address bits. On + some direct addressing platforms, not all the address bits are wired up, + so it is impossible to directly access all of memory. For example, it + may be unsafe to use GFRmMemRd/Wr32 to access external memory. + 3. Some buses do not have full byte enable support. It is possible that + GFRmMemWr08, for example, may clobber the other byte in the word. + + It is believed that the first two pitfalls only apply to external memory. + You can probably use these APIs safely to access internal memory, subject to + caveat (3) (i.e. you should stick to 16-bit or 32-bit writes). For external + memory, "use at your own risk." + +@{*/ + +/** Read or write an 8-, 16-, or 32-bit register in the device. */ +NvU8 GFRmRegRd08(GFRmHandle hRm, NvU32 offset); +NvU16 GFRmRegRd16(GFRmHandle hRm, NvU32 offset); +NvU32 GFRmRegRd32(GFRmHandle hRm, NvU32 offset); +void GFRmRegWr08(GFRmHandle hRm, NvU32 offset, NvU8 data); +void GFRmRegWr16(GFRmHandle hRm, NvU32 offset, NvU16 data); +void GFRmRegWr32(GFRmHandle hRm, NvU32 offset, NvU32 data); + +/** Read or write 8, 16, or 32 bits of data to a given offset in a block of memory. + Offset is relative to the memory handle AND not the absolute one. + */ +NvU8 GFRmMemRd08(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset); +NvU16 GFRmMemRd16(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset); +NvU32 GFRmMemRd32(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset); +void GFRmMemWr08(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, NvU8 data); +void GFRmMemWr16(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, NvU16 data); +void GFRmMemWr32(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, NvU32 data); + +/** Read or write a region of a block of memory. Size is in bytes */ +void GFRmMemRead(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, + void *pDst, NvU32 size); +void GFRmMemWrite(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, + const void *pSrc, NvU32 size); + +/** Fill a block of memory with a given 8-, 16-, or 32-bit word. Size is in words, not bytes */ +void GFRmMemFill08(GFRmHandle hRm, GFRmMemHandle hMem, + NvU32 offset, NvU32 size, NvU8 data); +void GFRmMemFill16(GFRmHandle hRm, GFRmMemHandle hMem, + NvU32 offset, NvU32 size, NvU16 data); +void GFRmMemFill32(GFRmHandle hRm, GFRmMemHandle hMem, + NvU32 offset, NvU32 size, NvU32 data); + +/** Write to a FIFO in the chip. */ +void GFRmFifoWrite(GFRmHandle hRm, const void *srcPtr, + NvU32 dstOffset, NvU32 sizeIn32bits); + +/** Waits for the host to idle. + + @retval GF_SUCCESS on success + @retval GF_ERROR on error +*/ +GF_RETTYPE +GFRmWaitForHostIdle( GFRmHandle RmHandle ); + +/*@}*/ + +/** Dispatch DSP2Host messages. + + This function can be called from an IST in response to the DSP2Host + interrupt. It will perform the following sequence: + + - read the DSP2Host message from the DSP2Host registers, i.e. GFRmGetMessage() + - identify DSP task from the task ID in message parameter 0 + - add the message to that task's queue + - set an event registered with that task to notify it about the new message + - clear DSP2Host interrupt register, i.e. GFRmClearDspCommInterrupt() + + If the task ID from the message is unknown, the interrupt is still cleared, + but the message is ignored. + + @param ChHandle Channel to use, should be the protected channel (GF_PROTECTED_CHANNEL) + @return Returns the DSP task ID the received message belonged to, or 0 if unknown +*/ +NvU32 GFRmDispatchMessage(GFRmChHandle ChHandle); +NvU32 GFRmDispatchMessageDual(GFRmChHandle ChHandle, NvU32 dspModule); + +/** Descriptor for circular buffer in DSP memory. + This structure is intended for shared use between DSP tasks. + + If GF_RM_DSP_CBUFFER::wr == GF_RM_DSP_CBUFFER::rd, the circular buffer is empty. + If GF_RM_DSP_CBUFFER::wr != GF_RM_DSP_CBUFFER::rd, the buffer contains + (wr>=rd)?wr-rd:size+wr-rd bytes of data, starting at offset rd, wrapping on the buffer end. +*/ +typedef struct _GFRM_DSP_CIRCBUFFER +{ + NvU8* adr; //!< buffer address, DSP address space in GPU memory + NvU32 size; //!< Buffer size in bytes + NvU32 wr; //!< Current write offset relative to buffer address + NvU32 rd; //!< Current read offset relative to buffer address + NvU32 userData[4]; //!< User defined, specific depending on usage + +} GF_RM_DSP_CIRCBUFFER; + + +/* + * Pins that can be used as GPIOs once the corresponding module + * has been enabled + */ +typedef enum { + + /* SD PINS */ + GPIO_SD_PIN_DATA0 = 1, + GPIO_SD_PIN_DATA1, + GPIO_SD_PIN_DATA2, + GPIO_SD_PIN_DATA3, + GPIO_SD_PIN_CLK, + GPIO_SD_PIN_CMD, + GPIO_SD_PIN_SDGP0, + GPIO_SD_PIN_SDGP1, + + /* VI PINS */ + GPIO_VI_PIN_VD0, + GPIO_VI_PIN_VD1, + GPIO_VI_PIN_VD2, + GPIO_VI_PIN_VD3, + GPIO_VI_PIN_VD4, + GPIO_VI_PIN_VD5, + GPIO_VI_PIN_VD6, + GPIO_VI_PIN_VD7, + GPIO_VI_PIN_VD8, + GPIO_VI_PIN_VD9, + GPIO_VI_PIN_VD10, + GPIO_VI_PIN_VD11, + GPIO_VI_PIN_VSCK, + GPIO_VI_PIN_VHS, + GPIO_VI_PIN_VVS, + GPIO_VI_PIN_VGP0, + GPIO_VI_PIN_VGP1, + GPIO_VI_PIN_VGP2, + GPIO_VI_PIN_VGP3, + GPIO_VI_PIN_VGP4, + GPIO_VI_PIN_VGP5, + GPIO_VI_PIN_VGP6 + +} GFGPIOPin; + +/* + * I/O options for pins + */ +typedef enum { + GPIO_OPTION_DISABLE = 1, + GPIO_OPTION_INPUT, + GPIO_OPTION_OUTPUT +} GFGPIOOption; + +/* + * Enable/Disable I/O for GPIOS + */ +typedef enum { + GPIO_MODE_DISABLE = 1, + GPIO_MODE_ENABLE +} GFGPIOMode; + +/* + * Pin groups whose selects are tied together + */ +typedef enum { + GPIO_SD_PINGRP_D0_CLK_CMD = 1, + GPIO_SD_PINGRP_D1_D2 +} GFGPIOPinGrp; + +/* + * Pin select for GPIOS + */ +typedef enum { + GPIO_SELECT_GPIO = 1, + GPIO_SELECT_FUNC +} GFGPIOSelect; + +/** + * + * Sets all the pins of a specific module to GPIO mode + * + * @param RmHandle Handle specific to the GFRm + * @param modid Module + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIOEnable(GFRmHandle RmHandle, eGFModuleIDs modid); + +/** + * Initializes the GPIO API + * + * + * @param RmHandle Handle specific to the GFRm + * @param modid Module + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIODisable(GFRmHandle RmHandle, eGFModuleIDs modid); + +/** + * + * Modifies the pin's input/output modes + * + * @param ChHandle Channel to write to modules through + * @param pin Pin to set + * @param options One of GPIO_OPTION_DISABLE (ignores mode), + * GPIO_OPTION_INPUT, GPIO_OPTION_OUTPUT + * @param mode One of GPIO_MODE_ENABLE, GPIO_MODE_DISABLE + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIOSetPinMode(GFRmChHandle ChHandle, GFGPIOPin pin, GFGPIOOption option, GFGPIOMode mode); + +/** + * + * Sets a particular pin's output select + * + * @param ChHandle Channel to write to modules through + * @param pin Pin to set + * @param select One of GPIO_SELECT_GPIO, GPIO_SELECT_FUNC + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIOSetPinSelect(GFRmChHandle ChHandle, GFGPIOPin pin, GFGPIOSelect select); + +/** + * + * Sets a particular pin group's output select + * + * @param ChHandle Channel to write to modules through + * @param group Pin group to set + * @param select One of GPIO_SELECT_GPIO, GPIO_SELECT_FUNC + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIOSetPinGrpSelect(GFRmChHandle ChHandle, GFGPIOPinGrp group, GFGPIOSelect select); + +/** + * + * Sets the status (high/low) of a pin + * + * @param ChHandle Channel to write to modules through + * @param pin Pin to set + * @param value Value to write to pin + * + */ +void +GFRmGPIOSetPin(GFRmChHandle ChHandle, GFGPIOPin pin, NvU8 value); + +/** + * Gets the status (high/low) of a pin + * + * @param ChHandle Channel to write to modules through + * @param pin Pin to set + * + * @return Status (high/low) of pin + * + */ +NvU32 +GFRmGPIOGetPin(GFRmChHandle ChHandle, GFGPIOPin pin); + +/** @ name Bootflags + List of flags inidicating all the devices which are booted +@{*/ + +/** Chip is initalized in other words IxInit is called */ +#define GFRM_BOOT_IXINIT 0x1 + +/** Display is initalized */ +#define GFRM_BOOT_DXINIT 0x2 + +/*@}*/ + +/** + * Writes to some scratch register with a log of all the components which are + * initalized. GFRM_BOOT_* are passed as bootflags. + */ +GF_RETTYPE GFRmBootPostInit(GFRmHandle hRm, NvU32 bootflags); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/*@}*/ + +/** @page pageRmAppNotes RmAPI Application Notes + + @section pageRmAppNotes1 Todo + +*/ + +#endif /* __GFRM_H__ */ + diff --git a/Start_WM/test6/inc/GFRmError.h b/Start_WM/test6/inc/GFRmError.h new file mode 100755 index 00000000..7295b9f2 --- /dev/null +++ b/Start_WM/test6/inc/GFRmError.h @@ -0,0 +1,68 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFRmError.h + GFSDK Resource Manager API error code header file. +*/ + +#ifndef __GFRMERROR_H__ +#define __GFRMERROR_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** GFRM error code: Function not supported. */ +#define GFRM_ERROR_NO_SUPPORT (GFRM_ERROR | 0x02) +/** GFRM error code: Out of memory. */ +#define GFRM_ERROR_OUT_MEMORY (GFRM_ERROR | 0x03) +/** GFRM error code: Operation on primary surface, but primary surface not set. */ +#define GFRM_ERROR_NO_PRIMARY_SURFACE (GFRM_ERROR | 0x04) +/** GFRM error code: Bad parameters. */ +#define GFRM_ERROR_BAD_PARAMETER (GFRM_ERROR | 0x05) +/** GFRM error code: Out of memory in DSP XRM heap. */ +#define GFRM_ERROR_XRM_OUTMEMORY (GFRM_ERROR | 0x06) +/** GFRM error code: GFRM memory manager is not initialized. */ +#define GFRM_ERROR_MEM_MANAGER_NOT_INITIALIZED (GFRM_ERROR | 0x07) +/** GFRM error code: DSP2Host message queue overflow. */ +#define GFRM_ERROR_QUEUE_OVERFLOW (GFRM_ERROR | 0x08) +/** GFRM error code: DSP2Host message queue empty (not an error). */ +#define GFRM_ERROR_QUEUE_EMPTY (GFRM_ERROR | 0x09) +/** GFRM error code: DSP2Host message with unknown task ID received. */ +#define GFRM_ERROR_QUEUE_UNKNOWNTASK (GFRM_ERROR | 0x0A) +/** GFRM error code: Error getting GPU base address. */ +#define GFRM_ERROR_IXOPEN_GETADDRESS (GFRM_ERROR | 0x0C) +/** GFRM error code: Error opening file. */ +#define GFRM_ERROR_FILE_OPEN_FAILED (GFRM_ERROR | 0x0D) +/** GFRM error code: Cannot create XRM task. */ +#define GFRM_ERROR_XRM_CREATETASK (GFRM_ERROR | 0x0E) +/** GFRM error code: GFRmOSEventWait() failed. */ +#define GF_WAIT_ERROR (GFRM_ERROR | 0x0F) +/** GFRM error code: GFRmOSEventWait() timed out, the event was not set. */ +#define GF_WAIT_TIME_OUT (GFRM_ERROR | 0x10) +/** GFRM error code: RmEnableModule tried to enable a module that doesn't exist. */ +#define GFRM_ERROR_MODULE_NOT_EXIST (GFRM_ERROR | 0x11) +/** GFRM error code: HW Resource not available on GFRmHwResourceConstraint(). */ +#define GFRM_ERROR_HWRESOURCE_NOT_AVAILABLE (GFRM_ERROR | 0x12) +/** GFRM error code: Host2DSP task message queue overflow. */ +#define GFRM_ERROR_XRM_QUEUE_OVERFLOW (GFRM_ERROR | 0x13) +/** GFRM error code: Host2DSP task message queue empty. */ +#define GFRM_ERROR_XRM_QUEUE_EMPTY (GFRM_ERROR | 0x14) +/** GFRM error code: File not found */ +#define GFRM_ERROR_FILE_NOT_FOUND (GFRM_ERROR | 0x15) +/** GFRM error code: Create semaphore */ +#define GFRM_ERROR_CREATE_SEMAPHORE (GFRM_ERROR | 0x16) + +#ifdef __cplusplus +} +#endif + +#endif // __GFRMERROR_H__ + diff --git a/Start_WM/test6/inc/GFRmHelp.h b/Start_WM/test6/inc/GFRmHelp.h new file mode 100755 index 00000000..82c1fa5a --- /dev/null +++ b/Start_WM/test6/inc/GFRmHelp.h @@ -0,0 +1,515 @@ +/* + * Copyright 2003 NVIDIA Corporation. All Rights Reserved. + * + * BY INSTALLING THE SOFTWARE THE USER AGREES TO THE TERMS BELOW. + * + * User agrees to use the software under carefully controlled conditions + * and to inform all employees and contractors who have access to the software + * that the source code of the software is confidential and proprietary + * information of NVIDIA and is licensed to user as such. User acknowledges + * and agrees that protection of the source code is essential and user shall + * retain the source code in strict confidence.User shall restrict access to + * the source code of the software to those employees and contractors of user + * who have agreed to be bound by a confidentiality obligation which + * incorporates the protections and restrictions substantially set forth + * herein, and who have a need to access the source code in order to carry out + * the business purpose between NVIDIA and user. The software provided + * herewith to user may only be used so long as the software is used solely + * with NVIDIA products and no other third party products (hardware or + * software). The software must carry the NVIDIA copyright notice shown + * above. User must not disclose, copy, duplicate, reproduce, modify, + * publicly display, create derivative works of the software other than as + * expressly authorized herein. User must not under any circumstances, + * distribute or in any way disseminate the information contained in the + * source code and/or the source code itself to third parties except as + * expressly agreed to by NVIDIA. In the event that user discovers any bugs + * in the software, such bugs must be reported to NVIDIA and any fixes may be + * inserted into the source code of the software by NVIDIA only. User shall + * not modify the source code of the software in any way. User shall be fully + * responsible for the conduct of all of its employees, contractors and + * representatives who may in any way violate these restrictions. + * + * NO WARRANTY + * THE ACCOMPANYING SOFTWARE (INCLUDING OBJECT AND SOURCE CODE) PROVIDED BY + * NVIDIA TO USER IS PROVIDED "AS IS." NVIDIA DISCLAIMS ALL WARRANTIES, + * EXPRESS, IMPLIED OR STATUTORY, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. + + * LIMITATION OF LIABILITY + * NVIDIA SHALL NOT BE LIABLE TO USER, USER’S CUSTOMERS, OR ANY OTHER PERSON + * OR ENTITY CLAIMING THROUGH OR UNDER USER FOR ANY LOSS OF PROFITS, INCOME, + * SAVINGS, OR ANY OTHER CONSEQUENTIAL, INCIDENTAL, SPECIAL, PUNITIVE, DIRECT + * OR INDIRECT DAMAGES (WHETHER IN AN ACTION IN CONTRACT, TORT OR BASED ON A + * WARRANTY), EVEN IF NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGES. THESE LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF THE + * ESSENTIAL PURPOSE OF ANY LIMITED REMEDY. IN NO EVENT SHALL NVIDIA’S + * AGGREGATE LIABILITY TO USER OR ANY OTHER PERSON OR ENTITY CLAIMING THROUGH + * OR UNDER USER EXCEED THE AMOUNT OF MONEY ACTUALLY PAID BY USER TO NVIDIA + * FOR THE SOFTWARE PROVIDED HEREWITH. + */ + +/* + * File: GFRmHelp.inl + * GFSDK Resource Manager Helper Manager inline header file. + * #### The helper functions are highly dependent on Operating System #### + * #### and Compiler. A number of these functions are macros that #### + * #### maps to corresonding operating system functions directly. #### + */ + +#ifndef __GFRMHelp_INL__ +#define __GFRMHelp_INL__ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/* Defined in GFRMHelp.c */ +extern int GFStricmp(char *, char *); +extern int GFStrincmp(char *, char *, int); + +extern void *GFMalloc(int); +extern void GFFree(void *ptr); + +#if NVOS_IS_WINDOWS_CE + +#ifndef __KERNEL__ +#include +#include +#endif // __KERNEL__ + +/* String Helper functions */ +#define GFStrcpy(p1, p2) strcpy(p1, p2) +#define GFStrncpy(p1, p2, p3) strncpy(p1, p2, p3) +#define GFStrcat(p1, p2) strcat(p1, p2) +#define GFStrncat(p1, p2, p3) strncat(p1, p2, p3) +#define GFStrlen(p1) strlen(p1) +#define GFStrchr(p1, p2) strchr(p1, p2) +#define GFStrcmp(p1, p2) strcmp(p1, p2) +#define GFStrncmp(p1, p2, p3) strncmp(p1, p2, p3) +#define GFStrtok(p1, p2) strtok(p1, p2) +#define GFStrstr(p1, p2) strstr(p1, p2) +#define GFSscanf(p1, p2, p3) sscanf(p1, p2, p3) +#define GFToupper(p1) toupper(p1) +#define GFTolower(p1) tolower(p1) +#define GFAtoi(p1) atoi(p1) + +// convert char string to wchar_t +// p1 = src string of type char +// p2 = dst string of type wchar_t +// p3 = size of dst string in wchar_t unit +#define GFStrConvert(p1, p2, p3) \ + MultiByteToWideChar(CP_ACP, 0, p1, -1, p2, p3); + +// convert wchar_t string to char +// p1 = src string of type wchar_t +// p2 = dst string of type char +// p3 = size of dst string in char unit +#define GFWStrConvert(p1, p2, p3) \ + WideCharToMultiByte(CP_ACP, 0, p1, -1, p2, p3, NULL, NULL) + +/* Standard Helper functions */ +#define GFStrtol(p1, p2, p3) strtol(p1, p2, p3) +#define GFStrtod(p1, p2) strtod(p1, p2) + +/* Memory Helper functions */ +#define GFMemcpy( p1, p2, p3 ) memcpy( p1, p2, p3 ) +#define GFMemmove( p1, p2, p3 ) memmove( p1, p2, p3 ) +#define GFMemcmp( p1, p2, p3 ) memcmp( p1, p2, p3 ) +#define GFMemset( p1, p2, p3 ) memset( p1, p2, p3 ) + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +/* Debug Helper functions */ +#if !defined(PROJECT_SEC_G1) || defined(DEBUG) +#define GFPrintf printf +#else +#define GFPrintf +#endif +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintfVAL vprintf + +#ifdef DEBUG +extern void RmDebugBreak(void); +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + RmDebugBreak(); \ + } +#endif + +#elif NVOS_IS_LINUX + +#ifndef __KERNEL__ +void RmDebugBreak(void); +#ifdef DEBUG +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + RmDebugBreak(); \ + } +#endif + +#include +#define GFToupper toupper +#define GFTolower tolower + +#include +#ifndef GF_XTENSA_RM_TASK +#include +#endif +#define GFMemcpy memcpy +#define GFMemmove memmove +#define GFMemset memset +#define GFMemcmp memcmp +#define GFStrchr strchr +#define GFStrcmp strcmp +#define GFStrcpy strcpy +#define GFStrncpy strncpy +#define GFStrlen strlen +#define GFStrcat strcat +#define GFStrncmp strncmp +#define GFStrtok strtok +#define GFStrstr strstr +#define GFSscanf sscanf + +#include +#define GFPrintf printf +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintf printf +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintfVAL vprintf + +#include +#define GFStrtol strtol +#define GFStrtod strtod +#define GFAtoi atoi +#include + +/* Add or overload RMCTrace function here */ +#if defined(GF_ENABLE_RMC_TRACE) +#include +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#else /* kernel mode */ + +#include +#include + +#include +#define GFToupper toupper +#define GFTolower tolower + +#include +#define GFMemcpy memcpy +#define GFMemmove memmove +#define GFMemset memset +#define GFStrcpy strcpy +#define GFStrncpy strncpy +#define GFStrlen strlen +#define GFMemcmp memcmp +#define GFStrcmp strcmp +#define GFStrncmp strncmp +#define GFStrcat strcat +#define GFStrncat strncat + +#define GFStrstr strstr +#define GFSscanf sscanf + +#define GFPrintf printk +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintfVAL vprintf +#define GFAtoi atoi + +#if defined(GF_ENABLE_RMC_TRACE) +#include +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#endif /* KERNEL */ + +#elif NVOS_IS_WINDOWS + +#include +#include +#include +#include + +/* String functions */ +#define GFStrcpy(p1, p2) strcpy(p1, p2) +#define GFStrncpy(p1, p2, p3) strncpy(p1, p2, p3) +#define GFStrcat(p1, p2) strcat(p1, p2) +#define GFStrncat(p1, p2, p3) strncat(p1, p2, p3) +#define GFStrstr(p1, p2) strstr(p1, p2) +#define GFSscanf(p1, p2, p3) sscanf(p1, p2, p3) +#define GFStrlen(p1) strlen(p1) +#define GFStrchr(p1, p2) strchr(p1, p2) +#define GFStrcmp(p1, p2) strcmp(p1, p2) +#define GFStrncmp(p1, p2, p3) strncmp(p1, p2, p3) +#define GFStrtok(p1, p2) strtok(p1, p2) +#define GFToupper(p1) toupper(p1) +#define GFTolower(p1) tolower(p1) +#define GFStrConvert(p1, p2, p3) \ + strcpy(p2,p1) +// MultiByteToWideChar( CP_ACP, 0, p1, -1, p2, p3 ); + // convert char string to Wide + // p1 = src string of type char + // p2 = dst string of type wchar_t + // p3 = size of dst string in wchar_t unit + +/* Standard Helper functions */ +#define GFStrtol(p1, p2, p3) strtol(p1, p2, p3) +#define GFStrtod(p1, p2) strtod(p1, p2) + +/* Memory Helper functions */ +#define GFMemcpy( p1, p2, p3 ) memcpy( p1, p2, p3 ) +#define GFMemmove( p1, p2, p3 ) memmove( p1, p2, p3 ) +#define GFMemcmp( p1, p2, p3 ) memcmp( p1, p2, p3 ) +#define GFMemset( p1, p2, p3 ) memset( p1, p2, p3 ) + +#define GFAtoi( p1 ) atoi( p1 ) +/* Debug Helper functions */ +#if !defined(PROJECT_SEC_G1) || defined(DEBUG) +#define GFPrintf printf +#else +#define GFPrintf +#endif +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintfVAL vprintf + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +void RmDebugBreak(void); +#ifdef DEBUG +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + RmDebugBreak(); \ + } +#endif + +// Operating system running on the Xtensa +#elif NVCPU_IS_XTENSA + +#include + +/* Memory Helper functions */ +#define GFMemcpy( p1, p2, p3 ) memcpy(p1, p2, p3) +#define GFMemset( p1, p2, p3 ) memset(p1, p2, p3) + +#define GFRMCTrace(a) +#define GFRMCVTrace(a) + +#else + +#include +#include +#include +#include +#include + +/* String functions */ +extern char GFToupper(char); +extern char GFTolower(char); + +extern int GFAtoi(const char *); + +extern void *GFMemcpy(void *, const void *, int); +extern void *GFMemmove(void *, const void *, int); +extern void *GFMemset(void *, int, int); +extern int GFMemcmp(void *, void *, int); + +extern char *GFStrcpy(char *, const char *); +extern char *GFStrncpy(char *, const char *, int); + +extern char *GFStrcat(char *, const char *); +extern char *GFStrncat(char *, const char *, int); + +extern int GFStrlen(const char *); + +extern char *GFStrchr(const char *,int); +extern char *GFStrrchr(const char *,int); + +extern int GFStrcmp(const char *, const char *); +extern int GFStrncmp(const char *, const char *, int); + +extern char *GFStrstr(const char * string1, const char * string2); +extern int GFSscanf(char * string1, const char * string2, ...); + +extern char *GFStrtok(char *, const char *); + +extern long GFStrtol(const char *, char **, int); +extern double GFStrtod(const char *, char **); + +extern int GFPrintf(const char *, ... ); +extern int GFSprintf(char * , const char *, ... ); +extern int GFSprintfVAL(char *, const char *, va_list); +extern int GFPrintfVAL(const char *, va_list); + +#define GFStrConvert(p1, p2, p3) GFStrncpy(p1, p2, p3) + +#if defined(GF_ENABLE_RMC_TRACE) +#define GFRMCTrace(a) printf a +#define GFRMCVTrace(a) vprintf a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#ifdef DEBUG +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + } +#endif + +#endif /* GF_OS */ + +/* Virtual Key Mappings for Specific OS */ +#if NVOS_IS_LINUX +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 65 +#define GF_VKEY_LEFT 68 +#define GF_VKEY_RIGHT 67 +#define GF_VKEY_DOWN 66 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#elif NVOS_IS_WINDOWS_CE + +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 72 +#define GF_VKEY_LEFT 75 +#define GF_VKEY_RIGHT 77 +#define GF_VKEY_DOWN 80 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#elif NVOS_IS_WINDOWS +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 72 +#define GF_VKEY_LEFT 75 +#define GF_VKEY_RIGHT 77 +#define GF_VKEY_DOWN 80 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#else + +/* Virtual Keys */ +#define GF_VKEY_BACK 2 +#define GF_VKEY_FORWARD 3 +#define GF_VKEY_UP 4 +#define GF_VKEY_LEFT 5 +#define GF_VKEY_RIGHT 6 +#define GF_VKEY_DOWN 7 +#define GF_VKEY_SEND 8 +#define GF_VKEY_END 9 +#define GF_VKEY_0 10 +#define GF_VKEY_1 11 +#define GF_VKEY_2 12 +#define GF_VKEY_3 13 +#define GF_VKEY_4 14 +#define GF_VKEY_5 15 +#define GF_VKEY_6 16 +#define GF_VKEY_7 17 +#define GF_VKEY_8 18 +#define GF_VKEY_9 19 +#define GF_VKEY_STAR 20 +#define GF_VKEY_POUND 21 + +#endif /* GF_OS */ + +#ifndef GFDEBUG_ASSERT +#define GFDEBUG_ASSERT(x) do {} while (0) +#endif /* GFDEBUG_ASSERT */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFRMHelp_INL__ */ + diff --git a/Start_WM/test6/inc/GFRmHelp.inl b/Start_WM/test6/inc/GFRmHelp.inl new file mode 100755 index 00000000..4612fce2 --- /dev/null +++ b/Start_WM/test6/inc/GFRmHelp.inl @@ -0,0 +1,626 @@ +/* + * Copyright 2003 NVIDIA Corporation. All Rights Reserved. + * + * BY INSTALLING THE SOFTWARE THE USER AGREES TO THE TERMS BELOW. + * + * User agrees to use the software under carefully controlled conditions + * and to inform all employees and contractors who have access to the software + * that the source code of the software is confidential and proprietary + * information of NVIDIA and is licensed to user as such. User acknowledges + * and agrees that protection of the source code is essential and user shall + * retain the source code in strict confidence. User shall restrict access to + * the source code of the software to those employees and contractors of user + * who have agreed to be bound by a confidentiality obligation which + * incorporates the protections and restrictions substantially set forth + * herein, and who have a need to access the source code in order to carry out + * the business purpose between NVIDIA and user. The software provided + * herewith to user may only be used so long as the software is used solely + * with NVIDIA products and no other third party products (hardware or + * software). The software must carry the NVIDIA copyright notice shown + * above. User must not disclose, copy, duplicate, reproduce, modify, + * publicly display, create derivative works of the software other than as + * expressly authorized herein. User must not under any circumstances, + * distribute or in any way disseminate the information contained in the + * source code and/or the source code itself to third parties except as + * expressly agreed to by NVIDIA. In the event that user discovers any bugs + * in the software, such bugs must be reported to NVIDIA and any fixes may be + * inserted into the source code of the software by NVIDIA only. User shall + * not modify the source code of the software in any way. User shall be fully + * responsible for the conduct of all of its employees, contractors and + * representatives who may in any way violate these restrictions. + * + * NO WARRANTY + * THE ACCOMPANYING SOFTWARE (INCLUDING OBJECT AND SOURCE CODE) PROVIDED BY + * NVIDIA TO USER IS PROVIDED "AS IS." NVIDIA DISCLAIMS ALL WARRANTIES, + * EXPRESS, IMPLIED OR STATUTORY, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. + + * LIMITATION OF LIABILITY + * NVIDIA SHALL NOT BE LIABLE TO USER, USER’S CUSTOMERS, OR ANY OTHER PERSON + * OR ENTITY CLAIMING THROUGH OR UNDER USER FOR ANY LOSS OF PROFITS, INCOME, + * SAVINGS, OR ANY OTHER CONSEQUENTIAL, INCIDENTAL, SPECIAL, PUNITIVE, DIRECT + * OR INDIRECT DAMAGES (WHETHER IN AN ACTION IN CONTRACT, TORT OR BASED ON A + * WARRANTY), EVEN IF NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGES. THESE LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF THE + * ESSENTIAL PURPOSE OF ANY LIMITED REMEDY. IN NO EVENT SHALL NVIDIA’S + * AGGREGATE LIABILITY TO USER OR ANY OTHER PERSON OR ENTITY CLAIMING THROUGH + * OR UNDER USER EXCEED THE AMOUNT OF MONEY ACTUALLY PAID BY USER TO NVIDIA + * FOR THE SOFTWARE PROVIDED HEREWITH. + */ + +/* + * File: GFRmHelp.inl + * GFSDK Resource Manager Helper Manager inline header file. + * #### The helper functions are highly dependent on Operating System #### + * #### and Compiler. A number of these functions are macros that #### + * #### maps to corresonding operating system functions directly. #### + */ + +#ifndef __GFRMHelp_INL__ +#define __GFRMHelp_INL__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/* + * Define the macro GFRMHELP_IMPORTFUNC to import the helper functions + * referenced in GFSDK. Typically Target OS provides definitions for these + * functions. Sample definitions are provided in file RMHelpGeneric.c. + */ + +#if defined(GFRMHELP_ABSTRACTION) +extern char GFAToupper(char); +extern char GFATolower(char); + +extern void *GFMalloc(int); +extern void GFFree(void *ptr); + +extern void *GFMemcpy(void *, const void *, int); +extern void *GFMemmove(void *, const void *, int); +extern void *GFMemset(void *, int, int); +extern int GFMemcmp(void *, void *, int); + +extern char *GFAStrcpy(char *, const char *); +extern char *GFAStrncpy(char *, const char *, int); + +extern char *GFAStrcat(char *, const char *); +extern char *GFAStrncat(char *, const char *, int); + +extern char *GFAStrstr(const char * string1, const char * string2); +extern int GFASscanf(char * string1, const char * string2, ...); + +extern int GFAStrlen(const char *); + +extern char *GFAStrchr(const char *,int); + +extern int GFAStrcmp(const char *, const char *); +extern int GFAStrncmp(const char *, const char *, int); + +extern char *GFAStrtok(char *, const char *); + +extern long GFAStrtol(const char *, char **, int); +extern double GFAStrtod(const char *, char **); + +extern int GFAPrintf(const char *, ... ); + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +#define GFRMCTrace(a) GFRmRMCTrace a +#else +#define GFRMCTrace(a) +#endif + +#else + +/* Defined in GFRMHelp.c */ +extern int GFAStricmp(char *, char *); +extern int GFAStrincmp(char *, char *, int); + + +#if defined(NV_WINDOWS_CE) + +#ifndef __KERNEL__ +#include +#include +#include +#endif // __KERNEL__ + +/* String Helper functions */ +#define GFAStrcpy(p1, p2) strcpy(p1, p2) +#define GFAStrncpy(p1, p2, p3) strncpy(p1, p2, p3) +#define GFAStrcat(p1, p2) strcat(p1, p2) +#define GFAStrncat(p1, p2, p3) strncat(p1, p2, p3) +#define GFAStrlen(p1) strlen(p1) +#define GFAStrchr(p1, p2) strchr(p1, p2) +#define GFAStrcmp(p1, p2) strcmp(p1, p2) +#define GFAStrncmp(p1, p2, p3) strncmp(p1, p2, p3) +#define GFAStrtok(p1, p2) strtok(p1, p2) +#define GFAStrstr(p1, p2) strstr(p1, p2) +#define GFASscanf(p1, p2, p3) sscanf(p1, p2, p3) +#define GFAToupper(p1) toupper(p1) +#define GFATolower(p1) tolower(p1) +#define GFAAtoi(p1) atoi(p1) + +// convert char string to wchar_t +// p1 = src string of type char +// p2 = dst string of type wchar_t +// p3 = size of dst string in wchar_t unit +#define GFAStrConvert(p1, p2, p3) \ + MultiByteToWideChar(CP_ACP, 0, p1, -1, p2, p3); + +// convert wchar_t string to char +// p1 = src string of type wchar_t +// p2 = dst string of type char +// p3 = size of dst string in char unit +#define GFWStrConvert(p1, p2, p3) \ + WideCharToMultiByte(CP_ACP, 0, p1, -1, p2, p3, NULL, NULL) + +/* Standard Helper functions */ +#define GFAStrtol(p1, p2, p3) strtol(p1, p2, p3) +#define GFAStrtod(p1, p2) strtod(p1, p2) + +/* Memory Helper functions */ +#define GFMalloc( p1 ) malloc( p1 ) +#define GFFree( p1 ) free( p1 ) +#define GFMemcpy( p1, p2, p3 ) memcpy( p1, p2, p3 ) +#define GFMemmove( p1, p2, p3 ) memmove( p1, p2, p3 ) +#define GFMemcmp( p1, p2, p3 ) memcmp( p1, p2, p3 ) +#define GFMemset( p1, p2, p3 ) memset( p1, p2, p3 ) + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +/* Debug Helper functions */ +#define GFAPrintf printf +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintfVAL vprintf + +#ifdef DEBUG +extern void RmDebugBreak(void); +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + RmDebugBreak(); \ + } +#endif + +#elif defined(NV_LINUX) + +#ifndef __KERNEL__ +#ifdef DEBUG +#include +#define GFDEBUG_ASSERT(x) assert(x) +#endif + + +#define __declspec(x) + +#include +#define GFMalloc malloc +#define GFFree free + +#include +#define GFAToupper toupper +#define GFATolower tolower + +#include +#ifndef GF_XTENSA_RM_TASK +#include +#endif +#define GFMemcpy memcpy +#define GFMemmove memmove +#define GFMemset memset +#define GFMemcmp memcmp +#define GFAStrcmp strcmp +#define GFAStrcpy strcpy +#define GFAStrncpy strncpy +#define GFAStrlen strlen +#define GFAStrcat strcat +#define GFAStrncmp strncmp +#define GFAStrtok strtok +#define GFAStrstr strstr +#define GFASscanf sscanf + +#include +#define GFAPrintf printf +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintf printf +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintfVAL vprintf + +#include +#define GFAStrtol strtol +#define GFAStrtod strtod +#define GFAAtoi atoi +#include + +/* Add or overload RMCTrace function here */ +#if defined(GF_ENABLE_RMC_TRACE) +#include +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#else /* kernel mode */ + +#include +#include +#define GFMalloc(x) kmalloc((x), GFP_KERNEL) +#define GFFree kfree + +#include +#define GFAToupper toupper +#define GFATolower tolower + +#include +#define GFMemcpy memcpy +#define GFMemmove memmove +#define GFMemset memset +#define GFAStrcpy strcpy +#define GFAStrncpy strncpy +#define GFAStrlen strlen +#define GFMemcmp memcmp +#define GFAStrcmp strcmp +#define GFAStrncmp strncmp +#define GFAStrcat strcat +#define GFAStrncat strncat + +#define GFAStrstr strstr +#define GFASscanf sscanf + +#define GFAPrintf printk +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintfVAL vprintf +#define GFAAtoi atoi + +#if defined(GF_ENABLE_RMC_TRACE) +#include +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#endif /* KERNEL */ + +#elif defined(NV_WINDOWS) + +#include +#include +#include +#include +#include +#include + +/* String functions */ +#define GFAStrcpy(p1, p2) strcpy(p1, p2) +#define GFAStrncpy(p1, p2, p3) strncpy(p1, p2, p3) +#define GFAStrcat(p1, p2) strcat(p1, p2) +#define GFAStrncat(p1, p2, p3) strncat(p1, p2, p3) +#define GFAStrstr(p1, p2) strstr(p1, p2) +#define GFASscanf(p1, p2, p3) sscanf(p1, p2, p3) +#define GFAStrlen(p1) strlen(p1) +#define GFAStrchr(p1, p2) strchr(p1, p2) +#define GFAStrcmp(p1, p2) strcmp(p1, p2) +#define GFAStrncmp(p1, p2, p3) strncmp(p1, p2, p3) +#define GFAStrtok(p1, p2) strtok(p1, p2) +#define GFAToupper(p1) toupper(p1) +#define GFATolower(p1) tolower(p1) +#define GFAStrConvert(p1, p2, p3) \ + strcpy(p2,p1) +// MultiByteToWideChar( CP_ACP, 0, p1, -1, p2, p3 ); + // convert char string to Wide + // p1 = src string of type char + // p2 = dst string of type wchar_t + // p3 = size of dst string in wchar_t unit + +/* Standard Helper functions */ +#define GFAStrtol(p1, p2, p3) strtol(p1, p2, p3) +#define GFAStrtod(p1, p2) strtod(p1, p2) + +/* Memory Helper functions */ +#define GFMalloc( p1 ) malloc( p1 ) +#define GFFree( p1 ) free( p1 ) +#define GFMemcpy( p1, p2, p3 ) memcpy( p1, p2, p3 ) +#define GFMemmove( p1, p2, p3 ) memmove( p1, p2, p3 ) +#define GFMemcmp( p1, p2, p3 ) memcmp( p1, p2, p3 ) +#define GFMemset( p1, p2, p3 ) memset( p1, p2, p3 ) + +#define GFAAtoi( p1 ) atoi( p1 ) +/* Debug Helper functions */ +#define GFAPrintf printf +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintfVAL vprintf + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#ifdef DEBUG +#include "assert.h" +#define GFDEBUG_ASSERT( x ) assert( x ) +#endif + +// Operating system running on the Xtensa +#elif defined(NVCPU_XTENSA) + +#include + +#define GFAAtoi(p1) +/* String functions */ +#define GFAStrcpy(p1, p2) strcpy(p1, p2) +#define GFAStrncpy(p1, p2, p3) +#define GFAStrcat(p1, p2) +#define GFAStrncat(p1, p2, p3) +#define GFAStrlen(p1) +#define GFAStrchr(p1, p2) +#define GFAStrcmp(p1, p2) +#define GFAStrncmp(p1, p2, p3) + +#define GFAStrstr(p1, p2) +#define GFASscanf(p1, p2, p3) + +#define GFAStrncmp(p1, p2, p3) +#define GFAStrtok(p1, p2) +#define GFAToupper(p1) +#define GFATolower(p1) +#define GFAStrConvert(p1, p2, p3) +#define GFAAtoi(p1) + +/* Standard Helper functions */ +#define GFAStrtol(p1, p2, p3) +#define GFAStrtod(p1, p2) + +/* Memory Helper functions */ +#define GFMalloc( p1 ) +#define GFFree( p1 ) +#define GFMemcpy( p1, p2, p3 ) memcpy(p1, p2, p3) +#define GFMemmove( p1, p2, p3 ) memmove(p1, p2, p3) +#define GFMemcmp( p1, p2, p3 ) memcmp(p1, p2, p3) +#define GFMemset( p1, p2, p3 ) memset(p1, p2, p3) + +/* Debug Helper functions */ +#define GFAPrintf +#define GFASprintf +#define GFASprintfVAL +#define GFAPrintfVAL + +#define GFRMCTrace(a) +#define GFRMCVTrace(a) + +#else + +#include +#include +#include +#include +#include + +/* String functions */ +extern char GFAToupper(char); +extern char GFATolower(char); + +extern int GFAAtoi(const char *); +//#define GFMalloc( p1 ) malloc( p1 ) +//#define GFFree( p1 ) free( p1 ) +extern void *GFMalloc(int); +extern void GFFree(void *); + +extern void *GFMemcpy(void *, const void *, int); +extern void *GFMemmove(void *, const void *, int); +extern void *GFMemset(void *, int, int); +extern int GFMemcmp(void *, void *, int); + +extern char *GFAStrcpy(char *, const char *); +extern char *GFAStrncpy(char *, const char *, int); + +extern char *GFAStrcat(char *, const char *); +extern char *GFAStrncat(char *, const char *, int); + +extern int GFAStrlen(const char *); + +extern char *GFAStrchr(const char *,int); +extern char *GFAStrrchr(const char *,int); + +extern int GFAStrcmp(const char *, const char *); +extern int GFAStrncmp(const char *, const char *, int); + +extern char *GFAStrstr(const char * string1, const char * string2); +extern int GFASscanf(char * string1, const char * string2, ...); + +extern char *GFAStrtok(char *, const char *); + +extern long GFAStrtol(const char *, char **, int); +extern double GFAStrtod(const char *, char **); + +extern int GFAPrintf(const char *, ... ); +extern int GFASprintf(char * , const char *, ... ); +extern int GFASprintfVAL(char *, const char *, va_list); +extern int GFAPrintfVAL(const char *, va_list); + +#define GFAStrConvert(p1, p2, p3) GFAStrncpy(p1, p2, p3) + +#if defined(GF_ENABLE_RMC_TRACE) +#define GFRMCTrace(a) printf a +#define GFRMCVTrace(a) vprintf a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#ifdef DEBUG +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + } +#endif + +#endif /* GF_OS */ + +#endif /* GFRMHELP_ABSTRACTION */ + + +#define GFStrcpy GFAStrcpy +#define GFStrncpy GFAStrncpy +#define GFStrcat GFAStrcat +#define GFStrncat GFAStrncat +#define GFStrlen GFAStrlen +#define GFStrchr GFAStrchr +#define GFStrrchr GFAStrrchr +#define GFStrstr GFAStrstr +#define GFStrcmp GFAStrcmp +#define GFStricmp GFAStricmp +#define GFStrincmp GFAStrincmp +#define GFStrncmp GFAStrncmp +#define GFStrtok GFAStrtok +#define GFToupper GFAToupper +#define GFTolower GFATolower +#define GFStrConvert GFAStrConvert +#define GFPrintf GFAPrintf +#define GFSprintf GFASprintf +#define GFSprintfVAL GFASprintfVAL +#define GFPrintfVAL GFAPrintfVAL +#define GFStrtol GFAStrtol +#define GFStrtod GFAStrtod +#define GFSscanf GFASscanf +#define GFAtoi GFAAtoi + + +/* Virtual Key Mappings for Specific OS */ +#if defined(NV_LINUX) +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 65 +#define GF_VKEY_LEFT 68 +#define GF_VKEY_RIGHT 67 +#define GF_VKEY_DOWN 66 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#elif defined(NV_WINDOWS_CE) + +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 72 +#define GF_VKEY_LEFT 75 +#define GF_VKEY_RIGHT 77 +#define GF_VKEY_DOWN 80 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#elif defined(NV_WINDOWS) +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 72 +#define GF_VKEY_LEFT 75 +#define GF_VKEY_RIGHT 77 +#define GF_VKEY_DOWN 80 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#else + +/* Virtual Keys */ +#define GF_VKEY_BACK 2 +#define GF_VKEY_FORWARD 3 +#define GF_VKEY_UP 4 +#define GF_VKEY_LEFT 5 +#define GF_VKEY_RIGHT 6 +#define GF_VKEY_DOWN 7 +#define GF_VKEY_SEND 8 +#define GF_VKEY_END 9 +#define GF_VKEY_0 10 +#define GF_VKEY_1 11 +#define GF_VKEY_2 12 +#define GF_VKEY_3 13 +#define GF_VKEY_4 14 +#define GF_VKEY_5 15 +#define GF_VKEY_6 16 +#define GF_VKEY_7 17 +#define GF_VKEY_8 18 +#define GF_VKEY_9 19 +#define GF_VKEY_STAR 20 +#define GF_VKEY_POUND 21 + +#endif /* GF_OS */ + +#ifndef GFDEBUG_ASSERT +#define GFDEBUG_ASSERT(x) do {} while (0) +#endif /* GFDEBUG_ASSERT */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFRMHelp_INL__ */ + diff --git a/Start_WM/test6/inc/GFRmIx.h b/Start_WM/test6/inc/GFRmIx.h new file mode 100755 index 00000000..c2dddd0d --- /dev/null +++ b/Start_WM/test6/inc/GFRmIx.h @@ -0,0 +1,654 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFRmIx.h + Chip Initialization API header file. +*/ + +#ifndef __GFRMIX_H__ +#define __GFRMIX_H__ + +#include "GFRm.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupRmIx Chip Initialization API +*/ +/*@{*/ + +/* GPIO configurations + * Host GPIO1~GPIO7 correspond to HGP0~HGP6, C32KHZ. + * When configured as output, it is necessay to select output as data or + * Clocks or interrupt. + * GFIX_GPIO_CFG_OUTPUT can Or with GFIX_GPIO_CFG_OUTPUT_SEL_* + */ + +/* Host GPIO type enum */ +typedef enum +{ + GFIX_GPIO0 = 0, + GFIX_GPIO1, + GFIX_GPIO2, + GFIX_GPIO3, + GFIX_GPIO4, + GFIX_GPIO5, + GFIX_GPIO6, + GFIX_GPIO7 +} GFIX_GPIO_TYPE; + +/* Host GPIO operations. */ +#define GFIX_GPIO_GET_INPUT_ENABLE 0x80000000UL +#define GFIX_GPIO_GET_OUT_PUT_ENABLE 0x40000000UL +#define GFIX_GPIO_SET_DATA 0x20000000UL +#define GFIX_GPIO_CLR_DATA 0x10000000UL +#define GFIX_GPIO_GET_DATA 0x08000000UL + +#define GFIX_GPIO_SET_INPUT_ENABLE 0x04000000UL +#define GFIX_GPIO_CLR_INPUT_ENABLE 0x02000000UL +#define GFIX_GPIO_SET_OUTPUT_ENABLE 0x01000000UL +#define GFIX_GPIO_CLR_OUTPUT_ENABLE 0x00800000UL + +/* + * GPIO output select data, configure the pin as data output. + * Meaningful for pin0~pin4(HGP0~HGP4) + */ + +#define GFIX_GPIO_CFG_OUTPUT_SEL_DATA 0x00000000 + +/* + * GPIO output select interrupt, configure the pin as interrupt output. + * Meaningful for pin3(HGP3) only + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_INTR 0x00000040 + +/* + * GPIO output select RDY signal + * Meaningful for pin4(HGP4) only + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_RDY 0x00000100 + +/* + * For pin5 and pin6(HGP5, HGP6), config output clock or data on HGP5 and HGP6. + * + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP56_CLK 0x00000800 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP56_DATA 0x00000000 + +/* + * For pin5(HGP5) + * select monitor clock to HGP5 + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP5_PLL1 0x00000000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP5_PLL2 0x00001000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP5_PLLCOSC 0x00002000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP5_PLLROSC 0x00003000 + +/* + * For pin6(HGP6) + * select monitor clock to HGP6 + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP6_PLL2 0x00000000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP6_DCFCLK 0x00004000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP6_MCCLK 0x00008000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP6_DSPCLK 0x0000C000 + +/* + * For pin7(C32KHZ) + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_C32KHZ 0x00000000 + +/* + * Definition of attribute ids for Set/GetAttributes() + */ +typedef enum _GFIX_ATTR_TYPE + { + GFIX_ATTR_NONE = 0, + GFIX_ATTR_DEVICE_INFO, + GFIX_ATTR_DEVICE_INFO_STRUCT, /* Get Device ID & Rev */ + GFIX_ATTR_EFUSE_PRODUCT_SKU_ID, + GFIX_ATTR_DRAM_SELF_REFRESH, + GFIX_ATTR_DRAM_DEEP_POWER_DOWN +} GFIX_ATTR_TYPE; + +/* + * Definition of module frequency types. + */ +typedef enum _GFIX_MODULEFREQ_TYPE + { + GFIX_MODULEFREQ_OPTIMAL = 0, + GFIX_MODULEFREQ_MINIMUM, + GFIX_MODULEFREQ_MAXIMUM, + GFIX_MODULEFREQ_REQUESTED, + GFIX_MODULEFREQ_ACTUAL +} GFIX_MODULEFREQ_TYPE; + +/* + * Definition of module operations. + */ +#define GFIX_DISABLECLOCK 0x00000001 +#define GFIX_ENABLECLOCK 0x00000002 +#define GFIX_SPECIAL 0x00000004 +#define GFIX_FORCEDISABLECLOCK 0x00000008 +#define GFIX_FORCEENABLECLOCK 0x00000010 +#define GFIX_DYNAMICSWITCH 0x00000020 + +#define GFIX_FORCEDISABLEMODULE 0x00010000 +#define GFIX_FORCEENABLEMODULE 0x00020000 + +/* + * Clock selections, profile and options + */ +enum +{ +#define GFRM_CLOCK(x, y) GFIX_##x, +#define GFRM_CLOCK_PLL(x, y) GFIX_##x, +#include "gfrm_clock_ids.h" +#undef GFRM_CLOCK +#undef GFRM_CLOCK_PLL + GFNUMOFCLOCKIDS +}; + +enum +{ +#define GFRM_CLOCK(x, y) (1 << GFIX_##x )| +#define GFRM_CLOCK_PLL(x, y) (1 << GFIX_##x )| + GFIX_ALL_CLOCKS = +#include "gfrm_clock_ids.h" + 0, // | 0 to GFIX_ALL_CLOCKS +#undef GFRM_CLOCK +#undef GFRM_CLOCK_PLL + +#define GFRM_CLOCK(x, y) (1 << GFIX_##x )| +#define GFRM_CLOCK_PLL(x, y) + GFIX_NO_PLLS = +#include "gfrm_clock_ids.h" + 0, // | 0 to GFIX_NO_PLLS +#undef GFRM_CLOCK +#undef GFRM_CLOCK_PLL + +#define GFRM_CLOCK(x, y) +#define GFRM_CLOCK_PLL(x, y) (1 << GFIX_##x )| + GFIX_ONLY_PLLS = +#include "gfrm_clock_ids.h" + 0, // | 0 to GFIX_NO_PLLS +#undef GFRM_CLOCK +#undef GFRM_CLOCK_PLL + + GFIX_N_CLOCKSOURCES = GFNUMOFCLOCKIDS, + GFIX_NO_CLOCK = 0xFFFFFFFF, + GFIX_PLL_QUERY = 0x80000000 +}; + +#define GFIX_POWER 0x00010000 +#define GFIX_PERFORMANCE 0x00020000 + +#define GFIX_DEFAULTSLK 0x00000000 +#define GFIX_HIGHESTSLK 0x00000001 + +/** Module clock profile */ +typedef struct _GFIXMODULECONFIG +{ + NvU8 clockSelection; /**< Selection mode */ + NvU32 minFrequency; /**< Lowest frequency allowed */ + NvU32 optimalFrequency; /**< Optimal frequency */ + NvU32 maxFrequency; /**< Max frequency */ + NvU32 sourceClocks; /**< Bitfield of valid source clocks */ +} GFIXMODULECONFIG, *PGFIXMODULECONFIG; + +/** Module state */ + typedef struct _GFIXMODULESTATE +{ + NvU32 clkRefCount; /**< Reference counter used in GFRmIxEnableModuleClock */ + NvU32 clkSelect; /**< Clock selected for module (only valid when clkRefCount is non-zero) */ + /**< If clkSelect==GFIX_NO_CLOCK no clock is selected by this module */ + NvU32 enableRefCount; /**< Reference counter used in GFRmIxEnableModule */ +} GFIXMODULESTATE, *PGFIXMODULESTATE; + + +/** typedef for callback when the module is disabled */ + +typedef GF_RETTYPE (*GF_FUNC_RMIX_CALLBACK)(void *handle); + +/** Initializes the chip + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFRmIxInit() is the first function which touches the hardware, there are no + hardware accesses before GFRmIxInit(). It initializes some module's clocks + and as well as taking some modules out of reset. It also initializes + device-control registers. + + @see GFRmIxDeInit() +*/ +GF_RETTYPE +GFRmIxInit( GFRmHandle RmHandle ); + +/** De-initializes the chip + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFRmIxDeInit() does the reverse of GFRmIxInit(), it shut downs the chip. + All modules are put back in reset and clocks turned off. + + @see GFRmIxInit() +*/ +GF_RETTYPE +GFRmIxDeInit( GFRmHandle RmHandle ); + +/** This function enables a module's clock + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param modid (#eGFModuleIDs) ID of the module + @param option (NvU32) Bit field of options, GFIX_ENABLECLOCK, + GFIX_DISABLECLOCK, GFIX_FORCEENABLECLOCK, + GFIX_FORCEDISABLECLOCK, GFIX_DYNAMICSWITCH, GFIX_SPECIAL + @param special (NvU32) Specifies a module specific setting, only used when + option contains GFIX_SPECIAL + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function enables and disables a module's clock as well as enables the + module's source clock. There are two types of enables, the normal enable + and the force enable. When doing a normal enable the module's clock enable + reference count is increased as well as a call to GFRmIxEnableClockSource() + which ensures the module's source clock is enabled. When doing a force + enable/disable the modules reference counter is not touched, + GFRmIxEnableClockSource() is called which increases/deceases the source's + reference count. If the operation is to enable and the clock is currently + disabled, for the both normal enable and force disable GFRmIxEnableModuleClock + will attempt to find the best clock source and divider for the module. + + Some modules support a dynamic clock divider, that is the clock doesn't have + to be turned off before reprogramming the divider. To switch a module's + frequency that supports dynamic dividers without first turning the module + off set option to GFIX_DYNAMICSWITCH. GFRmIxEnableModuleClock will attempt + to find the closest frequency to the desired without changing clock sources. + + Some modules have special clock configurations such as VI, GFIX_SPECIAL can + be specified along with GFIX_ENABLECLOCK or by itself to configure the special + option for the module. +*/ +GF_RETTYPE +GFRmIxEnableModuleClock( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 option, + NvU32 special ); + +/** Same as GFRmIxEnableModuleClock, but takes a callback + function which will be called when the refcount goes + to zero. + + @param func Callback funtion of type GFRmIxEnableModuleClock + @param arg used as an argument to when callback function is called. + + @see GFRmIxEnableModuleClock() +*/ +GF_RETTYPE +GFRmIxEnableModuleClockEx( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 option, + NvU32 special, + GF_FUNC_RMIX_CALLBACK func, + void *arg); + +/** Enables a module + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param modid (#eGFModuleIDs) ID of the module + @param option (NvU32) If option is nonzero the module will be enabled + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function takes a module out of reset. Each module has a reference + count which is used to keep track of how many outstanding enables the + module has. The module will not be disabled until the reference counter + is returned to zero. +*/ +GF_RETTYPE +GFRmIxEnableModule( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 option ); + +/** Same as GFRmIxEnableModule() but calls the passing in callback + function when the refcount of the module goes to zero. + + @param callback Callback function of type GF_FUNC_RMIX_CALLBACK + @param arg Argument passed to the callback function. + + @see GFRmIxEnableModule() +*/ +GF_RETTYPE +GFRmIxEnableModuleEx( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 option, + GF_FUNC_RMIX_CALLBACK callback, + void *arg + ); + +/** Changes frequency of a clock. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param option (NvU32) GFIX_PLL1, GFIX_PLL2, GFIX_ROSC, GFIX_OSC, + GFIX_REFCLK0, GFIX_REFCLK1 or GFIX_PLL_QUERY + @param pFrequency (NvU32*) Pointer to 32-bit value in KHz to get three + digit MHz precision. Returns with newly set + current frequency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GF_ERROR_BAD_PARAMETER Bad parameter passed + + This function sets a clock to a certain frequency. If the clock cannot meet + the requested frequency then the closest one will be chosen. For the PLLs + this function determines the closest dividers to arrive at the requested + frequency. To determine the frequency that will be chosen without actually + setting it GFIX_PLL_QUERY can be Or'ed along with the clock ID. + + Some clocks only have one frequency that never changes; this function must + still be called at least once to allow the internal logic to know what the + frequency of the clock is. To disable the selection of a clock by a module, + a clock can be disabled by setting its frequency to zero; this will remove + it from consideration for all modules. + + This function will fail if a module is already using the clock. + + @see GFRmIxGetFrequency() +*/ +GF_RETTYPE +GFRmIxSetFrequency( GFRmHandle RmHandle, + NvU32 option, + NvU32 *pFrequency ); + +/** Retrieves frequency of a clock. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param option (NvU32) GFIX_PLL1, GFIX_PLL2, GFIX_ROSC, GFIX_OSC, + GFIX_REFCLK0, GFIX_REFCLK1 + @param pFrequency (NvU32*) Pointer to 32-bit value in KHz to get three + digit MHz precision. Returns with currently + set frequency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GF_ERROR_BAD_PARAMETER Bad parameter passed + + @see GFRmIxSetFrequency() +*/ +GF_RETTYPE +GFRmIxGetFrequency( GFRmHandle RmHandle, + NvU32 option, + NvU32 *pFrequency ); + +/** Sets the requested frequency of the module. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param modid (#eGFModuleIDs) ID of the module + @param frequency (NvU32) 32-bit value in KHz to get three digit MHz + precision + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function sets the requested frequency of a module, this value must + lie between the minimum and maximum frequencies specified in + GFRmIxSetModuleConfig(). This value is cached and used when + GFRmIxEnableModuleClock() is called attempting to enable the clock to the + module. + + @see GFRmIxSetModuleConfig() +*/ +GF_RETTYPE +GFRmIxSetModuleFrequency( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 frequency ); + +/** This function is used to retrieve clock frequency information about a module. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param modid (#eGFModuleIDs) ID of the module + @param type (#GFIX_MODULEFREQ_TYPE) Type of frequency + @param pFrequency (NvU32*) Pointer to 32-bit value in KHz to get three digit + MHz precision. Returns with currently frequency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +GF_RETTYPE +GFRmIxGetModuleFrequency( GFRmHandle RmHandle, + eGFModuleIDs modid, + GFIX_MODULEFREQ_TYPE type, + NvU32 *pFrequency ); + +/** This function enables and disables power plane(s). + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param ppID (NvU32) ID of power plane (More then one can be Or'ed to perform + operation in parallel) + @param operation (#GFIX_POWERPLANE_OP_TYPE) Operation to perform on the + power planes + @param states (NvU32*) Ptr to 32 bit value to store the resulting bit + field of a GFIX_POWERPLANE_OP_QUERY operation. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GF_ERROR_BAD_PARAMETER Bad parameter passed + + This function enables and disables power plane(s), multiple power planes can + be disabled in one function call. There is two versions of this functions + specified with the compilation flag GF_EXTERNAL_POWERPLANE_LOGIC. If this + flag is set to 1 then all the power plane logic is done in the platform code, + if 0 then all the logic is done in Ix. + + When internal power plane logic is chosen, each power plane has a reference + count. If the power plane is to be enabled or disabled, GFRmIxPowerPlane() + will call out to RmPowerPlane(), which will perform platform specific enabling. +*/ +GF_RETTYPE +GFRmIxPowerPlane( GFRmHandle RmHandle, + NvU32 ppID, + GFIX_POWERPLANE_OP_TYPE operation, + NvU32 *states ); + +/** Enable and disables clock sources. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param clockid (NvU32) ID of the clock + @param state (NvU32) 0 for disable, 1 for enable + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function enables and disables a clock's source. A reference counter is + used to ensure the clock's source won't be disabled until there is a matching + number of enable and disable operations. If a clocks source is to be enabled + or disabled, GFRmIxEnableClockSource() will call out to RmEnableClockSource() + to do the platform specific enabling or disabling. +*/ +GF_RETTYPE +GFRmIxEnableClockSource( GFRmHandle RmHandle, + NvU32 clockid, + NvU32 state ); + +/** This function sets the list of reference clocks that a PLL may choose. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param option (NvU32) GFIX_PLL1, GFIX_PLL2 + @param clocks (NvU32) Bitfield of clocks. (1< + 
      +                                                      0    -> audio structs can be locate anywhere, dspcore will be allocated anywhere (default)
+                                                      1    -> audio structs must be allocated in internal SRAM, dspcore will be allocated anywhere
+                                                      0xMM -> MM is a 8 bit wide bitmask: b'10XXYYZZ (i.e. 0x80 | b'XXYYZZ)
+
+                                                      XX controls allocation of dspcore DSP image (about 100 kB)
+                                                      YY to control allocation of GfSgl (about 90 kB, not required for encoding=ADTSINTERNAL)
+                                                      ZZ controls allocation of GfGlobalParameters struct (about 36 kB)
+
+                                                      bitmask meaning:
+                                                      b'00 no special requirement
+                                                      b'01 force internal SRAM
+                                                      b'10 force external SRAM
+                                                      b'11 unused
+
      + */ + + NvU32 AudioRecordEnable; //!< GFSDK_AUDIO_REC_ENABLE, Enable SC15 I2S Record, default : 0 + NvU32 AudioNoI2C; //!< Disable codec I2C access in GFAudioAPI + char I2SCodecInit[RM_ENV_MAXLEN]; //!< Codec init addr/data sequence comma delimited zero padded 32 bit hex values "xxxxxxxx,xxxxxxxx,..." up to 128 chars + char I2SCodecReset[RM_ENV_MAXLEN]; //!< Codec reset addr/data sequence comma delimited zero padded 32 bit hex values "xxxxxxxx,xxxxxxxx,..." up to 128 chars + //!< I2S "aaaaddrr" aaaa - i2s slave address, dd - 8 bit data, rr 7 bit i2s register + //!< AC97 "aaaadddd" aaaa - ac97 register address, dddd - 16 bit data value + NvU32 I2SCodecEnableSMCLK; + NvU32 SCInterfaceMode; + + NvU32 perfMode3D; // 3D perf mode. + NvU32 DxInitBypass; // This is used to tell DxSetDisplay() to initialize the + // software state without touching the hardware + NvU32 noDCPreLoadCtx; + NvU32 nulldriver2D; +#if NVOS_IS_WINDOWS_CE + NvU32 BackupMemory; +#endif + NvU32 IndirectAddrSet; +} GFRMENVIRONMENTVARIABLES, *PGFRMENVIRONMENTVARIABLES; + +/* Rm Public Services for platform only. May depend on GFPlat.h */ +enum +{ + RM_EXTDATA_INIT_TYPE = 0 +}; + +enum +{ + RM_EXTDATA_INIT_SCRIPT = 0, + RM_EXTDATA_RM_SCRIPT, + RM_EXTDATA_CAMERA_SCRIPT, + RM_EXTDATA_ENVVARS_SCRIPT, + RM_EXTDATA_DISPLAY_SCRIPT, + RM_EXTDATA_DISPLAY_SUB_SCRIPT, + RM_EXTDATA_AUTOCTRL_SCRIPT, + RM_EXTDATA_AVP_IMAGE_AUDIO_AVP1, + RM_EXTDATA_AVP_IMAGE_MP3_AVP1, + RM_EXTDATA_AVP_IMAGE_SBC_AVP1, + RM_EXTDATA_AVP_IMAGE_AAC_AVP1, + RM_EXTDATA_AVP_IMAGE_EAAC_AVP1, + RM_EXTDATA_AVP_IMAGE_AACLPSBR_AVP1, + RM_EXTDATA_AVP_IMAGE_AMRNB_AVP1, + RM_EXTDATA_AVP_IMAGE_AMRWB_AVP1, + RM_EXTDATA_AVP_IMAGE_WMA_AVP1, + RM_EXTDATA_AVP_IMAGE_AUDIO_AVP2, + RM_EXTDATA_AVP_IMAGE_MP3_AVP2, + RM_EXTDATA_AVP_IMAGE_SBC_AVP2, + RM_EXTDATA_AVP_IMAGE_AAC_AVP2, + RM_EXTDATA_AVP_IMAGE_EAAC_AVP2, + RM_EXTDATA_AVP_IMAGE_AACLPSBR_AVP2, + RM_EXTDATA_AVP_IMAGE_AMRNB_AVP2, + RM_EXTDATA_AVP_IMAGE_AMRWB_AVP2, + RM_EXTDATA_AVP_IMAGE_WMA_AVP2, + RM_EXTDATA_AVP_IMAGE_H264DEC_AVP1, + RM_EXTDATA_AVP_IMAGE_H264DEC_AVP2, + RM_EXTDATA_AVP_IMAGE_MP4DEC_AVP1, + RM_EXTDATA_AVP_IMAGE_MP4DEC_AVP2, + RM_EXTDATA_AVP_IMAGE_JPEGDEC_AVP1, + RM_EXTDATA_AVP_IMAGE_JPEGDEC_AVP2, + RM_EXTDATA_AVP_IMAGE_H264ENC_AVP1, + RM_EXTDATA_AVP_IMAGE_H264ENC_AVP2, + RM_EXTDATA_AVP_IMAGE_VC1DEC_AVP1, + RM_EXTDATA_AVP_IMAGE_VC1DEC_AVP2, + RM_EXTDATA_AVP_IMAGE_RV9DEC_AVP1, + RM_EXTDATA_AVP_IMAGE_RV9DEC_AVP2, + RM_EXTDATA_AVP_IMAGE_ISP3A_AE_AF_AVP1, + RM_EXTDATA_AVP_IMAGE_ISP3A_AWB_AVP1, + RM_EXTDATA_AVP_IMAGE_ISP3A_DVS_AVP1, + RM_EXTDATA_AVP_IMAGE_BEATNIK_AVP1, + RM_EXTDATA_AVP_IMAGE_BEATNIK_AVP2, + RM_EXTDATA_AVP_IMAGE_KERNEL_AVP1, + RM_EXTDATA_AVP_IMAGE_KERNEL_AVP2, + RM_EXTDATA_AVP_IMAGE_DSP_UNITTESTS, + RM_EXTDATA_AVP_IMAGE_TSDEM_AVP1, //!< SC15 version of GFMxDemTS DSP image + RM_EXTDATA_AVP_IMAGE_TSDEM_AVP2, //!< SC14 version of GFMxDemTS DSP image + RM_EXTDATA_AVP_IMAGE_ISP_AVP1 +}; + +enum +{ + RM_EXTDATA_FILE = 0, + RM_EXTDATA_FILE_WITH_SUBID, +}; + +#define DEFAULTSCRIPTNAME "default" + +#define RM_EXTDATA_READ 1 // Read in data +#define RM_EXTDATA_USEBUFFER 4 // RmAccessExternalData shouldn't handle + // allocation of buffer, the data is to + // be placed at the orginal buffer address +#define RM_EXTDATA_SIZE 8 // Query the size of the data +#define RM_EXTDATA_FILENAME 0x10 // return script file name +#define RM_EXTDATA_NAME 0x20 // return name of script without prefix and sub ID +#define RM_EXTDATA_IDLIST 0x40 // return array of script sub ID + +/* Fields in struct PGFRMEXTDATASTRUCT + * dataType : Type of the data + * dataID : ID of the data + * subID : Sub ID of script + * buffer : Pointer to pointer of the data address + * size : Address to store the resulting size. During a read operation if size + * is non-zero the amount of bytes read in will be stored there. If size + * or the value pointed to by size is zero all the data represented by + * dataID will be read in. + * option : flag that will change what is returned in buffer and size. + */ +typedef struct _GFRMEXTDATASTRUCT +{ + NvU32 dataType; // type of data + NvU32 dataID; // ID of data + NvU32 subID; // sub ID of data + void ** buffer; + NvU32 * size; + NvU32 option; +} GFRMEXTDATASTRUCT, *PGFRMEXTDATASTRUCT; + + + /** This function is called to get value from curent environment. + + @param envName environment name in env table + @param envType environment type + RM_ENV_DECIMAL // String should be parsed as a decimal + RM_ENV_HEX // String should be parsed as a hexadecimal + RM_ENV_CHAR // String should be parsed as a character + RM_ENV_STRING // String used as-is. + @param parsedval converted value. Only available while environment type is RM_ENV_DECIMAL or RM_ENV_HEX + @return a pointer to the environment table entry containing varname. + */ +// char * ReadEnvVars( const char *envName, int envType, NvU32 *parsedval); +GF_RETTYPE nvGetConfigUint32(const char *name, NvU32 *value); + +GF_RETTYPE nvGetConfigString( const char *envName, char **value); + +/** Retrieves the Process id of the current process. + + @param RmGetProcessID Pointer to NvU32 for returning the prcess id, + + @return GF_SUCCESS If the platforms support some sort of get process id API + @return GF_ERROR. if not support +*/ +GF_RETTYPE RmGetProcessID( NvU32 *RmProcessID ); + +/* Thread, Mutex, Event and Semaphore opaque handles */ +typedef struct GFMutex_t *GFMutex; +typedef struct GFSemaphore_t *GFSemaphore; +typedef struct GFEvent_t *GFEvent; +typedef struct GFThread_t *GFThread; + +/* Rm platform functions for OS abstraction */ + +/** Create Mutex object. + + @param id - Mutex identiifer. Used to cretate named objects. If the + id is 0, un named object is created. + + @return Handle to the event object, or 0 on failure. +*/ +GFMutex RmCreateMutex( NvU32 id ); + +/** Lock mutex object, blocks until mutex can be taken. Must always succeed if + given a valid mutex handle. + + @param mutex Mutex handle +*/ +void RmLockMutex(GFMutex mutex); + +/** Unlock mutex object. Must always succeed if given a valid mutex handle. + + @param mutex Mutex handle +*/ +void RmUnlockMutex(GFMutex mutex); + +/** Destroy mutex object. Must always succeed if given a valid mutex handle. + Must not crash (should do nothing) if given a NULL handle. + + @param mutex Mutex handle. +*/ +void RmDestroyMutex(GFMutex mutex ); + +/** Create semaphore object. + + @param id - Semaphore identifer. Used to create named objects. If the + id is 0, unnamed object is created. + + @param InitCount (NvU32) Initial count of semaphore. This value must be + greater than zero. + @param MaxCount (NvU32) Maximum count of semaphore. This value must be + greater than zero. + + @return Handle to semaphore object, or 0 on failure +*/ +GFSemaphore RmCreateSemaphore(NvU32 id, NvU32 InitCount, NvU32 MaxCount); + +/** Destroy semaphore object. Must always succeed if given a valid semaphore + handle. Must not crash (should do nothing) if given a NULL handle. + + @param sem Semaphore handle +*/ +void RmDestroySemaphore(GFSemaphore sem); + +/** Signal semaphore object. This function increments the semaphore's counter. + Must always succeed if given a valid semaphore handle. + + @param sem Semaphore handle +*/ +void RmSignalSemaphore(GFSemaphore sem); + +/** Wait on semaphore. + Function blocks while semaphore's count is 0. Once the count is non-zero, + the count is decremented by one and function returns. If timeout is passed + as 0, the function does not block. + + @param sem Semaphore handle + @param timeout Timeout in miliseconds, 0 for non-blocking, (NvU32)-1 for infinite wait. + @retutn GF_SUCCESS indicates that the semaphore was taken successfully, GF_WAIT_TIME_OUT + indicates timeout, any other return value indicates error. +*/ +GF_RETTYPE RmWaitOnSemaphore(GFSemaphore sem, NvU32 timeout); + + +/** Create event object. + + @return Handle to event object, or NULL on failure +*/ +GFEvent RmCreateEvent(void); + +/** Sets the event object to the signaled state. Must always succeed if given + a valid event handle. + + @param event Event handle +*/ +void RmSetEvent( GFEvent event ); + +/** Resets the event object to the nonsignaled state. Must always succeed if + given a valid event handle. + + @param event Event handle +*/ +void RmResetEvent( GFEvent event ); + +/** Function blocks until the event is signaled. + + @param event Event handle. + @param msec Milli seconds to wait. + + @retval GF_WAIT_GET_OBJECT Event was signaled, and the event object was acquired. + @retval GF_WAIT_TIME_OUT Timeout before event was signaled + @retval GF_WAIT_ERROR An error occured. +*/ +GF_RETTYPE RmWaitForEvent(GFEvent event, NvU32 msec ); + + +/** Destroys the event object. Must always succeed if given a valid event + handle. Must not crash (should do nothing) if given a NULL handle. + + @param event Event Handle. This is the handler returned by + the call to RmCreateEvent function. +*/ +void RmDestroyEvent( GFEvent event ); + +/** Creates a thread to execute within the calling process. + + @param func (NvU32 (*)(void *)) Pointer to a function to be executed + by the thread. + @param data (void *) Pointer to variable to be passed to the thread + + @return Handle to thread on success, otherwise 0 is returned. +*/ +GFThread RmCreateThread(NvU32 (*StartFunction)(void *), void *data); + +/** Blocks until the specified thread terminates, then frees system resources + associated with the thread. Must always succeed if given a valid thread + handle. Must not crash (should do nothing) if given a NULL handle. + + @param ThreadHandle Thread handle retruned by RmCreateThread call +*/ +void RmJoinThread(GFThread ThreadHandle); + +/** Yield execution to other threads. This will be called inside spin loops + that are waiting for the hardware to finish something. +*/ +void RmYield(void); + +/** Get full path of extended script data. Assume the script data is at same directory as bootload module. + @param modulename (char *)Bootloader module name. If the script data is not at same directory as module, could be NULL. + @param fullpath (char *)Pointer to extened script data path. + + @return GF_SUCCESS to signal success, or error code to signal failure +*/ +GF_RETTYPE + RmGetExtDataPath(char *modulename, char *fullpath ); + +/* File and File Search opaque handles */ +typedef struct GFFile_t *GFFile; +typedef struct GFFileSearch_t *GFFileSearch; + +/** Searches a directory for a file whose name matches the specified file name. + It examines subdirectory names as well as file names + @param filePath (char *) Pointer to a null-terminated string that specifies a valid directory or path and file name, + which can contain wildcard characters (* and ?) + @param filename (char *) pointer to the full path file/dir which match this search. + + @return If the function succeeds, the return value is a search handle used in a subsequent call to RmFindNextFile or RmFindClose, + NULL if the function failed. +*/ +GFFileSearch RmFindFirstFile(const char *filePath, char *fileName); + +/** Continues a file search from a previous call to the RmFindFirstFile function. + @param hFind (GFFileSearch ) Search handle returned by a previous call to the RmFindFirstFile function. + @param filename (char *) pointer to the filename with full path which match this search. + @return GF_SUCCESS to signal success, or error code to signal failure +*/ +GF_RETTYPE RmFindNextFile(GFFileSearch hFind, char *fileName); + +/** Closes the specified search handle. Must always succeed if given a valid + search handle. Must not crash (should do nothing) if given a NULL handle. + + @param hFind (GFFileSearch) Search handle returned by a previous call to the RmFindFirstFile function. +*/ +void RmFindClose(GFFileSearch hFind); + +/** Open file. + @param filename (const char *) Filename + @param fileSpec (const char *) Type of access permitted + @return Handle to the open file. A NULL pointer value indicates an error. +*/ +GFFile RmFileOpen(const char *fileName, const char *fileSpec); + +/** Close file. Must always succeed if given a valid file handle. Must not + crash (should do nothing) if given a NULL handle. + + @param fp Handle that RmFileOpen() returned +*/ +void RmFileClose(GFFile fp); + +/** Read data from file. + @param buffer (void *) Storage location for data + @param lSize (NvU32) Item size in bytes + @param lCount(NvU32) Maximum number of items to be read + @param fp (GFFile) Pointer that RmFileOpen() returned + @return Number of full items actually read, 0 if nothing is read out. +*/ +GF_RETTYPE RmFileRead(void *buffer, NvU32 lSize, NvU32 lCount, GFFile fp); + +/** Get file size. + @param fp(GFFile ) Pointer that RmFileOpen() returned + @return Current file size in bytes. +*/ +GF_RETTYPE RmFileSize(GFFile fp); + +/** Platform abstraction for millisecond sleep. + + @param msec Milliseconds to sleep. + */ +void RmWaitMSec(NvU32 msec); + +/** Waits for a keypress with a timeout, and returns the key. + + @param timeOutMSec Milliseconds to wait for the keypress. + @retval The code for the key, or zero if we timed out. + */ +int RmWaitKey(NvU32 timeOutMSec); + +/** Get the current OS tick counter. + @return Low 32 bits of millisecond counter. +*/ +NvU32 RmGetTickCountMSec(void); + +/** Get the current OS tick counter. + + NOTE: This function is NOT guaranteed to exist on all + platforms. Drivers should NOT call this function; it's + meant only for benchmarking. + + @return (NvU64) 64 bit microsecond counter. + */ +NvU64 RmGetTickCountUSec(void); + +/** SetupPlatform - It is called by RmSetupPlatform to setup any platform specific stuff. + + @param pOutput (PGFRMSETUPPLATFORM) output structure. Used to pass variables to high layer function RmSetupPlatform + @param penv (PGFRMENVIRONMENTVARIABLES) pass Environment Variable Configuration structure + + @return GF_SUCCESS to signal success, or error code to signal failure + +*/ +GF_RETTYPE SetupPlatform( PGFRMSETUPPLATFORM pOutput, PGFRMENVIRONMENTVARIABLES penv ); + +/** Called by RmExitPlatform to exit and clean-up any platform specific stuff, if any + + @param pUserObject0 (void *) Pointer to user specified object 0 from high layer function RmExitPlatform + + @return GF_SUCCESS to signal success, or error code to signal failure +*/ +GF_RETTYPE ExitPlatform( void *pUserObject0); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFRMOEM_H__ */ diff --git a/Start_WM/test6/inc/GFRmRDMA.h b/Start_WM/test6/inc/GFRmRDMA.h new file mode 100755 index 00000000..151ec65d --- /dev/null +++ b/Start_WM/test6/inc/GFRmRDMA.h @@ -0,0 +1,411 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @File: GFRmRDMA.h + GFSDK Read DMA memmory manager. + + */ + +#ifndef __GFRMRDMA_H__ +#define __GFRMRDMA_H__ + +#include "GF.h" + +/** @addtogroup groupRDMA RDMA ReadDMA API +
        +
      • @ref pageRDMAAppNotes +
      +*/ + +/*@{*/ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + + +/** eGFRmRDMAClientID: Enumeration of client id's. SC15 has 4 + RDMA (Read DMA) FIFO's. Modules specified below can be + attached to the RDMA FIFO's. See @ + */ +typedef enum +{ + RDMA_CLID_CPU = 0, + RDMA_CLID_DSP, + RDMA_CLID_I2S, + RDMA_CLID_SD, + RDMA_CLID_MPEGE, + RDMA_CLID_JPEGE, + RDMA_CLID_EPP, + RDMA_CLID_VI, + RDMA_CLIDS +} eGFRmRDMAClientID; + +/** RDMA buffer header. + + For non-rectangular (or linear) reads + RDMA expects a header in the memory. The header formart is as specified + below. GFRmRDMAReadHeader function returns the header in this format. + + @See GFRmRDMAReadHeader() + */ + +typedef struct _RDMA_BUF_HEADER +{ + NvU32 bufferSize; + NvU32 raiseVector; + NvU32 channel; + NvU8 raiseEnable; + NvU8 frameStart; + NvU8 frameEnd; + NvU8 largeHdr; + NvU32 extHeader; + +} RDMA_BUFFER_HEADER, *pRDMA_BUFFER_HEADER; + + +/* RDMA flags */ + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + No byte swap. +*/ +#define GF_RDMA_FLAGS_SWAP_NONE 0x00000000 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + Swap bytes in a word. example: 0xaabbccdd to 0xbbaaddcc. +*/ +#define GF_RDMA_FLAGS_SWAP_BYTE_IN_WORD 0x00000001 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + Swap bytes in dword: 0xaabbccdd to 0xddccbbaa. +*/ +#define GF_RDMA_FLAGS_SWAP_BYTE_IN_DWORD 0x00000002 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + Swap word in dword example: 0xaabbccdd to 0xccddaabb. +*/ +#define GF_RDMA_FLAGS_SWAP_WORD_IN_DWORD 0x00000003 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags bitmask: + mask out byte swap options GF_RDMA_FLAGS_SWAP_*. +*/ +#define GF_RDMA_FLAGS_SWAP_MASK 0x00000003 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + Tells the RDMA engine to output header. Will output a header into the data stream, + which has to be read with GFRmRDMAReadHeader() before calling GFRmRDMARead(). + This flag is relevant only in non-rectangular reads. + */ +#define GF_RDMA_FLAGS_STR_HEADER 0x00010000 + +/** RDMA_RECT + Setup information for the RDMA. + */ +typedef struct _RDMA_RECT +{ + /** physical addess of the buffer in the SC15 Memory view. 32-bit alignment + * required. */ + NvU32 baseOffset; + + /** client id. See @eGFRmRDMAClientID */ + eGFRmRDMAClientID clid; + + /** buffers/stride/width/lines of the rectangular buffer. + + Need to comply with the following constraints provided + by the hardware + - if width is not a multiple of 4 bytes (one word): + - stride equals width, stride should be the exact stride in bytes (eg. line_stride[1:0] not equal to 0) + - if stride is bigger than width, stride should be rounded down to the nearest word + (eg. line_stride[1:0] should be zero) + + For example: width = 42 bytes, stride = 82 -> stride should be programmed to 80 + width = 42 bytes, stride = 42 -> stride should be programmed to 42 + */ + NvU32 buffers; + NvU32 stride; + NvU32 width; + NvU32 lines; + + /* use the RDMA flags defined above as GF_RDMS_FLAGS_* */ + NvU32 flags; //!< Flagbits, see GF_RDMA_FLAGS_* + + /* Timeout in msec. If <=0, then no timeout */ + NvU32 timeout; + +} RDMA_RECT, *pRDMA_RECT; + +/** RDMA_NONRECT + + Setup structure for non-rectangular reads. + + */ +typedef struct _RDMA_NONRECT +{ + /** Physical addess of the buffer in the GPU address space. Needs to be + * 32-bit aligned. */ + NvU32 baseOffset; + + /** client id. See @eGFRmRDMAClientID */ + eGFRmRDMAClientID clid; + + NvU32 buffers; + NvU32 stride; + + /* use the RDMA flags defined above as GF_RDMS_FLAGS_* */ + NvU32 flags; //!< Flagbits, see GF_RDMA_FLAGS_* + + /* Timeout in msec. If =0, then no timeout */ + NvU32 timeout; + +} RDMA_NONRECT, *pRDMA_NONRECT; + + +/** There are four read dma channels, the RM manages the allocation/ + freeing of these channels. This function allocates a channel. + + @param RmHandle Handle to the Rm allocated via call to GFRmOpen. + @param DmaHandle Pointer to an allocated handle. + + @retval GF_SUCCESS if a RDMA channel is available, and returns + RDMA handle on allocation. + + The release function will return GF_ERROR + if the read dma is already released. + */ + +GF_RETTYPE +GFRmRDMAAlloc(GFRmHandle RmHandle, GFRmRdmaHandle *DmaHandle); + +/** There are four read dma channels, the RM manages the allocation/ + freeing of these channels. This function frees an allocated + channel. + + @param hRm Handle to the Rm allocated via call to GFRmOpen. + @param phDma Pointer to the DMA handle to be released. + */ +void +GFRmRDMARelease(GFRmHandle hRm, GFRmRdmaHandle *phDma); + +/** Setup non-rectangular RDMA. + + When the flag GF_RDMA_FLAGS_STR_HEADER is set, buffer header is written to the + memory by the RDMA client. So, when the cpu reads the data, buffer + header comes first and then the data. Buffer header has the information + of buffer, like its size etc. + + + So, an example sequence would be + - Call setup with GF_RDMA_FLAGS_STR_HEADER flag set. + - Read header with the GFRmRDMAReadHeader(...) + - Read buffer size of data with GFRmRDMARead() funtion. + Buffer size is in the buffer header. + + If this flag is not set, then the there is no buffer header. + In this case it is assumed that the the size of the buffer is prefixed + and known to the module API writers. + + So, an example sequence would be + - Call setup GF_RDMA_FLAGS_STR_HEADER flag not set. + - Read buffer size of data with GFRmRDMARead() funtion. + Buffer size is known to the callers. + + baseOffset of pReq structure needs to be 32-bit aligned. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param pReq Populated RDMA req structure. See @RDMA_NONRECT +*/ + +GF_RETTYPE +GFRmRDMASetupNONRect(GFRmRdmaHandle DmaHandle, pRDMA_NONRECT pReq); + +/** Setup RDMA for rectangular read. + + Requirement: + baseOffset of pReq structure needs to be 32-bit aligned. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param pReq Populated RDMA req structure. See @RDMA_RECT +*/ +GF_RETTYPE +GFRmRDMASetupRect(GFRmRdmaHandle DmaHandle, pRDMA_RECT pReq); + +/** Reads the RDMA FIFO status register and returns the + available number of FIFO slots. A slot is 32-bit. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + */ +NvU32 GFRmRDMAFIFOAvailIn32Bits(GFRmRdmaHandle DmaHandle); + +/** Reads memory from SC15 internal/external + memory to the system memory pointed by the dstAddr. Need + to pass the same rectangular attributes passed, when the + RDMA is setup. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param dstAddr aligned or non-aligned dest pointer. Aligned + pointer results in faster reads. + @param width Width in bytes to read. + @param height Height of the rectangular region. + + @retval Returns GF_SUCCESS or GF_ERROR. + */ + +GF_RETTYPE +GFRmRDMARectRead(GFRmRdmaHandle DmaHandle, void *dstAddr, NvU32 width, NvU32 height); + + +/** Reads memory from SC15 internal/external + memory to the system memory pointed by the dstAddr. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param dstAddr aligned or non-aligned dest pointer. Aligned + pointer results in faster reads. + @param sizeInBytes Number of bytes to read. + + @retval Returns GF_SUCCESS or GF_ERROR. + */ + +GF_RETTYPE +GFRmRDMARead(GFRmRdmaHandle DmaHandle, void *dstAddr, NvU32 sizeInBytes); + +/** Reads buffer header. Once this info is read + API's will know how much data to read or expect. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param header Pointer to RDMA header structure. See @RDMA_BUFFER_HEADER + */ +GF_RETTYPE +GFRmRDMAReadHeader(GFRmRdmaHandle DmaHandle, pRDMA_BUFFER_HEADER header); + + +/** Cleanup the RDMA FIFO, by reading out any extra DOWRDS + GFRmRDMARead might not have read. + + In general this function need not be used. + */ + +GF_RETTYPE +GFRmRDMACleanup(GFRmRdmaHandle DmaHandle); + + +/** Gets the actual RDMA channel number from the DMA handle. This is + usefull for DSP development. Host code allocates the DMAHandle + gets the DMA number from that and creates the DMA handle on the + DSP side using GFXRmRDMAAlloc function. GFXRmRDMAAlloc needs to + know what DMA channel to use. + + @param DmaHandle RDMA handle. + @param dmaNumber RDMA channel number used the handle. + +*/ + +void +GFRmRDMAGetPortNumber(GFRmRdmaHandle DmaHandle, NvU32 *portNumber); + +#if NVCPU_IS_XTENSA + +// In XRM, it is expected that the dma handle is allocated on +// the Host side, and just the dma number is passed into code +// running on the Xtensa. These functions will setup a +// DMA handle that can used in the XRM. + + +GF_RETTYPE +GFXRmRDMAAlloc(NvU32 dmaNumber, GFRmRdmaHandle *DmaHandle); + + +GF_RETTYPE +GFXRmRDMARelease(GFRmRdmaHandle *DmaHandle); + +#endif // NVCPU_IS_XTENSA + + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + + +/*@}*/ + +/** @page pageRDMAAppNotes RDMA Application Notes + + General information about RDMA - RDMA is read DMA hw block. Unlike + traditional DMA, sw reads the data from the FIFO to system memory. This is + becasuse SC15 cannot bus master and write directly to the system memory. + RDMA will be faster becasue the data is buffered by the HOST1x Block and sw + reads back data in a tight loop. + + SC15 RDMA supports 2 modes - Linear(AKA NON-Rect) and Rect mode. + In both modes the sequence of programming same - setup and then read the data. + + RDMA setup is 2 step process. + - RDMA need to know which client will trigger the RDMA. It also need to other + parameters like which varies for linear and RECT modes. + In rect reads software has to setup the stride/width/number of lines. + This information is needed to describe a buffer. In case of non-rect + read a buffer header is expected, which describes the buffer. In both + cases one need to specify the number of buffers. + + - Client module also need to be setup, as it notifies the RDMA hw block when + the data is ready. This step is not needed for CPU triggered case, as the + data is already available in the memory. + + Sample program sequence: + + Setup RDMA + Setup Client side register (example - vi, SD etc...). Not needed when + setup for CLID CPU. + + wait till the data is available () + { + Read the data(..) + } + + Amount of data to read is either known a-priori (RECT mode) or read from + the header (linear mode). + + + As described ealier RDMA supports 2 modes + + Linear RDMA - RDMA expects a header in the memory right before the data, when + it is triggered. That header describes the length and the attributes of the + buffer. + + Depending on how the RDMA is setup, buffer header will be/will not be + (i.e RDMA_BUFFER_HEADER struct) readout. see #GF_RDMA_FLAGS_STR_HEADER + + When the header is returned the usage looks like + + RDMA_BUFFER_HEADER header; + GFRmRDMAReadHeader(...,&header); + While (header->bufferSize) + { + ... + GFRmReadRDMA(...) + } + + In this mode, it is important is to note that RDMA expect the buffer header + in the memory. So, this is not good for CPU triggerd case, as in that case + CPU should somehow write the buffer header to read the data already present + in the embedded memory. + + Rect RDMA - In this mode, there is no concept of buffer header. Exact size + should be programmed in the RDMA registers when the Setup is done. So, sw + should know how much data to pull out. Requests for data more than available + will result in timeout errors. + + A guideline: if an engine already generated the buffer for you, then use + non-rectangular read. Otherwise, use rect read. + +*/ + +#endif /* __GFRMRDMA_H__ */ diff --git a/Start_WM/test6/inc/GFRmScr.h b/Start_WM/test6/inc/GFRmScr.h new file mode 100755 index 00000000..1678ba09 --- /dev/null +++ b/Start_WM/test6/inc/GFRmScr.h @@ -0,0 +1,59 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#if !defined (__GFRMSCR_INC__) +#define __GFRMSCR_INC__ + +/* Surface ColorFormat - Follow GFBITMAP type (GF_BITMAP_xxx) */ + +#define GF_SURFACE_YUV420 1 +#define GF_SURFACE_YUV422 2 +#define GF_SURFACE_YUV444 4 +#define GF_SURFACE_ROTATED_YUV422 8 + +#define GF_SURFACE_YUYV (GF_SURFACE_YUV422|0x00000004) +#define GF_SURFACE_YVYU (GF_SURFACE_YUV422|0x00000008) +#define GF_SURFACE_UYVY (GF_SURFACE_YUV422|0x00000010) +#define GF_SURFACE_VYUY (GF_SURFACE_YUV422|0x00000020) +#define GF_SURFACE_MPEGDEC (GF_SURFACE_YUV420|0x00000040) + + +/** Image is for encoding purpose. Must combine with particular YUV format. */ +#define GF_SURFACE_MPEGENC 0x00000080 +#define GF_SURFACE_JPEGDEC (GF_SURFACE_YUV420|0x00000100) + +/** Image is for encoding purpose. Must combine with particular YUV format. */ +#define GF_SURFACE_JPEGENC 0x00000200 +#define GF_SURFACE_PLANAR_YUV422 0x400 +#define GF_SURFACE_RGB565 0x00010000 + +/** Used for 18 bpp (MSB bits) (18bpp MSB bits) case. */ +#define GF_SURFACE_RGB888 0x00020000 +#define GF_SURFACE_ARGB8888 0x00030000 +#define GF_SURFACE_ARGB1555 0x00040000 +#define GF_SURFACE_ARGB4444 0x00050000 + +/** Used for 18 bpp (LSB bits). */ +#define GF_SURFACE_RGB666 0x00060000 + +/** 8bpp surface. */ +#define GF_SURFACE_RGB8 0x00070000 +#define GF_SURFACE_RGB_MASK 0x000F0000 + +/** Bayer 8bit ColorFormat. */ +#define GF_SURFACE_BAYER8 0x00100000 + +/** Bayer 16bit ColorFormat. */ +#define GF_SURFACE_BAYER16 0x00200000 +#define GF_SURFACE_ABGR8888 0x00400000 + +/** YUV422 rotated averaging. */ +#define GF_SURFACE_PLANAR_YUV422RA 0x00800000 + +#endif diff --git a/Start_WM/test6/inc/GFTrace.h b/Start_WM/test6/inc/GFTrace.h new file mode 100755 index 00000000..4d50b3bd --- /dev/null +++ b/Start_WM/test6/inc/GFTrace.h @@ -0,0 +1,304 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* GFTrace.h: Tracing utility for GFSDK libraries. + * + * Features a suite of conditionally compilied tracing macros: + * + * GF_TRACE( a ): for "don't care" tracing - will be mapped + * to the DEBUG priority. + * + * And several others, each with a different priority. + * + * GF_TRACE_CRITICAL( a ) + * GF_TRACE_WARNING( a ) + * GF_TRACE_NORMAL( a ) + * GF_TRACE_VERBOSE( a ) + * GF_TRACE_DEBUG( a ) + * + * The trace macro parameter is treated as a printf style argument + * list, so it should be wrapped in double-parenthesis, such as: + * + * GF_TRACE(("Register value is: %x", reg)); + * + * Tracing is either handled via priorities (normal tracing). + * Tracing supports logging to a file (defaulting to "gfsdk.log") + */ + +#ifndef GF_RMTRACE_H +#define GF_RMTRACE_H + +/* Required for compilation: + * + * GF_TRACE_COMPONENTID [id] + * 'id' is a number 0 to GF_TRACE_COMPONENT_MAX. Tracing priorities + * and thresholds are set via the component id. + * + * Example usage of this header file: + * + * #define GF_TRACE_COMPONENTID GF_GXAPI + * #define GF_TRACE_ENABLE 1 + * #include "GFTrace.h" + * + * void + * foo( NvU32 x ) + * { + * GF_TRACE_DEBUG(("foo called with: %x", x )); + * } + * + */ + +#ifndef GF_TRACE_COMPONENTID +#error "GF_TRACE_COMPONENTID must be defined." +#endif + +#include +#include "GFRm.h" + +/* see GFRm.h for available component ids */ + +/* Compiliation options: + * + * GF_TRACE_ENABLE [0|1] + * If zero, will remove tracing for that file. + * + * GF_TRACE_GLOBAL_DISABLE + * If this is defined and set to 1 - tracing is force globally disabled. + * If not defined will be controlled by the GF_TRACE_ENABLE macro. + * + * GF_TRACE_GLOBAL_ENABLE + * If this is defined and set to 1 - tracing is force globally enabled. + * If not defined will be controlled by the GF_TRACE_ENABLE macro and + * GF_TRACE_GLOBAL_DISABLE macros. + * + * So, the precedence is GF_TRACE_GLOBAL_ENABLE > GF_TRACE_GLOBAL_DISABLE > + * GF_TRACE_ENABLE + * + * GF_TRACE_COMPONENTID_MAX [max] + * The maximum number of component ids that may exist for tracing. + * + * GF_TRACE_MESSAGESIZE_MAX [max] + * The maximum length of a tracing message, in bytes. + * + * GF_TRACE_DECORATE [0|1] + * Automatically add a newline, componentname and process ID to + * the output. + */ + +/* default for component id max */ +#ifndef GF_TRACE_COMPONENTID_MAX +#define GF_TRACE_COMPONENTID_MAX 32 +#endif + +/* default for message size max */ +#ifndef GF_TRACE_MESSAGESIZE_MAX +#define GF_TRACE_MESSAGESIZE_MAX 256 +#endif + +/* default for decoration is 1 */ +#ifndef GF_TRACE_DECORATE +#define GF_TRACE_DECORATE 1 +#endif + +#if defined(NV_MODS) + +/* By default enable everything for MODS */ +#undef GF_TRACE_ENABLE +#define GF_TRACE_ENABLE 1 + +#ifndef INCLUDED_GFMODS_H +#include "GFMods.h" +#endif + +#endif /* NV_MODS */ + +#if defined(GF_TRACE_GLOBAL_ENABLE) && defined(GF_TRACE_GLOBAL_DISABLE) +#error "Both GF_TRACE_GLOBAL_DISABLE and GF_TRACE_GLOBAL_ENABLE cannot be defined" +#endif + +/* global overrides */ +#ifdef GF_TRACE_GLOBAL_ENABLE + #undef GF_TRACE_ENABLE + #define GF_TRACE_ENABLE 1 +#endif + +#ifdef GF_TRACE_GLOBAL_DISABLE + #undef GF_TRACE_ENABLE + #define GF_TRACE_ENABLE 0 +#endif + +/* Several priorities from which to choose. Use the + * GFRmTrace*Threshold functions to limit tracing output. + * By deafult, all messages will be traced in a Debug build, + * only Warning, and Critical in a Release build. + * + * The priority numbers should exactly match the printing + * priorities in MODS. + */ +#define GF_TRACE_PRI_CRITICAL 5 +#define GF_TRACE_PRI_WARNING 4 +#define GF_TRACE_PRI_NORMAL 3 +#define GF_TRACE_PRI_VERBOSE 2 +#define GF_TRACE_PRI_DEBUG 1 + +/* Returns the current tracing threshold. + */ +NvU32 +GFRmTraceGetThreshold( NvU32 componentId ); + +/* Sets the current tracing threshold. All messages with an equal-to or + * greater-than priority will be traced. + */ +void +GFRmTraceSetThreshold( NvU32 componentId, NvU32 thresh ); + +/* Gets the current tracing priority. + */ +NvU32 +GFRmTraceGetPriority( NvU32 componentId ); + +/* Sets the current tracing priority for the given component. + */ +void +GFRmTraceSetPriority( NvU32 componentId, NvU32 pri ); + +/* Trace a message. Takes variable arguments that exactly match those + * of the libc printf family. Messages may or may not be controlled + * via a priority mechanism. + */ +void +GFRmTrace( NvU32 componentId, NvU32 priority, const char *msg, va_list args ); + +/* Tracing may be controlled via run-time as well as compile-time. + * The run-time options that are available (to be passed into + * GFRmTraceConfigure as the option flag) are: + * + * GF_TRACE_OPT_OUTPUT [ioname] + * The output device of normal tracing. Defaults to stdout. + * 'value' is a char *, max len is 256. Should be null-terminated. + * May be "default" or a filename. + * + * GF_TRACE_OPT_COMPONENT_ENABLE [id] [0|1] + * Component that have compiled in tracing can be turned off or + * back on. The configure value is a pointer to an array of two + * integers, the first is id, the second is the enable/disable. + * + * GF_TRACE_OPT_DECORATE [id] [0|1] + * Automatically add a newline and component id to the output. + * 1 for on, 0 for off. 'id' is the component id. + */ +#define GF_TRACE_OPT_OUTPUT 0 +#define GF_TRACE_OPT_COMPONENT_ENABLE 1 +#define GF_TRACE_OPT_DECORATE 2 + +/* Open the trace file. Called by GFRmOpen */ +GF_RETTYPE GFRmTraceOpen(void); + +/* Closes the trace file. Called by GFRmClose */ +void GFRmTraceClose(void); + +/* Run-time configuration for tracing. See the GF_TRACE_OPT + * flags for 'value' documentation. All configuration settings + * assigned via GFRmTraceConfigure() are global across all component + * ids, and should be synchronized if accessed by multiple threads. + * + * Returns 0 on failure, 1 otherwise. + */ +NvU32 +GFRmTraceConfigure( int option, void *value ); + +/* Returns a nice name for the component id. + * Note that this will always be defined (never compiled out). + */ +const char * +GFRmTraceGetComponentName( NvU32 componentId ); + +#if !GF_TRACE_ENABLE || NVCPU_IS_XTENSA + +#define GF_TRACE( a ) +#define GF_TRACE_CRITICAL( a ) +#define GF_TRACE_WARNING( a ) +#define GF_TRACE_NORMAL( a ) +#define GF_TRACE_VERBOSE( a ) +#define GF_TRACE_DEBUG( a ) + +#else /* tracing is enabled */ + +static NV_INLINE void GFRmTraceWithPriority(const char *msg, ...) +{ + va_list list; + NvU32 priority = 0; + + va_start( list, msg ); + + priority = GFRmTraceGetPriority( GF_TRACE_COMPONENTID ); + +#if !defined(NV_MODS) + GFRmTrace( GF_TRACE_COMPONENTID, priority, msg, list ); +#else + GFModsTrace( GF_TRACE_COMPONENTID, priority, msg, list ); +#endif + va_end( list ); +} + +/* component id will be defined to be -1 for the trace implementation. + * Each client must define component id before including this file. + * + * For a MODS build, GFRmTraceWithPriority() must call ModsDrvVPrintf(). + * See main/diag/mods/include/modsdrv.h for details. ModsDrvVPrintf() + * is called via GFModsTrace(). + */ +#if GF_TRACE_COMPONENTID >= 0 + +#define GF_TRACE( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_DEBUG ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_CRITICAL( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_CRITICAL ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_WARNING( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_WARNING ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_NORMAL( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_NORMAL ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_VERBOSE( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_VERBOSE ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_DEBUG( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_DEBUG ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) +#endif /* componentid check */ + +#endif /* enable trace */ + +#endif /* GFRMTRACE_H */ diff --git a/Start_WM/test6/inc/GFTypes.h b/Start_WM/test6/inc/GFTypes.h new file mode 100755 index 00000000..49145b10 --- /dev/null +++ b/Start_WM/test6/inc/GFTypes.h @@ -0,0 +1,65 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFTypes.h + * GFSDK standard data types. + */ + +#ifndef __GFTYPES_H__ +#define __GFTYPES_H__ + +#include "nvtypes.h" + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +/* Misc Helper macros on data types (deal with byte-endianness later ) */ +#ifndef MAKENvU32 +#define MAKENvU32(dataLo16, dataHi16) \ + (NvU32)(((NvU32)(dataHi16) << 16) | (NvU32)(dataLo16)) +#endif /* MAKENvU32 */ + +#ifndef MAKENvU16 +#define MAKENvU16(dataLo8, dataHi8) \ + (NvU16)(((NvU16)(dataHi8) << 8) | (NvU16)(dataLo8)) +#endif /* MAKENvU16 */ + +#if defined(__arm) +# define GFALIGN8 __align(1) +# define GFALIGN16 __align(2) +# define GFALIGN32 __align(4) +#elif defined(__IAR_SYSTEMS_ICC__) +# define GFALIGN8 +# define GFALIGN16 +# define GFALIGN32 +#elif defined(NV_LINUX) +# define GFALIGN8 +# define GFALIGN16 __attribute__ ((aligned (2))) +# define GFALIGN32 __attribute__ ((aligned (4))) +#elif defined(NVCPU_XTENSA) +# define GFALIGN8 +# define GFALIGN16 __attribute__ ((aligned (2))) +# define GFALIGN32 __attribute__ ((aligned (4))) +#elif defined(NV_WINDOWS) +# define GFALIGN8 +# define GFALIGN16 +# define GFALIGN32 +#else +# define GFALIGN8 +# define GFALIGN16 +# define GFALIGN32 +#endif + +#endif /* __GFTYPES_H__ */ diff --git a/Start_WM/test6/inc/GFVersion.h b/Start_WM/test6/inc/GFVersion.h new file mode 100755 index 00000000..399900be --- /dev/null +++ b/Start_WM/test6/inc/GFVersion.h @@ -0,0 +1,24 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFVersion.h + * GFSDK build version header file. + */ + +#ifndef __GFVERSION_H__ +#define __GFVERSION_H__ + +#define GF_MAJOR_VERSION 0x0017 +#define GF_MINOR_VERSION 0x0100 +#define GF_BUILD_NUMBER 1039 + + +#endif /* __GFVERSION_H__ */ + diff --git a/Start_WM/test6/inc/GFVx.h b/Start_WM/test6/inc/GFVx.h new file mode 100755 index 00000000..5af9e634 --- /dev/null +++ b/Start_WM/test6/inc/GFVx.h @@ -0,0 +1,3028 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFVx.h + GFSDK Video API header file. +*/ + +#ifndef __GFVX_H__ +#define __GFVX_H__ + +#include "GFRm.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#include "GFVxScr.h" + +/** @addtogroup groupVx VxAPI Video API +
        +
      • @ref pageVxOverview +
          +
        • @ref pageVxOverview1 +
        • @ref pageVxOverview2 +
        • @ref pageVxOverview3 +
        +
      • @ref pageVxAppNotes +
          +
        • @ref pageVxAppNotes1 +
        +
      +*/ +/*@{*/ + +/* GFVX Property Capability */ + +/** VxAPI property flag: Color space conversion supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_CSC 0x00000001 + +/** VxAPI property flag: VIP functions available. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_VIP 0x00000002 + +/** VxAPI property flag: Enlarge source image via VIP supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_ENLARGE 0x00000004 + +/** VxAPI property flag: Shrink source image via VIP supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_SHRINK 0x00000008 + +/** VxAPI property flag: Overlay supported. + The GoForce processor version supports overlay display. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_OVERLAY 0x00000020 + +/** VxAPI property flag: MPEG4 decoder supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_MPEGDEC 0x00000040 + +/** VxAPI property flag: MPEG4 encoder supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_MPEGENC 0x00000080 + +/** VxAPI property flag: JPEG decoder supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_JPEGDEC 0x00000100 + +/** VxAPI property flag: JPEG encoder supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_JPEGENC 0x00000200 + +/** VxAPI property flag: Alpha blending supported. + @version SC12 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_ALPHA_BLEND 0x00000400 + +/** VxAPI property flag: Extended RGB format 32 bpp supported. + @version SC12 above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_EXTEND_RGB 0x00000800 + +/** VxAPI property flag: Variable sized data camera interface (Type A/B/C) + supported. See section @ref pageVxOverview2 for information on Type A/B/C + camera interfaces. + @version SC12 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability, +*/ +#define GFVX_CAP_ENCODE_TYPE 0x00001000 + +/** VxAPI property flag: Bayer type camera interface supported. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability, +*/ +#define GFVX_CAP_BAYER_TYPE 0x00002000 // support bayer type input + +/** VxAPI property flag: YUV Overlay supported. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_OVERLAY_YUV 0x00004000 + +/** VxAPI property flag: Overlay with scaling supported. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_OVERLAY_SCALE 0x00008000 + +/** VxAPI property flag: Multiple Overlay supported. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_OVERLAY_MULTIPLE 0x00010000 + +/** VxAPI property flag: Per pixel alpha supported. + Used when application wants to use weight (overlay and blend) + defined in pixels alpha bits. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_PER_PIXEL_ALPHA 0x00020000 + +/** VxAPI GFVXBLT::BltOption flagbit: Disable VSync wait. + Disable GFVxBlt() synchronization with VSync. The default behaviour of + GFVxBlt() is to wait for VSync to prevent display flicker. Note that + if the display is disabled there is no VSync signal and GFVxBlt() + would block. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_DISABLE_WAIT_VSYNC 0x00000080 + +/** VxAPI GFVXBLT::BltOption flagbit: Source color key. + GFVxBlt() compares each pixel of the source surface with the color key. + If the colors match, the pixel is not copied to the destination surface. + + The source color key option is not very useful when scaling is used. + + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_SRC_KEY 0x00000100 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-blit at end of VIP frame. + If this flag is set, GFVxBlt() configures blit parameters for + VIP auto-blit. VIP auto-blit can be used to fire stretch blit automatically + at the end of the video input frame from the video input port (VIP). This + requires double buffering of the input and output of stretch blit. The use + of this flag is to be combined with GFVxVIPUpdate() flag + #GFVX_VIP_AUTO_TRIGER_BLT. + @see GFVXBLT, GFVxBlt(), #GFVX_VIP_AUTO_TRIGER_BLT +*/ +#define GFVX_AUTO_BLT 0x00000400 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-blit at end of VIP frame. + This flag is the same as #GFVX_AUTO_BLT + @version SC15 and above only + @see GFVXBLT, GFVxBlt(), #GFVX_VIP_AUTO_TRIGER_BLT, #GFVX_AUTO_BLT +*/ +#define GFVX_BLT_AUTO_VI 0x00000400 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-display destination surface. + The application does not need call GFVxFlip() to show the surface. + With the auto-display option, the VI module triggers stretch blit which + in turn sends the destination surface's buffer address to the display + controller (GC). VI input data goes into double buffers which become the + stretch blit source, the output of stretch blit is also double buffered. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_AUTO_DISPLAY 0x00000800 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-display destination surface. + This flag is the same as #GFVX_AUTO_DISPLAY + @version SC15 and above only + @see GFVXBLT, GFVxBlt(), #GFVX_AUTO_DISPLAY +*/ +#define GFVX_BLT_AUTO_DISPLAY 0x00000800 + +/** VxAPI GFVXBLT::BltOption flagbit: Set up parameters for partial blit + If this flag is set, GFVxBlt() configures blit parameters for + partial blit. The partial blit works only with circular buffers and + source and destination format are not YUV planar format. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_PARTIAL 0x00001000 + +/** VxAPI GFVXBLT::BltOption flagbit: Trigger partial blit + If this flag is set, GFVxBlt() will blit buffer specified + in buffer index option of circular buffers to destination surface. + The use of this flag is to be combined with GFVxBlt() flag + #GFVX_BLT_PARTIAL. + @see GFVXBLT, GFVxBlt(), #GFVX_BLT_PARTIAL +*/ +#define GFVX_BLT_PARTIAL_TRIGGER 0x00002000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit without rotation + If this flag is set, GFVxBlt() blits without rotation + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ROTATE_0 0x00004000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with 90 degree rotation + If this flag is set, GFVxBlt() blits with 90 degree rotation + Currently, SC15 doesn't support this feature. However, this flag + can be combined with flag GFVX_BLT_H_FLIP to blit with XY swap + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ROTATE_90 0x00008000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with 180 degree rotation + If this flag is set, GFVxBlt() blits with 180 degree rotation + Currently, SC15 doesn't support this feature. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ROTATE_180 0x00010000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with 270 degree rotation + If this flag is set, GFVxBlt() blits with 270 degree rotation + Currently, SC15 doesn't support this feature. However, this flag + can be combined with flag GFVX_BLT_V_FLIP to blit with XY swap + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ROTATE_270 0x00020000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with horizontal flip + If this flag is set, GFVxBlt() blits with horizontal flip + Currently, SC15 doesn't support this feature. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_H_FLIP 0x00040000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with vertical flip + If this flag is set, GFVxBlt() blits with vertical flip + Currently, SC15 doesn't support this feature + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_V_FLIP 0x00080000 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-display destination surface + using overlay window 2. This is exactly identical to #GFVX_AUTO_DISPLAY + except that it uses overlay window 2 instead of overlay window 1 (default). + + @version SC15 and above only + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_AUTO_DISPLAY_OVERLAY2 0x00100000 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-display destination surface + using overlay window 2. This flag is the same as #GFVX_AUTO_DISPLAY_OVERLAY2 + @version SC15 and above only + @see GFVXBLT, GFVxBlt(), #GFVX_AUTO_DISPLAY_OVERLAY2 +*/ +#define GFVX_BLT_AUTO_DISPLAY_OVERLAY2 0x00100000 + +/** VxAPI GFVXBLT::BltOption flagbit: Enables full range in color spce conversion + 0<= Y <=255, -128<= U <=127, -128<= V <=127 + YUV-->RGB conversion formula: + R = 1.000Y + 1.402V + G = 1.000Y - 0.344U - 0.714V + B = 1.000Y + 1.772U + This option is useful for decoded video from movies. + When this flag is not set, uses CCIR601 range (16-235) as follows: + 16<= Y <=235, 16<= U <=240, 16<= V <=240 + YUV-->RGB conversion formula: + R = 1.164(Y-16) + 1.596(Cr-128) + G = 1.164(Y-16) - 0.391(Cb-128) - 0.813(Cr-128) + B= 1.164(Y-16) + 2.018(Cb-128) + This option is useful for video from camera. + @version SC15 and above only + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_CSC_FULL_RANGE 0x00200000 + +/** VxAPI GFVXBLT::BltOption flagbit: Enable camera VSync wait. + Enable GFVxBlt() synchronization with camera VSync. Note that + if the camera is disabled there is no VSync signal and GFVxBlt() + would block. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ENABLE_WAIT_CAMERA_VSYNC 0x00400000 + +/** VxAPI GFVXBLT::BltOption flagbit: Disable vertical and horizontal filters + By default, the vertical and horizontal filters are enabled. If this flag + is set, GFVxBlt() blits with filters disabled + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_DISABLE_FILTERS 0x00800000 + +/** VxAPI option parameter of routines GFVxBltSetCSCCoefff() + and GFVxVIPSetCSCCoeff() to use CCIR601 range + + CSC_USE_CCIR601_RANGE (16-235) as follows: + 16<= Y <=235, 16<= U <=240, 16<= V <=240 + YUV-->RGB conversion formula: + + R = sat(KYRGB*(Y + YOF) + KUR*U + KVR*V) + G = sat(KYRGB*(Y + YOF) + KUG*U + KVG*V) + B = sat(KYRGB*(Y + YOF) + KUB*U + KVB*V) + + The CSC coefficients are: + + KYRGB, KUR, KVR 1.1644 0.0000 1.5960 + KYRGB, KUG, KVG = 1.1644 -0.3918 -0.8130 + KYRGB, KUB, KVB 1.1644 2.0172 0.0000 + + and YOF = -16.0000 + This option is useful for video from camera. + + @see GFVxBltSetCSCCoeff(), GFVxVIPSetCSCCoeff() +*/ +#define GFVX_SET_CSC_USE_CCIR601_RANGE 0x00800000 + +/** VxAPI option parameter of routines GFVxBltSetCSCCoefff() + and GFVxVIPSetCSCCoeff() to use full range in color space conversion + + CSC_USE_FULL_RANGE + 0<= Y <=255, -128<= U <=127, -128<= V <=127 + YUV-->RGB conversion formula: + + R = sat(KYRGB*(Y + YOF) + KUR*U + KVR*V) + G = sat(KYRGB*(Y + YOF) + KUG*U + KVG*V) + B = sat(KYRGB*(Y + YOF) + KUB*U + KVB*V) + + The CSC coefficients are: + + KYRGB, KUR, KVR 1.0000 0.0000 1.4020 + KYRGB, KUG, KVG = 1.0000 -0.3440 -0.7140 + KYRGB, KUB, KVB 1.0000 1.7720 0.0000 + + and YOF = 0.0000 + This option is useful for decoded video from movies. + @see GFVxBltSetCSCCoeff(), GFVxVIPSetCSCCoeff() +*/ +#define GFVX_SET_CSC_USE_FULL_RANGE 0x01000000 + +/** VxAPI option parameter of routines GFVxBltSetCSCCoefff() + and GFVxVIPSetCSCCoeff() to use user defined range + provided in option parameter pCoeff pointer to GFVXCSCCOEF struct + + @see GFVxBltSetCSCCoeff(), GFVxVIPSetCSCCoeff() +*/ +#define GFVX_SET_CSC_USE_USER_DEFINED_RANGE 0x02000000 +/** Structure to control GFVxBlt() behaviour. + @see GFVxBlt() +*/ + +typedef struct _GFVXBLT +{ + PGFRMSURFACE *ppDestSurf; /**< Pointer to an array of destination + surfaces of identical dimensions. + + For passing scaled YUV output data to + the planar block as input to the + JPEG/MPEG encoder, pass an array containing + one NULL pointer. + + Destination surface dimensions limitations: + + + + + + + +
      Minimum stride0 bytes
      Minimum width 1
      Minimum height1
      Maximum stride4095 bytes
      Maximum width 4064 (YUV) + (YUV data restricted by JPEG encoder),
      + 32767 (RGB) + (RGB data restricted by stride) +
      Maximum height32766, or unlimited + if \a pDestRect is specified
      + + If the destination color format is YUV (pass to + JPEG/MPEG EPP, and \a pDestRect is not specified, + the surface width must be a multiple of 2. + */ + PGFRMSURFACE *ppSrcSurf; /**< Pointer to an array of source surfaces + of identical dimensions. + Source surface dimensions limitations: + + + + + + + +
      Minimum stride0 bytes
      Minimum width 1
      Minimum height1
      Maximum stride4095 bytes
      Maximum width + 16383 (SC15), + 2032 (SC12), + 496 (SC5, RGB or YUV422), 512 (SC5), + 496 (SC10, SC4), + 312 (SC3 and below), + or unlimited if \a pSrcRect is specified +
      Maximum height32766, or unlimited + if \a pDestRect is specified
      + */ + PGFRECT pDestRect; /**< Destination rectangle, or NULL to blit + scaled to the size of the entire target + surface (size of first surface in + \a ppDestSurf is used). + Destination cropping rectangle limitations: + + + + + +
      Minimum width 1
      Minimum height1
      Maximum width 4064 (YUV), + 32767 (RGB) +
      Maximum height32766
      + + If the destination color format is YUV (pass to + JPEG/MPEG EPP), the destination cropping rectangle's + width must be a multiple of 2. + */ + PGFRECT pSrcRect; /**< Source cropping rectangle, or NULL for + no cropping and blit the entire source + surface (size of first surface in + \a ppSrcSurf is used). + Source cropping rectangle limitations: + + + + + +
      Minimum width 1
      Minimum height1
      Maximum width + 16383 (SC15), + 2032 (SC12), + 496 (SC5, RGB or YUV422), 512 (SC5), + 496 (SC10, SC4), + 312 (SC3 and below) +
      Maximum height32766
      + */ + NvU32 numofDestSurf;/**< Number of destination surfaces in array + \a ppDestSurf, used only if + #GFVX_AUTO_BLT flag set + */ + NvU32 numofSrcSurf; /**< Number of source surfaces in array + \a ppSrcSurf, used only if + #GFVX_AUTO_BLT flag or #GFVX_BLT_PARTIAL flag set + */ + NvU32 colorKey; /**< Color key value in RGB888 format */ + NvU32 BltOption; /**< Flag bitmask: + + + + + + + + + + + + + + + + +
      #GFVX_BLT_DISABLE_WAIT_VSYNCDisable VSync +
      #GFVX_BLT_SRC_KEYSource color key +
      #GFVX_AUTO_BLTAuto-blit at end of VIP frame +
      #GFVX_AUTO_DISPLAYAuto-show destination surface +
      #GFVX_AUTO_DISPLAY_OVERLAY2Auto-show destination surface from overlay window 2 +
      #GFVX_BLT_PARTIALConfigure partial blit parameters +
      #GFVX_BLT_PARTIAL_TRIGGERTrigger partial blit at end of circular buffer +
      #GFVX_BLT_ENABLE_WAIT_CAMERA_VSYNCEnable wait for camera VSYNC +
      + */ + // Fill The following fields if GFVX_BLT_PARTIAL_TRIGGER is set in BltOption + NvU32 FrameStart; /* @Notify start of frame. + Used only if #GFVX_BLT_PARTIAL_TRIGGER is set + in \a BltOption. + */ + NvU32 FrameEnd; /* @Notify end of frame. + Used only if #GFVX_BLT_PARTIAL_TRIGGER is set + in \a BltOption. + */ + NvU32 BufferIndex; /* @Specify which buffer of circular buffers is blitted. + Used only if #GFVX_BLT_PARTIAL_TRIGGER is set + in \a BltOption. + */ +} GFVXBLT, *PGFVXBLT; + +/** VxAPI GFVXFLIP::FlipOption flagbit: Flip uses second overlay window. + + By default, VxFlip associates foreground and background surfaces + to first overlay window and flips them. However, the application can override + the default behavior and use second overlay window by using this flag in FlipOption. + + This option should be used only if second overlay surface has been + previously set using UpdateOverlay(). . + + @version SC15 and above only + @see GFVXFLIP, GFVxFlip() +*/ +#define GFVX_FLIP_OVERLAY2 0x00000001 + +/** Structure to control GFVxFlip() behaviour. + @see GFVxFlip() +*/ +typedef struct _GFVXFLIP +{ + PGFRMSURFACE pBackGroundSurf; /**< Pointer to the surface to be flipped + to the background. This surface will + not be seen anymore after the + GFVxFlip() call. + */ + PGFRMSURFACE pForeGroundSurf; /**< Pointer to the surface to be flipped + to the foreground. This surface will + be seen after the GFVxFlip() call. + */ + NvU32 FlipOption; + /**< Flagbit mask controlling flip: + + + + + +
      0 Default. Flip uses first overlay window
      GFVX_FLIP_SECOND_OVERLAY Flip uses second overlay window
      + */ +} GFVXFLIP, *PGFVXFLIP; + + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay without rotation. + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_ROTATE_0 GF_SURFACE_ROTATE_0 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay with 180 degree rotation. + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_ROTATE_180 GF_SURFACE_ROTATE_180 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay with horizontal + flip. + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_H_FLIP 0x00000010 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay with vertical + flip. + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_V_FLIP 0x00000020 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Source color keying. + + A pixel from the source (overlay) surface is displayed only if pixel + color from the source surface matches the color key in + GFVXUPDATEOVERLAY::ColorKey. + + Source color keying is not useful for video overlay, because changing + video is the source. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay(), GFVX_UO_DEST_COLOR_KEY +*/ +#define GFVX_UO_SRC_COLOR_KEY 0x00010000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Destination color keying. + + A pixel from the source (overlay) surface is displayed only if pixel + color from the destination surface matches the color key in + GFVXUPDATEOVERLAY::ColorKey. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay(), GFVX_UO_SRC_COLOR_KEY +*/ +#define GFVX_UO_DEST_COLOR_KEY 0x00020000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Alpha blending. + Enable alpha blending. Alpha value is used from + GFVXUPDATEOVERLAY::AlphaValue. + + As AlphaVal increases, the weight of source (overlay) window increases + until the window reaches its maximum weight of 0xFF. + + Even though AlphaVal is a 32 bit number, alpha value can only be a 8 bit value. + Application should specify the same value in byte 1 (LSB), 2 and 3 else the API + will fail. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_ALPHA_BLENDING 0x00040000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay based on + destination alpha only. + + If destination is in 1-bit alpha format (eg ARGB1555), GFVXUPDATEOVERLAY::ColorKey bit[24] + contains the alpha value. GFVxUpdateOverlay() compares this value with + the target surface's alpha and ignores the RGB value. Overlay (source) surface + shows up in portions of the screen where the two match. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_COLOR_KEY_ALPHA_ONLY 0x00080000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay based on + destination alpha and color + + If destination is in 1-bit alpha format (eg ARGB1555), + GFVXUPDATEOVERLAY::ColorKey bit [24] contains alpha and + GFVXUPDATEOVERLAY::ColorKey bit [23:0] contains RGB color values. + GFVxUpdateOverlay() compares the key's alpha value and + color values with destination surface pixels. + + Overlay (source) surface shows up in portions of the screen where both + alpha and color values match. + + If neither #GFVX_UO_COLOR_KEY_ALPHA_ONLY nor #GFVX_UO_COLOR_KEY_ALPHA_COLOR are + set, GFVxUpdateOverlay() assumes the RGB values in + GFVXUPDATEOVERLAY::ColorKey to be valid and compares the RGB value with + surface's RGB value. Depending upon whether #GFVX_UO_SRC_COLOR_KEY or + #GFVX_UO_DEST_COLOR_KEY is defined, RGB value is compared with source or + destination pixels. If neither #GFVX_UO_SRC_COLOR_KEY nor #GFVX_UO_DEST_COLOR_KEY + is defined, overlay(source) surface is overlayed on top of destination surface + without any match. #GFVX_UO_COLOR_KEY_ALPHA_ONLY nor #GFVX_UO_COLOR_KEY_ALPHA_COLOR + if defined, are ignored. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_COLOR_KEY_ALPHA_COLOR 0x00100000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Alpha blending based on + destination alpha. + + If destination is in 1-bit alpha format (eg ARGB1555), + GFVXUPDATEOVERLAY::BlendingColorKey bit [24] contains an alpha value. + GFVxUpdateOverlay() compares this value with the destination surface's + alpha only and ignores the RGB value. + + If the two match, GFVXUPDATEOVERLAY::AlphaValue determines the weight + of source surface. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY 0x00200000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Alpha blending based on + destination alpha and color + + If destination is in 1-bit alpha format (eg ARGB1555), + GFVXUPDATEOVERLAY::BlendingColorKey bit [24] contains an alpha value and + GFVXUPDATEOVERLAY::BlendingColorKey bit [23:0] contains RGB values. + GFVxUpdateOverlay() compares alpha value and color value with the + destination surface's alpha and color value. + + Source and destination pixels appear blended in portions of the screen where both + alpha and color values match. GFVXUPDATEOVERLAY::AlphaValue determines the weight + of source surface. + + If neither #GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY nor #GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR + are set, GFVxUpdateOverlay() assumes the RGB portion in the key to be + valid and compares the RGB value with the surface's RGB value. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR 0x00400000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Enable Second overlay window + + SC15 supports two overlay windows. This flag is used to enable + the second overlay window. + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_OVERLAY2 0x00800000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Show this overlay window on top + + When more than one overlay windows are enabled and their destination rectangles + overlap, this flag can be defined to indicate which overlay window should appear + on top. + + By default, first overlay window will appear on top if destination + rectangles for the two windows overlap. However, application can override the + default behavior by specifying #GFVX_UO_ACTIVETOP flag in relevant windows's + UpdateOption. + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_ACTIVETOP 0x01000000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay and Blend weight + comes from per-pixel alpha channel. + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_COLOR_KEY_PER_PIXEL_ALPHA 0x02000000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Enable digital vibrance for + overlay. + + If this bit is set in UpdateOption, then dvRed, dvGreen and dvBlue must be + set in UpdateOverlay structure for overlay window. + + If this bit is set in UpdateOption2, then dvRed2, dvGreen2 and dvBlue2 must be + set in UpdateOverlay structure for overlay2 window. + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_DIGITAL_VIBRANCE 0x04000000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption2 flagbit: Enable AlphaValue2 + + If this bit is set in UpdateOption2, then the alpha value is used + from GFVXUPDATEOVERLAY::AlphaValue2 + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_USE_ALPHAVALUE2 0x08000000 + +/** Structure for controlling GFVxUpdateOverlay() behaviour. + @see GFVxUpdateOverlay() +*/ +typedef struct _GFVXUPDATEOVERLAY +{ + PGFRMSURFACE pDestSurf; /**< Destination surface pointer */ + PGFRMSURFACE pSrcSurf; /**< Source surface pointer, if this pointer + is NULL, disable overlay. + */ + PGFRECT pDestRect; /**< Destination rectangle */ + PGFRECT pSrcRect; /**< Source rectangle */ + NvU32 ColorKey; /**< Color key value in ARGB32 format. + Color keying takes effect only when + #GFVX_UO_SRC_COLOR_KEY or + #GFVX_UO_DEST_COLOR_KEY is set. + */ + NvU32 UpdateOption; + /**< Flagbit mask controlling rotation, color keying: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_UO_ROTATE_0 Overlay without rotation
      #GFVX_UO_ROTATE_180 Overlay with 180 degree rotation
      #GFVX_UO_H_FLIP Overlay with horizontal flip
      #GFVX_UO_V_FLIP Overlay with vertical flip
      #GFVX_UO_SRC_COLOR_KEY Source color keying
      #GFVX_UO_DEST_COLOR_KEY Destination color keying
      #GFVX_UO_ALPHA_BLENDING Alpha blending
      #GFVX_UO_COLOR_KEY_ALPHA_ONLY Overlay based on destination alpha
      #GFVX_UO_COLOR_KEY_ALPHA_COLOR Overlay based on destination alpha and color
      #GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY Alpha Blending based on destination alpha
      #GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR Alpha Blending based on destination alpha and color
      #GFVX_UO_OVERLAY2 Enable second overlay window
      #GFVX_UO_ACTIVETOP Show this overlay window on top
      #GFVX_UO_DIGITAL_VIBRANCE Enable digital vibrance for first overlay window
      + */ + NvU32 BlendingColorKey; + /**< Blending color key value in ARGB32 format. + Value takes effect only when #GFVX_UO_ALPHA_BLENDING and + (#GFVX_UO_SRC_COLOR_KEY or #GFVX_UO_DEST_COLOR_KEY) + are set. + */ + NvU32 AlphaValue; + /**< Alpha value for blending overlay. + Alpha value is used to do blending when + blending color key matches. Even though AlphaVal + is a 32 bit number, alpha value can only be a 8 bit value. + Application should specify the same value in byte 1 (LSB), + 2 and 3 else the API will fail. + */ + + PGFRMSURFACE pDestSurf2; /**< Destination surface pointer for second overlay */ + PGFRMSURFACE pSrcSurf2; /**< Source surface pointer for second overlay, + if this pointer is NULL, disable second overlay. + */ + PGFRECT pDestRect2; /**< Destination rectangle for second overlay */ + PGFRECT pSrcRect2; /**< Source rectangle for second overlay */ + NvU32 UpdateOption2; + /**< Flagbit mask controlling rotation, color keying for second overlay: + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_UO_ROTATE_0 Overlay without rotation
      #GFVX_UO_ROTATE_180 Overlay with 180 degree rotation
      #GFVX_UO_H_FLIP Overlay with horizontal flip
      #GFVX_UO_V_FLIP Overlay with vertical flip
      #GFVX_UO_SRC_COLOR_KEY Source color keying
      #GFVX_UO_DEST_COLOR_KEY Destination color keying
      #GFVX_UO_ALPHA_BLENDING Alpha blending
      #GFVX_UO_COLOR_KEY_ALPHA_ONLY Overlay based on destination alpha
      #GFVX_UO_COLOR_KEY_ALPHA_COLOR Overlay based on destination alpha and color
      #GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY Alpha Blending based on destination alpha
      #GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR Alpha Blending based on destination alpha and color
      #GFVX_UO_ACTIVETOP Show this overlay window on top
      #GFVX_UO_DIGITAL_VIBRANCE Enable digital vibrance for second overlay window
      + */ + NvU8 dvRed; /**< Digital vibrance amplification factor for R overlay. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvRed's valid value range + is 1 to 100. + */ + NvU8 dvGreen; /**< Digital vibrance amplification factor for G overlay. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvGreen's valid value range + is 1 to 100. + */ + NvU8 dvBlue; /**< Digital vibrance amplification factor for B overlay. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvBlue's valid value range + is 1 to 100. + */ + NvU8 dvRed2; /**< Digital vibrance amplification factor for R overlay2. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvRed2's valid value range + is 1 to 100. + */ + NvU8 dvGreen2; /**< Digital vibrance amplification factor for G overlay2. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvGreen2's valid value range + is 1 to 100. + */ + NvU8 dvBlue2; /**< Digital vibrance amplification factor for B overlay2. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvBlue2's valid value range + is 1 to 100. + */ + NvU32 AlphaValue2; + /**< Alpha value for blending Window C overlay. + Same restriction as for GFVXUPDATEOVERLAY::AlphaValue apply. + */ + +} GFVXUPDATEOVERLAY, *PGFVXUPDATEOVERLAY; + + +/** Parameter structure for GFVxVIPFeedImage(). + This structure describes the image data that is to be fed to the VIP + via the CPU host. + @see GFVxVIPFeedImage() +*/ +typedef struct _GFVXVIPFEEDIMAGE +{ + PGFRMSURFACE pSurf; /**< Surface to feed data from, must be in a YUV + format and accessible by the host CPU + */ + PGFRECT pSrcRect; /**< Source clipping rectangle for data feeding, or + NULL for no clipping + */ +} GFVXVIPFEEDIMAGE, *PGFVXVIPFEEDIMAGE; + + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP supports image shrinking. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_SHRINK 0x00000001 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP supports image enlarging. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_ENLARGE 0x00000002 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: Parallel video input supported. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_PARALLEL 0x00000004 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: Serial video input supported. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_SERIAL 0x00000008 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: Vertical and horizontal flip supported + for VIP output RGB image. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_RGB_VH_FLIP 0x00000010 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can supply VClock and VHSync + signals to the camera chip. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_OUTPUT_VCLOCK_VHSYNC 0x00000020 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can supply a master clock to the + camera chip. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_OUTPUT_MASTER_CLOCK 0x00000040 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept a JPEG bitstream from + a camera with type A interface. + See section @ref pageVxOverview2 for description of type A, B, and C + interfaces. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_TYPE_A 0x00000080 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept a JPEG bitstream from + a camera with type B interface. + See section @ref pageVxOverview2 for description of type A, B, and C + interfaces. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_TYPE_B 0x00000100 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept a JPEG bitstream from + a camera with type C interface. + See section @ref pageVxOverview2 for description of type A, B, and C + interfaces. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_TYPE_C 0x00000200 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept Bayer format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_BAYER 0x00000400 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept RGB565 format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_RGB565 0x00000800 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept RGB888 format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_RGB888 0x00001000 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept RGB444 format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_RGB444 0x00002000 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept YUV420NP format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_YUV420NP 0x00004000 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept JPEG image from camera + through type C_RAW interface. See section @ref pageVxOverview2. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_TYPE_C_RAW 0x00008000 + +/** Structure used by GFVxVIPGetProperty() to describe VIP capabilities. + @see GFVxVIPGetProperty() +*/ +typedef struct _GFVXVIPPROPERTY +{ + NvU32 Flag; /**< Flag bitmask describing VIP capabilities: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_VIP_CAP_SHRINKVIP supports image shrinking
      #GFVX_VIP_CAP_ENLARGEVIP supports image enlarging
      #GFVX_VIP_CAP_PARALLELParallel video input supported
      #GFVX_VIP_CAP_SERIALSerial video input supported
      #GFVX_VIP_CAP_RGB_VH_FLIPVertical and horizontal flip supported for VIP + output RGB image
      #GFVX_VIP_CAP_OUTPUT_VCLOCK_VHSYNCVIP can supply VClock and VHSync signals to the + camera chip
      #GFVX_VIP_CAP_OUTPUT_MASTER_CLOCKVIP can supply a master clock to the + camera chip
      #GFVX_VIP_CAP_TYPE_AVIP can accept a JPEG bitstream from a camera with + type A interface
      #GFVX_VIP_CAP_TYPE_BVIP can accept a JPEG bitstream from a camera with + type B interface
      #GFVX_VIP_CAP_TYPE_CVIP can accept a JPEG bitstream from a camera with + type C interface
      #GFVX_VIP_CAP_BAYERVIP can accept Bayer format input
      #GFVX_VIP_CAP_RGB565VIP can accept RGB565 format input
      #GFVX_VIP_CAP_RGB888VIP can accept RGB888 format input
      #GFVX_VIP_CAP_RGB444VIP can accept RGB444 format input
      #GFVX_VIP_CAP_YUV420NPVIP can accept YUV420NP format input
      #GFVX_VIP_CAP_TYPE_C_RAWVIP can accept JPEG image from Camera through + type C_RAW interface
      + */ + NvU32 DestFormat;/**< Supported color formats at VIP output, the returned + value is a logically OR'ed combination of the + following surface identifiers: + + + + + + + + + + + + + + + +
      #GF_SURFACE_YUYVYUV422 in YUYV order
      #GF_SURFACE_YVYUYUV422 in YVYU order
      #GF_SURFACE_UYVYYUV422 in UYVY order
      #GF_SURFACE_VYUYYUV422 in VYUY order
      #GF_SURFACE_RGB565RGB565, 16 bpp
      #GF_SURFACE_RGB888RGB888, 24 bpp
      #GF_SURFACE_ARGB8888ARGB8888, 32 bpp
      + To check if a specific colour format is + supported, logically AND \a DestFormat against the + format identifier and compare it as below: + 
      +    if ((DestFormat & GF_SURFACE_RGB565) == GF_SURFACE_RGB565)
+    {
+        // RGB565 is supported
+    }
+
      + */ + NvU32 HMaxNumerator; /**< Maximum horizontal numerator for VI + decimation. VI decimation is configured via + GFVxVIPSetVIP(), GFVXVIPINFO::HNumerator's + valid value range is 1 to \a HMaxNumerator. + */ + NvU32 HMaxDenominator; /**< Maximum horizontal denominator for VI + decimation. VI decimation is configured via + GFVxVIPSetVIP(), GFVXVIPINFO::HDenominator's + valid value range is 1 to \a HMaxDenominator. + */ + NvU32 VMaxNumerator; /**< Maximum vertical numerator for VI decimation. + VI decimation is configured via + GFVxVIPSetVIP(), GFVXVIPINFO::VNumerator's + valid value range is 1 to \a VMaxNumerator. + */ + NvU32 VMaxDenominator; /**< Maximum vertical denominator for VI decimation. + VI decimation is configured via + GFVxVIPSetVIP(), GFVXVIPINFO::VDenominator's + valid value range is 1 to \a VMaxDenominator. + */ +} GFVXVIPPROPERTY, *PGFVXVIPPROPERTY; + + +/** Structure used to describe the input frame size if input data format is Bayer. + This structure is not used when input source is VIP. + @see +*/ +typedef struct _GFVXBAYERINPUTFRAME +{ + NvU16 Width; /**< Host Input source width. */ + NvU16 Height; /**< Host Input source height. */ +} GFVXBAYERINPUTFRAME, *PGFVXBAYERINPUTFRAME; + +/** Structure used to describe ISP scan size if input data format is Bayer. + Scan size is camera specific. + + The application should populate this structure with + values filled by GFCameraSetup() in GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo. + The application should also configure ISP with values in + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ScanWidth and + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ScanHeight. + + This structure is used only when input source is VIP and input data format is Bayer. + + @see GFISPIMGTIMING +*/ +typedef struct _GFVXBAYERSCANSIZE +{ + NvU16 HScan; /**< VIP input signal horizontal scan size. */ + NvU16 VScan; /**< VIP input signal vertical scan size. */ +} GFVXBAYERSCANSIZE, *PGFVXBAYERSCANSIZE; + +/** Structure used to describe ISP Active Area if input data format is Bayer. + Active Area is camera specific. + + The application should populate this structure with + values filled by GFCameraSetup() in GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo. + The application should also configure ISP with values in + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ActiveFrameStart, + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ActiveLineStart, + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ActiveFrameHeight and + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ActiveLineWidth. + + Active Area rectangle should fall inside the Scan Size. + This structure is used only when input source is VIP and input data format is Bayer. + + @see GFISPIMGTIMING +*/ +typedef struct _GFVXBAYERACTIVEAREA +{ + NvU16 LineStart; /**< VIP input signal horizontal active offset. */ + NvU16 FrameStart; /**< VIP input signal vertical active offset. */ + NvU16 LineWidth; /**< VIP input signal horizontal active width. */ + NvU16 FrameHeight; /**< VIP input signal vertical active height. */ +} GFVXBAYERACTIVEAREA, *PGFVXBAYERACTIVEAREA; + +/** Structure used to describe ISP Output Area if input data format is Bayer. + + This structure is not used by VI. It is used to configure ISP. + Output Area rectangle can be equal to or less than Active Area rectangle. + This structure is used only when input source is VIP and input data format is Bayer. + + @see GFISPIMGTIMING +*/ +typedef struct _GFVXBAYEROUTPUTAREA +{ + NvU16 LineStart; /**< VIP input signal horizontal output offset. */ + NvU16 FrameStart; /**< VIP input signal vertical output offset. */ + NvU16 LineWidth; /**< VIP input signal horizontal output width. */ + NvU16 FrameHeight; /**< VIP input signal vertical output height. */ +} GFVXBAYEROUTPUTAREA, *PGFVXBAYEROUTPUTAREA; + + +/** Structure used to describe the rectangles needed by ISP to properly process Bayer input from camera. + This structure is used only when input source is VIP and input data format is Bayer. + + @see GFVXBAYERINPUTFRAME, GFVXBAYERSCANSIZE, GFVXBAYERACTIVEAREA, GFVXBAYEROUTPUTAREA +*/ +typedef struct _GFVXBAYERINFO +{ + PGFVXBAYERINPUTFRAME pInputFrameSize; /**< For VIP input, this field is not used. + */ + PGFVXBAYERSCANSIZE pScanSize; /**< ISP Scan Size. + Scan size is camera specific. This field is set + by GFCameraAPI in GFCAMERARESOLUTIONTYPE::pBayerInfo. + */ + PGFVXBAYERACTIVEAREA pActiveArea; /**< ISP Active Area. + Active Area is camera specific. This field is set + by GFCameraAPI in + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo. + Active Area rectangle should fall inside the Scan Size. + */ + PGFVXBAYEROUTPUTAREA pOutputArea; /**< ISP Output Area. This field is not used by VI. + Output Area rectangle can be equal to or less than + Active Area rectangle. + */ + NvU8 DemosaicKernelSize; /**< For VIP input, this field is not used. + */ + NvU16 IspDownscaleUsed; /**< Use Isp downscale (Only for sc17 and above) + */ +} GFVXBAYERINFO, *PGFVXBAYERINFO; + + +///////////Cindy: Following is CSI defination. + +/* flags optoins */ + +/** Pixel Parser stream is from CSI A +*/ +#define GFVX_CSI_SOURCE_CSI_A 0x00000001 + +/** Pixel Parser stream is from CSI B +*/ +#define GFVX_CSI_SOURCE_CSI_B 0x00000002 + +/** Pixel Parser stream is from HOST +*/ +#define GFVX_CSI_SOURCE_HOST 0x00000004 + +/** Pixel Parser stream is from VIP +*/ +#define GFVX_CSI_SOURCE_VIP 0x00000008 + +/** Pixel Parser A enable +*/ +#define GFVX_CSI_PPA_ENABLE 0x00000010 + +/** Pixel Parser B enable +*/ +#define GFVX_CSI_PPA_DISABLE 0x00000020 + +//#define GFVX_CSI_PPA_MASK 0x00000030 + +/** Pixel Parser A enable +*/ +#define GFVX_CSI_PPB_ENABLE 0x00000040 + +/** Pixel Parser B enable +*/ +#define GFVX_CSI_PPB_DISABLE 0x00000080 + +//#define GFVX_CSI_PPB_MASK 0x000000C0 + +/** whether packet header is sent in the beginning of packet or not. payload only mode: no header +*/ +#define GFVX_CSI_PACKET_HEADER_ENABLE 0x00000100 + +/** Check data_type and Virtural_Channel_ID or not +*/ +#define GFVX_CSI_DATA_IDENTIFIER_ENABLE 0x00000200 + +/** check WordCount from header or register +*/ +#define GFVX_CSI_WORD_COUNT_SELECT_HEADER 0x00000400 + +/** check ECC from header +*/ +#define GFVX_CSI_HEADER_EC_DISABLE 0x00000800 + +/** pad short line with 0 +*/ +#define GFVX_CSI_LINE_PAD_NONE 0x00001000 + +/** pad short line with 1 +*/ +#define GFVX_CSI_LINE_PAD_1 0x00002000 + +/** pad short frame with 0 +*/ +#define GFVX_CSI_FRAME_PAD_NONE 0x00004000 + +/** pad short frame with 1 +*/ +#define GFVX_CSI_FRAME_PAD_1 0x00008000 + +/** 2 bytes CRC Check enable +*/ +#define GFVX_CSI_CRC_CHECK 0x00010000 + +/** Embedded data enable +*/ +#define GFVX_CSI_EMBEDDED_DATA_ENABLE 0x00020000 + +/** enable timeout checking +*/ +#define GFVX_CSI_LINE_TIMEOUT_ENABLE 0x00040000 + +#define GFVX_CSI_VSYNC_START_MARK_VSYNC 0x00080000 + +#define GFVX_CSI_VI_HSYNC_CONTROL 0x00100000 + +#define GFVX_CSI_VI_VSYNC_CONTROL 0x00200000 + + +typedef struct _GFVXCSISET +{ + NvU32 flags; /** flag options see above */ + NvU32 HOffset; /**< VIP input signal horizontal offset. */ + NvU32 HActive; /**< VIP input signal horizontal active width. */ + NvU32 VOffset; /**< VIP input signal vertical offset. */ + NvU32 VActive; /**< VIP input signal vertical active height.*/ + NvU32 ColorFormat; /** convert to data type*/ + +// PIXEL_STREAM_PPA_COMMAND: + NvU32 StartMarkerFrameMin; //CSI_PPA_START_MARKER_FRAME_MIN; /** comment */ + NvU32 StartMarkerFrameMax; //CSI_PPA_START_MARKER_FRAME_MAX; /** comment */ + +// PIXEL_STREAM_A_CONTROL0: + NvU32 VirtualChannelID; //CSI_PPA_VIRTUAL_CHANNEL_ID; /** stream virtual ID number */ + NvU32 OutputFormatOpt; //CSI_PPA_OUTPUT_FORMAT_OPTIONS; /** output format */ + +// PIXEL_STREAM_A_CONTROL1: + NvU32 TopFieldFrame; //CSI_PPA_TOP_FIELD_FRAME; /** camera spec */ + NvU32 TopFieldFrameMask; //CSI_PPA_TOP_FIELD_FRAME_MASK; /** camera sepc */ + +// PIXEL_STREAM_A_GAP: + NvU32 LineMinGap; //PPA_LINE_MIN_GAP; /** gap between lines */ + NvU32 FrameMinGap; //PPA_FRAME_MIN_GAP; /** gat between frames */ + +// PIXEL_STREAM_A_EXPECTED_FRAME: + NvU32 LineTimeOutMaxClock; //PPA_MAX_CLOCKS; /** line time out value */ + +} GFVXCSISET, *PGFVXCSISET; + +/* CSI data types + *` Set by camera script to match + * stream supplied by camera + */ + +#define GFVX_CSI_DATA_YUV420_8 (24UL) +#define GFVX_CSI_DATA_YUV420_10 (25UL) +#define GFVX_CSI_DATA_LEG_YUV420_8 (26UL) +#define GFVX_CSI_DATA_YUV420CSPS_8 (28UL) +#define GFVX_CSI_DATA_YUV420CSPS_10 (29UL) +#define GFVX_CSI_DATA_YUV422_8 (30UL) +#define GFVX_CSI_DATA_YUV422_10 (31UL) +#define GFVX_CSI_DATA_RGB444 (32UL) +#define GFVX_CSI_DATA_RGB555 (33UL) +#define GFVX_CSI_DATA_RGB565 (34UL) +#define GFVX_CSI_DATA_RGB666 (35UL) +#define GFVX_CSI_DATA_RGB888 (36UL) +#define GFVX_CSI_DATA_RAW6 (40UL) +#define GFVX_CSI_DATA_RAW7 (41UL) +#define GFVX_CSI_DATA_RAW8 (42UL) +#define GFVX_CSI_DATA_RAW10 (43UL) +#define GFVX_CSI_DATA_RAW12 (44UL) +#define GFVX_CSI_DATA_RAW14 (45UL) +#define GFVX_CSI_DATA_ARB_DT1 (48UL) +#define GFVX_CSI_DATA_ARB_DT2 (49UL) +#define GFVX_CSI_DATA_ARB_DT3 (50UL) +#define GFVX_CSI_DATA_ARB_DT4 (51UL) + + +/** OutputFormatOpt */ +#define GFVX_CSI_OUTPUT_FORMAT_OPTIONS_ARBITRARY (0UL) +#define GFVX_CSI_OUTPUT_FORMAT_OPTIONS_PIXEL (1UL) +#define GFVX_CSI_OUTPUT_FORMAT_OPTIONS_PIXEL_REP (2UL) +#define GFVX_CSI_OUTPUT_FORMAT_OPTIONS_STORE (3UL) + +#define GFVX_INTERNAL_DEBUG 0x10000000 + +// Below defines are used only when input source is HOST and input format is Bayer +// Since this is not a valid customer use case, we will not add Doxygen comments to these defines + +// Minimum padding requirement for ISP +#define MIN_SCANSIZE_WIDTH_DIFF 20 +#define MIN_SCANSIZE_HEIGHT_DIFF 10 + +// The actual minimum padding has not been determined; +// however, 30 padding on all sides is not enough for +// Demosaic mode 4 (5X5BPNR) with M3 statistics gathering. +// 35 on right + 15 on top/left/bottom seems to +// work fine. +#define MIN_ACTIVE_AREA_LEFT_PADDING 15 +#define MIN_ACTIVE_AREA_RIGHT_PADDING 35 +#define MIN_ACTIVE_AREA_TOP_PADDING 15 +#define MIN_ACTIVE_AREA_BOTTOM_PADDING 15 + +// Active Rect must be a few pixels larger than Output Rect to avoid +// a halo effect where the outer pixels are wrong. +#define MIN_OUTPUT_AREA_PADDING_3X3 2 +#define MIN_OUTPUT_AREA_PADDING_5X5 3 + + +/** Parameter structure passed to GFVxVIPSetVIP(). + @see GFVxVIPSetVIP() +*/ +typedef struct _GFVXVIPINFO +{ + NvU32 Flag; + /**< Flag bitmask, OR'ed combination of: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_VIP_PARALLEL_INPUT8-bit/clock video data
      #GFVX_VIP_SERIAL_INPUTSerial input
      #GFVX_VIP_HVSYNC_IN_STREAMVHSYNC and VVSYNC in the data stream
      #GFVX_VIP_EXTERNAL_VHSYNCCamera VHSYNC asserted by external signal
      #GFVX_VIP_INTERNAL_VHSYNCCamera VHSYNC generated by GoForce chip
      #GFVX_VIP_EXTERNAL_VCLKVCLK generated externally
      #GFVX_VIP_INTERNAL_VCLKVCLK generated by GoForce chip
      #GFVX_VIP_DETECT_FIELDDetect field 0 or 1, will not work for internal VHSYNC + (#GFVX_VIP_INTERNAL_VHSYNC) +
      #GFVX_VIP_RGB_H_FLIPHorizontal flip
      #GFVX_VIP_RGB_V_FLIPVertical flip
      #GFVX_VIP_HOST_IMAGECPU feeds image to VIP
      #GFVX_VIP_CHANGE_DEFAULT_TIMINGChange the default timing for VHSYNC and VCLK
      #GFVX_VIP_ASK_FOR_MCLOCKCamera master clock provided by GoForce chip
      #GFVX_VIP_TYPE_AVIP input type A interface
      #GFVX_VIP_TYPE_BVIP input type B interface
      #GFVX_VIP_TYPE_CVIP input type C interface
      #GFVX_VIP_DEST_BYTE_SWAPEnable destination byte swap for YUV/RGB data written to + preview surface +
      #GFVX_VIP_TYPE_C_RAWDo not remove the 0xFF, 0x02 sequence when camera is + running at type C interface +
      #GFVX_VIP_VIP_ROTATE_0VI output without rotation
      #GFVX_VIP_VIP_ROTATE_90VI output with 90 degree rotation
      #GFVX_VIP_VIP_ROTATE_180VI output with 180 degree rotation
      #GFVX_VIP_VIP_ROTATE_270VI output with 270 degree rotation
      #GFVX_VIP_RGB565RGB565 input to EPP
      #GFVX_VIP_RGB888RGB888 input to EPP
      #GFVX_VIP_RGB444RGB444 input to EPP
      #GFVX_VIP_BYPASS_MCLOCK_PINBypass any manipulation on internal master clock generation + output pin +
      #GFVX_VIP_BYPASS_NON_MCLOCK_PINSBypass any manipulation on VCLK, VHSYNC, and VID[7:0] pins +
      #GFVX_VIP_PRE_GENERATE_MCLOCKPre-generation of master clock
      + */ + NvU32 HOffset; /**< VIP input signal horizontal offset. */ + NvU32 HActive; /**< VIP input signal horizontal active width. */ + NvU32 VOffset; /**< VIP input signal vertical offset. */ + NvU32 VActive; /**< VIP input signal vertical active height. */ + NvU32 ColorFormat; /**< VIP input color format identifier, see + GFRMSURFACE::ColorFormat. + */ + NvU32 SerialDelay; /**< VIP serial input delay, reserved for future + use. + */ + NvU32 NewTiming; /**< Flag bitmask configuring VIP input timing, used + only if flag #GFVX_VIP_CHANGE_DEFAULT_TIMING + set, OR'ed combination of: + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_VIP_PDL_FALLING_VCLKParallel data latched at falling edge + of VCLK (default is rising edge) +
      #GFVX_VIP_SDL_RISING_VCLKSerial data lacthed at rising edge of + VCLK (default is falling edge) +
      #GFVX_VIP_VHSYNC_ACTIVE_LOWVHSYNC active low (default is active + high) +
      #GFVX_VIP_VVSYNC_ACTIVE_LOWVVSYNC active low (default is active + high) +
      #GFVX_VIP_VHSYNC_ACTIVE_EDGE_LEADVHSYNC active leading edge (default + is trailing edge) +
      #GFVX_VIP_VVSYNC_ACTIVE_EDGE_LEADVVSYNC active leading edge (default + is trailing edge) +
      #GFVX_VIP_SFRAME_ACTIVE_LOWSerial video frame sync active low, + falling edge indicates start of data + frame (default is active high, rising + edge indicates start of data frame) +
      #GFVX_VIP_SFRAME_SIZE_16Serial video input is 16 bit per frame + (default is 8 bit per frame) +
      #GFVX_VIP_FILED_0_BOTTOMField 0 is bottom/even field + (default is top/odd field) +
      #GFVX_VIP_VCLK_OUTPUT_ACTIVE_LOWVCLK output from GoForce chip active + low (default is active high) +
      + */ + NvU32 HNumerator; /**< VI decimation horizontal numerator, number of + pixels to keep from a group of incoming + pixels. + */ + NvU32 HDenominator;/**< VI decimation horizontal denominator, group + size. + */ + NvU32 VNumerator; /**< VI decimation vertical numerator, number of + lines to keep from a group of incoming lines. + */ + NvU32 VDenominator;/**< VI decimation vertical numerator, group + size. + */ + NvU32 MClockFreq; /**< Master clock frequency supplied to camera from + GoForce chip, used only if + #GFVX_VIP_ASK_FOR_MCLOCK set. + */ + NvU32 VClockFreq; /**< Clock frequency required for VIP input signal. + */ + + // Fill The following fields if GFVX_VIP_INTERNAL_VHSYNC is set in Flag + NvU32 VHPulseWidth; /**< VHSYNC pulse width in number of VCLK cycles, + valid range is 1 to 8. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + NvU32 VHPulsePeriod;/**< VHSYNC pulse period in number of VCLK cycles, + valid range 32 to 2048. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + NvU32 VVPulseWidth; /**< VVSYNC pulse width in number of VCLK cycles + valid range is 1 to 8. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + NvU32 VVPulsePeriod;/**< VVSYNC pulse period in number of VCLK + valid range 32 to 1024. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + NvU32 VVDelay; /**< Number of VCLK cycles from the leading edge + of VHSYNC to the leading edge of VVSYNC, + valid range is -2 to 13. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + PGFVXBAYERINFO pBayerInfo; /**< Structure used to describe the rectangles needed by ISP + to properly process Bayer input from camera. This + structure is used only when input source is VIP and + input data format is Bayer. + */ + PGFVXCSISET pCSIInfo; /** Structure used to describe CSI stream info. Only used when input source is CSI stream + */ +} GFVXVIPINFO, *PGFVXVIPINFO; + + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Start VIP data feeding. + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_START 0x00000001 + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Stop VIP data feeding. + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_STOP 0x00000002 + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Start VIP data feeding with + synchronized auto-display surface after a frame is captured from VIP. + If no output surface is set (GFVXVIPUPDATE::ppSurf is NULL), this action + behaves in the same way as #GFVX_VIP_START. + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_AUTO_FLIP (0x00000004 | GFVX_VIP_START) + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Start VIP data feeding with + synchronized auto-blit from VIP output surface to another surface. + + Parameters for the blit have to be set up separately via GFVxBlt() with + flag #GFVX_AUTO_BLT. Auto-blit is triggered after a complete frame has + been captured from VIP. + + If no output surface is set (GFVXVIPUPDATE::ppSurf is NULL), this action + behaves in the same way as #GFVX_VIP_START. + + Once auto-blit has been enabled it can be disabled with GFVxVIPUpdate() + action identifier #GFVX_VIP_AUTO_TRIGER_BLT_OFF. + + @see GFVXVIPUPDATE, GFVxVIPUpdate(), #GFVX_VIP_AUTO_TRIGER_BLT_OFF, + #GFVX_AUTO_BLT +*/ +#define GFVX_VIP_AUTO_TRIGER_BLT (0x00000008 | GFVX_VIP_START) + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Stop auto-blit that has been + enabled earlier via #GFVX_VIP_AUTO_TRIGER_BLT. + + Note that this action only disables auto-blit. It does not disable the + VIP data feed. If also VIP is to be disabled, GFVxVIPUpdate() has to be + called again with action #GFVX_VIP_STOP. + + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_AUTO_TRIGER_BLT_OFF 0x00000010 + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Start VIP data feeding with + synchronized auto-display surface after a frame is captured from VIP. + Second Overlay Window is used instead of first. + If no output surface is set (GFVXVIPUPDATE::ppSurf is NULL), this action + behaves in the same way as #GFVX_VIP_START. + + @version SC15 and above only + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_AUTO_FLIP_OVERLAY2 (0x00000020 | GFVX_VIP_START) + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Capture one frame in VIP buffer + if it is combined with flag #GFVX_VIP_START + + @version SC15 and above only + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_CAPTURE_ONE_FRAME 0x00000040 + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Restart VIP without changes VI + state after stop VI + + @version SC15 and above only + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_RESTART 0x00000080 + +/** Parameter structure for GFVxVIPUpdate(). + @see GFVxVIPUpdate() +*/ +typedef struct _GFVXVIPUPDATE +{ + PGFRMSURFACE *ppSurf; /**< Pointer to an array of VIP output surfaces + pointers, or NULL to feed to MPEG/JPEG without + display. + */ + NvU32 numofSurf; /**< Number of surface pointers in \a ppSurf, valid + range is 1 to 2. + */ + NvU16 XStart; /**< Destination surface X position for the output + from VIP + */ + NvU16 YStart; /**< Destination surface Y position for the output + from VIP + */ + NvU32 UpdateOption; + /**< Action identifier, one of: + + + + + + + + + + + +
      #GFVX_VIP_STARTStart VIP data feeding
      #GFVX_VIP_STOPStop VIP data feeding
      #GFVX_VIP_AUTO_FLIPStart VIP data feeding and enable + auto-display of the last VIP target + surface +
      #GFVX_VIP_AUTO_TRIGER_BLTStart VIP data feeding and enable + auto-blit from the last target surface + to additional surfaces +
      #GFVX_VIP_AUTO_TRIGER_BLT_OFFDisable auto-blit
      + */ +} GFVXVIPUPDATE, *PGFVXVIPUPDATE; + +/** VxAPI VxBlt operation modes. + Constants to specify SB mode for a call to GFVxBltSetCSCCoeff(). + @see GFVxBltSetCSCCoeff(), GFVxBltGetCSCCoeff() +*/ +typedef enum +{ + /** Host full frame stretchblt trigger */ + GFVX_BLT_FULL_MODE, + + /** Host partial frame stretchblt trigger */ + GFVX_BLT_PARTIAL_MODE, + + /** Auto stretchblt trigger from VI */ + GFVX_BLT_AUTO_VI_MODE +} GFVXBLTMODE; + +/** VxAPI component level interrupt operation types. + Constants to specify operation for a call to GFVxInterruptControl(). + @see GFVX_INTERRUPT_TYPE, GFVxInterruptControl() +*/ +typedef enum +{ + /** Enable interrupt/status assertion for an interrupt type. */ + GFVX_INTERRUPT_ENABLE, + + /** Disable interrupt/status assertion for an interrupt type. */ + GFVX_INTERRUPT_DISABLE, + + /** Clear interrupt/status assertion for an interrupt type. */ + GFVX_INTERRUPT_CLEAR, + + /** Query for interrupt/status assertion for an interrupt type. */ + GFVX_INTERRUPT_QUERY_STATUS, + + /** Set Y-FIFO threshold. */ + GFVX_INTERRUPT_SET_Y_FIFO_THRESHOLD, + + /** Get Y-FIFO threshold. */ + GFVX_INTERRUPT_GET_Y_FIFO_THRESHOLD, + + /** Set V-counter threshold. */ + GFVX_INTERRUPT_SET_V_COUNTER_THRESHOLD, + + /** Get V-counter threshold. */ + GFVX_INTERRUPT_GET_V_COUNTER_THRESHOLD, + + /** Get all bits of VI interrupt status register. */ + GFVX_INTERRUPT_GET_ALL_STATUS, + + /** Clear all VI interrupt status bits. */ + GFVX_INTERRUPT_CLEAR_ON_ALL_STATUS + +} GFVX_INTERRUPT_OPERATION_TYPE; + +/** VxAPI interrupt types. + @see GFVX_INTERRUPT_OPERATION_TYPE, GFVxInterruptControl() +*/ +typedef enum +{ + /** VID[8] pin rising edge interrupt. */ + GFVX_VD8PIN_RISING_EDGE_INTR = 0x0100001, + /** VID[9] pin rising edge interrupt. */ + GFVX_VD9PIN_RISING_EDGE_INTR = 0x0100002, + /** VID[10] pin rising edge interrupt. */ + GFVX_VD10PIN_RISING_EDGE_INTR = 0x0100004, + /** VID[11] pin rising edge interrupt. */ + GFVX_VD11PIN_RISING_EDGE_INTR = 0x0100008, + /** VGP[4] pin rising edge interrupt. */ + GFVX_VGP4PIN_RISING_EDGE_INTR = 0x0100010, + /** VGP[5] pin rising edge interrupt. */ + GFVX_VGP5PIN_RISING_EDGE_INTR = 0x0100020, + /** VGP[6] pin rising edge interrupt. */ + GFVX_VGP6PIN_RISING_EDGE_INTR = 0x0100040, + /** VHSYNC pin rising edge interrupt. */ + GFVX_VHSYNC_RISING_EDGE_INTR = 0x0100080, + /** VVSYNC pin rising edge interrupt. */ + GFVX_VVSYNC_RISING_EDGE_INTR = 0x0100100, + + /** Vertical counter threshold interrupt. */ + GFVX_VERTICAL_COUNTER_THRESHOLD_INTR = 0x0000200, + /** Y-FIFO threshold int. */ + GFVX_Y_FIFO_THRESHOLD_INTR = 0x0000400, + /** Buffer done first output interrupt. */ + GFVX_BUFFER_FIRST_OUTPUT_INTR = 0x0000800, + /** Frame done first output interr upt. */ + GFVX_FRAME_FIRST_OUTPUT_INTR = 0x0001000, + /** Buffer done second output interrupt. */ + GFVX_BUFFER_SECOND_OUTPUT_INTR = 0x0002000, + /** Frame done second output interrupt. */ + GFVX_FRAME_SECOND_OUTPUT_INTR = 0x0004000, + /** VI to EPP error interrupt. */ + GFVX_EPP_ERROR_INTR = 0x0008000, + /** YUV420PA error interrupt. */ + GFVX_YUV420PA_ERROR_INTR = 0x0010000, + /** First output peer stall interrupt. */ + GFVX_FIRST_OUTPUT_PEER_STALL_INTR = 0x0020000, + /** Second output peer stall interrupt. */ + GFVX_SECOND_OUTPUT_PEER_STALL_INTR = 0x0040000, + /** DMA stall interrupt. */ + GFVX_DMA_STALL_INTR = 0x0080000, + + + /** VD[8] pin falling edge interrupt. */ + GFVX_VD8PIN_FALLING_EDGE_INTR = 0x0000001, + /** VD[9] pin falling edge interrupt. */ + GFVX_VD9PIN_FALLING_EDGE_INTR = 0x0000002, + /** VD[10] pin falling edge interrupt. */ + GFVX_VD10PIN_FALLING_EDGE_INTR = 0x0000004, + /** VD[11] pin falling edge interrupt. */ + GFVX_VD11PIN_FALLING_EDGE_INTR = 0x0000008, + /** VGP[4] pin falling edge interrupt. */ + GFVX_VGP4PIN_FALLING_EDGE_INTR = 0x0000010, + /** VGP[5] pin falling edge interrupt. */ + GFVX_VGP5PIN_FALLING_EDGE_INTR = 0x0000020, + /** VGP[6] pin falling edge interrupt. */ + GFVX_VGP6PIN_FALLING_EDGE_INTR = 0x0000040, + /** VHSYNC pin falling edge interrupt. */ + GFVX_VHSYNC_FALLING_EDGE_INTR = 0x0000080, + /** VVSYNC pin falling edge interrupt. */ + GFVX_VVSYNC_FALLING_EDGE_INTR = 0x0000100, + + /** VD[8] pin rising edge interrupt. */ + GFVX_VD8PIN_RISING_LEVEL_INTR = 0x1100001, + /** VD[9] pin rising edge interrupt. */ + GFVX_VD9PIN_RISING_LEVEL_INTR = 0x1100002, + /** VD[10] pin rising edge interrupt. */ + GFVX_VD10PIN_RISING_LEVEL_INTR = 0x1100004, + /** VD[11] pin rising edge interrupt. */ + GFVX_VD11PIN_RISING_LEVEL_INTR = 0x1100008, + /** VGP[4] pin rising edge interrupt. */ + GFVX_VGP4PIN_RISING_LEVEL_INTR = 0x1100010, + /** VGP[5] pin rising edge interrupt. */ + GFVX_VGP5PIN_RISING_LEVEL_INTR = 0x1100020, + /** VGP[6] pin rising edge interrupt. */ + GFVX_VGP6PIN_RISING_LEVEL_INTR = 0x1100040, + /** VHSYNC pin rising edge interrupt. */ + GFVX_VHSYNC_RISING_LEVEL_INTR = 0x1100080, + /** VVSYNC pin rising edge interrupt. */ + GFVX_VVSYNC_RISING_LEVEL_INTR = 0x1100100, + + /** VD[8] pin falling level interrupt. */ + GFVX_VD8PIN_FALLING_LEVEL_INTR = 0x1000001, + /** VD[9] pin falling level interrupt. */ + GFVX_VD9PIN_FALLING_LEVEL_INTR = 0x1000002, + /** VD[10] pin falling level interrupt. */ + GFVX_VD10PIN_FALLING_LEVEL_INTR = 0x1000004, + /** VD[11] pin falling level interrupt. */ + GFVX_VD11PIN_FALLING_LEVEL_INTR = 0x1000008, + /** VGP[4] pin falling level interrupt. */ + GFVX_VGP4PIN_FALLING_LEVEL_INTR = 0x1000010, + /** VGP[5] pin falling level interrupt. */ + GFVX_VGP5PIN_FALLING_LEVEL_INTR = 0x1000020, + /** VGP[6] pin falling level interrupt. */ + GFVX_VGP6PIN_FALLING_LEVEL_INTR = 0x1000040, + /** VHSYNC pin falling level interrupt. */ + GFVX_VHSYNC_FALLING_LEVEL_INTR = 0x1000080, + /** VVSYNC pin falling level interrupt. */ + GFVX_VVSYNC_FALLING_LEVEL_INTR = 0x1000100 + +} GFVX_INTERRUPT_TYPE; + +/** VxAPI related attributes. + @see GFVxGetAttribute() +*/ +typedef enum _GFVXATTRIBUTES +{ + /** VxAPI attribute: Video input interrupt status. + Use this attribute with GFVxGetAttribute() to read the current video + input interrupt status. + + Interpretation of associated attribute value: + 
      +        NvU32 Bitmask with interrupt status
+              For bitpositions see the VI status register in the GoForce
+              technical manual (Register VI11 on SC12)
+
      + + Attribute is get only. + + @see GFVxGetAttribute() + */ + GFVX_ATTR_VIDEO_BUF, + + /** VxAPI attribute: Video VIP input status. + Use this attribute with GFVxGetAttribute() to read the current number + of frames received + */ + + GFVX_ATTR_VIP_INPUT_FRAME_COUNT, + + /** VxAPI attribute: Video VIP input status. + Use this attribute with GFVxGetAttribute() to read the current number + of lines received + */ + + GFVX_ATTR_VIP_INPUT_LINE_COUNT, + +} GFVXATTRIBUTES; + +/** YUV Color Space Conversion (CSC) coefficients. + Parameter structure for GFVxVIPSetCSCCoeff(), GFVxBltSetCSCCoeff(), + GFVxVIPGetCSCCoeff(), and GFVxBltGetCSCCoeff() + + YUV color space conversion is used when converting from a YUV formatted + surface to RGB formatted surface. The YUV color space conversion formular + appears as follows: + + R = sat(KYRGB*(Y + YOF) + KUR*U + KVR*V) + G = sat(KYRGB*(Y + YOF) + KUG*U + KVG*V) + B = sat(KYRGB*(Y + YOF) + KUB*U + KVB*V) + + By default, the YUV color space conversion coefficients are: + + KYRGB, KUR, KVR 1.1644 0.0000 1.5960 + KYRGB, KUG, KVG = 1.1644 -0.3918 -0.8130 + KYRGB, KUB, KVB 1.1644 2.0172 0.0000 + + and YOF = -16.0000 + + The value corresponding to each of these YUV color space conversion + coefficients is a Q16 (signed 15.16 fixed point value). + + For examples: + YOF = -16.0000, the value corresponding is 0xFFF00000 + KYRGB = 1.1644, the value corresponding is 0x00012A16 + KVR = 1.5960, the value corresponding is 0x00019893 + KUG = -0.3918, the value corresponding is 0xFFFF9BB3 + KVG = -0.8130, the value corresponding is 0xFFFF2FE0 + KUB = 2.0172, the value corresponding is 0x00020467 +*/ +typedef struct _GFVXCSCCOEF +{ + NvU32 YOF; + NvU32 KYRGB; + NvU32 KUR; + NvU32 KVR; + NvU32 KUG; + NvU32 KVG; + NvU32 KUB; + NvU32 KVB; +} GFVXCSCCOEF; + + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFVxOpen(GFRmHandle hRm, GFVxHandle *phVx, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFVxClose(GFVxHandle *phVx); + +/** @name Functions +@{*/ + +/** This function returns version and capabilities of API and hardware. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pVXProp (#PGFPROPERTY) Pointer to property structure to be + filled in + + @retval #GF_SUCCESS \a pJXProp filled in successfully + @retval #GF_ERROR Some error occured + + This function returns information about the VxAPI, including the following: + - VxAPI module version + - VIP support + - Overlay support + - MPEG decoding and encoding + - JPEG decoding and encoding + + The #GFPROPERTY structure passed with parameter \a pVXProp will be + filled in on successfull return. The #GFPROPERTY::Capability field + will hold a combination of flagbits indicating capabilities specific + to the VxAPI: + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_CAP_CSCColor space conversion supported
      #GFVX_CAP_VIPVIP functions available
      #GFVX_CAP_ENLARGEEnlarge source image supported
      #GFVX_CAP_SHRINKShrink source image supported
      #GFVX_CAP_COLOR_CONTROLColor control supported
      #GFVX_CAP_OVERLAYOverlay supported
      #GFVX_CAP_MPEGDECMPEG4 decoder supported
      #GFVX_CAP_MPEGENCMPEG4 encoder supported
      #GFVX_CAP_JPEGDECJPEG decoder supported
      #GFVX_CAP_JPEGENCJPEG encoder supported
      #GFVX_CAP_ALPHA_BLENDAlpha blending supported
      #GFVX_CAP_EXTEND_RGBExtended RGB format 32 bpp supported
      #GFVX_CAP_OVERLAY_YUVYUV overlay supported
      #GFVX_CAP_OVERLAY_SCALEOverlay with scaling supported
      #GFVX_CAP_OVERLAY_MULTIPLEMultiple overlay supported
      #GFVX_CAP_ENCODE_TYPEVariable sized data camera interface (Type A/B/C) supported
      + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the JxDecAPI functions. + + @see GFPROPERTY +*/ +GF_RETTYPE GFVxGetProperty(GFVxHandle VxHandle, PGFPROPERTY pVvProp); + +/** Stretch-blit rectangular area from source to destination surface. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pBlt (#PGFVXBLT) Pointer to #GFVXBLT structure + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function copies a rectangular area from a source surface to a + rectangle in the destination surface. If source and destination + rectangles differ in size, the GPU's stretch blit (SB) unit scales the + source data to fit the destination rectangle. If the source and destination + surfaces have different color formats, GFVxBlt() provides limited color + format conversions. + + Source and Destination surfaces have to be in GPU memory. Source surfaces + can be in YUV420, YUV422, or RGB565 format. Destination surfaces can be + in RGB565, RGB888 (SC12), or ARGB8888 (SC12 SC15) format. YUV output can also + be routed to EPP for encoding. + + Color format conversions from a YUV420 or YUV422 source are supported for these + destination formats: + - RGB565 + - ARGB8888 (SC12 SC15) + - RGB888 (SC12) + + A #GFVXBLT control structure is passed with parameter \a pBlt. + GFVXBLT::ppDestSurf points to an array of destination surface pointers, + with the number of pointers in this array specified by + GFVXBLT::numofDestSurf. GFVXBLT::ppSrcSurf points to an array of source + surface pointers, with the size of this array specified by + GFVXBLT::numofSrcSurf. + + When the destination surface pointer is NULL, output of SB goes + to EPP for encoding. + + See #GFVXBLT for minimum and maximum specifications of source and destination + rectangle sizes. + + Instant Blit Mode + + In this mode of operation, the blit is executed immediately via the command + FIFO. It is always performed from the first surface in GFVXBLT::ppSrcSurf + to the first surface in GFVXBLT::ppDestSurf. Other pointers in these + arrays are ignored. + + Auto Blit Mode + + VxBlt() can be used to enable auto-blit mode (flag #GFVX_AUTO_BLT + in GFVXBLT::BltOption). Whenever the end of a frame coming from VIP is + reached, SB will be fired automatically with the parameters set in GFVXBLT. + Auto-blit mode remains set until it is reset by another auto-blit command. + During auto-blit mode, manual SB commands should save and restore SB + registers (SC12 and below). This is not required for SC15 and above because + they have three hardware contexts: one for auto-blit, one for host trigger + (manual SB commands) and one for host partial trigger. + + The first time auto-blit is fired, the first surface in GFVXBLT::ppSrcSurf + is copied to the first surface in GFVXBLT::ppDestSurf. In subsequent blits, + the source and destination arrays are walked through subsequently. If + there is only one surface in the GFVXBLT::ppSrcSurf or GFVXBLT::ppDestSurf + arrays, only this one is used. + + Note that VxBlt() only sets auto-blit parameters. It is actually enabled by + GFVxVIPUpdate() using action #GFVX_VIP_AUTO_TRIGER_BLT, or GFMxDecSetMBs(). + + Auto Display + + If auto-display (#GFVX_AUTO_DISPLAY or #GFVX_AUTO_DISPLAY_OVERLAY2) is on, + GFVxBlt() automatically shows the destination surface on the screen. + The application does not need to call GFVxFlip() to show the surface. + Auto-display can be combined with both auto-blit and instant-blit modes. + + Color Keying + + If source color keying (#GFVX_BLT_SRC_KEY) is set, all pixels from the + source surface matching GFVXBLT::colorKey are transparent (not copied). + + VSync Synchronisation + + By default all blits are synchronized to display VSync. Note that blits + may block, if the display is disabled. Flag #GFVX_BLT_DISABLE_WAIT_VSYNC + can be used to disable VSync synchronisation. + + @see GFVXBLT +*/ +GF_RETTYPE GFVxBlt(GFVxHandle VxHandle, PGFVXBLT pBlt); + +/** Activate surface for display. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pFlip (#PGFVXFLIP) Pointer to #GFVXFLIP structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If ColorFormat is unsupported + + This function changes the display buffer address from one surface to + another. + + This function displays #GFVXFLIP::pForeGroundSurf. If + GFVXFLIP::pForeGroundSurf is an overlay surface, this function displays + that surface to the destination rectangle that has been set by + GFVxUpdateOverlay(). + + If GFVXFLIP::pForeGroundSurf is not an overlay surface, this function + displays the entire surface. In this case GFVxFlip() can show either the + primary surface or an offscreen surface on the display screen. + + If there is only one surface for primary or overlay, GFVxFlip() should not + be called. + + @see GFVXFLIP +*/ +GF_RETTYPE GFVxFlip(GFVxHandle VxHandle, PGFVXFLIP pFlip); + +/** Configure properties of overlay (WinB) display. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pOverlay (#PGFVXUPDATEOVERLAY) Pointer to #GFVXUPDATEOVERLAY structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_SURFACETYPE_NOT_SUPPORTED If Source SurfaceType is unsupported + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If Source ColorFormat is unsupported + @retval GFVX_ERROR_ILLEGAL_ALPHA_VALUE If Alpha Value is incorrect + + This function controls overlay (WinB) display, setting the following + features: + - Destination and source rectangle areas + - Rotation for overlay surface + - Color keying + - Alphablending Color Key (GoForce 4800 and above) + - Foreground and Background alpha values. (GoForce 4800 and above) + - Destination surface color format (RGB888, ARGB8888 for GoForce 4800 and + above) + + SC15 supports the following overlay surface orientations - 0 degree rotated, + 180 degree rotated, horizont flip, vertical flip. Overlay surface orientation + is always relative to the orientaton of primary surface. For eg. if primary + surface is 180 degree rotated and requested overlay surface orientation is + 0 degree rotated, then overlay surface will be 180 degree rotated. + + This function supports the following source surface type - GF_SURFACE_OVERLAY. + It supports the following source surface colorformats - RGB565, ARGB8888, ARGB1555, + ARGB4444. + + In order to work around a hardware bug in SC12, in which the GC displays + pixels at the end of the line that are 64 pixels back from the end of + the line, the overlay window width will be aligned to 4-pixels. + + If GFVXUPDATEOVERLAY::pSrcSurf is NULL then overlay display is disabled. + + This function will have no effect, if the GoForce media processor version + does not support overlays. This can be checked via the #GFVX_CAP_OVERLAY + attribute with GFVxGetProperty(). + + Color Keying + + With color keying pixels from the overlay surface can be masked (made + transparent). It can be enabled in different modes of operation by setting + one of the following flags in GFVXUPDATEOVERLAY::UpdateOption: + - #GFVX_UO_SRC_COLOR_KEY + - #GFVX_UO_DEST_COLOR_KEY + + The color key is passed in GFVXUPDATEOVERLAY::ColorKey. Refer to the flags' + documentation for details on modes of operation. + + An exotic color which does not conflict with other colors of a use-case + should be selected as the color key. Color keying for overlay display is + processed on the fly, no pixels in the surfaces are overwritten. + + If destination is in 1-bit alpha format (eg ARGB1555), application can + use two additional flags - #GFVX_UO_COLOR_KEY_ALPHA_ONLY and + #GFVX_UO_COLOR_KEY_ALPHA_COLOR. Refer to the flags' + documentation for details on modes of operation. + + Alpha Blending + + Overlay display with alpha blending can be enabled by setting + flag #GFVX_UO_ALPHA_BLENDING. + + Setting flag #GFVX_UO_ALPHA_BLENDING lets the overlay surface to appear + blended with the destination surface using the alpha value passed in + GFVXUPDATEOVERLAY::AlphaValue. Refer to the flags' documentation for details + on how to define AlphaVal. + + If destination is in 1-bit alpha format (eg ARGB1555), application can + use two additional flags - #GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY and + #GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR. Refer to the flags' + documentation for details on modes of operation. + + Just like overlay colorkey, an exotic color which does not conflict with + other colors of a use-case should be selected as the blending color key. + Blending is processed on the fly, no pixels in the surfaces are overwritten. + + If #GFVX_UO_DEST_COLOR_KEY is set, alpha blending enabled, and the + destination pixel color matches BlendingColorKey, the following equation + is used to generate the final pixel: + 
      +    src * AlphaValue + dest * (1-AlphaValue)
+
      + Otherwise, the original pixel is not updated. + + Alpha blending is supported only on GoForce 4800 and above. + + SC15 supports alphablending with the following restriction - You cannot alpha-match + (alpha-blend) in non-key-match areas, at the same time you alpha-blend in key-match areas. + In other words, the following flag combinations will not work - + + #GFVX_UO_DEST_COLOR_KEY|#GFVX_UO_ALPHA_BLENDING|#GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY + #GFVX_UO_DEST_COLOR_KEY|#GFVX_UO_COLOR_KEY_ALPHA_COLOR|#GFVX_UO_ALPHA_BLENDING|#GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY + #GFVX_UO_DEST_COLOR_KEY|#GFVX_UO_COLOR_KEY_ALPHA_ONLY|#GFVX_UO_ALPHA_BLENDING + #GFVX_UO_DEST_COLOR_KEY|#GFVX_UO_COLOR_KEY_ALPHA_ONLY|#GFVX_UO_ALPHA_BLENDING|#GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR + + @see GFVXUPDATEOVERLAY +*/ +GF_RETTYPE GFVxUpdateOverlay(GFVxHandle VxHandle, + PGFVXUPDATEOVERLAY pOverlay); + +/** Feed image data from host to VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pImage (#PGFVXVIPFEEDIMAGE) Pointer to #GFVXVIPFEEDIMAGE parameter + structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If Source ColorFormat is unsupported + + This function feeds an image from the CPU host via the VI source FIFO to + the VIP. It supports YUV420, YUV422 (YUYV, YVYU, UYVY, VYUY), YUV422 planar and + Bayer (8, 12) formats. + + For an YUV420 image, it feeds Y-Fifo, U-Fifo, V-Fifo interleaved at 32 bit. + For an YUV422 image, it feeds the Y-Fifo only. + + This function is intended to be used for feeding YUV data to the JPEG + encoder, or for feeding input for VIP preview display (GFVxVIPSetVIP() + and GFVxVIPUpdate()). YUV data for MPEG encoding is fed with + GFMxEncFeedImage(). + + Parameter \a pImage passes a surface containing source image data and an + optional source clipping rectangle. Surface data has to reside in memory + accessible by the host CPU, e.g. a surface allocated as type + #GF_SURFACE_SYSTEM_MEMORY. + + @see GFVXVIPFEEDIMAGE, GFVX_VIP_HOST_IMAGE +*/ +GF_RETTYPE GFVxVIPFeedImage(GFVxHandle VxHandle, + PGFVXVIPFEEDIMAGE pImage); + +/** Setup partial feed image data from host to VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param colorFormat Color format of feed image surface + @param width Width of feed image + @param height Height of feed image + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_ILLEGAL_PARAMETER If width and height values are incorrect + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If color format of feed image surface is unsupported + + This function setups partial feed image from the CPU host via the VI source FIFO to + the VIP. It supports YUV420, YUV422 (YUYV, YVYU, UYVY, VYUY), YUV422 planar formats. + The partial image data is fed with + GFVxVIPPartialFeedImage(). + + @see GFVxVIPPartialFeedImage, GFVX_VIP_HOST_IMAGE +*/ +GF_RETTYPE GFVxVIPPartialFeedImageSetup(GFVxHandle VxHandle, + NvU32 colorFormat, + NvU32 width, + NvU32 height); + +/** Feed partial image data from host to VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pSrcSurf Pointer to source feed image surface + @param pSrcRect Pointer to a clip rectangle from source feed image surface + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_ILLEGAL_PARAMETER If pSrcSurf is NULL + + This function feeds a partial image from the CPU host via the VI source FIFO to + the VIP. It supports YUV420, YUV422 (YUYV, YVYU, UYVY, VYUY), YUV422 planar formats. + + For an YUV420 image, it feeds Y-Fifo, U-Fifo, V-Fifo interleaved at 32 bit. + For an YUV422 image, it feeds the Y-Fifo only. + + This function is intended to be used for feeding partial YUV data to the JPEG + encoder, or for feeding partial input for VIP preview display (GFVxVIPSetVIP() + and GFVxVIPUpdate()). YUV data for MPEG encoding is fed with + GFMxEncFeedImage(). + + Parameter \a pSrcRect is an optional source clipping rectangle. + Surface data has to reside in memory accessible by the host CPU, + e.g. a surface allocated as type + #GF_SURFACE_SYSTEM_MEMORY. +*/ +GF_RETTYPE GFVxVIPPartialFeedImage(GFVxHandle VxHandle, + PGFRMSURFACE pSrcSurf, + PGFRECT pSrcRect); + +/** Put video unit into sleep mode. + @param VxHandle (#GFVxHandle) Handle to VxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @note Not implemented by default, this function is intended to be + implemented only in GFSDK ports to platforms that are in need of + this feature. + + @see GFVxWakeup() +*/ +GF_RETTYPE GFVxSleep(GFVxHandle VxHandle); + +/** Wake up video unit from sleep mode. + @param VxHandle (#GFVxHandle) Handle to VxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @note Not implemented by default, this function is intended to be + implemented only in GFSDK ports to platforms that are in need of + this feature. + + @see GFVxSleep() +*/ +GF_RETTYPE GFVxWakeup(GFVxHandle VxHandle); + +/** This function enumerates capabilities of the Video Input Port (VIP). + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pVIPProp (#PGFVXVIPPROPERTY) Pointer to #GFVXVIPPROPERTY structure + to be filled in + + @retval #GF_SUCCESS \a pVIPProp filled in successfully + @retval #GF_ERROR Some error occured + + The #GFPROPERTY structure passed with parameter \a pVIPProp will be + filled in on successfull return. + + The following GoForce VIP features are described by this function: + - Image decimation (scaling) limits + - Image flipping + - Video input interface type + + Parameters that are passed with a #GFVXVIPINFO structure to GFVxVIPSetVIP() + must be within the limits returned by this function. + + @see GFVXVIPPROPERTY, GFVxVIPSetVIP(), GFVXVIPINFO +*/ +GF_RETTYPE GFVxVIPGetProperty(GFVxHandle VxHandle, + PGFVXVIPPROPERTY pVIPProp); + +/** Configure video input to VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pVIPInfo (#PGFVXVIPINFO) Pointer to GFVXVIPINFO parameter structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_ILLEGAL_BAYER_VALUES If values in BayerInfo structure are incorrect + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If Source ColorFormat is unsupported + + The following VIP properties can be configured using this function, see + #GFVXVIPINFO for details: + - Data source and format (CPU host or video input) + - VIP input cropping rectangle + - Image decimation + - Input (camera) color format + + After configuring video input, the flow of data has to be explicitly + enabled with GFVxVIPUpdate(). + + See GFVxVIPGetProperty() for how to test for VIP capabilities at runtime. + + This function returns GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED error if color format + is not supported. Supported color formats for HOST input are - YUV422, YUV422 Planar, + YUV420 and Bayer (8 and 12). YUV420 is not supported if input source is VIP. + + @see GFVXVIPINFO, GFVxVIPUpdate(), GFVxVIPGetProperty() +*/ +GF_RETTYPE GFVxVIPSetVIP(GFVxHandle VxHandle, + PGFVXVIPINFO pVIPInfo); + +/** Enable or disable video feeding through VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pUpdate (#GFVXVIPUPDATE) Pointer to a #GFVXVIPUPDATE structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If Source ColorFormat is unsupported + + This function enables or disables data feeding through VIP after it has + been configured with GFVxVIPSetVIP(). + + The action to be performed by this function is defined by the action + identifier passed in GFVXVIPUPDATE::UpdateOption of parameter \a pUpdate. + + + + + + + + + + + + + + + + + + +
      #GFVX_VIP_START + Enable VIP data feeding + + The structure passed via \a pUpdate controls the output of the VIP, setting + the following parameters: + - Destination surface(s) (single or double buffered) + - Top-left corner the output video is written to the destination surfaces + + GFVXVIPUPDATE::ppSurf passes an array of 1 or 2 destination surfaces to + capture the incoming video stream. If 2 surfaces are passed, the VIP target + surface is flipped after each frame of VIP input if #GFVX_VIP_AUTO_FLIP or + #GFVX_VIP_AUTO_FLIP_OVERLAY2 flag is specified. + + Color space conversion (CSC) is performed depending on the output surface + color formats: + - #GF_SURFACE_RGB565 (16 bpp): VI CSC is used. + - #GF_SURFACE_ARGB8888 (32 bpp): VI CSC is used, only available for SC12 + and above + - #GF_SURFACE_YUV422: (32 bits per two pixels): No CSC is used, data from + the VIP is stored as is in memory + - any other format is considered to be YUV422, and the data is stored as is + + If GFVXVIPUPDATE::ppSurf is NULL, data flow through the VIP is still enabled. + Data from the VIP is not written to target surfaces, but is is fed to the + MPEG or JPEG encoder pre-processor. This mode of operation is useful for the + following two cases: + - There is not enough memory for JPEG encoding. The application could turn + off the screen, enable this mode, and let the JPEG encoder utilize screen + memory (the primary surface). + - In single-shot mode, the application does not want to display the video + image on the screen after enabling the JPEG encoder, thus allowing faster + captures and power savings, and freeing bandwidth. After the image is + captured, the application enables the JPEG decoder to decode the captured + image and shows it on the screen. +
      #GFVX_VIP_AUTO_FLIP + Enable VIP data feeding with auto-display + + Behaviour is identical to #GFVX_VIP_START, additionally auto-display of the + last captured VIP frame is enabled. It is recommended to use this feature + in double buffer mode, passing 2 surfaces in GFVXVIPUPDATE::ppSurf. +
      #GFVX_VIP_AUTO_FLIP_OVERLAY2 + Enable VIP data feeding with auto-display from overlay window2 + + If surfaces to be flipped are overlay surfaces, they are associated with + first overlay surface unless #GFVX_VIP_AUTO_FLIP_OVERLAY2 flag is defined. + This flag should be used only if UpdateOverlay has been previously called + with #GFVX_UO_OVERLAY2 UpdateOption and VxFlip has been called with + #GFVX_FLIP_OVERLAY2 FlipOption. + +
      #GFVX_VIP_AUTO_TRIGER_BLT + Enable VIP data feeding with auto-blit + + Behaviour is identical to #GFVX_VIP_START, additionally auto-blit of the + last captured VIP frame is enabled. It is recommended to use this feature + in double buffer mode, passing 2 surfaces in GFVXVIPUPDATE::ppSurf. + + If #GFVX_VIP_AUTO_FLIP and #GFVX_VIP_AUTO_TRIGER_BLT are required at the + same time, these two action identifiers can be logically OR'ed and passed + in GFVXVIPUPDATE::UpdateOption. +
      #GFVX_VIP_STOP + Disable VIP data feeding + + Stop data feeding through VIP. All other flags and parameters passed in + \a pUpdate are ignored. +
      #GFVX_VIP_AUTO_TRIGER_BLT_OFF + Disable VIP auto-blit + + Stop auto-blit that has been enabled earlier with this function via + #GFVX_VIP_AUTO_TRIGER_BLT. This does not disable VIP data feed. +
      + + This function returns GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED error if destination + surface color format is not supported. Supported destination color formats are - + RGB565, ARGB8888, YUV422, YUV422P, YUV420P and YUV420PA. + + @see GFVXVIPUPDATE, GFVxVIPSetVIP() +*/ +GF_RETTYPE GFVxVIPUpdate(GFVxHandle VxHandle, + PGFVXVIPUPDATE pUpdate); + +/** Manipulate GPIO signals on VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param gpio (#GFVX_VIP_GPIO_TYPE) Signal (pin) to manipulate + @param operation (NvU32) Operation type, one of: + + + + + + + + + + + + + + + + + + Get output data. +
      #GF_GPIO_SET_INPUT_ENABLEInput enable set to 1
      #GF_GPIO_CLR_INPUT_ENABLEInput enable clr to 0.
      #GF_GPIO_GET_INPUT_ENABLEGet input enable.
      #GF_GPIO_SET_OUTPUT_ENABLEOutput enable set to 1.
      #GF_GPIO_CLR_OUTPUT_ENABLEOutput enable clr to 0.
      #GF_GPIO_GET_OUTPUT_ENABLEGet output enable.
      #GF_GPIO_SET_DATAOutput data set to 1.
      #GF_GPIO_CLR_DATAOutput data clr to 0.
      #GF_GPIO_GET_DATA
      + @param pGPIOStatus (#PGFGPIOSTATUS) Pointer to #GFGPIOSTATUS structure + returning pin status + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function manipulates the GPIO signals on the video input port (VIP). + The supported operations are clearing to 0, setting to 1, and getting the + status of the input enable, output enable, and data bits. + + @see GFGPIOSTATUS, GFVX_VIP_GPIO_TYPE +*/ +GF_RETTYPE GFVxVIPGPIO(GFVxHandle VxHandle, + GFGPIOPin gpio, + NvU32 operation, + PGFGPIOSTATUS pGPIOStatus); + +/** VxAPI component-level interrupt control. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param IntType (#GFVX_INTERRUPT_TYPE) VxAPI interrupt type + @param op (#GFVX_INTERRUPT_OPERATION_TYPE) VxAPI interrupt operation + @param pData (void*) Pointer to input or output data block, depending + on interrupt type and operation + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GFVX_ERROR_NO_SUPPORT Operation not supported + + Interpretation of the datablock passed with \a pData depends on the + interrupt operation. The following operations (parameter op) + are defined for this call, + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_INTERRUPT_ENABLEEnable interrupt/status assertion for interrupt type \a IntType. + \a pData is ignored. +
      #GFVX_INTERRUPT_DISABLEDisable interrupt/status assertion for interrupt type \a IntType. + \a pData is ignored. +
      #GFVX_INTERRUPT_DISABLEClear interrupt/status assertion for interrupt type \a IntType. + \a pData is ignored. +
      #GFVX_INTERRUPT_QUERY_STATUSQuery for interrupt/status assertion for interrupt type \a IntType. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Interrupt/status assertion state, one of:
+              GF_INTERRUPT_ON_STATUS_TRUE = asserted
+              GF_INTERRUPT_ON_STATUS_FALSE = not asserted
+
      +
      #GFVX_INTERRUPT_SET_Y_FIFO_THRESHOLD,
      + #GFVX_INTERRUPT_GET_Y_FIFO_THRESHOLD +       		Set or get DMA FIFO threshold value that controls interrupt/status + assertion for interrupt type #GFVX_Y_FIFO_THRESHOLD_INTR. If the + number of filled locations in the Y-FIFO is greater or equal + than the programmed value, #GFVX_Y_FIFO_THRESHOLD_INTR is asserted. + Note that the threshold value must not be changed within a frame. + + Parameter \a IntType is ignored. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Y-FIFO threshold value in range 0..31
+
      +
      #GFVX_INTERRUPT_SET_V_COUNTER_THRESHOLD,
      + #GFVX_INTERRUPT_GET_V_COUNTER_THRESHOLD +       		Set or get threshold value that controls interrupt/status assertion + for interrupt type #GFVX_VERTICAL_COUNTER_THRESHOLD_INTR. If the + vertical scanline position for data from parallel video input is + greater or equal than the programmed value, + #GFVX_VERTICAL_COUNTER_THRESHOLD_INTRis asserted. + + Parameter \a IntType is ignored. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Vertical counter threshold value in range 0..4095
+
      +
      #GFVX_INTERRUPT_GET_ALL_STATUSGet VI interrupt status bitmask. + + Parameter \a IntType is ignored. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Interrupt status bitmask,
+              Logically OR'ed combination of:
+              #GFVX_VID0PIN_RISING_EDGE_INTR
+              #GFVX_VID1PIN_RISING_EDGE_INTR
+              #GFVX_VID2PIN_RISING_EDGE_INTR
+              #GFVX_VID3PIN_RISING_EDGE_INTR
+              #GFVX_VID4PIN_RISING_EDGE_INTR
+              #GFVX_VID5PIN_RISING_EDGE_INTR
+              #GFVX_VID6PIN_RISING_EDGE_INTR
+              #GFVX_VID7PIN_RISING_EDGE_INTR
+              #GFVX_VERTICAL_COUNTER_THRESHOLD_INTR
+              #GFVX_VHSYNC_RISING_INTR
+              #GFVX_VVSYNC_RISING_INTR
+              #GFVX_VIDEO_IN_FIELD_DATA_RECV_INTR
+              #GFVX_EARLY_VIDEO_INTR
+              #GFVX_Y_FIFO_THRESHOLD_INTR
+
      +
      #GFVX_INTERRUPT_CLEAR_ON_ALL_STATUSClear VI interrupt assertions. + + Parameter \a IntType is ignored. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Interrupt status bitmask,
+              set bit   = clear this interrupt assertion
+              unset bit = leave unchanged
+
+              Valid bits which can be logically OR'ed:
+              #GFVX_VID0PIN_RISING_EDGE_INTR
+              #GFVX_VID1PIN_RISING_EDGE_INTR
+              #GFVX_VID2PIN_RISING_EDGE_INTR
+              #GFVX_VID3PIN_RISING_EDGE_INTR
+              #GFVX_VID4PIN_RISING_EDGE_INTR
+              #GFVX_VID5PIN_RISING_EDGE_INTR
+              #GFVX_VID6PIN_RISING_EDGE_INTR
+              #GFVX_VID7PIN_RISING_EDGE_INTR
+              #GFVX_VERTICAL_COUNTER_THRESHOLD_INTR
+              #GFVX_VHSYNC_RISING_INTR
+              #GFVX_VVSYNC_RISING_INTR
+              #GFVX_VIDEO_IN_FIELD_DATA_RECV_INTR
+              #GFVX_EARLY_VIDEO_INTR
+              #GFVX_Y_FIFO_THRESHOLD_INTR
+
      +
      + + @see GFVX_INTERRUPT_TYPE, GFVX_INTERRUPT_OPERATION_TYPE, + GFVxInterruptHandler() +*/ +GF_RETTYPE GFVxInterruptControl(GFVxHandle VxHandle, + GFVX_INTERRUPT_TYPE IntType, GFVX_INTERRUPT_OPERATION_TYPE op, + void * pData); + +/** Get information about a feature of the VxAPI. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param aid (NvU32) Attribute type identifier, see table. + @param pAttr (NvU32*) Returns 32 bit attribute value, see attribute + type documentation for interpretation + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + + + + + + + +
      \b Attribute \b Direction \b Synopsis
      #GFVX_ATTR_VIDEO_BUFgetVideo input interrupt status
      + + @see GFVxSetAttribute() +*/ +GF_RETTYPE GFVxGetAttribute(GFVxHandle VxHandle, NvU32 aid, NvU32 *attr); + +/** Reset VI to a reset state. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +GF_RETTYPE GFVxReset(GFVxHandle); + +/** This function waits until the next camera vsync has occurred. + It is implemented with interrupt mode. Therefore, it assumes that + interrupt platform has already supported or taken care, + otherwise it will wait forever for interrupt event + + @param VxHandle (#GFVxHandle) Handle to VxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +GF_RETTYPE GFVxWaitCameraVSync(GFVxHandle); + +/** This function ensures synchronization between StretchBlt operations and others + modules operations. + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + When several modules share the same channel (like SB,JxDec,MxDec), + it may be necessary to synchronize the command flow with the StretchBlt (SB) + module execution. Putting a GFVxBltNotBusy() call after a SB operation ensures + that commands which follow the SB command are executed after full completion + of the SB command. + + As opposed to GFVxBltWaitNotBusy(), this function doesn't block the CPU thread. + stretchblt engine may not be idle when returning from the function. Control returns + to the CPU right after a wait command is placed in the stretchblt engine command FIFO. + The GoForce hardware begins executing the commands following the StretchBlt engine idle + command only after the stretchblt engine becomes idle. + + @see GFVxBltWaitNotBusy() +*/ +GF_RETTYPE GFVxBltNotBusy(GFVxHandle VxHandle); + +/** This function checks whether the stretchblt engine is busy or idle. + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The function will wait until the stretchblt engine is idle. For example, if you want + to stretchblt to the frame buffer but the stretchblt engine is busy the function can + be used to wait until it is idle. + + As opposed to GFVxBltNotBusy(), this function blocks the CPU thread while waiting for + the stretchblt engine to become idle. + + @see GFVxBltNotBusy() + +*/ +GF_RETTYPE GFVxBltWaitNotBusy(GFVxHandle VxHandle); + +/** This function sets the current state stretchblt color space converion (CSC) + coefficients that will be programmed to GPU after calling GFVxBlt to do + YUV color space conversion to RGB. + How to use this routine: + - GFVxBltGetCSCCoeff() to get default YUV CSC coefficients, save them + - GFVxBltSetCSCCoeff() to change to new YUV CSC coefficients + - GFVxBlt() to stretchblt image with your new YUV CSC coefficients to RGB, + then done whatever + - GFVxBltSetCSCCoeff() to restore back default YUV CSC coefficients + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + @param pCoef (GFVXCSCCOEF*) Pointer to #GFVXCSCCOEF structure + @param option (NvU32) Option type, one of: + 
      +                - #GFVX_SET_CSC_USE_CCIR601_RANGE -- Use CCIR601 range.
+                  This option will ignore parameter pCoef. It will use
+                  pre-defined CSC CCIR601 coefficients values.
+                - #GFVX_SET_CSC_USE_FULL_RANGE -- Use color full range.
+                  This option will ignore parameter pCoef. It will use
+                  pre-defined CSC full range coefficients values.
+                - #GFVX_SET_CSC_USE_USER_DEFINED_RANGE -- Use user defined range.
+                  This option will require parameter pCoef. It will use
+                  CSC coefficients values provided from pCoef.
+
      + @param sbMode (#GFVXBLTMODE) StretchBlt mode, one of: + 
      +                - GFVX_BLT_FULL_MODE: Host full frame stretchblt trigger
+                - GFVX_BLT_PARTIAL_MODE: Host partial frame stretchblt trigger
+                - GFVX_BLT_AUTO_VI_MODE: Auto stretchblt trigger from VI
+
      + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFVxBltSetCSCCoeff(GFVxHandle VxHandle, + GFVXCSCCOEF *pCoef, + NvU32 option, + GFVXBLTMODE sbMode); + +/** This function sets the current state VI color space converion (CSC) + coefficients that will be programmed to GPU after calling GFVxVIPUpdate + to do YUV color space conversion to RGB. + How to use this routine: + - GFVxVIPGetCSCCoeff() to get default YUV CSC coefficients, save them + - GFVxVIPSetCSCCoeff() to change to new YUV CSC coefficients + - GFVxVIPUpdate() to preview image with your new YUV CSC coefficients to RGB + - GFVxVIPSetCSCCoeff() to restore back default YUV CSC coefficients + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + @param pCoef (#GFVXCSCCOEF*) Pointer to #GFVXCSCCOEF structure + @param option (NvU32) Option type, one of: + 
      +                - #GFVX_SET_CSC_USE_CCIR601_RANGE -- Use CCIR601 range.
+                  This option will ignore parameter pCoef. It will use
+                  pre-defined CSC CCIR601 coefficients values.
+                - #GFVX_SET_CSC_USE_FULL_RANGE -- Use color full range.
+                  This option will ignore parameter pCoef. It will use
+                  pre-defined CSC full range coefficients values.
+                - #GFVX_SET_CSC_USE_USER_DEFINED_RANGE -- Use user defined range.
+                  This option will require parameter pCoef. It will use
+                  CSC coefficients values provided from pCoef.
+
      + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFVxVIPSetCSCCoeff(GFVxHandle VxHandle, GFVXCSCCOEF *pCoef, NvU32 option); + +/** This function gets the current state stretchblt color space conversion (CSC) + coefficients + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + @param pCoef (#GFVXCSCCOEF*) Pointer to #GFVXCSCCOEF structure + @param sbMode (#GFVXBLTMODE) StretchBlt mode, one of: + - GFVX_BLT_FULL_MODE: Host full frame stretchblt trigger + - GFVX_BLT_PARTIAL_MODE: Host partial frame stretchblt trigger + - GFVX_BLT_AUTO_VI_MODE: Auto stretchblt trigger from VI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFVxBltGetCSCCoeff(GFVxHandle VxHandle, GFVXCSCCOEF *pCoef, GFVXBLTMODE sbMode); + +/** This function gets the current state VI color space conversion (CSC) coefficients + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + @param pCoef (#GFVXCSCCOEF*) Pointer to #GFVXCSCCOEF structure + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFVxVIPGetCSCCoeff(GFVxHandle VxHandle, GFVXCSCCOEF *pCoef); + +/** @page pageVxOverview VxAPI Overview + + The GFVxAPI is an abstraction layer for both the Video Scalar (StretchBlt) + and the Video Input (VI) module. The Video Scalar provides color space + conversion (CSC) and smooth scaling of video. The VI module, which connects + to the Video Input Port (VIP), accepts data from the VIP or the host CPU + through a FIFO mechanism. + + Video data, either decimated or not, can be sent from the VI to JPEG or + MPEG encoder, and at the same time can go to memory through CSC for previewing, + again either decimated or not. If a decimator is used in both the preview and + the encoder paths, it has to have same decimation factor. + + Video data can also be sent to EPP. RGB565, RGB444 and RGB888 data goes directly + and YUV422 data, pre or post decimated, is first converted to YUV444 by VI + before sending to EPP. + + If data coming from VIP is in Bayer format, VI first sends this data to ISP. + After processing, ISP returns YUV444 data to VI. VI converts output of ISP to + YUV422 before sending it to core for decimation or to memory or both. + + There are also options to crop, mirror and/or flip video data. + + The Video Scalar and the VI module accept YUV (4:2:2 or 4:2:0) and + RGB (565) data as input. YUV data can be converted to YUV planar data or + RGB data (RGB:565 for all processors, and RGB:888 or ARGB:8888 for GoForce + 3D 4800). RGB data can be scaled, but cannot be converted to YUV, for all + processors up to the GoForce 3D 4800. + + @section pageVxOverview1 Video Sources + + The video source for the VI module can be the host CPU or a camera + connected to the VIP. The video source for the Video Scalar can be the + video memory surface or the output of the JPEG or MPEG decoder through a + circular buffer. The GFVxAPI functions that deal only with the VIP have VIP + in their function names. + + @section pageVxOverview2 Video Camera Interface + + Usually a video camera connected through the VIP generates YUV 422 data + (CCIR656 format) which can be encoded by the NVIDIA GPU. Some cameras + generate JPEG-encoded images directly, and the GFSDK can be configured to + accept those JPEG-encoded bit streams. + + To control the JPEG input stream, VIP of newer NVIDIA GPUs supports the + following camera interface protocols for variably sized bitstream data: + - Type A interface: VHSync and VVSync length can be variable, and + VVClk should be kept running. (SC12 only) + - Type B interface: VHSync and VVSync length can be variable, and + VVClk can be stopped during the image transfer period. (SC12 only) + - Type C interface: VHSync and VVSync length are fixed, and VVClk + should be kept running. The camera can insert 0xff in the image as + padding. + + @section pageVxOverview3 Video Coordinate Systems (Regular and Rotated) + + A destination coordinate is always the same as a screen coordinate. The + source coordinate stays the same, even if there is rotation. +*/ + +/** @page pageVxAppNotes VxAPI Application Notes + + @section pageVxAppNotes1 Programming Sequence + + The easiest way to learn the VxAPI is by referring to the demonstration + application source code that come with the GFSDK package. A new application + can be started by creating a project at the same directory level as the + demo application source directory. This way the same directory tree + structure can be maintained. The general sequence for programming the + VxAPI is as follows: + + -# Make sure that the build project or file has the right paths to the + library and header files. Use relative directory addressing if possible. + The GFSDK/Inc directory must be included. + -# Include GFVx.h in the source file. This header is all that is needed to + access the exposed API functions. + -# Call GFRmOpen() before any other GFSDK functions (including the VxAPI). + -# Use the handle returned from the Resource Manager in the previous step + to call GFRmComponentGet() with #GF_VXAPI as the ComponentType in the + #GFRMCOMPONENT structure. The returned handle is the one to use + throughout all VxAPI calls. + -# To better utilize VxAPI functions, it is a good idea to call + GFVxGetProperty() to determine the version that you are using and the + available video memory. + -# Make calls to the appropriate VxAPI functions. Always remember to pass + the same #GFVxHandle returned from GFRmComponentGet(). + -# When all the VxAPI calls are completed, call GFRmComponentRelease(). + -# When exiting the application, call RmClose() to release everything + associated with the GFSDK. +*/ + +//////////////////Raw Capture Defination ////////////////////////// +/** Descriptor for raw data fetch buffers. + This structure describes a buffer and its fill status for Raw YUV transfered + from RDMA to the application. + It is used with GFVxRawCapture() and GFVxRawCaptureFetchImage() + in either polling or callback data fetch mode. + + @see GFVxCapture(), GFVxRawCaptureFetchImage() +*/ +typedef struct _GFVX_BUF { + NvU8 *pBuf; /**< Pointer to the buffer */ + NvU32 bufSize; /**< Size of the buffer in bytes */ + NvU32 nBytesCaptured; /**< Number of bytes captured, + app initializes to 0 + */ +} GFVX_BUF, *PGFVX_BUF; + + +/** Image source/target dimensions and data source for Raw data capturing. + + This structure is passed as parameter to GFVxRawCaptureStart() and describes + data source, source cropping rectangle and destination image size. + + @see GFVxRawCaptureStart() +*/ +typedef struct _GFVXRAWINFO +{ + PGFRMSURFACE pSrcSurf;/**< Surface to encode, + NULL for camera. + */ + PGFRECT pSrcRect; /**< Source image area need to capture */ + NvU32 DestWidth; /**< Final output data width */ + NvU32 DestHeight; /**< Final output data height */ + NvU32 uiOptions; /**< Bitmask of flags to control capturing + +
      + */ + NvU32 Error; /**< Returns detailed error code on GFVxRawCaptureStart() failure + + + + + + + +
      #GF_CAPT_ERROR_VIDEO_MEMORY_NOT_BIG_ENOUGHNot enough free video memory, try to release + unnecessary video surfaces
      #GF_CAPT_ERROR_WRONG_CONFIGWrong input parameters, for example srcRect + size greater than pSrcSurf dimensions
      #GF_CAPT_ERROR_NO_CALLBACKNo callback function available
      + */ + NvU32 colorFormat; +} GFVXRAWINFO, *PGFVXRAWINFO; + +/** GFVXRAWINFO uiOptions: +*/ +#define RAWCAPTURE_ATTR_RAW_DATA 0x00000010 +#define RAWCAPTURE_ATTR_RAW_JPEG_CAPTURE 0x00000020 +#define RAWCAPTURE_ATTR_RAW_DATA_STREAM 0x00000030 + +/** Raw data capture APIs +*/ +GF_RETTYPE GFVxRawCaptureStart( GFVxHandle VxHandle, + PGFVXRAWINFO pStart); + +GF_RETTYPE GFVxRawCaptureSetupInterrupt(GFVxHandle VxHandle, + void (*Inter)(void *), void *IPara); + +GF_RETTYPE GFVxRawCapture (GFVxHandle VxHandle, + PGFVX_BUF aBuf, NvU32 nBuf, NvU32 *pStatus ); + +GF_RETTYPE GFVxRawCaptureFetchImage (GFVxHandle pVx, + PGFVX_BUF aBuf, NvU32 nBuf, NvU32 *pStatus ); + +GF_RETTYPE GFVxRawCaptureEnd( GFVxHandle pVx ); + +//uiFrameStatus; + +/** Raw Capture data fetch status code: All data of the current frame was fetched. + @see GFVxRawCaptureFetchImage(), GFVxRawCapture() +*/ +#define RAWCAPTURE_DATA_COMPLETE 0x1 + +/** Raw Capture data fetch status code: Data was fetched only partially. + The application should make more calls to GFVxRawCaptureFetchImage() to fetch + the rest. + @see GFVxRawCaptureFetchImage(), GFVxRawCapture() +*/ +#define RAWCAPTURE_MORE_FETCH 0x2 + +/** Raw Capture data fetch status code: New frame was captured and is ready to + fetch. + @see GFVxRawCaptureFetchImage(), GFVxRawCapture() +*/ +#define RAWCAPTURE_NEW_FRAME 0x8 + +/** Raw Capture data fetch status code: Time out error occured while output data is fetching. + fetch. + @see GFVxRawCaptureFetchImage(), GFVxRawCapture() +*/ +#define RAWCAPTURE_TIME_OUT 0x10 + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFVX_H__ */ + + diff --git a/Start_WM/test6/inc/GFVxError.h b/Start_WM/test6/inc/GFVxError.h new file mode 100755 index 00000000..7f81f255 --- /dev/null +++ b/Start_WM/test6/inc/GFVxError.h @@ -0,0 +1,42 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFVxError.h + GFVxAPI error codes +*/ + +#ifndef __GFVXERROR_H__ +#define __GFVXERROR_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#define GFVX_ERROR_GET_COMPONENT (GFVX_ERROR | 0x00000001L) +/** GFVxAPI error code: Function not supported. */ +#define GFVX_ERROR_NO_SUPPORT (GFVX_ERROR | 0x00000002L) +#define GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED (GFVX_ERROR | 0x00000003L) +#define GFVX_ERROR_SURFACETYPE_NOT_SUPPORTED (GFVX_ERROR | 0x00000004L) +#define GFVX_ERROR_ILLEGAL_ALPHA_VALUE (GFVX_ERROR | 0x00000005L) +#define GFVX_ERROR_ILLEGAL_BAYER_VALUES (GFVX_ERROR | 0x00000006L) +#define GFVX_ERROR_ILLEGAL_PARAMETER (GFVX_ERROR | 0x00000007L) +#define GFVX_ERROR_DRIVER_NOT_SUPPORTED (GFVX_ERROR | 0x00000008L) +#define GFVX_ERROR_FLAG_NOT_SUPPORTED (GFVX_ERROR | 0x00000009L) +#define GFVX_ERROR_FAIL_ALLOCATE_MEMORY (GFVX_ERROR | 0x0000000AL) +#define GFVX_ERROR_ILLEGAL_VALUE (GFVX_ERROR | 0x0000000BL) + +#ifdef __cplusplus +} +#endif + +#endif // __GFVXERROR_H__ + + + diff --git a/Start_WM/test6/inc/GFVxScr.h b/Start_WM/test6/inc/GFVxScr.h new file mode 100755 index 00000000..394a33ef --- /dev/null +++ b/Start_WM/test6/inc/GFVxScr.h @@ -0,0 +1,311 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#if !defined (__GFVXSCR_INC__) +#define __GFVXSCR_INC__ + +/** VxAPI GFVXVIPINFO::Flag flagbit: 8-bit/clock video data. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_PARALLEL_INPUT 0x00000001 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Serial input. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_SERIAL_INPUT 0x00000002 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VHSYNC and VVSYNC in the data stream. + If this flag is set, vertical and horizontal sync for the camera picture + is contained in the data stream going into the data port of the VIP. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_HVSYNC_IN_STREAM 0x00000004 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Camera VHSYNC asserted by external signal. + If this flag is set, vertical and horizontal sync for the camera picture + is asserted to the GoForce chip by external signals, usually coming from + the camera chip. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_EXTERNAL_VHSYNC 0x00000008 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Camera VHSYNC generated by GoForce chip. + If this flag is set, vertical and horizontal sync is generated by the + GoForce chip, and not contained in the data stream. The following members + of GFVXVIPINFO have to be set to define the timing: + - GFVXVIPINFO::VHPulseWidth + - GFVXVIPINFO::VHPulsePeriod + - GFVXVIPINFO::VVPulseWidth + - GFVXVIPINFO::VVPulsePeriod + - GFVXVIPINFO::VVDelay + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_INTERNAL_VHSYNC 0x00000010 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VCLK generated externally. + If this flag is set, camera VCLK is provided from an external source, + and VLCK will be selected as clock source for VI module. + @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVX_VIP_EXTERNAL_VCLK_PRESERVE_CLKSEL +*/ +#define GFVX_VIP_EXTERNAL_VCLK 0x00000020 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VCLK generated by GoForce chip. + If this flag is set, camera VCLK is provided by the GoForce chip. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_INTERNAL_VCLK 0x00000040 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Detect field 0 or 1, will not work for + internal VHSYNC (#GFVX_VIP_INTERNAL_VHSYNC). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_DETECT_FIELD 0x00000080 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Horizontal flip. + Flip VIP image horizontally. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB_H_FLIP 0x00000100 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Vertical flip. + Flip VIP image vertically. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB_V_FLIP 0x00000200 + +/** VxAPI GFVXVIPINFO::Flag flagbit: CPU feeds image to VIP. + This flag indicates to the VIP, that image data is fed from the + host interface. + @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVxVIPFeedImage() +*/ +#define GFVX_VIP_HOST_IMAGE 0x00000400 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Change the default timing for VHSYNC and + VCLK. If this flag is set, VHSYNC and VCLK timing characteristics such as + polarity, active edge, serial frame polarity, size, field info are + overridden with GFVxVIPSetVIP() by the parameters passed in + GFVXVIPINFO::NewTiming. + + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CHANGE_DEFAULT_TIMING 0x00000800 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Camera master clock provided by GoForce + chip. When this flag is set, GFVXVIPINFO::MClockFreq must be set to the + ideal clock which the camera wants. Internally the best matching frequency + is provided to the camera. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ASK_FOR_MCLOCK 0x00001000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type A interface. + @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2 +*/ +#define GFVX_VIP_TYPE_A 0x00002000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type B interface. + @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2 +*/ +#define GFVX_VIP_TYPE_B 0x00004000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type C interface. + @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2 +*/ +#define GFVX_VIP_TYPE_C 0x00008000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Camera is running at type C interface + and do not remove the 0xFF, 0x02 sequence. + @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2 +*/ +#define GFVX_VIP_TYPE_C_RAW 0x00010000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Enable destination byte swap for YUV/RGB + data written to preview surface. + + This flag enables byte swap for 32 bit words of data coming from VIP and + going to a target RGB or YUV422 surface. The sequence of 4 byte groups in + (LSB)b0 b1 b2 b3(MSB) order is swapped to + (LSB)b1 b0 b3 b2(MSB). + + This flag only affects data written to a preview surface, i.e. VIP image + capture enabled with GFVxVIPSetVIP() and GFVxVIPUpdate(). It does not + affect raw data going to the JPEG/MPEG encoder. + + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_DEST_BYTE_SWAP 0x00020000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VI output without rotation + Rotate VIP image 0 degree + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ROTATE_0 0x00040000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 90 degree rotation + Rotate VIP image 90 degree + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ROTATE_90 0x00080000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 180 degree rotation + Rotate VIP image 180 degree + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ROTATE_180 0x00100000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 270 degree rotation + Rotate VIP image 270 degree + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ROTATE_270 0x00200000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: RGB565 input to EPP. + @todo clarify + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB565 0x00400000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: RGB888 input to EPP. + @todo clarify + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB888 0x00800000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: RGB444 input to EPP. + @todo clarify + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB444 0x01000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Preserve VI clock source but enable external VLCK pad. + This flag can be used in combination with GFVX_VIP_EXTERNAL_VCLK to enable + an external clock on VLCK, but keep the VI module clocksource. + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVX_VIP_EXTERNAL_VCLK +*/ +#define GFVX_VIP_EXTERNAL_VCLK_PRESERVE_CLKSEL 0x02000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type D interface. + @version SC17 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_TYPE_D 0x04000000 + +#define GFVX_VIP_CSI_ENABLE 0x08000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Bypass any manipulation on internal master + clock generation output pin. + + This flag is mutually exclusive to #GFVX_VIP_PRE_GENERATE_MCLOCK and + #GFVX_VIP_ASK_FOR_MCLOCK. + + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_BYPASS_MCLOCK_PIN 0x20000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Bypass any manipulation on VCLK, VHSYNC, + and VID[7:0] pins. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_BYPASS_NON_MCLOCK_PINS 0x40000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Pre-generation of master clock. + Useful for scanning the I2C bus for a camera. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_PRE_GENERATE_MCLOCK 0x80000000 + +/** + Bypass ISP mode. +*/ +#define GFVX_VIP_BYPASS_ISP 0x10000000 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Parallel data latched at falling edge + of VCLK (default is rising edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_PDL_FALLING_VCLK 0x00000001 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial data lacthed at rising edge of + VCLK (default is falling edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_SDL_RISING_VCLK 0x00000001 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC active low (default is active + high). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VHSYNC_ACTIVE_LOW 0x00000002 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC active low (default is active + high). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VVSYNC_ACTIVE_LOW 0x00000004 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC active leading edge (default + is trailing edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VHSYNC_ACTIVE_EDGE_LEAD 0x00000008 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC active leading edge (default + is trailing edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VVSYNC_ACTIVE_EDGE_LEAD 0x00000010 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial video frame sync active low, + falling edge indicates start of data frame (default is active high, rising + edge indicates start of data frame). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_SFRAME_ACTIVE_LOW 0x00000020 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial video input is 16 bit per + frame (default is 8 bit per frame). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_SFRAME_SIZE_16 0x00000040 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Field 0 is bottom/even field + (default is top/odd field). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_FILED_0_BOTTOM 0x00000080 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VCLK output from GoForce chip active + low (default is active high). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VCLK_OUTPUT_ACTIVE_LOW 0x00000100 + +#define GFVX_VIP_VHSYNC_ACTIVE_LOW_RESET 0x00000200 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC reset active low (default is active + high). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VVSYNC_ACTIVE_LOW_RESET 0x00000400 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC reset active leading edge (default + is trailing edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ + + +#endif diff --git a/Start_WM/test6/inc/cpuopsys.h b/Start_WM/test6/inc/cpuopsys.h new file mode 100755 index 00000000..daa89a73 --- /dev/null +++ b/Start_WM/test6/inc/cpuopsys.h @@ -0,0 +1,309 @@ + +/*! \brief + * Define compile time symbols for CPU type and operating system type. + * This file should only contain preprocessor commands so that + * there are no dependencies on other files. + * + * cpuopsys.h + * + * Copyright (c) 2001, Nvidia Corporation. All rights reserved. + */ + +/*! + * Uniform names are defined for compile time options to distinguish + * CPU types and Operating systems. + * Distinctions between CPU and OpSys should be orthogonal. + * + * These uniform names have initially been defined by keying off the + * makefile/build names defined for builds in the OpenGL group. + * Getting the uniform names defined for other builds may require + * different qualifications. + * + * The file is placed here to allow for the possibility of all driver + * components using the same naming convention for conditional compilation. + */ + +#ifndef __cpuopsys_h_ +#define __cpuopsys_h_ + +/*****************************************************************************/ +// Define all OS/CPU-Chip related symbols + +// ***** DOS variations +#if defined(__DJGPP__) +# define NV_DOS +#endif + +// ***** WINDOWS variations +#if defined(_WIN32) || defined(_WIN16) +# define NV_WINDOWS + +# if defined(_WIN32_WINNT) +# define NV_WINDOWS_NT +# elif defined(_WIN32_WCE) +# define NV_WINDOWS_CE +# elif !defined(NV_MODS) +# define NV_WINDOWS_9X +# endif +#endif // _WIN32 || defined(_WIN16) + +// ***** Unix variations +#if defined(__linux__) && !defined(NV_LINUX) +# define NV_LINUX +#endif // defined(__linux__) + +// SunOS + gcc +#if defined(__sun__) && defined(__svr4__) +# define NV_SUNOS +#endif // defined(__sun__) && defined(__svr4__) + +// SunOS + Sun Compiler (named SunPro, Studio or Forte) +#if defined(__SUNPRO_C) || defined(__SUNPRO_CC) +# define NV_SUNPRO_C +# define NV_SUNOS +# define __FUNCTION__ __func__ +# define NV_OPENGL_THREAD_UNSAFE // XXX To start with +#endif // defined(_SUNPRO_C) || defined(__SUNPRO_CC) + +#if defined(__FreeBSD__) +# define NV_BSD +#endif // defined(__FreeBSD__) + +// XXXar don't define NV_UNIX on MacOSX or vxworks or dos or QNX +#if (defined(__unix__) || defined(__unix) ) && !defined(macosx) && !defined(vxworks) && !defined(__DJGPP__) && !defined(NV_UNIX) && !defined(__QNX__) && !defined(__QNXNTO__)// XXX until removed from Makefiles +# define NV_UNIX +#endif // defined(__unix__) + +#if (defined(__QNX__) || defined(__QNXNTO__)) && !defined(NV_QNX) +# define NV_QNX +#endif + +// ***** Apple variations +#if defined(macintosh) || defined(__APPLE__) +# define NV_MACINTOSH +# if defined(__MACH__) +# define NV_MACINTOSH_OSX +# if !defined(NV_MODS) +# define NV_MACOSX_OPENGL +# endif +# else +# define NV_MACINTOSH_OS9 +# endif +# if defined(__LP64__) +# define NV_MACINTOSH_64 +# endif +#endif // defined(macintosh) + +// ***** VxWorks +// Tornado 2.21 is gcc 2.96 and #defines __vxworks. +// Tornado 2.02 is gcc 2.7.2 and doesn't define any OS symbol, so we rely on +// the build system #defining vxworks. +#if defined(__vxworks) || defined(vxworks) +# define NV_VXWORKS +# if (CPU==PENTIUM) +# define NV_VXWORKS_PENTIUM +# elif (CPU==PPC604) +# define NV_VXWORKS_PPC604 +# endif +#endif + +// ***** Integrity OS +#if defined(__INTEGRITY) +# if !defined(NV_INTEGRITY) +# define NV_INTEGRITY +# endif +#endif + +// ***** Processor type variations +// Note: The prefix NV_CPU_* is taken by \\sw\main\sdk\nvidia\inc\Nvcm.h + +#if ((defined(_M_IX86) || defined(__i386__) || defined(__i386)) && !defined(NVCPU_X86)) // XXX until removed from Makefiles + // _M_IX86 for windows, __i386__ for Linux (or any x86 using gcc) + // __i386 for Studio compiler on Solaris x86 +# define NVCPU_X86 // any IA32 machine (not x86-64) +#endif + +#if defined(_WIN32) && defined(_M_IA64) +# define NVCPU_IA64_WINDOWS // any IA64 for Windows opsys +#endif +#if defined(NV_LINUX) && defined(__ia64__) +# define NVCPU_IA64_LINUX // any IA64 for Linux opsys +#endif +#if defined(NVCPU_IA64_WINDOWS) || defined(NVCPU_IA64_LINUX) || defined(IA64) +# define NVCPU_IA64 // any IA64 for any opsys +#endif + +#if (defined(NV_MACINTOSH) && !(defined(__i386__) || defined(__x86_64__))) || defined(__PPC__) || defined(__ppc) +# ifndef NVCPU_PPC +# define NVCPU_PPC // any PowerPC architecture +# endif +# ifndef NV_BIG_ENDIAN +# define NV_BIG_ENDIAN +# endif +#endif + +#if defined(__x86_64) || defined(AMD64) || defined(_M_AMD64) +# define NVCPU_X86_64 // any x86-64 for any opsys +#endif + +#if defined(__arm__) && !defined(NVCPU_ARM) +# define NVCPU_ARM +#endif + +#if defined(__XSCALE__) +#define NVCPU_XSCALE // for XSCALE ARM processors +#endif + +#if defined(__SH4__) +# ifndef NVCPU_SH4 +# define NVCPU_SH4 // Renesas (formerly Hitachi) SH4 +# endif +#endif + +// For Xtensa processors +#if defined(__XTENSA__) +# define NVCPU_XTENSA +# if defined(__XTENSA_EB__) +# define NV_BIG_ENDIAN +# endif +#endif + + +// Other flavors of CPU type should be determined at run-time. +// For example, an x86 architecture with/without SSE. +// If it can compile, then there's no need for a compile time option. +// For some current GCC limitations, these may be fixed by using the Intel +// compiler for certain files in a Linux build. + + +#if defined(NVCPU_IA64) || defined(NVCPU_X86_64) +# define NV_64_BITS // all architectures where pointers are 64 bits +#else + // we assume 32 bits. I don't see a need for NV_16_BITS. +#endif + +// NOTE: NV_INT64_OK is not needed in the OpenGL driver for any platform +// we care about these days. The only consideration is that Linux does not +// have a 64-bit divide on the server. To get around this, we convert the +// expression to (double) for the division. +#if (!(defined(macintosh) || defined(vxworks) || defined(__INTEL_COMPILER)) || defined(NV_LINUX)) && !defined(NV_INT64_OK) +#define NV_INT64_OK +#endif + +// For verification-only features not intended to be included in normal drivers +#if defined(NV_MODS) && defined(DEBUG) && !defined(NV_DOS) +#define NV_VERIF_FEATURES +#endif + + +/* + * New, safer family of #define's -- these ones use 0 vs. 1 rather than + * defined/!defined. This is advantageous because if you make a typo, say: + * + * #if NVCPU_IS_BIG_ENDAIN // Oops! Endian is misspelled + * + * ...some compilers can give you a warning telling you that you screwed up. + * The compiler can also give you a warning if you forget to #include + * "cpuopsys.h" in your code before the point where you try to use these + * conditionals. + * + * Also, the names have been prefixed in more cases with "CPU" or "OS" for + * increased clarity. You can tell the names apart from the old ones because + * they all use "_IS_" in the name. + * + * Finally, these can be used in "if" statements and not just in #if's. For + * example: + * + * if (NVCPU_IS_BIG_ENDIAN) x = Swap32(x); + * + * Maybe some day in the far-off future these can replace the old #define's. + */ +#if defined(NV_WINDOWS) +#define NVOS_IS_WINDOWS 1 +#else +#define NVOS_IS_WINDOWS 0 +#endif +#if defined(NV_WINDOWS_CE) +#define NVOS_IS_WINDOWS_CE 1 +#else +#define NVOS_IS_WINDOWS_CE 0 +#endif +#if defined(NV_LINUX) +#define NVOS_IS_LINUX 1 +#else +#define NVOS_IS_LINUX 0 +#endif +#if defined(NV_UNIX) +#define NVOS_IS_UNIX 1 +#else +#define NVOS_IS_UNIX 0 +#endif +#if defined(NV_QNX) +#define NVOS_IS_QNX 1 +#else +#define NVOS_IS_QNX 0 +#endif +#if defined(NV_MACINTOSH) +#define NVOS_IS_MACINTOSH 1 +#else +#define NVOS_IS_MACINTOSH 0 +#endif +#if defined(NV_VXWORKS) +#define NVOS_IS_VXWORKS 1 +#else +#define NVOS_IS_VXWORKS 0 +#endif +#if defined(NV_INTEGRITY) +#define NVOS_IS_INTEGRITY 1 +#else +#define NVOS_IS_INTEGRITY 0 +#endif +#if defined(NVCPU_X86) +#define NVCPU_IS_X86 1 +#else +#define NVCPU_IS_X86 0 +#endif +#if defined(NVCPU_IA64) +#define NVCPU_IS_IA64 1 +#else +#define NVCPU_IS_IA64 0 +#endif +#if defined(NVCPU_X86_64) +#define NVCPU_IS_X86_64 1 +#else +#define NVCPU_IS_X86_64 0 +#endif +#if defined(NVCPU_PPC) +#define NVCPU_IS_PPC 1 +#else +#define NVCPU_IS_PPC 0 +#endif +#if defined(NVCPU_ARM) +#define NVCPU_IS_ARM 1 +#else +#define NVCPU_IS_ARM 0 +#endif +#if defined(NVCPU_SH4) +#define NVCPU_IS_SH4 1 +#else +#define NVCPU_IS_SH4 0 +#endif +#if defined(NVCPU_XTENSA) +#define NVCPU_IS_XTENSA 1 +#else +#define NVCPU_IS_XTENSA 0 +#endif +#if defined(NV_BIG_ENDIAN) +#define NVCPU_IS_BIG_ENDIAN 1 +#else +#define NVCPU_IS_BIG_ENDIAN 0 +#endif +#if defined(NV_64_BITS) +#define NVCPU_IS_64_BITS 1 +#else +#define NVCPU_IS_64_BITS 0 +#endif + +/*****************************************************************************/ + +#endif /* __cpuopsys_h_ */ diff --git a/Start_WM/test6/inc/gfrm_clock_ids.h b/Start_WM/test6/inc/gfrm_clock_ids.h new file mode 100755 index 00000000..bd0d1209 --- /dev/null +++ b/Start_WM/test6/inc/gfrm_clock_ids.h @@ -0,0 +1,22 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file clock_ids.h + Clock List & string names +*/ + +GFRM_CLOCK(OSC,"osc") +GFRM_CLOCK(ROSC,"rosc") +GFRM_CLOCK_PLL(PLL1,"pll1") +GFRM_CLOCK_PLL(PLL2,"pll2") +GFRM_CLOCK(REFCLK0,"refclk0") +GFRM_CLOCK(REFCLK1,"refclk1") +GFRM_CLOCK(REFCLK2,"refclk2") +GFRM_CLOCK_PLL(PLL3,"pll3") + diff --git a/Start_WM/test6/inc/gfrm_module_ids.h b/Start_WM/test6/inc/gfrm_module_ids.h new file mode 100755 index 00000000..fb644b13 --- /dev/null +++ b/Start_WM/test6/inc/gfrm_module_ids.h @@ -0,0 +1,56 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file module_ids.h + Module List & string names +*/ + + +GFRM_MODULE(HOST1X, "host1x") +GFRM_MODULE(MPD,"mpd") +GFRM_MODULE(ME,"me") +GFRM_MODULE(JPEGE,"jpege") +GFRM_MODULE(VI,"vi") +GFRM_MODULE(EPP,"epp") +GFRM_MODULE(ISP,"isp") +GFRM_MODULE(DSPCORE,"dspcore") +GFRM_MODULE(GR2D,"gr2d") +GFRM_MODULE(GR3D,"gr3d") +GFRM_MODULE(DISPLAY,"display") +GFRM_MODULE(I2S,"i2s") +GFRM_MODULE(IC,"ic") +GFRM_MODULE(SD,"sd") +GFRM_MODULE(MC,"mc") +GFRM_MODULE(EMC,"emc") +GFRM_MODULE(DSP,"dsp") +GFRM_MODULE(EFUSE,"efuse") +GFRM_MODULE(AUDIO,"audio") +GFRM_MODULE(TVO,"tvo") +GFRM_MODULE(DISPLAYB,"displayb") +GFRM_MODULE(I2SB,"i2sb") +GFRM_MODULE(DSPB,"dspb") +GFRM_MODULE(CVE,"cve") +GFRM_MODULE(DSPBCORE,"dspbcore") +GFRM_MODULE(CSI,"csi") +GFRM_MODULE(TVDAC,"tvdac") +GFRM_MODULE(APB,"apb") +GFRM_MODULE(RESET, "reset") +GFRM_MODULE(SPROM, "sprom") +GFRM_MODULE(GPIO, "gpio") +GFRM_MODULE(CLK, "clk") +GFRM_MODULE(UART, "uart") +GFRM_MODULE(UART2, "uart2") +GFRM_MODULE(UART3, "uart3") +GFRM_MODULE(TIMER, "timer") +GFRM_MODULE(KBC, "kbc") +GFRM_MODULE(DMA, "dma") +GFRM_MODULE(USB, "usb") +GFRM_MODULE(CEATA, "ceata") +GFRM_MODULE(FLASH, "flash") +GFRM_MODULE(XHOST, "xhost") diff --git a/Start_WM/test6/inc/nvboard.h b/Start_WM/test6/inc/nvboard.h new file mode 100755 index 00000000..9277a904 --- /dev/null +++ b/Start_WM/test6/inc/nvboard.h @@ -0,0 +1,619 @@ +/* + * Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef NVBOARD_H +#define NVBOARD_H + +#include "nvcommon.h" +#include "nverror.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** NvBoard - Board Support Package + + NvBoard is designed to decouple customer platform specifics from generic + binary only drivers. + + The interface must be thread-safe. + */ + +typedef struct NvBoardAperture_t +{ + /* Physical Address */ + NvPhysAddr address; + + /* Size of Aperture */ + NvU32 size; +} NvBoardAperture; + +typedef struct NvBoardApertureIO_t +{ + void ( *Write8 )( void *pAddress, NvU8 data ); + void ( *Write16 )( void *pAddress, NvU16 data ); + void ( *Write32 )( void *pAddress, NvU32 data ); + void ( *Write64 )( void *pAddress, NvU64 data ); + NvU8 ( *Read8 )( void *pAddress ); + NvU16 ( *Read16 )( void *pAddress ); + NvU32 ( *Read32 )( void *pAddress ); + NvU64 ( *Read64 )( void *pAddress ); +} NvBoardApertureIO; + +typedef struct NvBoardApertures_t +{ + NvBoardAperture hostInterface; + + /* pIO is null unless the apertures cannot be dereferenced */ + NvBoardApertureIO *pIO; +} NvBoardApertures; + +typedef enum +{ + /* Bus type A */ + NvBoardBusType_A, + + /* Bus type C */ + NvBoardBusType_C, + + NvBoardBusType_Forceword = 0x7fffffff, +} NvBoardBusType; + +typedef enum +{ + /* Direct Addressing */ + NvBoardBusAddressing_Direct, + + /* Indirect Addressing */ + NvBoardBusAddressing_Indirect, + + NvBoardBusAddressing_Forceword = 0x7fffffff, +} NvBoardBusAddressing; + +typedef enum +{ + /* 16-bit bus */ + NvBoardBusWidth_16, + + /* 32-bit bus */ + NvBoardBusWidth_32, + + NvBoardBusWidth_Forceword = 0x7fffffff, +} NvBoardBusWidth; + +typedef enum +{ + /* Handshake mode. */ + NvBoardBusMode_Handshake, + + /* Fixed cycle mode. */ + NvBoardBusMode_FixedCycle, + + NvBoardBusMode_Forceword = 0x7fffffff, +} NvBoardBusMode; + +typedef enum +{ + /* Asynchronous. */ + NvBoardBusSynchronization_Asynchronous, + + /* Synchronous. */ + NvBoardBusSynchronization_Synchronous, + + NvBoardBusSynchronization_Forceword = 0x7fffffff, +} NvBoardBusSynchronization; + +typedef enum +{ + /* Active low. */ + NvBoardBusReadyPolarity_ActiveLow, + + /* Active high. */ + NvBoardBusReadyPolarity_ActiveHigh, + + NvBoardBusReadyPolarity_Forceword = 0x7fffffff, +} NvBoardBusReadyPolarity; + +typedef struct NvBoardMode_t +{ + NvBoardBusAddressing GPUaddressing; // Bus perspective from GPU + NvBoardBusWidth GPUwidth; + NvBoardBusAddressing CPUaddressing; // Bus perspective from CPU + NvBoardBusWidth CPUwidth; + NvBoardBusType type; + NvBoardBusMode mode; + NvBoardBusSynchronization synchronization; + NvBoardBusReadyPolarity readyPolarity; +} NvBoardMode; + +/** Stateless methods. Methods can be called before NvBoardInit */ + +/** NvBoardListSupportedModes - Method to enumerate the modes of the board + + Two calls should be made to this method. + + On the first call, the method populates the number of modes, for the + display. When this call is issued pMode should be NULL. + + On the second call, the length of the pMode array is indicated by + the value of *pNum. When pNum is less than the number of modes the + method populates the pMode array with only the first pNum modes. + When is more than the number of modes, the method populates the + pMode array with the number of modes and writes the number of modes + into pNum. + + The first mode enumerated by this method is the recommended / default mode + for the display. + + @param pNum unsigned integer value indicating the number of modes in + the array pMode. + + @param pMode pointer to an array of mode structures, where the size of + the array is determined by the value in pNum. + + @retval NvSuccess - on success + NvErrorBadParameter - when at least one parameter is incorrect + */ +NvError +NvBoardListSupportedModes( NvU32 *pNum, NvBoardMode *pMode ); + +/** Library Initialization */ + +/** NvBoardInit - platform initialization. Typically chip select is configured here. + + NvBoardInit uses a reference counter. The first invocation performs the + initialization, all future calls increment the counter. The counter is + decremented by NvBoardDeInit. + + This method is to be called before any other NvBoard methods can be used. + + @param pMode pointer to structure containing a mode to set on the board. + If mode is null, the recommended mode will be chosen. + */ +NvError +NvBoardInit( const NvBoardMode *pMode ); + +/** NvBoardDeInit - platform deinitialization. + */ +void +NvBoardDeInit( void ); + +/** Wince platform resume control */ +NvError +NvBoardResume( void ); + +/** Wince platform suspend control */ +NvError +NvBoardSuspend( void ); + +/** SD card detect status when card detect pin is connected to CPU GPIO pin */ +NvError +nvBoardSDCardDetectStatus(NvU32 *bCardInserted); + +/** SD card detect sysintr number if card detect pin is connected to CPU GPIO pin*/ +NvError +nvBoardSDCardDetectSysintr(NvU32 *dwSysintr); + +/** SD card socket power pin configuration + In general, this pin is connected to CPU GPIO pin, and we need to configure + GPIO input/output mode and setup default value +*/ +NvError +nvBoardSDSocketPowerInit(void); + +/** SD card socket power control*/ +NvError +nvBoardSDSocketPowerOnOff(NvU32 SDPowerOn); + +/** Camera(VI) interface power plane control*/ +NvError +nvBoardVIPowerOnOff(NvU32 VIPowerOn); + +/** OEM specific powerOn related calls after NV backlight ON. + + @retval ERROR_SUCCESS on success or appropriate wince error + codes. +*/ +NvError +nvBoard_PostOEMBacklightOn(void); + +/** OEM specific powerOff related calls after NV backlight Off. + + @retval ERROR_SUCCESS on success or appropriate wince error + codes. +*/ +NvError +nvBoard_PostOEMBacklightOff(void); + +/** NvBoardGetApertures - get apertures + */ +NvError +NvBoardGetApertures( NvBoardApertures *pApertures ); + +/** NvBoardGetMode - get current mode + */ +NvError +NvBoardGetMode( NvBoardMode *pMode ); + +/** Device Events -- Abstraction for interrupts */ + +/* NvDeviceEvent enumerates the types of events. NvBoard implementors should not + hardcode event names. The only enumerated value that should be used in the + implementation of NvBoard is NvDeviceEvent_Num. + */ +typedef enum NvDeviceEvent_t +{ + /* NOTE: Currently using unabstracted events until INTx is removed. */ + NvDeviceEvent_HOST = 0, + NvDeviceEvent_GRMPD, + NvDeviceEvent_ME, + NvDeviceEvent_JPEGE, + NvDeviceEvent_VI, + NvDeviceEvent_EPP, + NvDeviceEvent_ISP, + NvDeviceEvent_DSP, + NvDeviceEvent_GR2D, + NvDeviceEvent_GR3D, + NvDeviceEvent_DISPLAY, + NvDeviceEvent_I2S, + NvDeviceEvent_IC, + NvDeviceEvent_SD, + NvDeviceEvent_MC, + NvDeviceEvent_EMC, + + /* NUM should always be the 2nd last enumerated value */ + NvDeviceEvent_Num, + + NvDeviceEvent_Forceword = 0x7fffffff, +} NvDeviceEvent; + +/** NvBoardEnableEvent - Method to enable an event + + If the event is fired before a client is waiting, the event will be remembered + for the next NvBoardWaitForEvent invocation. + */ +NvError +NvBoardEnableEvent( NvDeviceEvent event ); + +/** NvBoardDisableEvent - Method to disable an event + */ +void +NvBoardDisableEvent( NvDeviceEvent event ); + +/** NvBoardWaitForEvent - This method blocks until the event is fired + + Each event may only have one client waiting on it. If more than one client + needs to be notified of an event, a broadcast layer will need to be + developed on top of this API. + + Once an event is fired, it is disabled. To reenable the event use + NvBoardEnableEvent. +*/ +NvError +NvBoardWaitForEvent( NvDeviceEvent event ); + +/** NvBoardWaitForEventWithTimeOut - NvBoardWaitForEvent with a timeout + + @param timeOut Unit is milliseconds + */ +NvError +NvBoardWaitForEventWithTimeOut( NvDeviceEvent event, NvU32 timeOut ); + +/** I2C I/O */ + +/** NvBoardI2CWrite - I2C write operation. Implementing this function is optional. + */ +NvError +NvBoardI2CWrite( NvU32 addr, const void *ptr, NvU32 size ); + +/** NvBoardI2CRead - I2C read operation. Implementing this function is optional. + */ +NvError +NvBoardI2CRead( NvU32 addr, void *ptr, NvU32 size ); + +/** Voltage and power control */ + +typedef enum NvBoardPowerPlane_t +{ + NvBoardPowerPlane_AOCVDD = 0, + NvBoardPowerPlane_VECVDD, + NvBoardPowerPlane_MMCVDD, + NvBoardPowerPlane_TDCVDD, + NvBoardPowerPlane_VVDD, + NvBoardPowerPlane_EMVDD, + NvBoardPowerPlane_ACVDD, + NvBoardPowerPlane_LVDD, + NvBoardPowerPlane_HVDD, + NvBoardPowerPlane_AUXVDD, + NvBoardPowerPlane_R1CVDD, + NvBoardPowerPlane_SDVDD, + NvBoardPowerPlane_DRAM, + + NvBoardPowerPlane_Forceword = 0x7fffffff, +} NvBoardPowerPlane; + +typedef enum NvBoardClock_t +{ + NvBoardClock_PLL1 = 0, + NvBoardClock_PLL2, + NvBoardClock_COSC, + NvBoardClock_ROSC, + NvBoardClock_REF1, + NvBoardClock_REF2, + + NvBoardClock_Forceword = 0x7fffffff, +} NvBoardClock; + +/** NvBoardSetVoltage - change voltage of hardware block + + @param voltage Unit is millivolts + */ +NvError +NvBoardSetVoltage( NvBoardPowerPlane block, NvU32 voltage ); + +/** NvBoardGetVoltage - get voltage of hardware block + + @param voltage Unit is millivolts + */ +NvError +NvBoardGetVoltage( NvBoardPowerPlane plane, NvU32 *voltage ); + +/** NvBoardPowerOn - enable power to block + */ +NvError +NvBoardPowerOn( NvBoardPowerPlane plane ); + +/** NvBoardPowerOff - disable power to block + */ +NvError +NvBoardPowerOff( NvBoardPowerPlane plane ); + +/** NvBoardClockOn - enable clock + */ +NvError +NvBoardClockOn( NvBoardClock clock ); + +/** NvBoardClockOff - disable clock + */ +NvError +NvBoardClockOff( NvBoardClock clock ); + +/** NvBoardSetFrequency - set frequency of clock + + @param frequency unit is KHz + */ +NvError +NvBoardSetFrequency( NvBoardClock clock, NvU32 frequency ); + + +/** Platfrom specific debug function. This like an ioctl to the platfrom + sepcific code. + */ +void NvBoardDebug(void *p, NvU32 op, NvU32 arg); + +/** Event notification */ + +typedef enum +{ + NvBoardDeviceType_Silicon, + NvBoardDeviceType_Emulator, + NvBoardDeviceType_Forceword = 0x7fffffff, +} NvBoardDeviceType; + +typedef struct NvBoardDeviceInfo_t +{ + NvU32 MinorRev; + NvU32 MajorRev; + NvU32 ChipID; + NvU32 Family; + NvBoardDeviceType Type; +} NvBoardDeviceInfo; + +/** NvBoardPostChipInit - Called after the chip is intialized. + + Chip specific timings can be programmed at this point. + + NvIrqPostChipInit should be called here. + */ +NvError +NvBoardPostChipInit( NvBoardDeviceInfo *deviceInfo ); + +/** NvBoardPreChipDeInit - Called before chip is shutdown. + + NvIrqPreChipDeInit should be called here. + */ +NvError +NvBoardPreChipDeInit( void ); + +/** NvBoardClockSwitch - Clock switch handling + + @param frequency Unit is kHz + */ +NvError +NvBoardClockSwitch( NvU32 frequency ); + +typedef enum NvBoardStateEvent_t +{ +#ifdef NV_WINDOWS_CE + NvBoardStateEvent_PreDeviceInit, + NvBoardStateEvent_PostDeviceInit, + NvBoardStateEvent_PrePanelInit, + NvBoardStateEvent_PostPanelInit, + NvBoardStateEvent_PreSetMode, + NvBoardStateEvent_PostSetMode, + NvBoardStateEvent_PreDisplayInit, + NvBoardStateEvent_PostDisplayInit, + NvBoardStateEvent_PreOEMPowerHandlerVideoPowerOff, + NvBoardStateEvent_PostOEMPowerHandlerVideoPowerOff, + NvBoardStateEvent_PreOEMPowerHandlerVideoPowerOn, + NvBoardStateEvent_PostOEMPowerHandlerVideoPowerOn, +#endif + + NvBoardStateEvent_Forceword = 0x7fffffff, +} NvBoardStateEvent; + +/** NvBoardGlobalStateNotification - Called during global state transitions + + Only used on Windows CE at the moment. + */ +NvError +NvBoardGlobalStateNotification( NvBoardStateEvent event ); + +void +NvBoardOsWaitUS( NvU32 usec ); + +void +NvBoardOsSleepMS( NvU32 msec ); + +typedef struct NvBoardOsMutex_t *NvBoardOsMutex; +typedef struct NvBoardOsSemaphore_t *NvBoardOsSemaphore; +typedef struct NvBoardOsThread_t *NvBoardOsThread; + +NvError +NvBoardOsMutexCreate( const char *key, NvBoardOsMutex *mutex ); + +void +NvBoardOsMutexLock( NvBoardOsMutex mutex ); + +void +NvBoardOsMutexUnlock( NvBoardOsMutex mutex ); + +void +NvBoardOsMutexDestroy( NvBoardOsMutex mutex ); + +typedef struct NvBoardOsSharedMemDescriptor_t *NvBoardOsSharedMemDescriptor; + +NvError +NvBoardOsSharedMemAlloc( const char *key, size_t size, + NvBoardOsSharedMemDescriptor *descriptor ); + +NvError +NvBoardOsSharedMemMap( NvBoardOsSharedMemDescriptor descriptor, size_t offset, + size_t size, void **ptr ); + +void +NvBoardOsSharedMemUnmap( void *ptr, size_t size ); + +void +NvBoardOsSharedMemFree( NvBoardOsSharedMemDescriptor descriptor ); + +void +NvBoardOsMemset( void *s, NvU8 c, size_t size ); + +int +NvBoardOsMemcmp( const void *s1, const void *s2, size_t size ); + +#define NVBOARDOS_KEY_MAX 128 + +#define NVBOARDOS_MEM_NONE 0x0 +#define NVBOARDOS_MEM_READ 0x1 +#define NVBOARDOS_MEM_WRITE 0x2 +#define NVBOARDOS_MEM_EXECUTE 0x4 +#define NVBOARDOS_MEM_READ_WRITE ( NVBOARDOS_MEM_READ | NVBOARDOS_MEM_WRITE ) + +typedef enum +{ + NvBoardOsMemAttribute_Uncached = 0, + NvBoardOsMemAttribute_WriteBack = 1, + NvBoardOsMemAttribute_WriteCombined = 2, + + NvBoardOsMemAttribute_Force32 = 0x7FFFFFFF +} NvBoardOsMemAttribute; + +NvError +NvBoardOsPhysicalMemMap( NvPhysAddr phys, size_t size, + NvBoardOsMemAttribute attrib, NvU32 flags, void **ptr ); + + +void +NvBoardOsPhysicalMemUnmap( void *ptr, size_t size ); + +NvError +NvBoardOsMemoryAlloc(void **ptr, size_t size); + +void +NvBoardOsMemoryFree(void *ptr, size_t size); + +NvError +NvBoardOsGetConfigU32( const char *name, NvU32 *value ); + +void * +NvBoardOsAlloc( size_t size ); + +void +NvBoardOsFree( void *ptr ); + +typedef void (*NvBoardOsThreadFunction)( void *args ); + +NvError +NvBoardOsThreadCreate( const char *name, NvBoardOsThreadFunction function, + void *args, NvBoardOsThread *thread ); + +void +NvBoardOsThreadJoin( NvBoardOsThread thread ); + +void +NvBoardOsThreadYield( void ); + +NvError +NvBoardOsSemaphoreCreate( const char *key, NvBoardOsSemaphore *semaphore, + NvU32 value ); + +void +NvBoardOsSemaphoreWait( NvBoardOsSemaphore semaphore ); + +void +NvBoardOsSemaphoreSignal( NvBoardOsSemaphore semaphore ); + +void +NvBoardOsSemaphoreDestroy( NvBoardOsSemaphore semaphore ); + +NvError +nvBoard_PreDisplayInit(void); + +NvError +nvBoard_PostDisplayInit(void); + +NvError +nvBoard_PrePanelInit(void); + +NvError +nvBoard_PostPanelInit(void); + +NvError +nvBoard_PreDeviceInit(void); + +NvError +nvBoard_PostDeviceInit(void); + +NvError +nvBoard_PreSetMode(void); + +NvError +nvBoard_PostSetMode(void); + +NvError +nvBoard_PreOEMPowerHandlerVideoPowerOff(void); + +NvError +nvBoard_PostOEMPowerHandlerVideoPowerOff(void); + +NvError +nvBoard_PreOEMPowerHandlerVideoPowerOn(void); + +NvError +nvBoard_PostOEMPowerHandlerVideoPowerOn(void); + +#ifdef __cplusplus +} +#endif + +#endif // NVBOARD_H diff --git a/Start_WM/test6/inc/nvcommon.h b/Start_WM/test6/inc/nvcommon.h new file mode 100755 index 00000000..ab79088f --- /dev/null +++ b/Start_WM/test6/inc/nvcommon.h @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2006 - 2007 NVIDIA Corporation. All Rights Reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef NVCOMMON_H +#define NVCOMMON_H + +#include "nvtypes.h" + +// Include headers that provide NULL, size_t, offsetof, and [u]intptr_t. In the +// event that the toolchain doesn't provide these, provide them ourselves. +#include +#if NVOS_IS_WINDOWS_CE +typedef int intptr_t; +typedef unsigned int uintptr_t; +#elif (NVOS_IS_LINUX && !defined(__KERNEL__)) || defined(__arm) +#include +#endif + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** nvcommon.h contains standard definitions used by various interfaces + */ + +/** A physical address */ +#if NVOS_IS_WINDOWS +typedef NvU64 NvPhysAddr; +#else +typedef NvU32 NvPhysAddr; +#endif + +// For historical reasons that are hard to fix, nvtypes.h has an incorrect +// definition of NV_ALIGN_BYTES for Windows and Macintosh, and for other +// unsupported compilers like IAR. Provide a correct macro, which we call +// NV_ALIGN. This can be removed if and when nvtypes.h is fixed. +// Alternatively, we could use NV_DECLARE_ALIGNED... +#if NVOS_IS_WINDOWS +#define NV_ALIGN(size) __declspec(align(size)) +#elif defined(__GNUC__) || NVOS_IS_QNX +#define NV_ALIGN(size) __attribute__ ((aligned (size))) +#elif defined(__arm) +#define NV_ALIGN(size) __align(size) +#endif + +/** + * This macro wraps its argument with the equivalent of "#ifdef DEBUG", but also + * can be used where #ifdef's can't, like inside a macro. + */ +#if defined(DEBUG) +#define NV_DEBUG_CODE(x) x +#else +#define NV_DEBUG_CODE(x) +#endif + +/** Macro for determining the size of an array */ +#define NV_ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +/** Macro for taking min or max of a pair of numbers */ +#define NV_MIN(a,b) (((a) < (b)) ? (a) : (b)) +#define NV_MAX(a,b) (((a) > (b)) ? (a) : (b)) + +/** + * By convention, we use this value to represent an infinite wait interval in + * APIs that expect a timeout argument. A value of zero should not be + * interpreted as infinite -- it should be interpreted as "time out immediately + * and simply check whether the event has already happened." + */ +enum { NV_WAIT_INFINITE = 0xFFFFFFFF }; + +/** + * Union that can be used to view a 32-bit word as your choice of a 32-bit + * unsigned integer, a 32-bit signed integer, or an IEEE single-precision float. + * Here is an example of how you might use it to extract the (integer) bitwise + * representation of a floating-point number: + * NvData32 data; + * data.f = 1.0f; + * printf("%x", data.u); + */ +typedef union NvData32Rec +{ + NvU32 u; + NvS32 i; + NvF32 f; +} NvData32; + +/** NvPoint structure is used to determine a location on a 2-dimensional + object, where the coordinate (0,0) is located at the top-left of the + object. The values of x and y are in pixels. + */ +typedef struct _NvPoint_t +{ + /** horizontal location of the point */ + NvS32 x; + + /** vertical location of the point */ + NvS32 y; + +} NvPoint; + + +/** NvRect structure is used to define a 2-dimensional rectangle + where the rectangle is bottom right exclusive (i.e. the right most + column, and the bottom row of the rectangle is not included) + */ +typedef struct _NvRect_t +{ + /** left column of a rectangle */ + NvS32 left; + + /** top row of a rectangle*/ + NvS32 top; + + /** right column of a rectangle */ + NvS32 right; + + /** bottom row of a rectangle */ + NvS32 bottom; + +} NvRect; + + +/** NvSize structure is used to define a 2-dimensional surface + where the surface is determined by it's height and width in + pixels + */ +typedef struct _NvSize_t +{ + /* width of the surface in pixels */ + NvS32 width; + + /* height of the surface in pixels */ + NvS32 height; + +} NvSize; + + +/** NvDeviceHandle is an opaque handle to a device + */ +typedef struct NvDeviceStruct_t *NvDeviceHandle; +#ifdef __cplusplus +} +#endif + +#endif /* NVCOMMON_H */ diff --git a/Start_WM/test6/inc/nverror.h b/Start_WM/test6/inc/nverror.h new file mode 100755 index 00000000..6ef69080 --- /dev/null +++ b/Start_WM/test6/inc/nverror.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006 NVIDIA Corporation. All Rights Reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef NVERROR_H +#define NVERROR_H + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/* NvError_t enumeration contains ALL return / error codes. Error codes + are specifically explicit to make it easy to identify where an error + came from. + + All error codes are derived from the macros in NvErrVal.h + */ +typedef enum _NvError_t +{ + +#ifdef NVERROR +#undef NVERROR +#endif /* NVERROR */ + +#define NVERROR(_name_, _value_, _desc_) _name_ = _value_, + + /* header included for macro expansion of error codes */ + #include "nverrval.h" + + /* bogus error code used to padd the enum to 32bits */ + NvErrorMax = 0x7FFFFFFF + +#undef NVERROR + +} NvError; + + +#ifdef __cplusplus +} +#endif + +#endif /* NVERROR_H */ + diff --git a/Start_WM/test6/inc/nverrval.h b/Start_WM/test6/inc/nverrval.h new file mode 100755 index 00000000..2045dd83 --- /dev/null +++ b/Start_WM/test6/inc/nverrval.h @@ -0,0 +1,277 @@ +/* + * Copyright (c) 2006 NVIDIA Corporation. All Rights Reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* NvErrVal.h is a header used for macro expansion of the errors defined for + the Nv methods & interfaces. + + This header is NOT protected from being included multiple times, as it is + used for C pre-processor macro expansion of error codes, and the + descriptions of those error codes. + + Each error code has a unique name, description and value to make it easier + for developers to identify the source of a failure. Thus there are no + generic or unknown error codes. +*/ + +/* common error codes */ +NVERROR(NvSuccess, 0x00000000, "success") +NVERROR(NvError_NotImplemented, 0x00000001, "method or interface is not implemented") +NVERROR(NvError_NotSupported, 0x00000002, "requested operation is not supported") +NVERROR(NvError_NotInitialized, 0x00000003, "method or interface is not initialized") +NVERROR(NvError_BadParameter, 0x00000004, "bad parameter to method or interface") +NVERROR(NvError_Timeout, 0x00000005, "not completed in the expected time") +NVERROR(NvError_InsufficientMemory, 0x00000006, "insufficient system memory") +NVERROR(NvError_ReadOnlyAttribute, 0x00000007, "cannot write a read-only attribute") +NVERROR(NvError_InvalidState, 0x00000008, "module is in invalid state to perform the requested operation") +NVERROR(NvError_InvalidAddress, 0x00000009, "invalid address") +NVERROR(NvError_InvalidSize, 0x0000000A, "invalid size") +NVERROR(NvError_BadValue, 0x0000000B, "illegal value specified for parameter") + +/* surface specific error codes */ +NVERROR(NvError_InsufficientVideoMemory, 0x00010000, "insufficient video memory") +NVERROR(NvError_BadSurfaceColorScheme, 0x00010001, "this surface scheme is not supported in the current controller") + +/* display specific error codes */ +NVERROR(NvError_DisplayIncompatible, 0x00020000, "display incompatible with method or interface") +NVERROR(NvError_NoCompatibleMode, 0x00020001, "no compatible mode exists for the attached displays") +NVERROR(NvError_ModeNotSupported, 0x00020002, "the mode is not supported by the display or controller") +NVERROR(NvError_ControllerActive, 0x00020003, "the controller is active and cannot perform the operation") +NVERROR(NvError_DisplayAlreadyAttached, 0x00020004, "the display is already attached to the controller") +NVERROR(NvError_DetachDisplayFirst, 0x00020005, "the display is already attached to another controller") +NVERROR(NvError_TooManyDisplays, 0x00020006, "the controller has not enough free display slots") +NVERROR(NvError_NoDisplaysAttached, 0x00020007, "there are no displays attached to this controller") +NVERROR(NvError_AlreadySuspended, 0x00020008, "the controller is already suspended") +NVERROR(NvError_NotSuspended, 0x00020009, "the controller is not suspended, so cannot resume it") +NVERROR(NvError_EmptyColorKeyRange, 0x00020010, "color key range that was set is empty") +NVERROR(NvError_NoMode, 0x00020011, "controller is not driving a mode, cannot perform the selected action") +NVERROR(NvError_NotInVerticalBlank, 0x00020012, "controller is not in vertical blank") + +/* DMA specific error codes */ +NVERROR(NvError_DmaTargetNotLocked, 0x00030000, "client does not have a lock for this target DMA controller") +NVERROR(NvError_DmaCommunicationError, 0x00030001, "the DMA controller had failed to communicate with the target") +NVERROR(NvError_DmaOpNotFinished, 0x00030002, "the DMA operation has not completed") +NVERROR(NvError_DmaChannelNotAvailable, 0x00030003, "the requested DMA channel is not available") +NVERROR(NvError_InvalidSourceId, 0x00030004, "invalid source ID") +NVERROR(NvError_InvalidDestinationId, 0x00030005, "invalid destination ID") + +/* NvOs error codes */ +NVERROR(NvError_FileWriteFailed, 0x00040000, "the file write operation failed") +NVERROR(NvError_FileReadFailed, 0x00040001, "the file read operation failed") +NVERROR(NvError_EndOfFile, 0x00040002, "the end of file has been reached") +NVERROR(NvError_FileOperationFailed, 0x00040003, "the file operation has failed") +NVERROR(NvError_DirOperationFailed, 0x00040004, "the directory operation has failed") +NVERROR(NvError_EndOfDirList, 0x00040005, "there are no more entries in the directory") +NVERROR(NvError_ConfigVarNotFound, 0x00040006, "the configuration variable is not present") +NVERROR(NvError_InvalidConfigVar, 0x00040007, "the configuration variable is corrupted") +NVERROR(NvError_LibraryNotFound, 0x00040008, "the dynamic library was not found for open") +NVERROR(NvError_SymbolNotFound, 0x00040009, "the symbol in a dyanmic library was not found") +NVERROR(NvError_MemoryMapFailed, 0x0004000a, "the memory mapping operation failed") +NVERROR(NvError_MutexCreateFailed, 0x0004000b, "the mutex create operation failed") +NVERROR(NvError_SemaphoreCreateFailed, 0x0004000c, "the semaphore create operation failed") +NVERROR(NvError_ThreadCreateFailed, 0x0004000d, "the thread create operation failed") +NVERROR(NvError_SharedMemAllocFailed, 0x0004000e, "the shared memory allocation operation failed") + +/* NvBoard error codes */ +NVERROR(NvError_I2CNotAcknowledged, 0x00050000, "I2C acknowledge was not received") +NVERROR(NvError_KernelDriverNotFound, 0x00050001, "unable to find kernel driver") +NVERROR(NvError_KernelDriverBadVersion, 0x00050002, "the kernel driver is out of date") +NVERROR(NvError_KernelDriverIOFailed, 0x00050003, "the driver operation failed") +NVERROR(NvError_ModeMismatched, 0x00050004, "conflicting board mode") +NVERROR(NvError_VoltageOutsideRange, 0x00050005, "requested voltage is outside valid range") +NVERROR(NvError_EventNotEnabled, 0x00050006, "the event is not enabled") +NVERROR(NvError_EventBusy, 0x00050007, "the event is busy") +NVERROR(NvError_InterruptInitFailed, 0x00050008, "error initializing interrupts") + +/* NvIrq error codes */ +NVERROR(NvError_EventNotFound, 0x00060000, "no event found") + +/* Nv2D error codes */ +NVERROR(NvError_InvalidSurface, 0x00070000, "invalid surface") +NVERROR(NvError_RopNotSupported, 0x00070001, "rop not supported") +NVERROR(NvError_SurfaceNotSupported, 0x00070002, "surface is not supported") +NVERROR(NvError_BitmapNotSupported, 0x00070003, "bitmap is not supported") + +/* NvPower error codes */ +NVERROR(NvError_ResourceAlreadyInUse, 0x00080000, "resource already in use") +NVERROR(NvError_ResourceNotInUse, 0x00080001, "resource not in use") +NVERROR(NvError_ResourceInUse, 0x00080002, "resource is in use") + +/* UART error codes */ +NVERROR(NvError_UartOverrun, 0x00090000, "overrun occurred when receiving the data") +NVERROR(NvError_UartFraming, 0x00090001, "data received had framing error") +NVERROR(NvError_UartParity, 0x00090002, "data received had parity error") +NVERROR(NvError_UartFifoError, 0x00090003, "FIFO error occurred during receive/transmit") +NVERROR(NvError_UartBreakReceived, 0x00090004, "received break signal") +NVERROR(NvError_UartTransmit, 0x00090005, "UART transmit error") + +/* NvRm error code */ +NVERROR(NvError_RmInitFailed, 0x000a0000, "rm failed to initialize") +NVERROR(NvError_RmChannelInitFailure, 0x000a0001, "channel init failed") +NVERROR(NvError_RmStreamInitFailure, 0x000a0002, "stream init failed") +NVERROR(NvError_RmSyncPointAllocFailure, 0x000a0003, "sync point alloc failed") +NVERROR(NvError_RmStreamFlushFailure, 0x000a0004, "stream flush failed") + +/* NvIsp error codes */ +NVERROR(NvError_ChannelAllocFailed, 0x000B0000, "channel allocation failed") +NVERROR(NvError_NoConnectedImager, 0x000B0001, "no imager connected") +NVERROR(NvError_UnsupportedResolution, 0x000B0002, "unsupported resolution") +NVERROR(NvError_I2CCommunicationError, 0x000B0003, "i2c communication failed") +NVERROR(NvError_IspConfigFileParseError, 0x000B0004, "isp config file parse error") +NVERROR(NvError_IspBusy, 0x000B0005, "isp 3A algorithm busy") +NVERROR(NvError_TooDark, 0x000B0006, "image too dark for 3A operation") + +/* NvTest error codes */ +NVERROR(NvError_TestApplicationFailed, 0x000c0000, "the test application failed") +NVERROR(NvError_TestNoUserInput, 0x000c0001, "no user input available") +NVERROR(NvError_TestCommandLineError, 0x000c0002, "command line parsing error") + +/* NvCam error codes */ +NVERROR(NvError_VmAllocFailed, 0x000D0000, "virtual machine allocation failed") +NVERROR(NvError_ScriptAccessFailed, 0x000D0001, "unable to access script") +NVERROR(NvError_GettingComponentFailed, 0x000D0002, "getting component failed") +NVERROR(NvError_VmBufferAllocFailed, 0x000D0003, "vm buffer allocation failed") +NVERROR(NvError_CameraScriptNotPresent, 0x000D0004, "camera script not present") +NVERROR(NvError_IllegalBayerValues, 0x000D0005, "illegal bayer values") +NVERROR(NvError_ColorFormatNotSupported, 0x000D0006, "color format not supported") + +/* USBF error codes */ +NVERROR(NvError_UsbfTxfrActive, 0x000E0000, "The endpoint has an active transfer in progress.") +NVERROR(NvError_UsbfTxfrComplete, 0x000E0001, "The endpoint has a completed transfer that has not been cleared.") +NVERROR(NvError_UsbfEpStalled, 0x000E0002, "The endpoint has been placed in a halted or stalled state.") +NVERROR(NvError_UsbfEpError, 0x000E0003, "The last transfer started on this endpoint failed to complete.") + +/* ^^^ ADD ALL NEW ERRORS RIGHT ABOVE HERE ^^^ */ + +NVERROR(NvErrorNotImplemented, 0x00000001, "remove me later!") +NVERROR(NvErrorNotSupported, 0x00000002, "remove me later!") +NVERROR(NvErrorNotInitialized, 0x00000003, "remove me later!") +NVERROR(NvErrorBadParameter, 0x00000004, "remove me later!") +NVERROR(NvErrorTimeout, 0x00000005, "remove me later!") +NVERROR(NvErrorInsufficientMemory, 0x00000006, "remove me later!") +NVERROR(NvErrorReadOnlyAttribute, 0x00000007, "remove me later!") +NVERROR(NvErrorInvalidState, 0x00000008, "remove me later!") +NVERROR(NvErrorInvalidAddress, 0x00000009, "remove me later!") +NVERROR(NvErrorInvalidSize, 0x0000000A, "remove me later!") +NVERROR(NvErrorBadValue, 0x0000000B, "remove me later!") + +/* surface specific error codes */ +NVERROR(NvErrorInsufficientVideoMemory, 0x00010000, "remove me later!") +NVERROR(NvErrorBadSurfaceColorScheme, 0x00010001, "remove me later!") + +/* display specific error codes */ +NVERROR(NvErrorDisplayIncompatible, 0x00020000, "remove me later!") +NVERROR(NvErrorNoCompatibleMode, 0x00020001, "remove me later!") +NVERROR(NvErrorModeNotSupported, 0x00020002, "remove me later!") +NVERROR(NvErrorControllerActive, 0x00020003, "remove me later!") +NVERROR(NvErrorDisplayAlreadyAttached, 0x00020004, "remove me later!") +NVERROR(NvErrorDetachDisplayFirst, 0x00020005, "remove me later!") +NVERROR(NvErrorTooManyDisplays, 0x00020006, "remove me later!") +NVERROR(NvErrorNoDisplaysAttached, 0x00020007, "remove me later!") +NVERROR(NvErrorAlreadySuspended, 0x00020008, "remove me later!") +NVERROR(NvErrorNotSuspended, 0x00020009, "remove me later!") +NVERROR(NvErrorEmptyColorKeyRange, 0x00020010, "remove me later!") +NVERROR(NvErrorNoMode, 0x00020011, "remove me later!") +NVERROR(NvErrorNotInVerticalBlank, 0x00020012, "remove me later!") + +/* DMA specific error codes */ +NVERROR(NvErrorDmaTargetNotLocked, 0x00030000, "remove me later!") +NVERROR(NvErrorDmaCommunicationError, 0x00030001, "remove me later!") +NVERROR(NvErrorDmaOpNotFinished, 0x00030002, "remove me later!") +NVERROR(NvErrorDmaChannelNotAvailable, 0x00030003, "remove me later!") +NVERROR(NvErrorInvalidSourceId, 0x00030004, "remove me later!") +NVERROR(NvErrorInvalidDestinationId, 0x00030005, "remove me later!") + +/* NvOs error codes */ +NVERROR(NvErrorFileWriteFailed, 0x00040000, "remove me later!") +NVERROR(NvErrorFileReadFailed, 0x00040001, "remove me later!") +NVERROR(NvErrorEndOfFile, 0x00040002, "remove me later!") +NVERROR(NvErrorFileOperationFailed, 0x00040003, "remove me later!") +NVERROR(NvErrorDirOperationFailed, 0x00040004, "remove me later!") +NVERROR(NvErrorEndOfDirList, 0x00040005, "remove me later!") +NVERROR(NvErrorConfigVarNotFound, 0x00040006, "remove me later!") +NVERROR(NvErrorInvalidConfigVar, 0x00040007, "remove me later!") +NVERROR(NvErrorLibraryNotFound, 0x00040008, "remove me later!") +NVERROR(NvErrorSymbolNotFound, 0x00040009, "remove me later!") +NVERROR(NvErrorMemoryMapFailed, 0x0004000a, "remove me later!") +NVERROR(NvErrorMutexCreateFailed, 0x0004000b, "remove me later!") +NVERROR(NvErrorSemaphoreCreateFailed, 0x0004000c, "remove me later!") +NVERROR(NvErrorThreadCreateFailed, 0x0004000d, "remove me later!") +NVERROR(NvErrorSharedMemAllocFailed, 0x0004000e, "remove me later!") + +/* NvBoard error codes */ +NVERROR(NvErrorI2CNotAcknowledged, 0x00050000, "remove me later!") +NVERROR(NvErrorKernelDriverNotFound, 0x00050001, "remove me later!") +NVERROR(NvErrorKernelDriverBadVersion, 0x00050002, "remove me later!") +NVERROR(NvErrorKernelDriverIOFailed, 0x00050003, "remove me later!") +NVERROR(NvErrorModeMismatched, 0x00050004, "remove me later!") +NVERROR(NvErrorVoltageOutsideRange, 0x00050005, "remove me later!") +NVERROR(NvErrorEventNotEnabled, 0x00050006, "remove me later!") +NVERROR(NvErrorEventBusy, 0x00050007, "remove me later!") +NVERROR(NvErrorInterruptInitFailed, 0x00050008, "remove me later!") + +/* NvIrq error codes */ +NVERROR(NvErrorEventNotFound, 0x00060000, "remove me later!") + +/* Nv2D error codes */ +NVERROR(NvErrorInvalidSurface, 0x00070000, "remove me later!") +NVERROR(NvErrorRopNotSupported, 0x00070001, "remove me later!") +NVERROR(NvErrorSurfaceNotSupported, 0x00070002, "remove me later!") +NVERROR(NvErrorBitmapNotSupported, 0x00070003, "remove me later!") + +/* NvPower error codes */ +NVERROR(NvErrorResourceAlreadyInUse, 0x00080000, "remove me later!") +NVERROR(NvErrorResourceNotInUse, 0x00080001, "remove me later!") +NVERROR(NvErrorResourceInUse, 0x00080002, "remove me later!") + +/* UART error codes */ +NVERROR(NvErrorUartOverrun, 0x00090000, "remove me later!") +NVERROR(NvErrorUartFraming, 0x00090001, "remove me later!") +NVERROR(NvErrorUartParity, 0x00090002, "remove me later!") +NVERROR(NvErrorUartFifoError, 0x00090003, "remove me later!") +NVERROR(NvErrorUartBreakReceived, 0x00090004, "remove me later!") +NVERROR(NvErrorUartTransmit, 0x00090005, "remove me later!") + +/* NvRm error code */ +NVERROR(NvErrorRmInitFailed, 0x000a0000, "remove me later!") +NVERROR(NvErrorRmChannelInitFailure, 0x000a0001, "remove me later!") +NVERROR(NvErrorRmStreamInitFailure, 0x000a0002, "remove me later!") +NVERROR(NvErrorRmSyncPointAllocFailure, 0x000a0003, "remove me later!") +NVERROR(NvErrorRmStreamFlushFailure, 0x000a0004, "remove me later!") + +/* NvIsp error codes */ +NVERROR(NvErrorChannelAllocFailed, 0x000B0000, "remove me later!") +NVERROR(NvErrorNoConnectedImager, 0x000B0001, "remove me later!") +NVERROR(NvErrorUnsupportedResolution, 0x000B0002, "remove me later!") +NVERROR(NvErrorI2CCommunicationError, 0x000B0003, "remove me later!") +NVERROR(NvErrorIspConfigFileParseError, 0x000B0004, "remove me later!") +NVERROR(NvErrorIspBusy, 0x000B0005, "remove me later!") +NVERROR(NvErrorTooDark, 0x000B0006, "remove me later!") + +/* NvTest error codes */ +NVERROR(NvErrorTestApplicationFailed, 0x000c0000, "remove me later!") +NVERROR(NvErrorTestNoUserInput, 0x000c0001, "remove me later!") +NVERROR(NvErrorTestCommandLineError, 0x000c0002, "remove me later!") + +/* NvCam error codes */ +NVERROR(NvErrorVmAllocFailed, 0x000D0000, "remove me later!") +NVERROR(NvErrorScriptAccessFailed, 0x000D0001, "remove me later!") +NVERROR(NvErrorGettingComponentFailed, 0x000D0002, "remove me later!") +NVERROR(NvErrorVmBufferAllocFailed, 0x000D0003, "remove me later!") +NVERROR(NvErrorCameraScriptNotPresent, 0x000D0004, "remove me later!") +NVERROR(NvErrorIllegalBayerValues, 0x000D0005, "remove me later!") +NVERROR(NvErrorColorFormatNotSupported, 0x000D0006, "remove me later!") + +/* USBF error codes */ +NVERROR(NvErrorUsbfTxfrActive, 0x000E0000, "remove me later!") +NVERROR(NvErrorUsbfTxfrComplete, 0x000E0001, "remove me later!") +NVERROR(NvErrorUsbfEpStalled, 0x000E0002, "remove me later!") +NVERROR(NvErrorUsbfEpError, 0x000E0003, "remove me later!") + + diff --git a/Start_WM/test6/inc/nvime.h b/Start_WM/test6/inc/nvime.h new file mode 100755 index 00000000..e533f47f --- /dev/null +++ b/Start_WM/test6/inc/nvime.h @@ -0,0 +1,849 @@ +/* + * Copyright (c) 2006 - 2007 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software and related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * nvime.h + * + * A collection of image enhancing functions that utilize the GoForce + * h/w. This file contains the common routines that are used by all + * image enhancing functions, as well as the APIs/enums/defines that are + * specific to all image enhancing functions. + * + * PLEASE NOTE: NvIme is not thread-safe. All API calls must be made in + * a single thread, or the application must explicitly protect each NvIme + * call with its own mutex. Any other usage is not guaranteed to work. + */ + +#ifndef NVIME +#define NVIME + +#include "nvtypes.h" +#include "GFRm.h" +#include "GFGx.h" +#include "GFVx.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct NvImeStruct_t *NvImeHandle; + +typedef enum { + NVIME_OK=0, + NVIME_OUT_OF_MEMORY=1, + NVIME_INIT_FAILED=2, + NVIME_INVALID_HANDLE=3, + NVIME_SURFACE_INDEX_OUT_OF_RANGE=4, + NVIME_INVALID_SURFACE=5, + NVIME_ILLEGAL_SURFACE_BASE=6, + NVIME_ILLEGAL_SURFACE_STRIDE=7, + NVIME_INVALID_ROTATION=8, + NVIME_INVALID_COORD=9, + NVIME_MISSING_SURFACE=10, + NVIME_INVALID_KERNEL=11, + NVIME_INVALID_KERNEL_SIZE=12, + NVIME_INVALID_PIXFMT=13, + NVIME_INVALID_LUT=14, + NVIME_UNSPECIFIED_OPERATION=15, + NVIME_UNSUPPORTED_OPERATION=16, + NVIME_OPERATION_FAILED=17, + NVIME_INVALID_FLAG=18, + NVIME_INVALID_GET=19, + NVIME_INVALID_SCALE=20, + NVIME_INVALID_BIAS=21, + NVIME_ILLEGAL_CSC_VALUES=22, + NVIME_ILLEGAL_COEFF=23, + NVIME_ILLEGAL_COEFF_ARRAY_SIZE=24, +} NvImeStatus; + + +// NvImeOpen() +// +// Initialize the library and return a handle to pass into all future +// API calls into this library. + +NvImeStatus NvImeOpen(GFRmHandle hRm, NvImeHandle *phIme); + + +// NvImeClose() +// +// Close down the library and relinquish all held resources. + +void NvImeClose(NvImeHandle *phIme); + + +// NvImeSetSourceSurface() +// +// Set a source surface. "index" can be in 0..NVIME_MAX_SOURCE_SURFACES-1. +// Because each source surface will be read as a texture by the 3D unit, +// each must abide by 3D's texture alignment restrictions. These +// restrictions are: +// +// SB1) Base of surface must begin at an aligned memory address. Use +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_ALIGNMENT_BYTES) +// to get this value. +// +// SB2) Stride must be a multiple of +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_STRIDE_BYTES) +// +// SB3) Stride must be a power of two +// +// SB4) Width must be between +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_MIN_WIDTH_PIXELS) and +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_MAX_WIDTH_PIXELS) +// +// SB5) Height must be between +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_MIN_HEIGHT_PIXELS) and +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_MAX_HEIGHT_PIXELS) +// +// Even though the 3D unit only understands textures that are powers of +// two in width and height, the width and height of the data contained +// within the source surfaces do NOT need to actually be a powers of two +// in size. Likewise, the height of the surface does not need to be a +// power of two (although the width always must be). +// +// If the width of the source data is not a power of two, then in addition +// to the above texture alignment restrictions, the following must be true: +// +// SBW1) Memory between the end of the data in a row and the end of the +// row must be allowed to be overwritten by this library. Because +// the 3D texture unit does bilinear interpolation, this library +// will need to replicate the last column of data out to the next +// (M/2) columns over, where M is the width of the kernel used. +// If width + (M/2) crosses over a power of two boundary, the +// adjusted width need only be as large as the power of two +// boundary. +// +// If the height of the source data is not a power of two, then in addition +// to the above texture alignment restrictions, the following must be true: +// +// SBH1) The height of the source surface does *not* need to be a power +// of two. +// +// SBH2) The height of the source surface needs to be large enough for the +// library to replicate the last row to the next (N/2) rows down, +// where N is the height of the kernel used. This area must be +// allowed to be overwritten by this library. If height + (N/2) +// crosses over a power of two boundary, the adjusted height need +// only be as large as the power of two boundary. +// +// Note that some image enhancing operations will only work on certain +// source pixel formats. The NvImeProcessRect() call will return an +// error code on a source pixel format mismatch. + +#define NVIME_MAX_SOURCE_SURFACES 5 +NvImeStatus NvImeSetSourceSurface(NvImeHandle hIme, + NvU32 index, + GFRMSURFACE *sourceSurface); + + +// NvImeSetDestSurface() +// +// Set the destination surface. Because the destination surface will be +// written by the 3D unit, each surface must abide by 3D's surface +// alignment restrictions. These restrictions are: +// +// DB1) Base of surface must begin at an aligned memory address. Use +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_ALIGNMENT_BYTES) +// to get this value. +// +// DB2) Stride must be a multiple of +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_STRIDE_BYTES) +// +// DB3) Width must be between +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_MIN_WIDTH_PIXELS) and +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_MAX_WIDTH_PIXELS) +// +// DB4) Height must be between +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_MIN_HEIGHT_PIXELS) and +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_MAX_HEIGHT_PIXELS) +// +// "rotation" specifies how to rotate the source surfaces onto the +// destination surface as part of the rendering process. "rotation" +// must be one of GFGx's fast rotation modes. Specifically these are: +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_IDENTITY | 0 | 1 | | 0 | 1 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 2 | 3 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_ROT_90 | 0 | 1 | | 1 | 3 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 0 | 2 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_ROT_180 | 0 | 1 | | 3 | 2 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 1 | 0 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_ROT_270 | 0 | 1 | | 2 | 0 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 3 | 1 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_FLIP_X | 0 | 1 | | 1 | 0 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 3 | 2 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_FLIP_Y | 0 | 1 | | 2 | 3 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 0 | 1 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_TRANS_LR | 0 | 1 | | 0 | 2 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 1 | 3 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_TRANS_RL | 0 | 1 | | 3 | 1 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 2 | 0 | +// +---+---+ +---+---+ +// +// Note that some image enhancing operations will only work on certain +// destination pixel formats. The NvImeProcessRect() call will return an +// error code on a destination pixel format mismatch. + +NvImeStatus NvImeSetDestSurface(NvImeHandle hIme, + GFRMSURFACE *destSurface, + NvU32 rotation); + + +// NvImeSetVxBltCSCCoeff() +// +// Set the Vx's color space conversion coefficients in the channel that +// NvIme is using. This API is nothing more than a pass-through to +// GFVxBltSetCSCCoeff(). However, it does need to be called if CSCCoeffs +// are desired to be changed. If GFVxBltSetCSCCoeff() is called directly +// by the application, the Vx issued commands in that channel will pick +// up the CSCCoeffs, but NvIme will not see them. +NvImeStatus NvImeSetVxBltCSCCoeff(NvImeHandle hIme, + GFVXCSCCOEF *pCoef, + NvU32 option); + + +// NvImeProcessRect() +// +// Render using the current algorithm. Application must call an NvIme +// API not contained within this header file that registers the algorithm +// to render with. +// +// "srcCoords" points to "numSrcCoords" GFRECTs. "srcCoords[i]" describes +// the region to use from the i'th sourceSurface. "dstCoord" points to a +// single GFRECT. If a coord extends beyond the size of the surface it +// refers to, it will be clamped to the surface boundaries. +// +// The range of pixels referred to in "dstCoord" and each "srcCoords[i]" +// do not have to match. Scaling up and down is supported. The quality +// of scaling up and down can vary with the particular image enhancing +// algorithm used. +// +// flags is used to pass down optional parameters to the renderer. +// +// NVIME_PR_FLAGS_DITHER_OUTPUT: dither color output to destination +// surface. This flag has no effect if destSurface->ColorFormat +// is GF_SURFACE_ARGB8888. + +#define NVIME_PR_FLAGS_DITHER_OUTPUT (1<<0) + +NvImeStatus NvImeProcessRect(NvImeHandle hIme, + NvU32 numSrcCoords, + GFRECT *srcCoords, + GFRECT *dstCoord, + NvU32 flags); + +// NvImeFinish() +// +// A blocking call that does not return until all previously called +// NvIme commands are complete. + +void NvImeFinish(NvImeHandle hIme); + + +// +// Kernel sizes +// +// When kernels are specified, they use row major order. For example a +// 3x3 kernel with weights arranged like so: +// +// w00 w01 w02 +// w10 w11 w12 +// w20 w21 w22 +// +// would be specified in memory in the following order: +// +// w00 w01 w02 w10 w11 w12 w20 w21 w22 + +typedef enum { + NVIME_KERNEL_SIZE_1x1=0, + NVIME_KERNEL_SIZE_3x1=1, + NVIME_KERNEL_SIZE_5x1=2, +} NvImeKernelSize; + + +// +// Pixel formats +// + +#define NVIME_COMPONENT_MASK(a) \ + (((1U << NVIME_PIXFMT_##a##_BITS) - 1) << NVIME_PIXFMT_##a##_SHIFT) + +#define NVIME_PIXFMT_L8_LUMINANCE_BITS 8 +#define NVIME_PIXFMT_L8_LUMINANCE_SHIFT 0 +#define NVIME_PIXFMT_L8_LUMINANCE_MASK NVIME_COMPONENT_MASK(L8_LUMINANCE) + +#define NVIME_PIXFMT_RGB565_BLUE_BITS 5 +#define NVIME_PIXFMT_RGB565_BLUE_SHIFT 0 +#define NVIME_PIXFMT_RGB565_BLUE_MASK NVIME_COMPONENT_MASK(RGB565_BLUE) +#define NVIME_PIXFMT_RGB565_GREEN_BITS 6 +#define NVIME_PIXFMT_RGB565_GREEN_SHIFT 5 +#define NVIME_PIXFMT_RGB565_GREEN_MASK NVIME_COMPONENT_MASK(RGB565_GREEN) +#define NVIME_PIXFMT_RGB565_RED_BITS 5 +#define NVIME_PIXFMT_RGB565_RED_SHIFT 11 +#define NVIME_PIXFMT_RGB565_RED_MASK NVIME_COMPONENT_MASK(RGB565_RED) + +#define NVIME_PIXFMT_RGB888_BLUE_BITS 8 +#define NVIME_PIXFMT_RGB888_BLUE_SHIFT 0 +#define NVIME_PIXFMT_RGB888_BLUE_MASK NVIME_COMPONENT_MASK(RGB888_BLUE) +#define NVIME_PIXFMT_RGB888_GREEN_BITS 8 +#define NVIME_PIXFMT_RGB888_GREEN_SHIFT 8 +#define NVIME_PIXFMT_RGB888_GREEN_MASK NVIME_COMPONENT_MASK(RGB888_GREEN) +#define NVIME_PIXFMT_RGB888_RED_BITS 8 +#define NVIME_PIXFMT_RGB888_RED_SHIFT 16 +#define NVIME_PIXFMT_RGB888_RED_MASK NVIME_COMPONENT_MASK(RGB888_RED) + +#define NVIME_PIXFMT_ARGB8888_BLUE_BITS 8 +#define NVIME_PIXFMT_ARGB8888_BLUE_SHIFT 0 +#define NVIME_PIXFMT_ARGB8888_BLUE_MASK NVIME_COMPONENT_MASK(ARGB8888_BLUE) +#define NVIME_PIXFMT_ARGB8888_GREEN_BITS 8 +#define NVIME_PIXFMT_ARGB8888_GREEN_SHIFT 8 +#define NVIME_PIXFMT_ARGB8888_GREEN_MASK NVIME_COMPONENT_MASK(ARGB8888_GREEN) +#define NVIME_PIXFMT_ARGB8888_RED_BITS 8 +#define NVIME_PIXFMT_ARGB8888_RED_SHIFT 16 +#define NVIME_PIXFMT_ARGB8888_RED_MASK NVIME_COMPONENT_MASK(ARGB8888_RED) +#define NVIME_PIXFMT_ARGB8888_ALPHA_SHIFT 24 +#define NVIME_PIXFMT_ARGB8888_ALPHA_MASK NVIME_COMPONENT_MASK(ARGB8888_ALPHA) + +#define NVIME_PIXFMT_BAYER10_BITS 10 +#define NVIME_PIXFMT_BAYER10_SHIFT 0 +#define NVIME_PIXFMT_BAYER10_MASK NVIME_COMPONENT_MASK(BAYER10) + +#define NVIME_PIXFMT_BAYER12_BITS 12 +#define NVIME_PIXFMT_BAYER12_SHIFT 0 +#define NVIME_PIXFMT_BAYER12_MASK NVIME_COMPONENT_MASK(BAYER12) + +#define NVIME_PIXFMT_BAYER14_BITS 14 +#define NVIME_PIXFMT_BAYER14_SHIFT 0 +#define NVIME_PIXFMT_BAYER14_MASK NVIME_COMPONENT_MASK(BAYER14) + +#define NVIME_PIXFMT_BAYER3D_LO_BITS 7 +#define NVIME_PIXFMT_BAYER3D_LO_SHIFT 0 +#define NVIME_PIXFMT_BAYER3D_LO_MASK NVIME_COMPONENT_MASK(BAYER3D_LO) +#define NVIME_PIXFMT_BAYER3D_HI_BITS 7 +#define NVIME_PIXFMT_BAYER3D_HI_SHIFT 8 +#define NVIME_PIXFMT_BAYER3D_HI_MASK NVIME_COMPONENT_MASK(BAYER3D_HI) + +typedef enum { + NVIME_PIXFMT_L8=0, // L=Luminance (R8=L8, G8=L8, B8=L8) + NVIME_PIXFMT_RGB565=1, + NVIME_PIXFMT_RGB888=2, + NVIME_PIXFMT_ARGB8888=3, + NVIME_PIXFMT_BAYER10=4, + NVIME_PIXFMT_BAYER12=5, + NVIME_PIXFMT_BAYER14=6, + NVIME_PIXFMT_BAYER3D=7, +} NvImePixelFormat; + + +// +// LUT values +// + +#define NVIME_LUT_ENTRIES 256 + + +// +// Scale factors +// + +typedef enum { + NVIME_SCALE_1_0=0, + NVIME_SCALE_2_0=1, + NVIME_SCALE_4_0=2, +} NvImeScaleFactor; + + +/* + * Below are APIs used to control the sharpening image enhancement + * operation. Sharpening takes in a YUV420p source surface and outputs + * to a destination surface of type RGB565, ARGB8888 or YUV420p. + * ==================================================================== + */ + +// NvImeSharpenGetIntegerv() +// +// Return the value or values of a selected parameter that apply to +// the YUV420p sharpen image enhancing operation. +// +// NVIME_SHARPEN_GET_SRC_SURF_ALIGNMENT_BYTES +// NVIME_SHARPEN_GET_DST_SURF_ALIGNMENT_BYTES +// +// "params" returns 1 value, the SOURCE/DEST surface's starting +// address must be aligned to this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_STRIDE_BYTES +// NVIME_SHARPEN_GET_DST_SURF_STRIDE_BYTES +// +// "params" returns 1 value, the SOURCE/DEST surface's stride must +// be a multiple of this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_MIN_WIDTH_PIXELS +// NVIME_SHARPEN_GET_DST_SURF_MIN_WIDTH_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's width in +// pixels must be greater than or equal to this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_MAX_WIDTH_PIXELS +// NVIME_SHARPEN_GET_DST_SURF_MAX_WIDTH_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's width in +// pixels must be less than or equal to this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_MIN_HEIGHT_PIXELS +// NVIME_SHARPEN_GET_DST_SURF_MIN_HEIGHT_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's height in +// pixels must be greater than or equal to this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_MAX_HEIGHT_PIXELS +// NVIME_SHARPEN_GET_DST_SURF_MAX_HEIGHT_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's height in +// pixels must be less than or equal to this value. + +typedef enum { + NVIME_SHARPEN_GET_SRC_SURF_ALIGNMENT_BYTES=0, + NVIME_SHARPEN_GET_SRC_SURF_STRIDE_BYTES=1, + NVIME_SHARPEN_GET_SRC_SURF_MIN_WIDTH_PIXELS=2, + NVIME_SHARPEN_GET_SRC_SURF_MAX_WIDTH_PIXELS=3, + NVIME_SHARPEN_GET_SRC_SURF_MIN_HEIGHT_PIXELS=4, + NVIME_SHARPEN_GET_SRC_SURF_MAX_HEIGHT_PIXELS=5, + NVIME_SHARPEN_GET_DST_SURF_ALIGNMENT_BYTES=6, + NVIME_SHARPEN_GET_DST_SURF_STRIDE_BYTES=7, + NVIME_SHARPEN_GET_DST_SURF_MIN_WIDTH_PIXELS=8, + NVIME_SHARPEN_GET_DST_SURF_MAX_WIDTH_PIXELS=9, + NVIME_SHARPEN_GET_DST_SURF_MIN_HEIGHT_PIXELS=10, + NVIME_SHARPEN_GET_DST_SURF_MAX_HEIGHT_PIXELS=11, +} NvImeSharpenGet; + +NvImeStatus NvImeSharpenGetIntegerv(NvImeHandle hIme, + NvImeSharpenGet name, + int *params); + + +// NvImeSharpenParams() +// +// Specify sharpen parameters to use during subsequent call to +// NvImeProcessRect(). +// +// When NvImeProcessRect() is called with sharpening in effect, there +// are additional restrictions are applied: +// +// 1) Only sourceSurfaces[0] is used. Which means that numSrcCoords +// must be 1. Stretching sub-regions of a surface is not +// supported. Because pixels will be replicated as needed to +// provide a buffer for the filter kernel, if one were to use +// a sub-region of a surface, valid data would be over-written. +// dstCoord can have arbitrary values that allow scaling within +// destSurface. +// +// 2) sourceSurfaces[0]->ColorFormat must be one of: +// +// GF_SURFACE_YUV420 +// GF_SURFACE_JPEGDEC +// GF_SURFACE_MPEGDEC +// +// 3) destSurface->ColorFormat must be one of: +// +// GF_SURFACE_RGB565 +// GF_SURFACE_ARGB8888 +// GF_SURFACE_YUV420 +// GF_SURFACE_JPEGDEC +// GF_SURFACE_MPEGDEC +// +// 4) The rotation value must be GFGXEX2_FAST_ROTATE_IDENTITY (any +// desired rotation must be performed after this library has +// finished its processing). +// +// The sharpening algorithm is described as follows: +// +// 1) The Y data in sourceSurfaces[0] is replicated as needed. The +// number of pixels replicated at the end of each row will be: +// +// MAX( (M/2), distance to next power-of-two ) +// +// where M is the width of the kernel. Note that if +// sourceSurfaces[0]'s width is a power-of-two, then the distance +// to the next power-of-two will be zero, and no pixels will be +// replicated. +// +// The number of pixels replicated at the bottom of each column +// will be: +// +// MAX( (N/2), distance to next power-of-two ) +// +// where N is the height of the kernel. Note that if +// sourceSurfaces[0]'s height is a power-of-two, then the distance +// to the next power-of-two will be zero, and no pixels will be +// replicated. +// +// 2) If destSurface->ColorFormat is GF_SURFACE_RGB565 or +// GF_SURFACE_ARGB8888, then a 2D StretchBlit is performed on +// sourceSurfaces[0] to destSurface. The full range of +// sourceSurfaces[0] will be scaled to the region indicated by +// dstCoord within destSurface. +// +// If destSurface->ColorFormat is GF_SURFACE_YUV420, +// GF_SURFACE_JPEGDEC or GF_SURFACE_MPEGDEC then no StretchBlit +// will be performed. The 3D stage of the algorithm will write +// the destination directly without blending to an RGB surface. +// +// 3) For each pixel in the region within destSurface specified by +// dstCoord, the 3D unit will perform a number of texture reads from +// sourceSurfaces[0] that matches the size of the kernel. Each +// texture read will be bilinearly filtered. The texture reads will +// be multiplied times the S1.8 kernel weights, summed together, +// scaled by one of 1.0, 2.0 or 4.0, a bias is added, and the result +// is clamped to the 0.0 to 1.0 range (note that intermediate values +// that exceed the h/w's S1.8 numeric range will be clamped to S1.8). +// The final clamped value will index into the provided LUT, which +// contains biased color values. +// +// When destSurface->ColorFormat is GF_SURFACE_RGB565 or ARGB8888: +// +// Each color channel from the LUT value will be multiplied by +// 2.0 and then have 1.0 subtracted from it. These unbiased +// colors will be added to the pixel in destSurface. +// +// When destSurface->ColorFormat is GF_SURFACE_YUV420, +// GF_SURFACE_JPEGDEC or GF_SURFACE_MPEGDEC: +// +// The red color channel from the LUT value will be multiplied +// by 2.0 and then have 1.0 subtracted from it. This unbiased +// color will be added to the Y value from sourceSurfaces[0] +// and be written to the Y pixel in destSurface. The U and V +// pixels in destSurface will be scaled by the 3D h/w using a +// 2x2 filter. No sharpening is applied to the U and V pixels. +// +// Below is a psuedo-code approximation for this part of the algorithm: +// +// // for each pixel +// for ( y=dstCoord->top ; x<=dstCoord->bottom ; y++ ) { +// for ( x=dstCoord->left ; x<=dstCoord->right ; x++ ) { +// +// // get proper indices for sourceSurfaces[0] +// srcX = sourcesSurfaces[0].width * x/destSurface.width; +// srcY = sourcesSurfaces[0].height * y/destSurface.height; +// +// // for each kernel entry +// idx = 0; +// for ( ky=0 ; ky 1.0) idx = 1.0; +// +// if ((destSurface->ColorFormat == GF_SURFACE_YUV420) || +// (destSurface->ColorFormat == GF_SURFACE_JPEGDEC) || +// (destSurface->ColorFormat == GF_SURFACE_MPEGDEC)) { +// // write the color value +// dstColor[x,y] = srcColor[srcX, srcY] + +// 2.0 * lut[NVIME_LUT_ENTRIES * idx] - 1.0; +// } else { +// // update color value +// dstColor[x,y] += 2.0 * lut[NVIME_LUT_ENTRIES * idx] - 1.0; +// } +// } +// } +// +// The supported kernel sizes are: +// +// NVIME_KERNEL_SIZE_1x1 +// NVIME_KERNEL_SIZE_3x1 +// NVIME_KERNEL_SIZE_5x1 +// +// Each value in the kernel must be in S1.8 format, which means values +// between -2 inclusive and +2 exclusive in increments of 1/256 are +// representable. +// +// The LUT must contain NVIME_LUT_ENTRIES entries, each of size NvU32. +// The supported LUT formats are: +// +// NVIME_PIXFMT_L8 +// NVIME_PIXFMT_RGB888 +// +// Refer to the NVIME_PIXFMT_* macros for appropriate color channel bit +// positions. When destSurface->ColorFormat is GF_SURFACE_YUV420, +// GF_SURFACE_JPEGDEC or GF_SURFACE_MPEGDEC the Y buffer is processed +// directly without going through an RGB space. Because the Y buffer is +// monochrome, only the red channel of an RGB888 LUT will be used when +// the destSurface->ColorFormat is GF_SURFACE_YUV420, GF_SURFACE_JPEGDEC +// or GF_SURFACE_MPEGDEC. +// +// The finalScale parameter can be any of NVIME_SCALE_1_0, NVIME_SCALE_2_0, +// or NVIME_SCALE_4_0. +// +// The finalBias parameter must be in S1.8 format. + +NvImeStatus +NvImeSharpenParams(NvImeHandle hIme, + NvImeKernelSize kernelSize, + NvU32 *kernel, + NvImePixelFormat lutFormat, + NvU32 *lut, + NvImeScaleFactor finalScale, + NvU32 finalBias); + + +/* + * Below are APIs used to control the anti-vignetting (also known as + * lens correction) image enhancement operation. Anti-vignetting takes + * in a BAYER3D source surface and outputs either BAYER10, BAYER12 or + * BAYER14 data to the same source surface. BAYER3D is format that has + * 14bits of data like BAYER14, but has unused bits at positions 8 and 16. + * So if your 16bits of data looked like --dcba9876543210, these would + * be stored in BAYER3D as -dcba987-6543210. + * ==================================================================== + */ + +// NvImeAntivigGetIntegerv() +// +// Return the value or values of a selected parameter that apply to +// the BAYER3D anti-vignetting image operation. +// +// NVIME_ANTIVIG_GET_SURF_ALIGNMENT_BYTES +// +// "params" returns 1 value, the SOURCE/DEST surface's starting +// address must be aligned to this value. +// +// NVIME_ANTIVIG_GET_SURF_STRIDE_BYTES +// +// "params" returns 1 value, the SOURCE/DEST surface's stride must +// be a multiple of this value. +// +// NVIME_ANTIVIG_GET_SURF_MIN_WIDTH_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's width in +// pixels must be greater than or equal to this value. +// +// NVIME_ANTIVIG_GET_SURF_MAX_WIDTH_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's width in +// pixels must be less than or equal to this value. +// +// NVIME_ANTIVIG_GET_SURF_MIN_HEIGHT_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's height in +// pixels must be greater than or equal to this value. +// +// NVIME_ANTIVIG_GET_SURF_MAX_HEIGHT_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's height in +// pixels must be less than or equal to this value. +// +// NVIME_ANTIVIG_GET_COEFF_ARRAY_MIN_WIDTH +// +// "params" returns 1 value, the minimum "widthCoeffArrays" that +// can be passed into NvImeAntivigParams. +// +// NVIME_ANTIVIG_GET_COEFF_ARRAY_MAX_WIDTH +// +// "params" returns 1 value, the maximum "widthCoeffArrays" that +// can be passed into NvImeAntivigParams. +// +// NVIME_ANTIVIG_GET_COEFF_ARRAY_MIN_HEIGHT +// +// "params" returns 1 value, the minimum "heightCoeffArrays" that +// can be passed into NvImeAntivigParams. +// +// NVIME_ANTIVIG_GET_COEFF_ARRAY_MAX_HEIGHT +// +// "params" returns 1 value, the maximum "heightCoeffArrays" that +// can be passed into NvImeAntivigParams. + +typedef enum { + NVIME_ANTIVIG_GET_SURF_ALIGNMENT_BYTES=0, + NVIME_ANTIVIG_GET_SURF_STRIDE_BYTES=1, + NVIME_ANTIVIG_GET_SURF_MIN_WIDTH_PIXELS=2, + NVIME_ANTIVIG_GET_SURF_MAX_WIDTH_PIXELS=3, + NVIME_ANTIVIG_GET_SURF_MIN_HEIGHT_PIXELS=4, + NVIME_ANTIVIG_GET_SURF_MAX_HEIGHT_PIXELS=5, + NVIME_ANTIVIG_GET_COEFF_ARRAY_MIN_WIDTH=6, + NVIME_ANTIVIG_GET_COEFF_ARRAY_MAX_WIDTH=7, + NVIME_ANTIVIG_GET_COEFF_ARRAY_MIN_HEIGHT=8, + NVIME_ANTIVIG_GET_COEFF_ARRAY_MAX_HEIGHT=9, +} NvImeAntivigGet; + +NvImeStatus NvImeAntivigGetIntegerv(NvImeHandle hIme, + NvImeAntivigGet name, + int *params); + + +// NvImeAntivigParams() +// +// Specify anti-vignetting parameters to use during subsequent call to +// NvImeProcessRect(). +// +// When NvImeProcessRect() is called with anti-vignetting in effect, +// there are additional restrictions that are applied: +// +// 1) Only sourceSurfaces[0] is used. Which means that numSrcCoords +// must be 1. +// +// 2) sourceSurfaces[0]->ColorFormat must be GF_SURFACE_BAYER16. +// The actual data contained in the surface must be in the +// BAYER3D format. BAYER3D has 14 bits of data, where bits 13 +// and 7 are ignored. So if your data value is --dcba9876543210, +// that would be stored in BAYER3D format as -dcba987-6543210. +// +// 3) The contents of the structure pointed to by destSurface must +// be equal to the contents of the structure pointed to by +// sourceSurfaces[0]. +// +// 4) The contents of the structure pointed to by dstCoord must be +// equal to the contents of the structure pointed to by +// srcCoords[0]. +// +// 5) The rotation value must be GFGXEX2_FAST_ROTATE_IDENTITY (any +// desired rotation must be performed after this library has +// finished its processing). +// +// The anti-vignetting algorithm is described below: +// +// 1) The 4 passed in coefficient arrays are scanned looking for the +// largest gain value. The largest gain is used to determine +// whether the overall coefficient range is in [0.0 .. 2.0], +// [0.0 .. 4.0], [0.0 .. 8.0] or [0.0 .. 16.0]. The lower the +// maximum gain, the more precise the output will be. Here is +// a table showing the output format as a function of the maximum +// gain value: +// +// Maximum gain Output pixel format +// ------------- ------------------- +// [0.0 .. 2.0] BAYER14 +// [0.0 .. 4.0] BAYER12 +// [0.0 .. 8.0] BAYER12 +// [0.0 .. 16.0] BAYER10 +// +// 2) After the maximum gain has been determined, the coefficient +// arrays are divided by their maximum value rounded up to a power +// of 2, and stored in an 8bit value. +// +// 3) When NvImeProcessRect is called, the 8bit gain values for the +// appropriate 00, 01, 10, 11 pixel are bilinearly interpolated. +// The result is multiplied times the BAYER3D pixel value from +// the source surface and then written back in place in a +// BAYER10/12/14 format. +// +// 4) NvImeProcessRect can process an entire BAYER3D buffer at a time, +// or a horizontal swath of the buffer. This is to support large +// buffers (like 5Mpixel) where it may not be practical (or even +// possible) to have multiple buffers residing in memory at the same +// time. +// +// NvImeAntivigAdjustScanline() modifies the access pattern of the +// 8bit gain values as if srcCoords[0].top were scanlineBias larger. +// This shifts the accesses down. +// +// For example, suppose you had a 2048x64 BAYER3D surface which is +// used to hold 32 pixel high swaths of a 2048x2048 surface in +// a double buffered manner. You would process the buffer like so: +// +// srcCoordsLow.top = 0; +// srcCoordsLow.left = 0; +// srcCoordsLow.right = 2047; +// srcCoordsLow.bottom = 31; +// +// srcCoordsHigh.top = 32; +// srcCoordsHigh.left = 0; +// srcCoordsHigh.right = 2047; +// srcCoordsHigh.bottom = 63; +// +// // Fill SourceSurface[0] rows [0..31] with camera rows [0..31] +// NvImeAntivigAdjustScanline(hIme, 0); +// NvImeProcessRects(hIme, 1, &srcCoordsLow, &srcCoordsLow, 0); +// +// // Fill SourceSurface[0] rows [32..63] with camera rows [32..63] +// NvImeProcessRects(hIme, 1, &srcCoordsHigh, &srcCoordsHigh, 0); +// +// // Fill SourceSurface[0] rows [0..31] with camera rows [64..95] +// NvImeAntivigAdjustScanline(hIme, 32); +// NvImeProcessRects(hIme, 1, &srcCoordsLow, &srcCoordsLow, 0); +// +// // Fill SourceSurface[0] rows [32..63] with camera rows [96..127] +// NvImeProcessRects(hIme, 1, &srcCoordsHigh, &srcCoordsHigh, 0); +// +// // Fill SourceSurface[0] rows [0..31] with camera rows [128..159] +// NvImeAntivigAdjustScanline(hIme, 64); +// NvImeProcessRects(hIme, 1, &srcCoordsLow, &srcCoordsLow, 0); +// +// // Fill SourceSurface[0] rows [32..63] with camera rows [160..191] +// NvImeProcessRects(hIme, 1, &srcCoordsHigh, &srcCoordsHigh, 0); +// +// // and so on... + +NvImeStatus +NvImeAntivigParams(NvImeHandle hIme, + NvU32 widthCoeffArrays, + NvU32 heightCoeffArrays, + float *coeffsPix00, + float *coeffsPix01, + float *coeffsPix10, + float *coeffsPix11, + NvU32 totalSurfaceWidth, + NvU32 totalSurfaceHeight, + NvImePixelFormat *outFormat); + +NvImeStatus +NvImeAntivigAdjustScanline(NvImeHandle hIme, NvU32 scanlineBias); + +#ifdef __cplusplus +} +#endif + +#endif /* NVIME */ diff --git a/Start_WM/test6/inc/nvirq.h b/Start_WM/test6/inc/nvirq.h new file mode 100755 index 00000000..d3bf5d8b --- /dev/null +++ b/Start_WM/test6/inc/nvirq.h @@ -0,0 +1,144 @@ +/* + * Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef NVIRQ_H +#define NVIRQ_H + +/** NvIrq - Interrupt abstraction layer: + + This provides a simple interface for querying and masking abstract interrupt + events. The interface is designed to be used inside of the OEM's ISR or IST. + + NvIrq needs NvOsPhysicalMemMap and NvOsPhysicalMemUnmap (Only uncached + write-through functionality is used). NvOsSharedMem* is needed if NvIrq + isn't initialized as a singleton. + + NvIrq is not thread-safe. + */ + +#include "nvcommon.h" +#include "nverror.h" +#include "nvboard.h" + +/** NvIrqChannel enum defines available I/O channels. No two I/O operations can + safely occur at the same time on a channel. (This is only important in + indirect addressing. In direct address I/O operators are atomic and there + is no concept of channels). + */ +typedef enum +{ + /* Channel used while not in ISR. This channel is used by all user-mode code. */ + NvIrqChannel_Normal, + + /* Channel used in ISR context */ + NvIrqChannel_Isr +} NvIrqChannel; + +/* NvIrqInterruptPortInfo struct describes the MMIO layout of the interrupt + status registers */ +typedef struct NvIrqInterruptPortInfo_t +{ + /* Offset of status register */ + NvU32 statusOffset; + + /* Offset of mask register */ + NvU32 maskOffset; +} NvIrqInterruptPortInfo; + +/** NvIrqInit - Method to initialize the NvIrq API. + + This method is to be called before any other NvIrq methods can be used. + + If NvIrq is not initialized as a singleton, NvIrq will put its state in + shared memory. + */ +NvError +NvIrqInit( const NvBoardMode *pMode, const NvBoardApertures *pApertures, + NvBool singleton ); + +/** NvIrqDeInit - Method to deinitialize the NvIrq API. + */ +void +NvIrqDeInit( void ); + +/** NvIrqPostChipInit - To be called after the chip is intialized. + + This method should be called during NvBoardPostChipInit. If NvIrqInit succeeds + NvIrqEnableInterrupt() should be used to unmask the global interrupt line. + */ +NvError +NvIrqPostChipInit( NvIrqChannel channel ); + +/** NvIrqPreChipDeInit - To be called before chip is shutdown. + + This method should be called during NvBoardPreChipDeInit. NvIrqDisableInterrupt() + should be called before invoking this method. + */ +void +NvIrqPreChipDeInit( NvIrqChannel channel ); + +/** NvIrqFastScan - Method to quickly check if interrupt is pending + + This method is faster than NvIrqScanForEvent. It only checks whether an + interrupt is pending or not. NvIrqScanForEvent should be called from an + IST to do the actual decoding. This is useful when ISR latency is + important. + + If an interrupt is pending the global SCxx interrupt line is masked + and should reenabled using NvIrqEnableInterrupt after NvIrqScanForEvent + is called. + */ +NvBool +NvIrqFastScan( NvIrqChannel channel ); + +/** NvIrqScanForEvent - Method to check SCxx for pending events. + + This method should be called from an ISR or IST. If a pending event is + found, the event is masked. Once an upper layer clears the source of + the event in hardware, the event can be reenabled. + + @retval NvSuccess - on success + NvErrorEventNotFound - no event found + */ +NvError +NvIrqScanForEvent( NvIrqChannel channel, NvDeviceEvent *event ); + +/** NvIrqIsEventPending - Check whether the event is pending + */ +NvBool +NvIrqIsEventPending( NvIrqChannel channel, NvDeviceEvent event ); + +/** NvIrqEnableInterrupt - Method to unmask global interrupt line + */ +void +NvIrqEnableInterrupt( NvIrqChannel channel ); + +/** NvIrqDisableInterrupt - Method to mask global interrupt line + */ +void +NvIrqDisableInterrupt( NvIrqChannel channel ); + +/** NvIrqEnableEvent - Method to unmask an event + */ +void +NvIrqEnableEvent( NvIrqChannel channel, NvDeviceEvent event ); + +/** NvIrqDisableEvent - Method to mask an event + */ +void +NvIrqDisableEvent( NvIrqChannel channel, NvDeviceEvent event ); + +/** NvIrqQueryInterruptPortInfo - Method to query interrupt port info. Calling + this method should be strongly avoided. + */ +NvError +NvIrqQueryInterruptPortInfo( NvIrqInterruptPortInfo *pPortInfo ); + +#endif // NVIRQ_H diff --git a/Start_WM/test6/inc/nvtypes.h b/Start_WM/test6/inc/nvtypes.h new file mode 100755 index 00000000..ba01db2d --- /dev/null +++ b/Start_WM/test6/inc/nvtypes.h @@ -0,0 +1,258 @@ + /***************************************************************************\ +|* *| +|* Copyright 1993-1998 NVIDIA, Corporation. All rights reserved. *| +|* *| +|* NOTICE TO USER: The source code is copyrighted under U.S. and *| +|* international laws. Users and possessors of this source code are *| +|* hereby granted a nonexclusive, royalty-free copyright license to *| +|* use this code in individual and commercial software. *| +|* *| +|* Any use of this source code must include, in the user documenta- *| +|* tion and internal comments to the code, notices to the end user *| +|* as follows: *| +|* *| +|* Copyright 1993-1998 NVIDIA, Corporation. All rights reserved. *| +|* *| +|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| +|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| +|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| +|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| +|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| +|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| +|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| +|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| +|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| +|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| +|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| +|* *| +|* U.S. Government End Users. This source code is a "commercial *| +|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| +|* consisting of "commercial computer software" and "commercial *| +|* computer software documentation," as such terms are used in *| +|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| +|* ment only as a commercial end item. Consistent with 48 C.F.R. *| +|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| +|* all U.S. Government End Users acquire the source code with only *| +|* those rights set forth herein. *| +|* *| + \***************************************************************************/ + + + /***************************************************************************\ +|* *| +|* NV Architecture Interface *| +|* *| +|* defines common widths used to access hardware in of NVIDIA's *| +|* Unified Media Architecture (TM). *| +|* *| + \***************************************************************************/ + + +#ifndef NVTYPES_INCLUDED +#define NVTYPES_INCLUDED +#ifdef __cplusplus +extern "C" { +#endif + +#include "cpuopsys.h" + +#define NVRM_64 1 +#if defined(NV_64_BITS) +#define NVRM_TRUE64 1 +#endif + + /***************************************************************************\ +|* Typedefs *| + \***************************************************************************/ + +typedef unsigned char NvV8; /* "void": enumerated or multiple fields */ +typedef unsigned short NvV16; /* "void": enumerated or multiple fields */ +typedef unsigned char NvU8; /* 0 to 255 */ +typedef unsigned short NvU16; /* 0 to 65535 */ +typedef signed char NvS8; /* -128 to 127 */ +typedef signed short NvS16; /* -32768 to 32767 */ +typedef signed int NvS32; /* -2147483648 to 2147483647 */ +typedef float NvF32; /* IEEE Single Precision (S1E8M23) */ +typedef double NvF64; /* IEEE Double Precision (S1E11M52) */ + +/* mainly for 64-bit linux, where long is 64 bits + * and win9x, where int is 16 bit. + */ +#if (defined(NV_UNIX) || defined(vxworks) || defined(NV_WINDOWS_CE) || \ + defined(__arm) || defined(__IAR_SYSTEMS_ICC__) || defined(NV_QNX) || \ + defined(NV_INTEGRITY) || defined(NV_MODS) || defined(__GNUC__) ) && \ + !defined(NV_MACINTOSH) +typedef unsigned int NvV32; /* "void": enumerated or multiple fields */ +typedef unsigned int NvU32; /* 0 to 4294967295 */ +#else +typedef unsigned long NvV32; /* "void": enumerated or multiple fields */ +typedef unsigned long NvU32; /* 0 to 4294967295 */ +#endif + +/* 64-bit types for compilers that support them, plus some obsolete variants */ +#if defined(__GNUC__) || defined(__arm) || defined(__IAR_SYSTEMS_ICC__) || defined(__ghs__) || defined(_WIN64) +typedef unsigned long long NvU64; /* 0 to 18446744073709551615 */ +typedef long long NvS64; /* 2^-63 to 2^63-1 */ +#else +typedef unsigned __int64 NvU64; /* 0 to 18446744073709551615 */ +typedef __int64 NvS64; /* 2^-63 to 2^63-1 */ +#endif + +/* Boolean type */ +enum { NV_FALSE = 0, NV_TRUE = 1 }; +typedef NvU8 NvBool; + +/* Macros to extract the low and high parts of a 64-bit unsigned integer */ +/* Also designed to work if someone happens to pass in a 32-bit integer */ +#define NvU64_HI32(n) ((NvU32)(((NvU64)(n)) >> 32)) +#define NvU64_LO32(n) ((NvU32)((NvU64)(n))) +#define NvU40_HI32(n) ((NvU32)((((NvU64)(n))>>8)&0xffffffff)) +#define NvU40_HI24of32(n) ((NvU32)((((NvU64)(n)& 0xffffffff))&0xffffff00)) + + /***************************************************************************\ +|* *| +|* 64 bit type definitions for use in interface structures. *| +|* *| + \***************************************************************************/ + +#if defined(NV_64_BITS) + +typedef void* NvP64; /* 64 bit void pointer */ +typedef NvU64 NvUPtr; /* pointer sized unsigned int */ + +#define NvP64_VALUE(n) (n) + +#else + +typedef NvU64 NvP64; /* 64 bit void pointer */ +typedef NvU32 NvUPtr; /* pointer sized unsigned int */ + +#define NvP64_VALUE(n) ((void *)(NvUPtr)(n)) + +#endif + +// XXX Obsolete -- get rid of me... +typedef NvP64 NvP64_VALUE_T; +typedef NvUPtr NV_UINTPTR_T; +#define NvP64_LVALUE(n) (n) +#define NvP64_SELECTOR(n) (0) + +/* Useful macro to hide required double cast */ +#define NV_PTR_TO_NvP64(n) (NvP64)(NV_UINTPTR_T)(n) + +/* obsolete stuff */ +/* MODS needs to be able to build without these definitions because they collide + with some definitions used in mdiag. */ +#ifndef DONT_DEFINE_U032 +typedef NvV8 V008; +typedef NvV16 V016; +typedef NvV32 V032; +typedef NvU8 U008; +typedef NvU16 U016; +typedef NvU32 U032; +typedef NvS8 S008; +typedef NvS16 S016; +typedef NvS32 S032; +#endif +#if defined(MACOS) || defined(macintosh) || defined(__APPLE_CC__) || defined(NV_MODS) || defined(MINIRM) || defined(NV_UNIX) || defined (NV_QNX) +/* more obsolete stuff */ +/* need to provide these on macos9 and macosX */ +#if defined(__APPLE_CC__) /* gross but Apple osX already claims ULONG */ +#undef ULONG // just in case +#define ULONG unsigned long +#else +typedef unsigned long ULONG; +#endif +typedef unsigned char *PUCHAR; +#endif + +#if !defined(NV_PTR) + /* Supports 32bit libraries on Win64 + See drivers\opengl\include\nvFirst.h for explanation */ +#define NV_PTR +#define CAST_NV_PTR(p) p +#endif + +/* Aligns fields in structs so they match up between 32 and 64 bit builds */ +/* XXX Mac still uses structures without alignment -- needs to be fixed */ +#if (defined(__GNUC__) || defined(NV_QNX)) && !defined(NV_MACINTOSH) +#define NV_ALIGN_BYTES(size) __attribute__ ((aligned (size))) +#elif defined(__arm) +#define NV_ALIGN_BYTES(size) __align(ALIGN) +#else +// XXX This is dangerously nonportable! We really shouldn't provide a default +// version of this that doesn't do anything. +#define NV_ALIGN_BYTES(size) +#endif + +// NV_DECLARE_ALIGNED() can be used on all platforms. +// This macro form accounts for the fact that __declspec on Windows is required +// before the variable type, +// and NV_ALIGN_BYTES is required after the variable name. +#if defined(NV_WINDOWS) +#define NV_DECLARE_ALIGNED(TYPE_VAR, ALIGN) __declspec(align(ALIGN)) TYPE_VAR +#elif defined(__GNUC__) || defined(NV_QNX) +#define NV_DECLARE_ALIGNED(TYPE_VAR, ALIGN) TYPE_VAR __attribute__ ((aligned (ALIGN))) +#elif defined(__arm) +#define NV_DECLARE_ALIGNED(TYPE_VAR, ALIGN) __align(ALIGN) TYPE_VAR +#endif + + +/***************************************************************************\ +|* Function Declaration Types *| + \***************************************************************************/ + +// stretching the meaning of "nvtypes", but this seems to least offensive +// place to re-locate these from nvos.h which cannot be included by a number +// of builds that need them + +#if defined(NV_WINDOWS) + + #define NV_INLINE __inline + + #if _MSC_VER >= 1200 + #define NV_FORCEINLINE __forceinline + #else + #define NV_FORCEINLINE __inline + #endif + + #define NV_APIENTRY __stdcall + #define NV_FASTCALL __fastcall + #define NV_CDECLCALL __cdecl + #define NV_STDCALL __stdcall + +#else // defined(NV_WINDOWS) + + #if defined(__GNUC__) || defined(__INTEL_COMPILER) + #define NV_INLINE __inline__ + #elif defined (macintosh) + #define NV_INLINE inline + #elif defined(__arm) + #define NV_INLINE __inline + #else + #define NV_INLINE + #endif + + #if defined(__GNUC__) + // GCC 3.1 and beyond support the always_inline function attribute. + #if (__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1) + #define NV_FORCEINLINE __inline__ __attribute__((always_inline)) + #else + #define NV_FORCEINLINE __inline__ + #endif + #else /* defined(__GNUC__) */ + #define NV_FORCEINLINE NV_INLINE + #endif + + #define NV_APIENTRY + #define NV_FASTCALL + #define NV_CDECLCALL + #define NV_STDCALL + +#endif // defined(NV_WINDOWS) + +#ifdef __cplusplus +}; +#endif + +#endif /* NVTYPES_INCLUDED */ diff --git a/Start_WM/test6/inc/vssver2.scc b/Start_WM/test6/inc/vssver2.scc new file mode 100755 index 0000000000000000000000000000000000000000..aaf2f3863685f3f430796c71bfeea422f9c199b3 GIT binary patch literal 1261 zcmYk)Ye-XJ7zglUVuE?eLa7Y;;DRFCyqlJnxw|#DwmI|GI&LSOdA7ODwUtGYnbL-$Az7N4ftrZ*B`T>tL>KXbi5MlRX(4_vvd8D_b$!|M|Gm%izUSqfC2sMfA|9qT zB=g2Zt;5rco0DczD(ecb^MfdgPf=7d)Sne2v+wJIBK*K9;EIfiFDd?a&DYP2= zYyX26#7DtnR}78B8t{h9@R%Q=r8utz$INy_?cL!*>%dbDQ;Ew@o#;I9@0jksl9DR4 z9=v$8qT$4K*Kzs}w_4r2M#l~|uUjQy|c-v202yP!~pKPiKzUqCMz)gW_5AkvE>F&}|PnbXU4dAwyhJCL({m>`COX`-MPEjbD22&fWm&yON z6dX3*yR>OC82d)>z*gRQ(&q_eabjh*K`lt~lBSnx+!Z8BRiWt*KWZNn&{S;kId6f-AD)f(+wG}C3?;IN5UlbCjTXWh6g zQLC{^#f%Gsj9ZtvC3d@&J3|pK!j>Xl%hg;RH>7ZISAgo9&T)$wBhKZxB^E9zS+(8j zjq7dYT9U^nC*m+lqfhlgFN#|StK%N6^c}gD)_1FHPP5g5<0>t8ISq@{u)eElSUFQ^ z2pAC%Fd`rXh{z9x{3ak`lHF{wAwQPgO#+C7o87zF3%mC&ckhNk zDJrFwQc5kgscosX)FM@CQ4tXl5&a-VMMR2Aag!yykE||Occ%MJVJkFap?}Wwb z@3UtJvGcox_~>my-0)K&K7NFdZ{DtHpR0r<+W&e@uf0r2q60=Wz4lo=6YZ~Q$*n>X zEj?1xZU{%TV6&mG;1{%Tk)}l#390BY{DO|})3opdkb{oDMbn!QC(*HpSJ8X%3p#L# zre!+`sb~zppxqD9wCn*qgSvV&ja@1v(ZM%pdfnYZg2X2tHFObvK~FqpXe)j}PhO+x ze+Pw7bUS`QPtMbHrOp`AQ*(K3&&z%UU6bKK-z! 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_ATL_APARTMENT_THREADED +#endif + +#include + +#include +#pragma comment(lib, "aygshell.lib") + + + +#include +#include + +#if defined(WIN32_PLATFORM_PSPC) || defined(WIN32_PLATFORM_WFSP) +#ifndef _DEVICE_RESOLUTION_AWARE +#define _DEVICE_RESOLUTION_AWARE +#endif +#endif + +#ifdef _DEVICE_RESOLUTION_AWARE +#include "DeviceResolutionAware.h" +#endif + +#if _WIN32_WCE < 0x500 && ( defined(WIN32_PLATFORM_PSPC) || defined(WIN32_PLATFORM_WFSP) ) + #pragma comment(lib, "ccrtrtti.lib") + #ifdef _X86_ + #if defined(_DEBUG) + #pragma comment(lib, "libcmtx86d.lib") + #else + #pragma comment(lib, "libcmtx86.lib") + #endif + #endif +#endif + +#include + +// TODO: reference additional headers your program requires here diff --git a/Start_WM/test6/test6.cpp b/Start_WM/test6/test6.cpp new file mode 100755 index 00000000..1769c2eb --- /dev/null +++ b/Start_WM/test6/test6.cpp @@ -0,0 +1,127 @@ +// test6.cpp : Defines the entry point for the console application. +// + +#include "stdafx.h" +#include "windows.h" +#include "wingdi.h" +#include "GF.h" +#include "GFGx.h" +#include "GFDx.h" +#include "GFVx.h" +#include "GFDiag.h" +#include +#include + +// Rotation related defines +#define H_FLIP_BIT 0x00000001 +#define V_FLIP_BIT 0x00000002 +#define XYSWAP_BIT 0x00000004 +#define ROT_IDENTIY 0x0 +#define ROT_90 (XYSWAP_BIT | H_FLIP_BIT) +#define ROT_180 (H_FLIP_BIT | V_FLIP_BIT) +#define ROT_270 (XYSWAP_BIT | V_FLIP_BIT) +#define ROT_H_FLIP (H_FLIP_BIT) +#define ROT_V_FLIP (V_FLIP_BIT) +#define ROT_XYSWAP (XYSWAP_BIT) +#define ROT_SWAP_X_Y (XYSWAP_BIT | H_FLIP_BIT | V_FLIP_BIT) + +// Overlay options +#define NO_OVERLAY 0 +#define RGB565_WITH_VXBLT 1 +#define ARGB8888_WITH_VXBLT 2 +#define YUV_WITH_FR 3 //(FR = fast rotate) + +#define COLOR_KEY (255<<16 | 0<<8 | 255)//RGB888 + +//kbm gui 2.2 ¹Ý¿µ +#define BLEND_KEY (5<<16 | 18<<8 | 41)//RGB888 +//#define BLEND_KEY (37<<16 | 54<<8 | 84)//RGB888 + +#define BACKGROUND_RGB565 (0<<11 | 0<<5 | 0)//RGB565 + +#define ALPHA_VALUE (165<<16 |165<<8 | 165) +#define OVERLAY_SURF 2 + +#define DBGERROR 1 +#define DBGINFO 2 + +#define DEFAULT_LCD_WIDTH 800 +#define DEFAULT_LCD_HEIGHT 480 + +FILE *fp; +int tpos=0; +void text_d(LPWSTR s){ + + fwprintf(fp, L"debug: %s \n",s); + + HDC hd=GetDC(0); + RECT r; + r.left=0; + r.top=tpos; + r.right=480; + r.bottom=800; + if (!tpos){Rectangle(hd,0,0,480,800);} + tpos+=25; + DrawText(hd,s,wcslen(s),&r,0); + if (tpos>700){tpos=0;} + +} +int _tmain(int argc, _TCHAR* argv[]) +{ + + if (( fp= fopen("log10.txt", "w")) == NULL) { + printf("He óäàåòñÿ îòêðûòü ôàéë.\n"); + } + + + text_d(L"Started"); + GFRECT destRect; + GFRECT srcRect; + GFRECT srcXYRect; // src rect for an xyswapped src image + GF_RETTYPE status; + GFRMSURFACEREQUEST surfReq; + GFDXPROPERTY DxProp;// Dx Specific + NvU32 width, height, bpp, stride, startAddr; + GFRmHandle pm=GFRmOpen( NULL ); + GFDxHandle px; + GFDxOpen(pm, &(px), GF_STATE_DEFAULT, NULL); + + + GFDxGetAttribute(px ,LCD_MAIN, GFDX_ATTR_STARTADDR, &startAddr); + WCHAR buff[200]; + wsprintf(buff,L"%x",startAddr); + text_d(L"startAddr"); + text_d(buff); + text_d(L"fix"); + //GFDxSetAttributeWithCS + startAddr=0x2000000; + GFDxSetAttributeWithCS(px ,LCD_MAIN, GFDX_ATTR_STARTADDR, startAddr); + wsprintf(buff,L"%x",startAddr); + text_d(L"startAddr"); + text_d(buff); + + + + + + + +return 0; + text_d(L"Starting Haret\n"); + SHELLEXECUTEINFO ShExecInfo = {0}; + ShExecInfo.cbSize = sizeof(SHELLEXECUTEINFO); + ShExecInfo.fMask = SEE_MASK_NOCLOSEPROCESS; + ShExecInfo.hwnd = NULL; + ShExecInfo.lpVerb = L"open"; + ShExecInfo.lpFile = L"\\Storage Card\\Android\\haret.exe"; + ShExecInfo.lpParameters = NULL; +//WCHAR strExePath [MAX_PATH]; +//GetModuleFileNameW (NULL, strExePath, MAX_PATH); + + ShExecInfo.lpDirectory = NULL; + ShExecInfo.nShow = SW_SHOW; + ShExecInfo.hInstApp = NULL; + ShellExecuteEx(&ShExecInfo); + return 0; +} + diff --git a/Start_WM/test6/test6.vcproj b/Start_WM/test6/test6.vcproj new file mode 100755 index 00000000..7e6efd0e --- /dev/null +++ b/Start_WM/test6/test6.vcproj @@ -0,0 +1,453 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/kernel-2.6.33/.config b/kernel-2.6.33/.config index 9597c933..207ae7a1 100644 --- a/kernel-2.6.33/.config +++ b/kernel-2.6.33/.config @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.33 -# Sat Sep 11 11:04:54 2010 +# Fri Oct 15 21:48:21 2010 # CONFIG_ARM=y CONFIG_HAVE_PWM=y @@ -65,15 +65,16 @@ CONFIG_LOG_BUF_SHIFT=17 CONFIG_GROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_RT_GROUP_SCHED=y -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set +# CONFIG_USER_SCHED is not set +CONFIG_CGROUP_SCHED=y CONFIG_CGROUPS=y # CONFIG_CGROUP_DEBUG is not set -# CONFIG_CGROUP_NS is not set -# CONFIG_CGROUP_FREEZER is not set -# CONFIG_CGROUP_DEVICE is not set -# CONFIG_CPUSETS is not set -# CONFIG_CGROUP_CPUACCT is not set +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y # CONFIG_RESOURCE_COUNTERS is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y @@ -196,7 +197,7 @@ CONFIG_DEFAULT_IOSCHED="cfq" # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set # CONFIG_MUTEX_SPIN_ON_OWNER is not set -# CONFIG_FREEZER is not set +CONFIG_FREEZER=y # # System Type @@ -301,12 +302,14 @@ CONFIG_ARCH_PXA=y # CONFIG_PXA_SHARPSL is not set # CONFIG_ARCH_PXA_ESERIES is not set CONFIG_MACH_G900=y +CONFIG_G900_CORE=y CONFIG_G900_KBR=y CONFIG_G900_BUTTON=y CONFIG_G900_LEDS=y CONFIG_G900_PHONE=y CONFIG_G900_POWER_BUTTON=y -CONFIG_G900_FLASH=y +CONFIG_G900_UDC=y +# CONFIG_G900_FLASH is not set CONFIG_PXA27x=y CONFIG_PXA_SSP=y CONFIG_PLAT_PXA=y @@ -1094,8 +1097,7 @@ CONFIG_FB_TILEBLITTING=y # # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_PXA is not set -# CONFIG_FB_G900 is not set -CONFIG_FB_G900_NEW=y +CONFIG_FB_G900=y # CONFIG_FB_MBX is not set # CONFIG_FB_W100 is not set # CONFIG_FB_VIRTUAL is not set diff --git a/kernel-2.6.33/arch/arm/configs/g900_defconfig b/kernel-2.6.33/arch/arm/configs/g900_defconfig index 9b572309..b6f6c7d7 100644 --- a/kernel-2.6.33/arch/arm/configs/g900_defconfig +++ b/kernel-2.6.33/arch/arm/configs/g900_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.33 -# Sat Sep 11 04:31:01 2010 +# Thu Sep 23 19:37:32 2010 # CONFIG_ARM=y CONFIG_HAVE_PWM=y @@ -65,15 +65,16 @@ CONFIG_LOG_BUF_SHIFT=17 CONFIG_GROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_RT_GROUP_SCHED=y -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set +# CONFIG_USER_SCHED is not set +CONFIG_CGROUP_SCHED=y CONFIG_CGROUPS=y # CONFIG_CGROUP_DEBUG is not set -# CONFIG_CGROUP_NS is not set -# CONFIG_CGROUP_FREEZER is not set -# CONFIG_CGROUP_DEVICE is not set -# CONFIG_CPUSETS is not set -# CONFIG_CGROUP_CPUACCT is not set +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y # CONFIG_RESOURCE_COUNTERS is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y @@ -85,7 +86,7 @@ CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="../ramfs-android/" +CONFIG_INITRAMFS_SOURCE="../ramfs-android" CONFIG_INITRAMFS_ROOT_UID=0 CONFIG_INITRAMFS_ROOT_GID=0 CONFIG_RD_GZIP=y @@ -104,6 +105,7 @@ CONFIG_EMBEDDED=y CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y @@ -137,6 +139,7 @@ CONFIG_HAVE_CLK=y # # GCOV-based kernel profiling # +# CONFIG_GCOV_KERNEL is not set # CONFIG_SLOW_WORK is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y @@ -194,7 +197,7 @@ CONFIG_DEFAULT_IOSCHED="cfq" # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set # CONFIG_MUTEX_SPIN_ON_OWNER is not set -# CONFIG_FREEZER is not set +CONFIG_FREEZER=y # # System Type @@ -389,7 +392,7 @@ CONFIG_KEXEC=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_DEBUG=y CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_FREQ_STAT_DETAILS=y CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y @@ -427,7 +430,8 @@ CONFIG_HAVE_AOUT=y # Power management options # CONFIG_PM=y -# CONFIG_PM_DEBUG is not set +CONFIG_PM_DEBUG=y +CONFIG_PM_VERBOSE=y # CONFIG_SUSPEND is not set CONFIG_HAS_WAKELOCK=y CONFIG_HAS_EARLYSUSPEND=y @@ -538,13 +542,14 @@ CONFIG_WEXT_SPY=y CONFIG_CFG80211=y CONFIG_NL80211_TESTMODE=y CONFIG_CFG80211_DEVELOPER_WARNINGS=y -# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_REG_DEBUG=y CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_DEBUGFS=y CONFIG_WIRELESS_OLD_REGULATORY=y CONFIG_CFG80211_WEXT=y CONFIG_WIRELESS_EXT_SYSFS=y CONFIG_LIB80211=y -# CONFIG_LIB80211_DEBUG is not set +CONFIG_LIB80211_DEBUG=y CONFIG_MAC80211=y # CONFIG_MAC80211_RC_PID is not set # CONFIG_MAC80211_RC_MINSTREL is not set @@ -553,6 +558,7 @@ CONFIG_MAC80211=y CONFIG_MAC80211_RC_DEFAULT="" CONFIG_MAC80211_MESH=y # CONFIG_MAC80211_LEDS is not set +# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_DEBUG_MENU is not set # CONFIG_WIMAX is not set CONFIG_RFKILL=y @@ -575,10 +581,13 @@ CONFIG_FW_LOADER=y # CONFIG_FIRMWARE_IN_KERNEL is not set CONFIG_EXTRA_FIRMWARE="libertas/gspi8385_hlp.bin libertas/gspi8385.bin" CONFIG_EXTRA_FIRMWARE_DIR="../FW" +CONFIG_DEBUG_DRIVER=y +CONFIG_DEBUG_DEVRES=y # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_DEBUG=y +CONFIG_MTD_DEBUG_VERBOSE=3 # CONFIG_MTD_TESTS is not set # CONFIG_MTD_CONCAT is not set # CONFIG_MTD_PARTITIONS is not set @@ -641,19 +650,7 @@ CONFIG_MTD_PHYSMAP=y # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_IDS=y -CONFIG_MTD_NAND_DISKONCHIP=m -# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 -# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set -# CONFIG_MTD_NAND_SHARPSL is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_NAND is not set # CONFIG_MTD_ONENAND is not set # @@ -771,7 +768,7 @@ CONFIG_LIBERTAS=y # CONFIG_LIBERTAS_USB is not set # CONFIG_LIBERTAS_SDIO is not set CONFIG_LIBERTAS_SPI=m -# CONFIG_LIBERTAS_DEBUG is not set +CONFIG_LIBERTAS_DEBUG=y # CONFIG_P54_COMMON is not set # CONFIG_RT2X00 is not set # CONFIG_WL12XX is not set @@ -956,6 +953,7 @@ CONFIG_I2C_PXA=y # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set CONFIG_SPI=y +CONFIG_SPI_DEBUG=y CONFIG_SPI_MASTER=y # @@ -979,6 +977,7 @@ CONFIG_SPI_SPIDEV=y # CONFIG_PPS is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y CONFIG_GPIOLIB=y +CONFIG_DEBUG_GPIO=y CONFIG_GPIO_SYSFS=y # @@ -1154,7 +1153,9 @@ CONFIG_SND_JACK=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y CONFIG_SND_VERBOSE_PRINTK=y -# CONFIG_SND_DEBUG is not set +CONFIG_SND_DEBUG=y +CONFIG_SND_DEBUG_VERBOSE=y +CONFIG_SND_PCM_XRUN_DEBUG=y CONFIG_SND_VMASTER=y # CONFIG_SND_RAWMIDI_SEQ is not set # CONFIG_SND_OPL3_LIB_SEQ is not set @@ -1237,7 +1238,7 @@ CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y # CONFIG_USB_ARCH_HAS_EHCI is not set CONFIG_USB=y -# CONFIG_USB_DEBUG is not set +CONFIG_USB_DEBUG=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # @@ -1288,7 +1289,7 @@ CONFIG_USB_ACM=m # also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=m -# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DEBUG=y CONFIG_USB_STORAGE_DATAFAB=m CONFIG_USB_STORAGE_FREECOM=m CONFIG_USB_STORAGE_ISD200=m @@ -1383,7 +1384,9 @@ CONFIG_USB_SERIAL_GENERIC=y # CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_VST is not set CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set # CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_GADGET_VBUS_DRAW=100 CONFIG_USB_GADGET_SELECTED=y # CONFIG_USB_GADGET_AT91 is not set @@ -1734,14 +1737,60 @@ CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set +CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_DETECT_SOFTLOCKUP is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +CONFIG_DEBUG_OBJECTS=y +CONFIG_DEBUG_OBJECTS_SELFTEST=y +CONFIG_DEBUG_OBJECTS_FREE=y +CONFIG_DEBUG_OBJECTS_TIMERS=y +CONFIG_DEBUG_OBJECTS_WORK=y +CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1 +CONFIG_DEBUG_SLAB=y +CONFIG_DEBUG_SLAB_LEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_LOCK_ALLOC=y +CONFIG_PROVE_LOCKING=y +CONFIG_LOCKDEP=y +CONFIG_LOCK_STAT=y +CONFIG_DEBUG_LOCKDEP=y +CONFIG_TRACE_IRQFLAGS=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_MEMORY_INIT is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +CONFIG_DEBUG_WRITECOUNT=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DEBUG_LIST=y +CONFIG_DEBUG_SG=y +CONFIG_DEBUG_NOTIFIERS=y +CONFIG_DEBUG_CREDENTIALS=y +CONFIG_BOOT_PRINTK_DELAY=y +# CONFIG_RCU_TORTURE_TEST is not set CONFIG_RCU_CPU_STALL_DETECTOR=y +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_FAULT_INJECTION is not set # CONFIG_LATENCYTOP is not set # CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_DEBUG_PAGEALLOC=y +CONFIG_WANT_PAGE_DEBUG_FLAGS=y +CONFIG_PAGE_POISONING=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_TRACING_SUPPORT=y CONFIG_FTRACE=y @@ -1758,10 +1807,17 @@ CONFIG_BRANCH_PROFILE_NONE=y # CONFIG_KMEMTRACE is not set # CONFIG_WORKQUEUE_TRACER is not set # CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_DYNAMIC_DEBUG=y # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_STACK_USAGE=y +CONFIG_DEBUG_LL=y +CONFIG_EARLY_PRINTK=y +# CONFIG_DEBUG_ICEDCC is not set # CONFIG_OC_ETM is not set # @@ -1891,8 +1947,6 @@ CONFIG_ZLIB_INFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_DECOMPRESS_GZIP=y -CONFIG_REED_SOLOMON=m -CONFIG_REED_SOLOMON_DEC16=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/Kconfig b/kernel-2.6.33/arch/arm/mach-pxa/g900/Kconfig index 007a153a..70ce3a5a 100755 --- a/kernel-2.6.33/arch/arm/mach-pxa/g900/Kconfig +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/Kconfig @@ -8,6 +8,11 @@ config MACH_G900 select HAVE_PWM select GPIO_SYSFS +config G900_CORE + tristate "Tohiba G900 core" + depends on MACH_G900 + help + This selection enables Tohiba G900 core support. config G900_KBR tristate "G900 Keyboard" @@ -44,6 +49,14 @@ config G900_POWER_BUTTON ---help--- This is a POWER Buttons driver for G900 + +config G900_UDC + bool "USB Device Controller support" + depends on MACH_G900 && USB_PXA27X + help + Enables Tohiba G900 specific USB detection + + config G900_FLASH tristate "G900 mDOC G4 flash Experemental" depends on MACH_G900 diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/Makefile b/kernel-2.6.33/arch/arm/mach-pxa/g900/Makefile index feb4b907..a8249e51 100755 --- a/kernel-2.6.33/arch/arm/mach-pxa/g900/Makefile +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/Makefile @@ -1,8 +1,10 @@ -obj-$(CONFIG_MACH_G900) += g900.o +obj-$(CONFIG_MACH_G900) += g900.o g900_pm.o +obj-$(CONFIG_G900_CORE) += g900_core.o obj-$(CONFIG_G900_KBR) += g900_keyboard.o obj-$(CONFIG_G900_BUTTON) += g900_buttons.o obj-$(CONFIG_G900_POWER_BUTTON) += g900_pwr_btn.o obj-$(CONFIG_G900_LEDS) += g900_leds.o +obj-$(CONFIG_G900_UDC) += g900_udc.o obj-$(CONFIG_G900_PHONE) += g900_msm6280.o #obj-$(CONFIG_G900_FLASH) += ttfs/ obj-m += ttfs/ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/docg3.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/docg3.c new file mode 100755 index 00000000..e0389d99 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/docg3.c @@ -0,0 +1,356 @@ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DoC_G3_IO 0x0800 + +#define DoC_G3_ChipID 0x1000 +#define DoC_G3_DeviceIdSelect 0x100a +#define DoC_G3_Ctrl 0x100c + +#define DoC_G3_CtrlConfirm 0x1072 +#define DoC_G3_ReadAddress 0x101a +#define DoC_G3_FlashSelect 0x1032 +#define DoC_G3_FlashCmd 0x1034 +#define DoC_G3_FlashAddr 0x1036 +#define DoC_G3_FlashCtrl 0x1038 +#define DoC_G3_Nop 0x103e + +#define DOC_MODE_RESET 0x0 +#define DOC_MODE_NORMAL 0x1 +#define DOC_MODE_MDWREN 0x4 + + +#define DoC_G3_ID 0x200 + +#define CMD_FLASH_RESET 0xff +#define DoC_G3_IOREMAP_LEN 0x8000 + +static unsigned long doc_config_location = 0xffffffff; + + +#define DOCG3_MAJOR 254 +#define DOCG3_MINOR 0 + +int major,minor; +#define SECTOR_SIZE 0x200 +#define NUM_SECTOR 0xffff +#define CHIP_SIZE (0xffff*0x100) + +module_param(doc_config_location, ulong, 0); +MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChipG3"); + +#define ReadDOC(adr,reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg))))) +#define ReadDOC_16(adr,reg) ((__u16)(*(volatile __u32 *)(((unsigned long)adr)+((reg))))) +#define ReadDOC_32(adr,reg) ((__u32)(*(volatile __u32 *)(((unsigned long)adr)+((reg))))) +#define WriteDOC(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg))) = (__u16)d; wmb();} while(0) +#define WriteDOC_8(d, adr, reg) do{ *(volatile unsigned char *)(((unsigned long)adr)+((reg))) = (unsigned char)d; wmb();} while(0) + + +struct doc_g3_dev { + void __iomem *virtaddr; + unsigned long physaddr; + + struct cdev cdev; +}; +struct doc_g3_dev *g3; +static void docg3_nop(struct doc_g3_dev *g3) { + WriteDOC(0xff,g3->virtaddr,DoC_G3_Nop); +} + + +static void docg3_wait_flash_completion(struct doc_g3_dev *g3) { + __u32 c; + int i=0; + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); + /* Prepare read */ + WriteDOC(g3->physaddr+DoC_G3_FlashCtrl,g3->virtaddr,DoC_G3_ReadAddress); + c =ReadDOC(g3->virtaddr,DoC_G3_FlashCtrl); + while(((c & 0x01) != 0x01) && (i++<300)) { + //printk("%x(%x) ",c,c<<31); + c =ReadDOC(g3->virtaddr,DoC_G3_FlashCtrl); + } +// printk("\n"); +} + +static void docg3_flash_select(struct doc_g3_dev *g3,unsigned char f) { + WriteDOC(f,g3->virtaddr,DoC_G3_FlashSelect); +} + +static void docg3_flash_cmd(struct doc_g3_dev *g3,unsigned char c) { + WriteDOC(c,g3->virtaddr,DoC_G3_FlashCmd); + docg3_nop(g3); + docg3_nop(g3); +} + +static void docg3_reset(struct doc_g3_dev *g3) { + WriteDOC( DOC_MODE_RESET|DOC_MODE_MDWREN,g3->virtaddr,DoC_G3_Ctrl); + WriteDOC(~( DOC_MODE_RESET|DOC_MODE_MDWREN),g3->virtaddr, DoC_G3_CtrlConfirm); + + + WriteDOC( DOC_MODE_NORMAL|DOC_MODE_MDWREN,g3->virtaddr,DoC_G3_Ctrl); + WriteDOC( ~(DOC_MODE_NORMAL|DOC_MODE_MDWREN),g3->virtaddr, DoC_G3_CtrlConfirm); + +} + +static void docg3_set_read_offset(struct doc_g3_dev *g3,unsigned char offset) { + WriteDOC_8(offset,g3->virtaddr,DoC_G3_FlashAddr); + docg3_nop(g3); +} +static void docg3_set_read_addr(struct doc_g3_dev *g3, unsigned int addr) { + unsigned char tmp; + + tmp = (unsigned char) (addr & 0xFF); + //printk("%s: (%x,%x) %x ",__FUNCTION__,addr,offset,tmp); + WriteDOC_8(tmp,g3->virtaddr,DoC_G3_FlashAddr); + + tmp = (unsigned char) ((addr>>8) & 0xFF); + //printk("%x ",tmp); + WriteDOC_8(tmp,g3->virtaddr,DoC_G3_FlashAddr); + + tmp = (unsigned char) ((addr>>16) & 0xFF); + //printk("%x ",tmp); + WriteDOC_8(tmp,g3->virtaddr,DoC_G3_FlashAddr); + docg3_nop(g3); + //docg3_set_read_offset(g3,offset); + //printk("%x\n",offset); +} + +static void docg3_enable_stuff(struct doc_g3_dev *g3) { + WriteDOC(0x8a0f,g3->virtaddr,0x1040); + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); +} + +// Read the num the 512 bytes block of the chip flash +static void docg3_read_sector(struct doc_g3_dev *g3,int chip,int num,unsigned int *buf) { + unsigned int tmp,i,addr; + addr= num%0x40 + 0x80*(num/0x40); + //printk("docg3_read_sector: %x %x %x\n",chip, num, addr); + do { + docg3_flash_select(g3,0x00); + docg3_flash_cmd(g3,CMD_FLASH_RESET); + docg3_wait_flash_completion(g3); + + docg3_nop(g3); + + docg3_flash_select(g3,0x09); + docg3_flash_cmd(g3,0xa2); + docg3_flash_cmd(g3,0x22); + + + docg3_flash_select(g3,0xe); + docg3_flash_cmd(g3,0); + docg3_flash_select(g3,0x12); + if((0x0|addr)==(0x40|addr)) printk("loop for %x\n",addr); + + docg3_flash_cmd(g3,0x60); + docg3_set_read_addr(g3,0x0|addr); + + + docg3_flash_cmd(g3,0x60); + docg3_set_read_addr(g3,0x40|addr); + + + //docg3_set_read_addr(g3,0x80,0x80); + WriteDOC_8(g3->physaddr+DoC_G3_FlashCtrl,g3->virtaddr,DoC_G3_ReadAddress); + tmp = ReadDOC(g3->virtaddr,DoC_G3_FlashCtrl); + //printk("%x %x\n",tmp,tmp & 0x06); + } while(tmp & 0x06); //TODO: timeout + + docg3_flash_cmd(g3,0x30); + docg3_wait_flash_completion(g3); + docg3_flash_cmd(g3,0x05); + if(addr & 1) + docg3_set_read_offset(g3,0x84); // second block ? + else + docg3_set_read_offset(g3,0x00); // second block ? + + docg3_flash_cmd(g3,0xe0); + docg3_enable_stuff(g3); + + WriteDOC(g3->physaddr+DoC_G3_IO,g3->virtaddr,DoC_G3_ReadAddress); + + for(i=0;i<128;i++) { + tmp = ReadDOC_32(g3->virtaddr, DoC_G3_IO+4); + buf[i] = tmp; + } + + +} + +int docg3_open(struct inode *inode, struct file *filp) +{ + printk("docg3_open\n"); + //dev = container_of(inode->i_cdev, struct doc_g3_dev, cdev); + filp->private_data = g3; /* for other methods */ + + return 0; /* success */ +} + +int docg3_release(struct inode *inode, struct file *filp) +{ + printk("docg3_release\n"); + return 0; +} + +int docg3_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + return -ENOTTY; +} + +ssize_t docg3_read(struct file *filp, char __user *buf, size_t count, + loff_t *f_pos) +{ + struct doc_g3_dev *dev = filp->private_data; + int block=0; + int chip=0; + int n=SECTOR_SIZE; + unsigned int buffer[128]; + loff_t cur = filp->f_pos; + //printk("docg3_read: %d offset: %llx\n",count,filp->f_pos); + + //chip = ((unsigned int)filp->f_pos) / CHIP_SIZE; //todo + if(cur >= 0x4000000) { + printk("Failed for %llx %x\n",filp->f_pos,count); + return -EIO; + } + if((cur + count) > 0x4000000 ) { + printk("truncating %llx %x",cur,count); + count = 0x4000000 - cur; + printk(" to %x\n",count); + } + // TODO: + // separate reques if over a chip change. + do { + block = (cur - chip * CHIP_SIZE) / SECTOR_SIZE; + //printk("docg3_read: %x %x %x\n",chip,block,(( int)filp->f_pos)); + + //if(block> NUM_SECTOR) return -EFAULT; + + docg3_read_sector(dev,chip,block,buffer); + + if(count < SECTOR_SIZE) n = count; + if (copy_to_user(buf,buffer,n)) + return -EFAULT; + //printk("return %d (requested %d)\n",n,count); + *f_pos+=n; + count-=n; + buf +=n; + cur +=n; + + }while (count >= SECTOR_SIZE ); + + return cur - filp->f_pos; + + +} + + +loff_t docg3_llseek(struct file *filp, loff_t off, int whence) +{ + loff_t newpos; + printk("docg3_seek\n"); + switch(whence) { + case 0: /* SEEK_SET */ + newpos = off; + break; + + case 1: /* SEEK_CUR */ + newpos = filp->f_pos + off; + break; + + default: + return -EINVAL; + } + if (newpos < 0) return -EINVAL; + filp->f_pos = newpos; + return newpos; +} + + +struct file_operations docg3_fops = { + .owner = THIS_MODULE, + .llseek = docg3_llseek, + .read = docg3_read, + .ioctl = docg3_ioctl, + .open = docg3_open, + .release = docg3_release, +}; + + +static int __init init_docg3(void) +{ + static struct doc_g3_dev s_g3; + unsigned int chipId; + int i; + dev_t dev=0; + + + register_chrdev(DOCG3_MAJOR,"docG3",&docg3_fops); + dev = MKDEV(DOCG3_MAJOR,DOCG3_MINOR); + + g3=&s_g3; + g3->physaddr = doc_config_location; + g3->virtaddr = ioremap(g3->physaddr, DoC_G3_IOREMAP_LEN); + if(!g3->virtaddr ) { + printk(KERN_ERR "DoC_G3 ioremap failed\n"); + return -EIO; + } + + //devfs_mk_cdev(dev, S_IFCHR|S_IRUSR|S_IWUSR|S_IRGRP,"DocG3"); + cdev_init(&g3->cdev,&docg3_fops); + g3->cdev.owner= THIS_MODULE; + g3->cdev.ops = &docg3_fops; + i = cdev_add(&g3->cdev,MKDEV(DOCG3_MAJOR,DOCG3_MINOR),1); + if(i) + printk("cdev_add failed\n"); + + docg3_reset(g3); + + WriteDOC(g3->physaddr+DoC_G3_ChipID,g3->virtaddr,DoC_G3_ReadAddress); + chipId = ReadDOC_16(g3->virtaddr, DoC_G3_ChipID); + printk("Doc_G3: chip id=%x\n",chipId); + if(chipId != DoC_G3_ID) return -1; + + + printk("Starting flash stuff\n"); + + WriteDOC(g3->physaddr+DoC_G3_ChipID,g3->virtaddr,DoC_G3_DeviceIdSelect); + WriteDOC(0x39,g3->virtaddr,DoC_G3_FlashCtrl); + + printk("end\n"); + return 0; +} + +static void __exit cleanup_docg3(void) +{ + cdev_del(&g3->cdev); + unregister_chrdev_region(MKDEV(DOCG3_MAJOR,DOCG3_MINOR),1); +} + +module_init(init_docg3); +module_exit(cleanup_docg3); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Thomas Cougnard "); +MODULE_DESCRIPTION("Test modules for Diskonchip G3 device description\n"); diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/g900.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900.c index f82aeee3..6eb9e79c 100755 --- a/kernel-2.6.33/arch/arm/mach-pxa/g900/g900.c +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900.c @@ -328,42 +328,12 @@ uhcrhda : 0x04001102 = 00000100 00000000 00001011 00000010 [ 494.563518] pxa27x_ohci_select_pmm write [ 494.574646] uhcrhda: 0x04000b02 [ - - - - - */ - - -/****************************************************************************** - * USB Gadget (UDC) - ******************************************************************************/ - - static struct pxa2xx_udc_mach_info g900_udc_info __initdata = { -// .udc_is_connected = is_usb_connected, - .gpio_vbus = GPIO40_nUSB_DETECT, -// .gpio_vbus = GPIO41_USB_P2_7, -// .gpio_pullup = GPIO93_USB_ENABLE, - .gpio_pullup = GPIO75_USB_ENABLE, -// .udc_command = g900_udc_command, -}; - - -struct gpio_vbus_mach_info gpio_vbus_data = { - .gpio_vbus = GPIO40_nUSB_DETECT, - .gpio_vbus_inverted = 1, - .gpio_pullup = -1, -}; - - static void __init usb_init(void) { printk(KERN_INFO "pxa_set_ohci_info\n"); pxa_set_ohci_info(&g900_ohci_platform_data); - printk(KERN_INFO "pxa_set_udc_info\n"); - pxa_set_udc_info(&g900_udc_info); } @@ -583,7 +553,9 @@ static struct platform_device g900_button = { static struct platform_device g900_pwr_button = { .name = "g900-power-button", }; - +static struct platform_device g900_udc = { + .name = "g900-udc", +}; static struct platform_device g900_sound = { @@ -614,6 +586,17 @@ static struct platform_device wm9713_codec = }, }; #endif + +/* Core Hardware Functions */ + +struct platform_device g900_core = { + .name = "g900-core", + .id = 0, + .dev = { + .platform_data = NULL, + }, +}; + static struct platform_device *g900_devices[] __initdata = { &g900_keyboard, &g900_button, @@ -621,6 +604,8 @@ static struct platform_device *g900_devices[] __initdata = { &g900_ts, &pxa2xx_pcm, &g900_sound, + &g900_core, + &g900_udc, //&g900_flash, }; diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_core.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_core.c new file mode 100755 index 00000000..c4a3953a --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_core.c @@ -0,0 +1,159 @@ +/* Core Hardware driver for G900 + * + * Copyright (c) 2010 Angell Fear + * + * 2005-03-29 SDG Systems, LLC + * 2005-03-29 Todd Blumer Converted basic structure to support hx4700 + * 2005-04-30 Todd Blumer Add IRDA code from H2200 + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + + + +static int g900_bootloader = 0; /* Is the stock G900 bootloader installed? */ + +#ifdef CONFIG_PM + +void g900_pm_init(void); + +static int g900_suspend(struct platform_device *dev, pm_message_t state) +{ + /* Turn off external clocks here */ + + /* None =( */ + + /* Wake up enable. */ + /* PWER : 0x80031209 = 10000000 00000011 00010010 00001001 */ + PWER = PWER_GPIO0 + | PWER_GPIO3 /* Power button */ + | PWER_GPIO9 /* Keyboard open */ + | PWER_GPIO12 /* SD detect */ + | PWER_GPIO(16) | PWER_GPIO(17) /* gpio53 ??? */ + | PWER_RTC; + /* Wake up on falling edge. */ + /* PFER : 0x00001209 = 00000000 00000000 00010010 00001001 */ + PFER = PWER_GPIO0 + | PWER_GPIO3 + | PWER_GPIO9 + | PWER_GPIO12; + + /* Wake up on rising edge. */ + /* PRER : 0x00001200 = 00000000 00000000 00010010 00000000 */ + PRER = PWER_GPIO9 + | PWER_GPIO12; + + /* 3.6864 MHz oscillator power-down enable */ + /* + Universal +PCFR = PCFR_OPDE | PCFR_PI2CEN | PCFR_GPROD | PCFR_GPR_EN; + g900 +PCFR : 0x000080b1 = 00000000 00000000 10000000 10110001 + */ + PCFR = PCFR_OPDE | PCFR_GPR_EN | PCFR_DC_EN | PCFR_RO; + + /* htc universal + PGSR0 = 0x09088004; + PGSR1 = 0x00020002; + PGSR2 = 0x8001c000; + PGSR3 = 0x00106284; + */ + PGSR0 = 0x08000000; + PGSR1 = 0x00158802; + PGSR2 = 0x00014000; + PGSR3 = 0x00600000; + PSLR = 0xcc000000; + + +#if 0 + /* + * If we're using bootldr and not the stock HTC bootloader, + * we want to wake up periodically to see if the charge is full while + * it is suspended. We do this with the OS timer 4 in the pxa270. + */ + if (!g900_bootloader) { + OMCR4 = 0x4b; /* Periodic, self-resetting, 1-second timer */ + OSMR4 = 5; /* Wake up bootldr after x seconds so it can + figure out what to do with the LEDs. */ + OIER |= 0x10; /* Enable interrupt source for Timer 4 */ + OSCR4 = 0; /* This starts the timer */ + } +#endif + + return 0; +} + +static int g900_resume(struct platform_device *dev) +{ + + return 0; +} +#else +# define g900_suspend NULL +# define g900_resume NULL +#endif + +static int +g900_core_probe( struct platform_device *dev ) +{ + + printk( KERN_NOTICE "Toshiba G900 Core Hardware Driver\n" ); + + printk("Using stock Toshiba G900 first stage bootloader\n"); + g900_bootloader = 1; + + g900_pm_init(); + + return 0; +} + +static int +g900_core_remove( struct platform_device *dev ) +{ + + return 0; +} + +static struct platform_driver g900_core_driver = { + .driver = { + .name = "g900-core", + }, + .probe = g900_core_probe, + .remove = g900_core_remove, + .suspend = g900_suspend, + .resume = g900_resume, +}; + +static int __init +g900_core_init( void ) +{ + return platform_driver_register( &g900_core_driver ); +} + + +static void __exit +g900_core_exit( void ) +{ + platform_driver_unregister( &g900_core_driver ); +} + +module_init( g900_core_init ); +module_exit( g900_core_exit ); + +MODULE_AUTHOR("Angell Fear"); +MODULE_DESCRIPTION("Toshiba G900 Core Hardware Driver"); +MODULE_LICENSE("GPL"); + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_flash.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_flash.c new file mode 100755 index 00000000..e617a6ff --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_flash.c @@ -0,0 +1,363 @@ + + +#include +#include +#include +#include +#include +#include +#include +#include +//#include +#include +#include +#include + + +#define DoC_G3_IO 0x0800 + +#define DoC_G3_ChipID 0x1000 +#define DoC_G3_DeviceIdSelect 0x100a +#define DoC_G3_Ctrl 0x100c + +#define DoC_G3_CtrlConfirm 0x1072 +#define DoC_G3_ReadAddress 0x101a +#define DoC_G3_FlashSelect 0x1032 +#define DoC_G3_FlashCmd 0x1034 +#define DoC_G3_FlashAddr 0x1036 +#define DoC_G3_FlashCtrl 0x1038 +#define DoC_G3_Nop 0x103e + +#define DOC_MODE_RESET 0x0 +#define DOC_MODE_NORMAL 0x1 +#define DOC_MODE_MDWREN 0x4 + + +#define DoC_G3_ID 0x200 + +#define CMD_FLASH_RESET 0xff +#define DoC_G3_IOREMAP_LEN 0x8000 + +static unsigned long doc_config_location = 0x00000000; + +#define LOG_TAG "DOC: " +#define dprintk(x...) printk(LOG_TAG x) + +#define DOCG3_MAJOR 254 +#define DOCG3_MINOR 0 + +int major,minor; +#define SECTOR_SIZE 0x200 +#define NUM_SECTOR 0xffff +#define CHIP_SIZE (0xffff*0x100) + +module_param(doc_config_location, ulong, 0); +MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChipG3"); + +#define ReadDOC(adr,reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg))))) +#define ReadDOC_16(adr,reg) ((__u16)(*(volatile __u32 *)(((unsigned long)adr)+((reg))))) +#define ReadDOC_32(adr,reg) ((__u32)(*(volatile __u32 *)(((unsigned long)adr)+((reg))))) +#define WriteDOC(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg))) = (__u16)d; wmb();} while(0) +#define WriteDOC_8(d, adr, reg) do{ *(volatile unsigned char *)(((unsigned long)adr)+((reg))) = (unsigned char)d; wmb();} while(0) + + +struct doc_g3_dev { + void __iomem *virtaddr; + unsigned long physaddr; + + struct cdev cdev; +}; +struct doc_g3_dev *g3; +static void docg3_nop(struct doc_g3_dev *g3) { + WriteDOC(0xff,g3->virtaddr,DoC_G3_Nop); +} + + +static void docg3_wait_flash_completion(struct doc_g3_dev *g3) { + __u32 c; + int i=0; + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); + /* Prepare read */ + WriteDOC(g3->physaddr+DoC_G3_FlashCtrl,g3->virtaddr,DoC_G3_ReadAddress); + c =ReadDOC(g3->virtaddr,DoC_G3_FlashCtrl); + printk(LOG_TAG "docg3_wait_flash_completion "); + while(((c & 0x01) != 0x01) && (i++<300)) { + printk("%x(%x) ",c,c<<31); + c =ReadDOC(g3->virtaddr,DoC_G3_FlashCtrl); + } + printk("\n"); +} + +static void docg3_flash_select(struct doc_g3_dev *g3,unsigned char f) { + WriteDOC(f,g3->virtaddr,DoC_G3_FlashSelect); +} + +static void docg3_flash_cmd(struct doc_g3_dev *g3,unsigned char c) { + WriteDOC(c,g3->virtaddr,DoC_G3_FlashCmd); + docg3_nop(g3); + docg3_nop(g3); +} + +static void docg3_reset(struct doc_g3_dev *g3) { + WriteDOC( DOC_MODE_RESET|DOC_MODE_MDWREN,g3->virtaddr,DoC_G3_Ctrl); + WriteDOC(~( DOC_MODE_RESET|DOC_MODE_MDWREN),g3->virtaddr, DoC_G3_CtrlConfirm); + + + WriteDOC( DOC_MODE_NORMAL|DOC_MODE_MDWREN,g3->virtaddr,DoC_G3_Ctrl); + WriteDOC( ~(DOC_MODE_NORMAL|DOC_MODE_MDWREN),g3->virtaddr, DoC_G3_CtrlConfirm); + +} + +static void docg3_set_read_offset(struct doc_g3_dev *g3,unsigned char offset) { + WriteDOC_8(offset,g3->virtaddr,DoC_G3_FlashAddr); + docg3_nop(g3); +} +static void docg3_set_read_addr(struct doc_g3_dev *g3, unsigned int addr) { + unsigned char tmp; + + tmp = (unsigned char) (addr & 0xFF); + //printk(LOG_TAG "%s: (%x,%x) %x ", __FUNCTION__,addr,offset,tmp); + WriteDOC_8(tmp,g3->virtaddr,DoC_G3_FlashAddr); + + tmp = (unsigned char) ((addr>>8) & 0xFF); + printk(LOG_TAG "%x ",tmp); + WriteDOC_8(tmp,g3->virtaddr,DoC_G3_FlashAddr); + + tmp = (unsigned char) ((addr>>16) & 0xFF); + printk(LOG_TAG "%x ",tmp); + WriteDOC_8(tmp,g3->virtaddr,DoC_G3_FlashAddr); + docg3_nop(g3); + //docg3_set_read_offset(g3,offset); + //printk("%x\n",offset); +} + +static void docg3_enable_stuff(struct doc_g3_dev *g3) { + WriteDOC(0x8a0f,g3->virtaddr,0x1040); + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); + docg3_nop(g3); +} + +// Read the num the 512 bytes block of the chip flash +static void docg3_read_sector(struct doc_g3_dev *g3,int chip,int num,unsigned int *buf) { + unsigned int tmp,i,addr; + addr= num%0x40 + 0x80*(num/0x40); + //printk("docg3_read_sector: %x %x %x\n",chip, num, addr); + do { + docg3_flash_select(g3,0x00); + docg3_flash_cmd(g3,CMD_FLASH_RESET); + docg3_wait_flash_completion(g3); + + docg3_nop(g3); + + docg3_flash_select(g3,0x09); + docg3_flash_cmd(g3,0xa2); + docg3_flash_cmd(g3,0x22); + + + docg3_flash_select(g3,0xe); + docg3_flash_cmd(g3,0); + docg3_flash_select(g3,0x12); + if((0x0|addr)==(0x40|addr)) printk(LOG_TAG "loop for %x\n",addr); + + docg3_flash_cmd(g3,0x60); + docg3_set_read_addr(g3,0x0|addr); + + + docg3_flash_cmd(g3,0x60); + docg3_set_read_addr(g3,0x40|addr); + + + //docg3_set_read_addr(g3,0x80,0x80); + WriteDOC_8(g3->physaddr+DoC_G3_FlashCtrl,g3->virtaddr,DoC_G3_ReadAddress); + tmp = ReadDOC(g3->virtaddr,DoC_G3_FlashCtrl); + //printk("%x %x\n",tmp,tmp & 0x06); + } while(tmp & 0x06); //TODO: timeout + + docg3_flash_cmd(g3,0x30); + docg3_wait_flash_completion(g3); + docg3_flash_cmd(g3,0x05); + if(addr & 1) + docg3_set_read_offset(g3,0x84); // second block ? + else + docg3_set_read_offset(g3,0x00); // second block ? + + docg3_flash_cmd(g3,0xe0); + docg3_enable_stuff(g3); + + WriteDOC(g3->physaddr+DoC_G3_IO,g3->virtaddr,DoC_G3_ReadAddress); + + for(i=0;i<128;i++) { + tmp = ReadDOC_32(g3->virtaddr, DoC_G3_IO+4); + buf[i] = tmp; + } + + +} + +int docg3_open(struct inode *inode, struct file *filp) +{ + printk(LOG_TAG "docg3_open\n"); + //dev = container_of(inode->i_cdev, struct doc_g3_dev, cdev); + filp->private_data = g3; /* for other methods */ + + return 0; /* success */ +} + +int docg3_release(struct inode *inode, struct file *filp) +{ + printk(LOG_TAG "docg3_release\n"); + return 0; +} + +int docg3_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + return -ENOTTY; +} + +ssize_t docg3_read(struct file *filp, char __user *buf, size_t count, + loff_t *f_pos) +{ + struct doc_g3_dev *dev = filp->private_data; + int block=0; + int chip=0; + int n=SECTOR_SIZE; + unsigned int buffer[128]; + loff_t cur = filp->f_pos; + printk(LOG_TAG "docg3_read: %d offset: %llx\n",count,filp->f_pos); + + //chip = ((unsigned int)filp->f_pos) / CHIP_SIZE; //todo + if(cur >= 0x4000000) { + printk(LOG_TAG "Failed for %llx %x\n",filp->f_pos,count); + return -EIO; + } + if((cur + count) > 0x4000000 ) { + printk(LOG_TAG "truncating %llx %x",cur,count); + count = 0x4000000 - cur; + printk(LOG_TAG " to %x\n",count); + } + // TODO: + // separate reques if over a chip change. + do { + block = (cur - chip * CHIP_SIZE) / SECTOR_SIZE; + printk(LOG_TAG "docg3_read: %x %x %x\n",chip,block,(( int)filp->f_pos)); + + //if(block> NUM_SECTOR) return -EFAULT; + + docg3_read_sector(dev,chip,block,buffer); + + if(count < SECTOR_SIZE) n = count; + if (copy_to_user(buf,buffer,n)) + return -EFAULT; + printk(LOG_TAG "return %d (requested %d)\n",n,count); + *f_pos+=n; + count-=n; + buf +=n; + cur +=n; + + }while (count >= SECTOR_SIZE ); + + return cur - filp->f_pos; + + +} + + +loff_t docg3_llseek(struct file *filp, loff_t off, int whence) +{ + loff_t newpos; + printk(LOG_TAG "docg3_seek\n"); + switch(whence) { + case 0: /* SEEK_SET */ + newpos = off; + break; + + case 1: /* SEEK_CUR */ + newpos = filp->f_pos + off; + break; + + default: + return -EINVAL; + } + if (newpos < 0) return -EINVAL; + filp->f_pos = newpos; + return newpos; +} + + +struct file_operations docg3_fops = { + .owner = THIS_MODULE, + .llseek = docg3_llseek, + .read = docg3_read, + .ioctl = docg3_ioctl, + .open = docg3_open, + .release = docg3_release, +}; + + +static int __init init_docg3(void) +{ + static struct doc_g3_dev s_g3; + unsigned int chipId; + int i; + dev_t dev=0; + + + register_chrdev(DOCG3_MAJOR,"docG3",&docg3_fops); + dev = MKDEV(DOCG3_MAJOR,DOCG3_MINOR); + + g3=&s_g3; + g3->physaddr = doc_config_location; + g3->virtaddr = ioremap(g3->physaddr, DoC_G3_IOREMAP_LEN); + if(!g3->virtaddr ) { + printk(KERN_ERR LOG_TAG "DoC_G3 ioremap failed\n"); + return -EIO; + } + + print_hex_dump_bytes(LOG_TAG , DUMP_PREFIX_ADDRESS, g3->virtaddr, 0x2000); + + + + //devfs_mk_cdev(dev, S_IFCHR|S_IRUSR|S_IWUSR|S_IRGRP,"DocG3"); + cdev_init(&g3->cdev,&docg3_fops); + g3->cdev.owner= THIS_MODULE; + g3->cdev.ops = &docg3_fops; + i = cdev_add(&g3->cdev,MKDEV(DOCG3_MAJOR,DOCG3_MINOR),1); + if(i) + printk(LOG_TAG "cdev_add failed\n"); + + docg3_reset(g3); + + WriteDOC(g3->physaddr+DoC_G3_ChipID,g3->virtaddr,DoC_G3_ReadAddress); + chipId = ReadDOC_16(g3->virtaddr, DoC_G3_ChipID); + printk(LOG_TAG "Doc_G3: chip id=%x\n",chipId); + if(chipId != DoC_G3_ID) return -1; + + + printk(LOG_TAG "Starting flash stuff\n"); + + WriteDOC(g3->physaddr+DoC_G3_ChipID,g3->virtaddr,DoC_G3_DeviceIdSelect); + WriteDOC(0x39,g3->virtaddr,DoC_G3_FlashCtrl); + + printk(LOG_TAG "end\n"); + return 0; +} + +static void __exit cleanup_docg3(void) +{ + cdev_del(&g3->cdev); + unregister_chrdev_region(MKDEV(DOCG3_MAJOR,DOCG3_MINOR),1); +} + +module_init(init_docg3); +module_exit(cleanup_docg3); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Thomas Cougnard "); +MODULE_DESCRIPTION("Test modules for Diskonchip G3 device description\n"); diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_pm.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_pm.c new file mode 100755 index 00000000..1545ab23 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_pm.c @@ -0,0 +1,77 @@ +/* + * + * Copyright (C) 2010 Angell Fear + * Based on MyPal 716 power management support for the original HTC IPL in DoC G3 + * + * Use consistent with the GNU GPL is permitted, provided that this + * copyright notice is preserved in its entirety in all copies and + * derived works. + * + * Copyright (C) 2005 Pawel Kolodziejski + * + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#ifdef CONFIG_PM + +static u32 *addr_a0040000; +static u32 *addr_a0040004; +static u32 *addr_a0040008; +static u32 *addr_a004000c; + +#if 0 +static u32 save_a0040000; +static u32 save_a0040004; +static u32 save_a0040008; +static u32 save_a004000c; + +static void g900_suspend(suspend_state_t state) +{ + save_a0040000 = *addr_a0040000; + save_a0040004 = *addr_a0040004; + save_a0040008 = *addr_a0040008; + save_a004000c = *addr_a004000c; + + /* jump to PSPR */ + *addr_a0040000 = 0xe3a00101; // mov r0, #0x40000000 + *addr_a0040004 = 0xe380060f; // orr r0, r0, #0x0f000000 + *addr_a0040008 = 0xe3800008; // orr r0, r0, #8 + *addr_a004000c = 0xe590f000; // ldr pc, [r0] +} + +static void g900_pm_resume(void) +{ + *addr_a0040000 = save_a0040000; + *addr_a0040004 = save_a0040004; + *addr_a0040008 = save_a0040008; + *addr_a004000c = save_a004000c; +} + +#endif + +static struct platform_suspend_ops g900_pm_ops = { + .prepare = pxa_pm_prepare, + .finish = pxa_pm_finish, + .enter = pxa_pm_enter, + .valid = suspend_valid_only_mem, +}; + + +void g900_pm_init(void) { + addr_a0040000 = phys_to_virt(0xa0040000); + addr_a0040004 = phys_to_virt(0xa0040004); + addr_a0040008 = phys_to_virt(0xa0040008); + addr_a004000c = phys_to_virt(0xa004000c); + suspend_set_ops(&g900_pm_ops); +} +#endif /* CONFIG_PM */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_udc.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_udc.c new file mode 100755 index 00000000..cde27c97 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/g900_udc.c @@ -0,0 +1,260 @@ +#include +#include +#include +#include + + +#include +#include +#include +#include +#include +#include +#include + +#include + +static int g900_udc_is_connected(void) +{ + printk("g900_udc_is_connected = %d\n", gpio_get_value(GPIO40_nUSB_DETECT)); + return (gpio_get_value(GPIO40_nUSB_DETECT) != 0); +} + +static void g900_udc_command(int command) +{ + printk("g900_udc_command enter, command = %d\n", command); + switch (command) + { + case PXA2XX_UDC_CMD_DISCONNECT: + break; + case PXA2XX_UDC_CMD_CONNECT: + break; + default: + printk("%s: unknown command '%d'.", __FUNCTION__, command); + } +} +#if 0 +struct gpio_vbus_mach_info gpio_vbus_data = { + .gpio_vbus = GPIO40_nUSB_DETECT, + .gpio_vbus_inverted = 1, + .gpio_pullup = -1, +}; +#endif + +static struct pxa2xx_udc_mach_info g900_udc_info = { +// .udc_is_connected = g900_udc_is_connected, + .gpio_vbus = GPIO40_nUSB_DETECT, +// .gpio_vbus = GPIO41_USB_P2_7, +// .gpio_pullup = GPIO93_USB_ENABLE, + .gpio_pullup = GPIO75_USB_ENABLE, +// .udc_command = g900_udc_command, +}; + + + + + + +//################################ + +#ifdef CONFIG_USB_ANDROID +#include + +static char *usb_functions_ums[] = { + "usb_mass_storage", +}; + +static char *usb_functions_ums_adb[] = { + "usb_mass_storage", + "adb", +}; + +static char *usb_functions_rndis[] = { + "rndis", +}; + +static char *usb_functions_rndis_adb[] = { + "rndis", + "adb", +}; + +#ifdef CONFIG_USB_ANDROID_DIAG +static char *usb_functions_adb_diag[] = { + "usb_mass_storage", + "adb", + "diag", +}; +#endif + +static char *usb_functions_all[] = { +#ifdef CONFIG_USB_ANDROID_RNDIS + "rndis", +#endif +#ifdef CONFIG_USB_ANDROID_MASS_STORAGE + "usb_mass_storage", +#endif +#ifdef CONFIG_USB_ANDROID_ADB + "adb", +#endif +#ifdef CONFIG_USB_ANDROID_ACM + "acm", +#endif +#ifdef CONFIG_USB_ANDROID_DIAG + "diag", +#endif +}; + +static struct android_usb_product usb_products[] = { + { + .product_id = 0x4e11, + .num_functions = ARRAY_SIZE(usb_functions_ums), + .functions = usb_functions_ums, + }, + { + .product_id = 0x4e12, + .num_functions = ARRAY_SIZE(usb_functions_ums_adb), + .functions = usb_functions_ums_adb, + }, + { + .product_id = 0x4e13, + .num_functions = ARRAY_SIZE(usb_functions_rndis), + .functions = usb_functions_rndis, + }, + { + .product_id = 0x4e14, + .num_functions = ARRAY_SIZE(usb_functions_rndis_adb), + .functions = usb_functions_rndis_adb, + }, +#ifdef CONFIG_USB_ANDROID_DIAG + { + .product_id = 0x4e17, + .num_functions = ARRAY_SIZE(usb_functions_adb_diag), + .functions = usb_functions_adb_diag, + }, +#endif +}; + +static struct usb_mass_storage_platform_data mass_storage_pdata = { + .nluns = 1, + .vendor = "Google, Inc.", + .product = "Nexus One", + .release = 0x0100, +}; + +static struct platform_device usb_mass_storage_device = { + .name = "usb_mass_storage", + .id = -1, + .dev = { + .platform_data = &mass_storage_pdata, + }, +}; + +#ifdef CONFIG_USB_ANDROID_RNDIS +static struct usb_ether_platform_data rndis_pdata = { + /* ethaddr is filled by board_serialno_setup */ + .vendorID = 0x18d1, + .vendorDescr = "Google, Inc.", +}; + +static struct platform_device rndis_device = { + .name = "rndis", + .id = -1, + .dev = { + .platform_data = &rndis_pdata, + }, +}; +#endif + +static struct android_usb_platform_data android_usb_pdata = { + .vendor_id = 0x18d1, + .product_id = 0x4e11, + .version = 0x0100, + .product_name = "Nexus One", + .manufacturer_name = "Google, Inc.", + .num_products = ARRAY_SIZE(usb_products), + .products = usb_products, + .num_functions = ARRAY_SIZE(usb_functions_all), + .functions = usb_functions_all, +}; + +static struct platform_device android_usb_device = { + .name = "android_usb", + .id = -1, + .dev = { + .platform_data = &android_usb_pdata, + }, +}; + + +static struct platform_device *g900_udc_devices[] __initdata = { +#ifdef CONFIG_USB_ANDROID_MASS_STORAGE + &usb_mass_storage_device, +#endif +#ifdef CONFIG_USB_ANDROID_RNDIS + &rndis_device, +#endif + &android_usb_device, +}; + +void __init add_usb_devices(void) +{ + + platform_add_devices(g900_udc_devices,ARRAY_SIZE(g900_udc_devices)); + +} + + + + + +#endif + +//############################# + + + + +static int g900_udc_probe(struct platform_device *pdev) +{ + printk("******Probing Toshiba g900 UDC*****\n"); + pxa_set_udc_info(&g900_udc_info); + return 0; +} + +static int g900_udc_remove(struct platform_device *pdev) +{ + return 0; +} + +static struct platform_driver g900_udc_driver = { + .driver = { + .name = "g900-udc", + }, + .probe = g900_udc_probe, + .remove = g900_udc_remove, + //.suspend = g900_udc_suspend, + //.resume = g900_udc_resume, +}; + +static int __init g900_udc_init(void) +{ + if (!machine_is_g900()) return -ENODEV; + platform_driver_register(&g900_udc_driver); +#ifdef CONFIG_USB_ANDROID + add_usb_devices(); +#endif + return 0; + +} + +static void __exit g900_udc_exit(void) +{ + return; +} + +module_init(g900_udc_init); +module_exit(g900_udc_exit); + +MODULE_AUTHOR("Xiao Huang BDevGetProperty( BDevHandle, pBDevProp ) + +/** Initializes the SD device and run-time support structure. + @param BDevHandle (#GFBDevHandle) Handle to the Block Device API + @param pDrvInfo (#GFDRV_INFO) run-time support struct + + This creates and assigns a #GFDRV_INFO into + the given BDevHandle (actually a #BDEVSDTABLE). + Read and Write functions are assinged into the #GFDRV_INFO which + should be used by higher-level file systems to access the SD + device. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +#define GFBDevMount( BDevHandle, pDrvInfo ) \ + ((PGFBDEVTABLE)BDevHandle)->BDevMount( BDevHandle, pDrvInfo ) + +/** Uninitializes the SD device. + @param BDevHandle (#GFBDevHandle) Handle to the Block Device API + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +#define GFBDevUnmount( BDevHandle ) \ + ((PGFBDEVTABLE)BDevHandle)->BDevUnmount( BDevHandle ) + +/*@}*/ +/*@}*/ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* GF_BDEV_H */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFBitmap.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFBitmap.h new file mode 100755 index 00000000..22286e00 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFBitmap.h @@ -0,0 +1,45 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFBitmap.h + * GFSDK Bitmap header file. + */ + + +#ifndef __GFBITMAP_H__ +#define __GFBITMAP_H__ + +/* Bitmap Color Format - Follow Surface Format GF_SURFACE_xxx */ +#define GF_BITMAP_YUV420 0x00000001 +#define GF_BITMAP_YUV422 0x00000002 +#define GF_BITMAP_YUYV (GF_BITMAP_YUV422|0x00000004) +#define GF_BITMAP_YVYU (GF_BITMAP_YUV422|0x00000008) +#define GF_BITMAP_UYVY (GF_BITMAP_YUV422|0x00000010) +#define GF_BITMAP_VYUY (GF_BITMAP_YUV422|0x00000020) +#define GF_BITMAP_MPEGDEC (GF_BITMAP_YUV420|0x00000040) +#define GF_BITMAP_RGB565 0x00010000 +#define GF_BITMAP_RGB8 0x00070000 +#define GF_BITMAP_ARGB8888 0x00030000 +#define GF_BITMAP_ARGB6666 0x000F0000 + +/* Bitmap */ +typedef struct _GFBITMAP +{ + NvU16 width; + NvU16 height; + NvS32 stride; + NvU32 format; + NvU8 bpp; // Bits per pixel + NvU8 reserved; + NvU16 offset; // Offset from beginning of bitmap to data + NvU8 data; // Real data starts from "Offset" location +} GFBITMAP, *PGFBITMAP; + +#endif /* __GFBITMAP_H__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFCamera.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFCamera.h new file mode 100755 index 00000000..f7730b5a --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFCamera.h @@ -0,0 +1,367 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFCamera.h + GFSDK Camera API header file. +*/ + +#ifndef __CAMERA_H__ +#define __CAMERA_H__ + +#include "GF.h" +#include "GFVx.h" +#include "GFCameraScr.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupCamera CameraAPI Camera API +

        +
      • @ref pageCameraAppNotes +
          +
        • @ref pageCameraAppNotes1 +
        +
      +*/ +/*@{*/ + + +/* Helper Macros - Do not assume bytes are properly aligned! */ +#ifndef MAKENvU8S16 +#define MAKENvU8S16( data16 ) \ + (NvU8)((data16) & 0xFF), (NvU8)(((data16) >> 8) & 0xFF) +#endif /* MAKENvU8S16 */ +#ifndef MAKENvU8S32 +#define MAKENvU8S32( data32 ) \ + (NvU8)((data32) & 0xFF), \ + (NvU8)(((data32) >> 8) & 0xFF), \ + (NvU8)(((data32) >> 16) & 0xFF), \ + (NvU8)(((data32) >> 24) & 0xFF) +#endif /* MAKENvU8S32 */ +#ifndef MAKE16 +#define MAKE16( ptr ) \ + ((NvU16)(*ptr) | ((NvU16)(*(ptr+1)) << 8)) +#endif /* MAKE16 */ +#ifndef MAKE32 +#define MAKE32( ptr ) \ + ((NvU32)MAKE16( ptr ) | (NvU32)MAKE16( (ptr+2) ) << 16) +#endif /* MAKE32 */ + +/* GFCAMERA instruction (special) */ +#define GFCAMERA_NONE 0x00 +#define GFCAMERA_NORMAL_WRITE 0x01 +#define GFCAMERA_DELAY_MSEC 0x02 +#define GFCAMERA_NEED_MCLOCK 0x03 + +/* GFCameraSetResolution Options */ +#define GFCAMERA_POWERON_OPTION 0x00000001 + +/* GFCAMERA Error codes */ +#define GFCAM_ERROR_ILLEGAL_PARAMETER (GFCAM_ERROR | 0x00000001L) +#define GFCAM_ERROR_ALLOC_FAILED (GFCAM_ERROR | 0x00000002L) +#define GFCAM_ERROR_VM_ALLOC_FAILED (GFCAM_ERROR | 0x00000003L) +#define GFCAM_ERROR_SCRIPT_ACCESS_FAILED (GFCAM_ERROR | 0x00000004L) +#define GFCAM_ERROR_NATIVE_FUNCTION_FAILED (GFCAM_ERROR | 0x00000005L) +#define GFCAM_ERROR_GETTING_COMPONENT (GFCAM_ERROR | 0x00000006L) +#define GFCAM_ERROR_VM_BUFFER_ALLOC_FAILED (GFCAM_ERROR | 0x00000007L) +#define GFCAM_ERROR_CAMERA_SCRIPT_NOT_PRESENT (GFCAM_ERROR | 0x00000008L) +#define GFCAM_ERROR_FUNCTION_NOT_SUPPORTED (GFCAM_ERROR | 0x00000009L) + +/* GFCAMERAINSTRTYPE */ +typedef struct _GFCAMERAINSTRTYPE +{ + NvU16 skip; // IMPORTANT: Multiple instructions + // must be in ascending skip order + NvU8 type; + NvU16 size; + NvU32 data; +} GFCAMERAINSTRTYPE, *PGFCAMERAINSTRTYPE; + +/* GFCAMERABAYERINFO - BayerInfo struct */ +typedef struct _GFCAMERABAYERINFO +{ + NvU16 ScanWidth; + NvU16 ScanHeight; + + NvU16 ActiveLineStart; + NvU16 ActiveLineWidth; + NvU16 ActiveFrameStart; + NvU16 ActiveFrameHeight; + NvU8 hSyncEdge; + NvU8 vSyncEdge; + NvU16 bayerSel; + +} GFCAMERABAYERINFO, *PGFCAMERABAYERINFO; + +/* GFCAMERARESOLUTIONTYPE - Resolution struct */ +typedef struct _GFCAMERARESOLUTIONTYPE +{ + NvU16 x; + NvU16 y; + NvU8 numInstr; + GFCAMERAINSTRTYPE *pInstr; + GFCAMERABAYERINFO *pBayerInfo; +} GFCAMERARESOLUTIONTYPE, *PGFCAMERARESOLUTIONTYPE; + + + +/* GFCAMERATABLETYPE - Camera Table */ +#define GFCAMERA_NAME_SIZE 32 +typedef struct _GFCAMERATABLETYPE +{ + NvU16 id; + NvU16 ver; + NvU32 scriptSubID; + char name[GFCAMERA_NAME_SIZE]; + // variable name char string always + // ends with a '0' + NvU32 VIPFlag; + NvU32 VIPNewTiming; + NvU32 VIPColorFormat; + NvU8 VIPHOffset; + NvU8 VIPVOffset; + NvU8 numI2CBytes; //bytes per transfer/packet + NvU8 numRes; + GFCAMERARESOLUTIONTYPE *pResData; + NvU16 initDataSize; + NvU8 *pInitData; +// GFCAMERABAYERINFO *pBayerInfo; + struct _GFCAMERATABLETYPE *pNext; +} GFCAMERATABLETYPE, *PGFCAMERATABLETYPE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFCameraOpen(GFRmHandle hRm, GFCameraHandle *phCamera, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFCameraClose(GFCameraHandle *phCamera); + +/** This routine returns the camera's properties and capabilities. + These properties are returned in the GFPROPERTY structure. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param pProp (PGFPROPERTY) Pointer to GFPROPERTY structure. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see GFPROPERTY +*/ +GF_RETTYPE GFCameraGetProperty(GFCameraHandle CameraHandle, + PGFPROPERTY pProp); + +/** This routine programs the camera's registers based on the data + contained in the camera table. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param resX (NvU16) Horizontal resolution + @param resY (NvU16) Vertical resolution + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see PGFCAMERATABLETYPE +*/ +GF_RETTYPE GFCameraSetup(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + NvU16 resX, + NvU16 resY ); + +/** This routine programs the camera's registers for a resolution change. + The main difference from GFCameraSetup() is the lack of camera power on. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param resX (NvU16) Horizontal resolution + @param resY (NvU16) Vertical resolution + @param poweron (NvU32) flag indicates whether camera power on should be executed + @param option (NvU32) flag passed to camera script SetResolution function + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see PGFCAMERATABLETYPE +*/ +GF_RETTYPE GFCameraSetResolution(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + NvU16 resX, + NvU16 resY, + NvU32 poweron, + NvU32 option); + +/** This routine allocates the run-time camera table structure from the + camera scripts. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pTable (NvU8) Pointer to camera configuration table, ignored for GFSDK SC15. + Camera configurations are passed via scripts. + @param *ppCamera (PGFCAMERATABLETYPE) Returns pointer to linked list of camera description tables + + @return On success the number of cameras in the linked list is returned. This can be 0. + On failure an error code is returned. To distinguish between success and failure, + use macro #ISGFERROR() or #ISGFSUCCESS(). + + @see PGFCAMERATABLETYPE +*/ +GF_RETTYPE GFCameraTableAlloc(GFCameraHandle CameraHandle, + NvU8 *pTable, + PGFCAMERATABLETYPE *ppCamera); + +/** This routine frees the camera table structure created by + GFCameraTableAlloc(). + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *ppCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see PGFCAMERATABLETYPE +*/ +GF_RETTYPE GFCameraTableFree(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE *ppCamera); + +GF_RETTYPE GFCameraTableDump(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera); + +/** This routine finds a camera that is contained in the camera table structure. + It does so using various parameters that refer to entries in the table. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param *pWanted (PGFCAMERATABLETYPE) Pointer to the found PGFCAMERATABLETYPE structure. + @param id (NvU32) Unique I2C slave ID for the camera. + @param *name (Char) pointer to name. + @param resX (NvU16) Horizontal resolution + @param resY (NvU16) Vertical resolution + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFCameraFind(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + PGFCAMERATABLETYPE *pWanted, + NvU32 id, + char *name, + NvU16 resX, + NvU16 resY ); + +/** This routine scans for a camera that is contained in the + table structure created by GFCameraTableAlloc(). + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pTable (NvU8) Pointer to camera table. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFCameraScan(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera); + +/** This routine uses the script subID parameter to find a camera + that is contained in the camera table structure. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param *pWanted (PGFCAMERATABLETYPE) Pointer to the found PGFCAMERATABLETYPE structure. + @param subID (NvU32) Camera script subID. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFCameraScriptFind(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + PGFCAMERATABLETYPE *pWanted, + NvU32 subID); + +/** This routine calls the camera script function to operate on a user defined + camera attribute. A shared buffer is used to pass parameters to and from + the camera script function. + + The shared buffer and may contain data used by the script function + to perform the requested operation. The first data should indicate + the primary setting of the operation. The convention is to use ranges + that are normalized from 0 to 100. Where specific data is required, + that data must match that which is allowable by the camera in use. + If not, the error code GFCAM_ERROR_ILLEGAL_PARAMETER is returned. + + The attribute may be one of the defined flags listed below. + GFCAMERA_CAMERACONTROL_PAN + GFCAMERA_CAMERACONTROL_TILT + GFCAMERA_CAMERACONTROL_ROLL + GFCAMERA_CAMERACONTROL_ZOOM + GFCAMERA_CAMERACONTROL_EXPOSURE + GFCAMERA_CAMERACONTROL_IRIS + GFCAMERA_CAMERACONTROL_FOCUS + GFCAMERA_CAMERACONTROL_FLASH + GFCAMERA_VIDEOPROCAMP_BRIGHTNESS + GFCAMERA_VIDEOPROCAMP_CONTRAST + GFCAMERA_VIDEOPROCAMP_HUE + GFCAMERA_VIDEOPROCAMP_SATURATION + GFCAMERA_VIDEOPROCAMP_SHARPNESS + GFCAMERA_VIDEOPROCAMP_GAMMA + GFCAMERA_VIDEOPROCAMP_COLORENABLE + GFCAMERA_VIDEOPROCAMP_WHITEBALANCE + GFCAMERA_VIDEOPROCAMP_BACKLIGHT_COMPENSATION + GFCAMERA_VIDEOPROCAMP_GAIN + + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param attribute (NvU32) Attribute flag indicates operation. + @param *sharedBuffer (NvU32) pointer to a shared buffer. + @param bufferSize (NvU32) Size of shared buffer. + @param *readValue (NvU32) pointer to the returned value from the camera script function. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GFCAM_ERROR_FUNCTION_NOT_SUPPORTED Attribute not supported + @retval #GFCAM_ERROR_ILLEGAL_PARAMETER Parameter out of range + +*/ +GF_RETTYPE GFCameraScriptSetAttribute(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + NvU32 attribute, + NvU32 *sharedBuffer, + NvU32 bufferSize, + NvU32 *readValue); + +/** This routine uses the camera script function to execute a powerup or + powerdown sequence. + + @param CameraHandle (#GFCameraHandle) Handle to CameraAPI + @param *pCamera (PGFCAMERATABLETYPE) Pointer to camera entry. + @param poweron (NvU32) If set to '0' execute powerdown, if '1', execute powerup. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFCameraPower(GFCameraHandle CameraHandle, + PGFCAMERATABLETYPE pCamera, + NvU32 poweron); + +/*@}*/ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/** @page pageCameraAppNotes CameraAPI Application Notes + + @section pageCameraAppNotes1 Todo + +*/ + +#endif /* __CAMERA_H__ */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFCameraScr.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFCameraScr.h new file mode 100755 index 00000000..b34eb21b --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFCameraScr.h @@ -0,0 +1,40 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#if !defined (__GFCAMERASCR_INC__) +#define __GFCAMERASCR_INC__ + +/* Camera Script error codes */ +#define GFCAMERA_NOT_SUPPORTED 0x80000000 //return error code for attribute +#define GFCAMERA_PARAMETER_ERROR 0x80000001 //return out of range parameter + +/** Camera script attribute flags, for camera control functions + @see GFCameraScriptSetAttribute() +*/ +#define GFCAMERA_CAMERACONTROL_PAN 0x00000001 +#define GFCAMERA_CAMERACONTROL_TILT 0x00000002 +#define GFCAMERA_CAMERACONTROL_ROLL 0x00000003 +#define GFCAMERA_CAMERACONTROL_ZOOM 0x00000004 +#define GFCAMERA_CAMERACONTROL_EXPOSURE 0x00000005 +#define GFCAMERA_CAMERACONTROL_IRIS 0x00000006 +#define GFCAMERA_CAMERACONTROL_FOCUS 0x00000007 +#define GFCAMERA_CAMERACONTROL_FLASH 0x00000008 +#define GFCAMERA_VIDEOPROCAMP_BRIGHTNESS 0x00000009 +#define GFCAMERA_VIDEOPROCAMP_CONTRAST 0x0000000a +#define GFCAMERA_VIDEOPROCAMP_HUE 0x0000000b +#define GFCAMERA_VIDEOPROCAMP_SATURATION 0x0000000c +#define GFCAMERA_VIDEOPROCAMP_SHARPNESS 0x0000000d +#define GFCAMERA_VIDEOPROCAMP_GAMMA 0x0000000e +#define GFCAMERA_VIDEOPROCAMP_COLORENABLE 0x0000000f +#define GFCAMERA_VIDEOPROCAMP_WHITEBALANCE 0x00000010 +#define GFCAMERA_VIDEOPROCAMP_BACKLIGHT_COMPENSATION 0x00000011 +#define GFCAMERA_VIDEOPROCAMP_GAIN 0x00000012 + +#endif + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDef.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDef.h new file mode 100755 index 00000000..c7a9df55 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDef.h @@ -0,0 +1,254 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFDef.h + * GFSDK Definition header file + */ + +#ifndef __GFDEF_H__ +#define __GFDEF_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#include "GFDefScr.h" + +/* Register field manipulation using xxx_RANGE macros defined in hardware + * header files. + */ +#define GF_LOWBIT(x) (0?x) +#define GF_HIGHBIT(x) (1?x) +#define GF_SIZE(x) (GF_HIGHBIT(x)-GF_LOWBIT(x)+1) +#define GF_SHIFT(x) ((0?x)%32) +#define GF_MASK(x) (0xFFFFFFFFUL>>(31-((1?x)%32)+((0?x)%32))) +#define GF_BITS(val, x) (((val) & GF_MASK(x))<> GF_SHIFT(d##_##r##_0_##f##_RANGE))& GF_MASK(d##_##r##_0_##f##_RANGE)) + +#define GF_FLD_SET_DRF_NUM(d,r,f,n,v) ((v & ~GF_SHIFTMASK(d##_##r##_0_##f##_RANGE)) | GF_DRF_NUM(d,r,f,n)) +#define GF_FLD_SET_DRF_DEF(d,r,f,c,v) (((v) & ~GF_SHIFTMASK(d##_##r##_0_##f##_RANGE)) | GF_DRF_DEF(d,r,f,c)) + +#define GF_RESETVAL(d,r) (d##_##r##_0_RESET_VAL) + +#define OP_DRF_DEF(o,f,c) ((o##_##f##_##c) << GF_SHIFT(o##_##f##_RANGE)) +#define OP_DRF_NUM(o,f,n) (((n)& GF_MASK(o##_##f##_RANGE))<< GF_SHIFT(o##_##f##_RANGE)) +#define OP_DRF_VAL(o,f,v) (((v)>> GF_SHIFT(o##_##f##_RANGE))& GF_MASK(o##_##f##_RANGE)) + +#define OP_FLD_SET_DRF_NUM(o,f,n,v) ((v & ~GF_SHIFTMASK(o##_##f##_RANGE)) | GF_DRF_NUM(o,f,n)) +#define OP_FLD_SET_DRF_DEF(o,f,c,v) (((v) & ~GF_SHIFTMASK(o##_##f##_RANGE)) | GF_DRF_DEF(o,f,c)) + +/* Default Return Codes */ +/* - All errors has MSB set, indicate a negative val. */ + +/** Macro to test if an error code of type GF_RETTYPE signals failure. + @param code (GF_RETTYPE) Error code + @return Evaluates to \a true on failure, \a false on success. +*/ +#define ISGFERROR(code) ((GF_RETTYPE)(code) < GF_SUCCESS) + +/** Macro to test if an error code of type GF_RETTYPE signals success. + @param code (GF_RETTYPE) Error code + @return Evaluates to \a true on success, \a false on failure. +*/ +#define ISGFSUCCESS(code) ((GF_RETTYPE)(code) >= GF_SUCCESS) + +/** Common error code: Generic error. */ +#define GF_ERROR 0x80000000L +/** Common error code: Success (not an error). */ +#define GF_SUCCESS 0x00000000L +/** Common error code: Busy (not an error). */ +#define GF_ERROR_BUSY 0x80000001L +/** Common error code: Out of memory. This can be CPU heap memory, or GPU memory. */ +#define GF_ERROR_OUT_MEMORY 0x80000003L +/** Common error code: Bad parameter. */ +#define GF_ERROR_BAD_PARAMETER 0x80000005L + + +#define GF_COMPONENT_ERROR_SHIFT 24 +/** Macro to reverse bits of the 7 bit component ID. + See GF_RETTYPE for explanation. +*/ +#define GF_COMPONENT_REVERSE(c) ((((c)&64)>>6)|(((c)&32)>>4)|(((c)&16)>>2)|((c)&8)|(((c)&4)<<2)|(((c)&2)<<4)|(((c)&1)<<6)) + +#define GX_ERROR (GF_COMPONENT_REVERSE(GF_GXAPI)< + +/** Utility macro */ +#define CHECK_STATUS_CLEANUP(f) \ + do { \ + if(ISGFERROR( ( status = (f) ) )) \ + goto Cleanup; \ + } while(0) + + + +#if !defined(NV_MODS) + +#ifdef __cplusplus +extern "C" +{ +#endif + +/* + * READ THIS FIRST: + * + * None of these funtions should be called directly by an application. The + * macros below should be used instead. + */ + +/** Diag context structure */ +typedef struct _GFDIAGCONTEXT +{ + NvU32 processID; + NvU32 threadID; +} GFDIAGCONTEXT, *PGFDIAGCONTEXT; + + +/** Public exposed DIAG API functions in the table */ +typedef struct _GFDIAGTABLE +{ + /** + @see GF_DIAG_INITIALIZE + */ + GF_RETTYPE ( *DiagInitialize)( GFDiagHandle DiagHandle, int argc, char **argv ); + + /** + @see GF_DIAG_GET_VERSION + */ + GF_RETTYPE ( *DiagGetVersion)( GFDiagHandle DiagHandle, char *versionStr, int bufferLen ); + + /** + @see GF_DIAG_SET_RENDER_SURFACE + */ + GF_RETTYPE ( *DiagSetRenderSurface)( GFDiagHandle DiagHandle, PGFRMSURFACE surface ); + + /** + @see GF_DIAG_SET_IDLE_CHIP_CALLBACK + */ + GF_RETTYPE ( *DiagSetIdleChipCallback)( GFDiagHandle DiagHandle, + GF_RETTYPE (*pIdleCallback)(void *idleCallbackData), void *data ); + + /** + @see GF_DIAG_FRAME_DONE + */ + GF_RETTYPE ( *DiagFrameDone)( GFDiagHandle DiagHandle ); + + /** + @see GF_DIAG_CLEANUP + */ + GF_RETTYPE ( *DiagCleanup)( GFDiagHandle DiagHandle ); + + /** + @see GF_DIAG_RUN_TEST + */ + GF_RETTYPE (* DiagRunTest)( GFDiagHandle DiagHandle, char *testName, + const char *pCmdLine, NvU8 flag, GFDiagHandle *pDiagChildHandle ); + + /** + @see GF_DIAG_WAIT_FOR_TEST + */ + GF_RETTYPE (* DiagWaitForTest)( GFDiagHandle DiagHandle ); + + /** + @see GF_DIAG_PRINT + */ + GF_RETTYPE (* DiagPrint)( GFDiagHandle DiagHandle, const char *msg ); + + /** + @see GF_DIAG_GET_CONTEXT + */ + GF_RETTYPE (* DiagGetContext)( GFDiagHandle DiagHandle, GFDIAGCONTEXT *pContext ); +} GFDIAGTABLE, *PGFDIAGTABLE; + +/* +***************************************************************************** +* MACROS - Apps should use these to communicate with GFDiag +***************************************************************************** +*/ + +// Function documentation goes here to bypass #ifdef problems + +/** @name Functions +@{*/ + +/** @def GF_DIAG_MAIN + Replace your standard definition of "int main" with with this macro + for use with GFDiag. + + @param unused1 (int) Unused -- obsolete argument, to be removed + @param unused2 (char**) Unused -- obsolete argument, to be removed + @param testName (char*) Name of the test + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_INITIALIZE + Control things like storing vs checking, HW vs SW crcs via this function. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param argc (int) Argument count + @param argv (char**) Argument data + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Will read in the stored CRCs if applicable. +*/ + +/** @def GF_DIAG_GET_VERSION + Query the GFDiag version. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param str (char*) Pointer to a buffer that will be filled with the GFDiag version + @param len (int) Length of the buffer, versionStr + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The application allocates a buffer and passes it + (along with its length) to GFDiag. +*/ + +/** @def GF_DIAG_SET_IDLE_CHIP_CALLBACK +Allow the test to idle the chip in its own way. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param callbackFn (GF_RETTYPE (void *idleCallbackData)) Function pointer to call on idle + @param callbackData (void*) Data to pass to pIdleCallback when it is called + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_SET_RENDER_SURFACE + Tell GFDiag what surface we want to CRC etc. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param surface (#PGFRMSURFACE) Surface we want to CRC + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_FRAME_DONE + Announce the completion of a frame. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFDiag has the option to: + + Calculate a CRC on the primary surface. This function calls the callback + function set by GFDiagSetIdleChipCallback (or a default if no idle chip + callback is supplied) to idle the chip before calculating CRCs + + In "storing mode" this will store the CRC in some DB that gets written + to file later. + + In "checking mode" this checks the CRC against the one we read in from file. +*/ + +/** @def GF_DIAG_CLEANUP + Perform any necessary cleanup operations before the test exits and write + CRCs to file if applicable. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_PRINT + Prints to GFDiag. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param x (const char*) Message to print + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_RUN_TEST +Starts a test executing. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param testName (char*) Name of the test to execute + @param pCmdLine (const char*) The command line to execute the test + @param flag (NvU8) This is an option specifying how the test should be run. May contain one of: GF_DIAG_RUN_NEW_PROCESS, GF_DIAG_RUN_NEW_THREAD or GF_DIAG_RUN_NORMAL + @param pDiagChildHandle (#GFDiagHandle) This is a pointer to a GFDiagHandle that will be filled in with the handle of the child process + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_WAIT_FOR_TEST + Waits for test to complete, return value will be result of test. + + @param DiagHandle (#GFDiagHandle) Handle to Diag of test to run (probably the handle placed in pDiagChildHandle from GF_DAIG_RUN_TEST) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see GF_DIAG_RUN_TEST +*/ + +/** @def GF_DIAG_GET_CONTEXT +Gets context from GFDiag. + + @param DiagHandle (#GFDiagHandle) Handle to Diag + @param pContext (#GFDIAGCONTEXT) Points to a structure that will be filled with the current context + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ + +/** @def GF_DIAG_PRINTF + Format prints a message. + + @param x (bracketed printf string) Message to print +*/ + +/*@}*/ + +/* Run flags */ + +/** Test is run in same thread */ +#define GF_DIAG_RUN_NORMAL 1 +#define GF_DIAG_RUN_NEW_THREAD 2 +#define GF_DIAG_RUN_NEW_PROCESS 4 + + +/** @def GF_DIAG_CRC_STATUS + Helper macro to check the status of a call to GF_DIAG_FRAME_DONE + and increment a fail count if the status was a failure. + + eg: + @code GF_DIAG_CRC_STATUS(GF_DIAG_FRAME_DONE("DxTest"), GF_Diag_CrcFailCount); + @endcode + + @param status The status of a call to GF_DIAG_FRAME_DONE + @param gf_diag_crcFailCount The var containing the current failure count + + @see GF_DIAG_FRAME_DONE +*/ +#define GF_DIAG_CRC_STATUS(status, gf_diag_crcFailCount) + +#ifdef GF_DIAG_ENABLED + +/* + * See doxygen comments above for info on the following macros + */ +#define GF_DIAG_MAIN(unused1, unused2, testName) \ + int TestMain(int argc, char *argv[], GFDiagHandle handle) + +#define GF_DIAG_INITIALIZE(handle, argc, argv) \ + ((PGFDIAGTABLE)handle)->DiagInitialize((handle), (argc), (argv)) + +#define GF_DIAG_GET_VERSION(handle, str, len) \ + ((PGFDIAGTABLE)handle)->DiagGetVersion((handle), (str), (len)) + +#define GF_DIAG_SET_IDLE_CHIP_CALLBACK(handle, callbackFn, callbackData) \ + ((PGFDIAGTABLE)handle)->DiagSetIdleChipCallback(handle, callbackFn, callbackData) + +#define GF_DIAG_SET_RENDER_SURFACE(handle, surface) \ + ((PGFDIAGTABLE)handle)->DiagSetRenderSurface((handle), (surface)) + +#define GF_DIAG_FRAME_DONE(handle) \ + ((PGFDIAGTABLE)handle)->DiagFrameDone((handle)) + +#define GF_DIAG_CLEANUP(handle) \ + ((PGFDIAGTABLE)handle)->DiagCleanup((handle)) + +#define GF_DIAG_PRINT(handle, x) \ + ((PGFDIAGTABLE)handle)->DiagPrint(handle, x) + +#define GF_DIAG_RUN_TEST(handle, testName, pCmdLine, flag, pDiagChildHandle) \ + ((PGFDIAGTABLE)handle)->DiagRunTest(handle, testName, pCmdLine, flag, pDiagChildHandle) + +#define GF_DIAG_WAIT_FOR_TEST(handle) \ + ((PGFDIAGTABLE)handle)->DiagWaitForTest(handle) + +#define GF_DIAG_GET_CONTEXT(handle, pContext) \ + ((PGFDIAGTABLE)handle)->DiagGetContext(handle, pContext) + + +static void +GFDiagPrintf( GFDiagHandle handle, const char *fmt, ... ) +{ + char buf[1024]; + va_list list; + + va_start(list, fmt); + + GFSprintfVAL(buf, fmt, list); + + GF_DIAG_PRINT(handle, buf); + + va_end(list); +} + +#define GF_DIAG_PRINTF(x) GFDiagPrintf x + +#else + +/* + * Do this exactly like nvplat...so this will have an OS specific + * implementation in the final GFDiag.h + */ +#if NVOS_IS_LINUX || NVOS_IS_WINDOWS +#define GF_DIAG_MAIN(unused1, unused2, testName) \ + int TestMain(int argc, char *argv[]) +#define GF_DIAG_MAIN_DEFAULT_1ARG(unused1, unused2, testName, arg1) \ + int TestMain(int argc, char *argv[]) +#define GF_DIAG_MAIN_DEFAULT_2ARGS(unused1, unused2, testName, arg1, arg2) \ + int TestMain(int argc, char *argv[]) +#define GF_DIAG_MAIN_DEFAULT_3ARGS(unused1, unused2, testName, arg1, arg2, arg3) \ + int TestMain(int argc, char *argv[]) +#else +#define GF_DIAG_MAIN(unused1, unused2, testName) \ + int argc = 1; \ + char *argv[] = { #testName }; \ + int main() +#define GF_DIAG_MAIN_DEFAULT_1ARG(unused1, unused2, testName, arg1) \ + int argc = 2; \ + char *argv[] = { #testName, arg1 }; \ + int main() +#define GF_DIAG_MAIN_DEFAULT_2ARGS(unused1, unused2, testName, arg1, arg2) \ + int argc = 3; \ + char *argv[] = { #testName, arg1, arg2 }; \ + int main() +#define GF_DIAG_MAIN_DEFAULT_3ARGS(unused1, unused2, testName, arg1, arg2, arg3) \ + int argc = 4; \ + char *argv[] = { #testName, arg1, arg2, arg3 }; \ + int main() +#endif + +#define GF_DIAG_INITIALIZE(testName, argc, argv) GF_SUCCESS +#define GF_DIAG_CLEANUP(testName) GF_SUCCESS + +/* These should be removed once all the Apps & MODS are updated */ +#define GF_DIAG_GET_VERSION(testName, str, len) GF_SUCCESS +#define GF_DIAG_SET_IDLE_CHIP_CALLBACK(testName, callbackFn, callbackData) GF_SUCCESS +#define GF_DIAG_SET_RENDER_SURFACE(testName, surface) GF_SUCCESS +#define GF_DIAG_FRAME_DONE(testName) GF_SUCCESS +#define GF_DIAG_PRINT(handle, x) GF_SUCCESS +#define GF_DIAG_RUN_TEST(handle, testName, pCmdLine, flag, pDiagChildHandle) GF_SUCCESS +#define GF_DIAG_WAIT_FOR_TEST(handle) GF_SUCCESS +#define GF_DIAG_GET_CONTEXT(handle, pContext) GF_SUCCESS + +#define GF_DIAG_PRINTF(x) GFPrintf x + +#endif /* GF_DIAG_ENABLED */ + +#ifdef __cplusplus +} +#endif + +/* NV_MODS */ +#else + +/* GFDiag is always enabled in NV_MODS builds */ +#define GF_DIAG_ENABLED 1 + +#ifndef INCLUDED_GFMODS_H +#include "../GFMods/src/GFMods.h" +#endif + +#endif /* NV_MODS */ + +#define CHECK_STATUS_MSG(f,TEXT) \ + do { \ + if(ISGFERROR( ( status = (f) ) )) \ + { \ + GF_DIAG_PRINTF((TEXT)); \ + } \ + } while(0) + + +#define CHECK_STATUS_CLEANUP_MSG(f , TEXT) \ + do { \ + if(ISGFERROR( ( status = (f) ) )) \ + { \ + GF_DIAG_PRINTF(TEXT); \ + goto Cleanup; \ + } \ + } while(0) + +#define CHECK_STATUS_AND_DISPLAY_CLEANUP_MSG(f , TEXT) \ + do { \ + if(ISGFERROR( ( status = (f) ) )) \ + { \ + GF_DIAG_PRINTF((TEXT,f)); \ + goto Cleanup; \ + } \ + } while(0) +#endif /* __GFDIAG_H__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDispCmdData.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDispCmdData.h new file mode 100755 index 00000000..5106900b --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDispCmdData.h @@ -0,0 +1,1740 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#if !defined __GFDISPCMDDATA_H__ +#define __GFDISPCMDDATA_H__ + +// Display Signal Options 0 + +#define GF_DEFAULT_TABLE 0x01 // Display Default Table Support +#define GF_DXAPI_SUPPORT 0x02 // DxAPI Support +#define GF_FMARK_SUPPORT 0x04 // FMARK Supported by panel + +#define GFSDXAPI_PROC0 0x80000000 // PROC0 in Display DxAPI table in Script +#define GFSDXAPI_PROC1 0x80000001 // PROC1 in Display DxAPI table in Script +#define GFSDXAPI_PROC2 0x80000002 // PROC2 in Display DxAPI table in Script +#define GFSDXAPI_PROC3 0x80000003 // PROC3 in Display DxAPI table in Script +#define GFSDXAPI_PROC4 0x80000004 // PROC4 in Display DxAPI table in Script +#define GFSDXAPI_PROC5 0x80000005 // PROC5 in Display DxAPI table in Script +#define GFSDXAPI_PROC6 0x80000006 // PROC6 in Display DxAPI table in Script +#define GFSDXAPI_PROC7 0x80000007 // PROC7 in Display DxAPI table in Script +#define GFSDXAPI_PROC8 0x80000008 // PROC8 in Display DxAPI table in Script +#define GFSDXAPI_PROC9 0x80000009 // PROC9 in Display DxAPI table in Script +#define GFSDXAPI_PROC10 0x8000000A // PROC10 in Display DxAPI table in Script +#define GFSDXAPI_PROC11 0x8000000B // PROC11 in Display DxAPI table in Script +#define GFSDXAPI_PROC12 0x8000000C // PROC12 in Display DxAPI table in Script +#define GFSDXAPI_PROC13 0x8000000D // PROC13 in Display DxAPI table in Script +#define GFSDXAPI_PROC14 0x8000000E // PROC14 in Display DxAPI table in Script +#define GFSDXAPI_PROC15 0x8000000F // PROC14 in Display DxAPI table in Script +#define GFSDXAPI_PROC16 0x80000010 // PROC16 in Display DxAPI table in Script +#define GFSDXAPI_PROC17 0x80000011 // PROC17 in Display DxAPI table in Script +#define GFSDXAPI_PROC18 0x80000012 // PROC18 in Display DxAPI table in Script +#define GFSDXAPI_PROC19 0x80000013 // PROC19 in Display DxAPI table in Script +#define GFSDXAPI_PROC20 0x80000014 // PROC20 in Display DxAPI table in Script +#define GFSDXAPI_PROC21 0x80000015 // PROC21 in Display DxAPI table in Script +#define GFSDXAPI_PROC22 0x80000016 // PROC22 in Display DxAPI table in Script +#define GFSDXAPI_PROC23 0x80000017 // PROC23 in Display DxAPI table in Script +#define GFSDXAPI_PROC24 0x80000018 // PROC24 in Display DxAPI table in Script +#define GFSDXAPI_PROC25 0x80000019 // PROC25 in Display DxAPI table in Script +#define GFSDXAPI_PROC26 0x8000001A // PROC26 in Display DxAPI table in Script +#define GFSDXAPI_PROC27 0x8000001B // PROC27 in Display DxAPI table in Script +#define GFSDXAPI_PROC28 0x8000001C // PROC28 in Display DxAPI table in Script +#define GFSDXAPI_PROC29 0x8000001D // PROC29 in Display DxAPI table in Script +#define GFSDXAPI_PROC30 0x8000001E // PROC30 in Display DxAPI table in Script +#define GFSDXAPI_PROC31 0x8000001F // PROC31 in Display DxAPI table in Script +#define GFSDXAPI_PROC_END 0x8000FFFF // PROC End in Display DxAPI table in Script + +#define OFFSET_DISP_SIGNAL_OPTIONS0 0x00000101 + +#define GFSCMD_H_PULSE0 0x00088101 +#define GFSCMD_H_PULSE1 0x000A8101 +#define GFSCMD_H_PULSE2 0x000C8101 +#define GFSCMD_V_PULSE0 0x00108101 +#define GFSCMD_V_PULSE1 0x00128101 +#define GFSCMD_V_PULSE2 0x00138101 +#define GFSCMD_V_PULSE3 0x00148101 +#define GFSCMD_M0 0x00188101 +#define GFSCMD_M1 0x001A8101 + +#define GF_H_PULSE0_DISABLE 0x00000000 +#define GF_H_PULSE0_ENABLE 0x00000100 +#define GF_H_PULSE1_DISABLE 0x00000000 +#define GF_H_PULSE1_ENABLE 0x00000400 +#define GF_H_PULSE2_DISABLE 0x00000000 +#define GF_H_PULSE2_ENABLE 0x00001000 +#define GF_V_PULSE0_DISABLE 0x00000000 +#define GF_V_PULSE0_ENABLE 0x00010000 +#define GF_V_PULSE1_DISABLE 0x00000000 +#define GF_V_PULSE1_ENABLE 0x00040000 +#define GF_V_PULSE2_DISABLE 0x00000000 +#define GF_V_PULSE2_ENABLE 0x00080000 +#define GF_V_PULSE3_DISABLE 0x00000000 +#define GF_V_PULSE3_ENABLE 0x00100000 +#define GF_M0_DISABLE 0x00000000 +#define GF_M0_ENABLE 0x01000000 +#define GF_M1_DISABLE 0x00000000 +#define GF_M1_ENABLE 0x02000000 + + +// Display Signal Options 1 + +#define OFFSET_DISP_SIGNAL_OPTIONS1 0x00000102 +#define GFSCMD_DI 0x00108102 +#define GFSCMD_PP 0x00128102 + +#define GF_DI_DISABLE 0x00000000 +#define GF_DI_ENABLE 0x00010000 +#define GF_PP_DISABLE 0x00000000 +#define GF_PP_ENABLE 0x00040000 + +#define OFFSET_H_PULSE0_CONTROL 0x0000010c + +#define GFSCMD_H_PULSE0_MODE 0x0003810c +#define GFSCMD_H_PULSE0_POLARITY 0x0004810c +#define GFSCMD_H_PULSE0_V_QUAL 0x0006810c +#define GFSCMD_H_PULSE0_LAST 0x0008810c + +#define GF_H_PULSE0_MODE_NORMAL 0x00000000 +#define GF_H_PULSE0_MODE_ONE_CLOCK 0x00000008 +#define GF_H_PULSE0_POLARITY_HIGH 0x00000000 +#define GF_H_PULSE0_POLARITY_LOW 0x00000010 +#define GF_H_PULSE0_V_QUAL_ALWAYS 0x00000000 +#define GF_H_PULSE0_V_QUAL_VACTIVE 0x00000080 +#define GF_H_PULSE0_V_QUAL_VACTIVE1 0x000000A0 +#define GF_H_PULSE0_LAST_START_A 0x00000000 +#define GF_H_PULSE0_LAST_END_A 0x00000100 +#define GF_H_PULSE0_LAST_START_B 0x00000200 +#define GF_H_PULSE0_LAST_END_B 0x00000300 +#define GF_H_PULSE0_LAST_START_C 0x00000400 +#define GF_H_PULSE0_LAST_END_C 0x00000500 +#define GF_H_PULSE0_LAST_START_D 0x00000600 +#define GF_H_PULSE0_LAST_END_D 0x00000700 + +#define OFFSET_H_PULSE0_POSITION_A 0x0000010d +#define GFSCMD_H_PULSE0_POSITION_A 0x0000810d + +#define OFFSET_H_PULSE1_CONTROL 0x00000111 + +#define GFSCMD_H_PULSE1_MODE 0x00038111 +#define GFSCMD_H_PULSE1_POLARITY 0x00048111 +#define GFSCMD_H_PULSE1_V_QUAL 0x00068111 +#define GFSCMD_H_PULSE1_LAST 0x00088111 + +#define GF_H_PULSE1_MODE_NORMAL 0x00000000 +#define GF_H_PULSE1_MODE_ONE_CLOCK 0x00000008 +#define GF_H_PULSE1_POLARITY_HIGH 0x00000000 +#define GF_H_PULSE1_POLARITY_LOW 0x00000010 +#define GF_H_PULSE1_V_QUAL_ALWAYS 0x00000000 +#define GF_H_PULSE1_V_QUAL_VACTIVE 0x00000080 +#define GF_H_PULSE1_V_QUAL_VACTIVE1 0x000000A0 +#define GF_H_PULSE1_LAST_START_A 0x00000000 +#define GF_H_PULSE1_LAST_END_A 0x00000100 +#define GF_H_PULSE1_LAST_START_B 0x00000200 +#define GF_H_PULSE1_LAST_END_B 0x00000300 +#define GF_H_PULSE1_LAST_START_C 0x00000400 +#define GF_H_PULSE1_LAST_END_C 0x00000500 +#define GF_H_PULSE1_LAST_START_D 0x00000600 +#define GF_H_PULSE1_LAST_END_D 0x00000700 + +#define OFFSET_H_PULSE1_POSITION_A 0x00000112 +#define GFSCMD_H_PULSE1_POSITION_A 0x00008112 + +#define OFFSET_H_PULSE2_CONTROL 0x00000116 +#define GFSCMD_H_PULSE2_MODE 0x00038116 +#define GFSCMD_H_PULSE2_POLARITY 0x00048116 +#define GFSCMD_H_PULSE2_V_QUAL 0x00068116 +#define GFSCMD_H_PULSE2_LAST 0x00088116 + +#define GF_H_PULSE2_MODE_NORMAL 0x00000000 +#define GF_H_PULSE2_MODE_ONE_CLOCK 0x00000008 +#define GF_H_PULSE2_POLARITY_HIGH 0x00000000 +#define GF_H_PULSE2_POLARITY_LOW 0x00000010 +#define GF_H_PULSE2_V_QUAL_ALWAYS 0x00000000 +#define GF_H_PULSE2_V_QUAL_VACTIVE 0x00000080 +#define GF_H_PULSE2_V_QUAL_VACTIVE1 0x000000A0 +#define GF_H_PULSE2_LAST_START_A 0x00000000 +#define GF_H_PULSE2_LAST_END_A 0x00000100 +#define GF_H_PULSE2_LAST_START_B 0x00000200 +#define GF_H_PULSE2_LAST_END_B 0x00000300 +#define GF_H_PULSE2_LAST_START_C 0x00000400 +#define GF_H_PULSE2_LAST_END_C 0x00000500 +#define GF_H_PULSE2_LAST_START_D 0x00000600 +#define GF_H_PULSE2_LAST_END_D 0x00000700 + +#define OFFSET_H_PULSE2_POSITION_A 0x00000117 +#define GFSCMD_H_PULSE2_POSITION_A 0x00008117 + +#define GFSCMD_V_PULSE0_POLARITY 0x0004811b +#define GFSCMD_V_PULSE0_DELAY_CNTRL 0x0006811b +#define GFSCMD_V_PULSE0_LAST 0x0008811b + +#define GF_V_PULSE0_POLARITY_HIGH 0x00000000 +#define GF_V_PULSE0_POLARITY_LOW 0x00000010 +#define GF_V_PULSE0_NODELAY 0x00000000 +#define GF_V_PULSE0_DELAY 0x00000040 +#define GF_V_PULSE0_DELAY1 0x00000080 +#define GF_V_PULSE0_LAST_START_A 0x00000000 +#define GF_V_PULSE0_LAST_END_A 0x00000100 +#define GF_V_PULSE0_LAST_START_B 0x00000200 +#define GF_V_PULSE0_LAST_END_B 0x00000300 +#define GF_V_PULSE0_LAST_START_C 0x00000400 +#define GF_V_PULSE0_LAST_END_C 0x00000500 + +#define OFFSET_V_PULSE0_POSITION_A 0x0000011c +#define GFSCMD_V_PULSE0_POSITION_A 0x0000811c + +#define GF_V_PULSE0_START_A 0x00000000 +#define GF_V_PULSE0_END_A 0x00010000 + +#define GFSCMD_V_PULSE1_POLARITY 0x0004811f +#define GFSCMD_V_PULSE1_DELAY_CNTRL 0x0006811f +#define GFSCMD_V_PULSE1_LAST 0x0008811f + +#define GF_V_PULSE1_POLARITY_HIGH 0x00000000 +#define GF_V_PULSE1_POLARITY_LOW 0x00000010 +#define GF_V_PULSE1_NODELAY 0x00000000 +#define GF_V_PULSE1_DELAY1 0x00000040 +#define GF_V_PULSE1_DELAY2 0x00000080 +#define GF_V_PULSE1_LAST_START_A 0x00000000 +#define GF_V_PULSE1_LAST_END_A 0x00000100 +#define GF_V_PULSE1_LAST_START_B 0x00000200 +#define GF_V_PULSE1_LAST_END_B 0x00000300 +#define GF_V_PULSE1_LAST_START_C 0x00000400 +#define GF_V_PULSE1_LAST_END_C 0x00000500 + +#define OFFSET_V_PULSE1_POSITION_A 0x00000120 +#define GFSCMD_V_PULSE1_POSITION_A 0x00008120 + +#define OFFSET_M0_CONTROL 0x00000127 +#define GFSCMD_M0_CLOCK_SELECT 0x00008127 +#define GFSCMD_M0_PHASE_CONTROL 0x00048127 +#define GFSCMD_M0_PHASE_RESET 0x00068127 +#define GFSCMD_M0_POLARITY 0x00078127 +#define GFSCMD_M0_PERIOD 0x00088127 +#define GFSCMD_M0_H_POSITION 0x00108127 + +#define GF_M0_CLOCK_SELECT_PCLK 0x00000000 +#define GF_M0_CLOCK_SELECT_LCLK 0x00000002 +#define GF_M0_CLOCK_SELECT_FCLK 0x00000003 +#define GF_M0_PHASE_CONTROL_FREE_RUN 0x00000000 +#define GF_M0_PHASE_CONTROL_VACTIVE_RESTART 0x00000020 +#define GF_M0_PHASE_CONTROL_FRAME_INVERT 0x00000030 +#define GF_M0_PHASE_RESET_NOT_RESET 0x00000000 +#define GF_M0_PHASE_RESET_RESET 0x00000040 +#define GF_M0_POLARITY_HIGH 0x00000000 +#define GF_M0_POLARITY_LOW 0x00000080 +#define GF_M0_PERIOD_VAL 0x00000100 +#define GF_M0_H_POSITION_VAL 0x00010000 + +#define OFFSET_M1_CONTROL 0x00000128 +#define GFSCMD_M1_CLOCK_SELECT 0x00008128 +#define GFSCMD_M1_PHASE_CONTROL 0x00048128 +#define GFSCMD_M1_PHASE_RESET 0x00068128 +#define GFSCMD_M1_POLARITY 0x00078128 +#define GFSCMD_M1_PERIOD 0x00088128 +#define GFSCMD_M1_H_POSITION 0x00108128 + +#define GF_M1_CLOCK_SELECT_PCLK 0x00000000 +#define GF_M1_CLOCK_SELECT_LCLK 0x00000002 +#define GF_M1_CLOCK_SELECT_FCLK 0x00000003 +#define GF_M1_PHASE_CONTROL_FREE_RUN 0x00000000 +#define GF_M1_PHASE_CONTROL_VACTIVE_RESTART 0x00000020 +#define GF_M1_PHASE_CONTROL_FRAME_INVERT 0x00000030 +#define GF_M1_PHASE_RESET_NOT_RESET 0x00000000 +#define GF_M1_PHASE_RESET_RESET 0x00000040 +#define GF_M1_POLARITY_HIGH 0x00000000 +#define GF_M1_POLARITY_LOW 0x00000080 +#define GF_M1_PERIOD_VAL 0x00000100 +#define GF_M1_H_POSITION_VAL 0x00010000 + +#define GF_DISP_CLOCK_CONTROL_0 0x0000012f + +#define GFSCMD_SHIFT_CLK_DIVIDER 0x0000812f +#define GFSCMD_PIXEL_CLK_DIVIDER 0x0008812f + +//#define GF_SHCLKD_1_256_VAL 0x00000000 +#define GF_PCD1 0x00000000 +#define GF_PCD1H 0x00000100 +#define GF_PCD2 0x00000200 +#define GF_PCD3 0x00000300 +#define GF_PCD4 0x00000400 +#define GF_PCD6 0x00000500 +#define GF_PCD8 0x00000600 +#define GF_PCD9 0x00000700 +#define GF_PCD12 0x00000800 +#define GF_PCD16 0x00000900 +#define GF_PCD13 0x00000a00 +#define GF_PCD18 0x00000b00 +#define GF_PCD24 0x00000c00 + +#define OFFSET_DISP_INTERFACE_CONTROL 0x00000130 +#define GFSCMD_DISP_DATA_FORMAT 0x00008130 + +#define GFSCMD_DISP_DATA_ALIGNMENT 0x00088130 +#define GFSCMD_DISP_DATA_ORDER 0x00098130 + +#define GF_DF1P1C_PRLL 0x00000000 +#define GF_DF1P2C24B_PRLL 0x00000001 +#define GF_DF1P2C18B_PRLL 0x00000002 +#define GF_DF1P2C16B_PRLL 0x00000003 +#define GF_DF1CNL_SRL 0x00000004 +#define GF_DF2CNL_SRL 0x00000005 +#define GF_DF3CNL_SRL 0x00000006 +#define GF_DF_SPI 0x00000007 +#define GF_MSB 0x00000000 +#define GF_LSB 0x00000100 +#define GF_RED_BLUE 0x00000000 +#define GF_BLUE_RED 0x00000200 + +#define OFFSET_DISP_COLOR_CONTROL 0x00000131 +#define GFSCMD_BASE_COLOR_SIZE 0x00008131 +#define GFSCMD_DITHER_CONTROL 0x00088131 +#define GFSCMD_ORD_DITHER_ROTATION 0x000C8131 +#define GFSCMD_DISP_COLOR_SWAP 0x00108131 +#define GFSCMD_BLANK_COLOR 0x00118131 +#define GFSCMD_NON_BASE_COLOR 0x00128131 +#define GFSCMD_LCD_MD0 0x00188131 + +#define GF_BASE666 0x00000000 +#define GF_BASE111 0x00000001 +#define GF_BASE222 0x00000002 +#define GF_BASE333 0x00000003 +#define GF_BASE444 0x00000004 +#define GF_BASE555 0x00000005 +#define GF_BASE565 0x00000006 +#define GF_BASE332 0x00000007 +#define GF_BASE888 0x00000008 +#define GF_DISABLE 0x00000000 +#define GF_ORDERED 0x00000200 +#define GF_ERRDIFF 0x00000300 +#define GF_ORD_DITHER_ROTATION_VAL 0x00000000 +#define GF_SWAP_RGB 0x00000000 +#define GF_SWAP_BGR 0x00010000 +#define GF_BLANK_ZERO 0x00000000 +#define GF_BLANK_ONES 0x00020000 +#define GF_NON_BASE_ZERO 0x00000000 +#define GF_NON_BASE_ONES 0x00040000 +#define GF_LCD_MD0_LOW 0x00000000 +#define GF_LCD_MD0_HIGH 0x01000000 + + +#define OFFSET_SHIFT_CLOCK_OPTIONS 0x00000132 + +#define GFSCMD_SC0_H_QUALIFIER 0x00008132 +#define GFSCMD_SC0_V_QUALIFIER 0x00038132 +#define GFSCMD_SC0_CLK_DIVIDER 0x00068132 +#define GFSCMD_SC1_H_QUALIFIER 0x00108132 +#define GFSCMD_SC1_V_QUALIFIER 0x00138132 +#define GFSCMD_SC1_CLK_DIVIDER 0x00158132 + +#define GF_SC0_H_DISABLE 0x00000000 +#define GF_SC0_H_NO_HQUAL 0x00000001 +#define GF_SC0_H_HACTIVE 0x00000002 +#define GF_SC0_H_EXT_HACTIVE 0x00000003 +#define GF_SC0_H_HPULSE0 0x00000004 +#define GF_SC0_H_EXT_HPULSE0 0x00000005 +#define GF_SC0_V_NO_VQUAL 0x00000000 +#define GF_SC0_V_RESERVED 0x00000008 +#define GF_SC0_V_VACTIVE 0x00000010 +#define GF_SC0_V_EXT_VACTIVE 0x00000018 +#define GF_SC0_V_VPULSE0 0x00000020 +#define GF_SC0_V_EXT_VPULSE0 0x00000028 +#define GF_SC0_DIV1 0x00000000 +#define GF_SC0_DIV2 0x00000040 +#define GF_SC0_DIV4 0x00000080 + +#define GF_SC1_H_DISABLE 0x00000000 +#define GF_SC1_H_NO_HQUAL 0x00010000 +#define GF_SC1_H_HACTIVE 0x00020000 +#define GF_SC1_H_EXT_HACTIVE 0x00030000 +#define GF_SC1_H_HPULSE1 0x00040000 +#define GF_SC1_H_EXT_HPULSE1 0x00050000 +#define GF_SC1_V_NO_VQUAL 0x00000000 +#define GF_SC1_V_RESERVED 0x00080000 +#define GF_SC1_V_VACTIVE 0x00100000 +#define GF_SC1_V_EXT_VACTIVE 0x00180000 +#define GF_SC1_V_VPULSE1 0x00200000 +#define GF_SC1_V_EXT_VPULSE1 0x00280000 +#define GF_SC1_DIV1 0x00000000 +#define GF_SC1_DIV2 0x00400000 +#define GF_SC1_DIV4 0x00800000 + +#define OFFSET_DATA_ENABLE_OPTIONS 0x00000133 + +#define GFSCMD_DE_SELECT_ACTIVE 0x00008133 +#define GFSCMD_DE_CONTROL 0x00038133 + +#define GF_DE_ACTIVE_ALL_LINES 0x00000000 +#define GF_DE_ACTIVE_NOBLANK 0x00000001 +#define GF_DE_ONECLK 0x00000000 +#define GF_DE_NORMAL 0x00000004 +#define GF_DE_ONE_CLK_PRECD_ACTIVE 0x00000008 +#define GF_DE_ONE_PIXEL_CLK_EARLY 0x0000000C + + +#define OFFSET_SERIAL_INTERFACE_OPTIONS 0x00000134 +#define GFSCMD_SDT_STP_MODE 0x00008134 +#define GFSCMD_SDT_STP_DURATION 0x00028134 +#define GFSCMD_STH_DURATION 0x00068134 +#define GFSCMD_STP_CONTRO 0x00078134 + +#define GF_SDT_STP_DISABLE 0x00000000 +#define GF_SDT_STP_RESERVED 0x00000001 +#define GF_SDT_STP_ENABLE_DUP 0x00000002 +#define GF_SDT_STP_ENABLE 0x00000003 +#define GF_SDT_STP_DURATION_VAL 0x00000000 +#define GF_ONE_CLOCK 0x00000000 +#define GF_TWO_CLOCK 0x00000040 +#define GF_STP_NORMAL 0x00000000 +#define GF_STP_EXTENDED 0x00000080 + + +#define OFFSET_LCD_LSPI_OPTIONS 0x00000135 +#define GFSCMD_LCD_SPI_CS_MAIN 0x00008135 +#define GFSCMD_LCD_SPI_DC 0x00018135 +#define GFSCMD_SPI_CS_CONTROL_LCD_IS_SPI 0x00028135 +#define GFSCMD_LCD_SPI_DIRECTION_LSB2MSB 0x00048135 + +#define GF_CS_MAIN 0x00000000 +#define GF_CS_SUB 0x00000001 +#define GF_LDC_LOW 0x00000000 +#define GF_LDC_HIGH 0x00000002 +#define GF_LCD_IS_SPI 0x00000000 +#define GF_LCD_SPI 0x00000004 +#define GF_IS_SPI 0x00000008 +#define GF_FORCED 0x0000000C +#define GF_MSB2LSB 0x00000000 +#define GF_LSB2MSB 0x00000010 + + +#define OFFSET_SIGNAL_RAISE 0x00000005 +#define GFSCMD_SIGNAL_RAISE_VECTOR 0x00008005 +#define GFSCMD_SIGNAL_RAISE_SELECT 0x00088005 +#define GFSCMD_SIGNAL_RAISE_CHANNEL_ID 0x00108005 + +#define GF_RAISE_VECTOR_VAL 0x00000000 +#define GF_RAISE_NONE 0x00000000 +#define GF_RAISE_FRAME_END 0x00000100 +#define GF_RAISE_VBLANK 0x00000200 +#define GF_RAISE_VPULSE3 0x00000300 +#define GF_RAISE_CHANNEL_ID_VAL 0x00000000 + + +#define OFFSET_SIGNAL_REFCOUNT 0x00000006 +#define GFSCMD_SIGNAL_REFCOUNT_VECTOR 0x00008006 +#define GFSCMD_SIGNAL_REFCOUNT_SELECT 0x00108006 + +#define GF_REFCOUNT_VECTOR_VAL 0x00000000 +#define GF_REFCOUNT_NONE 0x00000000 +#define GF_REFCOUNT_FRAME_END 0x00010000 + + + +// Display Power Control + +#define OFFSET_DISPLAY_POWER_CONTROL 0x00000009 +#define GFSCMD_PW0_CONTROL 0x00008009 +#define GFSCMD_PW1_CONTROL 0x00028009 +#define GFSCMD_PW2_CONTROL 0x00048009 +#define GFSCMD_PW3_CONTROL 0x00068009 +#define GFSCMD_PW4_CONTROL 0x00088009 +#define GFSCMD_PM0_CONTROL 0x00108009 +#define GFSCMD_PM1_CONTROL 0x00128009 +#define GFSCMD_SPI_CONTROL 0x00188009 +#define GFSCMD_HSPI_CONTROL 0x00198009 + +#define GF_PW0_DISABLE 0x00000000 +#define GF_PW0_ENABLE 0x00000001 +#define GF_PW1_DISABLE 0x00000000 +#define GF_PW1_ENABLE 0x00000004 +#define GF_PW2_DISABLE 0x00000000 +#define GF_PW2_ENABLE 0x00000010 +#define GF_PW3_DISABLE 0x00000000 +#define GF_PW3_ENABLE 0x00000040 +#define GF_PW4_DISABLE 0x00000000 +#define GF_PW4_ENABLE 0x00010000 +#define GF_PM0_DISABLE 0x00000000 +#define GF_PM0_ENABLE 0x00040000 +#define GF_PM1_DISABLE 0x00000000 +#define GF_PM1_ENABLE 0x00400000 +#define GF_SPI_DISABLE 0x00000000 +#define GF_SPI_ENABLE 0x01000000 +#define GF_HSPI_DISABLE 0x00000000 +#define GF_HSPI_ENABLE 0x02000000 + +// Pin Output Enable registers + +#define OFFSET_PIN_OUTPUT_ENABLE0 0x00000802 +#define GFSCMD_LD0_PIN_OUTPUT 0x00008802 +#define GFSCMD_LD1_PIN_OUTPUT 0x00028802 +#define GFSCMD_LD2_PIN_OUTPUT 0x00048802 +#define GFSCMD_LD3_PIN_OUTPUT 0x00068802 +#define GFSCMD_LD4_PIN_OUTPUT 0x00088802 +#define GFSCMD_LD5_PIN_OUTPUT 0x000a8802 +#define GFSCMD_LD6_PIN_OUTPUT 0x000c8802 +#define GFSCMD_LD7_PIN_OUTPUT 0x000e8802 +#define GFSCMD_LD8_PIN_OUTPUT 0x00108802 +#define GFSCMD_LD9_PIN_OUTPUT 0x00128802 +#define GFSCMD_LD10_PIN_OUTPUT 0x00148802 +#define GFSCMD_LD11_PIN_OUTPUT 0x00168802 +#define GFSCMD_LD12_PIN_OUTPUT 0x00188802 +#define GFSCMD_LD13_PIN_OUTPUT 0x001a8802 +#define GFSCMD_LD14_PIN_OUTPUT 0x001c8802 +#define GFSCMD_LD15_PIN_OUTPUT 0x001e8802 +#define GFSCMD_LD0_LD15_PIN_OUTPUT 0x00208802 + + +#define GF_LD0_OUTPUT_ENABLE 0x00000000 +#define GF_LD0_OUTPUT_DISABLE 0x00000001 +#define GF_LD1_OUTPUT_ENABLE 0x00000000 +#define GF_LD1_OUTPUT_DISABLE 0x00000004 +#define GF_LD2_OUTPUT_ENABLE 0x00000000 +#define GF_LD2_OUTPUT_DISABLE 0x00000010 +#define GF_LD3_OUTPUT_ENABLE 0x00000000 +#define GF_LD3_OUTPUT_DISABLE 0x00000040 +#define GF_LD4_OUTPUT_ENABLE 0x00000000 +#define GF_LD4_OUTPUT_DISABLE 0x00000100 +#define GF_LD5_OUTPUT_ENABLE 0x00000000 +#define GF_LD5_OUTPUT_DISABLE 0x00000400 +#define GF_LD6_OUTPUT_ENABLE 0x00000000 +#define GF_LD6_OUTPUT_DISABLE 0x00001000 +#define GF_LD7_OUTPUT_ENABLE 0x00000000 +#define GF_LD7_OUTPUT_DISABLE 0x00004000 +#define GF_LD8_OUTPUT_ENABLE 0x00000000 +#define GF_LD8_OUTPUT_DISABLE 0x00010000 +#define GF_LD9_OUTPUT_ENABLE 0x00000000 +#define GF_LD9_OUTPUT_DISABLE 0x00040000 +#define GF_LD10_OUTPUT_ENABLE 0x00000000 +#define GF_LD10_OUTPUT_DISABLE 0x00100000 +#define GF_LD11_OUTPUT_ENABLE 0x00000000 +#define GF_LD11_OUTPUT_DISABLE 0x00400000 +#define GF_LD12_OUTPUT_ENABLE 0x00000000 +#define GF_LD12_OUTPUT_DISABLE 0x01000000 +#define GF_LD13_OUTPUT_ENABLE 0x00000000 +#define GF_LD13_OUTPUT_DISABLE 0x04000000 +#define GF_LD14_OUTPUT_ENABLE 0x00000000 +#define GF_LD14_OUTPUT_DISABLE 0x10000000 +#define GF_LD15_OUTPUT_ENABLE 0x00000000 +#define GF_LD15_OUTPUT_DISABLE 0x40000000 +#define GF_LD0_LD15_OUTPUT_ENABLE 0x00000000 +#define GF_LD0_LD15_OUTPUT_DISABLE 0x55555555 + + +#define OFFSET_PIN_OUTPUT_ENABLE1 0x00000803 +#define GFSCMD_LD16_PIN_OUTPUT 0x00008803 +#define GFSCMD_LD17_PIN_OUTPUT 0x00028803 +#define GFSCMD_LPW0_PIN_OUTPUT 0x00108803 +#define GFSCMD_LPW1_PIN_OUTPUT 0x00128803 +#define GFSCMD_LPW2_PIN_OUTPUT 0x00148803 +#define GFSCMD_LSC0_PIN_OUTPUT 0x00188803 +#define GFSCMD_LSC1_PIN_OUTPUT 0x001a8803 +#define GFSCMD_LVS_PIN_OUTPUT 0x001c8803 +#define GFSCMD_LHS_PIN_OUTPUT 0x001e8803 +#define GFSCMD_LD16_LD17_PIN_OUTPUT 0x00208803 + +#define GF_LD16_OUTPUT_ENABLE 0x00000000 +#define GF_LD16_OUTPUT_DISABLE 0x00000001 +#define GF_LD17_OUTPUT_ENABLE 0x00000000 +#define GF_LD17_OUTPUT_DISABLE 0x00000004 +#define GF_LPW0_OUTPUT_ENABLE 0x00000000 +#define GF_LPW0_OUTPUT_DISABLE 0x00010000 +#define GF_LPW1_OUTPUT_ENABLE 0x00000000 +#define GF_LPW1_OUTPUT_DISABLE 0x00040000 +#define GF_LPW2_OUTPUT_ENABLE 0x00000000 +#define GF_LPW2_OUTPUT_DISABLE 0x00100000 +#define GF_LSC0_OUTPUT_ENABLE 0x00000000 +#define GF_LSC0_OUTPUT_DISABLE 0x01000000 +#define GF_LSC1_OUTPUT_ENABLE 0x00000000 +#define GF_LSC1_OUTPUT_DISABLE 0x04000000 +#define GF_LVS_OUTPUT_ENABLE 0x00000000 +#define GF_LVS_OUTPUT_DISABLE 0x10000000 +#define GF_LHS_OUTPUT_ENABLE 0x00000000 +#define GF_LHS_OUTPUT_DISABLE 0x40000000 +#define GF_LD16_LD17_OUTPUT_ENABLE 0x00000000 +#define GF_LD16_LD17_OUTPUT_DISABLE 0x00000005 + + +#define DC_PIN_OUTPUT_ENABLE2 0x00000804 +#define GFSCMD_LHP0_PIN_OUTPUT 0x00008804 +#define GFSCMD_LHP1_PIN_OUTPUT 0x00028804 +#define GFSCMD_LHP2_PIN_OUTPUT 0x00048804 +#define GFSCMD_LVP0_PIN_OUTPUT 0x00088804 +#define GFSCMD_LVP1_PIN_OUTPUT 0x000A8804 +#define GFSCMD_LM0_PIN_OUTPUT 0x00108804 +#define GFSCMD_LM1_PIN_OUTPUT 0x00128804 +#define GFSCMD_LDI_PIN_OUTPUT 0x00148804 +#define GFSCMD_LPP_PIN_OUTPUT 0x00168804 + +#define GF_LHP0_OUTPUT_ENABLE 0x00000000 +#define GF_LHP0_OUTPUT_DISABLE 0x00000001 +#define GF_LHP1_OUTPUT_ENABLE 0x00000000 +#define GF_LHP1_OUTPUT_DISABLE 0x00000004 +#define GF_LHP2_OUTPUT_ENABLE 0x00000000 +#define GF_LHP2_OUTPUT_DISABLE 0x00000010 +#define GF_LVP0_OUTPUT_ENABLE 0x00000000 +#define GF_LVP0_OUTPUT_DISABLE 0x00000100 +#define GF_LVP1_OUTPUT_ENABLE 0x00000000 +#define GF_LVP1_OUTPUT_DISABLE 0x00000404 +#define GF_LM0_OUTPUT_ENABLE 0x00000000 +#define GF_LM0_OUTPUT_DISABLE 0x00010000 +#define GF_LM1_OUTPUT_ENABLE 0x00000000 +#define GF_LM1_OUTPUT_DISABLE 0x00040000 +#define GF_LDI_OUTPUT_ENABLE 0x00000000 +#define GF_LDI_OUTPUT_DISABLE 0x00100000 +#define GF_LPP_OUTPUT_ENABLE 0x00000000 +#define GF_LPP_OUTPUT_DISABLE 0x00400000 + +#define OFFSET_OUTPUT_ENABLE3 0x00000805 +#define GFSCMD_LSCK_PIN_OUTPUT 0x00008805 +#define GFSCMD_LSDA_PIN_OUTPUT 0x00028805 +#define GFSCMD_LCSN_PIN_OUTPUT 0x00048805 +#define GFSCMD_LDC_PIN_OUTPUT 0x00068805 +#define GFSCMD_LSPI_PIN_OUTPUT 0x00088805 + +#define GF_LSCK_OUTPUT_ENABLE 0x00000000 +#define GF_LSCK_OUTPUT_DISABLE 0x00000001 +#define GF_LSDA_OUTPUT_ENABLE 0x00000000 +#define GF_LSDA_OUTPUT_DISABLE 0x00000004 +#define GF_LCSN_OUTPUT_ENABLE 0x00000000 +#define GF_LCSN_OUTPUT_DISABLE 0x00000010 +#define GF_LDC_OUTPUT_ENABLE 0x00000000 +#define GF_LDC_OUTPUT_DISABLE 0x00000040 +#define GF_LSPI_OUTPUT_ENABLE 0x00000000 +#define GF_LSPI_OUTPUT_DISABLE 0x00000100 + + +// Pin Output Polarity registers + +#define OFFSET_PIN_OUTPUT_POLARITY0 0x00000806 +#define GFSCMD_LD0_PIN_POLARITY 0x00008806 +#define GFSCMD_LD1_PIN_POLARITY 0x00028806 +#define GFSCMD_LD2_PIN_POLARITY 0x00048806 +#define GFSCMD_LD3_PIN_POLARITY 0x00068806 +#define GFSCMD_LD4_PIN_POLARITY 0x00088806 +#define GFSCMD_LD5_PIN_POLARITY 0x000a8806 +#define GFSCMD_LD6_PIN_POLARITY 0x000c8806 +#define GFSCMD_LD7_PIN_POLARITY 0x000e8806 +#define GFSCMD_LD8_PIN_POLARITY 0x00108806 +#define GFSCMD_LD9_PIN_POLARITY 0x00128806 +#define GFSCMD_LD10_PIN_POLARITY 0x00148806 +#define GFSCMD_LD11_PIN_POLARITY 0x00168806 +#define GFSCMD_LD12_PIN_POLARITY 0x00188806 +#define GFSCMD_LD13_PIN_POLARITY 0x001a8806 +#define GFSCMD_LD14_PIN_POLARITY 0x001c8806 +#define GFSCMD_LD15_PIN_POLARITY 0x001e8806 +#define GFSCMD_LD0_LD15_PIN_POLARITY 0x00208806 + + +#define GF_LD0_POLARITY_HIGH 0x00000000 +#define GF_LD0_POLARITY_LOW 0x00000001 +#define GF_LD1_POLARITY_HIGH 0x00000000 +#define GF_LD1_POLARITY_LOW 0x00000004 +#define GF_LD2_POLARITY_HIGH 0x00000000 +#define GF_LD2_POLARITY_LOW 0x00000010 +#define GF_LD3_POLARITY_HIGH 0x00000000 +#define GF_LD3_POLARITY_LOW 0x00000040 +#define GF_LD4_POLARITY_HIGH 0x00000000 +#define GF_LD4_POLARITY_LOW 0x00000100 +#define GF_LD5_POLARITY_HIGH 0x00000000 +#define GF_LD5_POLARITY_LOW 0x00000400 +#define GF_LD6_POLARITY_HIGH 0x00000000 +#define GF_LD6_POLARITY_LOW 0x00001000 +#define GF_LD7_POLARITY_HIGH 0x00000000 +#define GF_LD7_POLARITY_LOW 0x00004000 +#define GF_LD8_POLARITY_HIGH 0x00000000 +#define GF_LD8_POLARITY_LOW 0x00010000 +#define GF_LD9_POLARITY_HIGH 0x00000000 +#define GF_LD9_POLARITY_LOW 0x00040000 +#define GF_LD10_POLARITY_HIGH 0x00000000 +#define GF_LD10_POLARITY_LOW 0x00100000 +#define GF_LD11_POLARITY_HIGH 0x00000000 +#define GF_LD11_POLARITY_LOW 0x00400000 +#define GF_LD12_POLARITY_HIGH 0x00000000 +#define GF_LD12_POLARITY_LOW 0x01000000 +#define GF_LD13_POLARITY_HIGH 0x00000000 +#define GF_LD13_POLARITY_LOW 0x04000000 +#define GF_LD14_POLARITY_HIGH 0x00000000 +#define GF_LD14_POLARITY_LOW 0x10000000 +#define GF_LD15_POLARITY_HIGH 0x00000000 +#define GF_LD15_POLARITY_LOW 0x40000000 +#define GF_LD0_LD15_POLARITY_HIGH 0x00000000 +#define GF_LD0_LD15_POLARITY_LOW 0x55555555 + +#define OFFSET_PIN_OUTPUT_POLARITY1 0x00000807 +#define GFSCMD_LD16_PIN_POLARITY 0x00008807 +#define GFSCMD_LD17_PIN_POLARITY 0x00028807 +#define GFSCMD_LPW0_PIN_POLARITY 0x00108807 +#define GFSCMD_LPW1_PIN_POLARITY 0x00128807 +#define GFSCMD_LPW2_PIN_POLARITY 0x00148807 +#define GFSCMD_LSC0_PIN_POLARITY 0x00188807 +#define GFSCMD_LSC1_PIN_POLARITY 0x001a8807 +#define GFSCMD_LVS_PIN_POLARITY 0x001c8807 +#define GFSCMD_LHS_PIN_POLARITY 0x001e8807 +#define GFSCMD_LD16_LD17_PIN_POLARITY 0x00208807 + +#define GF_LD16_POLARITY_HIGH 0x00000000 +#define GF_LD16_POLARITY_LOW 0x00000001 +#define GF_LD17_POLARITY_HIGH 0x00000000 +#define GF_LD17_POLARITY_LOW 0x00000004 +#define GF_LPW0_POLARITY_HIGH 0x00000000 +#define GF_LPW0_POLARITY_LOW 0x00010000 +#define GF_LPW1_POLARITY_HIGH 0x00000000 +#define GF_LPW1_POLARITY_LOW 0x00040000 +#define GF_LPW2_POLARITY_HIGH 0x00000000 +#define GF_LPW2_POLARITY_LOW 0x00100000 +#define GF_LSC0_POLARITY_HIGH 0x00000000 +#define GF_LSC0_POLARITY_LOW 0x01000000 +#define GF_LSC1_POLARITY_HIGH 0x00000000 +#define GF_LSC1_POLARITY_LOW 0x04000000 +#define GF_LVS_POLARITY_HIGH 0x00000000 +#define GF_LVS_POLARITY_LOW 0x10000000 +#define GF_LHS_POLARITY_HIGH 0x00000000 +#define GF_LHS_POLARITY_LOW 0x40000000 +#define GF_LD16_LD17_POLARITY_HIGH 0x00000000 +#define GF_LD16_LD17_POLARITY_LOW 0x00000005 + +#define DC_PIN_OUTPUT_POLARITY2 0x00000808 +#define GFSCMD_LHP0_PIN_POLARITY 0x00008808 +#define GFSCMD_LHP1_PIN_POLARITY 0x00028808 +#define GFSCMD_LHP2_PIN_POLARITY 0x00048808 +#define GFSCMD_LVP0_PIN_POLARITY 0x00088808 +#define GFSCMD_LVP1_PIN_POLARITY 0x000A8808 +#define GFSCMD_LM0_PIN_POLARITY 0x00108808 +#define GFSCMD_LM1_PIN_POLARITY 0x00128808 +#define GFSCMD_LDI_PIN_POLARITY 0x00148808 +#define GFSCMD_LPP_PIN_POLARITY 0x00168808 + +#define GF_LHP0_POLARITY_HIGH 0x00000000 +#define GF_LHP0_POLARITY_LOW 0x00000001 +#define GF_LHP1_POLARITY_HIGH 0x00000000 +#define GF_LHP1_POLARITY_LOW 0x00000004 +#define GF_LHP2_POLARITY_HIGH 0x00000000 +#define GF_LHP2_POLARITY_LOW 0x00000010 +#define GF_LVP0_POLARITY_HIGH 0x00000000 +#define GF_LVP0_POLARITY_LOW 0x00000100 +#define GF_LVP1_POLARITY_HIGH 0x00000000 +#define GF_LVP1_POLARITY_LOW 0x00000404 +#define GF_LM0_POLARITY_HIGH 0x00000000 +#define GF_LM0_POLARITY_LOW 0x00010000 +#define GF_LM1_POLARITY_HIGH 0x00000000 +#define GF_LM1_POLARITY_LOW 0x00040000 +#define GF_LDI_POLARITY_HIGH 0x00000000 +#define GF_LDI_POLARITY_LOW 0x00100000 +#define GF_LPP_POLARITY_HIGH 0x00000000 +#define GF_LPP_POLARITY_LOW 0x00400000 + +#define OFFSET_OUTPUT_POLARITY3 0x00000809 +#define GFSCMD_LSCK_PIN_POLARITY 0x00008809 +#define GFSCMD_LSDA_PIN_POLARITY 0x00028809 +#define GFSCMD_LCSN_PIN_POLARITY 0x00048809 +#define GFSCMD_LDC_PIN_POLARITY 0x00068809 +#define GFSCMD_LSPI_PIN_POLARITY 0x00088809 + +#define GF_LSCK_POLARITY_HIGH 0x00000000 +#define GF_LSCK_POLARITY_LOW 0x00000001 +#define GF_LSDA_POLARITY_HIGH 0x00000000 +#define GF_LSDA_POLARITY_LOW 0x00000004 +#define GF_LCSN_POLARITY_HIGH 0x00000000 +#define GF_LCSN_POLARITY_LOW 0x00000010 +#define GF_LDC_POLARITY_HIGH 0x00000000 +#define GF_LDC_POLARITY_LOW 0x00000040 +#define GF_LSPI_POLARITY_HIGH 0x00000000 +#define GF_LSPI_POLARITY_LOW 0x00000100 + +// Pin Output data registers + +#define OFFSET_PIN_OUTPUT_DATA0 0x0000080a +#define GFSCMD_LD0_PIN_OUTPUT_DATA 0x0000880a +#define GFSCMD_LD1_PIN_OUTPUT_DATA 0x0002880a +#define GFSCMD_LD2_PIN_OUTPUT_DATA 0x0004880a +#define GFSCMD_LD3_PIN_OUTPUT_DATA 0x0006880a +#define GFSCMD_LD4_PIN_OUTPUT_DATA 0x0008880a +#define GFSCMD_LD5_PIN_OUTPUT_DATA 0x000a880a +#define GFSCMD_LD6_PIN_OUTPUT_DATA 0x000c880a +#define GFSCMD_LD7_PIN_OUTPUT_DATA 0x000e880a +#define GFSCMD_LD8_PIN_OUTPUT_DATA 0x0010880a +#define GFSCMD_LD9_PIN_OUTPUT_DATA 0x0012880a +#define GFSCMD_LD10_PIN_OUTPUT_DATA 0x0014880a +#define GFSCMD_LD11_PIN_OUTPUT_DATA 0x0016880a +#define GFSCMD_LD12_PIN_OUTPUT_DATA 0x0018880a +#define GFSCMD_LD13_PIN_OUTPUT_DATA 0x001a880a +#define GFSCMD_LD14_PIN_OUTPUT_DATA 0x001c880a +#define GFSCMD_LD15_PIN_OUTPUT_DATA 0x001e880a +#define GFSCMD_LD0_LD15_PIN_OUTPUT_DATA 0x0020880a + + +#define GF_LD0_DATA_LOW 0x00000002 +#define GF_LD0_DATA_HIGH 0x00000003 +#define GF_LD1_DATA_LOW 0x00000008 +#define GF_LD1_DATA_HIGH 0x0000000c +#define GF_LD2_DATA_LOW 0x00000020 +#define GF_LD2_DATA_HIGH 0x00000030 +#define GF_LD3_DATA_LOW 0x00000080 +#define GF_LD3_DATA_HIGH 0x000000c0 +#define GF_LD4_DATA_LOW 0x00000200 +#define GF_LD4_DATA_HIGH 0x00000300 +#define GF_LD5_DATA_LOW 0x00000800 +#define GF_LD5_DATA_HIGH 0x00000c00 +#define GF_LD6_DATA_LOW 0x00002000 +#define GF_LD6_DATA_HIGH 0x00003000 +#define GF_LD7_DATA_LOW 0x00008000 +#define GF_LD7_DATA_HIGH 0x0000c000 +#define GF_LD8_DATA_LOW 0x00020000 +#define GF_LD8_DATA_HIGH 0x00030000 +#define GF_LD9_DATA_LOW 0x00080000 +#define GF_LD9_DATA_HIGH 0x000c0000 +#define GF_LD10_DATA_LOW 0x00200000 +#define GF_LD10_DATA_HIGH 0x00300000 +#define GF_LD11_DATA_LOW 0x00800000 +#define GF_LD11_DATA_HIGH 0x00c00000 +#define GF_LD12_DATA_LOW 0x02000000 +#define GF_LD12_DATA_HIGH 0x03000000 +#define GF_LD13_DATA_LOW 0x08000000 +#define GF_LD13_DATA_HIGH 0x0c000000 +#define GF_LD14_DATA_LOW 0x20000000 +#define GF_LD14_DATA_HIGH 0x30000000 +#define GF_LD15_DATA_LOW 0x80000000 +#define GF_LD15_DATA_HIGH 0xc0000000 +#define GF_LD0_LD15_DATA_LOW 0xaaaaaaaa +#define GF_LD0_LD15_DATA_HIGH 0xffffffff + +#define OFFSET_PIN_OUTPUT_DATA1 0x0000080b +#define GFSCMD_LD16_PIN_OUTPUT_DATA 0x0000880b +#define GFSCMD_LD17_PIN_OUTPUT_DATA 0x0002880b +#define GFSCMD_LPW0_PIN_OUTPUT_DATA 0x0010880b +#define GFSCMD_LPW1_PIN_OUTPUT_DATA 0x0012880b +#define GFSCMD_LPW2_PIN_OUTPUT_DATA 0x0014880b +#define GFSCMD_LSC0_PIN_OUTPUT_DATA 0x0018880b +#define GFSCMD_LSC1_PIN_OUTPUT_DATA 0x001a880b +#define GFSCMD_LVS_PIN_OUTPUT_DATA 0x001c880b +#define GFSCMD_LHS_PIN_OUTPUT_DATA 0x001e880b +#define GFSCMD_LD16_LD17_PIN_OUTPUT_DATA 0x0020880b + +#define GF_LD16_DATA_LOW 0x00000002 +#define GF_LD16_DATA_HIGH 0x00000003 +#define GF_LD17_DATA_LOW 0x00000008 +#define GF_LD17_DATA_HIGH 0x0000000c +#define GF_LPW0_DATA_LOW 0x00020000 +#define GF_LPW0_DATA_HIGH 0x00030000 +#define GF_LPW1_DATA_LOW 0x00080000 +#define GF_LPW1_DATA_HIGH 0x000c0000 +#define GF_LPW2_DATA_LOW 0x00200000 +#define GF_LPW2_DATA_HIGH 0x00300000 +#define GF_LSC0_DATA_LOW 0x02000000 +#define GF_LSC0_DATA_HIGH 0x03000000 +#define GF_LSC1_DATA_LOW 0x08000000 +#define GF_LSC1_DATA_HIGH 0x0c000000 +#define GF_LVS_DATA_LOW 0x20000000 +#define GF_LVS_DATA_HIGH 0x30000000 +#define GF_LHS_DATA_LOW 0x80000000 +#define GF_LHS_DATA_HIGH 0xc0000000 +#define GF_LD16_LD17_DATA_LOW 0x0000000a +#define GF_LD16_LD17_DATA_HIGH 0x0000000f + + +#define OFFSET_PIN_OUTPUT_DATA2 0x0000080c +#define GFSCMD_LHP0_PIN_OUTPUT_DATA 0x0000880c +#define GFSCMD_LHP1_PIN_OUTPUT_DATA 0x0002880c +#define GFSCMD_LHP2_PIN_OUTPUT_DATA 0x0004880c +#define GFSCMD_LVP0_PIN_OUTPUT_DATA 0x0008880c +#define GFSCMD_LVP1_PIN_OUTPUT_DATA 0x000A880c +#define GFSCMD_LM0_PIN_OUTPUT_DATA 0x0010880c +#define GFSCMD_LM1_PIN_OUTPUT_DATA 0x0012880c +#define GFSCMD_LDI_PIN_OUTPUT_DATA 0x0014880c +#define GFSCMD_LPP_PIN_OUTPUT_DATA 0x0016880c + +#define GF_LHP0_DATA_LOW 0x00000002 +#define GF_LHP0_DATA_HIGH 0x00000003 +#define GF_LHP1_DATA_LOW 0x00000008 +#define GF_LHP1_DATA_HIGH 0x0000000c +#define GF_LHP2_DATA_LOW 0x00000020 +#define GF_LHP2_DATA_HIGH 0x00000030 +#define GF_LVP0_DATA_LOW 0x00000200 +#define GF_LVP0_DATA_HIGH 0x00000300 +#define GF_LVP1_DATA_LOW 0x00000800 +#define GF_LVP1_DATA_HIGH 0x00000c00 +#define GF_LM0_DATA_LOW 0x00020000 +#define GF_LM0_DATA_HIGH 0x00030000 +#define GF_LM1_DATA_LOW 0x00080000 +#define GF_LM1_DATA_HIGH 0x000c0000 +#define GF_LDI_DATA_LOW 0x00200000 +#define GF_LDI_DATA_HIGH 0x00300000 +#define GF_LPP_DATA_LOW 0x00800000 +#define GF_LPP_DATA_HIGH 0x00c00000 + +#define OFFSET_OUTPUT_DATA3 0x0000080d +#define GFSCMD_LSCK_PIN_OUTPUT_DATA 0x0000880d +#define GFSCMD_LSDA_PIN_OUTPUT_DATA 0x0002880d +#define GFSCMD_LCSN_PIN_OUTPUT_DATA 0x0004880d +#define GFSCMD_LDC_PIN_OUTPUT_DATA 0x0006880d +#define GFSCMD_LSPI_PIN_OUTPUT_DATA 0x0008880d + +#define GF_LSCK_DATA_LOW 0x00000002 +#define GF_LSCK_DATA_HIGH 0x00000003 +#define GF_LSDA_DATA_LOW 0x00000008 +#define GF_LSDA_DATA_HIGH 0x0000000c +#define GF_LCSN_DATA_LOW 0x00000020 +#define GF_LCSN_DATA_HIGH 0x00000030 +#define GF_LDC_DATA_LOW 0x00000080 +#define GF_LDC_DATA_HIGH 0x000000c0 +#define GF_LSPI_DATA_LOW 0x00000200 +#define GF_LSPI_DATA_HIGH 0x00000300 + +// Pin Input Enable + +#define GFSCMD_LSPI_PIN_INPUT 0x00088811 +#define GF_LSPI_INPUT_ENABLE 0x00000000 +#define GF_LSPI_INPUT_DISABLE 0x00000100 + +#define GFSCMD_LDC_PIN_INPUT 0x00088411 +#define GF_LDC_INPUT_ENABLE 0x00000000 +#define GF_LDC_INPUT_DISABLE 0x00000040 + +#define GFSCMD_LPP_PIN_INPUT 0x00168811 +#define GF_LPP_INPUT_ENABLE 0x00000000 +#define GF_LPP_INPUT_DISABLE 0x00400000 + +// Pin Output Select + +#define DC_PIN_OUTPUT_SELECT0 0x00000814 +#define GFSCMD_LD0_OUTPUT_SELECT 0x00008814 +#define GFSCMD_LD1_OUTPUT_SELECT 0x00048814 +#define GFSCMD_LD2_OUTPUT_SELECT 0x00088814 +#define GFSCMD_LD3_OUTPUT_SELECT 0x000C8814 +#define GFSCMD_LD4_OUTPUT_SELECT 0x00108814 +#define GFSCMD_LD5_OUTPUT_SELECT 0x00148814 +#define GFSCMD_LD6_OUTPUT_SELECT 0x00188814 +#define GFSCMD_LD7_OUTPUT_SELECT 0x001C8814 +#define GFSCMD_LD0_LD7_OUTPUT_SELECT 0x00208814 + +#define GF_LD0_PIN_FOR_LD0 0 +#define GF_LD0_PIN_FOR_LD0_OUT 1 +#define GF_LD0_PIN_FOR_SC_ 4 +#define GF_LD1_PIN_FOR_LD1 0 +#define GF_LD1_PIN_FOR_LD1_OUT 1 +#define GF_LD1_PIN_FOR_SC 4 +#define GF_LD2_PIN_FOR_LD2 0 +#define GF_LD2_PIN_FOR_LD2_OUT 1 +#define GF_LD2_PIN_FOR_SD0_ 4 +#define GF_LD3_PIN_FOR_LD3 0 +#define GF_LD3_PIN_FOR_LD3_OUT 1 +#define GF_LD3_PIN_FOR_SD0 4 +#define GF_LD4_PIN_FOR_LD4 0 +#define GF_LD4_PIN_FOR_LD4_OUT 1 +#define GF_LD4_PIN_FOR_SD1_ 4 +#define GF_LD5_PIN_FOR_LD5 0 +#define GF_LD5_PIN_FOR_LD5_OUT 1 +#define GF_LD5_PIN_FOR_SD1 4 +#define GF_LD6_PIN_FOR_LD6 0 +#define GF_LD6_PIN_FOR_LD6_OUT 1 +#define GF_LD6_PIN_FOR_STH 4 +#define GF_LD7_PIN_FOR_LD7 0 +#define GF_LD7_PIN_FOR_LD7_OUT 1 +#define GF_LD7_PIN_FOR_SDT 4 +#define GF_LD0_LD7_PIN_FOR_LD0_LD7 0x00000000 +#define GF_LD0_LD7_PIN_FOR_LD0_LD7_OUT 0x11111111 +#define GF_LD0_LD7_PIN_FOR_LPD0_LPD7_OUT 0x22222222 + +#define DC_PIN_OUTPUT_SELECT1 0x00000815 +#define GFSCMD_LD8_OUTPUT_SELECT 0x00008815 +#define GFSCMD_LD9_OUTPUT_SELECT 0x00048815 +#define GFSCMD_LD10_OUTPUT_SELECT 0x00088815 +#define GFSCMD_LD11_OUTPUT_SELECT 0x000C8815 +#define GFSCMD_LD12_OUTPUT_SELECT 0x00108815 +#define GFSCMD_LD13_OUTPUT_SELECT 0x00148815 +#define GFSCMD_LD14_OUTPUT_SELECT 0x00188815 +#define GFSCMD_LD15_OUTPUT_SELECT 0x001C8815 +#define GFSCMD_LD8_LD15_OUTPUT_SELECT 0x00208815 + +#define GF_LD8_PIN_FOR_LD8 0 +#define GF_LD8_PIN_FOR_LD8_OUT 1 +#define GF_LD8_PIN_FOR_LPD8_OUT 2 +#define GF_LD8_PIN_FOR_STP 4 +#define GF_LD9_PIN_FOR_LD9 0 +#define GF_LD9_PIN_FOR_LD9_OUT 1 +#define GF_LD9_PIN_FOR_LPD9_OUT 2 +#define GF_LD9_PIN_FOR_SD2_ 4 +#define GF_LD10_PIN_FOR_LD10 0 +#define GF_LD10_PIN_FOR_LD10_OUT 1 +#define GF_LD10_PIN_FOR_SD2 4 +#define GF_LD11_PIN_FOR_LD11 0 +#define GF_LD11_PIN_FOR_LD11_OUT 1 +#define GF_LD12_PIN_FOR_LD12 0 +#define GF_LD12_PIN_FOR_LD12_OUT 1 +#define GF_LD13_PIN_FOR_LD13 0 +#define GF_LD13_PIN_FOR_LD13_OUT 1 +#define GF_LD14_PIN_FOR_LD14 0 +#define GF_LD14_PIN_FOR_LD14_OUT 1 +#define GF_LD15_PIN_FOR_LD15 0 +#define GF_LD15_PIN_FOR_LD15_OUT 1 +#define GF_LD8_LD15_PIN_FOR_LD8_LD15 0x00000000 +#define GF_LD8_LD15_PIN_FOR_LD8_LD15_OUT 0x11111111 +#define GF_LD8_LD15_PIN_FOR_LPD8_LPD15_OUT 0x22222222 + +#define DC_PIN_OUTPUT_SELECT2 0x00000816 +#define GFSCMD_LD16_OUTPUT_SELECT 0x00008816 +#define GFSCMD_LD17_OUTPUT_SELECT 0x00048816 + +#define GF_LD16_PIN_FOR_LD16 0 +#define GF_LD16_PIN_FOR_LD16_OUT 1 +#define GF_LD17_PIN_FOR_LD17 0 +#define GF_LD17_PIN_FOR_LD17_OUT 1 + +#define OFFSET_PIN_OUTPUT_SELECT3 0x00000817 +#define GFSCMD_LPW0_OUTPUT_SELECT 0x00008817 +#define GFSCMD_LPW1_OUTPUT_SELECT 0x00048817 +#define GFSCMD_LPW2_OUTPUT_SELECT 0x00088817 +#define GFSCMD_LSC0_OUTPUT_SELECT 0x00108817 +#define GFSCMD_LSC1_OUTPUT_SELECT 0x00148817 +#define GFSCMD_LVS_OUTPUT_SELECT 0x00188817 +#define GFSCMD_LHS_OUTPUT_SELECT 0x001c8817 + +#define GF_LPW0_PIN_FOR_PW0 0 +#define GF_LPW0_PIN_FOR_PW0_OUT 1 +#define GF_LPW0_PIN_FOR_PW1 2 +#define GF_LPW0_PIN_FOR_PM0 3 +#define GF_LPW0_PIN_FOR_PW2 4 +#define GF_LPW1_PIN_FOR_PW1 0 +#define GF_LPW1_PIN_FOR_PW1_OUT 1 +#define GF_LPW1_PIN_FOR_PW2 2 +#define GF_LPW1_PIN_FOR_PM1 3 +#define GF_LPW1_PIN_FOR_PW3 4 +#define GF_LPW2_PIN_FOR_PW2 0 +#define GF_LPW2_PIN_FOR_PW2_OUT 1 +#define GF_LPW2_PIN_FOR_PW3 2 +#define GF_LPW2_PIN_FOR_PM0 3 +#define GF_LPW2_PIN_FOR_PW4 4 +#define GF_LSC0_PIN_FOR_LSC0 0 +#define GF_LSC0_PIN_FOR_LSC0_OUT 1 +#define GF_LSC1_PIN_FOR_LSC1 0 +#define GF_LSC1_PIN_FOR_LSC1_OUT 1 +#define GF_LSC1_PIN_FOR_LSC1_DE 2 +#define GF_LVS_PIN_FOR_VSYNC 0 +#define GF_LVS_PIN_FOR_LVS_OUT 1 +#define GF_LVS_PIN_FOR_PM1 3 +#define GF_LHS_PIN_FOR_HSYNC 0 +#define GF_LHS_PIN_FOR_LHS_OUT 1 +#define GF_LHS_PIN_FOR_PM0 3 + +#define OFSSET_PIN_OUTPUT_SELECT4 0x00000818 +#define GFSCMD_LHP0_OUTPUT_SELECT 0x00008818 +#define GFSCMD_LHP1_OUTPUT_SELECT 0x00048818 +#define GFSCMD_LHP2_OUTPUT_SELECT 0x00088818 +#define GFSCMD_LVP0_OUTPUT_SELECT 0x00108818 +#define GFSCMD_LVP1_OUTPUT_SELECT 0x00148818 + +#define GF_LHP0_PIN_FOR_LHP0 0 +#define GF_LHP0_PIN_FOR_LHP0_OUT 1 +#define GF_LHP0_PIN_FOR_LD21 2 +#define GF_LHP0_PIN_FOR_PM0 3 +#define GF_LHP1_PIN_FOR_LHP1 0 +#define GF_LHP1_PIN_FOR_LHP1_OUT 1 +#define GF_LHP1_PIN_FOR_LD18 2 +#define GF_LHP1_PIN_FOR_PM1 3 +#define GF_LHP2_PIN_FOR_LHP2 0 +#define GF_LHP2_PIN_FOR_LHP2_OUT 1 +#define GF_LHP2_PIN_FOR_LD19 2 +#define GF_LHP2_PIN_FOR_PM0 3 +#define GF_LHP2_PIN_FOR_LVP2 4 +#define GF_LVP0_PIN_FOR_LVP0 0 +#define GF_LVP0_PIN_FOR_LVP0_OUT 1 +#define GF_LVP0_PIN_FOR_PM0 3 +#define GF_LVP1_PIN_FOR_LVP1 0 +#define GF_LVP1_PIN_FOR_LVP1_OUT 1 +#define GF_LVP1_PIN_FOR_LD20 2 +#define GF_LVP1_PIN_FOR_PM1 3 +#define GF_LVP1_PIN_FOR_PW4 4 + +#define OFFSET_PIN_OUTPUT_SELECT5 0x00000819 +#define GFSCMD_LM0_OUTPUT_SELECT 0x00008819 +#define GFSCMD_LM1_OUTPUT_SELECT 0x00048819 +#define GFSCMD_LDI_OUTPUT_SELECT 0x00088819 +#define GFSCMD_LPP_OUTPUT_SELECT 0x000c8819 + +#define GF_LM0_PIN_FOR_LM0 0 +#define GF_LM0_PIN_FOR_LM0_OUT 1 +#define GF_LM0_PIN_FOR_SCS 2 +#define GF_LM0_PIN_FOR_PM0 3 +#define GF_LM0_PIN_FOR_LVP2 4 +#define GF_LM1_PIN_FOR_M1 0 +#define GF_LM1_PIN_FOR_LM1_OUT 1 +#define GF_LM1_PIN_FOR_LD21 2 +#define GF_LM1_PIN_FOR_PM1 3 +#define GF_LM1_PIN_FOR_LVP3 4 +#define GF_LDI_PIN_FOR_DI 0 +#define GF_LDI_PIN_FOR_LDI_OUT 1 +#define GF_LDI_PIN_FOR_LD22 2 +#define GF_LDI_PIN_FOR_PM0 3 +#define GF_LDI_PIN_FOR_SCS 4 +#define GF_LPP_PIN_FOR_PP 0 +#define GF_LPP_PIN_FOR_LPP_OUT 1 +#define GF_LPP_PIN_FOR_LD23 2 +#define GF_LPP_PIN_FOR_PM1 3 +#define GF_LPP_PIN_FOR_LVP3 4 + +#define OFFSET_PIN_OUTPUT_SELECT6 0x0000081a +#define GFSCMD_LSCK_OUTPUT_SELECT 0x0000881a +#define GFSCMD_LSDA_OUTPUT_SELECT 0x0004881a +#define GFSCMD_LCSN_OUTPUT_SELECT 0x0008881a +#define GFSCMD_LDC_OUTPUT_SELECT 0x000c881a +#define GFSCMD_LSPI_OUTPUT_SELECT 0x0010881a + +#define GF_LSCK_PIN_FOR_SCK 0 +#define GF_LSCK_PIN_FOR_LSCK_OUT 1 +#define GF_LSCK_PIN_FOR_PM0 3 +#define GF_LSDA_PIN_FOR_SDA 0 +#define GF_LSDA_PIN_FOR_LSDA_OUT 1 +#define GF_LSDA_PIN_FOR_SCS 2 +#define GF_LSDA_PIN_FOR_PM1 3 +#define GF_LCS_PIN_FOR_MCS 0 +#define GF_LCS_PIN_FOR_LCS_OUT 1 +#define GF_LCS_PIN_FOR_PM0 3 +#define GF_LDC_PIN_FOR_SDC 0 +#define GF_LDC_PIN_FOR_LDC_OUT 1 +#define GF_LDC_PIN_FOR_LD22 2 +#define GF_LDC_PIN_FOR_PM1 3 +#define GF_LSPI_PIN_FOR_SPI 0 +#define GF_LSPI_PIN_FOR_LSPI_OUT 1 +#define GF_LSPI_PIN_FOR_DE 2 +#define GF_LSPI_PIN_FOR_PM0 3 +#define GF_LSPI_PIN_FOR_PCLK 4 + + +//#define OFFSET_PIN_MISC_CONTROL 0x0000081b +//#define DISP_CLOCK_OUTPUT_MASK +//#define DISP_CLOCK_OUTPUT_SHIFT +//#define DISP_CLOCK_OUTPUT_DISABLE +//#define DISP_CLOCK_OUTPUT_ENABLE + +#define OFFSET_PM0_CONTROL 0x0000081c +#define GFSCMD_PM0_CLOCK_SELECT 0x0000881c +#define GFSCMD_PM0_CLOCK_DIVIDER 0x0004881c +#define GFSCMD_PM0_PERIOD 0x0012881c + +#define GF_PM0_SHIFT_CLOCK 0x00000000 +#define GF_PM0_PIXEL_CLOCK 0x00000001 +#define GF_PM0_LINE_CLOCK 0x00000002 +#define GF_PM0_FRAME_CLOCK 0x00000003 +#define GF_PM0_CLOCK_DIVIDER_VAL 0x00000010 +#define GF_PM0_PERIOD_VAL 0x00040000 + +#define OFFSET_PM0_DUTY_CYCLE 0x0000081d +#define GFSCMD_PM0_DUTY_CYCLE 0x0000881d + +#define GF_PM0_DUTY_CYCLE_VAL 0x00000000 + +#define OFFSET_PM1_CONTROL 0x0000081e +#define GFSCMD_PM1_CLOCK_SELECT 0x0000881e +#define GFSCMD_PM1_CLOCK_DIVIDER 0x0004881e +#define GFSCMD_PM1_PERIOD 0x0012881e + +#define GF_PM1_SHIFT_CLOCK 0x00000000 +#define GF_PM1_PIXEL_CLOCK 0x00000001 +#define GF_PM1_LINE_CLOCK 0x00000002 +#define GF_PM1_FRAME_CLOCK 0x00000003 +#define GF_PM1_CLOCK_DIVIDER_VAL 0x00000010 +#define GF_PM1_PERIOD_VAL 0x00040000 + +#define OFFSET_PM1_DUTY_CYCLE 0x0000081f +#define GFSCMD_PM1_DUTY_CYCLE 0x0000881f + +#define GF_PM1_DUTY_CYCLE_VAL 0x00000000 + +//////////////////////// +#define OFFSET_SPI_CONTROL 0x00000820 +#define GFSCMD_SPI_SERIAL_CLK_CONTROL 0x00008820 +#define GFSCMD_SPI_DATA_DIRECTION 0x00038820 +#define GFSCMD_SPI_BITS_PER_CYCLE 0x00048820 +#define GFSCMD_SPI_CLK_DIVIDER_1_32 0x00108820 +#define GFSCMD_SPI_STATUS 0x00188820 + +#define GF_SPI_1SCLK_CS_RISING_EDGE_ACTV 0x00000000 +#define GF_SPI_2SCLK_CS_RISING_EDGE_ACTV 0x00000001 +#define GF_SPI_1SCLK_CS_FALLING_EDGE_ACTV 0x00000002 +#define GF_SPI_2SCLK_CS_FALLING_EDGE_ACTV 0x00000003 +#define GF_SPI_MSB2LSB 0x00000000 +#define GF_SPI_LSB2MSB 0x00000008 +#define GF_SPI8 0x00000000 +#define GF_SPI8DC 0x00000010 +#define GF_SPI12 0x00000020 +#define GF_SPI16 0x00000030 +#define GF_SPI16DC 0x00000040 +#define GF_START_BYTE_PLUS_SPI16 0x00000050 +#define GF_SPI18 0x00000060 +#define GF_SPI24 0x00000070 +//#define GF_SPI_CLK_DIVIDER_1_32_VAL +#define GF_SPI_STATUS_DISABLE 0x00000000 +#define GF_STATUS_ENABLE_HOST_SPI 0x01000000 +#define GF_STATUS_ENABLE_HOST_IS_SPI 0x02000000 +#define GF_STATUS_ENABLE_ALL_SPI_CYCL 0x03000000 + +//#define OFFSET_HSPI_START_BYTE 0x00000821 +#define GFSCMD_HSPI_DATA_START_BYTE 0x00008821 +#define GFSCMD_HSPI_START_BYTE 0x00008821 +//#define GFSCMD_HSPI_COMMAND_START_BYTE 0x00088821 + +//#define OFFSET_HSPI_WRITE_DATA_CD 0x00000822 +#define GFSCMD_HSPI_WRITE_DATA_A 0x00008822 +#define GFSCMD_HSPI_WRITE_DATA_B 0x00088822 +#define GFSCMD_HSPI_WRITE_DATA_AB 0x00208822 + +//#define OFFSET_HSPI_WRITE_DATA_CD 0x00000823 +#define GFSCMD_HSPI_WRITE_DATA_C 0x00008823 +#define GFSCMD_HSPI_WRITE_DATA_D 0x00088823 +#define GFSCMD_HSPI_WRITE_DATA_CD 0x00208823 + +#define GF_HSPI_CMD_CYCLE1 0 +#define GF_HSPI_CMD_CYCLE2 0 +#define GF_HSPI_CMD_CYCLE3 0 +#define GF_HSPI_CMD_CYCLE4 0 + +#define GF_HSPI_DATA_CYCLE1 1 +#define GF_HSPI_DATA_CYCLE2 2 +#define GF_HSPI_DATA_CYCLE3 4 +#define GF_HSPI_DATA_CYCLE4 8 + +#define GF_HSPI_MAIN_CS_CYCLE1 1 +#define GF_HSPI_MAIN_CS_CYCLE2 2 +#define GF_HSPI_MAIN_CS_CYCLE3 4 +#define GF_HSPI_MAIN_CS_CYCLE4 8 + +#define GF_HSPI_SUB_CS_CYCLE1 1 +#define GF_HSPI_SUB_CS_CYCLE2 2 +#define GF_HSPI_SUB_CS_CYCLE3 4 +#define GF_HSPI_SUB_CS_CYCLE4 8 + +////////////////////////// + +#if 0 +// LCD SPI interface signals + +#define DC_P_LCD_SPI_OPTIONS 0x00000135 +#define GF_LCD_SPI_CS 0x00008135 +#define GF_LCD_SPI_DC 0x00018135 +#define GF_SPI_CS_CONTROL 0x00028135 +#define GF_LCD_SPI_DIRECTION 0x00048135 + +#define GF_LCD_SPI_CS_MAIN 0x00000000 +#define GF_LCD_SPI_CS_SUB 0x00000001 +#define GF_LCD_SPI_DC_LOW 0x00000000 +#define GF_LCD_SPI_DC_HIGH 0x00000002 +#define GF_SPI_CS_CONTROL_LCD_IS_SPI 0x00000000 +#define GF_SPI_CS_CONTROL_LCD_SPI 0x00000004 +#define GF_SPI_CS_CONTROL_IS_SPI 0x00000008 +#define GF_SPI_CS_CONTROL_FORCED 0x0000000C +#define GF_LCD_SPI_DIRECTION_MSB2LSB 0x00000000 +#define GF_LCD_SPI_DIRECTION_LSB2MSB 0x00000010 +#endif + +// Class: Initialization Sequence (IS) + +#define OFSSET_P_INIT_SEQ_CONTROL 0x00000141 +#define GFSCMD_SEND_INIT_SEQUENCE 0x00008141 +#define GFSCMD_INIT_SEQUENCE_MODE_PLCD 0x00018141 +#define GFSCMD_INIT_SEQ_DC_SIGNAL_NODC 0x00048141 +#define GFSCMD_INIT_SEQ_DC_CONTROL 0x00078141 +#define GFSCMD_FRAME_INIT_SEQ_CYCLES 0x00088141 + +#define GF_SEND_INIT_SEQUENCE_DISABLE 0x00000000 +#define GF_SEND_INIT_SEQUENCE_ENABLE 0x00000001 +#define GF_INIT_SEQUENCE_MODE_PLCD_INIT 0x00000000 +#define GF_INIT_SEQUENCE_MODE_SPI_INIT 0x00000002 +#define GF_INIT_SEQ_SIGNAL_NODC 0x00000000 +#define GF_INIT_SEQ_SIGNAL_VSYNC 0x00000010 +#define GF_INIT_SEQ_SIGNAL_VPULSE0 0x00000020 +#define GF_INIT_SEQ_SIGNAL_VPULSE1 0x00000030 +#define GF_INIT_SEQ_SIGNAL_VPULSE2 0x00000040 +#define GF_INIT_SEQ_SIGNAL_VPULSE3 0x00000050 +#define GF_INIT_SEQ_CONTROL 0x00000080 + +//#define GF_FRAME_INIT_SEQ_CYCLES 0x00000100 + + +// SPI Init Sequence Write Data bits 31-0 +#define DC_P_SPI_INIT_SEQ_DATA_A 0x00000142 +#define GFSCMD_SPI_INIT_SEQ_DATA_A 0x00008142 + +// SPI Init Sequence Write Data bits 63-32 +#define DC_P_SPI_INIT_SEQ_DATA_B 0x00000143 +#define GFSCMD_SPI_INIT_SEQ_DATA_B 0x00008143 + +// SPI Init Sequence Write Data bits 95-64 +#define DC_P_SPI_INIT_SEQ_DATA_C 0x00000144 +#define GFSCMD_SPI_INIT_SEQ_DATA_C 0x00008144 + +// SPI Init Sequence Write Data bits 127-96 +#define DC_P_SPI_INIT_SEQ_DATA_D 0x00000145 +#define GFSCMD_SPI_INIT_SEQ_DATA_D 0x00008145 + +#define OFFSET_DISPLAY_COMMAND 0x00000003 +#define GFSCMD_DISPLAY_CTRL_MODE 0x00058003 + +#define GF_CTRL_MODE_STOP 0x00000000 +#define GF_CTRL_MODE_C_DISPLAY 0x00000020 +#define GF_CTRL_MODE_NC_DISPLAY 0x00000040 +#define GF_CTRL_MODE_NOCHANGE 0x000000C0 + + +/* Other Commands */ + +#define GF_NO_DATA 0x00000000 +#define GFSCMD_LVDD_ON 0x01020000 +#define GFSCMD_LVDD_OFF 0x01020001 + +#define GFSCMD_RESET_LHP2 0x0104880c +#define GFSCMD_RESET_LVP0 0x0108880c +#define GFSCMD_MS_DELAY 0x01005A5A +#define GFSCMD_WAIT_VBLANK 0x01005555 +#define GFSCMD_END_OF_TABLE 0x0100ffff +#define GFSCMD_I2C_A_PAL_PLL2_CLK 0x0100F000 + +#define GFSDEFAULT_CMD 0x10000000 // Default settings +#define GFSDEFAULT_BACKLIGHT0 0x10000001 +#define GF_ON_LPW2 0x00000000 +#define GF_ON_LPW0 0x00000001 + +#define GFSDEFAULT_BACKLIGHT1 0x10000002 +#define GF_ON_LM1 0x00000000 +#define GF_ON_LPW1 0x00000001 + +#define GFPDRV_CMD 0x20000000 +#define GFHOST_CMD 0x40000000 +#define GFSCMD_PANEL_PKT_HEADER_START 0x40000000 + +#define GF_DLY_AFTR_DATA_SENT_MASK 0x00002000 +#define GF_A_2MS_DLY_AFTR_DATA_SENT 0x00000000 +#define GF_A_NO_DLY_AFTR_DATA_SENT 0x00002000 + +#define GF_RAISE_WAIT_AFTR_DATA_SENT_MASK 0x00001000 +#define GF_A_RAISE_WAIT_AFTR_DATA_SENT 0x00001000 + +#define GF_DATA_BURST_MASK 0x000000ff +#define GF_A_DATA_BURST0 0x00000000 +#define GF_A_DATA_BURST1 0x00000001 +#define GF_A_DATA_BURST2 0x00000002 +#define GF_A_DATA_BURST3 0x00000003 +#define GF_A_DATA_BURST4 0x00000004 +#define GF_A_DATA_BURST5 0x00000005 +#define GF_A_DATA_BURST6 0x00000006 +#define GF_A_DATA_BURST7 0x00000007 +#define GF_A_DATA_BURST8 0x00000008 + +#define GF_CS_MASK 0x000f0000 +#define GF_A_MCS_ACTVH 0x00010000 +#define GF_A_MCS_ACTVL 0x00020000 +#define GF_A_SCS_ACTVH 0x00030000 +#define GF_A_SCS_ACTVL 0x00040000 + +#define GF_RS_DC_MASK 0x00f00000 +#define GF_A_RS_DC_IXH_DATAL 0x00100000 +#define GF_A_RS_DC_IXL_DATAL 0x00200000 +#define GF_A_RS_DC_IXL_DATAH 0x00300000 +#define GF_A_RS_DC_IXH_DATAH 0x00400000 + +#define GF_IFACE_MASK 0x00008f00 +#define GF_A_IFACE_PRLL 0x00008000 + +#define GF_A_IFACE_PRLL_8 0x00008100 +#define GF_A_IFACE_PRLL_9 0x00008200 +#define GF_A_IFACE_PRLL_16 0x00008300 +#define GF_A_IFACE_PRLL_18 0x00008400 +#define GF_A_IFACE_SPI_8 0x00000100 +#define GF_A_IFACE_SPI_8DC 0x00000200 +#define GF_A_IFACE_SPI_12 0x00000300 +#define GF_A_IFACE_SPI_16 0x00000400 +#define GF_A_IFACE_SPI_16DC 0x00000500 +#define GF_A_IFACE_SPI_16_START8 0x00000600 +#define GF_A_IFACE_SPI_18 0x00000700 +#define GF_A_IFACE_SPI_24 0x00000800 +#define GF_A_IF_LSB_ALINED 0x00004000 +#define GF_A_IF_MSB_ALINED 0x00000000 +#define GF_IF_ALINED_MASK 0x00004000 + +#define GF_CLK_PER_PIXEL_MASK 0x3f000000 +#define GF_A_1CLK_PIXEL 0x01000000 +#define GF_A_2CLK_PIXEL 0x02000000 +#define GF_A_3CLK_PIXEL 0x03000000 +#define GF_A_4CLK_PIXEL 0x04000000 +#define GF_A_24CLK_PIXEL 0x18000000 + +// Parellel +#define GF_A_DATA_VLD_MASK 0xC0000000 +#define GF_A_DATA_VLD_CLK_RISE 0x40000000 +#define GF_A_DATA_VLD_CLK_FALL 0x80000000 + +// Serial + +#define GF_SPI_SCLK_CS_EDGE_ACTV_MASK 0xC0000000 +#define GF_A_SPI_1SCLK_CS_RISING_EDGE_ACTV 0x40000000 +#define GF_A_SPI_2SCLK_CS_RISING_EDGE_ACTV 0x00000000 +#define GF_A_SPI_1SCLK_CS_FALLING_EDGE_ACTV 0xC0000000 +#define GF_A_SPI_2SCLK_CS_FALLING_EDGE_ACTV 0x80000000 + +#define GF_A_SPI_CS_ACTVH 0x00010000 +#define GF_A_SPI_CS_ACTVL 0x00020000 + +#define GF_SPI_RS_DC_MASK 0x00f00000 +#define GF_A_SPI_RS_DC_IXH_DATAL 0x00100000 +#define GF_A_SPI_RS_DC_IXL_DATAL 0x00200000 +#define GF_A_SPI_RS_DC_IXL_DATAH 0x00300000 +#define GF_A_SPI_RS_DC_IXH_DATAH 0x00400000 + + +#define GF_B_ 0x00000000 +#define GF_C_ 0x00000000 + +#define GF_SPI_DATA_START_BYTE 0x00000000 +#define GF_SPI_CMD_START_BYTE 0x00000000 +#define GF_PANEL_DRV_CMD_DATA ~0x0000ffff +#define GFSCMD_PANEL_PKT_HEADER_END 0x40008000 + +#define GFPERIODIC_CMD 0x4000C000 +#define GFSCMD_PERIODIC_PKT_HEADER_START 0x4000C000 +#define GFSCMD_PERIODIC_PKT_HEADER_SIZE 0x0000000A + +#define GF_IS_PERDC_MSB9_LSB9_SWAP_MASK 0x00800000 +#define GF_IS_PERDC_MSB9_LSB9_SWAP 0x00800000 + +#define GF_IS_PERDC_PARLL_CYCLE_MASK 0x0000000f +#define GF_IS_PERDC_PARLL_CYCLE0 0x00000000 +#define GF_IS_PERDC_PARLL_CYCLE1 0x00000001 +#define GF_IS_PERDC_PARLL_CYCLE2 0x00000002 +#define GF_IS_PERDC_PARLL_CYCLE3 0x00000003 +#define GF_IS_PERDC_PARLL_CYCLE4 0x00000004 +#define GF_IS_PERDC_PARLL_CYCLE5 0x00000005 +#define GF_IS_PERDC_PARLL_CYCLE6 0x00000006 +#define GF_IS_PERDC_PARLL_CYCLE7 0x00000007 +#define GF_IS_PERDC_PARLL_CYCLE8 0x00000008 +#define GF_IS_PERDC_PARLL_CYCLE9 0x00000009 +#define GF_IS_PERDC_PARLL_CYCLE10 0x0000000A +#define GF_IS_PERDC_PARLL_CYCLE11 0x0000000B +#define GF_IS_PERDC_PARLL_CYCLE12 0x0000000C + +#define GF_IS_PERDC_PARLL_IF_MASK 0xf0000000 +#define GF_IS_PERDC_PARLL_IF_8 0x00000000 +#define GF_IS_PERDC_PARLL_IF_9 0x10000000 +#define GF_IS_PERDC_PARLL_IF_18 0x20000000 +#define GF_IS_PERDC_PARLL_IF_16 0x30000000 + +#define GF_IS_PERDC_PARLL_MAX_DATA_MASK 0x0000ff00 +#define GF_IS_PERDC_PARLL_MAX_DATA_IF_8 0x00005900 +#define GF_IS_PERDC_PARLL_MAX_DATA_IF_9 0x00005900 +#define GF_IS_PERDC_PARLL_MAX_DATA_IF_16 0x00006B00 +#define GF_IS_PERDC_PARLL_MAX_DATA_IF_18 0x00006B00 + +#define GFIS_PRLL_EN_RS_DC_C 0 +#define GFIS_PRLL_EN_RS_DC_D 0 + +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_1_D (1 << (108-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_2_D (1 << (111-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_3_D (1 << (114-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_4_D (1 << (117-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_5_D (1 << (120-96)) +#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_6_D (1 << (123-96)) + +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_1_D (1 << (109-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_2_D (1 << (112-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_3_D (1 << (115-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_4_D (1 << (118-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_5_D (1 << (121-96)) +#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_6_D (1 << (124-96)) + +#define GFIS_PRLL_RS_CD_18_CYCLE_1_H_D (1 << (110-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_1_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_2_H_D (1 << (113-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_2_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_3_H_D (1 << (116-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_3_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_4_H_D (1 << (119-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_4_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_5_H_D (1 << (122-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_5_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_18_CYCLE_6_H_D (1 << (125-96)) +#define GFIS_PRLL_RS_CD_18_CYCLE_6_L_D 0x00000000 + +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_1_C (1 << (90-64)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_2_C (1 << (93-64)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_3_D (1 << (96-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_4_D (1 << (99-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_5_D (1 << (102-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_6_D (1 << (105-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_7_D (1 << (108-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_8_D (1 << (111-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_9_D (1 << (114-96)) +#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_10_D (1 << (117-96)) + +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_1_C (1 << (91-64)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_2_C (1 << (94-64)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_3_D (1 << (97-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_4_D (1 << (100-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_5_D (1 << (103-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_6_D (1 << (106-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_7_D (1 << (109-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_8_D (1 << (112-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_9_D (1 << (115-96)) +#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_10_D (1 << (118-96)) + +#define GFIS_PRLL_RS_CD_9_CYCLE_1_H_C (1 << (92-64)) +#define GFIS_PRLL_RS_CD_9_CYCLE_1_L_C 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_2_H_C (1 << (95-64)) +#define GFIS_PRLL_RS_CD_9_CYCLE_2_L_C 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_3_H_D (1 << (98-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_3_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_4_H_D (1 << (101-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_4_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_5_H_D (1 << (104-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_5_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_6_H_D (1 << (107-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_6_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_7_H_D (1 << (110-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_7_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_8_H_D (1 << (113-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_8_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_9_H_D (1 << (116-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_9_L_D 0x00000000 +#define GFIS_PRLL_RS_CD_9_CYCLE_10_H_D (1 << (119-96)) +#define GFIS_PRLL_RS_CD_9_CYCLE_10_L_D 0x00000000 + +// Serial + +#define GF_IS_PERDC_SERIAL_CYCLE_MASK 0x0000000f +#define GF_IS_PERDC_SERIAL_CYCLE0 0x00000000 +#define GF_IS_PERDC_SERIAL_CYCLE1 0x00000001 +#define GF_IS_PERDC_SERIAL_CYCLE2 0x00000002 +#define GF_IS_PERDC_SERIAL_CYCLE3 0x00000003 +#define GF_IS_PERDC_SERIAL_CYCLE4 0x00000004 +#define GF_IS_PERDC_SERIAL_CYCLE5 0x00000005 +#define GF_IS_PERDC_SERIAL_CYCLE6 0x00000006 +#define GF_IS_PERDC_SERIAL_CYCLE7 0x00000007 +#define GF_IS_PERDC_SERIAL_CYCLE8 0x00000008 +#define GF_IS_PERDC_SERIAL_CYCLE9 0x00000009 +#define GF_IS_PERDC_SERIAL_CYCLE10 0x0000000A +#define GF_IS_PERDC_SERIAL_CYCLE11 0x0000000B +#define GF_IS_PERDC_SERIAL_CYCLE12 0x0000000C + +#define GF_IS_PERDC_SERIAL_IF_MASK 0xf0000000 +#define GF_IS_PERDC_SERIAL_IF_8 0x80000000 +#define GF_IS_PERDC_SERIAL_IF_9 0x90000000 +#define GF_IS_PERDC_SERIAL_IF_12 0xA0000000 +#define GF_IS_PERDC_SERIAL_IF_16 0xB0000000 +#define GF_IS_PERDC_SERIAL_IF_18 0xC0000000 +#define GF_IS_PERDC_SERIAL_IF_24 0xD0000000 + +#define GF_IS_PERDC_SERIAL_MAX_DATA_MASK 0x0000ff00 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_8 0x00005900 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_9 0x00005900 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_12 0x00006A00 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_16 0x00006B00 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_18 0x00006C00 +#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_24 0x00006D00 + +#define GFIS_SERIAL_EN_RS_DC_C 0 +#define GFIS_SERIAL_EN_RS_DC_D 0 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_1_D (1 << (96-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_2_D (1 << (98-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_3_D (1 << (100-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_4_D (1 << (102-96)) + +#define GFIS_SERIAL_RS_CD_24_CYCLE_1_H_D (1 << (97-96)) +#define GFIS_SERIAL_RS_CD_24_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_24_CYCLE_2_H_D (1 << (99-96)) +#define GFIS_SERIAL_RS_CD_24_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_24_CYCLE_3_H_D (1 << (101-96)) +#define GFIS_SERIAL_RS_CD_24_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_24_CYCLE_4_H_D (1 << (103-96)) +#define GFIS_SERIAL_RS_CD_24_CYCLE_4_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_1_D (1 << (108-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_2_D (1 << (110-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_3_D (1 << (112-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_4_D (1 << (114-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_5_D (1 << (116-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_6_D (1 << (118-96)) + +#define GFIS_SERIAL_RS_CD_18_CYCLE_1_H_D (1 << (109-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_2_H_D (1 << (111-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_3_H_D (1 << (113-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_4_H_D (1 << (115-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_5_H_D (1 << (117-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_18_CYCLE_6_H_D (1 << (119-96)) +#define GFIS_SERIAL_RS_CD_18_CYCLE_6_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_1_D (1 << (112-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_2_D (1 << (114-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_3_D (1 << (116-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_4_D (1 << (118-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_5_D (1 << (120-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_6_D (1 << (122-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_7_D (1 << (124-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_7_D (1 << (124-96)) + +#define GFIS_SERIAL_RS_CD_16_CYCLE_1_H_D (1 << (113-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_2_H_D (1 << (115-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_3_H_D (1 << (117-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_4_H_D (1 << (119-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_5_H_D (1 << (121-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_6_H_D (1 << (123-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_6_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_16_CYCLE_7_H_D (1 << (125-96)) +#define GFIS_SERIAL_RS_CD_16_CYCLE_7_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_1_D (1 << (109-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_2_D (1 << (111-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_3_D (1 << (113-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_4_D (1 << (115-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_5_D (1 << (117-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_6_D (1 << (119-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_7_D (1 << (121-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_8_D (1 << (123-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_9_D (1 << (125-96)) + +#define GFIS_SERIAL_RS_CD_12_CYCLE_1_H_D (1 << (110-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_2_H_D (1 << (112-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_3_H_D (1 << (114-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_4_H_D (1 << (116-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_5_H_D (1 << (118-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_6_H_D (1 << (120-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_6_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_7_H_D (1 << (122-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_7_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_8_H_D (1 << (124-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_8_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_12_CYCLE_9_H_D (1 << (126-96)) +#define GFIS_SERIAL_RS_CD_12_CYCLE_9_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_1_D (1 << (99-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_2_D (1 << (101-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_3_D (1 << (103-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_4_D (1 << (105-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_5_D (1 << (107-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_6_D (1 << (109-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_7_D (1 << (111-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_8_D (1 << (113-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_9_D (1 << (115-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_10_D (1 << (117-96)) + +#define GFIS_SERIAL_RS_CD_9_CYCLE_1_H_D (1 << (100-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_2_H_D (1 << (102-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_3_H_D (1 << (104-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_4_H_D (1 << (106-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_5_H_D (1 << (108-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_6_H_D (1 << (110-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_6_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_7_H_D (1 << (112-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_7_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_8_H_D (1 << (114-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_8_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_9_H_D (1 << (116-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_9_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_9_CYCLE_10_H_D (1 << (118-96)) +#define GFIS_SERIAL_RS_CD_9_CYCLE_10_L_D 0x00000000 + +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_1_D (1 << (96-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_2_D (1 << (98-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_3_D (1 << (100-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_4_D (1 << (102-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_5_D (1 << (104-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_6_D (1 << (106-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_7_D (1 << (108-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_8_D (1 << (110-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_9_D (1 << (112-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_10_D (1 << (114-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_11_D (1 << (116-96)) +#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_12_D (1 << (118-96)) + +#define GFIS_SERIAL_RS_CD_8_CYCLE_1_H_D (1 << (97-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_1_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_2_H_D (1 << (99-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_2_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_3_H_D (1 << (101-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_3_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_4_H_D (1 << (103-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_4_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_5_H_D (1 << (105-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_5_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_6_H_D (1 << (107-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_6_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_7_H_D (1 << (109-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_7_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_8_H_D (1 << (111-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_8_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_9_H_D (1 << (113-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_9_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_10_H_D (1 << (115-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_10_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_11_H_D (1 << (117-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_11_L_D 0x00000000 +#define GFIS_SERIAL_RS_CD_8_CYCLE_12_H_D (1 << (119-96)) +#define GFIS_SERIAL_RS_CD_8_CYCLE_12_L_D 0x00000000 + +#define GFSCMD_PERIODIC_PKT_HEADER_END 0x4000E000 + +#define GFSCMD_I2C_PKT_HEADER_START 0x4000A000 + +#define GF_I2C_DATA_BURST_MASK 0x000000ff +#define GF_I2C_A_DATA_BURST0 0x00000000 +#define GF_I2C_A_DATA_BURST1 0x00000001 +#define GF_I2C_A_DATA_BURST2 0x00000002 +#define GF_I2C_A_DATA_BURST3 0x00000003 +#define GF_I2C_A_DATA_BURST4 0x00000004 +#define GF_I2C_A_DATA_BURST5 0x00000005 +#define GF_I2C_A_DATA_BURST6 0x00000006 +#define GF_I2C_A_DATA_BURST7 0x00000007 +#define GF_I2C_A_DATA_BURST8 0x00000008 + +#define GF_HW_SW_I2C_MASK 0x00000300 +#define GF_HW_I2C 0x00000000 +#define GF_SW_I2C 0x00000100 +#define GF_I2C_B_WRITE_ID 0x00000000 +#define GF_I2C_C_READ_ID 0x00000000 +#define GFSCMD_I2C_PKT_HEADER_END 0x4000B000 + + +//SDIO GPIOs + +#define GFSCMD_GPIO_SD_INIT 0x00008f00 //One time Init SD GPIO +#define GF_NO_DATA 0x00000000 + +#define GFSCMD_GPIO_SD_PIN_SDGP0 0x00008f01 +#define GFSCMD_GPIO_SD_PIN_SDGP1 0x00018f01 +#define GFSCMD_GPIO_SD_PIN_CMD 0x00028f02 +#define GFSCMD_GPIO_SD_PIN_CLK 0x00038f02 +#define GFSCMD_GPIO_SD_PIN_DATA0 0x00048f00 +#define GFSCMD_GPIO_SD_PIN_DATA1 0x00048f01 +#define GFSCMD_GPIO_SD_PIN_DATA2 0x00048f02 +#define GFSCMD_GPIO_SD_PIN_DATA3 0x00048f03 + +#define GF_GPIO_PIN_OUTPUT_ENABLE 0x00000000 +#define GF_GPIO_PIN_INPUT_ENABLE 0x00000001 +#define GF_GPIO_PIN_DISABLE 0x00000002 +#define GF_GPIO_PIN_HIGH 0x00000003 +#define GF_GPIO_PIN_LOW 0x00000004 + +#endif //__GFDISPCMDDATA_H__ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDx.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDx.h new file mode 100755 index 00000000..cca38e76 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFDx.h @@ -0,0 +1,1847 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFDx.h + GFSDK Display Initialization API header file. + */ + +#ifndef GF_DX_H +#define GF_DX_H + +#include "GFDispCmdData.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupDx DxAPI Display Initialization API +
        +
      • @ref pageDxAppNotes +
          +
        • @ref pageDxAppNotes1 +
        +
      +*/ +/*@{*/ + +/** GFDxAPI color info to be used during programming GFDxErase*/ +#define GFDX_COLOR_RED 0xF800F800 +#define GFDX_COLOR_GREEN 0x07E007E0 +#define GFDX_COLOR_BLUE 0x001F001F + + + +/** GFDxAPI error code: Function not supported. */ +#define GFDX_ERROR_NO_SUPPORT (GFDX_ERROR | 2) +/** GFDxAPI error code: Invalid attribute ID for GFDxSetAttribute() / GFDxGetAttribute(). */ +#define GFDX_ERROR_INVALID_ATTRIBUTE (GFDX_ERROR | 6) + +/** + This struct is used by GFDxGetProperty(). + * */ +typedef struct _GFDXPROPERTY +{ + /** standard GF property, following info is available as cap */ + GFPROPERTY Prop; + /** Not supported */ + NvU16 LcdWidth; + /** Not supported */ + NvU16 LcdHeight; + /** Not supported */ + NvU16 LcdIndex; + /** Not supported */ + char LcdName[18]; + /** Not supported */ + NvU16 SubLcdWidth; + /** Not supported */ + NvU16 SubLcdHeight; + /** Not supported */ + NvU16 SubLcdIndex; + /** Not supported */ + char SubLcdName[18]; + +} GFDXPROPERTY, *PGFDXPROPERTY; + +#define DC_P_A_BLEND_2WIN_B DC_P_B_BLEND_2WIN_A +#define DC_P_A_BLEND_2WIN_C DC_P_B_BLEND_2WIN_C + +#define DC_P_C_BLEND_2WIN_A DC_P_B_BLEND_2WIN_A +#define DC_P_C_BLEND_2WIN_B DC_P_B_BLEND_2WIN_C + +//#define DC_P_B_BLEND_2WIN_B DC_P_B_BLEND_2WIN_C +#define P_B_CKEY_ENABLE_2WIN_B_CKEY0 P_B_CKEY_ENABLE_2WIN_C_CKEY0 +#define P_B_CKEY_ENABLE_2WIN_B_CKEY1 P_B_CKEY_ENABLE_2WIN_C_CKEY1 +#define P_B_BLEND_CONTROL_2WIN_B_MASK P_B_BLEND_CONTROL_2WIN_C_MASK +#define P_B_BLEND_CONTROL_2WIN_B_ALPHA_WEIGHT P_B_BLEND_CONTROL_2WIN_C_ALPHA_WEIGHT +#define P_B_BLEND_CONTROL_2WIN_B_DEPENDENT_WEIGHT P_B_BLEND_CONTROL_2WIN_C_DEPENDENT_WEIGHT +#define P_B_BLEND_WEIGHT0_2WIN_B_MASK P_B_BLEND_WEIGHT0_2WIN_C_MASK +#define P_B_BLEND_WEIGHT0_2WIN_B_SHIFT P_B_BLEND_WEIGHT0_2WIN_C_SHIFT +#define P_B_BLEND_WEIGHT1_2WIN_B_MASK P_B_BLEND_WEIGHT1_2WIN_C_MASK +#define P_B_BLEND_WEIGHT1_2WIN_B_SHIFT P_B_BLEND_WEIGHT1_2WIN_C_SHIFT + +//#define DC_P_B_BLEND_3WIN_AB DC_P_B_BLEND_3WIN_AC +#define DC_P_A_BLEND_3WIN_BC DC_P_B_BLEND_3WIN_AC +#define P_B_CKEY_ENABLE_3WIN_AB_CKEY0 P_B_CKEY_ENABLE_3WIN_AC_CKEY0 +#define P_B_CKEY_ENABLE_3WIN_AB_CKEY1 P_B_CKEY_ENABLE_3WIN_AC_CKEY1 +#define P_B_BLEND_CONTROL_3WIN_AB_MASK P_B_BLEND_CONTROL_3WIN_AC_MASK +#define P_B_BLEND_CONTROL_3WIN_AB_ALPHA_WEIGHT P_B_BLEND_CONTROL_3WIN_AC_ALPHA_WEIGHT +#define P_B_BLEND_CONTROL_3WIN_AB_DEPENDENT_WEIGHT P_B_BLEND_CONTROL_3WIN_AC_DEPENDENT_WEIGHT +#define P_B_BLEND_WEIGHT0_3WIN_AB_MASK P_B_BLEND_WEIGHT0_3WIN_AC_MASK +#define P_B_BLEND_WEIGHT0_3WIN_AB_SHIFT P_B_BLEND_WEIGHT0_3WIN_AC_SHIFT +#define P_B_BLEND_WEIGHT1_3WIN_AB_MASK P_B_BLEND_WEIGHT1_3WIN_AC_MASK +#define P_B_BLEND_WEIGHT1_3WIN_AB_SHIFT P_B_BLEND_WEIGHT1_3WIN_AC_SHIFT + +//#define DC_P_B_BLEND_3WIN_BC DC_P_B_BLEND_3WIN_AC +#define DC_P_C_BLEND_3WIN_AB DC_P_B_BLEND_3WIN_AC +#define P_B_CKEY_ENABLE_3WIN_BC_CKEY0 P_B_CKEY_ENABLE_3WIN_AC_CKEY0 +#define P_B_CKEY_ENABLE_3WIN_BC_CKEY1 P_B_CKEY_ENABLE_3WIN_AC_CKEY1 +#define P_B_BLEND_CONTROL_3WIN_BC_MASK P_B_BLEND_CONTROL_3WIN_AC_MASK +#define P_B_BLEND_CONTROL_3WIN_BC_ALPHA_WEIGHT P_B_BLEND_CONTROL_3WIN_AC_ALPHA_WEIGHT +#define P_B_BLEND_CONTROL_3WIN_BC_DEPENDENT_WEIGHT P_B_BLEND_CONTROL_3WIN_AC_DEPENDENT_WEIGHT +#define P_B_BLEND_WEIGHT0_3WIN_BC_MASK P_B_BLEND_WEIGHT0_3WIN_AC_MASK +#define P_B_BLEND_WEIGHT0_3WIN_BC_SHIFT P_B_BLEND_WEIGHT0_3WIN_AC_SHIFT +#define P_B_BLEND_WEIGHT1_3WIN_BC_MASK P_B_BLEND_WEIGHT1_3WIN_AC_MASK +#define P_B_BLEND_WEIGHT1_3WIN_BC_SHIFT P_B_BLEND_WEIGHT1_3WIN_AC_SHIFT + +/** + Definition of attribute ids for Set/GetAttributes() + */ +typedef enum _GFDXATTRIBUTES + { + /** Width of the LCD fixed (240 for a 240x320 panel) */ + GFDX_ATTR_LCDWIDTH, + /** Height of the LCD fixed (320 for a 240x320 panel) */ + GFDX_ATTR_LCDHEIGHT, + /** NVIDIA panel index, This function overwrites environment panel Index setting */ + GFDX_ATTR_LCDTYPE, + /** Name of the panel (upto 16 chars,"PHILIPS_LP7123A") */ + GFDX_ATTR_LCDNAME, + /** Width of the display area usually same as LCDWIDTH, + Parameters: W[15:0] */ + GFDX_ATTR_WIDTH, + /** Height of the display area, can be less if emulating smaller size, + Parameters: H[15:0] */ + GFDX_ATTR_HEIGHT, + /** set/gets width height together to avoid artifacts, + Parameters: W[15:0], H[31:16] */ + GFDX_ATTR_WH_WA, + /** set/gets x, y start position of window A, + Parameters: X[15:0], Y[31:16] */ + GFDX_ATTR_XY_POS_WA, + /** Color Depth Bits per pixel: 1,2,4,8,12,15(RGB555),16(RGB565), 32(ARGB888), + GFDX_COLOR_DEPTH_YCbCr422, + GFDX_COLOR_DEPTH_YUV422, + GFDX_COLOR_DEPTH_YCbCr420P, + GFDX_COLOR_DEPTH_YUV420P, + GFDX_COLOR_DEPTH_YUV422P, + GFDX_COLOR_DEPTH_YCbCr422P, + GFDX_COLOR_DEPTH_YCbCr422R, + GFDX_COLOR_DEPTH_YUV422R, + GFDX_COLOR_DEPTH_YCbCr422RA, + GFDX_COLOR_DEPTH_YUV422RA, + */ + GFDX_ATTR_BPP_WA, + /** On/Off Horizontal & Vertical Pixel Doubling for window A, + Parameters: GFDXA_PIX_DBL_H, GFDXA_PIX_DBL_V or 0-Disable */ + GFDX_ATTR_PIXEL_DBL_WA, + /** Start Address for Window A Buffer 0 */ + GFDX_ATTR_ADDR_WA_B0, + /** Start Address for Window A Buffer 1 */ + GFDX_ATTR_ADDR_WA_B1, + /** Stride for Window A Buffer 0 */ + GFDX_ATTR_STRIDE_WA_B0, + /** Stride for Window A Buffer 1 */ + GFDX_ATTR_STRIDE_WA_B1, + /** Enable/Disable Windows A, Parameters: 1-Enable 0-Disable */ + GFDX_ATTR_ENABLE_WA, + /** Enable/Disable Buf0, Buf1, VI, GE Double Buffer (see def), + Parameters: GFDXA_DB_BUF0, GFDXA_DB_BUF1, GFDXA_DB_GE, GFDXA_DB_VI, + GFDXA_DB_EPP, GFDXA_DB_MPEGE, GFDXA_DB_HOST + */ + GFDX_ATTR_DBL_BUF_WA, + /** Sets/Gets GC Rotate bits for window A, for internal use only */ + GFDX_ATTR_ROTATE_BIT_WA, + /** Set/Get H Direction Increment/Decrement for window A, for internal use only */ + GFDX_ATTR_H_DIRECTION_WA, + /** Set/Get V Direction Increment/Decrement for window A, for internal use only */ + GFDX_ATTR_V_DIRECTION_WA, + /** Enable/Disable Palette for WinA */ + GFDX_ATTR_PALETTE_EN_WA, + /** Set/Get Palette 666 R[31-24], G[23-16], B[15-8], Index[7-0] WinA */ + GFDX_ATTR_PALETTE_WA, + /** Set/Get Palette 888 R[31-24], G[23-16], B[15-8], Index[7-0] WinA */ + GFDX_ATTR_PALETTE888_WA, + /** Enable/Disable DV WinA , + Parameters: GFDX_ATTR_DV_ENABLE, GFDX_ATTR_DV_DISABLE + */ + GFDX_ATTR_DV_CONTROL_EN_WA, + /** Set/Get DV Control R[26-24], G[18-16], B[10-8] WinA */ + GFDX_ATTR_DV_CONTROL_WA, + /** Color Key0 Lower range for overlay, there are two sets of color keys KEY0 & KEY1, + Parameters: R[23-16],G[15-8],B[7-0], Each KEY has Lower and Upper range */ + GFDX_ATTR_COLOR_KEY0_LOWER_RANGE, + /** Color Key0 Upper range for overlay, there are two sets of color keys KEY0 & KEY1, + Parameters: R[23-16],G[15-8],B[7-0], Each KEY has Lower and Upper range */ + GFDX_ATTR_COLOR_KEY0_UPPER_RANGE, + /** Color Key1 Lower range for overlay, there are two sets of color keys KEY0 & KEY1, + Parameters: R[23-16],G[15-8],B[7-0], Each KEY has Lower and Upper range */ + GFDX_ATTR_COLOR_KEY1_LOWER_RANGE, + /** Color Key1 Upper range for overlay, there are two sets of color keys KEY0 & KEY1, + Parameters: R[23-16],G[15-8],B[7-0], Each KEY has Lower and Upper range */ + GFDX_ATTR_COLOR_KEY1_UPPER_RANGE, + /** Color Key enbled but pixel color is not in range, + Parameters: GFDXA_BLEND_CONTROL_NOKEY_ALPHA_WEIGHT else 0 for Fix Weight */ + GFDX_ATTR_COLOR_NOKEY_WA, + /** Weight0 for Color Key not match area, + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT0_WA, + /** Weight1 for Color Key not match area, + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT1_WA, + /** Color Key0 Enble/Disable for WinA, + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE or GFDXA_BLEND_COLOR_KEY0_DISABLE */ + GFDX_ATTR_COLOR_KEY0_1WIN_WA, + /** Color Key1 Enble/Disable for WinA, + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE or GFDXA_BLEND_COLOR_KEY1_DISABLE */ + GFDX_ATTR_COLOR_KEY1_1WIN_WA, + /** Blend Control for WinA where does not Overlap with other Window, + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or 0 for Fix Weight */ + GFDX_ATTR_COLOR_1WIN_WA, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0, + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT0_WA, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1, + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT1_WA, + /** Color Key0 Enble/Disable for WinA, Overlap with WinB, + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY01 + else 2WIN_A_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY1 + else 2WIN_A_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_B_WA, + /** Color Key1 Enble/Disable for WinA, Overlap with WinB, + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY01 + else 2WIN_A_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY0 + else 2WIN_A_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_B_WA, + /** Blend Control for WinA area that overlap with WinB only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_B_WA, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_B_WEIGHT0_WA, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_B_WEIGHT1_WA, + /** Color Key0 Enble/Disable for WinA, Overlap with WinC + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY01 + else 2WIN_A_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY1 + else 2WIN_A_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_C_WA, + /** Color Key1 Enble/Disable for WinA, Overlap with WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY01 + else 2WIN_A_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_A_CKEY1 enbled then ENABLE_2WIN_A_CKEY0 + else 2WIN_A_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_C_WA, + /** Blend Control for WinA area that overlap with WinC only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_C_WA, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_C_WEIGHT0_WA, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_C_WEIGHT1_WA, + /** Color Key0 Enble/Disable for WinA, Overlap with WinA & WinC Only + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 3WIN_AC_CKEY1 enbled then ENABLE_3WIN_AC_CKEY01 + else 3WIN_AC_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 3WIN_AC_CKEY1 enbled then ENABLE_3WIN_AC_CKEY1 + else 3WIN_AC_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_3WIN_BC_WA, + /** Color Key1 Enble/Disable for WinA, Overlap with WinA & WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 3WIN_AC_CKEY1 enbled then ENABLE_3WIN_AC_CKEY01 + else 3WIN_AC_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 3WIN_AC_CKEY1 enbled then ENABLE_3WIN_AC_CKEY0 + else 3WIN_AC_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_3WIN_BC_WA, + /** Blend Control for WinA area that overlap with WinA & WinC only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_3WIN_BC_WA, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_3WIN_BC_WEIGHT0_WA, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_3WIN_BC_WEIGHT1_WA, + /** set/gets width height together to avoid artifacts */ + GFDX_ATTR_WH_WB, + /** set/gets source width height together to avoid artifacts, + Parameters: W[15:0], H[31:16] */ + GFDX_ATTR_SRC_WH_WB, + /** set/gets x, y start position of window B, + Parameters: X[15:0], Y[31:16] */ + GFDX_ATTR_XY_POS_WB, + /** Color Depth Bits per pixel: 1,2,4,8,12,15(RGB555),16(RGB565), 32(ARGB888), + GFDX_COLOR_DEPTH_YCbCr422, + GFDX_COLOR_DEPTH_YUV422, + GFDX_COLOR_DEPTH_YCbCr420P, + GFDX_COLOR_DEPTH_YUV420P, + GFDX_COLOR_DEPTH_YUV422P, + GFDX_COLOR_DEPTH_YCbCr422P, + GFDX_COLOR_DEPTH_YCbCr422R, + GFDX_COLOR_DEPTH_YUV422R, + GFDX_COLOR_DEPTH_YCbCr422RA, + GFDX_COLOR_DEPTH_YUV422RA, + */ + GFDX_ATTR_BPP_WB, + /** On/Off Horizontal & Vertical Pixel Doubling for Window B, + Parameters: GFDXA_PIX_DBL_H, GFDXA_PIX_DBL_V or 0-Disable */ + GFDX_ATTR_PIXEL_DBL_WB, + /** Upscales/Downscales window */ + GFDX_ATTR_SCALE_WB, + /** Start Address for Window B Buffer 0 */ + GFDX_ATTR_ADDR_WB_B0, + /** U Start Address for Window B Buffer 0 */ + GFDX_ATTR_ADDR_U_WB_B0, + /** V Start Address for Window B Buffer 0 */ + GFDX_ATTR_ADDR_V_WB_B0, + /** Stride for Window B Buffer 0 */ + GFDX_ATTR_STRIDE_WB_B0, + /** UV Stride for Window B Buffer 0 */ + GFDX_ATTR_STRIDE_UV_WB_B0, + /** Start Address for Window B Buffer 1 */ + GFDX_ATTR_ADDR_WB_B1, + /** U Start Address for Window B Buffer 1 */ + GFDX_ATTR_ADDR_U_WB_B1, + /** V Start Address for Window B Buffer 1 */ + GFDX_ATTR_ADDR_V_WB_B1, + /** Stride for Window B Buffer 1 */ + GFDX_ATTR_STRIDE_WB_B1, + /** UV Stride for Window B Buffer 1 */ + GFDX_ATTR_STRIDE_UV_WB_B1, + /** Enable/Disable Windows B, Parameters: 1-Enable 0-Disable */ + GFDX_ATTR_ENABLE_WB, + /** Enable/Disable Buf0, Buf1, VI, GE Double Buffer (see def), + Parameters: GFDXA_DB_BUF0, GFDXA_DB_BUF1, GFDXA_DB_GE, GFDXA_DB_VI, + GFDXA_DB_EPP, GFDXA_DB_MPEGE, GFDXA_DB_HOST + */ + GFDX_ATTR_DBL_BUF_WB, + /** Sets/Gets GC Rotate bits for window B, for internal use only */ + GFDX_ATTR_ROTATE_BIT_WB, + /** Set/Get H Direction Increment/Decrement for window B, for internal use only */ + GFDX_ATTR_H_DIRECTION_WB, + /** Set/Get V Direction Increment/Decrement for window B, for internal use only */ + GFDX_ATTR_V_DIRECTION_WB, + /** Enable/Disable Palette for WinB */ + GFDX_ATTR_PALETTE_EN_WB, + /** Set/Get Palette 666 R[31-24], G[23-16], B[15-8], Index[7-0] WinB */ + GFDX_ATTR_PALETTE_WB, + /** Set/Get Palette 888 R[31-24], G[23-16], B[15-8], Index[7-0] WinB */ + GFDX_ATTR_PALETTE888_WB, + /** Enable/Disable DV WinB , + Parameters: GFDX_ATTR_DV_ENABLE, GFDX_ATTR_DV_DISABLE + */ + GFDX_ATTR_DV_CONTROL_EN_WB, + /** Set/Get DV Control R[26-24], G[18-16], B[10-8] WinB */ + GFDX_ATTR_DV_CONTROL_WB, + /** Color Key enbled but pixel color is not in range + Parameters: GFDXA_BLEND_CONTROL_NOKEY_ALPHA_WEIGHT else 0 for Fix Weight */ + GFDX_ATTR_COLOR_NOKEY_WB, + /** Weight0 for Color Key not match area + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT0_WB, + /** Weight1 for Color Key not match area + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT1_WB, + /** Color Key0 Enble/Disable for WinB + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE or GFDXA_BLEND_COLOR_KEY0_DISABLE */ + GFDX_ATTR_COLOR_KEY0_1WIN_WB, + /** Color Key1 Enble/Disable for WinB + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE or GFDXA_BLEND_COLOR_KEY1_DISABLE */ + GFDX_ATTR_COLOR_KEY1_1WIN_WB, + /** Blend Control for WinB where does not Overlap with other Window + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or 0 for Fix Weight */ + GFDX_ATTR_COLOR_1WIN_WB, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT0_WB, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT1_WB, + /** Color Key0 Enble/Disable for WinB, Overlap with WinA + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY01 + else 2WIN_B_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY1 + else 2WIN_B_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_A_WB, + /** Color Key1 Enble/Disable for WinB, Overlap with WinA + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY01 + else 2WIN_B_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY0 + else 2WIN_B_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_A_WB, + /** Blend Control for WinB where does not Overlap with other Window + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_A_WB, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_A_WEIGHT0_WB, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_A_WEIGHT1_WB, + /** Color Key0 Enble/Disable for WinB, Overlap with WinC + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY01 + else 2WIN_B_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY1 + else 2WIN_B_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_C_WB, + /** Color Key1 Enble/Disable for WinB, Overlap with WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY01 + else 2WIN_B_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_B_CKEY1 enbled then ENABLE_2WIN_B_CKEY0 + else 2WIN_B_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_C_WB, + /** Blend Control for WinB area that overlap with WinC only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_C_WB, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_C_WEIGHT0_WB, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_C_WEIGHT1_WB, + /** Color Key0 Enble/Disable for WinB, Overlap with WinA & WinC Only + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 3WIN_BC_CKEY1 enbled then ENABLE_3WIN_BC_CKEY01 + else 3WIN_BC_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 3WIN_BC_CKEY1 enbled then ENABLE_3WIN_BC_CKEY1 + else 3WIN_BC_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_3WIN_AC_WB, + /** Color Key1 Enble/Disable for WinB, Overlap with WinA & WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 3WIN_BC_CKEY1 enbled then ENABLE_3WIN_BC_CKEY01 + else 3WIN_BC_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 3WIN_BC_CKEY1 enbled then ENABLE_3WIN_BC_CKEY0 + else 3WIN_BC_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_3WIN_AC_WB, + /** Blend Control for WinB area that overlap with WinA & WinC only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_3WIN_AC_WB, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_3WIN_AC_WEIGHT0_WB, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_3WIN_AC_WEIGHT1_WB, + + /** set/gets width height together to avoid artifacts */ + GFDX_ATTR_WH_WC, + /** set/gets source width height together to avoid artifacts, + Parameters: W[15:0], H[31:16] */ + GFDX_ATTR_SRC_WH_WC, + /** set/gets x, y start position of window C, + Parameters: X[15:0], Y[31:16] */ + GFDX_ATTR_XY_POS_WC, + /** Color Depth Bits per pixel: 1,2,4,8,12,15(RGB555),16(RGB565), 32(ARGB888), + GFDX_COLOR_DEPTH_YCbCr422, + GFDX_COLOR_DEPTH_YUV422, + GFDX_COLOR_DEPTH_YCbCr420P, + GFDX_COLOR_DEPTH_YUV420P, + GFDX_COLOR_DEPTH_YUV422P, + GFDX_COLOR_DEPTH_YCbCr422P, + GFDX_COLOR_DEPTH_YCbCr422R, + GFDX_COLOR_DEPTH_YUV422R, + GFDX_COLOR_DEPTH_YCbCr422RA, + GFDX_COLOR_DEPTH_YUV422RA, + */ + GFDX_ATTR_BPP_WC, + /** Set Trigger for encode window, 0- Disable, 1- Enable, 2-single Shot*/ + GFDX_ATTR_TRIGGER_WENC, + /** On/Off Horizontal & Vertical Pixel Doubling for Window C, + Parameters: GFDXA_PIX_DBL_H, GFDXA_PIX_DBL_V or 0-Disable */ + GFDX_ATTR_PIXEL_DBL_WC, + /** Upscales/Downscales window */ + GFDX_ATTR_SCALE_WC, + /** Start Address for window C Buffer 0 */ + GFDX_ATTR_ADDR_WC_B0, + /** U Start Address for window C Buffer 0 */ + GFDX_ATTR_ADDR_U_WC_B0, + /** V Start Address for window C Buffer 0 */ + GFDX_ATTR_ADDR_V_WC_B0, + /** Stride for window C Buffer 0 */ + GFDX_ATTR_STRIDE_WC_B0, + /** UV Stride for window C Buffer 0 */ + GFDX_ATTR_STRIDE_UV_WC_B0, + /** Start Address for window C Buffer 1 */ + GFDX_ATTR_ADDR_WC_B1, + /** U Start Address for window C Buffer 1 */ + GFDX_ATTR_ADDR_U_WC_B1, + /** V Start Address for window C Buffer 1 */ + GFDX_ATTR_ADDR_V_WC_B1, + /** Stride for window C Buffer 1 */ + GFDX_ATTR_STRIDE_WC_B1, + /** UV Stride for window C Buffer 1 */ + GFDX_ATTR_STRIDE_UV_WC_B1, + /** Enable/Disable Windows C, Parameters: 1-Enable 0-Disable */ + GFDX_ATTR_ENABLE_WC, + /** Enable/Disable Buf0, Buf1, VI, GE Double Buffer (see def), + Parameters: GFDXA_DB_BUF0, GFDXA_DB_BUF1, GFDXA_DB_GE, GFDXA_DB_VI, + GFDXA_DB_EPP, GFDXA_DB_MPEGE, GFDXA_DB_HOST + */ + GFDX_ATTR_DBL_BUF_WC, + /** Sets/Gets GC Rotate bits for window C, for internal use only */ + GFDX_ATTR_ROTATE_BIT_WC, + /** Set/Get H Direction Increment/Decrement for window C, for internal use only */ + GFDX_ATTR_H_DIRECTION_WC, + /** Set/Get V Direction Increment/Decrement for window C, for internal use only */ + GFDX_ATTR_V_DIRECTION_WC, + /** Enable/Disable Palette for WinC */ + GFDX_ATTR_PALETTE_EN_WC, + /** Set/Get Palette 666 R[31-24], G[23-16], B[15-8], Index[7-0] WinC */ + GFDX_ATTR_PALETTE_WC, + /** Set/Get Palette 888 R[31-24], G[23-16], B[15-8], Index[7-0] WinC */ + GFDX_ATTR_PALETTE888_WC, + /** Enable/Disable DV WinC, + Parameters: GFDX_ATTR_DV_ENABLE, GFDX_ATTR_DV_DISABLE + */ + GFDX_ATTR_DV_CONTROL_EN_WC, + /** Set/Get DV Control R[26-24], G[18-16], B[10-8] WinA */ + GFDX_ATTR_DV_CONTROL_WC, + /** Color Key enbled but pixel color is not in range + Parameters: GFDXA_BLEND_CONTROL_NOKEY_ALPHA_WEIGHT else 0 for Fix Weight */ + GFDX_ATTR_COLOR_NOKEY_WC, + /** Weight0 for Color Key not match area + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT0_WC, + /** Weight1 for Color Key not match area + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_NOKEY_WEIGHT1_WC, + /** Color Key0 Enble/Disable for WinC + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE or GFDXA_BLEND_COLOR_KEY0_DISABLE */ + GFDX_ATTR_COLOR_KEY0_1WIN_WC, + /** Color Key1 Enble/Disable for WinC + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE or GFDXA_BLEND_COLOR_KEY1_DISABLE */ + GFDX_ATTR_COLOR_KEY1_1WIN_WC, + /** Blend Control for WinC where does not Overlap with other Window + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or 0 for Fix Weight */ + GFDX_ATTR_COLOR_1WIN_WC, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT0_WC, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_1WIN_WEIGHT1_WC, + /** Color Key0 Enble/Disable for WinC, Overlap with WinA + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY01 + else 2WIN_C_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY1 + else 2WIN_C_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_A_WC, + /** Color Key1 Enble/Disable for WinC, Overlap with WinA + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY01 + else 2WIN_C_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY0 + else 2WIN_C_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_A_WC, + /** Blend Control for WinC area that overlap with WinA only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_A_WC, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_A_WEIGHT0_WC, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_A_WEIGHT1_WC, + /** Color Key0 Enble/Disable for WinC, Overlap with WinB + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY01 + else 2WIN_C_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY1 + else 2WIN_C_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_2WIN_B_WC, + /** Color Key1 Enble/Disable for WinC, Overlap with WinB + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY01 + else 2WIN_C_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 2WIN_C_CKEY1 enbled then ENABLE_2WIN_C_CKEY0 + else 2WIN_C_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_2WIN_B_WC, + /** Blend Control for WinC area that overlap with WinB only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_2WIN_B_WC, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_2WIN_B_WEIGHT0_WC, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_2WIN_B_WEIGHT1_WC, + /** Color Key0 Enble/Disable for WinC, Overlap with WinA & WinB Only + Parameters: GFDXA_BLEND_COLOR_KEY0_ENABLE (if 3WIN_AB_CKEY1 enbled then ENABLE_3WIN_AB_CKEY01 + else 3WIN_AB_CKEY0) + GFDXA_BLEND_COLOR_KEY0_DISABLE (if 3WIN_AB_CKEY1 enbled then ENABLE_3WIN_AB_CKEY1 + else 3WIN_AB_NOKEY) + */ + GFDX_ATTR_COLOR_KEY0_3WIN_AB_WC, + /** Color Key1 Enble/Disable for WinC, Overlap with WinA & WinB + Parameters: GFDXA_BLEND_COLOR_KEY1_ENABLE (if 3WIN_AB_CKEY1 enbled then ENABLE_3WIN_AB_CKEY01 + else 3WIN_AB_CKEY1) + GFDXA_BLEND_COLOR_KEY1_DISABLE (if 3WIN_AB_CKEY1 enbled then ENABLE_3WIN_AB_CKEY0 + else 3WIN_AB_NOKEY) + */ + GFDX_ATTR_COLOR_KEY1_3WIN_AB_WC, + /** Blend Control for WinC area that overlap with WinA & WinB only + Parameters: GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT or GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT + or 0 for FIX WEIGHT + */ + GFDX_ATTR_COLOR_3WIN_AB_WC, + /** Win Blend Weight0 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 0 uses Weight0 + Parameters: Weight0 value[7:0], if 1-bit Alpha Weight0 value = 0 */ + GFDX_ATTR_COLOR_3WIN_AB_WEIGHT0_WC, + /** Win Blend Weight1 for CKey disabled or CKey enabled w key match area or 1-bit Alpha, Alpha 1 uses Weight1 + Parameters: Weight1 value[7:0], if 1-bit Alpha Weight1 value = 1 */ + GFDX_ATTR_COLOR_3WIN_AB_WEIGHT1_WC, + /** GC Color Key for overlay, Not supported */ + GFDX_ATTR_COLOR_KEY, + /** GC Color Key Mask for overlay, Not supported */ + GFDX_ATTR_COLOR_KEY_MASK, + /** Set overlap type (see def), Not supported */ + GFDX_ATTR_OVERLAP_TYPE, + /** Gets VDisplay End for GE Start Window programming, Not supported */ + GFDX_ATTR_V_DISPLAY_END, + /** Gets range for clock divider L=0:H=15 */ + GFDX_ATTR_PWM0_CLK_RANGE, + /** Gets range for duty cycle L=0:H=255 */ + GFDX_ATTR_PWM0_DTY_RANGE, + /** Controls Backlight0 clock divider for PWM0 Bits[5:0] */ + GFDX_ATTR_PWM0_CLOCK, + /** Controls Backlight0 duty cycle for PWM0 Bits[7:0] */ + GFDX_ATTR_PWM0_DUTYCY, + /** Gets range for clock divider L=0:H=15 */ + GFDX_ATTR_PWM1_CLK_RANGE, + /** Gets range for duty cycle L=0:H=255 */ + GFDX_ATTR_PWM1_DTY_RANGE, + /** Controls Backlight1 clock divider for PWM1 Bits[5:0] */ + GFDX_ATTR_PWM1_CLOCK, + /** Controls Backlight1 duty cycle for PWM1 Bits[7:0] */ + GFDX_ATTR_PWM1_DUTYCY, + /** LCD Type 0-Main Lcd, 1-Sub Lcd */ + GFDX_ATTR_DISP_TYPE, + /** SW register 1 for program usage */ + GFDX_ATTR_SW_REG_1, + /** SW register 2 for program usage */ + GFDX_ATTR_SW_REG_2, + /** set/gets width height of screen encode window, + Parameters: W[15:0], H[31:16] */ + GFDX_ATTR_WH_WENC, + /** set/gets x, y start position of screen encode window, + Parameters: X[15:0], Y[31:16] */ + GFDX_ATTR_XY_POS_WENC, + /** Enable/Disable screen encode window. Parameters: 1-Enable 0-Disable. + * Please note that this sets the encode rate to its maximum value of + * 1.000 so if you plan to change it after enabling, + * use attribute GFDX_ATTR_WENC_RATE. */ + GFDX_ATTR_ENABLE_WENC, + /** Get Device ID & Rev, Not supported */ + GFDX_ATTR_DEVICE_INFO, + /** Enable CRC, Set Wait 1 or 2 VSync + Parameters: GFDXA_CRC_WAIT_VSYNC1, GFDXA_CRC_WAIT_VSYNC2, GFDXA_CRC_DISABLE + */ + GFDX_ATTR_CRC_ENABLE, + /** Get Check Sum */ + GFDX_ATTR_CRC_CHECK_SUM, + /** Not supported, Not supported */ + GFDX_ATTR_HC_SHAPE, + /** load Hardware Cursor Image, Not supported */ + GFDX_ATTR_HC_SHAPE_EXT, + /** set cursor hot spot, Not supported */ + GFDX_ATTR_HC_HOTSPOT, + /** set foreground and background color, Not supported */ + GFDX_ATTR_HC_COLOR, + /** Set Hardware Cursor new Position, Not supported */ + GFDX_ATTR_HC_POSITION, + /** Enable, Disable Hardware Cursor, Not supported */ + GFDX_ATTR_HC_SHOW, + /** free internal buffer, Not supported */ + GFDX_ATTR_HC_RELEASE, + /** Set Start or Stop Frame + Parameters: GFDX_MAIN_START, GFDX_MAIN_STOP, GFDX_SUB_START, GFDX_SUB_STOP + */ + GFDX_ATTR_STOP_START, + /** Set Start or Stop Frame + Parameters: GFDX_MAIN_ONE_FRAME, GFDX_SUB_ONE_FRAME + */ + GFDX_ATTR_SEND_ONE_FRAME, + /** Set No change */ + GFDX_ATTR_NOCHANGE, + /** Get Pre Init LCD Resolution Bit[0-15] Width, Bit[16-31] Height*/ + GFDX_ATTR_PRE_INIT_LCD_RES, + /** NVIDIA panel index internal to API use */ + GFDX_ATTR_INTERNAL_LCDTYPE, + /** Setting this attribute will bypass any hardware writes in DxAPI which go through + * the GFDX_CHANNEL_xx macros. The runtime environment GFSDK_DXINIT_BYPASS uses + * this attribue to disable hardware writes during DxSetDisplay(). + * Parameters: GFDX_SET_WRITE_SHADOW or GFDX_CLR_WRITE_SHADOW + */ + GFDX_ATTR_WRITE_SHADOW_ONLY, + /** Backlight0 ON GPIO LPW2 Low */ + GFDX_ATTR_BACKLIGHT0_ON, + /** Backlight1 ON GPIO LM1 Low */ + GFDX_ATTR_BACKLIGHT1_ON, + /** Backlight0 OFF GPIO LPW2 High */ + GFDX_ATTR_BACKLIGHT0_OFF, + /** Backlight1 OFF GPIO LM1 High*/ + GFDX_ATTR_BACKLIGHT1_OFF, + /** configure BACKLIGHT0 as GPIO on LPW2*/ + GFDX_ATTR_BACKLIGHT0_CONFIGURE_GPIO, + /** configure BACKLIGHT1 as GPIO on LM1*/ + GFDX_ATTR_BACKLIGHT1_CONFIGURE_GPIO, + /** configure BACKLIGHT0 as PWM on LPW2*/ + GFDX_ATTR_BACKLIGHT0_CONFIGURE_PWM, + /** configure BACKLIGHT1 as PWM on LM1 */ + GFDX_ATTR_BACKLIGHT1_CONFIGURE_PWM, + + /** Set Stop Frame Options, + Parameters: GFDX_MAIN_STOP_POLARITY_HIGH, GFDX_MAIN_STOP_POLARITY_LOW, GFDX_SUB_STOP_POLARITY_HIGH + GFDX_SUB_STOP_POLARITY_LOW, GFDX_MAIN_STOP_INPUT_PIN_ENABLE, GFDX_MAIN_STOP_INPUT_PIN_DISABLE, + GFDX_SUB_STOP_INPUT_PIN_ENABLE, GFDX_SUB_STOP_INPUT_PIN_DISABLE, GFDX_STOP_WINDOW_A_NC_ENABLE, + GFDX_STOP_WINDOW_A_NC_DISABLE, GFDX_STOP_WINDOW_B_NC_ENABLE, GFDX_STOP_WINDOW_B_NC_DISABLE, + GFDX_STOP_WINDOW_B_NC_ENABLE, GFDX_STOP_WINDOW_B_NC_DISABLE + */ + GFDX_ATTR_STOP_FRAME_OPTIONS, + /** Set Non Continuos Display */ + GFDX_ATTR_NC_DISPLAY, + /** Horizontal and Vertical Filter Support Window B + Parameters: GFDX_H_FILTER_ENABLE, GFDX_H_FILTER_DISABLE, GFDX_V_FILTER_ENABLE, GFDX_V_FILTER_DISABLE + */ + GFDX_ATTR_H_V_FILTER_WB, + /** Horizontal and Vertical Filter Support Window C + Parameters: GFDX_H_FILTER_ENABLE, GFDX_H_FILTER_DISABLE, GFDX_V_FILTER_ENABLE, GFDX_V_FILTER_DISABLE + */ + GFDX_ATTR_H_V_FILTER_WC, + + /** Get Supported Display Script Options + Parameters: GFDX_DEFAULT_TABLE, GFDX_DXAPI_SUPPORT, GFDX_FMARK_SUPPORT + */ + GFDX_ATTR_DISPLAY_SCRIPT_OPTIONS, + /** Rate of window decode output frames when sending continuously. + * please note that the rate is overwritten with the maximum value (i.e. 1.000 + * which is represented by a fixed point fraction 16.16) if you use attribute + * GFDX_ATTR_ENABLE_WENC, so you need to overwrite with this attribute. + * Parameters: any number between 0x0 and 0x10000 (i.e. 0.0 an 1.000) + */ + GFDX_ATTR_WENC_RATE + +} GFDXATTRIBUTES; + +// Stop Frame Options +#define GFDX_MAIN_STOP_POLARITY_HIGH 0x00000001 +#define GFDX_MAIN_STOP_POLARITY_LOW 0x80000001 +#define GFDX_MAIN_STOP_INPUT_PIN_ENABLE 0x00000002 +#define GFDX_MAIN_STOP_INPUT_PIN_DISABLE 0x80000002 + +#define GFDX_SUB_STOP_POLARITY_HIGH 0x00000004 +#define GFDX_SUB_STOP_POLARITY_LOW 0x80000004 +#define GFDX_SUB_STOP_INPUT_PIN_ENABLE 0x00000006 +#define GFDX_SUB_STOP_INPUT_PIN_DISABLE 0x80000006 + +#define GFDX_STOP_WINDOW_A_NC_ENABLE 0x00000010 +#define GFDX_STOP_WINDOW_A_NC_DISABLE 0x80000010 +#define GFDX_STOP_WINDOW_B_NC_ENABLE 0x00000011 +#define GFDX_STOP_WINDOW_B_NC_DISABLE 0x80000011 +#define GFDX_STOP_WINDOW_C_NC_ENABLE 0x00000012 +#define GFDX_STOP_WINDOW_C_NC_DISABLE 0x80000012 + +// Horizontal and Vertical Filter Support Window B & C + +#define GFDX_H_FILTER_ENABLE 0x00000100 +#define GFDX_H_FILTER_DISABLE 0x80000100 +#define GFDX_V_FILTER_ENABLE 0x00004000 +#define GFDX_V_FILTER_DISABLE 0x80004000 +#define GFDX_V_FILTER_OPTIMIZE_ENABLE 0x00010000 +#define GFDX_V_FILTER_OPTIMIZE_DISABLE 0x80010000 + +// Display Script Options + +#define GFDX_DEFAULT_TABLE 0x00000001 +#define GFDX_DXAPI_SUPPORT 0x00000002 +#define GFDX_FMARK_SUPPORT 0x00000004 + + +/** Attribute value for GFDX_ATTR_WRITE_SHADOW_ONLY. + * Setting this attribute will disable all channel hardware writes in DxAPI. + * The runtime environment GFSDK_DXINIT_BYPASS uses this attribue to disable + * hardware writes in DxSetDisplay(). + */ +#define GFDX_SET_WRITE_SHADOW 0x00000001 +/** Attribute value for GFDX_ATTR_WRITE_SHADOW_ONLY. + * This attribute is used to clear the effect of #GFDX_SET_WRITE_SHADOW. + * It must be used explicitly to re-enable hardware writes in DxAPI. + */ +#define GFDX_CLR_WRITE_SHADOW 0x80000001 + + + +#define GFDX_COLOR_DEPTH_YCbCr422 (16UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV422 (17UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YCbCr420P (18UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV420P (19UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YCbCr422P (20UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV422P (21UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YCbCr422R (22UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV422R (23UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YCbCr422RA (24UL | 0x80000000) +#define GFDX_COLOR_DEPTH_YUV422RA (25UL | 0x80000000) + +#define GFDX_SWAP_MASK 0x000f0000 +#define GFDX_NO_SWAP 0x00000000 +#define GFDX_BYTE_SWAP 0x00010000 +#define GFDX_ORDER_SWAP 0x00020000 +#define GFDX_WORD_SWAP 0x00030000 + +#define GFDX_COLOR_DEPTH_YUV422_YVYU (17UL | 0x80000000 | GFDX_NO_SWAP) +#define GFDX_COLOR_DEPTH_YUV422_VYUY (17UL | 0x80000000 | GFDX_BYTE_SWAP) +#define GFDX_COLOR_DEPTH_YUV422_UYVY (17UL | 0x80000000 | GFDX_ORDER_SWAP) +#define GFDX_COLOR_DEPTH_YUV422_YUYV (17UL | 0x80000000 | GFDX_WORD_SWAP) + +#define GFDX_COLOR_DEPTH_YCbCr422_YVYU (16UL | 0x80000000 | GFDX_NO_SWAP) +#define GFDX_COLOR_DEPTH_YCbCr422_VYUY (16UL | 0x80000000 | GFDX_BYTE_SWAP) +#define GFDX_COLOR_DEPTH_YCbCr422_UYVY (16UL | 0x80000000 | GFDX_ORDER_SWAP) +#define GFDX_COLOR_DEPTH_YCbCr422_YUYV (16UL | 0x80000000 | GFDX_WORD_SWAP) + + +// Horizontal Filter Coefficients + +#define GF_H_P00C0 0x0 +#define GF_H_P00C1 (0x0 << 3 ) +#define GF_H_P00C2 (0x80 << 8 ) +#define GF_H_P00C3 (0x0 << 16) +#define GF_H_P00C4 (0x0 << 24) +#define GF_H_P00C5 (0x0 << 29) +#define GF_H_P00CX GF_H_P00C0|GF_H_P00C1|GF_H_P00C2|GF_H_P00C3|GF_H_P00C4|GF_H_P00C5 + +#define GF_H_P01C0 0x1 +#define GF_H_P01C1 (0x1c << 3 ) +#define GF_H_P01C2 (0x7c << 8 ) +#define GF_H_P01C3 (0x8 << 16) +#define GF_H_P01C4 (0x1e << 24) +#define GF_H_P01C5 (0x1 << 29) +#define GF_H_P01CX GF_H_P01C0|GF_H_P01C1|GF_H_P01C2|GF_H_P01C3|GF_H_P01C4|GF_H_P01C5 + +#define GF_H_P02C0 0x1 +#define GF_H_P02C1 (0x18 << 3 ) +#define GF_H_P02C2 (0x7a << 8 ) +#define GF_H_P02C3 (0x11 << 16) +#define GF_H_P02C4 (0x1b << 24) +#define GF_H_P02C5 (0x1 << 29) +#define GF_H_P02CX GF_H_P02C0|GF_H_P02C1|GF_H_P02C2|GF_H_P02C3|GF_H_P02C4|GF_H_P02C5 + +#define GF_H_P03C0 0x2 +#define GF_H_P03C1 (0x15 << 3 ) +#define GF_H_P03C2 (0x73 << 8 ) +#define GF_H_P03C3 (0x1b << 16) +#define GF_H_P03C4 (0x19 << 24) +#define GF_H_P03C5 (0x2 << 29) +#define GF_H_P03CX GF_H_P03C0|GF_H_P03C1|GF_H_P03C2|GF_H_P03C3|GF_H_P03C4|GF_H_P03C5 + +#define GF_H_P04C0 0x2 +#define GF_H_P04C1 (0x13 << 3 ) +#define GF_H_P04C2 (0x6d << 8 ) +#define GF_H_P04C3 (0x25 << 16) +#define GF_H_P04C4 (0x17 << 24) +#define GF_H_P04C5 (0x2 << 29) +#define GF_H_P04CX GF_H_P04C0|GF_H_P04C1|GF_H_P04C2|GF_H_P04C3|GF_H_P04C4|GF_H_P04C5 + +#define GF_H_P05C0 0x3 +#define GF_H_P05C1 (0x11 << 3 ) +#define GF_H_P05C2 (0x66 << 8 ) +#define GF_H_P05C3 (0x2f << 16) +#define GF_H_P05C4 (0x15 << 24) +#define GF_H_P05C5 (0x2 << 29) +#define GF_H_P05CX GF_H_P05C0|GF_H_P05C1|GF_H_P05C2|GF_H_P05C3|GF_H_P05C4|GF_H_P05C5 + +#define GF_H_P06C0 0x3 +#define GF_H_P06C1 (0x11 << 3 ) +#define GF_H_P06C2 (0x5e << 8 ) +#define GF_H_P06C3 (0x38 << 16) +#define GF_H_P06C4 (0x13 << 24) +#define GF_H_P06C5 (0x3 << 29) +#define GF_H_P06CX GF_H_P06C0|GF_H_P06C1|GF_H_P06C2|GF_H_P06C3|GF_H_P06C4|GF_H_P06C5 + +#define GF_H_P07C0 0x3 +#define GF_H_P07C1 (0x10 << 3 ) +#define GF_H_P07C2 (0x55 << 8 ) +#define GF_H_P07C3 (0x43 << 16) +#define GF_H_P07C4 (0x12 << 24) +#define GF_H_P07C5 (0x3 << 29) +#define GF_H_P07CX GF_H_P07C0|GF_H_P07C1|GF_H_P07C2|GF_H_P07C3|GF_H_P07C4|GF_H_P07C5 + +#define GF_H_P08C0 0x3 +#define GF_H_P08C1 (0x11 << 3 ) +#define GF_H_P08C2 (0x4c << 8 ) +#define GF_H_P08C3 (0x4c << 16) +#define GF_H_P08C4 (0x11 << 24) +#define GF_H_P08C5 (0x3 << 29) +#define GF_H_P08CX GF_H_P08C0|GF_H_P08C1|GF_H_P08C2|GF_H_P08C3|GF_H_P08C4|GF_H_P08C5 + +#define GF_H_P09C0 0x3 +#define GF_H_P09C1 (0x12 << 3 ) +#define GF_H_P09C2 (0x43 << 8 ) +#define GF_H_P09C3 (0x55 << 16) +#define GF_H_P09C4 (0x10 << 24) +#define GF_H_P09C5 (0x3 << 29) +#define GF_H_P09CX GF_H_P09C0|GF_H_P09C1|GF_H_P09C2|GF_H_P09C3|GF_H_P09C4|GF_H_P09C5 + +#define GF_H_P0AC0 0x3 +#define GF_H_P0AC1 (0x13 << 3 ) +#define GF_H_P0AC2 (0x38 << 8 ) +#define GF_H_P0AC3 (0x5e << 16) +#define GF_H_P0AC4 (0x11 << 24) +#define GF_H_P0AC5 (0x3 << 29) +#define GF_H_P0ACX GF_H_P0AC0|GF_H_P0AC1|GF_H_P0AC2|GF_H_P0AC3|GF_H_P0AC4|GF_H_P0AC5 + +#define GF_H_P0BC0 0x2 +#define GF_H_P0BC1 (0x15 << 3 ) +#define GF_H_P0BC2 (0x2f << 8 ) +#define GF_H_P0BC3 (0x66 << 16) +#define GF_H_P0BC4 (0x11 << 24) +#define GF_H_P0BC5 (0x3 << 29) +#define GF_H_P0BCX GF_H_P0BC0|GF_H_P0BC1|GF_H_P0BC2|GF_H_P0BC3|GF_H_P0BC4|GF_H_P0BC5 + +#define GF_H_P0CC0 0x2 +#define GF_H_P0CC1 (0x17 << 3 ) +#define GF_H_P0CC2 (0x25 << 8 ) +#define GF_H_P0CC3 (0x6d << 16) +#define GF_H_P0CC4 (0x13 << 24) +#define GF_H_P0CC5 (0x2 << 29) +#define GF_H_P0CCX GF_H_P0CC0|GF_H_P0CC1|GF_H_P0CC2|GF_H_P0CC3|GF_H_P0CC4|GF_H_P0CC5 + +#define GF_H_P0DC0 0x2 +#define GF_H_P0DC1 (0x19 << 3 ) +#define GF_H_P0DC2 (0x1b << 8 ) +#define GF_H_P0DC3 (0x73 << 16) +#define GF_H_P0DC4 (0x15 << 24) +#define GF_H_P0DC5 (0x2 << 29) +#define GF_H_P0DCX GF_H_P0DC0|GF_H_P0DC1|GF_H_P0DC2|GF_H_P0DC3|GF_H_P0DC4|GF_H_P0DC5 + +#define GF_H_P0EC0 0x1 +#define GF_H_P0EC1 (0x1b << 3 ) +#define GF_H_P0EC2 (0x11 << 8 ) +#define GF_H_P0EC3 (0x7a << 16) +#define GF_H_P0EC4 (0x18 << 24) +#define GF_H_P0EC5 (0x1 << 29) +#define GF_H_P0ECX GF_H_P0EC0|GF_H_P0EC1|GF_H_P0EC2|GF_H_P0EC3|GF_H_P0EC4|GF_H_P0EC5 + +#define GF_H_P0FC0 0x1 +#define GF_H_P0FC1 (0x1e << 3 ) +#define GF_H_P0FC2 (0x8 << 8 ) +#define GF_H_P0FC3 (0x7c << 16) +#define GF_H_P0FC4 (0x1c << 24) +#define GF_H_P0FC5 (0x1 << 29) +#define GF_H_P0FCX GF_H_P0FC0|GF_H_P0FC1|GF_H_P0FC2|GF_H_P0FC3|GF_H_P0FC4|GF_H_P0FC5 + +// Vertical Filter Coefficients +#define GF_V_P00C0 0x80 +#define GF_V_P01C0 0x78 +#define GF_V_P02C0 0x70 +#define GF_V_P03C0 0x68 +#define GF_V_P04C0 0x60 +#define GF_V_P05C0 0x58 +#define GF_V_P06C0 0x50 +#define GF_V_P07C0 0x48 +#define GF_V_P08C0 0x40 +#define GF_V_P09C0 0x38 +#define GF_V_P0AC0 0x30 +#define GF_V_P0BC0 0x28 +#define GF_V_P0CC0 0x20 +#define GF_V_P0DC0 0x18 +#define GF_V_P0EC0 0x10 +#define GF_V_P0FC0 0x8 + +/** Hardware Cursor definition */ +typedef struct _HC_COLOR +{ + NvU32 foreground; + NvU32 background; +} HC_COLOR, *PHC_COLOR; + +typedef struct _HC_POSITION +{ + NvU32 x; + NvU32 y; +} HC_POSITION, *PHC_POSITION; + +typedef struct _HC_HOTSPOT +{ + NvU32 x; + NvU32 y; +} HC_HOTSPOT, *PHC_HOTSPOT; + +enum +{ + CD64X64, + CD32X32 +}; + +typedef struct _HC_MASK +{ + NvU32 *data; + NvU32 size; + NvU32 dimension; +} HC_MASK, *PHC_MASK; + +typedef struct _DisplayTimingEntry +{ + /** Horizontal Ref. Need not to be changed, set 0 for default setting */ + NvU16 usHRef; + /** Vertical Ref. Need not to be changed, set 0 for default setting */ + NvU16 usVRef; + /** Horizontal Sync Width, set 0 for default setting */ + NvU16 usHSyncWidth; + /** Vertical Sync Width, set 0 for default setting */ + NvU16 usVSyncWidth; + /** Horizontal Back Porch, set 0 for default setting */ + NvU16 usHBackPorch; + /** Vertical Back Porch, set 0 for default setting */ + NvU16 usVBackPorch; + /** Horizontal Active, Set same as Window Width */ + NvU16 usHActive; + /** Vertical Active, Set same as Window Height */ + NvU16 usVActive; + /** Horizontal Total, set 0 for default setting */ + NvU16 usHTotal; + /** Vertical Total, set 0 for default setting */ + NvU16 usVTotal; + /** Window Width */ + NvU16 usPanelVX; + /** Window Height */ + NvU16 usPanelVY; + /** Window Start X Position */ + NvU16 usPosX; + /** Window Start Y Position */ + NvU16 usPosY; + /** Window Sel 0-WinA (GFDX_DISPTMG_SEL_WINA), 1-WinB (GFDX_DISPTMG_SEL_WINB) */ + NvU16 SelWin; + NvU16 Reserved1; + NvU16 Reserved2; + NvU16 Reserved3; +} DISPLAYTIMINGENTRY, *PDISPLAYTIMINGENTRY; + +// Display Timing + +#define GFDX_DISPTMG_SEL_WINA 0 +#define GFDX_DISPTMG_SEL_WINB 1 + +/** redefine some of the constants for compatibility */ +#define GFDX_ATTR_WIDTH_HEIGHT GFDX_ATTR_WH_WA +#define GFDX_ATTR_XY_POSITION GFDX_ATTR_XY_POS_WA +#define GFDX_ATTR_BPP GFDX_ATTR_BPP_WA +#define GFDX_ATTR_PIXEL_DOUBLE GFDX_ATTR_PIXEL_DBL_WA +#define GFDX_ATTR_STARTADDR GFDX_ATTR_ADDR_WA_B0 +#define GFDX_ATTR_STRIDE GFDX_ATTR_STRIDE_WA_B0 + +/** definition of GFDX_ATTR_PIXEL_DOUBLE */ +#define GFDXA_PIX_DBL_H 0x01 /* Horizontal pixel doubling on */ +#define GFDXA_PIX_DBL_V 0x02 /* Vertical pixel doubling on */ + +/** definition of GFDX_ATTR_DOUBLE_BUF control (0,2,1,3 is same as hw) */ +#define GFDXA_DB_BUF0 0x00 /* GC display buffer address is from buf0 */ +#define GFDXA_DB_BUF1 0x02 /* GC display buffer address is from buf1 */ +#define GFDXA_DB_HOST 0x06 /* GC display buffer address is from Host */ +#define GFDXA_DB_GE 0x01 /* GC display buffer address is from GE */ +#define GFDXA_DB_VI 0x03 /* GC display buffer address is from VI */ +#define GFDXA_DB_EPP 0x04 +#define GFDXA_DB_MPEGE 0x05 + +/** definition of GFDX_ATTR_ROTATE_BIT_W? */ +#define GFDXA_ROTATE_BITS_0 0x00000000 // no rotation, x+,y+,startAddr = 0 +#define GFDXA_ROTATE_BITS_90 0x00000500 // +90 (anti-clock), x-, y+, start= stride-3 (TL) +#define GFDXA_ROTATE_BITS_180 0x00000300 // +180(anti-clock), x-, y-, start= height*stride-3 (BR) +#define GFDXA_ROTATE_BITS_270 0x00000600 // +270(anti-clock), x+, y-, start= (height-1)*stride (BL) + +/** definition of Color Key and Alpha Blending*/ +#define GFDXA_BLEND_CONTROL_NOKEY_ALPHA_WEIGHT 0x00000001 + +#define GFDXA_BLEND_COLOR_KEY0_ENABLE 0x00000001 +#define GFDXA_BLEND_COLOR_KEY1_ENABLE 0x00000002 +#define GFDXA_BLEND_COLOR_KEY0_DISABLE 0x00000000 +#define GFDXA_BLEND_COLOR_KEY1_DISABLE 0x00000000 +#define GFDXA_BLEND_CONTROL_nWIN_ALPHA_WEIGHT 0x00000004 +#define GFDXA_BLEND_CONTROL_nWIN_DEPENDENT_WEIGHT 0x00000008 + +/** Disable CRC capture. */ +#define GFDXA_CRC_DISABLE 0x00000000 +/** Wait for 1 VSYNC and capture CRC for one frame. */ +#define GFDXA_CRC_WAIT_VSYNC1 0x00000001 +/** Wait for 2 VSYNC and capture CRC for one frame. */ +#define GFDXA_CRC_WAIT_VSYNC2 0x00000003 + +/** Set Direction for Rotation*/ +#define GFDX_ATTR_H_DIRECTION_DECREMENT 0x00000001 +#define GFDX_ATTR_H_DIRECTION_INCREMENT 0x00000000 +#define GFDX_ATTR_V_DIRECTION_DECREMENT 0x00000004 +#define GFDX_ATTR_V_DIRECTION_INCREMENT 0x00000000 + +/** definition of Palette Enable/Disable*/ +#define GFDX_ATTR_PALETTE_ENABLE 0x00010000 +#define GFDX_ATTR_PALETTE_DISABLE 0x00000000 +#define GFDX_ATTR_DV_ENABLE 0x00100000 +#define GFDX_ATTR_DV_DISABLE 0x00000000 + +#define GFDX_ATTR_WENC_DISABLE 0x00000000 +#define GFDX_ATTR_WENC_ENABLE 0x00000001 +#define GFDX_ATTR_WENC_TRIG_DISABLE 0x00000000 +#define GFDX_ATTR_WENC_TRIG_ENABLE 0x00000001 +#define GFDX_ATTR_WENC_TRIG_ONE_SHOT 0x00000002 + +/** Read CRC Check Sum */ +#define GFDXA_CRC_READ_CHECK_SUM 0x00000001 + +/** + Sub-LCD support + */ +#define LCD_MAIN 0 +#define LCD_SUB 1 +#define MAX_LCD 2 + +/** + Start-Stop Frame support + */ +#define GFDX_MAIN_START 0x00000001 +#define GFDX_MAIN_STOP 0x00000002 +#define GFDX_SUB_START 0x00000003 +#define GFDX_SUB_STOP 0x00000004 +#define GFDX_MAIN_ONE_FRAME 0x00000001 +#define GFDX_SUB_ONE_FRAME 0x00000002 + +#define GF_DISPLAY_NORMAL 0x00000000 +#define GF_DISPLAY_PARTIAL 0x00000001 + +#ifdef PROJECT_SEC_G1 +#define GF_DISPLAY_NTSC_V570 0x00000002 +#define GF_DISPLAY_NTSC_V490 0x00000003 +#define GF_DISPLAY_NTSC_V700 0x00000004 +#define GF_DISPLAY_PAL 0x00000005 +#endif + +/** + DxEnableDisplay support + */ +#define GF_PANEL_DRV_ONOFF 0x00000100 +#define GF_PANEL_DRV_SLP_WKUP 0x00000200 + +/** + Clock selections, profile and options + */ +#define GFDX_OSC 0x00000001 +#define GFDX_ROSC 0x00000002 +#define GFDX_PLL1 0x00000003 +#define GFDX_PLL_QUERY 0x80000000 +#define GFDX_POWER 0x00010000 +#define GFDX_PERFORMANCE 0x00020000 + +/** + Option for GFDxVSync: Waits until vertical blank (default). + */ +#define GFDX_VSYNC_WAIT 0x0000 +/** + Option for GFDxVSync: Checks and immediately returns vertical blank status. + Returns GF_SUCCESS if in vertical blank, else returns GF_ERROR. + */ +#define GFDX_VSYNC_CHECK 0x0001 +/** + Option for GFDxVSync: Puts Wait token in the command FIFO and the CPU returns + immediately. Uses FRAME_END interrupt bit. + */ +#define GFDX_VSYNC_HW_WAIT 0x0002 +/** + Option for GFDxVSync: Raise and wait in the command fifo for VBLANK. + */ +#define GFDX_VBLANK_HW_WAIT 0x0003 +/** + Option for GFDxVSync: Raise and wait in the command fifo for VPULSE3. + */ +#define GFDX_VPULSE3_HW_WAIT 0x0004 + +/** Dx Hardware has multiple windows (some registers are replicated per + window - the window must be exlicitly selected to write to the correct + register in the window). Use this enum to select which window + to write to for APIs that support this - window selection is mostly + done through the attribute name, eg: _WA, _WB, etc. + */ +typedef enum _GFDXWINDOWSELECT +{ + DX_WINDOW_SELECT_NONE = 0, + DX_WINDOW_SELECT_NORMAL = 1, /* all windows */ + DX_WINDOW_SELECT_A = 2, + DX_WINDOW_SELECT_B = 4, + DX_WINDOW_SELECT_C = 8 +} GFDXWINDOWSELECT; + +/** Color Space Conversion coefficients. Use GFDxSetCSCCoeff() and + GFDxGetCSCCoeff() to write/read the coefficients to/from hardware. + */ +typedef struct _GFDXCSCCOEFF +{ + NvU32 YOF; + NvU32 KYRGB; + NvU32 KUR; + NvU32 KVR; + NvU32 KUG; + NvU32 KVG; + NvU32 KUB; + NvU32 KVB; +} GFDXCSCCOEF; + +typedef struct _DXSCRIPTCMD +{ + NvU32 ScriptCmdType; /** Script Command */ + NvU32 DataBurstCount; /** Burst count 0-255, not Valid for GFSCMD */ + NvU32 PanelDriverCmd; /** Valid Only if ScriptCmdType = GFPDRV_CMD */ + NvU32 *PanelIndexData; /** Data pointer */ + NvU32 GFData; /** Valid only if ScriptCmdType is GFSCMD */ + NvU32 reserved1; +} DXSCRIPTCMD, *PDXSCRIPTCMD; + +typedef struct _GFLCDTABLE { + /** For usage see GFDxSetDisplay()*/ + GF_RETTYPE (* DxSetDisplay)(GFDxHandle DxHandle, int lcdSel, NvU32 ulStartAddr, + NvU32 ulStride, unsigned bpp); + /** For usage see GFDxEnableDisplay()*/ + GF_RETTYPE (* DxEnableDisplay)(GFDxHandle DxHandle, int lcdSel, unsigned bOn); + /** For usage see GFDxSetAttribute()*/ + GF_RETTYPE (* DxSetAttribute)(GFDxHandle DxHandle, int lcdSel, unsigned aid, NvU32 attr); + /** For usage see GFDxGetAttribute()*/ + GF_RETTYPE (* DxGetAttribute)(GFDxHandle DxHandle, int lcdSel, unsigned aid, NvU32 *attr); + /** For usage see GFDxSetAttributeWithCS()*/ + GF_RETTYPE (* DxSetAttributeWithCS)(GFDxHandle DxHandle, int lcdSel, unsigned aid, NvU32 attr); + /** For usage see GFDxGetAttributeWithCS()*/ + GF_RETTYPE (* DxGetAttributeWithCS)(GFDxHandle DxHandle, int lcdSel, unsigned aid, NvU32 *attr); + /** For usage see GFDxRotate()*/ + GF_RETTYPE (* DxRotate)(GFDxHandle DxHandle, int lcdSel, unsigned nRotate, NvU32 ulStartAddr); + /** For usage see GFDxErase()*/ + GF_RETTYPE (* DxErase)(GFDxHandle DxHandle, int lcdSel, NvU32 ulStartAddr, NvU32 color); + /** For usage see GFDxSwitchLCD()*/ + GF_RETTYPE (* DxSwitchLCD)(GFDxHandle DxHandle, int lcdSel, int Option); + /** LCD Configurations */ + void * pLcdConfig; + /** For usage see GFDxScriptCmd()*/ + GF_RETTYPE (* DxScriptCmd)(GFDxHandle DxHandle, int lcdSel, PDXSCRIPTCMD pDxScriptCmd, NvU32 Option); + /** For usage see GFDxScriptCmdWithCS()*/ + GF_RETTYPE (* DxScriptCmdWithCS)(GFDxHandle DxHandle, int lcdSel, PDXSCRIPTCMD pDxScriptCmd, NvU32 Option); + /** For usage see GFDxDisplayTiming()*/ + GF_RETTYPE (* DxDisplayTiming)(GFDxHandle DxHandle, int lcdSel, PDISPLAYTIMINGENTRY pDxTiming, NvU32 Option); + /** For usage see GFDxDisplayTimingWithCS()*/ + GF_RETTYPE (* DxDisplayTimingWithCS)(GFDxHandle DxHandle, int lcdSel, PDISPLAYTIMINGENTRY pDxTiming, NvU32 Option); + /** For usage see GFDxSetDisplayEx()*/ + GF_RETTYPE (* DxSetDisplayEx)(GFDxHandle DxHandle, int lcdSel, NvU32 ulStartAddr, + NvU32 ulStride, unsigned bpp, unsigned bOn); +} GFLCDTABLE; + +/* Publicly exposed DX API function table */ +typedef struct _GFDXTABLE +{ + /** For usage see GFDxGetProperty()*/ + GF_RETTYPE (* DxGetProperty)(GFDxHandle DxHandle, PGFDXPROPERTY pDxProp); + /** For usage see GFDxVSync()*/ + GF_RETTYPE (* DxVSync)(GFDxHandle DxHandle, NvU16 option); + /** For usage see GFDxSetDisplayWithCS()*/ + GF_RETTYPE (* DxSetDisplayWithCS)(GFDxHandle DxHandle, int lcdSel, + NvU32 ulStartAddr, NvU32 ulStride, unsigned bpp); + /** For usage see GFDxEnableDisplayWithCS()*/ + GF_RETTYPE (* DxEnableDisplayWithCS)(GFDxHandle DxHandle, int lcdSel, + unsigned bOn); +// Removed to make the WinCE dll binary compatible with SC4 dll. +// GF_RETTYPE (* DxHSync)(GFDxHandle DxHandle, NvU16 option); + + /** For per LCD functions. ()*/ + GFLCDTABLE Lcd[MAX_LCD]; + /** For usage see GFDxEraseWithCS()*/ + GF_RETTYPE (* DxEraseWithCS)(GFDxHandle DxHandle, int lcdSel, + NvU32 ulStartAddr, NvU32 color); + /** For usage see GFDxSetCSCCoeff()*/ + GF_RETTYPE (* DxSetCSCCoeff)( GFDxHandle DxHandle, GFDXWINDOWSELECT window, + GFDXCSCCOEF *coef ); + /** For usage see GFDxGetCSCCoeff()*/ + GF_RETTYPE (* DxGetCSCCoeff)( GFDxHandle DxHandle, GFDXWINDOWSELECT window, + GFDXCSCCOEF *coef ); + /** For usage see GFDxVSyncWithCS()*/ + GF_RETTYPE (* DxVSyncWithCS)(GFDxHandle DxHandle, NvU16 option); + /** For usage see GFDxSetCSCCoeffWithCS()*/ + GF_RETTYPE (* DxSetCSCCoeffWithCS)( GFDxHandle DxHandle, GFDXWINDOWSELECT window, + GFDXCSCCOEF *coef ); + /** For usage see GFDxGetCSCCoeffWithCS()*/ + GF_RETTYPE (* DxGetCSCCoeffWithCS)( GFDxHandle DxHandle, GFDXWINDOWSELECT window, + GFDXCSCCOEF *coef ); + /** For usage see GFDxSetDisplayExWithCS()*/ + GF_RETTYPE (* DxSetDisplayExWithCS)(GFDxHandle DxHandle, int lcdSel, + NvU32 ulStartAddr, NvU32 ulStride, unsigned bpp, unsigned bOn); +} GFDXTABLE, *PGFDXTABLE; + +/** Filter coefficients */ +typedef struct GFDxHorizontalFilter_t +{ + NvU32 filter[16]; +} GFDxHorizontalFilter; + +typedef struct GFDxVerticalFilter_t +{ + NvU32 filter[16]; +} GFDxVerticalFilter; + +/** + Typesafe function for opening Dx component. + This function is implicitly called by the resource manager (GFRm) in response + to an application’s call to GFRmComponentGet() for the GFDxAPI + component. It is not supposed to be called by an application. It is included + here only for the purpose of GFDxAPI source code customization. + + @param hrm (GFRmHandle) Handle to Rm component. + @param phDx (GFDxHandle *) Handle to Dx component. + @param state (GF_STATE_TYPE) + @param hCh (GFRmChHandle) Handle to Channel. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +GF_RETTYPE GFDxOpen(GFRmHandle hRm, GFDxHandle *phDx, + GF_STATE_TYPE state, GFRmChHandle hCh); + +/** + Typesafe function for closing Dx component. + This function is implicitly called by the resource manager (GFRm) in response + to an application’s call to GFRmComponentGet() for the GFDxAPI + component. It is included here only for the purpose of GFDxAPI source code + customization. + + @param phDx (GFDxHandle *) Handle to Dx component. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + * +*/ +void GFDxClose(GFDxHandle *phDx); + +/** + This funtion returns the fixed properties of the display hardware. + + @param DxHandle (GFDxHandle) Handle to Dx Component + @param pDxProp (PGFDXPROPERTY) See #GFDXPROPERTY + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxGetProperty( handle, pDxProp ) \ + ((PGFDXTABLE)handle)->DxGetProperty( handle, pDxProp ) + +/** + This functions waits for a vertical sync and returns to the caller. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param option (NvU16) Search for Option for GFDxVSync for more info. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxVSync(handle, option) \ + ((PGFDXTABLE)handle)->DxVSync( handle, option ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxVSync(). + */ +#define GFDxVSyncWithCS(handle, option) \ + ((PGFDXTABLE)handle)->DxVSyncWithCS( handle, option ) + +/** + IMPORTANT NOTE: This function is not available. + */ +#define GFDxHSync(handle, option) \ + ((PGFDXTABLE)handle)->DxHSync( handle, option ) + +/** + This function initializes the main LCD or sub-LCD display. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param Handle (DxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param ulStartAddr (NvU32) display start address for main or sub-LCD (should be set to 0). + GFDxSetAttribute() should be called to set the display start + address for the main LCD or sub-LCD. + @param ulStride (NvU32) Default stride if 0; otherwise use the passed value. + GFDxSetAttribute() should be called to set the display stride + for the main LCD or sub-LCD. + @param bpp (unsigned) Default should be 16 bits/pixel for main LCD or sub-LCD. + GFDxSetAttribute() should be called to set the display bpp for + the main LCD or sub-LCD. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSetDisplay( handle, lcdSel, ulStartAddr, ulStride, bpp ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSetDisplay( handle, lcdSel, ulStartAddr, ulStride, bpp ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxSetDisplay(). + */ +#define GFDxSetDisplayWithCS( handle, lcdSel, ulStartAddr, ulStride, bpp ) \ + ((PGFDXTABLE)handle)->DxSetDisplayWithCS( handle, lcdSel, ulStartAddr, \ + ulStride, bpp ) + +/** + This function initializes the main LCD or sub-LCD display. + IMPORTANT NOTE: This function extends GFDxSetDisplay() function by adding an option to enable/disable + the LCD display. + + @param Handle (DxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param ulStartAddr (NvU32) display start address for main or sub-LCD (should be set to 0). + GFDxSetAttribute() should be called to set the display start + address for the main LCD or sub-LCD. + @param ulStride (NvU32) Default stride if 0; otherwise use the passed value. + GFDxSetAttribute() should be called to set the display stride + for the main LCD or sub-LCD. + @param bpp (unsigned) Default should be 16 bits/pixel for main LCD or sub-LCD. + GFDxSetAttribute() should be called to set the display bpp for + the main LCD or sub-LCD. + @param bOn (unsigned) 1 to Enable Display, + 0 to disable Display. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSetDisplayEx( handle, lcdSel, ulStartAddr, ulStride, bpp, bOn ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSetDisplayEx( handle, lcdSel, ulStartAddr, ulStride, bpp, bOn ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxSetDisplayEx(). + */ +#define GFDxSetDisplayExWithCS( handle, lcdSel, ulStartAddr, ulStride, bpp, bOn ) \ + ((PGFDXTABLE)handle)->DxSetDisplayExWithCS( handle, lcdSel, ulStartAddr, \ + ulStride, bpp, On) + +/** + This function enables/disables LCD display with proper power sequencing. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param Handle (DxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param bOn (unsigned) Bit0: 1 to Enable Display, + 0 to disable Display. + Also Option for Panel Driver On/Off + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxEnableDisplay( handle, lcdSel, bOn ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxEnableDisplay( handle, lcdSel, bOn ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxEnableDisplay(). + */ +#define GFDxEnableDisplayWithCS( handle, lcdSel, bOn ) \ + ((PGFDXTABLE)handle)->DxEnableDisplayWithCS( handle, lcdSel, bOn ) + +/** + GFDxSetAttribute() sets the display attributes for a main panel or + subpanel. All the GFDxAPI attributes should be set after the + GFDxSetDisplay() + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param aid (unsigned) Attribute IDs. See #GFDXATTRIBUTES Enumeration Type + @param attr (NvU32) Attribute value for main LCD or sub-LCD. Should be + written with attribute ID in aid. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSetAttribute( handle, lcdSel, aid, attr) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSetAttribute( handle, lcdSel, aid, attr ) + +/** + Execute script command from DxApiTable. Send cmd/data to panel. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param ScriptCmdType (PDXSCRIPTCMD) Script Command + @param Option (NvU32) Reserved, not used. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxScriptCmd( handle, lcdSel, pDxScriptCmd, Option) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxScriptCmd( handle, lcdSel, pDxScriptCmd, Option ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxScriptCmd(). + */ +#define GFDxScriptCmdWithCS( handle, lcdSel, pDxScriptCmd, Option) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxScriptCmdWithCS( handle, lcdSel, pDxScriptCmd, Option ) + +/** Sets the timing registers. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param pDxTiming (PDISPLAYTIMINGENTRY) See #PDISPLAYTIMINGENTRY. + @param Option (NvU32) GF_DISPLAY_PARTIAL or GF_DISPLAY_NORMAL. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxDisplayTiming( handle, lcdSel, pDxTiming, Option) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxDisplayTiming( handle, lcdSel, pDxTiming, Option ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxDisplayTiming(). + */ +#define GFDxDisplayTimingWithCS( handle, lcdSel, pDxTiming, Option) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxDisplayTimingWithCS( handle, lcdSel, pDxTiming, Option ) + +/** + This function returns the bit depth, the destination stride, the start address, + the associated surface of the display buffer, or the graphics command + execution control. The location of the returned attribute value is pointed to by + attr. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param aid (unsigned) Attribute ID. see #GFDXATTRIBUTES. + @param attr (NvU32 *) pointer to attribute value. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxGetAttribute( handle, lcdSel, aid, pAttr) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxGetAttribute( handle, lcdSel, aid, pAttr ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxSetAttribute(). + */ +#define GFDxSetAttributeWithCS( handle, lcdSel, aid, attr) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSetAttributeWithCS( handle, lcdSel, aid, attr ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxGetAttribute(). + */ +#define GFDxGetAttributeWithCS( handle, lcdSel, aid, pAttr) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxGetAttributeWithCS( handle, lcdSel, aid, pAttr ) + +/** + IMPORTANT NOTE: this function is not available. + */ +#define GFDxRotate( handle, lcdSel, nRotate, ulStartAddr ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxRotate( handle, lcdSel, nRotate, ulStartAddr ) + +/** + This function clears the main or subdisplay screen with the given color. It also + clears the display buffer of the main or subpanel window. Window A buffer 0 + is used as a display buffer. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param ulStartAddr (NvU32) Start Address. (The offset in bytes of the + display frame buffer.) + @param color (NvU32) Clear screen with this color. The 32-bit value + has a 16-bit color duplicated in the upper and + lower parts. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxErase( handle, lcdSel, ulStartAddr, color ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxErase( handle, lcdSel, ulStartAddr, color ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxErase(). + */ +#define GFDxEraseWithCS( handle, lcdSel, ulStartAddr, color ) \ + ((PGFDXTABLE)handle)->DxEraseWithCS( handle, lcdSel, ulStartAddr, color ) + +/** + This function enables swithcing between the main LCD and sub-LCD. + IMPORTANT NOTE: This function has critical sections and is thread-safe. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param lcdSel (int) 0 for LCD_MAIN. + 1 for LCD_SUB. + @param Option (NvU32) 0 for switch (Must be set to 0) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSwitchLCD( handle, lcdSel, Option ) \ + ((PGFDXTABLE)handle)->Lcd[lcdSel].DxSwitchLCD( handle, lcdSel, Option ) + +/** + This function sets the hardware Color Space Conversion (CSC) Coefficients. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param window (GFDXWINDOWSELECT) Controller window. see #GFDXWINDOWSELECT. + @param coef (GFDXCSCCOEF *) CSC coefficients. see #GFDXCSCCOEF. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxSetCSCCoeff( handle, window, coef ) \ + ((PGFDXTABLE)handle)->DxSetCSCCoeff( handle, window, coef ) + +/** + This function gets the hardware Color Space Conversion (CSC) Coefficients. + IMPORTANT NOTE: This function is now identical to the WithCS version + of it (i.e. it has Critical Sections and is multi-thread safe) as the + WithCS version is being phased out. + + @param DxHandle (GFDxHandle) Handle to Dx Component. + @param window (GFDXWINDOWSELECT) Controller window. see #GFDXWINDOWSELECT. + @param coef (GFDXCSCCOEF *) CSC coefficients. see #GFDXCSCCOEF. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + */ +#define GFDxGetCSCCoeff( handle, window, coef ) \ + ((PGFDXTABLE)handle)->DxGetCSCCoeff( handle, window, coef ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxSetCSCCoeff(). + */ +#define GFDxSetCSCCoeffWithCS( handle, window, coef ) \ + ((PGFDXTABLE)handle)->DxSetCSCCoeffWithCS( handle, window, coef ) + +/** + IMPORTANT NOTE: This function is being phased out. The critical + section functionality now exists in GFDxGetCSCCoeff(). + */ +#define GFDxGetCSCCoeffWithCS( handle, window, coef ) \ + ((PGFDXTABLE)handle)->DxGetCSCCoeffWithCS( handle, window, coef ) +/*@}*/ + +/** GFDxSetDefaultPanelMode - sets the default mode for multi-mode panels. + + @param handle A handle to a Dx instance + @param mode The panel mode + + Some panels support multiple modes. To support mode switching, the + default panel mode must be known. + */ +GF_RETTYPE +GFDxSetDefaultPanelMode( GFDxHandle handle, NvU32 mode ); + +/** GFDxSwitchPanelMode - switch from the current mode to a new mode. + + @param handle A handle to a Dx instance + @param mode The panel mode + + This switches from the current mode to a new mode. This calls a display + script with the name "SwitchMode__to_" where x is the current mode + and y is the new mode. + */ +GF_RETTYPE +GFDxSwitchPanelMode( GFDxHandle handle, NvU32 mode ); + +/** GFDxSPIRegEnable - enable register reads and writes over SPI. + + @param handle A handle to a Dx instance + @param enable Either enable or disable register read/writes. + + Enabling SPI register reads/writes may change the pin mapping which + may prevent the rest of the display api from behaving properly (pixel + data may no longer output to the panel). Disabling will restore + the pin mapping. + */ +void +GFDxSpiRegEnable( GFDxHandle handle, NvBool enable ); + +/** GFDxSPIRegWrite - write a 16 bit register over SPI. + + @param handle A handle to a Dx instance + @param address The address to write + @param data The data to write + */ +GF_RETTYPE +GFDxSpiRegWrite( GFDxHandle handle, NvU16 address, NvU16 data ); + +/** GFDxSPIRegRead - read a 16 bit register over SPI. + + @param handle A handle to a Dx instance + @param address The address to read from + @param data The data to read (out param) + */ +GF_RETTYPE +GFDxSpiRegRead( GFDxHandle handle, NvU16 address, NvU16 *data ); + +/** GFDxSpiPixelInit - send init sequence to the panel and setup the pixel + write hardware. + + @param handle A handle to a Dx instance + @param seq_data_a The first 32 bits of init data + @param seq_data_b The second 32 bits of init data + @param seq_data_c The third 32 bits of init data + @param seq_data_d The fourth 32 bits of init data + + Note that this only support SPI16 mode, msb2lsb data ordering. + + Some panels may need the init sequence before every frame, in which + case, this should always be called before GFDxSpiPixelWrite(). + */ +GF_RETTYPE +GFDxSpiPixelInit( GFDxHandle handle, NvU32 seq_data_a, + NvU32 seq_data_b, NvU32 seq_data_c, NvU32 seq_data_d ); + +/** GFDxSpiPixelWrite - writes the given pixel to the panel over SPI. + + @param handle A handle to a Dx instance + @param pixel The pixels to write + */ +GF_RETTYPE +GFDxSpiPixelWrite( GFDxHandle handle, NvUPtr pixels ); + +/** GFDxSpiScript - send commands to the spi hardware via an in-memory script. + + @param handle A handle to a Dx instance + @param script The script to execute + */ +GF_RETTYPE +GFDxSpiScript( GFDxHandle handle, NvU32 *script ); + +/** GFDxSetPixelClock - sets the pixel clock divider in half step increments. + + @param handle A handle to the Dx instance + @param divider The pixel clock divider (actually shift clock - pixel clock + will be the same as shift clock) + + Note: the divider is in half step increments: 1 = 1, 2 = 1.5, 3 = 2, etc. + */ +GF_RETTYPE +GFDxSetPixelClock( GFDxHandle handle, NvU32 divider ); + +/** GFDxGetPixelClock - gets the current shift clock divider value. + + @param handle A handle to the Dx instance + @param divider The pixel clock divider (actually shift clock - pixel clock + will be the same as shift clock) + + */ +GF_RETTYPE +GFDxGetPixelClock( GFDxHandle handle, NvU32 *divider ); + +/** GFDxSetFilter - sets the window filtering coefficients. + + @param handle A handle to the Dx instance + @param window The target window for the new coefficients + @param hfilter The horizontal filtering coefficients + @param vfilter The vertical filtering coefficients + + Window A does NOT support filtering. + Window C only supports horizontal filtering (the vfilter param must be + null) + Window B supports both h and v filtering + + Passing null to both h and v filter will disabling filtering. + + DX_WINDOW_SELECT_NONE and DX_WINDOW_SELECT_NORMAL should not be used. + */ +GF_RETTYPE +GFDxSetFilter( GFDxHandle handle, GFDXWINDOWSELECT window, + GFDxHorizontalFilter *hfilter, GFDxVerticalFilter *vfilter ); + +#ifdef PROJECT_SEC_G1 +/** GFDxSetFilter - sets the clock and timing to support focus TV encoder. + + @param handle A handle to the Dx instance + @param option The Normal/NTSC/PAL mode to set + */ +GF_RETTYPE +GFDxSetMode( GFDxHandle handle, NvU32 option ); +#endif + +#ifdef __cplusplus +} +#endif + +/** @page pageDxAppNotes DxAPI Application Notes + + @section pageDxAppNotes1 Todo + +*/ + +#endif /* GF_DX_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFEPP.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFEPP.h new file mode 100755 index 00000000..36d28219 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFEPP.h @@ -0,0 +1,89 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFEPP.h + GFSDK EPP API +*/ + +#ifndef __GFEPP_H__ +#define __GFEPP_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupEPP EPPAPI EPP API +*/ +/*@{*/ + +typedef struct _GFEPPBUFFERINFO +{ + NvU32 flag; + PGFRECT pSrcRect; + void *pLine; + NvU32 alphaValue; + NvU32 numofSurfs; + PGFRMSURFACE *ppSurf; +} GFEPPBUFFERINFO, *PEPPBUFFERINFO; + + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFEPPOpen(GFRmHandle hRm, GFEPPHandle *phEPP, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFEPPClose(GFEPPHandle *phEPP); + +GF_RETTYPE GFEPPSetBuffers(GFEPPHandle EPPHandle, PEPPBUFFERINFO pBuf); +GF_RETTYPE GFEPPRaiseBuffer(GFEPPHandle EPPHandle, NvU32, NvU32* pCmdS, NvU32* pIndex); +GF_RETTYPE GFEPPRaiseFrame(GFEPPHandle EPPHandle, NvU32, NvU32* pCmdS, NvU32* pIndex); + + +#define EPPBUFFERINFO_FLAG_SRC_VI 0x00000001 + //incoming video from VI +#define EPPBUFFERINFO_FLAG_SRC_SB 0x00000002 + //incoming video from SB +#define EPPBUFFERINFO_FLAG_SRC_GC 0x00000003 + //incoming video from display +#define EPPBUFFERINFO_FLAG_SRC_MASK 0x0000000F + +#define EPPBUFFERINFO_FLAG_SRC_VI_YUV444 0x00000010 + //incoming video from VI +#define EPPBUFFERINFO_FLAG_SRC_VI_BAYER 0x00000020 + //incoming video from VI, Raw Bayer data +#define EPPBUFFERINFO_FLAG_SRC_VI_RGB 0x00000030 + //incoming video from VI, Raw RGB data +#define EPPBUFFERINFO_FLAG_SRC_VI_MASK 0x000000F0 + +#define EPPBUFFERINFO_FLAG_PRE_PROC 0x00000100 + //pre process filter enable +#define EPPBUFFERINFO_FLAG_AVERAGE 0x00000200 + //enable average for 420 planar or 444 to 422 conversion. +#define EPPBUFFERINFO_FLAG_C_SIGN 0x00000400 + //chroma sign +#define EPPBUFFERINFO_FLAG_DMA 0x00000800 + //enable DMA +#define EPPBUFFERINFO_FLAG_DUP 0x00001000 + //duplicate +#define EPPBUFFERINFO_FLAG_H_DIRECTION 0x00002000 +#define EPPBUFFERINFO_FLAG_V_DIRECTION 0x00004000 +#define EPPBUFFERINFO_FLAG_XY_SWAP 0x00008000 + +#define EPPBUFFERINFO_FLAG_SRC_SB_YUV 0x00010000 +#define EPPBUFFERINFO_FLAG_SRC_SB_RGB 0x00020000 +#define EPPBUFFERINFO_FLAG_SRC_SB_MASK 0x000F0000 + + //BE CAREFUL WITH THE STRIDE PROGRAMMING! + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif // _GFEPP_H_ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFFDev.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFFDev.h new file mode 100755 index 00000000..6826085b --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFFDev.h @@ -0,0 +1,321 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFFDev.h + GFSDK File Device API header file. +*/ + +#ifndef __GFFDEV_H__ +#define __GFFDEV_H__ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupFDev FDevAPI File Device API +
        +
      • @ref pageFDevAppNotes +
          +
        • @ref pageFDevAppNotes1 +
        +
      +*/ +/*@{*/ + +/** FDev capability flag. + @see GFFDevMount() + */ +#define GFFDEV_CAP_STANDARD 0x00010000 /**< Standard C Library */ + +/** FDev capability flag. + @see GFFDevMount() + */ +#define GFFDEV_CAP_DEVICE_SD 0x00000001 /**< SD Device Supported */ + +/** FDev capability flag. + @see GFFDevMount() + */ +#define GFFDEV_CAP_FAT 0x00020000 /**< Fat FileSystem */ + +/** FDev capability flag. + @see GFFDevMount() + */ +#define GFFDEV_CAP_DEVICE_MASK 0x00000FFF + +/** FDev capability flag - default on the selected OS. + Linux, Windows -> Standard, else -> SD + @see GFFDevMount() + */ +#if !NVOS_IS_WINDOWS && !NVOS_IS_LINUX +#define GFFDEV_CAP_DEFAULT_FOR_OS GFFDEV_CAP_DEVICE_SD +#else +#define GFFDEV_CAP_DEFAULT_FOR_OS GFFDEV_CAP_STANDARD +#endif + +/** Parameter enum for GFFDevSeekFile. + @see GFFDevSeekFile + */ +typedef enum +{ + GFFDEV_SEEK_SET = 0, /**< Set fileHandle relative to beginning of file */ + GFFDEV_SEEK_CUR, /**< Set fileHandle relative to specified offset location */ + GFFDEV_SEEK_END /**< Set fileHandle relative to end of file */ +} GFFDEVSEEKTYPE; + +/** Public File Info structure. + Matches Microsoft's struct _finddata_t . + + @see FDevFindFirstFile() + @see FDevFindNextFile() + */ +typedef struct _GFFDEVFILEINFO +{ + unsigned attrib; + NvU32 time_create; /**< -1 for FAT file systems */ + NvU32 time_access; /**< -1 for FAT file systems */ + NvU32 time_write; + NvU32 size; + char name[260]; +} GFFDEVFILEINFO, *PGFFDEVFILEINFO; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFFDevOpen(GFRmHandle hRm, GFFDevHandle *phFDev, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFFDevClose(GFFDevHandle *phFDev); + +/** @name Functions +@{*/ + +/** Mounts a filesystem. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param capType (NvU32) capability type + + The filesystem pointed to by #FDevHandle will be mounted based on + the #capType. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevMount(GFFDevHandle FDevHandle, NvU32 capType); + +/** Unmounts a mounted filesystem. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error +*/ +GF_RETTYPE GFFDevUnmount(GFFDevHandle FDevHandle); + +/** Opens a file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (const char *) name of the file + @param fileSpec (const char *) read/write/etc flags + @param pFileHandle (#GFFDevFileHandle) Pointer to the handle of the opened file - + will be filled in by #GFFDevOpenFile() + + Opens a file on the mounted filesystem with #fileName. Open flags, + given by #fileSpec, are the same as libc's fopen. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevOpenFile(GFFDevHandle FDevhandle, + const char *fileName, + const char *fileSpec, + GFFDevFileHandle *pFileHandle); + +/** Closes an open file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param pFileHandle (#GFFDevFileHandle *) Pointer to the open file + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevCloseFile(GFFDevHandle FDevhandle, + GFFDevFileHandle *pFileHandle); + +/** Reads data from a file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileHandle (#GFFDevFileHandle) Handle to the open file + @param pReadBuf (void *) Buffer for file bytes + @param pCount (NvU32 *) Pointer to number of bytes to read, will be + written to the actual number of bytes read. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevReadFile(GFFDevHandle FDevhandle, + GFFDevFileHandle fileHandle, + void * pReadBuf, + NvU32 *pCount); + +/** Writes data to an open file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileHandle (#GFFDevFileHandle) Handle to open file + @param pWriteBuf (void *) pointer to bytes to write to the file + @param pCount (NvU32 *) pointer to number of bytes to write, will + be written to actual number of bytes written. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevWriteFile(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle, + void * pWriteBuf, + NvU32 *pCount ); + +/** Sets the file read/write position. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileHandle (#GFFDevFileHandle) Handle to open file + @param offset (NvS32) offset to be used with #where + @param where (#GFFDEVSEEKTYPE) file offset base + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevSeekFile(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle, + NvS32 offset, + GFFDEVSEEKTYPE where); + +/** Gets the current file position. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileHandle (#GFFDevFileHandle) Handle to open file + @param pOffset (NvU32 *) pointer to offset, will be filled in + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevTellFile(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle, + NvU32 *pOffset); + +/** Gets the file size. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (#GFFDevFileHandle) Handle of open file + @param pSize (NvU32 *) pointer to file size, will be filled in. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevGetFileSize(GFFDevHandle FDevHandle, + const char *fileName, + NvU32 *pSize); + +/** Renames a file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param oldFileName (const char *) name of existing file + @param newFileName (const char *) name to which to rename the file + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevRenameFile(GFFDevHandle FDevHandle, + const char *oldFileName, + const char *newFileName); + +/** Removes a file from the filesystem + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (#GFFDevFileHandle) Handle of open file + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevDeleteFile(GFFDevHandle FDevHandle, + const char *fileName); + +/** Gets the first file in a directory. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param dirName (const char *) Name of the directory to enumerate + @param pFileInfo (#GFFDEVFILEINFO *) pointer to the file info for the + first file + @param pDirHandle (#GFFDevDirHandle *) pointer to the handle to the directory + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevFindFirstFile(GFFDevHandle FDevHandle, + const char *dirName, + GFFDEVFILEINFO *pFileInfo, + GFFDevDirHandle *pDirHandle); + +/** Gets the next file in the directory. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param pFileInfo (#GFFDEVFILEINFO *) pointer ot the info for the next file + @param pDirHandle (#GFFDevDirHandle *) pointer to the directory handle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevFindNextFile(GFFDevHandle FDevHandle, + GFFDEVFILEINFO *pFileInfo, + GFFDevDirHandle *pDirHandle); + +/** Closes the directory. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param pDirHandle (#GFFDevDirHandle *) pointer to the directory handle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevFindCloseFile(GFFDevHandle FDevHandle, + GFFDevDirHandle *pdirHandle); + +/** Flushes all buffered data to the file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (#GFFDevFileHandle) Handle of open file + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevFlushFile(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle); + +/** Gets the filesystem blocks for the file. + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param fileName (#GFFDevFileHandle) Handle of open file + @param size (NvU32) size of the file + @param ppBlockList (#PGFBLOCKLIST *) block list to be allocated + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevBlockListAlloc(GFFDevHandle FDevHandle, + GFFDevFileHandle fileHandle, + NvU32 size, + PGFBLOCKLIST *ppBlockList ); + +/** Gets the FDev API properties + @param FDevHandle (#GFFDevHandle) Handle to FDev API + @param pBlockList (#PGFBLOCKLIST) Block list to deallocate + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Error + */ +GF_RETTYPE GFFDevBlockListFree(GFFDevHandle FDevHandle, + PGFBLOCKLIST pBlockList ); + +/*@}*/ +/*@}*/ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/** @page pageFDevAppNotes FDevAPI Application Notes + + @section pageFDevAppNotes1 Todo + +*/ + +#endif /* __GFFDEV_H__ */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFGx.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFGx.h new file mode 100755 index 00000000..5a974df4 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFGx.h @@ -0,0 +1,1927 @@ +/* + * Copyright (c) 2005 - 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software and related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ +/** @file GFGx.h + GFSDK Graphics API header file. +*/ + +#ifndef __GFGx_H__ +#define __GFGx_H__ + +#include "GFRm.h" + +/* GFGxAPI error codes */ +#include "GFGxError.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + +/** @addtogroup groupGx GxAPI Graphics API +*/ + /*
        +
      • @ref pageGxAppNotes +
          +
        • @ref pageGxAppNotes1 +
        +
      + */ + +/*@{*/ + +/**** GX CAPABILITIES DEFINITIONS ****/ + +/** GFGxAPI capability definition : bitblt support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_BLT 0x00000001UL // BitBlt +/** GFGxAPI capability definition : linedraw support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_LINE 0x00000002UL // Line draw +/** GFGxAPI capability definition : clipping support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_CLIP 0x00000004UL // Clipping +/** GFGxAPI capability definition : stretchblt support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_STRETCHBLT 0x00000008UL // StretchBlt +/** GFGxAPI capability definition : alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHABLENDING 0x00000010UL // Alpha blending +/** GFGxAPI capability definition : alphablending and transparency support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_COLOR_CMP 0x00000020UL // Alpha blending + +/* NEW CAPABILITY FLAGS */ + +/** GFGxAPI capability definition : fast rotation support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_FAST_ROTATION 0x00000040UL // Fast Rotation + +/** GFGxAPI capability definition : inside clipping support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_CLIPPING_INSIDE 0x00000100UL // Inside Clipping +/** GFGxAPI capability definition : fadeblt support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_FADE_BLT 0x00000200UL // Fade Blt + +/** GFGxAPI capability definition : color pattern support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_COLOR_PATTERN 0x00001000UL // Color Pattern +/** GFGxAPI capability definition : color pattern transparency support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_CLR_PAT_TRANSPARENT 0x00002000UL // Color Pattern Transparency +/** GFGxAPI capability definition : alphablending and fading support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_AND_FADING 0x00004000UL // ALpha Blending & fading +/** GFGxAPI capability definition : 1BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_1BPP 0x00008000UL // Planar 1 BPP Alpha +/** GFGxAPI capability definition : 2BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_2BPP 0x00010000UL // Planar 2 BPP Alpha +/** GFGxAPI capability definition : 4BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_4BPP 0x00020000UL // Planar 4 BPP Alpha +/** GFGxAPI capability definition : 8BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_8BPP 0x00040000UL // Planar 8 BPP Alpha +/** GFGxAPI capability definition : SRC4DST4BPP alpha plane support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_SRC4DST4 0x00080000UL // Planar 44 BPP Alpha + // 8 bpp plane, src * 4 + dst*4 +/** GFGxAPI capability definition : 32BPP to 16BPP alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_PLANAR_32BLEND16 0x00200000UL // 32 bits source blending +/** GFGxAPI capability definition : src 1555 alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_SRC1555 0x00400000UL // Src alpha 1555 +/** GFGxAPI capability definition : src 4444 alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_SRC4444 0x00800000UL // Src alpha 4444 +/** GFGxAPI capability definition : src fixed alphablending support. + @see GFGxGetProperty() +*/ +#define GFGX_CAP_ALPHA_FIXED 0x01000000UL // Fixed alpha + +/**** CLIPPING FLAGS ****/ + +/* disable clipping */ +/** GFGxAPI CLIPPING flags : disable clipping. + @see GFGxSetClip() +*/ +#define GFGX_SETCLIP_DISABLE 0x00000000UL + +/* enable clipping */ +/** GFGxAPI CLIPPING flags : enable clipping. + @see GFGxSetClip() +*/ +#define GFGX_SETCLIP_ENABLE 0x00000001UL + +/* set clipping rectangle */ +/** GFGxAPI CLIPPING flags : set clipping rectangle. + @see GFGxSetClip() +*/ +#define GFGX_SETCLIP_SETRECT 0x00000002UL + +/* set inside clipping - default is outside clipping*/ +/** GFGxAPI CLIPPING flags : set inside clipping, default is outside. + @see GFGxSetClip() +*/ +#define GFGX_SETCLIP_INSIDE 0x00000004UL + + +/**** LINE DRAW FLAGS ****/ + +/* don't draw last pixel */ +/** GFGxAPI LINE DRAW flags : do not draw last pixel. + @see GFGxLine() +*/ +#define GFGX_LINE_NOT_DRAW_LAST_PIXEL 0x00000001UL + +/**** BITBLT - SOURCE FLAGS ****/ + +/* source is screen */ +/** GFGxAPI BITBLT Source flags : source comes from video mem. + @see GFGxBlt() +*/ +#define GFGX_BLT_SRC_VIDEO 0x00000000UL + +/* color source in system memory */ +/** GFGxAPI BITBLT Source flags : colour source comes from system mem. + @see GFGxBlt() +*/ +#define GFGX_BLT_SRC_SYSMEM_COLOR 0x00000001UL + +/* mono source in system memory */ +/** GFGxAPI BITBLT Source flags : mono source comes from system mem. + @see GFGxBlt() +*/ +#define GFGX_BLT_SRC_SYSMEM_MONO 0x00000002UL + +/* source is solid color */ +/** GFGxAPI BITBLT Source flags : source is solid (unique color). + @see GFGxBlt() +*/ +#define GFGX_BLT_SRC_SOLID 0x00000004UL + + +/**** BITBLT - PATTERN FLAGS ****/ + +/* pattern is mono */ +/** GFGxAPI BITBLT Pattern flags : pattern is mono. + @see GFGxBlt() +*/ +#define GFGX_BLT_PAT_MONO 0x00000008UL + +/* pattern is color */ +/** GFGxAPI BITBLT Pattern flags : pattern is color. + @see GFGxBlt() +*/ +#define GFGX_BLT_PAT_COLOR 0x00000010UL + +/* pattern is solid color */ +/** GFGxAPI BITBLT Pattern flags : pattern is solid (unique color). + @see GFGxBlt() +*/ +#define GFGX_BLT_PAT_SOLID 0x00000020UL + +/* pattern is cached */ +/** GFGxAPI BITBLT Pattern flags : pattern is cached in video mem. + The pattern ID for the cached pattern is returned in the pPatID + field in GFGXBLTPARAM sruct. User needs to make sure that a valid + pointer is passed in pPatID. + @see GFGxBlt() +*/ +#define GFGX_BLT_PAT_CACHE 0x00000040UL + + +/**** BITBLT - MODE FLAGS ****/ +/**** Linear / XY Mode / Surface Flag ****/ + +/* XY Mode Blt */ +/** GFGxAPI BITBLT Mode flags : X/Y mode is used. + @see GFGxBlt() +*/ +#define GFGX_BLT_MODE_XY 0x00000000UL + +/* Linear Mode Blt */ +/** GFGxAPI BITBLT Mode flags : linear mode is used. + @see GFGxBlt() +*/ +#define GFGX_BLT_MODE_LINEAR 0x00000080UL + +/* Surface to Surface blt */ +/** GFGxAPI BITBLT Mode flags : surface to surface mode is used. + @see GFGxBlt() +*/ +#define GFGX_BLT_SURFACE 0x00000100UL + + +/**** BITBLT - CLIPPING FLAGS ****/ + +/* enable clipping */ +/** GFGxAPI BITBLT Clipping flags : enable clipping. + @see GFGxBlt() +*/ +#define GFGX_BLT_CLIP 0x00000200UL + +/**** BITBLT - SOURCE TRANSPARENCY FLAGS ****/ + +/* color source transparent blt (if source pixel matches colorCompare, +do not overwrite) */ +/** GFGxAPI BITBLT Source Transparency flags : enable color source transparency + (if source pixel matches colorCompare, do not overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_SRC_COLOR 0x00000400UL + +/* color source inverse transparent blt (if source pixel matches +colorCompare, overwrite) */ +/** GFGxAPI BITBLT Source Transparency flags : enable color source inverse + transparency (if source pixel matches colorCompare, overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_SRC_COLOR_INV 0x08000000UL + + +/* mono source transparent blt (if source bit is 0, no +overwrite on corresponding destination location) */ +/** GFGxAPI BITBLT Source Transparency flags : enable mono source transparency + (if source bit is 0, no overwrite on corresponding destination location). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_SRC_MONO 0x00000800UL + +/* mono source inverted transparent blt (if source bit +is 1, no overwrite on corresponding destination location) */ +/** GFGxAPI BITBLT Source Transparency flags : enable mono source inverse + transparency (if source bit is 1, no overwrite on corresponding destination + location). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_SRC_MONO_INV 0x00001000UL + + +/**** BITBLT - DESTINATION TRANSPARENCY FLAGS ****/ + +/* destination transparent blt (if destination pixel matches colorCompare, +overwrite) */ +/** GFGxAPI BITBLT Destination Transparency flags : enable destination + transparency (if destination pixel matches colorCompare, overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_DST 0x00002000UL + +/* destination transparent inverse blt (if destination pixel matches +colorCompare, donot overwrite) */ +/** GFGxAPI BITBLT Destination Transparency flags : enable destination inverse + transparency (if destination pixel matches colorCompare, do not overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_DST_INV 0x10000000UL + +/**** BITBLT - PATTERN TRANSPARENCY FLAGS ****/ + +/* Mono pattern transparent Blt */ +/** GFGxAPI BITBLT Pattern Transparency flags : enable mono pattern transparency + (if pattern bit is 0, no overwrite on corresponding destination location). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_PAT_MONO 0x00004000UL + +/* Mono pattern inverted transparent Blt */ +/** GFGxAPI BITBLT Pattern Transparency flags : enable mono pattern inverse + transparency (if pattern bit is 1, no overwrite on corresponding destination + location). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_PAT_MONO_INV 0x00008000UL + +/* Color pattern transparency Blt */ +/** GFGxAPI BITBLT Pattern Transparency flags : enable color pattern transparency + (if pattern pixel matches colorCompare, do not overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_PAT_COLOR 0x00010000UL + +/* Color pattern transparency Blt */ +/** GFGxAPI BITBLT Pattern Transparency flags : enable color pattern inverse + transparency (if pattern pixel matches colorCompare, overwrite). + @see GFGxBlt() +*/ +#define GFGX_BLT_TRANSPARENT_PAT_COLOR_INV 0x20000000UL + +/**** Fade Blt ****/ +/** GFGxAPI BITBLT flags : enable fade blt. + @see GFGxBlt() +*/ +#define GFGX_BLT_FADE_BLT 0x00020000UL + +/* Enable alpha blending */ +/** GFGxAPI BITBLT flags : enable alphablending. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_BLENDING 0x00080000UL + + + +/**** ALPHABLENDING FLAGS ****/ + +/* Fixed alpha operation */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is fixed value. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_FIXED ( 0x00200000UL) + +/* Inverse Fixed alpha */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse fixed value. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_FIXED_INV (0x00400000UL) + +/* Source alpha ARGB1555 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB1555. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_SRC_1555_T (0x00800000UL) + +/* Inverse Source alpha ARGB1555 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB1555. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_SRC_1555_T_INV (0x01000000UL) + +/* Source alpha ARGB4444 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB4444. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_SRC_4444 (0x02000000UL) + +/* Inverse Source ARGB4444 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB4444. + @see GFGxBlt() +*/ +#define GFGX_BLT_ALPHA_SRC_4444_INV (0x04000000UL) + +/* new flags */ + +/** GFGxAPI BITBLT Alphablending mask. + @see GFGxBlt() +*/ +#define GFGXEX1_MASK 0x3FFFFFFF + +/* Fixed alpha operation */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is fixed value. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_FIXED (0x40000000 | 0x00000001UL) + +/* Inverse Fixed alpha */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse fixed value. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_FIXED_INV (0x40000000 | 0x00000002UL) + +/* Source alpha ARGB1555 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB1555. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_1555_T (0x40000000 | 0x00000004UL) + +/* Inverse Source alpha ARGB1555 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB1555. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_1555_T_INV (0x40000000 | 0x00000008UL) + +/* Source alpha ARGB4444 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB4444. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_4444 (0x40000000 | 0x00000010UL) + +/* Inverse Source ARGB4444 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB4444. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_4444_INV (0x40000000 | 0x00000020UL) + +/* Source alpha ARGB8888 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is source ARGB8888. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_8888 (0x40000000 | 0x00000040UL) + +/* Inverse source alpha ARGB8888 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse source ARGB8888. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_SRC_8888_INV (0x40000000 | 0x00000080UL) + +/* Destination alpha ARGB8888 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is destination ARGB8888. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_DST_8888 (0x40000000 | 0x00000100UL) + +/* Inverse Destination alpha 8888 */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse destination ARGB8888. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_ALPHA_DST_8888_INV (0x40000000 | 0x00000200UL) + +/* Planar 1BPP alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 1BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_1BPP (0x40000000 | 0x00000400UL ) + +/* Planar 1BPP Inv alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 1BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_1BPP_INV (0x40000000 | 0x00000800UL) + +/* Planar 2BPP alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 2BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_2BPP (0x40000000 | 0x00001000UL) + +/* Planar 2BPP Inv alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 2BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_2BPP_INV (0x40000000 | 0x00002000UL) + +/* Planar 4BPP alpha Blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 4BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_4BPP (0x40000000 | 0x00004000UL) + +/* Planar 4BPP Inv alpha Blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 4BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_4BPP_INV (0x40000000 | 0x00008000UL) + +/* Planar 8BPP alpha Blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 8BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_8BPP (0x40000000 | 0x00010000UL) + +/* Planar 8Bpp Inv alpha Blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 8BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_8BPP_INV (0x40000000 | 0x00020000UL) + +/* Planar 44BPP alpha blending */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is SRC4DST4BPP planar. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_44BPP (0x40000000 | 0x00040000UL) + +/* Planar 32 bpp src blending 16 bpp dst */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is 32BPP src to 16BPP dst. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_32BPP16 (0x40000000 | 0x00080000UL) + +/*Planar Inv 32 bpp src blending 16 bpp dst */ +/** GFGxAPI BITBLT Alphablending flags : alpha mode is inverse 32BPP src to + 16BPP dst. + @see GFGxBlt() +*/ +#define GFGXEX1_BLT_PLANAR_32BPP16_INV (0x40000000 | 0x00100000UL) + +/* Alpha planar is already in video mem, no need to transfer it from sys mem */ +#define GFGXEX1_BLT_PLANAR_NOTRANSFER (0x40000000 | 0x00200000UL) + +/**** FAST ROTATION FLAGS ****/ +/** GFGxAPI BITBLT Fast Rotation mask. + @see GFGxFastRotate() +*/ +#define GFGXEX2_MASK 0x3FFFFFFF + +/* Fast Rotation Modes */ + +/* Square (in place rotation) */ +/** GFGxAPI BITBLT Fast Rotation flags : dst is same than src. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_SQUARE (0x80000000 | 0x00000001UL) + +/* Source to Destination Rotation ( 2 buffers) */ +/** GFGxAPI BITBLT Fast Rotation flags : dst is different than src. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_SRC_DST_COPY (0x80000000 | 0x00000002UL) + +/* Disable Fast Rotation */ +/** GFGxAPI BITBLT Fast Rotation flags : disable fast rotation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_DISABLE (0x80000000 | 0x00000004UL) + +/* Fast Rotation Types */ + +/* Flip-X */ +/** GFGxAPI BITBLT Fast Rotation flags : FLIP-X transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_FLIP_X (0x80000000 | 0x00000008UL) + +/* Flip-Y */ +/** GFGxAPI BITBLT Fast Rotation flags : FLIP-Y transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_FLIP_Y (0x80000000 | 0x00000010UL) + +/* Trans-LR */ +/** GFGxAPI BITBLT Fast Rotation flags : TRANSPOSE LEFT-RIGHT transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_TRANS_LR (0x80000000 | 0x00000020UL) + +/* Trans-RL */ +/** GFGxAPI BITBLT Fast Rotation flags : TRANSPOSE RIGHT-LEFT transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_TRANS_RL (0x80000000 | 0x00000040UL) + +/* 90 deg Rotation */ +/** GFGxAPI BITBLT Fast Rotation flags : 90° rotation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_ROT_90 (0x80000000 | 0x00000080UL) + +/* 180 deg Rotation */ +/** GFGxAPI BITBLT Fast Rotation flags : 180° rotation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_ROT_180 (0x80000000 | 0x00000100UL) + +/* 270 deg Rotation */ +/** GFGxAPI BITBLT Fast Rotation flags : 270° rotation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_ROT_270 (0x80000000 | 0x00000200UL) + +/* Identity */ +/** GFGxAPI BITBLT Fast Rotation flags : identity transformation. + @see GFGxFastRotate() +*/ +#define GFGXEX2_FAST_ROTATE_IDENTITY (0x80000000 | 0x00000400UL) + + +/** GFGXAPI STRETCHBLT flag in GFGXBLTPARAM struct + This flag waits for the StretchBlt engine to be idle. + If enabled it will block the CPU thread until the StretchBlt is done. + It is effective only for GFGxStretchBlt(). + For other api's it is ignored. + @see GFGxBlt() +*/ +#define GFGX_STRETCHBLT_WAITFOR_FINISH 0x00100000UL + + +/* + * Definition of attribute ids for Set/GetAttributes() + */ + +/** GFGxAPI attributes definition. + @see GFGxGetAttribute(), GFGxSetAttribute() +*/ +typedef enum _GFGXATTRIBUTES + { + /** Current bits per pixel. */ + GFGX_ATTR_BPP, + /** Frame buffer line width in bytes. */ + GFGX_ATTR_STRIDE, + /** Ptr to start address of the display frame buffer. */ + GFGX_ATTR_ADDR_PTR, + /** Start address offset. */ + GFGX_ATTR_ADDR, + /** Surface for GFGxAPI operations. */ + GFGX_ATTR_SURFACE, + /** Palette RGB888. */ + GFGX_ATTR_PALETTE_RGB888 +} GFGXATTRIBUTES; + +/* Blt parameter struct */ +/** GFGxAPI BLT parameter structure. + @see GFGxBlt() +*/ +typedef struct _GFGXBLTPARAM +{ + /** Destination x in pixels (relative to left). */ + NvS16 dx; + /** Destination y in scan lines (relative to top). */ + NvS16 dy; + /** Width of the source rectangle in pixels. */ + NvS16 w; + /** Height of the source rectangle in pixels. */ + NvS16 h; + /** Source x in pixels (relative to left). */ + NvS16 sx; + /** Source y in scan lines (relative to top). */ + NvS16 sy; + /** Width of the source rectangle in pixels (for Stretch Blt only). */ + NvS16 sw; + /** Height of the source rectangle in scan lines (for Stretch Blt only). */ + NvS16 sh; + /** Color depth */ + NvU16 bpp; + /** Number of bytes per scanline for bitmap. */ + NvS16 stride; + /** Foreground color (used if pixel data is 1 on 1BPP source bitmap). */ + NvU32 fgColor; + /** Background color (used if pixel data is 0 on 1BPP source bitmap). */ + NvU32 bgColor; + /** Pointer to source bitmap. */ + NvU8 *pBits; + /** Pattern offset in x direction. */ + NvS16 px; + /** Pattern offset in y direction. */ + NvS16 py; + /** Pattern foreground color (used if pixel data is 1 on 1BPP pattern bitmap).*/ + NvU32 patFgColor; + /** Pattern background color (used if pixel data is 0 on 1BPP pattern bitmap).*/ + NvU32 patBgColor; + /** Pattern color key for transparent blt.*/ + NvU32 patColorCmp; + /** Pointer to pattern bitmap. */ + NvU8 *pPatBits; + /** Number of bytes per scanline for pattern. */ + NvU32 patStride; + /** Width of pattern. */ + NvU32 patW; + /** Height of pattern. */ + NvU32 patH; + + /** pointer to Pattern ID when GFGX_BLT_PAT_CACHE flag is set. */ + /** GFGxBlt() will return the patID in this field */ + NvU32 *pPatID; + + // Miscellaneous parameters + /** Color key for transparent blt. */ + NvU32 colorCompare; + /** Main flags setting. */ + NvU32 flags; + /** Raster operation code (ROP3). */ + NvU16 rop3; + + // Surface parameters + /** Pointer to dst surface pointer. */ + PGFRMSURFACE *ppDestSurf; + /** Pointer to src surface pointer. */ + PGFRMSURFACE *ppSrcSurf; + /** Source start address. */ + NvU32 srcStartAddr; + /** Destination start address. */ + NvU32 dstStartAddr; + /** Number of bytes per scanline for destination. */ + NvS16 dstStride; + + // alpha blending parameters + /** Alpha value for GFGX_BLT_ALPHA_FIXED or alphaFg for GFGX_BLT_ALPHA_SRC_1555_T. */ + NvU16 alpha; + /** Background alpha for GFGX_BLT_ALPHA_SRC_1555_T. */ + NvU16 alphaBg; + /** Pointer to alpha plane. */ + NvU8 *pAlphaplane; + + // Fading parameters + /** Fading coefficient. */ + NvU32 fadeCoeff; + /** Fading offset. */ + NvU32 fadeOffset; + + /** Alphablending flag. */ + NvU32 flagex1; + + /** Fast rotation flag. */ + NvU32 flagex2; + +} GFGXBLTPARAM; + + +/** @name Functions +@{*/ + +/** This function returns version and capabilities of API and hardware. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pGxProp (PGFPROPERTY) Pointer to property structure to be filled in + + @retval #GF_SUCCESS pGxProp filled in successfully + @retval #GF_ERROR Some error occured + + The #GFPROPERTY structure passed with parameter pGxProp will be + filled in on successfull return. + + The GFPROPERTY::Capability field will hold a combination of flagbits + indicating capabilities specific to the GFGxAPI : + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFGX_CAP_BLT BitBlt supported.
      #GFGX_CAP_LINE Line Draw supported.
      #GFGX_CAP_CLIP Clipping supported.
      #GFGX_CAP_STRETCHBLTStretchblt supported.
      #GFGX_CAP_ALPHABLENDING Alphablending supported.
      #GFGX_CAP_ALPHA_COLOR_CMPAlphablending and transparency supported.
      #GFGX_CAP_FAST_ROTATION Fast rotation supported.
      #GFGX_CAP_CLIPPING_INSIDE Inside clipping supported.
      #GFGX_CAP_FADE_BLT Fadeblt supported.
      #GFGX_CAP_COLOR_PATTERN Color pattern supported.
      #GFGX_CAP_CLR_PAT_TRANSPARENTColor pattern transparency supported.
      #GFGX_CAP_ALPHA_AND_FADING Alphablending and fading supported.
      #GFGX_CAP_ALPHA_PLANAR_1BPP 1BPP alpha planar supported.
      #GFGX_CAP_ALPHA_PLANAR_2BPP 2BPP alpha plane supported.
      #GFGX_CAP_ALPHA_PLANAR_4BPP 4BPP alpha plane supported.
      #GFGX_CAP_ALPHA_PLANAR_8BPP 8BPP alpha plane supported.
      #GFGX_CAP_ALPHA_PLANAR_SRC4DST4SRC4DST4BPP alpha plane supported.
      #GFGX_CAP_ALPHA_PLANAR_32BLEND16 32BPP to 16BPP alphablending supported.
      #GFGX_CAP_ALPHA_SRC1555Src 1555 alphablending supported.
      #GFGX_CAP_ALPHA_SRC4444 Src 4444 alphablending supported.
      #GFGX_CAP_ALPHA_FIXED Src fixed alphablending supported.
      + + It is recommended, but not mandatory, that you call this function to query + for the GFGxAPI version and capabilities before proceeding to call any of + the other GFGxAPI functions. + + @see GFPROPERTY +*/ +GF_RETTYPE GFGxGetProperty(GFGxHandle GxHandle, + PGFPROPERTY pGxProp); +/** This function fills a rectangle in video memory with the specified solid color. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param x,y (NvS16) left-top corner of the rectangle (x in pixels, y in scan lines) + @param w,h (NvS16) width & height of the rectangle (w in pixels, h in scan lines) + @param color (NvU32) color to be filled (8BPP index, or 16BPP-32BPP TrueColor) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxFillRectEx() +*/ +GF_RETTYPE GFGxFillRect(GFGxHandle GxHandle, + NvS16 x, NvS16 y, + NvS16 w, NvS16 h, + NvU32 color); +/** This function is commonly used in scrolling an image in video memory. It copies + a rectangular image in the video memory to another location in the same video + memory. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle (dx in pixels, dy in scan lines) + @param w,h (NvS16) width & height of rectangles (w in pixels, h in scan lines) + @param sx,sy (NvS16) left-top corner of source rectangle (sx in pixels, sy in scan lines) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFGxCopyRect() checks for the destruction of the copied image in video memory + caused by overlapping source and destination locations. + + Also, if the destination for the rectangle exceeds the limit of the video memory, + wrapping is done in hardware and no error code is returned. + + + @see GFGxCopyRectEx(), GFGxCopyRectDirect() +*/ +GF_RETTYPE GFGxCopyRect(GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy); + +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap is specified in monochrome (1BPP) pixels. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle (dx in pixels, dy in scan lines) + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle (sx in pixels, sy in scan lines) + @param fgColor (NvU16) color applied to source data bit 1 (The color depth should be same as the frame buffer) + @param bgColor (NvU16) color applied to source data bit 0 (The color depth should be same as the frame buffer) + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to monochome (1bpp) bitmap + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransMonoBitmap() +*/ +GF_RETTYPE GFGxCopyMonoBitmap( GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvU32 fgColor, NvU32 bgColor, + NvS16 srcStride, + NvU8 *pMonoBits); +/** This function copies the bitmap from video memory to system memory. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle (dx in pixels, dy in scan lines) + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle (sx in pixels, sy in scan lines) + @param dstStride (NvS16) destination stride in bytes + @param pDstAddr (NvU8*) pointer to destination buffer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFGxReadBlt( GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvS16 dstStride, + NvU8 *pDstStartAddr); +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap is specified in monochrome (1BPP) pixels and can be transparent. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param color (NvU16) color applied to non-transparent source data bit + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to monochome (1bpp) bitmap + @param selectTrans (NvS16) transparency select: 0 or 1 + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function is similar to GFGxCopyMonoBitmap() except for the selectTrans parameter. + This parameter indicates whether bit data equal to 0 or 1 is going to be transparent. + This function could be used for drawing a transparent text string or character. + + + @see GFGxCopyMonoBitmap() +*/ +GF_RETTYPE GFGxCopyTransMonoBitmap( GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvU32 color, + NvS16 srcStride, + NvU8 *pMonoBits, + NvS16 selectTrans ); +/** This function is used to blit/blend a given source rectangle to/with the given + destination location in the video memory. + + Overlap rectangles are handled properly. Source and destination rectangles must + have same size. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pBltParam (#GFGXBLTPARAM*) refer to structure definition + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + This routine is more generic. It supports System Memory to Video Memory Blts and + Video to Video Memory Blts involving Source and Pattern data.The Source and Pattern + data can be either Color or Monochrome(1 Bpp). Monochrome Blts are supported by performing + a Monochrome to Color Expansion. + + Tiling mode is also supported for Mono Patttern Blts. The size of the pattern in this case + should be 16x16. Tiling is not supported for Color Patterns. + + The following features can also be enabled during Blts : + + - Color Source and Mono Source Transparency + - Destination Transparency, + - Color Pattern and Mono Pattern Transparency + - Alphablending ( Both Planar and Source Alpha) + - Fading + - Microsoft Windows compatible ROP3 + - Clipping + + GFGxBlt() supports both raster operations and alpha blending operations.The two types + of operations are mutually exclusive. + + Please refer to the supported GFGxBlt() flags starting with GFGX_BLT_* and GFGXEX1_BLT_*. + + + @see GFGxCopyRect(), GFGxCopyRectDirect(), GFGxBltSurface(), GFGxCopyMonoBitmap(), + GFGxCopyTransMonoBitmap(), GFGxCopyColorBitmap() +*/ +GF_RETTYPE GFGxBlt( GFGxHandle GxHandle, + const GFGXBLTPARAM *pBltParam ); + +/** + This function performs a surface-to-surface blit. The color depth of the source + surface must match that of the destination. Also, the width and height of the + source must be the same as the destination's width and height. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param ppDestSurf (#PGFRMSURFACE*) pointer to destination surface pointer + @param ppSrcSurf (#PGFRMSURFACE) pointer so source surface pointer + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param rop3 (NvU16) raster operation code + @param srcStartAddr (NvU32) start address relative to the source surface + @param dstStartAddr (NvU32) start address relative to the destination surface + @param flags (NvU32) Transparent blit flag. See Below + @param colorCompare (NvU32) color key for transparent blit. If there is no transparent blit, colorCompare = 0 + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Transparent blit flag is one of the following: + - GFGX_BLT_TRANSPARENT_SRC_COLOR + - GFGX_BLT_TRANSPARENT_SRC_MONO + - GFGX_BLT_TRANSPARENT_SRC_MONO_INV + - GFGX_BLT_TRANSPARENT_DST + - GFGX_BLT_TRANSPARENT_PAT_COLOR + - GFGX_BLT_TRANSPARENT_PAT_COLOR_INV + - GFGX_BLT_TRANSPARENT_PAT_MONO + - GFGX_BLT_TRANSPARENT_PAT_MONO_INV + Refer to GFGX_BLT_X flag definitions for further information. If no transparent blit, flag = 0 + + Alphablending is not supported. + + + @see GFGxCopyRect(), GFGxCopyRectDirect(), GFGxBltSurface(), GFGxCopyMonoBitmap(), + GFGxCopyTransMonoBitmap(), GFGxCopyColorBitmap() +*/ +GF_RETTYPE GFGxBltSurface( GFGxHandle GxHandle, PGFRMSURFACE *ppDestSurf, + PGFRMSURFACE *ppSrcSurf, + NvS16 w, NvS16 h, NvU16 rop3, + NvU32 srcStartAddr, NvU32 dstStartAddr, + NvU32 flags, NvU32 colorCompare); + +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap's color depth must match the destination's video memory's color depth. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyMonoBitmap() +*/ +GF_RETTYPE GFGxCopyColorBitmap( GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits ); + +/** This function draws a line from a point x1, y1 to another point x2, y2 with a specified color + and ROP2 code. GFGxSetClip() should be called before calling GFGxLine(). If clipping is needed, + it is assumed that clipping is enabled and clipping rectangle was set by GFGxSetClip(). If + clipping is not set, the line wraps if it is too long, and no error code is returned. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param x1,y1 (NvU16) (x,y) destination point coords (in pixels, scan lines) + @param x2,y2 (NvU16) (x,y) source point coords in (pixels, scan lines) + @param rop2 (NvU16) ROP2 code + @param color (NvU16) color key for transparent blt or pattern color + @param flags (NvU16) refer to GFGX_LINE_X flag definitions + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Set flags to GFGX_LINE_NOT_DRAW_LAST_PIXEL if the last pixel is not to be + drawn. + +*/ +GF_RETTYPE GFGxLine( GFGxHandle GxHandle, + NvU16 x1, NvU16 y1, NvU16 x2, NvU16 y2, + NvU16 rop2, NvU32 color, NvU16 flags ); + +/** This function enables or disables clipping and also sets the clipping rectangle for subsequent + blit and line drawing functions. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pClipRect (#PGFRECT) pointer to the clipping rectangle + @param clipFlag (NvU32) See below + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Set clipFlag to one of the following: + - GFGX_SETCLIP_DISABLE + - GFGX_SETCLIP_ENABLE + - GFGX_SETCLIP_SETRECT + Refer to GFGX_SETCLIP_X flag definitions + + Clipping Sample Code + // Initialize clipping and rectangle parameters. + clipRect.top = 10; + clipRect.left = 10; + clipRect.right = 60; + clipRect.bottom = 60; + // Set the clipping rectangle and enable clipping. + GFGxSetClip( GxHandle, &clipRect, (GFGX_SETCLIP_SETRECT| + GFGX_SETCLIP_ENABLE) ); + // Call drawing function: Rectangle Fill, Pattern Fill, etc. + GFGXFillRect( GxHandle, 20, 20, 30, 30, 0x07E0 ); + // Disable clipping. + GFGxSetClip( GxHandle, NULL, GFGX_SETCLIP_DISABLE ); + + +*/ +GF_RETTYPE GFGxSetClip( GFGxHandle GxHandle, + PGFRECT pClipRect, NvU32 clipFlag); + +/** This function ensures synchronization between 2D operations and others modules operations. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param timeout (NvU32) obsolete parameter + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + When several modules share the same channel (like 3D,2D), it may be necessary to + synchronize the command flow with the 2D module execution. Putting a GFGxNotBusy() + call after a 2D operation ensures that commands which follow the 2D command are + executed after full completion of the 2D command. + + As opposed to GFGxWaitNotBusy(), this function doesn't block the CPU thread. + Graphics engine may not be idle when returning from the function. Control returns + to the CPU right after a wait command is placed in the graphics engine command FIFO. + The GoForce hardware begins executing the commands following the engine idle + command only after the graphics engine becomes idle. + + + @see GFGxWaitNotBusy() +*/ +GF_RETTYPE GFGxNotBusy( GFGxHandle GxHandle, + NvU32 timeout ); +/** This function sets the new value into the palette entry at index location. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param palVal (NvU32) New palette entry value + @param index (NvU16) Index of the palette entry + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The index value ranges from [0..255] inclusively. Parameter palVal is in RGB format, + where bits [0-7] represent the red value, bits [8-15] the green value, and bits [16-23] + the blue value. + + When this function is called, the physical palette entry is modified permanently. + + This function is used only for the 8-bits per-pixel mode and does not apply to the RGB 16 and + 32-bits mode. + + + @see GFGxGetPal(), GFGxSetPalRange(), GFGxGetPalRange() +*/ +GF_RETTYPE GFGxSetPal(GFGxHandle GxHandle, + NvU32 palVal, NvU16 index); + +/** This function sets the a range of new values pointed by pPalRange into the palette entries + starting at startIndex location and ending at endIndex inclusively. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pPalRange (NvU32*) Pointer to a range of palette entry values + @param startIndex (NvU16) Starting index of palette entries + @param endIndex (NvU16) Ending index of palette entries + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The index value ranges from [0..255] inclusively. Each palette entry value is in RGB format, + where bits [0-7] represent the red value, bits [8-15] the green value, and bits [16-23] + the blue value. + + When this function is called, the physical palette entry is modified permanently. + + This function is used only for the 8-bits per-pixel mode and does not apply to the RGB 16 and + 32-bits mode. + + + @see GFGxGetPal(), GFGxSetPalRange(), GFGxGetPalRange() +*/ +GF_RETTYPE GFGxSetPalRange(GFGxHandle GxHandle, + NvU32 * palRange, + NvU16 startIndex, NvU16 endIndex); + +/** This function returns the palette entry value at index location. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pPalVal (NvU32*) pointer to palette entry value + @param index (NvU16) index of the palette entry + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The index value ranges from [0..255] inclusively. The returned palette entry value is stored + in the location pointed to by pPalVal. + + This function is used only for the 8-bits per-pixel mode and does not apply to the RGB 16 and + 32-bits mode. + + + @see GFGxSetPal(), GFGxSetPalRange(), GFGxGetPalRange() +*/ +GF_RETTYPE GFGxGetPal(GFGxHandle GxHandle, + NvU32 * pPalVal, + NvU16 index); +/** This function returns the palette entry values starting from location startIndex to endIndex + inclusively. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pPalArray (NvU32*) Pointer to a range of palette entry values + @param startIndex (NvU16) Starting index of palette entries + @param endIndex (NvU16) Ending index of palette entries + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The index value ranges from [0..255] inclusively. The returned values are stored into + variables pointed to by pPalArray. + + This function is used only for the 8-bits per-pixel mode and does not apply to the RGB 16 and + 32-bits mode. + + + @see GFGxSetPal(), GFGxGetPal(), GFGxSetPalRange() +*/ + +GF_RETTYPE GFGxGetPalRange(GFGxHandle GxHandle, + NvU32 * pPalArray, + NvU16 startIndex, NvU16 endIndex); +/** This function transfers a color bitmap of exact full screen size from system memory to video memory. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pBltParam (#GFGXBLTPARAM*) refere to structure definition + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxBlt() +*/ + +GF_RETTYPE GFGxBltFullScreen(GFGxHandle GxHandle, + const GFGXBLTPARAM *pBltParam); +/** This function copies a rectangular image in the video memory to another location in the same video + memory without taking care of overlapping cases. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of rectangles + @param sx,sy (NvS16) left-top corner of source rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This is a special case of GxCopyRect(). It does not check on destructions of copied image + on video memory due to overlapping source and destination locations. + + + @see GFGxCopyRectEx(), GFGxCopyRect() +*/ +GF_RETTYPE GFGxCopyRectDirect(GFGxHandle GxHandle, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy); +/** This function copies a source bitmap from system memory to the video memory with + certain restrictions. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param bitmapPtr (NvU32*) Pointer to color bitmap + @param size_in_bytes (NvU16) Total bytes to transfer + @param rect (#GFRECT) Destination rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This is a special case of GxCopyColorBitmap(). Conditions below must be verified : + - The source bitmap pointer, pColorBits, has to be a 32-bit (DWORD) aligned address. + - The size of each line of the source bitmap must be 64-bits (8 bytes, QWORD) aligned. + - There must not be any skipping bytes between lines. + - Total bitmap size has to be smaller than or equal to 2K (2048) bytes. + - The source bitmap's color depth MUST match the destination video memory's color depth. + + + @see GxCopyColorBitmap() +*/ +GF_RETTYPE GFGxCopyPackedColorBitmap(GFGxHandle GxHandle, + NvU32 *pColorBits, + NvU16 bitmapSize, + GFRECT rect); +/** This function sets a given attribute. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param aid (NvU32) Attribute id, such as width, height etc + @param attr (NvU32) Attribute value + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Attribute id can be one of the following : + + + + + + + + + + + + + +
      #GFGX_ATTR_BPP Current bits per pixel.
      #GFGX_ATTR_STRIDE Frame buffer line width in bytes.
      #GFGX_ATTR_ADDR_PTR Ptr to start address of the display frame buffer.
      #GFGX_ATTR_ADDRStart address offset.
      #GFGX_ATTR_SURFACE Surface for GFGxAPI operations.
      #GFGX_ATTR_PALETTE_RGB888 Palette RGB888.
      + + + @see GFGxGetAttribute() +*/ + +GF_RETTYPE GFGxSetAttribute(GFGxHandle GxHandle, + NvU32 aid,NvU32 attr); +/** This function gets an attribute. Certain attributes are fixed. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param aid (NvU32) attribute id, such as width, height etc + @param attr (NvU32*) pointer to returned attribute value + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Attribute id can be one of the following : + + + + + + + + + + + + + + +
      #GFGX_ATTR_BPP Current bits per pixel.
      #GFGX_ATTR_STRIDE Frame buffer line width in bytes.
      #GFGX_ATTR_ADDR_PTR Ptr to start address of the display frame buffer.
      #GFGX_ATTR_ADDRStart address offset.
      #GFGX_ATTR_SURFACE Surface for GFGxAPI operations.
      #GFGX_ATTR_PALETTE_RGB888 Palette RGB888.
      + + @see GFGxSetAttribute() +*/ +GF_RETTYPE GFGxGetAttribute(GFGxHandle GxHandle, + NvU32 aid, NvU32 *attr); +/** This function checks whether the graphics engine is busy or idle. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param timeout (NvU32) obsolete parameter + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The function will wait until the graphics engine is idle. For example, if you want + to write to the frame buffer but the graphics engine is busy the function can be used + to wait until it is idle. + + As opposed to GFGxNotBusy(), this function blocks the CPU thread while waiting for + the graphics engine to become idle. + + + @see GFGxNotBusy() +*/ +GF_RETTYPE GFGxWaitNotBusy( GFGxHandle GxHandle, + NvU32 timeout ); +/** This function is used to stretch or shrink an image, which can be in system memory or video memory. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pBltParam (#GFGXBLTPARAM*) refere to structure definition + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The function has these limitations : + - supports 16 and 32BPP color depths, + + @see GFGxBlt() +*/ + +GF_RETTYPE GFGxStretchBlt( GFGxHandle GxHandle, + const GFGXBLTPARAM *pBltParam ); +/*******************************New API's based on enhancing old API's****************************/ + +/** This function fills a rectangle in the video memory with the specified solid color. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param x,y (NvS16) left-top corner of the rectangle + @param w,h (NvS16) width & height of the rectangle + @param color (NvU32) color to be filled (8BPP index, or 16BPP-32BPP TrueColor) + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxFillRect() +*/ + /* Old API's with enhancement */ +GF_RETTYPE GFGxFillRectEx(GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 x, NvS16 y, + NvS16 w, NvS16 h, + NvU32 color); +/** This function copies a rectangular image in the video memory to another location in the same + video memory. It is commonly used in scrolling an image in video memory. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of rectangles + @param sx,sy (NvS16) left-top corner of source rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFGxCopyRectEx() checks for the destruction of the copied image in video memory + caused by overlapping source and destination locations. Also, if the destination + for the rectangle exceeds the limit of the video memory, wrapping is done in hardware + and no error code is returned. + + + @see GFGxCopyRect(), GFGxCopyRectDirect() +*/ +GF_RETTYPE GFGxCopyRectEx(GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy); +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap is specified in monochrome (1BPP) pixels. + Video memory location is specified by the surface parameter. + + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param fgColor (NvU16) color applied to source data bit 1 + @param bgColor (NvU16) color applied to source data bit 0 + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to monochome (1bpp) bitmap + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransMonoBitmap() +*/ +GF_RETTYPE GFGxCopyMonoBitmapEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvU32 fgColor, NvU32 bgColor, + NvS16 srcStride, + NvU8 *pMonoBits); +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap is specified in monochrome (1BPP) pixels and can be transparent. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param color (NvU16) color applied to non-transparent source data bit + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to monochome (1bpp) bitmap + @param selectTrans (NvS16) transparency select: 0 or 1 + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function is similar to GFGxCopyMonoBitmapEx() except for the selectTrans + parameter. This parameter indicates whether bit data equal to 0 or 1 is going to be + transparent. + + This function could be used for drawing a transparent text string or character. + + + @see GFGxCopyMonoBitmapEx() +*/ +GF_RETTYPE GFGxCopyTransMonoBitmapEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvU32 color, + NvS16 srcStride, + NvU8 *pMonoBits, + NvS16 selectTrans); + +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap's color depth must match the destination's video memory's color depth. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyMonoBitmap() +*/ +GF_RETTYPE GFGxCopyColorBitmapEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits + ); + +/** This function draws a line from a point x1, y1 to another point x2, y2 with a specified color + and ROP2 code. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param x1,y1 (NvU16) (x,y) destination point coords + @param x2,y2 (NvU16) (x,y) source point coords + @param rop2 (NvU16) ROP2 code + @param color (NvU16) color key for transparent blt or pattern color + @param flags (NvU16) refere to GFGX_LINE_X flag definitions + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxLine() +*/ +GF_RETTYPE GFGxLineEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvU16 x1, NvU16 y1, + NvU16 x2, NvU16 y2, + NvU16 rop2, NvU32 color, + NvU16 flags); + +GF_RETTYPE GFGxBltFullScreenEx(GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + const GFGXBLTPARAM *pBltParam); +/** This function copies a rectangular image in the video memory to another location in the same video + memory without taking care of overlapping cases. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of rectangles + @param sx,sy (NvS16) left-top corner of source rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This is a special case of GxCopyRect(). It does not check on destructions + of copied image on video memory due to overlapping source and destination locations. + + + @see GFGxCopyRectEx(), GFGxCopyRect(), GFGxCopyRectDirect() +*/ +GF_RETTYPE GFGxCopyRectDirectEx(GFGxHandle GxHandle, + PGFRMSURFACE pSurfNvS16, + NvS16 dx, NvS16 dy, + NvS16 w, NvS16 h, + NvS16 sx, NvS16 sy); + +/** This function copies a source bitmap from system memory to the video memory with + certain restrictions. + Video memory location is specified by the surface parameter. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pSurf (#PGFRMSURFACE) pointer to destination surface + @param pColorBits (NvU32*) pointer to color bitmap + @param bitmapSize (NvU16) total bytes to transfer + @param rect (#GFRECT) destination rectangle + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This is a special case of GxCopyColorBitmap(). Conditions below must be verified : + - The source bitmap pointer, pColorBits, has to be a 32-bit (DWORD) aligned address. + - The size of each line of the source bitmap must be 64-bits (8 bytes, QWORD) aligned. + - There must not be any skipping bytes between lines. + - Total bitmap size has to be smaller than or equal to 2K (2048) bytes. + - The source bitmap's color depth MUST match the destination video memory's color depth. + + + @see GxCopyColorBitmap(), GFGxCopyPackedColorBitmap() +*/ +GF_RETTYPE GFGxCopyPackedColorBitmapEx( GFGxHandle GxHandle, + PGFRMSURFACE pSurf, + NvU32 *pColorBits, + NvU16 bitmapSize, + GFRECT rect +/** This function performs a surface-to-surface blit. The color depth of the source + surface must match that of the destination. Also, the width and height of the + source must be the same as the destination's width and height. + Alphablending parameters can be specified. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param ppDestSurf (#PGFRMSURFACE*)pointer to destination surface pointer + @param ppSrcSurf (#PGFRMSURFACE) pointer so source surface pointer + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param rop3 (NvU16) raster operation code + @param srcStartAddr (NvU32) start address relative to the source surface + @param dstStartAddr (NvU32) start address relative to the destination surface + @param flags (NvU32) refer to GFGX_BLT_X flag definitions + @param flagex1 (NvU32) refer to alphablending flag definitions GFGXEX1_BLT_X + @param colorCompare (NvU32) color key for transparent blit + @param alpha (NvU16) alpha value for GFGX_BLT_ALPHA_FIXED or alphaFg + @param alphaBg (NvU16) background alpha + + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyRect(), GFGxCopyRectDirect(), GFGxBltSurface(), GFGxCopyMonoBitmap(), + GFGxCopyTransMonoBitmap(), GFGxCopyColorBitmap() +*/ ); +GF_RETTYPE GFGxBltSurfaceEx( GFGxHandle GxHandle, PGFRMSURFACE *ppDestSurf, + PGFRMSURFACE *ppSrcSurf, + NvS16 w, NvS16 h, NvU16 rop3, + NvU32 srcStartAddr, NvU32 dstStartAddr, + NvU32 flags, NvU32 flagex1, NvU32 colorCompare, + NvU16 alpha, NvU16 alphaBg); + + /* New API's based on new features */ + +/*******************************New API's based on New Features***********************************/ + +/** This function is used to transform a given source rectangle to the given destination + location in the video memory. + + Rotation takes place in counterclockwise direction. + + Destination rectangle can be same than source rectangle or different.

      + Both source and destination must be in video memory. + + Common input data requirements : + + - the data buffer must be aligned on all edges (top, bottom, left, right), which also implies + that stride is
      multiple of 16 bytes, + - the base address of both source and destination must be aligned at a 128-bit word aligned, + - in GFGX_BLT_SURFACE mode, source and destination must be same format : GF_SURFACE_RGB8,
      + GF_SURFACE_RGB565, GF_SURFACE_ARGB8888, or GF_SURFACE_YUV420, + - GFGX_BLT_MODE_LINEAR and X/Y modes are also supported for GF_SURFACE_RGB8,
      GF_SURFACE_RGB565 + and GF_SURFACE_ARGB8888, + - width and height must be multiple of 16 pixels in 8bpp mode, 8 in 16bpp and 4 in 32bpp for
      + GF_SURFACE_RGB8, GF_SURFACE_RGB565 and GF_SURFACE_ARGB8888 surfaces, + - in GFGXEX2_FAST_ROTATE_SQUARE mode, width should be equal to height for 90, 270,
      + TRANS_LR and TRANS_RL modes. Also the destination surface should be same as source + surface. + + Specific GF_SURFACE_YUV420 input data requirements : + + - only GFGX_BLT_SURFACE mode is supported, with no offsets defined for both source and +
      destination (dstStartAddr = srcStartAddr = 0). + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param pBltParam (#GFGXBLTPARAM*) refere to structure definition + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + This function can be used the same way than GFGxBlt, adding flagex2 information. + + The following transformations are supported : + + + + + + + + + + + + + + + + + +
      #GFGXEX2_FAST_ROTATE_FLIP_X FLIP-X.
      #GFGXEX2_FAST_ROTATE_FLIP_Y FLIP-Y.
      #GFGXEX2_FAST_ROTATE_TRANS_LR TRANSPOSE LEFT-RIGHT.
      #GFGXEX2_FAST_ROTATE_TRANS_RLTRANSPOSE RIGHT-LEFT.
      #GFGXEX2_FAST_ROTATE_ROT_90 90° rotation.
      #GFGXEX2_FAST_ROTATE_ROT_180180° rotation.
      #GFGXEX2_FAST_ROTATE_ROT_270 270° rotation.
      + + + @see GFGxBlt() +*/ +GF_RETTYPE GFGxFastRotate(GFGxHandle GxHandle, + const GFGXBLTPARAM *pBltParam); +/** This function copies a source bitmap from system memory to the video memory. + The source bitmap's color depth must match the destination's video memory's color depth. + Source transparency is supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + @param pSrcColorKey (NvU32*) pointer to source color key. If NULL no transparency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyMonoBitmap(), GFGxCopyColorBitmap() +*/ +GF_RETTYPE GFGxCopyTransColorBitmap(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits, + NvU32 *pSrcColorKey); +/** This function copies a source bitmap from system memory to the video memory with a mono + pattern buffer combination. + The source bitmap's color depth must match the destination's video memory's color depth. + Source and mono pattern transparencies are supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + @param pSrcColorKey (NvU32*) pointer to source color key. If NULL no transparency. + @param rop3 (NvU8) raster operation code + @param pPatBuffer (NvU8*) pointer to pattern buffer + @param patFgColor (NvU32) pattern foreground color + @param patBgColor (NvU32) pattern background color + @param patW, patH (NvU32) width & height of pattern buffer + @param patStride (NvU32) pattern stride in bytes + @param pSelectPatTrans (NvU16*) pointer to pattern color key. If NULL no transparency. + + Depending of pattern size, replicated mode is used or not. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransColorBitmap(), GFGxCopyColorBitmap() +*/ +GF_RETTYPE GFGxCopyTransColorBitmapWithMonoPattern(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits, + NvU32 *pSrcColorKey, + NvU8 rop3, + NvU8 *pPatBuffer, + NvU32 patFgColor, + NvU32 patBgColor, + NvU32 patW, + NvU32 patH, + NvU32 patStride, + NvU16 *pSelectPatTrans); +/** This function copies a source bitmap from system memory to the video memory with a colour + pattern buffer combination. + The source bitmap and pattern's color depth must match the destination's video memory's color depth. + Source and color pattern transparencies are supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcStride (NvS16) source stride in bytes, must be pixel size aligned + @param pColorBits (NvU8*) pointer to color bitmap + @param pSrcColorKey (NvU32*) pointer to source color key. If NULL no transparency. + @param rop3 (NvU8) raster operation code + @param pPatBuffer (NvU8*) pointer to pattern buffer + @param patW, patH (NvU32) width & height of pattern buffer + @param patStride (NvU32) pattern stride in bytes + @param pPatColorKey (NvU32*) pointer to pattern color key. If NULL no transparency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransColorBitmap(), GFGxCopyColorBitmap(), GFGxCopyTransColorBitmapWithMonoPattern() +*/ +GF_RETTYPE GFGxCopyTransColorBitmapWithColorPattern(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvS16 srcStride, + NvU8 *pColorBits, + NvU32 *pSrcColorKey, + NvU8 rop3, + NvU8 *pPatBuffer, + NvU32 patW, + NvU32 patH, + NvU32 patStride, + NvU32 *pPatColorKey); +/** This function copies a source bitmap from system memory to the video memory with a mono + pattern buffer combination. + The source bitmap and pattern are mono (1BPP). + Mono source and mono pattern transparencies are supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcFgColor (NvU32) source foreground color + @param srcBgColor (NvU32) source background color + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to source bitmap + @param pSelectSrcTrans (NvU16*) pointer to source color key. If NULL no transparency. + @param rop3 (NvU8) raster operation code + @param pPatBuffer (NvU8*) pointer to pattern buffer + @param patFgColor (NvU32) pattern foreground color + @param patBgColor (NvU32) pattern background color + @param patW, patH (NvU32) width & height of pattern buffer + @param patStride (NvU32) pattern stride in bytes + @param pSelectPatTrans (NvU16*) pointer to pattern color key. If NULL no transparency. + + Depending of pattern size, replicated mode is used or not. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransColorBitmap(), GFGxCopyTransMonoBitmap() +*/ +GF_RETTYPE GFGxCopyTransMonoBitmapWithMonoPattern(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvU32 srcFgColor, + NvU32 srcBgColor, + NvS16 srcStride, + NvU8 *pMonoBits, + NvU16 *pSelectSrcTrans, + NvU8 rop3, + NvU8 *pPatBuffer, + NvU32 patFgColor, + NvU32 patBgColor, + NvU32 patW, + NvU32 patH, + NvU32 patStride, + NvU16 *pSelectPatTrans); +/** This function copies a source bitmap from system memory to the video memory with a color + pattern buffer combination. + The source bitmap is mono (1BPP). + Mono source and color pattern transparencies are supported. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + @param dx,dy (NvS16) left-top corner of destination rectangle + @param w,h (NvS16) width & height of the rectangle in pixels and scan lines + @param sx,sy (NvS16) left-top corner of source rectangle + @param srcFgColor (NvU32) source foreground color + @param srcBgColor (NvU32) source background color + @param srcStride (NvS16) source stride in bytes + @param pMonoBits (NvU8*) pointer to source bitmap + @param pSelectSrcTrans (NvU16*) pointer to source color key. If NULL no transparency. + @param rop3 (NvU8) raster operation code + @param pPatBuffer (NvU8*) pointer to pattern buffer + @param patW, patH (NvU32) width & height of pattern buffer + @param patStride (NvU32) pattern stride in bytes + @param pPatColorKey (NvU32*) pointer to pattern color key. If NULL no transparency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + @see GFGxCopyTransMonoBitmap(), GFGxCopyTransMonoBitmapWithMonoPattern() +*/ +GF_RETTYPE GFGxCopyTransMonoBitmapWithColorPattern(GFGxHandle GxHandle, + NvS16 dx, + NvS16 dy, + NvS16 w, + NvS16 h, + NvS16 sx, + NvS16 sy, + NvU32 srcFgColor, + NvU32 srcBgColor, + NvS16 srcStride, + NvU8 *pMonoBits, + NvU16 *pSelectSrcTrans, + NvU8 rop3, + NvU8 *pPatBuffer, + NvU32 patW, + NvU32 patH, + NvU32 patStride, + NvU32 *pPatColorKey); + +/** This function purges the graphics cache used to store pattern buffers when + GFGX_BLT_PAT_CACHE is used. + + @param GxHandle (#GFGxHandle) Handle to GFGxAPI + + @retval #GF_SUCCESS Success + @retval #GFGX_ERROR_NULL_PARAMETER Invalid GxHandle + + @see GFGxBlt() +*/ +GF_RETTYPE GFGxCachePurge(GFGxHandle GxHandle); + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFGxOpen(GFRmHandle hRm, GFGxHandle *phGx, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFGxClose(GFGxHandle *phGx); + +/*@}*/ +/*@}*/ + +#ifdef __cplusplus +} +#endif + +/** @page pageGxAppNotes GxAPI Application Notes + + @section pageGxAppNotes1 Todo + +*/ + +#endif // _GFGx_H_ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFGxError.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFGxError.h new file mode 100755 index 00000000..64e84624 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFGxError.h @@ -0,0 +1,46 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFGxError.h + * GFSDK Gx Graphics API header file. + */ + +#ifndef __GFGXERROR_H__ +#define __GFGXERROR_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** GFGxAPI error code: Bad parameter. */ +#define GFGX_ERROR_ILLEGAL_PARAMETER (GFGX_ERROR | 0x00000001L) +#define GFGX_ERROR_NULL_SURFACE (GFGX_ERROR | 0x00000002L) +/** GFGxAPI error code: Color depth not supported. */ +#define GFGX_ERROR_COLORDEPTH_NOT_SUPPORTED (GFGX_ERROR | 0x00000003L) +#define GFGX_ERROR_ILLEGAL_ALPHA_MODE (GFGX_ERROR | 0x00000004L) +#define GFGX_ERROR_ILLEGAL_ROTATION_FLAG (GFGX_ERROR | 0x00000005L) +#define GFGX_ERROR_GETTING_COMPONENT (GFGX_ERROR | 0x00000006L) +#define GFGX_ERROR_NO_PRIMARY_SURFACE (GFGX_ERROR | 0x00000007L) +#define GFGX_ERROR_NO_COLORCONVERT_SUPPORT (GFGX_ERROR | 0x00000008L) +#define GFGX_ERROR_NULL_PARAMETER (GFGX_ERROR | 0x00000009L) +/** GFGxAPI error code: Function not supported. */ +#define GFGX_ERROR_NOT_SUPPORTED (GFGX_ERROR | 0x0000000AL) + + + +#ifdef __cplusplus +} +#endif + +#endif // __GFGXERROR_H__ + + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFI2C.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFI2C.h new file mode 100755 index 00000000..458a21c0 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFI2C.h @@ -0,0 +1,314 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFI2C.h + GFSDK I2C API header file. +*/ + +#ifndef __I2C_H__ +#define __I2C_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/** @addtogroup groupI2C I2CAPI I2C API +*/ +/*@{*/ + +/** GFI2C Error code: Function was passed an illegal parameter. */ +#define GFI2C_ERROR_ILLEGAL_PARAMETER (GFI2C_ERROR | 0x00000001L) +/** GFI2C Error code: I2C slave device did not respond with ack signal. */ +#define GFI2C_ERROR_ACKNOWLEDGE_FAILURE (GFI2C_ERROR | 0x00000002L) +/** GFI2C Error code: Polling routine generated a timeout error. */ +#define GFI2C_ERROR_TIMEOUT_ERROR (GFI2C_ERROR | 0x00000003L) + +/** Enum specifies attribute ids for GFI2CSetAttribute() + @see GFI2CSetAttribute() +*/ +typedef enum _GFI2CATTRIBUTES +{ + GFI2C_ATTR_PULLUP, /**< Set internal I2C pullups, see GFI2C_ATTR_PULLUP_FLAGS. */ + GFI2C_ATTR_SW, /**< Set to use GPIO for SW I2C */ + GFI2C_ATTR_HW, /**< Set to use HW I2C (default) */ + GFI2C_ATTR_TIMING, /**< I2C timing mode, valid for GFI2C_ATTR_HW mode only, see GFI2C_TIMING */ + GFI2C_ATTR_RESPTIMEOUT /**< Set I2C Ack response timeout in ms */ + +} GFI2CATTRIBUTES; + +/** Flag bits for for GFI2C_ATTR_PULLUP attribute. + + Usage example: + 
      +    attr = (SP_SCL_PULLUP_DISABLE | SP_SDA_PULLUP_DISABLE)
+    GFI2CSetAttribute(I2CHandle, GFI2C_ATTR_PULLUP, attr)
+
      + + @see GFI2CSetAttribute(), GFI2CATTRIBUTES +*/ +typedef enum _GFI2C_ATTR_PULLUP_FLAGS +{ + SDA_PULLDOWN_DISABLE = 0, //!< Flag to disable I2C data pull down + SDA_PULLDOWN_ENABLE = 1, //!< Flag to enable I2C data pull down + SDA_PULLUP_DISABLE = 0, //!< Flag to disable I2C data pull up + SDA_PULLUP_ENABLE = 1, //!< Flag to enable I2C data pull up + SCL_PULLDOWN_DISABLE = 0, //!< Flag to disable I2C clock pull down + SCL_PULLDOWN_ENABLE = 1, //!< Flag to enable I2C clock pull down + SCL_PULLUP_DISABLE = 0, //!< Flag to disable I2C data pull up + SCL_PULLUP_ENABLE = 0, //!< Flag to enable I2C clock pull up + SCL_DEFAULT = 0, //!< Flag sets I2C clock back to default + SDA_DEFAULT = 0 //!< Flag sets I2C data back to default + +} GFI2C_ATTR_PULLUP_FLAGS; + +/** Timing modes for GFI2C_ATTR_TIMING attribute. + + The timing mode has effect for I2C HW mode (GFI2C_ATTR_HW) only. + + It affects the programming of IC_IC_CONFIG_0/THDCTL and + IC_TCOMMAND_0/SPEED_CTL registers. +*/ +typedef enum _GFI2C_TIMING +{ + /** Standard timing (default). + IC_TCOMMAND_0, SPEED_CTL is programmed to STD_MODE (standard timing). + */ + GFI2C_TIMING_STANDARD = 0, + + /** Fast mode with 2 clocks extended hold time. + IC_TCOMMAND_0, SPEED_CTL is programmed to FAST_MODE. + IC_IC_CONFIG_0, THDCTL is programmed to b'10 (add 2 clocks to hold time). + */ + GFI2C_TIMING_FASTADD2CLK + +} GFI2C_TIMING; + +typedef struct _GFI2CTABLE +{ + GF_RETTYPE (* I2CWrite)( GFI2CHandle I2CHandle, + NvU32 slaveAddr, + NvU8 *pDataBytes, + NvU32 len, + NvU32 delayInMSec ); + + GF_RETTYPE (* I2CRead)( GFI2CHandle I2CHandle, + NvU32 slaveAddr, + NvU8 *pDataBytes, + NvU32 len, + NvU32 delayInMSec ); + + GF_RETTYPE (* I2CRestartRead)( GFI2CHandle I2CHandle, + NvU32 slaveAddr, + NvU32 index, + NvU8 *pDataBytes, + NvU32 len, + NvU32 delayInMSec ); + + GF_RETTYPE (* I2CScan)( GFI2CHandle I2CHandle, + NvU16 slaveAddr ); + + GF_RETTYPE (* I2CPowerSwitch)( GFI2CHandle I2CHandle, NvU8 status); + + GF_RETTYPE (* I2CGetProperty)( GFI2CHandle I2CHandle, + PGFPROPERTY pI2CProp ); + + GF_RETTYPE (* I2CSetAttribute)(GFI2CHandle I2CHandle, NvU32 aid, NvU32 attr); + GF_RETTYPE (* I2CSetClock)( GFI2CHandle I2CHandle, NvU32 selectclock); + GF_RETTYPE (* I2CWritePrepare)( GFI2CHandle I2CHandle, + NvU32 slaveAddr, + NvU32 *pData, + NvU32 len, + NvU32 *pBuffer, + NvU32 *bufferSize); + GF_RETTYPE (* I2CRestartWrite)( GFI2CHandle I2CHandle, + NvU32 slaveAddr1, + NvU8 *pIndexBytes, + NvU32 lenIndex, + NvU32 slaveAddr2, + NvU8 *pDataBytes, + NvU32 lenData, + NvU32 delayInMSec ); + +} GFI2CTABLE, *PGFI2CTABLE; + +/** Open GFI2C component. + @param hRm RM handle + @param phI2C Returns I2C component handle on success + @param state Channel allocation mode + @param hCh Channel to use, or NULL to allocate new +*/ +GF_RETTYPE GFI2COpen(GFRmHandle hRm, GFI2CHandle *phI2C, GF_STATE_TYPE state, GFRmChHandle hCh); + +/** Close GFi@c component. + @param phI2C I2C component handle, will be reset to NULL. Can be NULL. +*/ +void GFI2CClose(GFI2CHandle *phI2C); + +/** This routine writes out len bytes of data during one I2C transfer. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + @param pDataBytes (NvU8) Pointer to data bytes to be written + @param len (NvU32) Number of bytes of data to be written + @param delayInMSec (NvU32) Optional delay inserted after transfer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CWrite(I2CHandle, slaveAddr, pDataBytes, len, delayInMSec) \ + ((PGFI2CTABLE)I2CHandle)->I2CWrite(I2CHandle, slaveAddr, pDataBytes, len, delayInMSec) + +/** This routine reads len bytes of data during one I2C transfer. A typical I2C slave + device requires its address already be set by a preceding GFI2CWrite() function. + These functions should be executed together with no other activity in between. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + @param pDataBytes (NvU8) Pointer to data bytes read from device + @param len (NvU32) Number of bytes of data to be read + @param delayInMSec (NvU32) Optional delay inserted after transfer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CRead(I2CHandle, slaveAddr, pDataBytes, len, delayInMSec) \ + ((PGFI2CTABLE)I2CHandle)->I2CRead(I2CHandle, slaveAddr, pDataBytes, len, delayInMSec) + +/** This function reads in len or fewer bytes of data from an I2C slave device. It differs + from the GFI2CRead() function in that it does so with a combination of an I2C write and + read. There is an I2C write of the slave address and index byte then followed by a START + condition. There is no STOP condition in-between the write and read transactions. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + @param index (NvU32) 2nd byte index of slave device register + @param pDataBytes (NvU8) Pointer to data bytes read from device + @param len (NvU32) Number of bytes of data to be read + @param delayInMSec (NvU32) Optional delay inserted after transfer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CRestartRead(I2CHandle, slaveAddr, index, pDataBytes, len, delayInMSec) \ + ((PGFI2CTABLE)I2CHandle)->I2CRestartRead(I2CHandle, slaveAddr, index, pDataBytes, len, delayInMSec) + +/** This routine writes out a I2C slave address and checks for an ACK. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CScan(I2CHandle, slaveAddr) \ + ((PGFI2CTABLE)I2CHandle)->I2CScan(I2CHandle, slaveAddr) + +/** This function has been replaced by camera scripting. Camera power is now + controlled by a function in the camera scripts. +*/ +#define GFI2CPowerSwitch(I2CHandle, status) \ + ((PGFI2CTABLE)I2CHandle)->I2CPowerSwitch(I2CHandle, status) + +/** This routine sets various I2C attributes. The aid parameter passes an + enumeration GFI2CATTRIBUTES that selects the attribute operation. Each + attribute has a set of defined values passed in the parameter attr, that + it will operate on. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param aid (NvU32) attribute flag + @param attr (NvU32) attribute data value + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see GFI2CATTRIBUTES + +*/ +#define GFI2CSetAttribute( I2CHandle, aid, attr) \ + ((PGFI2CTABLE)I2CHandle)->I2CSetAttribute(I2CHandle, aid, attr ) + +/** This routine sets the I2C clock output on the SCL pin. The parameter + selectclock specifies the new I2C clock in kilohertz. The default + is 100. If selectclock = 0, then the default will be set. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param selectclock (NvU32) new clock value in kHz. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CSetClock(I2CHandle, selectclock) \ + ((PGFI2CTABLE)I2CHandle)->I2CSetClock(I2CHandle, selectclock) + +/** This routine Provide properties about I2C. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param pProp (GFPROPERTY) pointer to GFPROPERTY struct. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +#define GFI2CGetProperty(I2CHandle, pProp) \ + ((PGFI2CTABLE)I2CHandle)->I2CGetProperty(I2CHandle, pProp) + +/** This function prepares a buffer that contains the command sequence for an + I2C write. This may concatenated onto another command sequence and written + to the channel as a combination of two transactions. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr (NvU32) I2C address of slave device + @param pData (NvU8) Pointer to data bytes to be written + @param len (NvU32) Number of bytes of data to be read + @param pBuffer (NvU8) Pointer to command sequence for I2C write + @param bufferSize (NvU32) Number of commands returned + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CWritePrepare(I2CHandle, slaveAddr, pData, len, pBuffer, bufferSize) \ + ((PGFI2CTABLE)I2CHandle)->I2CWritePrepare(I2CHandle, slaveAddr, pData, len, pBuffer, bufferSize) + +/** This function writes lenData bytes of data to an I2C slave device. It differs + from the GFI2CWrite() function in that it does so with a combination of two I2C writes + There is an I2C write of the slave address and index bytes then followed by a START + condition. There is no STOP condition in-between the write and write transactions. + + @param I2CHandle (#GFI2CHandle) Handle to I2CAPI + @param slaveAddr1 (NvU32) I2C address of 1st slave device + @param pDataIndex (NvU8) Pointer to index data to be written to the 1st device + @param lenIndex (NvU32) index data length + @param slaveAddr2 (NvU32) I2C address of 2nd slave device + @param pDataBytes (NvU8) Pointer to data bytes written to 2nd device + @param lenData (NvU32) Number of bytes of data to be read + @param delayInMSec (NvU32) Optional delay inserted after transfer + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +#define GFI2CRestartWrite(I2CHandle, slaveAddr1, pIndexBytes, lenIndex, \ + slaveAddr2, pDataBytes, lenData, delayInMSec) \ + ((PGFI2CTABLE)I2CHandle)->I2CRestartWrite(I2CHandle, slaveAddr1, pIndexBytes, lenIndex, \ + slaveAddr2, pDataBytes, lenData, delayInMSec) + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif /* __I2C_H__ */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFI2S.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFI2S.h new file mode 100755 index 00000000..bbfd876e --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFI2S.h @@ -0,0 +1,49 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* +* File: GFi2s.h +* I2S header file. +*/ + + +#ifndef __I2S_H__ +#define __I2S_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFI2SOpen(GFRmHandle hRm, GFI2SHandle *phI2S, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFI2SClose(GFI2SHandle *phI2S); + +GF_RETTYPE GFI2SSetTransmitBuffer(GFI2SHandle I2SHandle, + NvU32 startAddr, + NvU32 sizeBytes, + NvU32 numBuffers); + +GF_RETTYPE GFI2SSetTransmitState(GFI2SHandle I2SHandle, + NvU32 state); + +GF_RETTYPE GFI2SSetReceiveBuffer(GFI2SHandle I2SHandle, + NvU32 startAddr, + NvU32 sizeBytes, + NvU32 numBuffers); + +GF_RETTYPE GFI2SSetReceiveState(GFI2SHandle I2SHandle, + NvU32 state); + +#ifdef __cplusplus +} +#endif + +#endif /* __I2S_H__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFINTx.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFINTx.h new file mode 100755 index 00000000..2b45eb76 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFINTx.h @@ -0,0 +1,114 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFINTx.h + GFSDK Interrupt API header file. +*/ + +#ifndef __GFINTx_H__ +#define __GFINTx_H__ + +#include "GFRmOEM.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupINTx INTxAPI Interrupt API +*/ +/*@{*/ + +#define GF_INTR_START 0 +#define GF_INTR_END 15 + +/* Embedded memory controller interrupt */ +#define GF_EMC_INTR (15) + +/* MC interrupt. */ +#define GF_MC_INTR (14) + +/* SD interrupt. */ +#define GF_SD_INTR (13) + +/* I2C interrupt. */ +#define GF_IC_INTR (12) + +/* I2s interrupt. */ +#define GF_I2S_INTR (11) + +/* Display interrupt. */ +#define GF_DISPLAY_INTR (10) + +/* 3d interrupt. */ +#define GF_GR3D_INTR (9) + +/* 2d interrupt. */ +#define GF_GR2D_INTR (8) + +/* DSP interrupt. */ +#define GF_DSP_INTR (7) + +/* ISP interrupt. */ +#define GF_ISP_INTR (6) + +/* SDGP1 input falling edge interrupt. */ +#define GF_EPP_INTR (5) + +/* VI interrupt. */ +#define GF_VI_INTR (4) + +/* JPEG Encoder interrupt. */ +#define GF_JPEGE_INTR (3) + +/* Mpeg Encoder interrupt. */ +#define GF_ME_INTR (2) + +/* Graphics MPD interrupt. */ +#define GF_GRMPD_INTR (1) + +/* Host interface interrupt. */ +#define GF_HOST_INTR (0) + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFINTxOpen(GFRmHandle hRm, GFINTxHandle *phINTx, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFINTxClose(GFINTxHandle *phINTx); + +/* ### Helper Macros ### */ +GF_RETTYPE GFINTxGetProperty(GFINTxHandle INTxHandle, + PGFPROPERTY pINTxProp); + + +GF_RETTYPE GFINTxDisable(GFINTxHandle INTxHandle, + NvU32 idInt); + +GF_RETTYPE GFINTxEnable(GFINTxHandle INTxHandle, + NvU32 idInt); + +/** Wait for system level interrupt request. + @param handle Handle to INTx API + @param idInt System level interrupt ID + @param timeout Timeout in miliseconds, or 0 to wait endlessly + @retval GF_SUCCESS Interrupt request received + @retval GF_WAIT_TIME_OUT Timeout without interrupt request received +*/ +GF_RETTYPE GFINTxWaitForIRQ(GFINTxHandle INTxHandle, + NvU32 idInt, + NvU32 timeout); + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif // __GFINTx_H__ +/* End of file. */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFIsp.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFIsp.h new file mode 100755 index 00000000..b3c7e512 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFIsp.h @@ -0,0 +1,1654 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFIsp.h + GFSDK Image Signal Processing API header file. +*/ + +#ifndef _GF_ISP__ +#define _GF_ISP__ + +//#define DVS_DEVELOPMENT + +#include "GFCamera.h" +#include "GFVx.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupIsp IspAPI Image Signal Processing API + + As image resolution increases (three megapixels and up), image signal + processing inside the imager module becomes complex and costly, and the + required bandwidth to transfer processed data to the GPU increases. + + One solution to this problem is to incorporate image signal processing (ISP1) + capabilities inside the GPU, and let the imager send raw Bayer Pattern Data + from the CMOS or CCD sensor to the GPU. This reduces bandwidth as ISP + programming is easier and much faster compared to having the ISP unit + inside the imager. + + The ISP pipeline consists of various stages of image processing operations to + enhance the image so that its digital representation is as close to the natural + look as possible. The ISP pipeline consists of the following stages: + - Optical Black Compensation (OB) + - De-Knee Linearization + - Lens Shading Compensation + - White Balance Gain Adjustment (M1, M2, M3 statistics gathering) + - Bad Pixel Compensation + - Noise Reduction + - Demosaicing + - Edge Enhancement (M4 statistics gathering) + - Color Noise Reduction + - Color Correction + - Gamma Correction + - RGB to YUV conversion + + Besides these pipeline stages, the ISP module also provides a statistics + collection mechanism that can be applied to multiple regions of the image. + Image statistics information can be used to compute Auto Exposure (AE), + Auto White Balance (AWB) and Auto Focus (AF). + + The GFISPAPI sets up parameters for each pipeline functional block. If + needed, the user can also choose to bypass each individual functional block. + Once all blocks are set up, image data flows through them automatically. + + Figure 1, "Block Diagram of the ISP Interface," shows the ISP with + respect to other input blocks such as video input (VI) and the encoder + preprocessor (EPP). + + @image html ISPFigure1.bmp + + Figure 2, "Internal ISP Data Flow," shows the data flow inside the + ISP. + + @image html ISPFigure2.bmp + +*/ +/*@{*/ + +/** @defgroup groupIspCapability ISP Capability Flags + These flags represent the various capabilities of the ISP. + @see GFISPPROPERTY +*/ +/*@{*/ + +/** IspAPI property flag: Bayer format input supported. + @see GFISPGetProperty() +*/ +#define GFISP_CAP_FORMAT_BAYER 0x00000001 + +/** IspAPI property flag: Stacked format input supported. + @see GFISPGetProperty() +*/ +#define GFISP_CAP_FORMAT_STACKED 0x00000002 + +/** IspAPI property flag: Three optical black regions supported. + @see GFISPGetProperty(), GFISPOBCONTROL +*/ +#define GFISP_CAP_THREE_OB_REGIONS 0x00000004 + +/** IspAPI property flag: Four optical black regions supported. + @see GFISPGetProperty(), GFISPOBCONTROL +*/ +#define GFISP_CAP_FOUR_OB_REGIONS 0x00000008 + +/** IspAPI property flag: Frame-based optical black supported. + @see GFISPGetProperty(), GFISPOBCONTROL +*/ +#define GFISP_CAP_FRAME_OB 0x00000010 + +/** IspAPI property flag: Line-based optical black supported. + @see GFISPGetProperty(), GFISPOBCONTROL +*/ +#define GFISP_CAP_LINE_OB 0x00000020 + +/** IspAPI property flag: Column-based optical black supported. + @see GFISPGetProperty() +*/ +#define GFISP_CAP_COLUMN_OB 0x00000040 + +/** IspAPI property flag: Deknee (input linearization) supported. + @see GFISPGetProperty(), GFISPDEKNEECONTROL +*/ +#define GFISP_CAP_DE_KNEE 0x00000100 + +/** IspAPI property flag: Lens shading supported. + @see GFISPGetProperty(), GFISPLENSSHADING +*/ +#define GFISP_CAP_LENSSHADING 0x00000200 + +/** IspAPI property flag: White balance supported. + @see GFISPGetProperty(), GFISPWBCONTROL +*/ +#define GFISP_CAP_WB 0x00000400 + +/** IspAPI property flag: Demosaic supported. + @see GFISPGetProperty(), GFISPDEMOSAICCONTROL +*/ +#define GFISP_CAP_DEMOSIAC 0x00000800 + +/** IspAPI property flag: Edge enhancement supported. + @see GFISPGetProperty(), GFISPEDGEENHANCECONTROL +*/ +#define GFISP_CAP_EDGEENHANCE 0x00001000 + +/** IspAPI property flag: Bad pixel concealment supported. + @see GFISPGetProperty(), GFISPBADPIXELCONTROL +*/ +#define GFISP_CAP_BADPIXEL 0x00002000 + +/** IspAPI property flag: Noise reduction supported. + @see GFISPGetProperty(), GFISPNOISECONTROL1 +*/ +#define GFISP_CAP_NOISEREDUCTION1 0x00004000 + +/** IspAPI property flag: Color noise reduction supported. + @see GFISPGetProperty(), GFISPNOISECONTROL2 +*/ +#define GFISP_CAP_NOISEREDUCTION2 0x00008000 + +/** IspAPI property flag: Color correction supported. + @see GFISPGetProperty(), GFISPCOLORCORRECTION +*/ +#define GFISP_CAP_COLORCORRECTION 0x00100000 + +/** IspAPI property flag: Gamma correction supported. + @see GFISPGetProperty(), GFISPGAMMACONTROL +*/ +#define GFISP_CAP_GAMMACORRECTION 0x00200000 + +/** IspAPI property flag: YUV conversion supported. + @see GFISPGetProperty(), GFISPYUVCONVERSION +*/ +#define GFISP_CAP_YUVCONVERSION 0x00400000 + +/** IspAPI property flag: M1 window statistics supported. + @see GFISPGetProperty(), GFISPM1WINDOW +*/ +#define GFISP_CAP_M1 0x01000000 + +/** IspAPI property flag: M2 window statistics supported. + @see GFISPGetProperty(), GFISPM2WINDOW +*/ +#define GFISP_CAP_M2 0x02000000 + +/** IspAPI property flag: M3 window statistics supported. + @see GFISPGetProperty(), GFISPM3WINDOW +*/ +#define GFISP_CAP_M3 0x04000000 + +/** IspAPI property flag: M4 window statistics supported. + @see GFISPGetProperty(), GFISPM4WINDOW +*/ +#define GFISP_CAP_M4 0x08000000 + +/** IspAPI property flag: Negative effect supported. + @see GFISPGetProperty() +*/ +#define GFISP_CAP_NEGATIVEEFFECT 0x80000000 +/*@}*/ + +//#define MANUAL_ENABLE_WAIT_FOR_OUTPUT_END 1 + +/** Struct for ISP version and capabilities. + @see GFISPGetProperty +*/ +typedef struct _GFISPPROPERTY +{ + NvU32 size; /**< Actual size of GFISPPROPERTY data structure. */ + NvU32 version; /**< Version of GFISPAPI. */ + + NvU32 cap; /**< Combination of @ref groupIspCapability. Each bit corresponds to one ISP capability. */ + NvU32 maxWidth, /**< Maximum supported image width. */ + maxHeight; /**< Maximum image height. */ + NvU32 supportedScriptVersion; /**< Version of script supported by ISP API. Incorrect script version may cause some API calls to fail. */ +} GFISPPROPERTY, *PGFISPPROPERTY; + + +/** Definition of attribute ids for GFISPGetAttribute() and GFISPSetAttribute(). +*/ +typedef enum _GFISPATTRIBUTES { + GFISP_ATTR_ENABLE_ISP, /**< The master switch of ISP. 1 = Enable ISP processing, 0 = Disable */ + GFISP_ATTR_ENABLE_OB, /**< The master switch for optical black. 1 = Enable OB, 0 = Disable */ + GFISP_ATTR_ENABLE_SENSOR_MANUAL_OB, /**< The master switch for SENSOR Manual optical black. 1 = Enable OB, 0 = Disable */ + GFISP_ATTR_ENABLE_SENSOR_AUTO_OB, /**< The master switch for SENSOR Auto optical black. 1 = Enable OB, 0 = Disable */ + GFISP_ATTR_ENABLE_FOB, /**< Switch for frame based optical black. 1 = Enable frame based optical black, 0 = Disable */ + GFISP_ATTR_ENABLE_FOB_SELFRESET, /**< Switch for self-reset for frame based optical black. 1 = Enable (reset every frame), 0 = Disable */ + GFISP_ATTR_ENABLE_FOB_TEMPORAL, /**< Switch for temporal filtering for frame based optical black. 1 = Enable temporal filtering, 0 = Disable */ + GFISP_ATTR_ENABLE_LOB, /**< Switch for line based optical black. 1 = Enable line based OB, 0 = Disable */ + GFISP_ATTR_ENABLE_DEKNEE, /**< Switch for deknee. 1 = Enable deknee, 0 = Disable */ + GFISP_ATTR_ENABLE_LENS_SHADING, /**< Switch for lens shading correction. 1 = Enable lens shading correction, 0 = Disable */ + GFISP_ATTR_ENABLE_WB, /**< The master switch for white balance. 1 = Enable white balance, 0 = Disable */ + GFISP_ATTR_ENABLE_AWB, /**< Switch for built-in automatic white balance. 1 = Automatic/dynamic (real-time) white balance, 0 = Preprogrammed mode white balance */ + GFISP_ATTR_AWB_HOLD, /**< Switch to pause automatic white balance. Only effective when GFISP_ATTR_ENABLE_AWB=1. 1 = Start applying current AWB gain value to all future frames, 0 = Restore normal AWB mode */ + GFISP_ATTR_ENABLE_DEMOSAIC, /**< Switch for demosaic processing. 1 = Enable demosaic processing, 0 = Disable */ + GFISP_ATTR_ENABLE_EDGE_ENHANCE, /**< Switch for edge enhancement. 1 = Enable edge enhancement, 0 = Disable */ + GFISP_ATTR_ENABLE_NOISE_CONTROL1, /**< Switch for noise control 1. Noise control method 1 is built in the demosaic unit. 1 = Enable noise control 1, 0 = Disable */ + GFISP_ATTR_ENABLE_BAD_PIXEL, /**< Switch for bad pixel concealment. 1 = Enable bad pixel detection and concealment, 0 = Disable */ + GFISP_ATTR_ENABLE_COLOR_CORRECTION, /**< Switch for color correction. 1 = Enable color correction, 0 = Disable */ + GFISP_ATTR_ENABLE_NOISE_CONTROL2, /**< Switch for noise control 2. Noise control method 2 is built in the color correction unit. 1 = Enable noise control 2, 0 = Disable */ + GFISP_ATTR_ENABLE_GAMMA_CORRECTION, /**< Switch for gamma correction. 1 = Enable gamma correction, 0 = Disable */ + GFISP_ATTR_ENABLE_YUV_CONVERSION, /**< Switch for RGB to YUV conversion. 1 = Enable RGB-YUV conversion, 0 = Disable */ + GFISP_ATTR_ENABLE_NEGATIVE_EFFECT, /**< Switch for negative effect. 1 = Negate whole output image, 0 = Normal image */ + GFISP_ATTR_ENABLE_M2, /**< Switch for M2 statistics. 1 = Enable M2 statistics gathering, 0 = Disable */ + GFISP_ATTR_ENABLE_M3, /**< Switch for M3 statistics. 1 = Enable M3 statistics gathering, 0 = Disable */ + GFISP_ATTR_ENABLE_M4, /**< Switch for M4 statistics. 1 = Enable M4 statistics gathering, 0 = Disable */ + GFISP_ATTR_ENABLE_STATS_RAISE, /**< Switch for statistics raise. 1 = Generate raise vector when statistics gathering is complete, 0 = Disable */ + GFISP_ATTR_ENABLE_STATS_INT, /**< Switch for statistics interrupt. 1 = Generate interrupt when statistics gathering is complete, 0 = Disable */ + GFISP_ATTR_STATS_LINE_END, /**< The line at which statistics gathering is complete. When the line counter reaches STATS_LINE_END, the raise vector and/or interrupt are generated (if enabled). */ +#ifdef MANUAL_ENABLE_WAIT_FOR_OUTPUT_END + GFISP_ATTR_ENABLE_WAIT_FOR_OUTPUT_END, /**< Temporary used to enable wait for OUTPUT_END. 1 = Wait for output end, 0 = Disable */ +#endif + /* Special effects */ + GFISP_ATTR_ENABLE_EMBOSS, /**< Switch for emboss special effect. 1 = Enable emboss special effect, 0 = Disable */ + GFISP_ATTR_ENABLE_SOLARIZE, /**< Switch for solarize special effect. 1 = Enable solarize special effect, 0 = Disable */ + GFISP_ATTR_ENABLE_SEPIA, /**< Switch for sepia special effect. 1 = Enable sepia special effect, 0 = Disable */ + GFISP_ATTR_ENABLE_MONOCHROME, /**< Switch for monochrome special effect. 1 = Enable monochrome special effect, 0 = Disable */ + /* Video settings */ + GFISP_ATTR_CONTRAST, /**< Contrast control. Acts as offset for Y data. Range is [0, 128]. */ + GFISP_ATTR_BRIGHTNESS, /**< Brightness control. Modifies slope of Y data. Range is [0, 256]. */ + GFISP_ATTR_HUE, /**< Hue control. Modifies slope of UV data. Range is [0, 128]. */ + GFISP_ATTR_SATURATION_U, /**< Hue control. Modifies slope of UV data. Range is [0, 256]. */ + GFISP_ATTR_SATURATION_V, /**< Hue control. Modifies slope of UV data. Range is [0, 256]. */ + /* Software 3A control */ + GFISP_ATTR_ENABLE_3A_AE, /**< Switch for software auto exposure. 1 = Enable auto exposure and disable sensor exposure, 0 = Disable */ + GFISP_ATTR_ENABLE_3A_AWB, /**< Switch for software auto white balance. 1 = Enable auto white balance and disable sensor exposure, 0 = Disable */ + GFISP_ATTR_ENABLE_3A_AF, /**< Switch for software auto focus. 1 = Enable auto focus and disable sensor auto focus, 0 = Disable */ + + GFISP_ATTR_ENABLE_SENSOR_AE, /**< Switch for sensor auto exposure. 1 = Enable sensor auto exposure and disable software expoture, 0 = Disable */ + GFISP_ATTR_ENABLE_SENSOR_AWB, /**< Switch for sensor auto white balance. 1 = Enable sensor auto white balance and disable software white balance, 0 = Disable */ + GFISP_ATTR_ENABLE_SENSOR_AF, /**< Switch for sensor auto focus. 1 = Enable sensor auto focus and disable software auto focus, 0 = Disable */ + GFISP_ATTR_ENABLE_AUTO_CC_VIVIDITY /**< Flag for auto vividity. 1 = Enable auto vividity, 0 = Disable auto vividity*/ +} GFISPATTRIBUTES; + + +/** Definition of parameter ids and data structures for #GFISPGetParameter and #GFISPSetParameter. +*/ +typedef enum _GFISPPARAMETERS { + GFISP_PARA_TIMING, /**< Get/Set timing parameters. @see GFISPIMGTIMING */ + GFISP_PARA_M1WINDOW, /**< Get/Set M1 statistics parameters. @see GFISPM1WINDOW */ + GFISP_PARA_M2WINDOW, /**< Get/Set M2 statistics parameters. @see GFISPM2WINDOW */ + GFISP_PARA_M3WINDOW, /**< Get/Set M3 statistics parameters. @see GFISPM3WINDOW */ + GFISP_PARA_M4WINDOW, /**< Get/Set M4 statistics parameters. @see GFISPM4WINDOW */ + GFISP_PARA_OB, /**< Get/Set optical black parameters. @see GFISPOBCONTROL */ + GFISP_PARA_DEKNEE, /**< Get/Set deknee parameters. @see GFISPDEKNEECONTROL */ + GFISP_PARA_LENSSHADING, /**< Get/Set lens shading parameters. @see GFISPLENSSHADING */ + GFISP_PARA_WB, /**< Get/Set white balance parameters. @see GFISPWBCONTROL */ + GFISP_PARA_DEMOSAIC, /**< Get/Set demosaic parameters. @see GFISPDEMOSAICCONTROL */ + GFISP_PARA_EDGEENHANCE, /**< Get/Set edge enhancement parameters. @see GFISPEDGEENHANCECONTROL */ + GFISP_PARA_NOISECONTROL1, /**< Get/Set noise control 1 parameters. @see GFISPNOISECONTROL1 */ + GFISP_PARA_NOISECONTROL2, /**< Get/Set noise control 2 parameters. @see GFISPNOISECONTROL2 */ + GFISP_PARA_BADPIXEL, /**< Get/Set bad pixel parameters. @see GFISPBADPIXELCONTROL */ + GFISP_PARA_COLORCORRECT, /**< Get/Set color correction parameters. @see GFISPCOLORCORRECTION */ + GFISP_PARA_GAMMACORRECT, /**< Get/Set gamma correction parameters. @see GFISPGAMMACONTROL */ + GFISP_PARA_YUVCONVERT, /**< Get/Set YUV conversion parameters. @see GFISPYUVCONVERSION */ + GFISP_PARA_SETMODE, /**< Get/Set ISP mode as specified in script. @see GFISPSETMODE */ + GFISP_PARA_3A_AE, /**< Get/Set 3A AE parameters. @see GFISP3AAE */ + GFISP_PARA_3A_AWB, /**< Get/Set 3A AWB parameters. @see GFISP3AAWB */ + GFISP_PARA_3A_AF , /**< Get/Set 3A AF parameters. @see GFISP3AAF */ + GFISP_PARA_3A_PREV_MODE_AWB, + GFISP_PARA_3A_AWB_SAT_Y_LIMITS, + GFISP_PARA_3A_FRAME_RATE_LOW_LIMIT, + GFISP_PARA_3A_FRAME_RATE_HIGH_LIMIT, + GFISP_PARA_3A_FRAME_RATE_CHOICE, + GFISP_PARA_ISO_SENSITIVITY, /**< Get/Set ISO Sensitivity for 3AAE. */ + GFISP_PARA_REDUCE_GAIN_COMPRESS_GAMMA, /**< Reduce/Restore sensor gain and compensate gain change through Gamma curve Compression/Restoration. + To be used only with SetParameter fn. @see GFISPGAINGAMMACTRL */ + GFISP_PARA_IMAGE_STABILIZATION, /**< Set Image Stabilization. 1 = Enable Image Stabilization, 0 = Disable */ + GFISP_PARA_EXPOSURE_CONTROL, /**< Get/Set exposure control parameters. @see GFISPEXPOSURECONTROL */ + GFISP_PARA_EXPOSURE, /**< Get/Set exposure manually. @see GFISPMANUALEXPOSURE */ + GFISP_ISP_SENSOR_CAPABILITY, /**< ISP 3A Capability >*/ + GFISP_PARA_SENSOR_REGISTER /**< SENSOR Register Read wrtie parameter>*/ + +} GFISPPARAMETERS; + +/** Number of fractional bits of fixed point parameters. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_FIXEDPOINTPARAMETER_FBITS 8 +/** Total number of bits of fixed point parameters. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_FIXEDPOINTPARAMETER_BITS 16 +/** Macro to convert floating point to fixed point. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_CONVERT_FLOAT_TO_FIXED_SIGNED(x) ((NvS16)(x * (2 << GFISP_FIXEDPOINTPARAMETER_FBITS))) +/** Macro to convert floating point to fixed point. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_CONVERT_FLOAT_TO_FIXED_UNSIGNED(x) ((NvU16)(x * (2 << GFISP_FIXEDPOINTPARAMETER_FBITS))) +/** Macro to convert fixed point to floating point. + All fixed point parameters are in u8.8 format or 2's complement + s7.8 format regardless of internal precision to simplify the + interface and keep it consistent across chip revisions. + Generic macros have been provided to convert to and + from floating point format on systems that support it. For + actual range and precision of individual parameters, see the + description of that parameter. +*/ +#define GFISP_CONVERT_FIXED_TO_FLOAT(x) (((float)x) / (2 << GFISP_FIXEDPOINTPARAMETER_FBITS)) + + +/** Enum for which pixel of the R, G, G, B pattern the active frame starts on. + @see GFISPIMGTIMING +*/ +typedef enum +{ + GFISP_RGGB = 0, + GFISP_GRBG = 1, + GFISP_GBRG = 2, + GFISP_BGGR = 3 +} GFISP_BAYERPATTERN_SEL; + +/** Timing Generator Control. + + Whole timing frame consists of scanned part and idle parts (void periods in between lines + and frames). Overall scanned image frame is specified by H_SCAN_SIZE and V_SCAN_SIZE which + includes H and V blank periods. Line and pixel counters are set to 1 at transitions of active + edge of V and H sync input pulses. Note that coordinate in the whole frame starts with + (1,1) instead of (0,0). + + In horizotal direction, H sync active edge indicates start of scan line and it initiates + pixel count from 1 to H_SCAN_SIZE (end of line). After H_SCAN_SIZE pixels are received, + the ISP module goes into void period, in which it waits for next arrival of H sync active + edge. In practice, H blank period is composed of inactive period during H_SCAN SIZE and the + void period in between end of line and start next line. + + Same applies to vertical direction. + + Active part (non-blanking part) consists of "optical black" lines at top and bottom of the + image frame and left and right of image line, and active lines with active pixels in the + middle. + + @see GFISPGetParameter, GFISPSetParameter +*/ +typedef struct _GFISPIMGTIMING +{ + NvU16 hScanSize, /**< Number of pixel clock periods per scan line (including H blanking). */ + vScanSize; /**< Number of line periods per scan frame (including V blanking). */ + NvU8 hSyncEdge, /**< Active edge selection for horizontal sync. 0 = positive transition, 1 = negative transition. */ + vSyncEdge; /**< Active edge selection for vertical sync. 0 = positive transition, 1 = negative transition. */ + GFISP_BAYERPATTERN_SEL bayerSel; /**< Bayer timing format. Specifies which pixel of the R, G, G, B pattern the active frame starts on. */ + + GFRECT ActiveRect; /**< Active image area. */ + GFRECT OutputRect; /**< Output image area. */ +} GFISPIMGTIMING, *PGFISPIMGTIMING; + + +/** Enum for the number of samples to take across the M1 statistics window. + @see GFISPM1WINDOW +*/ +typedef enum +{ + GFISP_M1SAMPLE32 = 0, + GFISP_M1SAMPLE64 = 1 +} GFISP_M1_SAMPLE_SEL; + +/** M1 statistics window control. + + The GFISPAPI provides four methods that programmers can use to gather + statistics on pixel values. Based on the values, the programmer can take + appropriate compensating action as needed. The four methods are M1 + Window, M2 Window, M3 Window, and M4 Window. + + This structure describes the M1 Window method, which measures average/ + peak pixel values inside the specified area. It returns eight values—four + values (RGGB) represent average pixels, and four values represent peak + pixels. The measurement result can be used for white balance, either + automatically by AWB or manually by the programmer. + + Refer to the function #GFISPReadMWindowValues() for reading the + measured values. + + @see GFISPGetParameter, GFISPSetParameter, GFISPReadMWindowValues +*/ +typedef struct _GFISPM1WINDOW +{ + GFRECT M1WindowRect; /**< M1 Window size/position. */ + GFISP_M1_SAMPLE_SEL horzSampSel, /**< Horizontal sample density. */ + vertSampSel; /**< Vertical sample density. */ + NvU16 PeakMax; /**< Maximum limit of peak detection. */ + NvU16 TemporalFilterStrength; /**< Selects temporal filter coefficients. Valid range is [0-7]. Value 0 effectively turns off temporal filter. */ +} GFISPM1WINDOW, *PGFISPM1WINDOW; + + +/** M2 statistics window control. + + The GFISPAPI provides four methods that programmers can use to gather + statistics on pixel values. Based on the values, the programmer can take + appropriate compensating action as needed. The four methods are M1 + Window, M2 Window, M3 Window, and M4 Window. + + This structure describes the M2 Window method for gathering statistics on + pixel values. The M2 Window method measures the number of pixels at + specified ranges inside a specified area. A histogram with four bins is + generated. + + Refer to the function #GFISPReadMWindowValues() for reading the + measured values. + + @see GFISPGetParameter, GFISPSetParameter, GFISPReadMWindowValues, GFISP_ATTR_ENABLE_M2 +*/ +typedef struct _GFISPM2WINDOW +{ + GFRECT M2WindowRect; /**< M2 Window size/pos. */ + NvU16 HistBinL1, /**< Cut point of 1st bin. */ + HistBinL2, /**< Cut point of 2nd bin. */ + HistBinL3; /**< Cut point of 3rd bin. */ + NvU16 reserved; +} GFISPM2WINDOW, *PGFISPM2WINDOW; + + +/** M3 statistics window control. + + The GFISPAPI provides four methods that programmers can use to gather + statistics on pixel values. Based on the values, the programmer can take + appropriate compensating action as needed. The four methods are M1 + Window, M2 Window, M3 Window, and M4 Window. + + This structure describes the M3 Window method for gathering statistics on + pixel values, The M3 Window method generates a group of pixel samples + from the specified area. Each sub-window generates one 32-bit value. + + The horizontal interval of M3 sub-windows is derived from M3 window + line width divided by M3 window horizontal count, rounded down. + + The vertical interval of M3 sub-windows is derived from M3 window + frame height divided by M3 window vertical count, rounded down. + + Refer to the function #GFISPReadMWindowValues() for reading the + measured values. + + @see GFISPGetParameter, GFISPSetParameter, GFISPReadMWindowValues, GFISP_ATTR_ENABLE_M3 +*/ +typedef struct _GFISPM3WINDOW +{ + GFRECT M3WindowRect; /**< M3 Window size/pos. */ + NvU8 SubWindowCountH, /**< Number of sub-windows in horizontal direction. Can be {16,32,64}. */ + SubWindowCountV; /**< Number of sub-windows in vertical direction. Can be {16,32,64}. */ + NvU16 SubWindowWidth, /**< Width of sub-windows. Can be {2,4,8,16,32}. */ + SubWindowHeight; /**< Height of sub-windows. Can be {2,4,8,16,32}. */ + NvU16 reserved; +} GFISPM3WINDOW, *PGFISPM3WINDOW; + + +/** M4 statistics window control. + + The GFISPAPI provides four methods that programmers can use to gather + statistics on pixel values. Based on the values, the programmer can take + appropriate compensating action as needed. The four methods are M1 + Window, M2 Window, M3 Window, and M4 Window. + + This structure describes the M4 Window method for gathering statistics on + pixel values. The M4 Window method takes statistical measurements for + auto-focus control. It generates two values for each sub-window. One value + represents the high frequency factor inside the sub-window. The other value + represents sub-window luminance. + + There are {1, 2, 3, 4, 6, 9} sub-windows in {1,2,3}x{1,2,3} configurations. + + SC15 implementation has the following constraints + * SubWindowintervalH >= SubWindowWidth + * SubWindowintervalV >= SubWindowHeight + + Refer to the function #GFISPReadMWindowValues() for reading the + measured values. + + @see GFISPGetParameter, GFISPSetParameter, GFISPReadMWindowValues, GFISP_ATTR_ENABLE_M4 +*/ +typedef struct _GFISPM4WINDOW +{ + NvU32 Left, /**< Specifies left of first M4 sub-window. */ + Top; /**< Specifies top of first M4 sub-window. */ + NvU8 SubWindowCountH, /**< Specifies the number of sub-windows in the horizontal direction. Can be {1,2,3}. */ + SubWindowCountV; /**< Specifies the number of sub-windows in the vertical direction. Can be {1,2,3}. */ + NvU16 SubWindowWidth, /**< Specifies the width of each sub-window. */ + SubWindowHeight; /**< Specifies the height of each sub-window. */ + NvU16 SubWindowIntervalH, /**< Specifies the horizontal interval of sub-windows. */ + SubWindowIntervalV; /**< Specifies the vertical interval of sub-windows. */ + NvU8 CoreLimit; /**< Top limit of noise coring for M4 statistics gathering. Valid range is [0-63]. */ + NvU8 reserved; +} GFISPM4WINDOW, *PGFISPM4WINDOW; + + +/** Enum for the Optical Black Mode. + @see GFISPOBCONTROL +*/ +typedef enum +{ + OB_MODE_FRAME = 0, + OB_MODE_AVG_FRAME_LINE = 1, + OB_MODE_LINE = 2 +} GFISP_OB_MODE_SEL; + + +/** Optical black control. + + The very first ISP operation to be applied to the input pixel signal is to + establish "black" level. This anchors signal activities to a black reference level, + or "zero" level. + + There are two methods of accomplishing optical blacking. One method is + performed on each frame and is called Frame-based Optical Blacking (FOB). + The other method is performed on each scan line and is called Line-based + Optical Blacking (LOB). + + Under FOB, optical black level can be established in one of two ways--by + setting it manually, or more commonly by letting the ISP measure it + automatically. In the automatic method the user can specify black regions + which surround the active imaging area. The pixel levels from these regions + are used to determine the input signal level of reference black, which is + mapped to "zero" level in the subsequent pixel processing. + + LOB is applied to each scan line and is used to detect and compensate for + fluctuations in the imager input signal level of reference black. + + The user can choose to use either FOB, or LOB, or both. + + Four optical black regions are defined through 16 coordinates. + + If ISP's OB capability is GFISP_CAP_THREE_OB_REGIONS, then: + - Only six of the 16 OB coordinates are used: + - OBTopRegionStartV, OBTopRegionHeight, + - OBLeftRegionStartH, OBLeftRegionWidth, + - OBBottomRegionStartV, OBBottomRegionHeight + - Right OB region is not supported. + - Top region width is assumed equal to input width. + - Left region height is assumed equal to input height. + - Bottom region width is assumed equal to input width. + - Bottom region is only used if GFISP_ATTR_ENABLE_FOB_SELFRESET is disabled. + + If ISP's OB capability is GFISP_CAP_FOUR_OB_REGIONS, then all sixteen + OB coordinates are used. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_FOB, GFISP_ATTR_ENABLE_FOB_SELFRESET, GFISP_ATTR_ENABLE_FOB_TEMPORAL, GFISP_ATTR_ENABLE_MANUALOB, GFISP_ATTR_ENABLE_LOB +*/ +typedef struct _GFISPOBCONTROL +{ + NvU32 OBTopRegionStartV, OBTopRegionHeight, OBTopRegionStartH, OBTopRegionWidth; + NvU32 OBBottomRegionStartV, OBBottomRegionHeight, OBBottomRegionStartH, OBBottomRegionWidth; + NvU32 OBLeftRegionStartV, OBLeftRegionHeight, OBLeftRegionStartH, OBLeftRegionWidth; + NvU32 OBRightRegionStartV, OBRightRegionHeight, OBRightRegionStartH, OBRightRegionWidth; + + NvU8 FOBCoef; /**< Filter coefficient of FOB acquisition. Valid range is [0-15]. */ + NvU8 TOBCoef; /**< Temporal filter coefficient of FOB temporal filter. Valid range is [0-15]. */ + + NvU8 LOBWidth; /**< Width used for LOB. Valid values are {2, 4, 8}. */ + + NvU8 FOBAdjust; /**< Manual adjustment applied to the black level. Valid range is [0, 63]. */ + GFISP_OB_MODE_SEL OBMode; /**< Optical black mode vales {frame, avg of frame + line, line } */ +} GFISPOBCONTROL, *PGFISPOBCONTROL; + + +/** This structure describes one approximated linear segment for deknee. + @see GFISPDEKNEECONTROL +*/ +typedef struct _GFISPDEKNEEENTRY +{ + NvU16 start; /**< Start of a range. */ + NvU16 slope; /**< Slope of the linear. Unsigned fixed point format. Valid range is [0, 3 63/64] with precision of 1/64. */ +} GFISPDEKNEEENTRY, *PGFISPDEKNEEENTRY; + +/** Deknee control. + + Imagers tend to show some degree of non-linearity in their light-to-electric + transfer characteristics. Deknee unit attempts to improve the linearity. + + NVIDIA ISP implements Deknee as a piece-wise linear approximation of up + to 16 segments. + + This structure describes the start and slope values for the Deknee look-up + table. The caller may choose to divide the table into 4, 8, or 16 linear segments + (4, 8, or 16 entries in the table). + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_DEKNEE +*/ +typedef struct _GFISPDEKNEECONTROL +{ + NvU32 nEntries; /**< Number of entries in the pEntry table. Valid values are {4,8,16}. */ + GFISPDEKNEEENTRY *pEntries; /**< Deknee entry table. */ +} GFISPDEKNEECONTROL, *PGFISPDEKNEECONTROL; + + +/** Lens shading compensation control. + + An optical lens in front of the imager tends to introduce shading and + unevenness in the strength of incident light. It is strongest at the center and + diminishes as the distance from the center increases. Actual shading + characteristics vary depending on the choice of optics. + + This structure describes a method for compensating for this shading by + applying varying levels of gain to the pixel signal in the reverse function of + the shading. + + The GFISPAPI implements this as a second degree quadratic equation for + each color component at H and V: + + F = 1 + X * (Coef1 + Coef2 *X) + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_LENS_SHADING +*/ +typedef struct _GFISPLENSHADING +{ + NvU16 hCenter, /**< Horizontal center point of camera lens. */ + vCenter; /**< Vertical center point of camera lens. */ + + NvU16 rHorzCoef1, /**< First order coefficient for Horizontal Red. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + rHorzCoef2; /**< Second order coefficient for Horizontal Red. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 rVertCoef1, /**< First order coefficient for Vertical Red. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + rVertCoef2; /**< Second order coefficient for Vertical Red. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 gHorzCoef1, /**< First order coefficient for Horizontal Green. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + gHorzCoef2; /**< Second order coefficient for Horizontal Green. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 gVertCoef1, /**< First order coefficient for Vertical Green. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + gVertCoef2; /**< Second order coefficient for Vertical Green. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 bHorzCoef1, /**< First order coefficient for Horizontal Blue. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + bHorzCoef2; /**< Second order coefficient for Horizontal Blue. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + NvU16 bVertCoef1, /**< First order coefficient for Vertical Blue. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ + bVertCoef2; /**< Second order coefficient for Vertical Blue. Unsigned fixed point format. Valid range is [0, 7 63/64] with precision of 1/64. */ +} GFISPLENSSHADING, *PGFISPLENSSHADING; + + + +/** White balance control. + + White Values + + RGB component signal levels are balanced to render white objects as white. + This is a normalization step of electronic signal of RGB color primaries. + Depending on the "color temperature" of the white reference, the relative + strength of RGB tri-stimulus values vary. In the electric signal, ER/EG/EB + corresponding to the RGB tri-stimulus values are normalized so that white (of + 100% strength) is represented by ER = EG = EB = 1. The original image in front + of the imager is reproduced only when a display device does precise reverse + conversion, which is a purely ideal case. Otherwise, the original image is + rendered in different shades of colors depending on the reference white for + which the display device is tuned. + + Gray Values + + RGB pixel values that represent "gray" objects may be obtained in various + ways. For example, a picture frame can be filled with a "white" object, or + average values for a large number of pixels can be calculated, or a set of + average values collected in many sampling spotscan be used to represent the + approximated "gray" object. + + Gain Factors and White Balance + + Digital gain values are dedicated to each of the four color channels (R, Gr, Gb, + B). + + Depending on how to set gain factors, there are two ways to use White + Balance. A commonly used method is called Dynamic WB, or AWB. Under + AWB, gain values are updated automatically by ISP internal AWB control + based on the average values and peak values in {R, G1, G2, B} color channels. + Refer to #GFISP_PARA_M1WINDOW. + + - If the frame exposure is high ("Top" level, controlled by ThresholdT2M/ + ThresholdM2T), gains are calculated from the average RGrGbB values. + - If the frame exposure is low ("Bottom" level, controlled by + ThresholdM2B/ThresholdB2M), gains are calculated from peak + RGrGbB values. + - If the frame exposure is in the middle range, gains are calculated from + both average and peak values. + + Under AWB, the user can send a command to freeze the current gain value by + setting GFISP_ATTR_AWB_HOLD to 1. Then the current AWB gain value is + applied to all future frames. + + The other method is called pre-programmed WB or Static WB. It sets preprogrammed + gain values and applies them all time. Under this mode, the + programmer determines the proper gain values based on the M1/M3 + measurement window output. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_WB, GFISP_ATTR_ENABLE_AWB, + GFISP_ATTR_AWB_HOLD, GFISPM1WINDOW +*/ +typedef struct _GFISPWBCONTROL +{ + // Static WB. + NvU16 RGain, /**< Static gain factor for Red. Only effective when GFISP_ATTR_ENABLE_AWB==0. */ + GrGain, /**< Static gain factor for Green on Red. Only effective when GFISP_ATTR_ENABLE_AWB==0. */ + BGain, /**< Static gain factor for Blue. Only effective when GFISP_ATTR_ENABLE_AWB==0. */ + GbGain; /**< Static gain factor for Green on Blue. Only effective when GFISP_ATTR_ENABLE_AWB==0. */ + + // Both statis and auto WB. + NvU16 TopClipLimit; /**< Lower limit of gain based clipping. Effective for both Static WB and Auto WB. Value 0 effectively turns off Top-clipping. */ + + // Auto WB. + NvU16 PeakRef; /**< White reference level for gain adjustment. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + + NvU16 RGainMax, RGainMin; /**< Max/Min Gain factor for Red. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + NvU16 GGainMax, GGainMin; /**< Max/Min Gain factor for Green. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + NvU16 BGainMax, BGainMin; /**< Max/Min Gain factor for Blue. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + + NvU16 ThresholdT2M, /**< Top-to-Middle transition level. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + ThresholdM2T, /**< Middle-to-Top transition level. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + ThresholdM2B, /**< Middle-to-Bottom transition level. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + ThresholdB2M; /**< Bottom-to-Middle transition level. Only effective when GFISP_ATTR_ENABLE_AWB==1. */ + +} GFISPWBCONTROL, *PGFISPWBCONTROL; + + +/** Demosaic mode enum for #GFISPDEMOSAICCONTROL. +*/ +typedef enum +{ + GFISP_DM3X3 = 0, // 3x3 one-shot demosaicing + GFISP_DM3X3BPNR = 1, // 3x3 demosaicing/bad-pixel/noise-reduction + GFISP_DM5X5 = 2, // 5x5 one-shot demosaicing + GFISP_DM5X5BP = 3, // 5x5 demosaicing/bad-pixel + GFISP_DM5X5BPNR = 4 // 5x5 demosaicing/bad-pixel/noise-reduction +} GFISP_DEMOSAIC_MODE_SEL; + +/** Demosaic control. + + This structure controls the demosaic process, which uses 2D interpolation to + convert Bayer format R/G/B pixel signals obtained from the imager to + generate R/G/B component values. + + Under the SC15 hardware implementation, the Demosaic unit is built with + bad pixel (BP) and noise reduction (NR) control inside, so picking demosaic + mode affects bad pixel and noise reduction control. Unless limited by + memory bandwidth, programmers should always pick BPNR modes. Otherwise, BP + and NR features are not available, even if you try to turn on BP or NR + controls with GFISPSetAttribute(). + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_DEMOSAIC, + GFISPBADPIXELCONTROL, GFISPNOISECONTROL1 +*/ +typedef struct _GFISPDEMOSAICCONTROL +{ + GFISP_DEMOSAIC_MODE_SEL DemosaicMode; /**< Demosaic mode selection. */ +} GFISPDEMOSAICCONTROL, *PGFISPDEMOSAICCONTROL; + + +/** Coring limit scaling selection enum for #GFISPEDGEENHANCECONTROL. */ +typedef enum +{ + GFISP_GCLIMIT_SCALE_4 = 0, // range [1,4.5] + GFISP_GCLIMIT_SCALE_8 = 1, // range [1,8.5] + GFISP_GCLIMIT_SCALE_16= 2, // range [1,16.5] + GFISP_GCLIMIT_SCALE_32= 3 // range [1,32.5] +} GFISP_GCORINGLIMIT_SCALE_SEL; + +/** Edge enhancement control. + + This structure controls the edge enhancement process, accomplished by the + following: + -# Extracting the high frequency component (HF) of the pixel + -# Amplifying HF if the extracted value is "large" (that is, coring) + -# Adding the amplified HF back to the Y channel of the pixel. + + In the SC15 implementation, edge enhancement control resides in the + Demosaic unit. It is effective only if DM3X3BPNR, DM5X5NR, or DM5X5BPNR + demosaic mode is selected. The threshold that's used for coring is not a predetermined + fixed value, but instead is adaptive depending on the brightness + level. If the pixel surround is bright (more visible), the coring threshold will + be larger, which means only stronger edges are enhanced. Weaker edges are + considered more noise-prone and therefore are not enhanced. + + Two control parameters are used to determine the adaptive coring threshold: + GCoringLimit and GCoreScaleSel. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_EDGE_ENHANCE +*/ +typedef struct _GFISPEDGEENHANCECONTROL +{ + NvU16 StrengthLevel; /**< How heavily the edge enhancement is applied. Unsigned fixed-point format. Valid range is [0, 3 7/8] with a precision of 1/8, plus [4, 15 1/2] with a precision of 1/2. */ + + NvU16 GCoringLimit; /**< Minimum coring level. The coring level increases when the pixel's surrounding brightness level goes up. Valid range is [0-63]. */ + GFISP_GCORINGLIMIT_SCALE_SEL GCoringScaleSel; /**< Scaling factor of GCoringLimit. Specifies the influence of the brightness level to the coring level. The higher the GCoreScaleSel is, the larger the coring level grows under the same brightness. */ +} GFISPEDGEENHANCECONTROL, *PGFISPEDGEENHANCECONTROL; + + +/** Noise Reduction 1 control. + + There are two noise reduction functions in ISP datapath: + -# 3D noise reduction + -# False color reduction + + GFISPNOISECONTROL1 applies to the first method. + It resides in Demosaic unit along with edge enhancement. It is effective + only if DM3X3BPNR, DM5X5NR, or DM5X5BPNR demosaic mode is selected. + + This method reduces noise not only in the image plane but also in the + intensity domain. In other words, low pass filtering is applied to pixels that + have a similar pixel value and are also close to the same location. + FilterStrengthLevel defines the filter kernel size on the intensity + domain. Larger FilterStrengthLevel generates a smoother but blurry + image. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_NOISE_CONTROL1 +*/ +typedef struct _GFISPNOISECONTROL1 +{ + NvU16 FilterStrengthLevel; /**< Weighted average scaling factor. Valid range is [0,7]. */ +} GFISPNOISECONTROL1, *PGFISPNOISECONTROL1; + + +/** Noise Reduction 2 control. + + There are two noise reduction functions in ISP datapath: + -# 3D noise reduction + -# False color reduction + + GFISPNOISECONTROL2 applies to the second method. + It resides in color correction unit. + + This method reduces the colorfulness of pixels at shadow region or at edges + to de-emphasize color noise and color aliasing effects. HighLimit and + TransitionWidth specify the pixels that will undergo the color reduction. + If the luminance level of the pixel is larger than (HighLimit + + TransitionWidth), the pixel's colorfulness is intact. If the luminance level + is smaller than HighLimit, the colorfulness is reduced to a minimum (i.e., no + color correction is applied). Pixels with luminance levels between these limits + pass through an intermediate colorfulness reduction factor. CCScaleFactor + specifies how much color reduction should be applied at edge pixels. Larger + CCScaleFactor creates a more noticeable color reduction at the edges. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_NOISE_CONTROL2 +*/ +typedef struct _GFISPNOISECONTROL2 +{ + NvU16 HighLimit; /**< Upper-limit level of noise reduction curve. */ + NvU16 TransitionWidth; /**< Width of noise reduction curve. Valid values are {16, 32, 64, 128}. */ + NvU16 CCScaleFactor; /**< Slope of noise reduction curve. Unsigned fixed point format. Valid range is [0, 31]. */ +} GFISPNOISECONTROL2, *PGFISPNOISECONTROL2; + + + +/** Bad pixel control. + + This structure controls a method to conceal bad pixels. + + The process resides in the Demosaic unit along with edge enhancement + and noise control 1. It is effective only if DM3X3BPNR or DM5X5BPNR demosaic + mode is selected. + + If a pixel value deviates greatly from its surrounding pixels, the pixel is + considered to be a bad pixel. The deviation is defined in terms of the + percentage of the average value of the surrounding pixels. + + Two ratio coefficients are used: + - If the pixel is within a flat area, LowCoef is used, + - If the pixel is at an edge region, UpCoef is used. + If the average of the surrounding pixels is lower than DarkLevel, it is + considered to be at a shadow region, and DarkLevel instead of the average + value will be used to calculate the deviation threshold. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_BAD_PIXEL +*/ +typedef struct _GFISPBADPIXELCONTROL +{ + NvU16 DarkLevel; /**< Bad-pixel dark level. */ + NvU16 UpCoef, /**< Coefficient for upper threshold. Unsigned fixed point format. Valid range is [0, 1 7/8] with precision of 1/8. */ + LowCoef; /**< Coefficient for lower threshold. Unsigned fixed point format. Valid range is [0, 1 7/8] with precision of 1/8. */ +} GFISPBADPIXELCONTROL, *PGFISPBADPIXELCONTROL; + + +/** Color correction control. + + This structure controls the color correction process. + + In a strict sense, the color correction module transforms a given color space + (based on the optical characteristics of the imager) to a specific color space + such as described by the CCIR 601 standard. The color component signals are + then handled according to that standard color space from that point on. + + For high-end cameras, color correction is used to match some sensitive colors + such as flesh tone to a desired shade of colors, and is handled primarily by + experts who know what they are doing. + + In practice, there may be a simpler means with fewer control parameters, + where the color shade of images is adjusted to suit the viewer's taste. So, gain + and offset of R, G, and B pixels are individually adjusted. + + GFISP color correction consists of 3x3 matrix factors for the camera RGB + (cRGB) to standard RGB (sRGB) conversion. Subjective adjustment of color + can also be included. + - Coefficients on the main diagonal are unsigned. Valid range is [0, 7 255/256]. + - Off-diagonal coefficients are unsigned. Valid range is [-7 255/256, 7 255/256]. + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_COLOR_CORRECTION +*/ +typedef struct _GFISPCOLORCORRECTION +{ + NvU16 R2R; /**< Red-to-red coefficient. Unsigned fixed point format. Valid range is [0, 7 255/256]. */ + NvS16 R2G; /**< Red-to-green coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvS16 R2B; /**< Red-to-blue coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvS16 G2R; /**< Green-to-red coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvU16 G2G; /**< Green-to-green coefficient. Unsigned fixed point format. Valid range is [0, 7 255/256]. */ + NvS16 G2B; /**< Green-to-blue coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvS16 B2R; /**< Blue-to-red coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvS16 B2G; /**< Blue-to-green coefficient. Signed fixed point format. Valid range is [-7 255/256, 7 255/256]. */ + NvU16 B2B; /**< Blue-to-blue coefficient. Unsigned fixed point format. Valid range is [0, 7 255/256]. */ + NvS16 Vividity; /**< Multiplier to boost the diagonal elements. Signed fixed point format. Valid Range [-64/256, 64/256]. */ + NvS16 VividityScaleFactor; /**< Multiplier to boost the diagonal elements. Signed fixed point format. Valid Range [-OffDiagona/64, OffDiagonal/64]. */ + NvU16 GainStart; /**< Starting Gain for Auto Vividity . */ + NvU16 GainEnd; /**< End Gain for Auto Vividity. */ +} GFISPCOLORCORRECTION, *PGFISPCOLORCORRECTION; + + +/** This structure describes one approximated linear segment for gamma. + @see GFISPGAMMACONTROL +*/ +typedef struct _GFISPGAMMAENTRY +{ + NvU16 inputStart; /**< Input start value of line segment. Valid range is [0, 1023]. */ + NvU16 outputStart; /**< Output start value of line segment. Valid range is [0, 255]. */ + NvS16 slope; /**< Slope of the line segment. Signed fixed point format. Valid range is [-7 63/64, 7 63/64]. */ + NvU16 reserved; +} GFISPGAMMAENTRY, *PGFISPGAMMAENTRY; + +/** Gamma correction control. + + This structure controls the gamma correction process. + + Gamma correction applies non-linear characteristics to compensate for the + non-linear characteristics of display devices such as cathode ray tubes driven + by R, G, B primary color signals. So, in a strict sense, this must be applied to + R, G, B signals. + + In SC15 implementation, gamma correction is approximated using up to 16 + line segments. Each line entry must be provided in ascending order (within + the input range). + + @see GFISPGetParameter, GFISPSetParameter, GFISP_ATTR_ENABLE_GAMMA_CORRECTION +*/ +typedef struct _GFISPGAMMACONTROL +{ + NvU32 nEntries; /**< Number of entries in the pEntries table. Valid range is [1-16]. */ + GFISPGAMMAENTRY *pEntries; /**< Gamma entry table. */ +} GFISPGAMMACONTROL, *PGFISPGAMMACONTROL; + + +/** Y signal range selection enum for #GFISPYUVCONVERSION. +*/ +typedef enum +{ + GFISP_YRANGE_FULL = 0, /**< Range of [0,255]. */ + GFISP_YRANGE_NEARFULL = 1, /**< Rage of [1,254] (exclude 00 and FF). */ + GFISP_YRANGE_ITU601 = 2 /**< ITU601 standard. */ +} GFISP_YRANGE_SEL; + +/** RGB to YUV conversion control. + This structure controls the YUV conversion process, which converts RGB + color space to corresponding YUV color space, based on the 3x3 matrix. + + {Y, U, V} shall have offset values that are not shown in the formula above. +*/ +typedef struct _GFISPYUVCONVERSION +{ + GFISP_YRANGE_SEL YRangeSel; /**< YUV output signal range. */ + NvS16 YOff; /**< Y value offset. Valid range is [-128, 127]. */ + + // 3x3 YUV conversion matrix. + // G2Y is unsigned fixed point format. Valid range is [0, 1 255/256]. + // R2Y and B2Y are unsigned fixed point format. Valid range is [0, 255/256]. + // R2U, G2U, B2U, R2V, G2V, B2V are signed fixed point format. + // Valid range is [-255/256, 255/256]. + NvS16 R2Y; /**< Red-to-Y coefficient. Unsigned fixed point format. Valid range is [0, 255/256]. */ + NvS16 G2Y; /**< Green-to-Y coefficient. Unsigned fixed point format. Valid range is [0, 1 255/256]. */ + NvS16 B2Y; /**< Blue-to-Y coefficient. Unsigned fixed point format. Valid range is [0, 1 255/256]. */ + NvS16 R2U; /**< Red-to-U coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 G2U; /**< Green-to-U coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 B2U; /**< Blue-to-U coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 R2V; /**< Red-to-V coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 G2V; /**< Green-to-V coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ + NvS16 B2V; /**< Blue-to-V coefficient. Signed fixed point format. Valid range is [-255/256, 255/256]. */ +} GFISPYUVCONVERSION, *PGFISPYUVCONVERSION; + +/** Isp set mode + This structure set ISP parameters to the specified mode, as specidied in the ISP script. +*/ +typedef struct _GFISPSETMODE +{ + NvS32 Mode; /**< Mode number. */ +} GFISPSETMODE, *PGFISPSETMODE; + +/** 3A AE parameter + These enum contains 3A AE control parameters. +*/ + +typedef enum +{ + GFISP_AE_FRAME_CHOICE_FIXED = 0, /**< fixed frame rate. At lowlux AE will use only digital gain to increase brightness */ + GFISP_AE_FRAME_CHOICE_FLEXIBLE = 1 /**< At lowlux AE will increase frame height first (i.e., lower frame rate) to increase brightness Frame height is bounded by FrameHeight at GFISP_AE_SENSORINFO. */ +}GFISP_AE_FRAME_CHOICE; + +typedef enum +{ + GFISP_AE_METERING_CHOICE_EVALUATIVE = 0, /**< calculate luminance average by propriotary algorithm */ + GFISP_AE_METERING_CHOICE_SPOT = 1, /**< calculate luminance average from center window only */ + GFISP_AE_METERING_CHOICE_CENTER = 2, /**< GFISP_AE_METERING_CHOICE_CENTER: calculate luminance average from weighted sum of center window and whole frame */ + GFISP_AE_METERING_CHOICE_MATRIX = 3 /**< calculate luminance average from weighted sum of 3x3 sub-windows */ +}GFISP_AE_METERING_CHOICE; + +typedef enum +{ + GFISP_AE_ANTIFLICKER_CHOICE_50HZ = 0, /**< use AEStep_50Hz in GFISP_AE_SENSORINFO as exposure steps */ + GFISP_AE_ANTIFLICKER_CHOICE_60HZ = 1, /**< use AEStep_60Hz in GFISP_AE_SENSORINFO as exposure steps */ + GFISP_AE_ANTIFLICKER_CHOICE_MANUAL = 2, /**< use ManualAntiFlickerStep in GFISP_AE_CONTROL1 as exposure steps */ + GFISP_AE_ANTIFLICKER_CHOICE_AUTO = 3 /**< enable auto anti-flickering */ +}GFISP_AE_ANTIFLICKER_CHOICE; + +/** 3A AE parameter + This structure contains 3A AE parameters. +*/ +typedef struct _GFISP3AAE +{ + NvU16 AETarget; /**< [0..255]. Target average luminance value for AE convergence. Higher value renders brighter image. */ + NvU16 AEToleranceIn; /**< [0..255]. Convergence tolerance from AESTATE_OUT to AESTATE_IN */ + NvU16 AEToleranceOut; /**< [0..255]. Convergence tolerance from AESTATE_OUT to AESTATE_IN. Normally AEToleranceOut >= AEToleranceIn */ + GFISP_AE_FRAME_CHOICE FrameRateChoice; /**< GFISP_AE_FRAME_CHOICE */ + GFISP_AE_METERING_CHOICE MeteringChoice; /**< GFISP_AE_METERING_CHOICE */ + GFISP_AE_ANTIFLICKER_CHOICE AntiFlickerChoice; /**< GFISP_AE_ANTIFLICKER_CHOICE */ + NvU8 ConvergeSpeed; /**< [1..15]. AE convergence speed. 1 being the fastest (immediate update) */ + NvS32 Status; /**< 3A AE Status. Read only */ + + NvU32 ManualAntiFlickerStep; // manual exposure step. Used when AntiFlickerChoice=GFISP_AE_ANTIFLICKER_CHOICE_MANUAL + NvS32 CenterWeight, FrameWeight; // weights for MeteringChoice=GFISP_AE_METERING_CHOICE_CENTER + NvS32 Metering11, Metering12, Metering13,// weights for MeteringChoice=GFISP_AE_METERING_CHOICE_MATRIX + Metering21, Metering22, Metering23, + Metering31, Metering32, Metering33; + NvU16 AdditionalLumaIncreaseForFlatScene;// [0..255]. give final exposure additional increase if scene is flat. + NvU16 BacklightTbright; // [0..255]. Threshold for determining "bright regions" (for backlight checking) + NvU16 BacklightTdark; // [0..255]. Threshold for determining "dark regions" (for backlight checking) + NvU16 TOverexposed; // [0..255]. Threshold for determining overexposed condition. + NvU16 TDark; // [0..255]. Threshold for determining dark condition. + NvU8 AutoNoiseControl; /**< Auto Noise Control */ +} GFISP3AAE, *PGFISP3AAE; + +/* Exposure parameter USED for Manual Exposure and Gain settings +*/ +typedef struct _GFISPEXPOSURECONTROL +{ + NvU32 MaxFrameHeight; // longest exposure time allowed. >= DefaultFrameHeight, in unit + // of per scanline. + // For constant framerate application, set MaxFrameHeight=FrameHeight. + + NvU32 DefaultFrameHeight; // sensor's default time difference betwee two consecutive VSYNC pulses, + // in unit of per scanline. + NvU32 DefaultFrameHeightIS; // Limit the frame height corresponding to ET of 1/60 sec + + NvU16 MaxGain; // [1..128]. max digital gains allowed. Normally set to 2 (=200%) + // if anti-flickering is on. If larger sensitivity boost is needed + // at lowlux condition set MaxGain to higher value. + NvU16 MinGain; //Minimum Exposure Gain in ISP Format + + NvU16 MaxGainIS; // max digital gain allowed in the case of image stabilization + +}GFISPEXPOSURECONTROL, *PGFISPEXPOSURECONTROL; + +/* Manual Exposure and Gain settings +*/ +typedef struct _GFISPMANUALEXPOSURE +{ + NvU32 Exposure; // exposure time + NvU32 Gain; // digital gain +}GFISPMANUALEXPOSURE, *PGFISPMANUALEXPOSURE; + + +/** 3A AWB parameter + This structure contains 3A AWB parameters. +*/ + +typedef enum +{ + GFISP_AWB_WBMODE_CLOUDY = 0, /**<: for cloudy conditions (7,000K - 8,000K) */ + GFISP_AWB_WBMODE_SUNNY = 1, /**<: for sunny conditions (5,500K - 6,000K) */ + GFISP_AWB_WBMODE_FLASH = 2, /**<: for strobe or xenon flashes (~5,000K) */ + GFISP_AWB_WBMODE_FLUORESCENT = 3, /**<: for indoor office conditions (~3,000K) */ + GFISP_AWB_WBMODE_INCANDESCENT = 4, /**<: for indoor home conditions (~2,800K) */ +}GFISP_AWB_WBCUSTOM; + +typedef enum +{ + GFISP_AWB_COPLEXITY_HIGH = 0, /***/ + GFISP_AWB_COPLEXITY_MEDIUM = 1, /***/ + GFISP_AWB_COPLEXITY_LOW = 2 /***/ +}GFISP_AWB_COMPLEXITY; + +typedef struct _GFISP3AAWB +{ + NvU8 fWBCustom; // =0 when WB Custom Setting OFF + // =1 when WB Custom Setting ON + GFISP_AWB_WBCUSTOM WBCustomK; // Choose one of the defined illum class when fWBCustom=1 + // GFISP_AWB_WBMODE_CLOUDY = 0, /**<: for cloudy conditions (7,000K - 8,000K) */ + // GFISP_AWB_WBMODE_SUNNY = 1, /**<: for sunny conditions (5,500K - 6,000K) */ + // GFISP_AWB_WBMODE_FLASH = 2 /**<: for strobe or xenon flashes (~5,000K) */ + // GFISP_AWB_WBMODE_FLUORESCENT = 3, /**<: for indoor office conditions (~3,000K) */ + // GFISP_AWB_WBMODE_INCANDESCENT = 4, /**<: for indoor home conditions (~2,800K) */ + // Must be < NumWBCustom + + GFISP_AWB_COMPLEXITY ComplexityMode; + NvS8 WBShift; /**< Moves up or down illuminant class. For white balance bracketing. */ + /**< timing and stability control */ + NvU8 ConvergeSpeed; /**< [0..6], 6 being the fastest (immediate update) */ + NvU8 ToleranceIn; /**< [0..255], tolerance for convergence. */ + NvU8 ToleranceOut; /**< [0..255], threshold for triggering new AWB update. Normally ToleranceIn < ToleranceOut, and both toelrances are small (e.g., 5 to 10). */ + NvU32 FilterCoefficient; /**< [0-20] Filter coefficient used for scene change detection . */ + NvU32 M3FilterCoefficient; /**< [0-60] Filter coefficient used for temporal low pass filtering of M3 Buffer . */ + NvU32 UseM3LPFilter; /**< Flag for M3 Low Pass Filter. 1 = Enable LPF, 0 = Disable */ + NvU32 KXYCorrelation; /**< To be used for scene change detection. */ + + NvS32 Status; /**< 3A AWB Status. Read only */ +} GFISP3AAWB, *PGFISP3AAWB; + +typedef enum +{ + GFISP_AFSTATE_IN = 0, + GFISP_AFSTATE_OUT = 1, + GFISP_AFSTATE_INIT = 2 +}GFISP_AF_STATE; + +typedef enum +{ + GFISP_AF_TYPE_CENTER = 1, + GFISP_AF_TYPE_AUTO_EVALUATE = 2, + GFISP_AF_TYPE_FACE_PRIORITY = 3 +}GFISP_AF_TYPE; + +typedef enum +{ + GFISP_AF_MODE_CONTINUOUS = 0, + GFISP_AF_MODE_SINGLE = 1 +}GFISP_AF_MODE; + +/** 3A AF parameter + This structure contains 3A AF parameters. +*/ +typedef struct _GFISP3AAF +{ + GFISP_AF_STATE Status; /**< 3A AF Status. Read only */ + GFISP_AF_MODE Mode; + NvU8 Speed; + NvU8 LockTillAE; + NvU8 LockTillAWB; + NvU8 TakeSnapshot; +} GFISP3AAF, *PGFISP3AAF; + +/** ISP 3A Capability. +To get the 3A capability for a particular sensor. +*/ +typedef struct _GFISPSENSORCAPABILITY +{ + NvU8 AWBCapability; /***/ + NvU8 AECapability; /***/ + NvU8 AFCapability; /***/ + NvU8 ManualOBCapability; /***/ + NvU8 AutoOBCapability; /***/ +}GFISPSENSORCAPABILITY, *PGFISPSENSORCAPABILITY; + + + +typedef enum +{ + GFISP_SENSOR_I2C_8_BIT_REGISTER = 0, + GFISP_SENSOR_I2C_16_BIT_REGISTER = 1, +} REGISTERTYPE; + +typedef struct _GFISPSENSORRWREGISTER +{ + REGISTERTYPE RegisterType; //0: 8-bit register , 1: 16-bit register + NvU32 Addr; /**< Address : data read-write address>*/ + NvU32 Data; /**< Value of data at that address >*/ +}GFISPSENSORRWREGISTER, *PGFISPSENSORRWREGISTER; + +/** 3A algorithm type + These enum contains 3A algorithm type required for checking convergence. +*/ +typedef enum +{ + GFISP_CB_REGISTER_3A_AWB = 0, + GFISP_CB_REGISTER_3A_AE = 1, + GFISP_CB_REGISTER_3A_AF = 2 +} GFISP3ATYPE; + +/** Enabling or disabling the "gain reduction and gamma compression" property for reducing noise introduced due to high gain +* in case of Image Stabilization. +*/ +typedef enum +{ + GFISP_REDUCE_GAIN_COMPRESS_GAMMA_ON, + GFISP_REDUCE_GAIN_COMPRESS_GAMMA_OFF +} GFISPGAINGAMMACTRL; +/** Public exposed ISP API function table. See @ref groupIspFunctions. */ +typedef struct _GFISPTABLE +{ + GF_RETTYPE (* ISPGetProperty) ( GFIspHandle ISPHandle, PGFISPPROPERTY pIspProp ); + +#if defined(DVS_DEVELOPMENT) + GF_RETTYPE (* ISPSetup) ( GFIspHandle ISPHandle, GFVxHandle VxHandle, PGFCAMERARESOLUTIONTYPE pCameraResolution, GFVXBLT vxBlt ); +#else + GF_RETTYPE (* ISPSetup) ( GFIspHandle ISPHandle, PGFCAMERARESOLUTIONTYPE pCameraResolution ); +#endif + + GF_RETTYPE (* ISPSetResolution) ( GFIspHandle ISPHandle, PGFCAMERARESOLUTIONTYPE pCameraResolution ); + + GF_RETTYPE (* ISPGetAttribute) ( GFIspHandle ISPHandle, + GFISPATTRIBUTES aid, + NvU32 *attr); + GF_RETTYPE (* ISPSetAttribute) ( GFIspHandle ISPHandle, + GFISPATTRIBUTES aid, + NvU32 attr); + + GF_RETTYPE (* ISPSetAttributeToDefault) (GFIspHandle ISPHandle, GFISPATTRIBUTES aid); + + GF_RETTYPE (* ISPGetParameter) ( GFIspHandle ISPHandle, + GFISPPARAMETERS pid, + NvU32 *pSize, + void *pPara); + GF_RETTYPE (* ISPSetParameter) ( GFIspHandle ISPHandle, + GFISPPARAMETERS pid, + NvU32 size, + void *pPara); + + GF_RETTYPE (* ISPSetParameterToDefault) (GFIspHandle ISPHandle, GFISPPARAMETERS pid); + + GF_RETTYPE (* ISPTriggerMWindowGather) (GFIspHandle ISPHandle); + + GF_RETTYPE (* ISPReadMWindowValues) ( GFIspHandle ISPHandle, + NvS32 szM1Buffer, + NvU32 *pM1Buffer, + NvS32 szM2Buffer, + NvU32 *pM2Buffer, + NvS32 szM3Buffer, + NvU32 *pM3Buffer, + NvS32 szM4Buffer, + NvU32 *pM4Buffer); + + GF_RETTYPE (* ISPOEMScriptFunc) (GFIspHandle ISPHandle, + NvU32 ScriptFuncTag, + NvU32 size, + NvU32 *pBuffer); + + GF_RETTYPE (* ISP3APeriodicTrigger)(GFIspHandle ISPHandle); + + GF_RETTYPE (* ISPAeBracketingSetET) (NvS32 mode, NvU32 *pRetExposure, NvS32 *pRetGain); + + GF_RETTYPE (* ISPAwbBracketingSetIllum) (NvS32 mode, NvU16 *pRetCCT); + + GF_RETTYPE (* ISPRegister3ACallback) (GFIspHandle ISPHandle, GFISP3ATYPE type, void (*func)(void *), void *pParameter); + +} GFISPTABLE, *PGFISPTABLE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFIspOpen(GFRmHandle hRm, GFIspHandle *phIsp, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFIspClose(GFIspHandle *phIsp); + +/** @defgroup groupIspFunctions ISP Function macros + These function macros represent the function calls for GFISPAPI. +*/ +/*@{*/ + +/** Returns information about the GFISPAPI. + + @param handle Valid handle to GFISPAPI component. + @param pIspProp Pointer to a #GFISPPROPERTY struct. + For the sake of future expansion, the caller should put the size of + the structure into the #GFISPPROPERTY::size field; GFISPAPI will not + fill the structure beyond this size. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_SIZE_TOO_SMALL Error: size parameter is too small to fit even partial results. + + This function returns information about the GFISPAPI, including the + following: + - GFISPAPI module version + - ISP capability + - ISP limit parameters + It is good practice to use this function to query for the API version and + capabilities before using other GFISPAPI functions. + + @see GFISPPROPERTY, groupIspCapability +*/ +#define GFISPGetProperty( handle, pIspProp ) \ + ((PGFISPTABLE)handle)->ISPGetProperty( handle, pIspProp ) + +/** Sets up the ISP API for use with a particular camera. + + @param handle Valid handle to GFISPAPI component. + @param pCameraResolution Pointer to a #GFCAMERARESOLUTIONTYPE structure + with valid BayerInfo. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + + You must call GFISPGetProperty before calling any other ISP API functions, + with the exception of GFISPGetProperty. This function initializes ISP + to work with a particular resolution of camera. + +*/ +#if defined(DVS_DEVELOPMENT) +#define GFISPSetup( handle, vxhandle, pCameraResolution, vxBlt ) \ + ((PGFISPTABLE)handle)->ISPSetup( handle, vxhandle, pCameraResolution, vxBlt ) +#else +#define GFISPSetup( handle, pCameraResolution ) \ + ((PGFISPTABLE)handle)->ISPSetup( handle, pCameraResolution ) +#endif + +/** Resizes/repositions all windows based on resolution data. + + @param handle Valid handle to GFISPAPI component. + @param pCameraResolution Pointer to a #GFCAMERARESOLUTIONTYPE structure + with valid BayerInfo. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + This function resizes and repositions the windows for several ISP parameters + based on the provided BayerInfo struct. Affected parameters are: + - Timing + - M1-M4 statistics windows + - Optical black regions + - Lens shading center point + +*/ +#define GFISPSetResolution( handle, pCameraResolution ) \ + ((PGFISPTABLE)handle)->ISPSetResolution( handle, pCameraResolution ) + +/** Get an attribute of the GFISPAPI. + + @param handle Valid handle to GFISPAPI component. + @param aid Attribute ID. One of #GFISPATTRIBUTES enumeration type. + @param pAttrData Pointer to an #NvU32 to be filled with the attribute value. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPATTRIBUTES +*/ +#define GFISPGetAttribute( handle, aid, pAttrData ) \ + ((PGFISPTABLE)handle)->ISPGetAttribute( handle, aid, pAttrData ) + +/** Set an attribute of the GFISPAPI. + + @param handle Valid handle to GFISPAPI component. + @param aid Attribute ID. A #GFISPATTRIBUTES enumeration type value. + @param attrData Pointer to an #NvU32 to be filled with the attribute value. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + Under the NVIDIA ISP implementation, certain ISP functions can be turned + on or off independent of parameter settings. In most cases, this function + simply switches certain ISP functions on or off. + + To set parameters for specific ISP functions, see GFISPSetParameter(). + + @see GFISPATTRIBUTES +*/ +#define GFISPSetAttribute( handle, aid, attrData ) \ + ((PGFISPTABLE)handle)->ISPSetAttribute( handle, aid, attrData ) + +/** Set an attribute of the GFISPAPI to its default value. + + @param handle Valid handle to GFISPAPI component. + @param aid Attribute ID. A #GFISPATTRIBUTES enumeration type value. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPATTRIBUTES +*/ +#define GFISPSetAttributeToDefault( handle, aid ) \ + ((PGFISPTABLE)handle)->ISPSetAttributeToDefault( handle, aid ) + +/** Get parameters for a given ISP functional block. + + @param handle Valid handle to GFISPAPI component. + @param pid Parameter ID. A #GFISPPARAMETERS enumeration type value. + @param pSize Pointer to an #NvU32 to be filled with the parameter size. Can be NULL. + @param pPara Pointer to a certain GFISPAPI data structure, depending on #pid. Can be NULL. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPPARAMETERS +*/ +#define GFISPGetParameter( handle, pid, pSize, pPara ) \ + ((PGFISPTABLE)handle)->ISPGetParameter( handle, pid, pSize, pPara ) + +/** Set parameters for a given ISP functional block. + + @param handle Valid handle to GFISPAPI component. + @param pid Parameter ID. A #GFISPPARAMETERS enumeration type value. + @param size #NvU32 with actual size of GFISPAPI structure pointed to by #pPara. + @param pPara Pointer to a certain GFISPAPI data structure, depending on #pid. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_SIZE_TOO_SMALL #size parameter is too small + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPPARAMETERS +*/ +#define GFISPSetParameter( handle, pid, size, pPara ) \ + ((PGFISPTABLE)handle)->ISPSetParameter( handle, pid, size, pPara ) + +/** Set parameters for a given ISP functional block to their default value. + + @param handle Valid handle to GFISPAPI component. + @param pid Parameter ID. A #GFISPPARAMETERS enumeration type value. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_ILLEGAL_PARAMETER One or more parameters is NULL or out-of-range. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + @see GFISPPARAMETERS +*/ +#define GFISPSetParameterToDefault( handle, pid ) \ + ((PGFISPTABLE)handle)->ISPSetParameterToDefault( handle, pid ) + +/** Triggers MWindow statistics to be gathered on the next frame. + + @param handle Valid handle to GFISPAPI component. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + This function will trigger MWindow statistics to be gathered for + any of the M2, M3, M4 statistics that are turned on. M1 statistics + are constantly gathered. The statistics will become available at + the end of the next frame, and can be read by calling + GFISPReadMWindowValues(). + + Calling GFISPTriggerMWindowGather implicitly sets + #GFISP_ATTR_ENABLE_STATS_INT to 1. + + @see GFISPReadMWindowValues +*/ +#define GFISPTriggerMWindowGather( handle ) \ + ((PGFISPTABLE)handle)->ISPTriggerMWindowGather( handle ) + +/** Reads gathered MWindow statistics if they are ready. + + @param handle Valid handle to GFISPAPI component. + @param szM1Buffer Maximum size of M1Buffer provided by caller (in bytes). The + GFISPAPI fills the buffer as much as it can. If zero, the GFISPAPI + doesn't fill the M1Buffer. + @param pM1Buffer Array of 8 data. First four 32-bit values will be filled with average + RGGB pixel values. Next four values will be filled with peak pixel values. + Can be NULL, then the GFISPAPI doesn't fill M1Buffer. + @param szM2Buffer Maximum size of M2Buffer provided by caller (in bytes). The + GFISPAPI fills the buffer as much as it can. If zero, the GFISPAPI + doesn't fill the M2Buffer. + @param pM2Buffer Array of 16 data. Data is arranged in 32-bit words as follows: + {R1, Gr1, Gb1, B1, + R2, Gr2, Gb2, B2, ...} + Can be NULL, then the GFISPAPI doesn't fill M2Buffer. + @param szM3Buffer Maximum size of M3Buffer provided by caller (in bytes). The + GFISPAPI fills the buffer as much as it can. If zero, the GFISPAPI + doesn't fill the M3Buffer. + @param pM3Buffer Array to hold pixel samples. The size matches the M3 Window specification. + The data is arranged as follows: + {R1, R2, R3, R4}, + {Gr1, Gr2, Gr3, Gr4}, + {Gb1, Gb2, Gb3, Gb4}, + {B1, B2, B3, B4}, + {R5, R6, R7, R8}, + ... + Can be NULL, then the GFISPAPI doesn't fill M3Buffer. + @param szM4Buffer Maximum size of M4Buffer provided by caller (in bytes). The + GFISPAPI fills the buffer as much as it can. If zero, the GFISPAPI + doesn't fill the M4Buffer. + @param pM4Buffer Array of 2*M4WindowNumber data. Data is arranged as follows: + {HF1, Luma1, HF2, Luma2, ...} + Can be NULL, then the GFISPAPI doesn't fill M4Buffer. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_STATISTICS_NOT_READY M2/M3/M4 statistics not ready. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + Call this function to read the MWindow values gathered by the last call to + GFISPTriggerMWindowGather(). The user may either poll for statistics ready + by checking the return code, or use the interrupt mechanism to only call + GFISPReadMWindowValues once the statistics are ready. + + After the statistics are gathered, they will remain available for reading + until the next call to GFISPTriggerMWindowGather(). + + M1 statistics are gathered every frame regardless of whether + GFISPTriggerMWindowGather() has been called. The user can read + the last frame's M1 statistics without ever triggering a gather by + passing 0 and NULL for the M2-M4 parameters to GFISPReadMWindowValues(). + + @see GFISPTriggerMWindowGather +*/ +#define GFISPReadMWindowValues( handle, szM1Buffer, pM1Buffer, \ + szM2Buffer, pM2Buffer, szM3Buffer, pM3Buffer, szM4Buffer, pM4Buffer ) \ + ((PGFISPTABLE)handle)->ISPReadMWindowValues( handle, szM1Buffer, pM1Buffer, \ + szM2Buffer, pM2Buffer, szM3Buffer, pM3Buffer, szM4Buffer, pM4Buffer ) + +/** Call Oem function defined in ISP script. + + @param handle Valid handle to GFISPAPI component. + @param ScriptFuncTag Function tag used by the script. + @param size Number of entries in the buffer pointed to by #pBuffer. + @param pBuffer Point to a @param #NvU32 buffer that will be passed to script function. + Use it to send parameter to script function and get data back. + + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + Call this function to access script function OemScriptFunc(). +*/ +#define GFISPOEMScriptFunc( handle, ScriptFuncTag, size, pBuffer ) \ + ((PGFISPTABLE)handle)->ISPOEMScriptFunc( handle, ScriptFuncTag, size, pBuffer ) + +/** Trigger periodic software 3A function. + + @param handle Valid handle to GFISPAPI component. + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR_CALL_SETUP_FIRST The application did not call GFISPSetup() prior to calling this function. + + Call this function at every vertical blank to trigger periodic software 3A function +*/ +#define GFISP3APeriodicTrigger( handle ) \ + ((PGFISPTABLE)handle)->ISP3APeriodicTrigger( handle ) + +/** Exposure Bracketing Function + @param handle Valid handle to GFISPAPI component + @param mode Range: 0 Exposure value output by AC Algo + -1 Less by one-third stop than AC Output + 1 More by one-third stop than AC Output + @param.pRetExpsoure Expsoure at current mode is returned through this pointer + @param pGain Gain at current mode is returned through this pointer + @retval GF_SUCCESS or GF_ERROR + + Call this function three times with different modes each time in order to record images with exposure bracketing +*/ +#define GFISPAeBracketingSetET(handle, mode, pRetExposure, pRetGain) \ + ((PGFISPTABLE)handle)->ISPAeBracketingSetET( mode, pRetExposure, pRetGain ) + +/** White Balance Bracketing Function + @param handle Valid handle to GFISPAPI component + @param mode Range: 0 Exposure value output by AC Algo + -1 Less by one Illuminant than AC Output + 1 More by one Illuminant than AC Output + @param pRetCCT Color Temprature at current mode is returned through this pointer + @retval GF_SUCCESS or GF_ERROR + + Call this function three times with different modes each time in order to record images with White Balance bracketing +*/ +#define GFISPAwbBracketingSetIllum(handle, mode, pRetCCT) \ + ((PGFISPTABLE)handle)->ISPAwbBracketingSetIllum( mode, pRetCCT ) + +/** Register callback function for the convergence of software Auto White balance + + @param handle Valid handle to GFISPAPI component. + @param algoType whether AWB, AE or AF + @param func Pointer to the callback function + @param pParameter pointer to the argument of function call + @retval GF_SUCCESS Success + @retval GFISP_ERROR_BAD_HANDLE #handle is invalid. + @retval GFISP_ERROR If invalid function pointer is passed + + Call this function when application wants to know whether the auto white balance algorithm is converged or not. + When algorithm converges it calls the function func which is registered as callback function. +*/ +#define GFISPRegister3ACallback(handle, algoType, func, pParameter) \ + ((PGFISPTABLE)handle)->ISPRegister3ACallback( handle, algoType, func, pParameter ) + +/*@}*/ // End function macros + +/*@}*/ // End ISP API Doxygen + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* _GF_ISP__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFIspError.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFIspError.h new file mode 100755 index 00000000..4f173424 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFIspError.h @@ -0,0 +1,37 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFIspError.h + * GFSDK Image Signal Processor API error code header file. + */ + +#ifndef __GFISPERROR_H__ +#define __GFISPERROR_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#define GFISP_ERROR_ILLEGAL_PARAMETER (GFISP_ERROR | 0x00000001L) +#define GFISP_ERROR_BAD_HANDLE (GFISP_ERROR | 0x00000002L) +#define GFISP_ERROR_SIZE_TOO_SMALL (GFISP_ERROR | 0x00000003L) +#define GFISP_ERROR_STATISTICS_NOT_READY (GFISP_ERROR | 0x00000004L) +#define GFISP_ERROR_CALL_SETUP_FIRST (GFISP_ERROR | 0x00000005L) +#define GFISP_ERROR_OUT_OF_MEMORY (GFISP_ERROR | 0x00000006L) + +#ifdef __cplusplus +} +#endif + +#endif // __GFISPERROR_H__ + + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFJxDec.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFJxDec.h new file mode 100755 index 00000000..879f10ed --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFJxDec.h @@ -0,0 +1,508 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFJxDec.h +GFSDK JPEG Decode API header file. +*/ +#ifndef _GF_JPEG_DEC__ +#define _GF_JPEG_DEC__ + +#include "nvtypes.h" +#include "GFVx.h" + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif + +/** @addtogroup groupJx JxDecAPI JPEG Decoder API +*/ + /*
        +
      • @ref pageGxAppNotes +
          +
        • @ref pageGxAppNotes1 +
        +
      + */ + +/*@{*/ + +// JXDECCapFlags + +/** JxDecAPI property flag: Support for Sequential encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_SEQUENTIAL_DCT 0x00000001 + +/** JxDecAPI property flag: Support for Progressive encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_PROGRESS_DCT 0x00000002 + +/** JxDecAPI property flag: Support for lossless encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_LOSSLESS 0x00000004 + +/** JxDecAPI property flag: Support for hierarchical encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_HIERARCHICAL 0x00000008 + +/** JxDecAPI property flag: Support for 8 bits encoded JPEG. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_8_BIT 0x00000010 + +/** JxDecAPI property flag: "No" Support for 12 bits encoded JPEG Presently. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_12_BIT 0x00000020 + +/** JxDecAPI property flag: Support for Interleaved mode. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_INTERLEAVE 0x00000040 + +/** JxDecAPI property flag: "No" Support presently for Interleaved mode. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_NO_INTERLEAVE 0x00000080 + +/** JxDecAPI property flag: Support for Huffman Coding. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_HUFFMAN 0x00000100 + +/** JxDecAPI property flag: No Support for Arithematic Coding presently. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_ARITHMETIC 0x00000200 + +/** JxDecAPI property flag: No Support for Interchange format coding. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_INTERCHANGE 0x00000400 + +/** JxDecAPI property flag: Support for Pixel Based Cropping(MCU based Cropping). + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_CROPPING 0x00001000 + +/** JxDecAPI property flag: Support for YUV444 encoded JPEG images. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_YUV444 0x00002000 + +/** JxDecAPI property flag: Support for YUV422 encoded JPEG images. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_YUV422 0x00004000 + +/** JxDecAPI property flag: YUV422 Rotation Supported. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_ROTATED_YUV422 0x00008000 + +/** JxDecAPI property flag: Support for YUV420 encoded JPEG images. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_YUV420 0x00010000 + +/** JxDecAPI property flag: Support for Gray Scale encoded JPEG images. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_GRAY_SCALE 0x00020000 + +/** JxDecAPI property flag: Support for Extended RGB format 24/32 bpp. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_EXTEND_RGB 0x00040000 + +/** JxDecAPI property flag: Support for YUV420 output decoded format. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_420_OUTPUT 0x00080000 + +/** JxDecAPI property flag: Support for YUV422 output decoded format. + @see GFJxDecGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JXDEC_CAP_422_OUTPUT 0x00100000 + +/** Image source dimensions and color format of the input JPEG to be decoded. + This structure is passed as parameter to GFJxDecGetImageInfo(). + + @see GFRMSURFACE::ColorFormat, GFJxDecGetImageInfo() +*/ +typedef struct _GFJXDECIMAGEINFO +{ + NvU32 IIFlag; /**< Deprecated, do not use. + This variable is set to the same error code as returned by GFJxDecGetImageInfo(). + @deprecated + */ + NvU32 Width; /**< Width of the input image */ + NvU32 Height; /**< Height of the input image */ + NvU32 ColorFormat; /**< Color Format of input image (YUV420, YUV422, ...) + @see GFRMSURFACE.ColorFormat */ +}GFJXDECIMAGEINFO, *PGFJXDECIMAGEINFO; + +/** GFJxDecStart parameter structure. + This structure specifies target surface, scaling, source + and destination cropping for the decode operation. + + @see GFJxDecStart() +*/ +typedef struct _GFJXDECSTART +{ + NvU32 SFlag; /**< Deprecated, do not use. @deprecated */ + PGFRMSURFACE pDestSurf; /**< Destination Surface to hold the decoded image. + The color format of the surface controls the output color format. + If no destination cropping rectangle is given, the decoded picture + is scaled to match the surface size. + */ + PGFRECT pCroppingRect; /**< Source cropping area to be decoded, or NULL for no cropping. + Top-left position of the cropping rectangle must be aligned + to an MCU boundary. + */ + PGFRECT pDestRect; /**< Destination cropping area, or NULL for no cropping. + If a destination cropping rectangle is given, the decoded picture + will be scaled to fit this rectangle. + */ + NvU32 Error; /**< Deprecated, do not use. + This variable will be set to the same value as returned by GFJxDecStart(). + @deprecated + */ +} GFJXDECSTART, *PGFJXDECSTART; + + +//SFlag: not used anymore. Cropping is decided on whether +//the pCroppingRect is NULL or not +#define GF_JXDEC_SFLAG_CROPPING 0 + +/** GF_DECODER_IDLE is returned if hardware decoder is idle by GFJxDecGetStatus(). + @see GFJxDecGetStatus() +*/ +#define GF_DECODER_IDLE 0x00000001 + +/** GF_DECODER_BUSY is returned if hardware decoder is busy by GFJxDecGetStatus(). + @see GFJxDecGetStatus() +*/ +#define GF_DECODER_BUSY 0x00000002 + + +/** JxDecAPI Pass JX_DEC_SET_READBITSTREAM to GFJxDecSet to register call back function +@see GFJxDecSet() +*/ +#define JX_DEC_SET_READBITSTREAM 1 + +/** Structure holding the callback function pointer. + Used in registering the callback function +*/ +typedef struct _GFJXDECCALLBACK +{ + void *pPara; /**< Not used anymore */ + NvU32 (*pCallBack)(void * pPara, NvU8 ** ppBuffer, NvS32 * BufferLength); + /**< + Application callback function pointer. + Register a callback function for fetching JPEG Image data. + + @param *pPara Not used anymore + @param ppBuffer Buffer Pointer + @param BufferLength Buffer Length in bytes, 0 if no bytes read. + + @retval The number of bytes read successfully, 0 if no bytes read. + */ + +}GFJXDECCALLBACK, *PGFJXDECCALLBACK; + +/** Structure holding the callback function pointer. + Used in registering the callback function +*/ +typedef struct _GFJXDECGETIMAGECALLBACK +{ + void *pPara; + /**< pPara is a parameter passed from application, + and application wants API to call back with this parameter + */ + NvU32 (*pCallBack)(void * pPara, PGFRMSURFACE pImageSurf, PGFRECT pImageRect, NvU32 uiImageFlag); + /**< + Application callback function pointer. + Register a callback function for fetching decoded JPEG Image data. + + @param *pPara Parameter to pass on to application callback function + @param pImageSurf Surface Pointer + @param pImageRect Source rectangle + @param uiImageFlag + + + +
      #JX_DEC_IF_LAST_PORTION_IMAGEThis is the last portion of decoded image
      + @retval 0 + */ +}GFJXDECGETIMAGECALLBACK, *PGFJXDECGETIMAGECALLBACK; + + +/** This is the last portion of the Image. + @see GFJXDECGETIMAGECALLBACK +*/ +#define JX_DEC_IF_LAST_PORTION_IMAGE 0x00000001 //this is the last portion of decoded image + +//Attribute uiFeature + +/** Set get decoded image call back(inorder to dump the decoded YUV from JPEG). + @see GFJXDECGETIMAGECALLBACK, GFJxDecGetImageInfo +*/ +#define JX_DEC_GETIMAGE 0x00000001 + +/** Pass JX_DEC_GETIMAGE_COLORFORMAT with GFJxDecGetAttribute to get JPEG image color format. */ +#define JX_DEC_GETIMAGE_COLORFORMAT 0x00000002 + + +/** Call this function get the JxDec Component's handle. + @param hRm (#GFRmHandle) Handle to the Resource Manager + @param phJxDec (#GFJxDECHandle) Pointer to the JxDecAPI Handle + @param state Set to Default state. + @param hCh (#GFRmChHandle) Channel Handle + @retval #GF_SUCCESS JxDec component registered successfully + @retval #GF_ERROR Some error occured +*/ +GF_RETTYPE GFJxDecOpen(GFRmHandle hRm, GFJxDecHandle *phJxDec, GF_STATE_TYPE state, GFRmChHandle hCh); + + +/** The function releases the JxDec's Component handle. + @param phJxDec (#GFJxDECHandle) Pointer to the JxDecAPI Handle +*/ +void GFJxDecClose(GFJxDecHandle *phJxDec); + +/** This function returns version and capabilities of JPEG decoder. + + @param hJxDec Handle to JxDecAPI + @param pJXProp Pointer to property structure to be filled in + + @retval #GF_SUCCESS \a pJXProp filled in successfully + @retval #GF_ERROR Some error occured + + @see GFPROPERTY +*/ +GF_RETTYPE GFJxDecGetProperty(GFJxDecHandle hJxDec, PGFPROPERTY pJXProp); + +/** This function returns the status of the JPEG Decoder + + @param hJxDec Handle to JxDecAPI + @param pStatus Returns status, GF_DECODER_BUSY or GF_DECODER_IDLE. +*/ +GF_RETTYPE GFJxDecGetStatus(GFJxDecHandle hJxDec, NvU32* pStatus); + +/** The funtion gets the information about the input image and fills it into the pInfo + + If the function fails, it will return an error code describing the failure cause. + + @param hJxDec Handle to JxDecAPI + @param pInfo Pointer to Image Information structure to be filled in + + @retval GF_SUCCESS \a pInfo filled in successfully + @retval GF_JXDEC_IFLAG_INVALID_MARKER Invalid Marker in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_HDR_LEN Invalid header (marker) length in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_SIG Invalid Image Signature(eg: JFIF, AVI, ..) in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_DQT Invalid Quantization Table in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_DHT Invalid Huffman Tables in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_VALUE Invalid image parameters (eg: width, height , ...) in JPEG file + @retval GF_JXDEC_IFLAG_INVALID_FORMAT Invalid format in JPEG file + @retval GF_JXDEC_IFLAG_PROGRESSIVE_MARKER Invalid Marker in JPEG file + @see GFJXDECIMAGEINFO +*/ +GF_RETTYPE GFJxDecGetImageInfo(GFJxDecHandle hJxDec, PGFJXDECIMAGEINFO pInfo); + +/** This function sets up a callback function + @param hJxDec Handle to JxDecAPI + @param uiFeature Feature ID to set + @param pInfo Feature specific parameter + + + + + + + + +
      \a uiFeature\a pInfo interpretationMeaning
      JX_DEC_SET_READBITSTREAMGFJXDECCALLBACK*Set up Jpeg bitstream feed callback
      + + @retval #GF_SUCCESS If successful + @retval #GFJXD_ERROR_INVALID_PARAMETER Invalid parameter + + @see GFJXDECCALLBACK +*/ +GF_RETTYPE GFJxDecSet(GFJxDecHandle hJxDec, NvU32 uiFeature, void* pInfo); + +/** Set attributes for the decoder. + @param hJxDec Handle to JxDecAPI, + @param attrID Attribute ID to be set + @param pInfo Attruvyte specific parameter + + + + + + +
      #JX_DEC_GETIMAGE Get the YUV decoded JPEG image into a file, Sets the decoder image callback
      #JX_DEC_GETIMAGE_COLORFORMAT Set get decoded image color format.
      + + @retval #GF_SUCCESS +*/ +GF_RETTYPE GFJxDecSetAttribute(GFJxDecHandle hJxDec, NvU32 attrID, NvU32* pInfo); + +/** Gets attributes for the decoder + @param hJxDec Handle to JxDecAPI, + @param attrID Attribute ID to read + @param pInfo Pointer to block returning attribute specific data + + + + + +
      #JX_DEC_GETIMAGE Get the YUV decoded JPEG image into a file, Sets the decoder image callback
      #JX_DEC_GETIMAGE_COLORFORMAT Set get decoded image color format.
      +*/ +GF_RETTYPE GFJxDecGetAttribute(GFJxDecHandle hJxDec, NvU32 attrID, NvU32* pInfo); + +/** Setup JxDecAPI for JPEG decoding a frame. + + If GFJxDecStart() fails, it will return an error code describing the failure cause. + If GFJxDecStart() succeeded, GFJxDecEnd() must be called later. + + @param hJxDec Handle to JxDecAPI + @param pStart Pointer to #GFJXDECSTART parameter structure. + + @retval GF_SUCCESS Success + @retval GFRM_ERROR_OUT_MEMORY Not enough free GPU or system memory + @retval GF_JXDEC_NOT_SUPPORT_DESTSURFACE_FORMAT Destination Surface format not supported by the decoder + @retval GF_JXDEC_DECODER_WIDTH_TOO_BIG Image source width exceeds max decoder width + @retval GF_JXDEC_DECODER_HEIGHT_TOO_BIG Image source height exceeds max decoder height + + @see GFJXDECSTART, GFJxDecSetAttribute(),GFJxDecEnd() +*/ +GF_RETTYPE GFJxDecStart(GFJxDecHandle hJxDec, PGFJXDECSTART pStart); + +/** Decode the image + @param hJxDec Handle to JxDecAPI + @param uiFlag Reserved, must be 0. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @see GFJxDecGetImageInfo(), GFJxDecStart(), GFJxDecSetAttribute(), GFJxDecEnd() + +*/ +GF_RETTYPE GFJxDecDecodeImage(GFJxDecHandle hJxDec, NvU32 uiFlag); + +/** End or cancel decoding a frame. + Must be called only, if GFJxDecStart() has been called before. + @param hJxDec Handle to JxDecAPI +*/ +GF_RETTYPE GFJxDecEnd(GFJxDecHandle hJxDec); + + +/** GFJxDecAPI Error Codes. */ +enum +{ + /** GFJxDecAPI API called with invalid parameters. */ + GFJXD_ERROR_INVALID_PARAMETER = GFJXD_ERROR, + + /** Operation not supported. */ + GFJXD_ERROR_NOT_SUPPORTED, + + /** Encountered incomplete bitstream during decoding. */ + GFJXD_ERROR_INCOMPLETE_BITSTREAM, + + /** GFJxDecStart() return code: Can't support this destination surface type. + @see GFJXDECSTART, GFJxDecStart() + */ + GF_JXDEC_NOT_SUPPORT_DESTSURFACE_FORMAT, + + /** GFJxDecStart() return code: Image width is too big for hardware decoder to handle + @see GFJXDECSTART, GFJxDecStart() + */ + GF_JXDEC_DECODER_WIDTH_TOO_BIG, + + /** GFJxDecStart() return code: Image height is too big for hardware decoder to handle + @see GFJXDECSTART, GFJxDecStart() + */ + GF_JXDEC_DECODER_HEIGHT_TOO_BIG, + + /** GFJxDecGetImageInfo() return code: If set then the input marker is Invalid, + if unset its a valid marker. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_MARKER, + + /** GFJxDecGetImageInfo() return code: If set then the Header Length is Invalid, + if unset its a valid header length. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_HDR_LEN, + + /** GFJxDecGetImageInfo() return code: If set then the Signature(eg: JFIF, AVI, ..) is Invalid, + if unset its a valid signature. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_SIG, + + /** GFJxDecGetImageInfo() return code: If set then the there occured an error in reading the Quantization Table, + if unset the Quantization Table was read clean. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_DQT, + + /** GFJxDecGetImageInfo() return code: If set then the Huffman Tables were not loaded properly + if unset Huffman Tables were loaded. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_DHT, + + /** GFJxDecGetImageInfo() return code: If set then there was an invalid value(eg : erroneous/incomplete bitstream) in the stream, + if unset its a valid Iflag. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_VALUE, + + /** GFJxDecGetImageInfo() return code: If set then the progressive marker not supported, + if unset its a valid marker. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + + GF_JXDEC_IFLAG_PROGRESSIVE_MARKER, + /** GFJxDecGetImageInfo() return code: If set then there was an invalid header format encountered in the stream, + if unset its a valid Iflag. + @see GFJXDECIMAGEINFO, GFJxDecGetImageInfo() + */ + GF_JXDEC_IFLAG_INVALID_FORMAT +}; + + +/** @page pageJxDecAppNotes JxDecAPI Application Notes + @section pageJxDecAppNotes Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start GFSDK usage. + -# Call GFJxDecOpen() to obtain JxDecHandle which will be passed to different functions of JxDecAPI. + -# Query the properties through GFJxDecGetProperty() to check whether the desired JxDec features can be supported. + -# Call GFRmSurfaceAlloc() to allocate one surface to hold the decoded image. + -# Register the call back function using GFJxDecSet() + -# Call GFJxDecGetImageInfo() to get the JPEG image information, such as width and height. + -# GFJxDecStart() is the next function to call. This function will setup the decoder. + -# Call GFJxDecDecodeImage() to do the real decoding. + -# After the whole bitstream has been fed, call GFJxDecEnd() to end the decoding process. + -# Release surface by calling GFRmSurfaceFree(). + -# Release JPEG decoder by calling GFJxDecClose(). +*/ + +/*@}*/ + +#ifdef __cplusplus +} +#endif +#endif + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFJxEnc.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFJxEnc.h new file mode 100755 index 00000000..c5170b44 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFJxEnc.h @@ -0,0 +1,1306 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFJxEnc.h + GFSDK JPEG Encode API header file. +*/ + +#ifndef _GF_JPEG_ENC__ +#define _GF_JPEG_ENC__ + +#include "GF.h" +#include "GFRm.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupJxEnc JxEncAPI JPEG Encoder API +
        +
      • @ref pageJxEncAppNotes +
          +
        • @ref pageJxEncAppNotes1 +
        +
      +*/ +/*@{*/ + +/** JxEncAPI property flag: JPEG quantization table is programmable. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_QTABLE 0x00000001 + +/** JxEncAPI property flag: Interrupt data capture mode and polling mode + supported, if this flag is off then only polling mode is supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_INTERRUPT 0x00000004 + +/** JxEncAPI property flag: Digital zoom supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_DIGITAL_ZOOM 0x00000008 + +/** JxEncAPI property flag: Motion JPEG mode supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_MOTION_JPEG 0x00000010 + +/** JxEncAPI property flag: Rate control supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_RATE_CONTROL 0x00000020 + +/** JxEncAPI property flag: Planar YUV422 data supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_422_PLANAR 0x00000040 + +/** JxEncAPI property flag: Rotation supported. + @see GFJxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_JX_ENC_CAP_ROTATION 0x00000080 + + +/** Image source/target dimensions and data source for JPEG encoding. + + This structure is passed as parameter to GFJxEncStart() and describes + data source, source cropping rectangle and destination image size. + + The surface the application wants to encode is pSrcSurf. If the application + wants to encode an image from a camera or to re-encode a JPEG bitstream, + this field should be set to NULL. If the application wants to encode an + image from the display, this field should point to the primary surface. If + an application wants to encode an existing image, it must create a system + memory surface to hold the image and set this field to the system memory + surface. + + @see GFJxEncStart() +*/ +typedef struct _GFJXENCSTART +{ + PGFRMSURFACE pSrcSurf;/**< Surface to encode, + NULL for camera or re-encode JPEG + */ + PGFRECT pSrcRect; /**< Source image area need to encode */ + NvU32 DestWidth; /**< Final encoded image width */ + NvU32 DestHeight; /**< Final encode image height */ + NvU32 uiOptions; /**< Bitmask of flags to control encoding + + + + + + + +
      #GF_CAPT_BITSTREAM If set only bitstream is output, if + unset JFIF header will be added
      #GF_CAPT_PIECE_MEALPiecemeal encoding @todo clarify + meaning
      + */ + NvU32 Error; /**< Returns detailed error code on GFJxEncStart() failure + + + + + + + +
      #GF_CAPT_ERROR_VIDEO_MEMORY_NOT_BIG_ENOUGHNot enough free video memory, try to release + unnecessary video surfaces
      #GF_CAPT_ERROR_WRONG_CONFIGWrong input parameters, for example srcRect + size greater than pSrcSurf dimensions
      #GF_CAPT_ERROR_NO_CALLBACKNo callback function available
      + */ +} GFJXENCSTART, *PGFJXENCSTART; + +/** JxEncAPI GFJXENCSTART::uiOptions flagbit: If set only bitstream is output, + if unset JFIF header will be added. + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_BITSTREAM 1 + +/** JxEncAPI GFJXENCSTART::uiOptions flagbit: Piecemeal encoding + @todo clarify meaning + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_PIECE_MEAL 2 + +/** JxEncAPI GFJXENCSTART::Error return code: Not enough free video memory. + Try to release unnecessary video surfaces. + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_ERROR_VIDEO_MEMORY_NOT_BIG_ENOUGH 1 + +/** JxEncAPI GFJXENCSTART::Error return code: Wrong input parameters. + E.g. srcRect size greater than pSrcSurf dimensions. + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_ERROR_WRONG_CONFIG 2 + +/** JxEncAPI GFJXENCSTART::Error return code: No callback function available. + @todo clarify + @see GFJXENCSTART, GFJxEncStart() +*/ +#define GF_CAPT_ERROR_NO_CALLBACK 4 + +/** Descriptor for JPEG encode buffers. + This structure describes a buffer and its fill status for encoded + JPEG data or raw YUV transfered from the JPEG encoder to the + application. It is used with GFJxEncCapture() and GFJxEncFetchImage() + in either polling or callback data fetch mode. + + @see GFJxEncCapture(), GFJxEncFetchImage(), GFJxEncPRComplete() +*/ +typedef struct _GFJXENC_BUF { + NvU8 *pBuf; /**< Pointer to the buffer */ + NvU32 bufSize; /**< Size of the buffer in bytes */ + NvU32 nBytesCaptured; /**< Number of bytes captured, + app initializes to 0 + */ +} GFJXENC_BUF, *PGFJXENC_BUF; + +/** Fetch buffer descriptor for use with GFJxEncFetchImage(). + This data structure is used by GFJxEncInterruptHandler() to fetch encoded + image data when IntType is GFJX_ENC_STREAM_BUF_INTR or GFJX_ENC_DONE_INTR. +*/ +typedef struct _GFJXENC_FETCH_BUF{ + PGFJXENC_BUF pBuf; + NvU32 numOfBuf; + NvU32 status; +} GFJXENC_FETCH_BUF, *PGFJXENC_FETCH_BUF; + + +/** JxEncAPI data fetch status code: All data of the current frame was fetched. + @see GFJxEncFetchImage(), GFJxEncCapture() +*/ +#define JXENC_DATA_COMPLETE 0x1 + +/** JxEncAPI data fetch status code: Data was fetched only partially. + The application should make more calls to GFJxEncFetchImage() to fetch + the rest. + @see GFJxEncFetchImage(), GFJxEncCapture() +*/ +#define JXENC_MORE_FETCH 0x2 + +/** JxEncAPI data fetch status code: New frame was encoded and is ready to + fetch. + @see GFJxEncFetchImage(), GFJxEncCapture() +*/ +#define JXENC_NEW_FRAME 0x8 + +/** JxEncAPI data fetch status code: Time out error occured while encoded data is fetching. + fetch. + @see GFJxEncFetchImage(), GFJxEncCapture() +*/ +#define JXENC_TIME_OUT 0x10 + +// definition of uiFeature for GFJxEncSetAttribute +//the following definations are for set only + +/** JxEncAPI attribute: Choose preset QTable, coefficients in luma and chroma + Qtable are all 1. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_100QUALITY 0 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable A and B, + divided by 2. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_85QUALITY 1 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable A and B. + + Interpretation of associated data block: None. + + Attribute is set-only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_75QUALITY 2 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable C and D. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_50QUALITY 3 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable C and D, + multiplied by 2. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_25QUALITY 4 + +/** JxEncAPI attribute: Choose preset QTable, standard Qtable C and D, + multiplied by 4. + + Interpretation of associated data block: None. + + Attribute is set-only. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_SET_12QUALITY 5 + +//the following definations can be used for set and get + +/** JxEncAPI attribute: Set custom luma QTable. + + Interpretation of associated data block: + A table of 64 16-bit (type NvU16) entries with quantization coefficients + to be used for luma MCU's. + + Attribute can be set and get. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_LQTABLE 6 + +/** JxEncAPI attribute: Set custom chroma QTable. + + Interpretation of associated data block: + A table of 64 16-bit (type NvU16) entries with quantization coefficients + to be used for chroma MCU's. + + Attribute can be set and get. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_CQTABLE 7 + +/** JxEncAPI attribute: Decimation filter enable/disable. + + Interpretation of associated data block: + 
      +    NvU32 decimation enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_FILTER 8 + +/** JxEncAPI attribute: Huffman bit stuffing. + + Interpretation of associated data block: + 
      +    NvU32 Huffman stuffing enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_HUFF_BSTUFF 13 + +/** JxEncAPI attribute: Motion JPEG capturing mode enable/disable. + + Interpretation of associated data block: + 
      +    NvU32 Motion JPEG capturing mode enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_MOTION_JPEG 14 + +/** JxEncAPI attribute: Raw data capturing mode enable/disable. + + Interpretation of associated data block: + 
      +    NvU32 Raw data capturing mode enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_RAW_DATA 15 + +/** JxEncAPI attribute: Re-encode a JPEG bitstream. + + Registration of callback function for JPEG re-encode application: + 
      +    #PGFJXDECCALLBACK structure
+
      + + Attribute is set only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_BITSTREAM 16 + +/** JxEncAPI attribute: JPEG encoding colour format. + + Only YUV420 and YUV422 encoding is supported. The JPEG encoder converts + the incoming image to the configured colour format, and then encodes it + in the JPEG bitstream. + + Only YUV420 and YUV422 are + valid. + + Interpretation of associated data block: + 
      +    NvU32 Colour format identifier, one of:
+          #GF_SURFACE_PLANAR_YUV422
+          #GF_SURFACE_YUV420
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute(), GFRMSURFACE::ColorFormat +*/ +#define JX_ENC_ENCODE_FORMAT 17 + +/** JxEncAPI attribute: Maximum JPEG byte size. + + The JPEG encoder will not generate a JPEG bitstream larger than this. + + Interpretation of associated data block: + 
      +    NvU32 Maximum size in bytes
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_MAX_SIZE 18 + +/** JxEncAPI attribute: Camera focal point. + + Image area which is close to the focal point will be encoded with higher + quality. Takes effect only when #JX_ENC_MAX_SIZE is set. + + Interpretation of associated data block: + 
      +    NvU32 Focal point X position
+    NvU32 Focal point Y position
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute(), #JX_ENC_DEGRADATION, + #JX_ENC_MAX_SIZE +*/ +#define JX_ENC_FOCAL_POINT 19 + +/** JxEncAPI attribute: Image quality degradation from focal point. + + Image areas further from the focal point get encoded with fewer bits. + The number of bits is linearly degraded based on the percentage of + degradation in the X and Y directions. This attribute takes effect only + when JX_ENC_MAX_SIZE is set. + + Interpretation of associated data block: + 
      +    NvU32 X direction degradation percentage
+    NvU32 Y direction degradation percentage
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute(), #JX_ENC_FOCAL_POINT, + #JX_ENC_MAX_SIZE +*/ +#define JX_ENC_DEGRADATION 20 + +/** JxEncAPI attribute: JPEG encode rotation and flip control. + + Interpretation of associated data block: + 
      +    NvU32 Rotation and flip control, one of the following constants
+            #JX_ENC_ROTATE_0
+            #JX_ENC_ROTATE_90
+            #JX_ENC_ROTATE_180
+            #JX_ENC_ROTATE_270
+          optionally logically ORed with zero or more of the following flags
+            #JX_ENC_H_FLIP
+            #JX_ENC_V_FLIP
+
      + + Default is #JX_ENC_ROTATE_0. + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATION 21 + +/** JxEncAPI attribute: Rotation and flip control for rartial rotation API. + + Enables and configures the partial rotation engine for partially rotated + JPEG encoding. Partially rotated JPEG encoding allows for rotated encoding + of large image sizes with a small image capture buffer. + + Interpretation of associated data block: + 
      +    NvU32 Rotation and flip control, one of the following constants
+            #JX_PRENC_ROTATE_UNSET - reset and disable partial rotation engine
+            #JX_ENC_ROTATE_0
+            #JX_ENC_ROTATE_90
+            #JX_ENC_ROTATE_180
+            #JX_ENC_ROTATE_270
+          if not #JX_PRENC_ROTATE_UNSET optionally logically ORed with zero or
+          more of the following flags
+            #JX_ENC_H_FLIP
+            #JX_ENC_V_FLIP
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_PARTIAL_ROTATE 22 + +/** JxEncAPI attribute: Bypass FIFO. + + Interpretation of associated data block: + 
      +    NvU32 Raw data capturing mode enable
+          0 = Fetching encoded data through DMA FIFO
+          1 = Fetching encoded data directly through output buffer not through
+              DMA FIFO
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_BYPASS_FIFO 23 + +/** JxEncAPI attribute: Piece-Meal encoding. + + Interpretation of associated data block: + 
      +    NvU32 Piece-Meal encoding enable
+          0 = enable
+          1 = disable
+
      + + Attribute is get only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_PIECE_MEAL 24 + +/** JxEncAPI attribute: Fetch Low bitstream. + + Registration of callback function for fetching raw data stream from JPEG encoder: + 
      +    #PGFJXDECCALLBACK structure
+
      + + Attribute is set only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ + +#define JX_ENC_RAW_DATA_STREAM 25 + +/** JxEncAPI attribute: Fetch Low JPEG bitstream. + + Registration of callback function for fetching JPEG raw data stream from JPEG encoder: + 
      +    #PGFJXDECCALLBACK structure
+
      + + Attribute is set only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ + +#define JX_ENC_RAW_JPEG_CAPTURE 26 + +/** JxEncAPI attribute: Set Timeout value + + + Interpretation of associated data block: + 
      +    NvU32 timeout   timeout value
+        0       = no timeout
+        > 0     = timeout value
+
      + + Attribute is set only. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ + +#define JX_ENC_TIMEOUT_CONF 27 + +/** JxEncAPI attribute: Stop preview enable/disable. + + Interpretation of associated data block: + 
      +    NvU32 Stop preview mode enable
+          0 = disable
+          1 = enable
+
      + + Attribute can be set and get. + @see GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ + +#define JX_ENC_STOP_PREVIEW 28 + + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + Non-rotated JPEG encode. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ + +#define JX_ENC_ROTATE_0 0x0 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode rotated 90 degrees. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATE_90 0x1 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode rotated 180 degrees. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATE_180 0x2 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode rotated 270 degrees. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATE_270 0x3 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode horizontally flipped. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_H_FLIP 0x10 + +/** Option for attributes #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE: + JPEG encode vertically flipped. + @see #JX_ENC_ROTATION, #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), + GFJxEncGetAttribute() +*/ +#define JX_ENC_V_FLIP 0x20 + +/** Option for attribute #JX_ENC_PARTIAL_ROTATE: Reset and disable partial + rotation. + Pass this to GFJxEncSetAttribute() for attribute #JX_ENC_PARTIAL_ROTATE + to unset the Partial Rotation Flag and reset the PR Engine. + @see #JX_ENC_PARTIAL_ROTATE, GFJxEncSetAttribute(), GFJxEncGetAttribute() +*/ +#define JX_ENC_ROTATE_UNSET 0xff + +typedef void (*GFJX_ENC_CALLBACK)(void *userData); + +/** JxEncAPI interrupt operation types. + Constants to specify operation for a call to GFJxEncInterruptControl(). + @see GFJX_ENC_INTERRUPT_TYPE, GFJxEncInterruptControl() +*/ +typedef enum +{ + /** Enable interrupt/status assertion for an interrupt type. */ + GFJX_ENC_INTERRUPT_ENABLE, + + /** Disable interrupt/status assertion for an interrupt type. */ + GFJX_ENC_INTERRUPT_DISABLE, + + /** Clear interrupt/status assertion for an interrupt type. */ + GFJX_ENC_INTERRUPT_CLEAR, + + /** Query for interrupt/status assertion for an interrupt type. */ + GFJX_ENC_INTERRUPT_QUERY_STATUS, + + /** Set DMA FIFO threshold. */ + GFJX_ENC_INTERRUPT_SET_DMA_FIFO_THRESHOLD, + + /** Get DMA FIFO threshold. */ + GFJX_ENC_INTERRUPT_GET_DMA_FIFO_THRESHOLD, + + /** Set strean buffer threshold. */ + GFJX_ENC_INTERRUPT_SET_BUF_THRESHOLD, + + /** Get strean buffer threshold. */ + GFJX_ENC_INTERRUPT_GET_BUF_THRESHOLD + +} GFJX_ENC_INTERRUPT_OPERATION_TYPE; + + +/** JxEncAPI interrupt types. + @see GFJX_ENC_INTERRUPT_OPERATION_TYPE, GFJxEncInterruptControl() +*/ +typedef enum +{ + /** JPEG read DMA FIFO low threshold. + Interrupt/status is asserted if the JPEG read DMA FIFO status is less + than the JPEG read DMA FIFO threshold value. + */ + GFJX_ENC_DMA_FIFO_LOW_INTR = 0, + + /** JPEG read DMA FIFO high threshold. + Interrupt/status is asserted if the JPEG read DMA FIFO status is + greater than or equal to the JPEG read DMA FIFO threshold value. + */ + GFJX_ENC_DMA_FIFO_HIGH_INTR = 0x1, + + /** Stream buffer threshold interrupt. */ + GFJX_ENC_STREAM_BUF_INTR = 0x2, + + /** Main buffer end hit interrupt. */ + GFJX_ENC_MAIN_BUF_HIT_INTR = 0x4, + + /** Encoding done interrupt. */ + GFJX_ENC_DONE_INTR = 0x8, + + /** Encoded stream transfer done interrupt. */ + GFJX_ENC_TRANSFER_DONE_INTR = 0x10, + + /** Maximum bit count hit interrupt. */ + GFJX_ENC_MAX_BIT_HIT_INTR = 0x20, + + /** Circular buffer overflow interrupt. */ + GFJX_ENC_CIR_BUF_OVERFLOW_INTR = 0x40 + +} GFJX_ENC_INTERRUPT_TYPE; + +/** JxEncAPI virtual function pointer table. */ +typedef struct _GFJXENCTABLE +{ + GF_RETTYPE (* JxEncGetProperty)(GFJxEncHandle hJxEnc, PGFPROPERTY pJXProp); + GF_RETTYPE (* JxEncSetAttribute)(GFJxEncHandle hJxEnc, + NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* JxEncGetAttribute)(GFJxEncHandle hJxEnc, + NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* JxEncStart)(GFJxEncHandle hJxEnc, PGFJXENCSTART pStart); + GF_RETTYPE (* JxEncFetchImage)(GFJxEncHandle hJxEnc, + PGFJXENC_BUF aBuf, NvU32 nBuf, NvU32 *pStatus); + GF_RETTYPE (* JxEncEnd)(GFJxEncHandle hJxEnc); + GF_RETTYPE (* JxEncSetupInterrupt)(GFJxEncHandle hJxEnc, + void (*Inter)(void *), void *IPara); + GF_RETTYPE (* JxEncCapture)(GFJxEncHandle hJxEnc, + PGFJXENC_BUF aBuf, NvU32 nBuf, NvU32 *pStatus); + GF_RETTYPE (* JxEncInterruptControl)(GFJxEncHandle hJxEnc, + GFJX_ENC_INTERRUPT_TYPE IntType, GFJX_ENC_INTERRUPT_OPERATION_TYPE op, + void * pData); + GF_RETTYPE (* JxEncInterruptHandler)(GFJxEncHandle hJxEnc, + GFJX_ENC_INTERRUPT_TYPE IntType, void * pData); // Reserved. + GF_RETTYPE (*JxEncPRComplete)(GFJxEncHandle hJxEnc, + PGFJXENC_BUF inBuf,NvU32 inBufNum,PGFJXENC_BUF outBuf, + NvU32 outBufNum,PGFJXENC_BUF dcacBuf,NvU32 dcacBufNum); + GF_RETTYPE (*JxEncBracket)(GFJxEncHandle hJxEnc, + GFJX_ENC_CALLBACK before, + GFJX_ENC_CALLBACK after, + void *userData); +} GFJXENCTABLE, *PGFJXENCTABLE; + +#ifdef PROJECT_SEC_G1 +// Attribute constant and data structure for EXIF +#define JX_ENC_SET_EXIF_INFO 30 + +typedef struct _GFJXENCEXIFINFO +{ + NvS8 CameraMaker[32]; + NvS8 CameraModel[40]; + NvS8 FirmwareVersion[5]; + NvU32 FNumberNum; + NvU32 FNumberDenom; + NvS32 ExpBiasNum; + NvS32 ExpBiasDenom; + NvU16 WhiteBalance; + NvU32 DigitalZoomNum; + NvU32 DigitalZoomDenom; +} GFJXENCEXIFINFO; +#endif + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFJxEncOpen(GFRmHandle hRm, GFJxEncHandle *phJxEnc, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFJxEncClose(GFJxEncHandle *phJxEnc); + +/* #### JxEnc Helper macros. Maybe useful for backward compatible API. #### */ + +/** @name Functions +@{*/ + +/** This function returns version and capabilities of API and hardware. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param pJXProp (PGFPROPERTY) Pointer to property structure to be filled in + + @retval #GF_SUCCESS \a pJXProp filled in successfully + @retval #GF_ERROR Some error occured + + The #GFPROPERTY structure passed with parameter \a pJXProp will be + filled in on successfull return. The GFPROPERTY::Capability field + will hold a combination of flagbits indicating capabilities specific + to the JxEncAPI: + + + + + + + + + + + + + + + + +
      #GF_JX_ENC_CAP_QTABLE JPEG quantization table is programmable.
      #GF_JX_ENC_CAP_INTERRUPT Interrupt data capture mode and polling mode supported, + if this flag is off then only polling mode is supported.
      #GF_JX_ENC_CAP_DIGITAL_ZOOMDigital zoom supported.
      #GF_JX_ENC_CAP_MOTION_JPEG Motion JPEG mode supported.
      #GF_JX_ENC_CAP_RATE_CONTROLRate control supported.
      #GF_JX_ENC_CAP_422_PLANAR Planar YUV422 data supported.
      #GF_JX_ENC_CAP_ROTATION Rotation supported.
      + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the JxEncAPI functions. + + @see GFPROPERTY +*/ +#define GFJxEncGetProperty(hJxEnc, pJXProp) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncGetProperty(hJxEnc, pJXProp) + +/** Set configuration of a feature of the JPEG encoder hardware. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param uiFeature (NvU32) Feature type identifier, see table. + @param pInfo (NvU32*) Pointer to feature specific input parameter block. + Pointer type will be reinterpreted according to + feature type. + + @retval #GF_SUCCESS Configuration changed successfully + @retval #GF_ERROR Some error occured + + The feature to be set is identified with parameter \a uiFeature, + specific input parameters are passed via a block in parameter \a pInfo. + The contents of this data block is interpreted depending on the + feature to be set. + + The following features are defined, for the data to be provided in + \a pInfo see the individual attribute's documentation. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      \b Attribute \b Direction \b Synopsis
      #JX_ENC_SET_100QUALITYset Choose preset QTable, coefficients in luma + and chroma Qtable are all 1.
      #JX_ENC_SET_85QUALITY set Choose preset QTable, standard Qtable A and B, + divided by 2.
      #JX_ENC_SET_75QUALITY set Choose preset QTable, standard Qtable A and B.
      #JX_ENC_SET_50QUALITY set Choose preset QTable, standard Qtable C and D.
      #JX_ENC_SET_25QUALITY set Choose preset QTable, standard Qtable C and D, + multiplied by 2.
      #JX_ENC_SET_12QUALITY set Choose preset QTable, standard Qtable C and D, + multiplied by 4.
      #JX_ENC_LQTABLE set, getSet custom luma QTable.
      #JX_ENC_CQTABLE set, getSet custom chroma QTable.
      #JX_ENC_FILTER set, getDecimation filter enable/disable.
      #JX_ENC_HUFF_BSTUFF set, getHuffman bit stuffing.
      #JX_ENC_MOTION_JPEG set, getMotion JPEG capturing mode enable/disable.
      #JX_ENC_RAW_DATA set, getRaw data capturing mode enable/disable.
      #JX_ENC_BITSTREAM set Re-encode a JPEG bitstream.
      #JX_ENC_ENCODE_FORMAT set, getJPEG encoding colour format.
      #JX_ENC_MAX_SIZE set, getMaximum JPEG byte size.
      #JX_ENC_FOCAL_POINT set, getCamera focal point.
      #JX_ENC_DEGRADATION set, getImage quality degradation from focal point.
      #JX_ENC_ROTATION set, getJPEG encode rotation and flip control.
      #JX_ENC_PARTIAL_ROTATEset, getRotation and flip control for Partial Rotation API.
      #JX_ENC_BYPASS_FIFO set, getBypass FIFO.
      #JX_ENC_PIECE_MEAL get Piece-Meal encoding.
      #JX_ENC_STOP_PREVIEW set, getStop preview mode enable/disable.
      #JX_ENC_RAW_JPEG_CAPTURE set Fetch Low JPEG bitstream.
      #JX_ENC_RAW_DATA_STREAM set Fetch Low bitstream.
      #JX_ENC_TIMEOUT_CONF set, getSet Timeout value.
      + + Most of the time an application should only set a quantization table for + luminance or chrominance. These quantization tables are in the same format + as standard quantization tables (1 to 255). Other features are hardware + dependent. + + @see GFJxEncGetAttribute() +*/ +#define GFJxEncSetAttribute(hJxEnc, uiFeature, pInfo) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncSetAttribute(hJxEnc, uiFeature, pInfo) + +/** Get current configuration of a feature of the JPEG encoder hardware. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param uiFeature (NvU32) Feature type identifier, + see table in GFJxEncSetAttribute(). + @param pInfo (NvU32*) Pointer to feature specific input parameter block. + Pointer type will be reinterpreted according to + feature type. + + @retval #GF_SUCCESS \a pInfo filled in successfully + @retval #GF_ERROR Some error occured + + @see GFJxEncSetAttribute() +*/ +#define GFJxEncGetAttribute(hJxEnc, uiFeature, pInfo) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncGetAttribute(hJxEnc, uiFeature, pInfo) + +/** Setup JxEncAPI for JPEG encoding. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param pStart (#PGFJXENCSTART) Pointer to #GFJXENCSTART structure for + definition of encode source and destination + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured, check GFJXENCSTART::Error for + detailed error reason code. + + Before starting capture, the application should call this function to setup + the encoder. Once this function has been called, the application can use + GFJxEncCapture() to capture as many frames as desired. JxEncCapture() + starts and optionally fetches data for a frame. JxEncFetchImageData() + fetches the image data to host CPU side. An application should keep calling + it until all encoded data is processed. Finally GFJxEncEnd() has to be + called to release the encoder. + + Parameter \a pStart passes a #GFJXENCSTART structure describing image data + source, source cropping area, and destination size. + + Encoding is from one of the following sources: + - VI (Camera, cropping and scale up/down is done via VxVIPSet(), + Rotation/flip is done via JxEncSelectEPPRotation() ) + - Screen encoding (GC, source is primary surface) + - Bitstream encoding. This is used to re-encode a JPEG bit stream, and + invokes JxDecAPI internally to decode the existing bitstream. + The following options are available for bitstream re-encoding: + - Crop image size + - Scale up + - Change QTables + - Apply rate control + - Rotation (0, 90, 180, 270, H-Flip, V-Flip) + + On failure an error reason code is returned in field GFJXENCSTART::Error of + parameter \a pStart. + + @see GFJXENCSTART, GFJxEncSetAttribute(), GFJxEncCapture(), + GFJxEncFetchImage(), GFJxEncEnd() +*/ +#define GFJxEncStart(hJxEnc, pStart) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncStart(hJxEnc, pStart) + +/** Polls JxEncAPI for data fetch from JPEG encoder. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param aBuf (#PGFJXENC_BUF) Pointer to array of #GFJXENC_BUF structures + @param nBuf (NvU32) Number of pointers passed with \a aBuf. + @param pStatus (NvU32) Returns data fetch status, see table + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Captures the JPEG encoded bit stream in the given application owned + buffers. Capturing the encoded image can be done in polling or interrupt + mode. This function should be called after GFJxEncCapture(). It is usually + called from either the application's fetching poll loop, or the interrupt + callback routine set up with GFJxEncSetupInterrupt(). + + The application must fill all the fields in the referenced buffer + structures and must make sure each PGFJXENC_BUF::nBytesCaptured is set + to 0. The PGFJXENC_BUF::nBytesCaptured field is updated by the JXEncAPI + to show the actual number of bytes captured. JXEncAPI keeps filling the + buffers in the array until it exhausts all the buffers. If all the buffers + are exhausted and there is more data to be copied, the function returns + and sets \a pStatus to #JXENC_MORE_FETCH. The application should then keep + calling GFJxEncFetchImage() to fetch the remaining data. Each buffer in + the array should be a multiple of 64 bytes for best performance. + + The status of the data fetch is returned in \a pStatus as one of the + following reason codes: + + + + + + +
      #JXENC_DATA_COMPLETEAll data of the current frame was + fetched.
      #JXENC_MORE_FETCH Data was fetched only partially. + The application should make more calls to GFJxEncFetchImage() to + fetch the rest.
      #JXENC_NEW_FRAME A new frame was encoded and is ready + to fetch.
      #JXENC_TIME_OUT Timeout on GFJxEncFetchImage +
      + + @see GFJxEncCapture(), GFJxEncSetupInterrupt(), #GFJXENC_BUF +*/ +#define GFJxEncFetchImage(hJxEnc, aBuf, nBuf, pStatus) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncFetchImage(hJxEnc, aBuf, nBuf, pStatus) + +/** Polls JxEncAPI for data fetch from JPEG encoder. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function disables the encoder and releases internal resources related + to the current capture. + + @see GFJxEncStart() +*/ +#define GFJxEncEnd(hJxEnc) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncEnd(hJxEnc) + +/** Register a callback function for fetching encoded JPEG data. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param Inter (void(*)(void *)) Application callback function pointer + @param IPara (void*) Parameter to pass on to application callback function + + @retval #GF_SUCCESS Callback installed successfully + @retval #GF_ERROR Some error occured + + This function can be used to register a callback function for fetching + encoded JPEG data. This function must be called before GFJxEncCapture(). + The callback function must meet the following prototype: + + 
      +    void InterruptCallback(void* lPara);
+
      + + Whenever encoding is triggered, JXEncAPI calls the registered interrupt + callback function, passing on the application defined parameter \a IPara. + + Inside the callback function, the application can call GFJxEncFetchImage() + to portionally fetch the encoded datastream. + + If no callback function shall be used, the application could alternatively + use a polling scheme. + + @see GFJxEncCapture() +*/ +#define GFJxEncSetupInterrupt(hJxEnc, Inter, IPara) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncSetupInterrupt(hJxEnc, Inter, IPara) + +/** Trigger JPEG encoder for one frame and optionally display capture preview. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param aBuf (#PGFJXENC_BUF) Pointer to array #GFJXENC_BUF structures + @param nBuf (NvU32) Number of pointers passed with \a aBuf, if + passing 0 then the function is non-blocking + @param pStatus (NvU32) Returns data fetch status, for reason codes + see table at GFJxEncFetchImage() + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + Triggers the JPEG encoder for a frame and optionally displays the same + frame in a preview window in decimated form. + + Encoded data can be fetched via a polling scheme or via an interrupt + handler set up with GFJxEncSetupInterrupt(). In any case + GFJxEncFetchImage() is used to transfer encoded data to application + buffers. + + If application set up an interrupt handler to fetch encoded data, then + \a nBuf should be passed as 0. + + This function can optionally fetch data right after triggering encoding to + buffers provided via \a aBuf. This will block the CPU until all data is + returned or buffer space is exhausted. If \a nBuf is 0, the function + returns right away and \a pStatus is updated to #JXENC_NEW_FRAME to + indicate data is pending. The application should then call + GFJxEncFetchImage() either from an interrupt handler or from same thread to + fetch the encoded/raw data. + + If \a nBuf is not 0, it specifies the number of buffers in the array + \a aBuf. The function will block until it runs out of buffers. It + will return #JXENC_MORE_FETCH in parameter \a pStatus if more data is + available. The application must call GFJxEncFetchImage() to fetch the + remaining data. See GFJxEncFetchImage() for information on return + status codes and how the passed buffers are handled. + + JPEG Encoding from camera or raw data capture from camera happens in + realtime, so if the internal circular buffer in GPU memory is not big + enough then GFJxEncFetchImage() should be called more fequently to empty + the outputBuf and avoid buffer overflows. + + @see GFJxEncSetupInterrupt(), GFJxEncFetchImage(), #GFJXENC_BUF +*/ +#define GFJxEncCapture(hJxEnc, aBuf, nBuf, pStatus) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncCapture(hJxEnc, aBuf, nBuf, pStatus) + +/** JxEncAPI Component-level interrupt control. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param IntType (#GFJX_ENC_INTERRUPT_TYPE) JxEncAPI interrupt type + @param op (#GFJX_ENC_INTERRUPT_OPERATION_TYPE) GFJxEncAPI interrupt + operation + @param pData (void*) Pointer to input or output data block, see table + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GF_ERROR_BAD_PARAMETER Invalid parameters + + The following operations (parameter op) are defined for this call. + + Operation #GFJX_ENC_INTERRUPT_ENABLE + + Enable status/interrupt generation for interrupts of type specified by + \a IntType. + + Depending on the interrupt type additional action and the parameter + \a pData is interpreted as following: + + + + + + + + + + + + + + + + + +
      #GFJX_ENC_DMA_FIFO_LOW_INTR JPEG read DMA FIFO status/interrupt generation is put into low + threshold mode, i.e. interrupt/status is asserted if the JPEG + read DMA FIFO status is less than the threshold value. + + \a pData points to block containing:
      + NvU32 DMA FIFO low threshold value in range 0..15 + + \a pData can be NULL to leave the threshold value unchanged. +
      #GFJX_ENC_DMA_FIFO_HIGH_INTRJPEG read DMA FIFO status/interrupt generation is put into + high threshold mode, i.e. interrupt/status is asserted if the + JPEG read DMA FIFO status is greater than or equal toless than + the threshold value. + + \a pData points to block containing:
      + NvU32 DMA FIFO high threshold value in range 0..15 + + \a pData can be NULL to leave the threshold value unchanged. +
      #GFJX_ENC_STREAM_BUF_INTR \a pData points to block containing:
      + NvU32 JPEG stream buffer threshold value in bytes, must + be multiple of 8 + + \a pData can be NULL to leave the threshold value unchanged. +
      otherwise\a pData is ignored
      + + Operation #GFJX_ENC_INTERRUPT_DISABLE + + Disable status/interrupt generation for interrupts of type specified by + \a IntType. + + Operation #GFJX_ENC_INTERRUPT_CLEAR + + Clear status/interrupt assertion for interrupt of type specified by + \a IntType. + + Operation #GFJX_ENC_INTERRUPT_QUERY_STATUS + + Return current status/interrupt assertion for interrupt of type + specified by \a IntType. The state is returned in the block referenced + by \a pData. + + Interpretation of associated data block \a pData + 
      +        NvU32 Interrupt/status assertion state, one of:
+              GF_INTERRUPT_ON_STATUS_TRUE = asserted
+              GF_INTERRUPT_ON_STATUS_FALSE = not asserted
+
      + + Operation #GFJX_ENC_INTERRUPT_SET_DMA_FIFO_THRESHOLD + + Set DMA FIFO threshold value that controls interrupt/status assertion + for interrupt types #GFJX_ENC_DMA_FIFO_LOW_INTR and + #GFJX_ENC_DMA_FIFO_HIGH_INTR. + + Interpretation of associated data block \a pData + 
      +        NvU32 DMA FIFO threshold value in range 0..15
+
      + + Operation #GFJX_ENC_INTERRUPT_GET_DMA_FIFO_THRESHOLD + + Return DMA FIFO threshold value that controls interrupt/status + assertion for interrupt types #GFJX_ENC_DMA_FIFO_LOW_INTR and + #GFJX_ENC_DMA_FIFO_HIGH_INTR. + + Interpretation of associated data block \a pData + 
      +        NvU32 DMA FIFO threshold value in range 0..15
+
      + + Operation #GFJX_ENC_INTERRUPT_SET_BUF_THRESHOLD + + Set JPEG stream buffer threshold value that controls interrupt/status + assertion for interrupt type #GFJX_ENC_STREAM_BUF_INTR. + + Interpretation of associated data block \a pData + 
      +        NvU32 DMA read buffer threshold value in bytes, must be multiple of 8
+
      + + Operation #GFJX_ENC_INTERRUPT_GET_BUF_THRESHOLD + + Return JPEG stream buffer threshold value that controls + interrupt/status assertion for interrupt type + #GFJX_ENC_STREAM_BUF_INTR. + + Interpretation of associated data block \a pData + 
      +        NvU32 DMA read buffer threshold value in bytes, must be multiple of 8
+
      + + @see GFJX_ENC_INTERRUPT_TYPE, GFJX_ENC_INTERRUPT_OPERATION_TYPE +*/ +#define GFJxEncInterruptControl(hJxEnc, IntType, op, pData)\ + ((PGFJXENCTABLE)hJxEnc)->JxEncInterruptControl(hJxEnc, IntType, op, pData) + +/** Standard interrupt handler for fetching encoded JPEG data. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param IntType (#GFJX_ENC_INTERRUPT_TYPE) JxEncAPI interrupt type + @param pData (void*) Pointer to input or output data block, + depending on \a IntType. See table. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + + + +
      \a IntType Interpretation of \a pData
      #GFJX_ENC_STREAM_BUF_INTR, GFJX_ENC_DONE_INTR#PGFJXENC_FETCH_BUF
      + + Usually this callback is not used, because the interrupt service thread + at the application level can call GFJxEncFetchImage() directly to + complete the task of fetching encoded data. + + @todo clarify + @see GFJxEncFetchImage() +*/ +#define GFJxEncInterruptHandler(hJxEnc, IntType, pData)\ + ((PGFJXENCTABLE)hJxEnc)->JxEncInterruptHandler(hJxEnc, IntType, pData) + +/** Generate final JPEG bitstream from a partially rotated bitstream. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param inBuf (#PGFJXENC_BUF) Pointer to array of #GFJXENC_BUF structs + holding fragmented input bitstream + @param inBufNum (NvU32) Size of array \a inBuf + @param outBuf (#PGFJXENC_BUF) Pointer to array of #GFJXENC_BUF structs + to output fragmented JPEG bitstream + @param outBufNum (NvU32) Size of array \a outBuf + @param dcacBuf (#PGFJXENC_BUF) ? + @param dcacBufNum (NvU32) Size of array \a dcacBuf + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @todo clarify +*/ +#define GFJxEncPRComplete(hJxEnc,inBuf,inBufNum,outBuf,outBufNum,dcacBuf,dcacBufNum)\ + ((PGFJXENCTABLE)hJxEnc)->JxEncPRComplete(hJxEnc,inBuf,inBufNum,outBuf,outBufNum,dcacBuf,dcacBufNum) + +/** Provide callbacks for immediately before and after any encode events. + These will be called by JxEncode() when it is invoked. + Calling this routine a second time will overwrite previously set + values. + + @param hJxEnc (#GFJxEncHandle) Handle to JxEncAPI + @param before (#GFJX_ENC_CALLBACK) proc to call before capture + @param after (#GFJX_ENC_CALLBACK) proc to call after capture + @param userData (void *) data to be supplied to before() and + after() when they are invoked. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +#define GFJxEncBracket(hJxEnc, before, after, userData) \ + ((PGFJXENCTABLE)hJxEnc)->JxEncBracket(hJxEnc, before, after, userData) + +/*@}*/ +/*@}*/ + /** @page pageJxEncAppNotes JxEncAPI Application Notes + + @section pageJxEncAppNotes1 Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start GFSDK usage. + The description is for a typical case where encoding of a still image being captured + from a camera is done and preview shown on the display. + + 1. In case of camera encoding, setup the camera & initialize VIP.
      + + 2. Obtain the handle specific to JPEG encoder by calling GFJxEncOpen().
      + + 3. Call GFRmSurfaceAlloc() to allocate one referance surface for encoding purposes.
      + + 4. Call GFJxEncSetAttribute() if specific features need to be set, + such as encoding width, encoding height, rotation, quality factor, etc.
      + + 5. Start the encoding by calling GFJxEncStart().
      + + 6. If the current source image is from the CPU, the application should call GFJxEncFeedImage() + to feed the image to the GFJxEncAPI via GFJxEncCapture().
      + + 7. The application should fetch the encoded stream by calling GFJxEncFetchImage(). + Application should keep it calling till whole encoded data is out.
      + + 8. For exiting, free all relevent resources and call GFJxEncEnd() to free the JPEG encoder component.
      + + */ +#ifdef __cplusplus +} // only need to export C interface if + // used by C++ source code +#endif + +#endif //_GF_JPEG_ENC__ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMinimalIsp.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMinimalIsp.h new file mode 100755 index 00000000..5f5546d3 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMinimalIsp.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2007 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef __GFMINIMALISP_H_ +#define __GFMINIMALISP_H_ + +#include "GF.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +GF_RETTYPE GFMinimalIspOpen(GFRmHandle hRm, GFMinimalIspHandle *phIsp, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMinimalIspClose(GFMinimalIspHandle *phIsp); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMmProc.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMmProc.h new file mode 100755 index 00000000..1489db73 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMmProc.h @@ -0,0 +1,1766 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFMmProc.h + GFSDK Multimedia Processor API header file. +*/ + +#ifndef __GFMmProc_H__ +#define __GFMmProc_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupMmProc MmProcAPI Multimedia Processor API +*/ +/*@{*/ + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFMmProcOpen(GFRmHandle hRm, GFMmProcHandle *phMmProc, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMmProcClose(GFRmHandle hRm, GFMmProcHandle *phMmProc); + +//***************************************************************************** +//***************************************************************************** +// +// Packages +// +//***************************************************************************** +//***************************************************************************** + +// +// These defines are used to import or remove functionality within the audio +// engine. +// +//#define GFMMPROC_BASIC_AUDIO + +// +// Adds audio controls to the package beyond basic playback. +// +//#define GFMMPROC_BASIC_AUDIO + +// +// Adds advanced multimedia processing and functionality. +// +// NOTE: Currently the advanced feature set requires the basic level of audio +// support. This requirement may not be present in future revisions. +// +//#define GFMMPROC_BASIC_AUDIO +//#define GFMMPROC_ADVANCED + +// +// Adds 3D audio controls (requires GFMMPROC_ADVANCED). +// +//#define GFMMPROC_BASIC_AUDIO +//#define GFMMPROC_ADVANCED +//#define GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS + +// +// Adds advanced controls (requires GFMMPROC_ADVANCED). +// +//#define GFMMPROC_BASIC_AUDIO +//#define GFMMPROC_ADVANCED +//#define GFMMPROC_ADVANCED_CONTROLS + +// +// Adds global effect audio controls (requires GFMMPROC_ADVANCED_CONTROLS). +// +//#define GFMMPROC_BASIC_AUDIO +//#define GFMMPROC_ADVANCED +//#define GFMMPROC_ADVANCED_CONTROLS +//#define GFMMPROC_ADVANCED_AUDIO_EFFECT_CONTROLS + + +//***************************************************************************** +//***************************************************************************** +// +// Defines +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_BASIC_AUDIO || defined GFMMPROC_ADVANCED +#define GFMMPROC_TIME_UNITS_PER_SECOND 1000000 +#endif + +typedef GF_HANDLE GFMMPROC_OBJECT; + + +//***************************************************************************** +// Object +//***************************************************************************** +// +typedef struct _GFMMPROC_OBJECT_TABLE +{ + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + +} GFMMPROC_OBJECT_TABLE; + +#define GFMMPROC_OBJECT_DEFAULT_STR "Object" +#define GFMMPROC_OBJECT_MANAGER_STR "Manager" +#define GFMMPROC_OBJECT_GLOBAL_MANAGER_STR "GlobalManager" +#define GFMMPROC_OBJECT_PLAYER_STR "Player" +#define GFMMPROC_OBJECT_SOUND_SOURCE_3D_STR "SoundSource3D" +#define GFMMPROC_OBJECT_SPECTATOR_STR "Spectator" +#define GFMMPROC_OBJECT_MODULE_STR "Module" +#define GFMMPROC_OBJECT_MEDIA_PROCESSOR_STR "MediaProcessor" +#define GFMMPROC_OBJECT_CODEC_STR "Codec" + +#define GFMMPROC_CONTROL_DEFAULT_STR "Control" +#define GFMMPROC_CONTROL_MIDI_STR "MIDI" +#define GFMMPROC_CONTROL_PITCH_STR "Pitch" +#define GFMMPROC_CONTROL_RATE_STR "Rate" +#define GFMMPROC_CONTROL_RECORD_STR "Record" +#define GFMMPROC_CONTROL_STOP_TIME_STR "StopTime" +#define GFMMPROC_CONTROL_TEMPO_STR "Tempo" +#define GFMMPROC_CONTROL_TONE_STR "Tone" +#define GFMMPROC_CONTROL_VOLUME_STR "Volume" + +#define GFMMPROC_CONTROL_AUDIO_FORMAT_STR "AudioFormat" +#define GFMMPROC_CONTROL_EFFECT_STR "Effect" +#define GFMMPROC_CONTROL_EFFECT_ORDER_STR "EffectOrder" +#define GFMMPROC_CONTROL_FORMAT_STR "Format" +#define GFMMPROC_CONTROL_MIDI_CHANNEL_STR "MIDIChannel" +#define GFMMPROC_CONTROL_PAN_STR "Pan" +#define GFMMPROC_CONTROL_PRIORITY_STR "Priority" + +#define GFMMPROC_CONTROL_COMMIT_STR "Commit" +#define GFMMPROC_CONTROL_ORIENTATION_STR "Orientation" +#define GFMMPROC_CONTROL_DIRECTIVITY_STR "Directivity" +#define GFMMPROC_CONTROL_DISTANCE_ATTENUATION_STR "DistanceAttenuation" +#define GFMMPROC_CONTROL_DOPPLER_STR "Doppler" +#define GFMMPROC_CONTROL_LOCATION_STR "Location" +#define GFMMPROC_CONTROL_MACROSCOPIC_STR "Macroscopic" +#define GFMMPROC_CONTROL_OBSTRUCTION_STR "Obstruction" +#define GFMMPROC_CONTROL_3DCOEFFICIENTS_STR "3DCoefficients" + +#define GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_STR "AudioVirtualizer" +#define GFMMPROC_CONTROL_EFFECT_ACOUSTIC_ECHO_CANCELLATION_STR "AcousticEchoCancellation" +#define GFMMPROC_CONTROL_EFFECT_SBC_STR "SBC" +#define GFMMPROC_CONTROL_EFFECT_SBR_STR "SBR" +#define GFMMPROC_CONTROL_EFFECT_DRC_STR "DRC" +#define GFMMPROC_CONTROL_EFFECT_CHORUS_STR "Chorus" +#define GFMMPROC_CONTROL_EFFECT_EQUALIZER_STR "Equalizer" +#define GFMMPROC_CONTROL_EFFECT_REVERB_STR "Reverb" +#define GFMMPROC_CONTROL_REVERB_SOURCE_STR "ReverbSource" + + +#define GFMmProcObjectIsInstance(handle, objectType) \ + ((GFMMPROC_OBJECT_TABLE*)handle)->MmProcObjectIsInstance(handle, objectType) + +GF_HANDLE GFMmProcObjectAlloc(GFMmProcHandle component, const char* objectType); +void GFMmProcObjectFree(GF_HANDLE handle); + +#if defined GFMMPROC_BASIC_AUDIO || defined GFMMPROC_ADVANCED + +typedef GF_HANDLE GFMMPROC_STREAM; + +//***************************************************************************** +// Stream +//***************************************************************************** +// +typedef struct _GFMMPROC_STREAM_TABLE +{ + void (*MmProcStreamClose)(GFMMPROC_STREAM handle); + NvS32 (*MmProcStreamGetBuffer)(GFMMPROC_STREAM handle, NvU32 tag, void** descriptor, void** buffer); + void (*MmProcStreamReleaseBuffer)(GFMMPROC_STREAM handle, NvU32 tag, NvU32 status, NvU32 size); + void (*MmProcStreamReset)(GFMMPROC_STREAM handle); + +} GFMMPROC_STREAM_TABLE; + +#define GFMMPROC_STREAM_END_OF_MEDIA 0x00000001 + +#define GFMmProcStreamClose(handle) \ + ((GFMMPROC_STREAM_TABLE*)handle)->MmProcStreamClose(handle) +#define GFMmProcStreamGetBuffer(handle, tag, descriptor, buffer) \ + ((GFMMPROC_STREAM_TABLE*)handle)->MmProcStreamGetBuffer(handle, tag, descriptor, buffer) +#define GFMmProcStreamReleaseBuffer(handle, tag, status, size) \ + ((GFMMPROC_STREAM_TABLE*)handle)->MmProcStreamReleaseBuffer(handle, tag, status, size) +#define GFMmProcStreamReset(handle) \ + ((GFMMPROC_STREAM_TABLE*)handle)->MmProcStreamReset(handle) + +#endif // #if defined GFMMPROC_BASIC_AUDIO || defined GFMMPROC_ADVANCED + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_BASIC_AUDIO +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_BASIC_AUDIO + +typedef GFMMPROC_OBJECT GFMMPROC_CONTROL; +typedef GF_HANDLE GFMMPROC_CONTROLLABLE; +typedef GFMMPROC_OBJECT GFMMPROC_MANAGER; +typedef GFMMPROC_CONTROLLABLE GFMMPROC_PLAYER; +typedef GF_HANDLE GFMMPROC_PLAYER_LISTENER; +typedef GF_HANDLE GFMMPROC_TIME_BASE; +typedef enum { + GFMMPROC_CODEC_TYPE_UNSPECIFIED = 0, + GFMMPROC_CODEC_TYPE_I2S, + GFMMPROC_CODEC_TYPE_AC97 +} GFMMPROC_CODEC_TYPE; + +//***************************************************************************** +// Control +//***************************************************************************** +// +typedef GFMMPROC_OBJECT_TABLE GFMMPROC_CONTROL_TABLE; + + +//***************************************************************************** +// Controllable +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROLLABLE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + GFMMPROC_CONTROL (*MmProcControllableGetControl)(GFMMPROC_CONTROLLABLE handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcControllableGetControls)(GFMMPROC_CONTROLLABLE handle); + +} GFMMPROC_CONTROLLABLE_TABLE; + +#define GFMmProcControllableGetControl(handle, controlType) \ + ((GFMMPROC_CONTROLLABLE_TABLE*)handle)->MmProcControllableGetControl(handle, controlType) +#define GFMmProcControllableGetControls(handle) \ + ((GFMMPROC_CONTROLLABLE_TABLE*)handle)->MmProcControllableGetControls(handle) + + +//***************************************************************************** +// Manager +//***************************************************************************** +// +typedef struct _GFMMPROC_MANAGER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + GFMMPROC_PLAYER (*MmProcManagerCreatePlayer)(GFMMPROC_MANAGER handle, char* locator); +// GFMMPROC_PLAYER (*MmProcManagerCreatePlayerForDataSource)(GFMMPROC_MANAGER handle, DataSource source); + GFMMPROC_PLAYER (*MmProcManagerCreatePlayerForStream)(GFMMPROC_MANAGER handle, GFMMPROC_STREAM stream, char* contentType); + char* (*MmProcManagerGetSupportedContentTypes)(GFMMPROC_MANAGER handle, char* protocol); + char* (*MmProcManagerGetSupportedProtocols)(GFMMPROC_MANAGER handle, char* contentType); + GFMMPROC_TIME_BASE (*MmProcManagerGetSystemTimeBase)(GFMMPROC_MANAGER handle); + void (*MmProcManagerPlayTone)(GFMMPROC_MANAGER handle, NvU32 note, NvU32 duration, NvU32 volume); + void (*MmProcManagerProcess)(GFMMPROC_MANAGER handle); + GFMMPROC_CODEC_TYPE (*MmProcManagerGetCodecType)(GFMMPROC_MANAGER handle); + void (*MmProcManagerCodecWrite)(GFMMPROC_MANAGER handle, NvU32 offset, NvU32 value); + NvU32 (*MmProcManagerCodecRead)(GFMMPROC_MANAGER handle, NvU32 offset); + +} GFMMPROC_MANAGER_TABLE; + +#define GFMMPROC_MANAGER_MIDI_DEVICE_LOCATOR "device://midi" +#define GFMMPROC_MANAGER_TONE_DEVICE_LOCATOR "device://tone" + +#define GFMmProcManagerCreatePlayer(handle, locator) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCreatePlayer(handle, locator) +//#define GFMmProcManagerCreatePlayerForDataSource(handle, source) Add multiline delineator here +// ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCreatePlayerForDataSource(handle, source) +#define GFMmProcManagerCreatePlayerForStream(handle, stream, contentType) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCreatePlayerForStream(handle, stream, contentType) +#define GFMmProcManagerGetSupportedContentTypes(handle, protocol) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerGetSupportedContentTypes(handle, protocol) +#define GFMmProcManagerGetSupportedProtocols(handle, contentType) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerGetSupportedProtocols(handle, contentType) +#define GFMmProcManagerGetSystemTimeBase(handle) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerGetSystemTimeBase(handle) +#define GFMmProcManagerPlayTone(handle, note, duration, volume) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerPlayTone(handle, note, duration, volume) +#define GFMmProcManagerProcess(handle) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerProcess(handle) +#define MmProcManagerGetCodecType(handle) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerGetCodecType(handle) +#define MmProcManagerCodecWrite(handle, offset, value) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCodecWrite(handle, offset, value) +#define MmProcManagerCodecRead(handle, offset) \ + ((GFMMPROC_MANAGER_TABLE*)handle)->MmProcManagerCodecRead(handle, offset) + + +//***************************************************************************** +// Player +//***************************************************************************** +// +typedef struct _GFMMPROC_PLAYER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Controllable Methods + // + GFMMPROC_CONTROL (*MmProcControllableGetControl)(GFMMPROC_CONTROLLABLE handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcControllableGetControls)(GFMMPROC_CONTROLLABLE handle); + + void (*MmProcPlayerAddPlayerListener)(GFMMPROC_PLAYER handle, GFMMPROC_PLAYER_LISTENER playerListener); + void (*MmProcPlayerClose)(GFMMPROC_PLAYER handle); + void (*MmProcPlayerDeallocate)(GFMMPROC_PLAYER handle); + char* (*MmProcPlayerGetContentType)(GFMMPROC_PLAYER handle); + NvS64 (*MmProcPlayerGetDuration)(GFMMPROC_PLAYER handle); + NvS64 (*MmProcPlayerGetMediaTime)(GFMMPROC_PLAYER handle); + NvU32 (*MmProcPlayerGetState)(GFMMPROC_PLAYER handle); + GFMMPROC_TIME_BASE (*MmProcPlayerGetTimeBase)(GFMMPROC_PLAYER handle); + NvU32 (*MmProcPlayerPrefetch)(GFMMPROC_PLAYER handle); + void (*MmProcPlayerPull)(GFMMPROC_PLAYER handle, NvS32 allow); + void (*MmProcPlayerRealize)(GFMMPROC_PLAYER handle); + void (*MmProcPlayerRemovePlayerListener)(GFMMPROC_PLAYER handle, GFMMPROC_PLAYER_LISTENER playerListener); + void (*MmProcPlayerSetLoopCount)(GFMMPROC_PLAYER handle, NvS32 count); + NvS64 (*MmProcPlayerSetMediaTime)(GFMMPROC_PLAYER handle, NvS64 now); + void (*MmProcPlayerSetTimeBase)(GFMMPROC_PLAYER handle, GFMMPROC_TIME_BASE master); + void (*MmProcPlayerStart)(GFMMPROC_PLAYER handle); + void (*MmProcPlayerStop)(GFMMPROC_PLAYER handle); + +} GFMMPROC_PLAYER_TABLE; + +#define GFMMPROC_PLAYER_UNREALIZED 100 +#define GFMMPROC_PLAYER_REALIZED 200 +#define GFMMPROC_PLAYER_PREFETCHED 300 +#define GFMMPROC_PLAYER_STARTED 400 +#define GFMMPROC_PLAYER_CLOSED 0 +#define GFMMPROC_PLAYER_TIME_UNKNOWN -1 + +#define GFMmProcPlayerAddPlayerListener(handle, playerListener) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerAddPlayerListener(handle, playerListener) +#define GFMmProcPlayerClose(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerClose(handle) +#define GFMmProcPlayerDeallocate(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerDeallocate(handle) +#define GFMmProcPlayerGetContentType(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetContentType(handle) +#define GFMmProcPlayerGetDuration(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetDuration(handle) +#define GFMmProcPlayerGetMediaTime(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetMediaTime(handle) +#define GFMmProcPlayerGetState(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetState(handle) +#define GFMmProcPlayerGetTimeBase(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerGetTimeBase(handle) +#define GFMmProcPlayerPrefetch(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerPrefetch(handle) +#define GFMmProcPlayerPull(handle, allow) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerPull(handle, allow) +#define GFMmProcPlayerRealize(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerRealize(handle) +#define GFMmProcPlayerRemovePlayerListener(handle, playerListener) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerRemovePlayerListener(handle, playerListener) +#define GFMmProcPlayerSetLoopCount(handle, count) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerSetLoopCount(handle, count) +#define GFMmProcPlayerSetMediaTime(handle, now) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerSetMediaTime(handle, now) +#define GFMmProcPlayerSetTimeBase(handle, master) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerSetMediaTime(handle, master) +#define GFMmProcPlayerStart(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerStart(handle) +#define GFMmProcPlayerStop(handle) \ + ((GFMMPROC_PLAYER_TABLE*)handle)->MmProcPlayerStop(handle) + + +//***************************************************************************** +// PlayerListener +//***************************************************************************** +// +typedef struct _GFMMPROC_PLAYER_LISTENER_TABLE +{ + void (*MmProcPlayerListenerPlayerUpdate)(GFMMPROC_PLAYER_LISTENER handle, GFMMPROC_PLAYER player, const char* event, void* eventData); + +} GFMMPROC_PLAYER_LISTENER_TABLE; + +#define GFMMPROC_PLAYER_LISTENER_BUFFERING_STARTED "bufferingStarted" +#define GFMMPROC_PLAYER_LISTENER_BUFFERING_STOPPED "bufferingStopped" +#define GFMMPROC_PLAYER_LISTENER_CLOSED "closed" +#define GFMMPROC_PLAYER_LISTENER_END_OF_MEDIA "endOfMedia" +#define GFMMPROC_PLAYER_LISTENER_DEVICE_AVAILABLE "deviceAvailable" +#define GFMMPROC_PLAYER_LISTENER_DEVICE_UNAVAILABLE "deviceUnavailable" +#define GFMMPROC_PLAYER_LISTENER_DURATION_UPDATED "durationUpdated" +#define GFMMPROC_PLAYER_LISTENER_ERROR "error" +#define GFMMPROC_PLAYER_LISTENER_FORMAT_CHANGED "formatChanged" +#define GFMMPROC_PLAYER_LISTENER_RECORD_ERROR "recordError" +#define GFMMPROC_PLAYER_LISTENER_RECORD_STARTED "recordStarted" +#define GFMMPROC_PLAYER_LISTENER_RECORD_STOPPED "recordStopped" +#define GFMMPROC_PLAYER_LISTENER_STARTED "started" +#define GFMMPROC_PLAYER_LISTENER_STOPPED "stopped" +#define GFMMPROC_PLAYER_LISTENER_STOPPED_AT_TIME "stoppedAtTime" +#define GFMMPROC_PLAYER_LISTENER_VOLUME_CHANGED "volumeChanged" + +#define GFMmProcPlayerListenerPlayerUpdate(handle, player, event, eventData) \ + ((GFMMPROC_PLAYER_LISTENER_TABLE*)handle)->MmProcPlayerListenerPlayerUpdate(handle, player, event, eventData) + + +//***************************************************************************** +// TimeBase +//***************************************************************************** +// +typedef struct _GFMMPROC_TIME_BASE_TABLE +{ + NvU32 (*MmProcTimeBaseGetTime)(GFMMPROC_TIME_BASE handle); + +} GFMMPROC_TIME_BASE_TABLE; + +#define GFMmProcTimeBaseGetTime(handle) \ + ((GFMMPROC_TIME_BASE_TABLE*)handle)->MmProcTimeBaseGetTime(handle) + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_BASIC_AUDIO_CONTROLS +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_BASIC_AUDIO_CONTROLS + +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_MIDI; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_PITCH; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_RATE; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_RECORD; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_STOP_TIME; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_TEMPO; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_TONE; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_VOLUME; + + + +//***************************************************************************** +// MIDIControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_MIDI_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32* (*MmProcControlMidiGetBankList)(GFMMPROC_CONTROL_MIDI hande, NvS32 custom); + NvS8 (*MmProcControlMidiGetChannelVolume)(GFMMPROC_CONTROL_MIDI hande, NvU8 channel); + char* (*MmProcControlMidiGetKeyName)(GFMMPROC_CONTROL_MIDI hande, NvS32 bank, NvS32 program, NvS32 key); + NvS32* (*MmProcControlMidiGetProgram)(GFMMPROC_CONTROL_MIDI hande, NvU8 channel); + NvS32* (*MmProcControlMidiGetProgramList)(GFMMPROC_CONTROL_MIDI hande, NvS32 bank); + char* (*MmProcControlMidiGetProgramName)(GFMMPROC_CONTROL_MIDI hande, NvS32 bank, NvS32 program); + NvS32 (*MmProcControlMidiIsBankQuerySupported)(GFMMPROC_CONTROL_MIDI hande); + NvS32 (*MmProcControlMidiLongMidiEvent)(GFMMPROC_CONTROL_MIDI hande, NvS8* data, NvS32 offset, NvS32 length); + void (*MmProcControlMidiShortMidiEvent)(GFMMPROC_CONTROL_MIDI hande, NvS32 type, NvS32 data1, NvS32 data2); + +} GFMMPROC_CONTROL_MIDI_TABLE; + +#define GFMMPROC_CONTROL_MIDI_CONTROL_CHANGE 176 +#define GFMMPROC_CONTROL_MIDI_NOTE_ON 144 + +#define GFMmProcControlMidiGetBankList(handle, custom) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetBankList(handle, custom) +#define GFMmProcControlMidiGetChannelVolume(handle, channel) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetChannelVolume(handle, channel) +#define GFMmProcControlMidiGetKeyName(handle, bank, program, key) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetKeyName(handle, bank, program, key) +#define GFMmProcControlMidiGetProgram(handle, channel) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetProgram(handle, channel) +#define GFMmProcControlMidiGetProgramList(handle, bank) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetProgramList(handle, bank) +#define GFMmProcControlMidiGetProgramName(handle, bank, program) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiGetProgramName(handle, bank, program) +#define GFMmProcControlMidiIsBankQuerySupported(handle) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiIsBankQuerySupported(handle) +#define GFMmProcControlMidiLongMidiEvent(handle) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->MmProcControlMidiLongMidiEvent(handle, data, offset, length) +#define GFMmProcControlMidiShortMidiEvent(handle, type, data1, data2) \ + ((GFMMPROC_CONTROL_MIDI_TABLE*)handle)->(handle, type, data1, data2) + + +//***************************************************************************** +// PitchControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_PITCH_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlPitchGetMaxPitch)(GFMMPROC_CONTROL_PITCH handle); + NvS32 (*MmProcControlPitchGetMinPitch)(GFMMPROC_CONTROL_PITCH handle); + NvS32 (*MmProcControlPitchGetPitch)(GFMMPROC_CONTROL_PITCH handle); + NvS32 (*MmProcControlPitchSetPitch)(GFMMPROC_CONTROL_PITCH handle, NvS32 millisemitones); + +} GFMMPROC_CONTROL_PITCH_TABLE; + +#define GFMmProcControlPitchGetMaxPitch(handle) \ + ((GFMMPROC_CONTROL_PITCH_TABLE*)handle)->MmProcControlPitchGetMaxPitch(handle) +#define GFMmProcControlPitchGetMinPitch(handle) \ + ((GFMMPROC_CONTROL_PITCH_TABLE*)handle)->MmProcControlPitchGetMinPitch(handle) +#define GFMmProcControlPitchGetPitch(handle) \ + ((GFMMPROC_CONTROL_PITCH_TABLE*)handle)->MmProcControlPitchGetPitch(handle) +#define GFMmProcControlPitchSetPitch(handle, millisemitones) \ + ((GFMMPROC_CONTROL_PITCH_TABLE*)handle)->MmProcControlPitchSetPitch(handle, millisemitones) + + +//***************************************************************************** +// RateControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_RATE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlRateGetMaxRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateGetMinRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateGetRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateSetRate)(GFMMPROC_CONTROL_RATE handle, NvS32 millirate); + +} GFMMPROC_CONTROL_RATE_TABLE; + +#define GFMmProcControlRateGetMaxRate(handle) \ + ((GFMMPROC_CONTROL_RATE_TABLE*)handle)->MmProcControlRateGetMaxRate(handle) +#define GFMmProcControlRateGetMinRate(handle) \ + ((GFMMPROC_CONTROL_RATE_TABLE*)handle)->MmProcControlRateGetMinRate(handle) +#define GFMmProcControlRateGetRate(handle) \ + ((GFMMPROC_CONTROL_RATE_TABLE*)handle)->MmProcControlRateGetRate(handle) +#define GFMmProcControlRateSetRate(handle, millirate) \ + ((GFMMPROC_CONTROL_RATE_TABLE*)handle)->MmProcControlRateSetRate(handle, millirate) + + +//***************************************************************************** +// RecordControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_RECORD_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlRecordCommit)(GFMMPROC_CONTROL_RECORD handle); + char* (*MmProcControlRecordGetContentType)(GFMMPROC_CONTROL_RECORD handle); + void (*MmProcControlRecordSetRecordLocation)(GFMMPROC_CONTROL_RECORD handle, char* locator); + void (*MmProcControlRecordSetRecordStream)(GFMMPROC_CONTROL_RECORD handle, GFMMPROC_STREAM stream, char* contentType); + NvS32 (*MmProcControlRecordSetRecordSizeLimit)(GFMMPROC_CONTROL_RECORD handle, NvS32 size); + void (*MmProcControlRecordStartRecord)(GFMMPROC_CONTROL_RECORD handle); + void (*MmProcControlRecordStopRecord)(GFMMPROC_CONTROL_RECORD handle); + void (*MmProcControlRecordReset)(GFMMPROC_CONTROL_RECORD handle); + +} GFMMPROC_CONTROL_RECORD_TABLE; + +#define GFMmProcControlRecordCommit(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordCommit(handle) +#define GFMmProcControlRecordGetContentType(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordGetContentType(handle) +#define GFMmProcControlRecordSetRecordLocation(handle, locator) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordSetRecordLocation(handle, locator) +#define GFMmProcControlRecordSetRecordStream(handle, stream, contentType) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordSetRecordStream(handle, stream, contentType) +#define GFMmProcControlRecordSetRecordSizeLimit(handle, size) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordSetRecordSizeLimit(handle, size) +#define GFMmProcControlRecordStartRecord(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordStartRecord(handle) +#define GFMmProcControlRecordStopRecord(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordStopRecord(handle) +#define GFMmProcControlRecordReset(handle) \ + ((GFMMPROC_CONTROL_RECORD_TABLE*)handle)->MmProcControlRecordReset(handle) + + +//***************************************************************************** +// StopTimeControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_STOP_TIME_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS64 (*MmProcControlStopTimeGetStopTime)(GFMMPROC_CONTROL_STOP_TIME handle); + void (*MmProcControlStopTimeSetStopTime)(GFMMPROC_CONTROL_STOP_TIME handle, NvS64 stopTime); + +} GFMMPROC_CONTROL_STOP_TIME_TABLE; + +#define GFMMPROC_CONTROL_STOP_TIME_RESET -1 + +#define GFMmProcControlStopTimeGetStopTime(handle) \ + (GFMMPROC_CONTROL_STOP_TIME_TABLE*)handle)->MmProcControlStopTimeGetStopTime(handle) +#define GFMmProcControlStopTimeSetStopTime(handle, stopTime) \ + ((GFMMPROC_CONTROL_STOP_TIME_TABLE*)handle)->MmProcControlStopTimeSetStopTime(handle, stopTime) + + +//***************************************************************************** +// TempoControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_TEMPO_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Rate Methods + // + NvS32 (*MmProcControlRateGetMaxRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateGetMinRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateGetRate)(GFMMPROC_CONTROL_RATE handle); + NvS32 (*MmProcControlRateSetRate)(GFMMPROC_CONTROL_RATE handle, NvS32 millirate); + + NvS32 (*MmProcControlTempoGetTempo)(GFMMPROC_CONTROL_TEMPO handle); + NvS32 (*MmProcControlTempoSetTempo)(GFMMPROC_CONTROL_TEMPO handle, NvS32 millitempo); + +} GFMMPROC_CONTROL_TEMPO_TABLE; + +#define GFMmProcControlTempoGetTempo(handle) \ + ((GFMMPROC_CONTROL_TEMPO_TABLE*)handle)->MmProcControlTempoGetTempo(handle) +#define GFMmProcControlTempoSetTempo(handle) \ + ((GFMMPROC_CONTROL_TEMPO_TABLE*)handle)->MmProcControlTempoSetTempo(handle, millitempo) + + +//***************************************************************************** +// ToneControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_TONE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlToneSetSequence)(GFMMPROC_CONTROL_TONE handle, NvS8* sequence); + +} GFMMPROC_CONTROL_TONE_TABLE; + +#define GFMMPROC_CONTROL_TONE_VERSION -2 +#define GFMMPROC_CONTROL_TONE_TEMPO -3 +#define GFMMPROC_CONTROL_TONE_RESOLUTION -4 +#define GFMMPROC_CONTROL_TONE_BLOCK_START -5 +#define GFMMPROC_CONTROL_TONE_BLOCK_END -6 +#define GFMMPROC_CONTROL_TONE_PLAY_BLOCK -7 +#define GFMMPROC_CONTROL_TONE_SET_VOLUME -8 +#define GFMMPROC_CONTROL_TONE_REPEAT -9 +#define GFMMPROC_CONTROL_TONE_C4 60 +#define GFMMPROC_CONTROL_TONE_SILENCE -1 + +#define GFMmProcControlToneSetSequence(handle, sequence) \ + ((GFMMPROC_CONTROL_TONE_TABLE*)handle)->MmProcControlToneSetSequence(handle, sequence) + + +//***************************************************************************** +// VolumeControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_VOLUME_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlVolumeGetLevel)(GFMMPROC_CONTROL_VOLUME handle); + NvS32 (*MmProcControlVolumeIsMuted)(GFMMPROC_CONTROL_VOLUME handle); + NvS32 (*MmProcControlVolumeSetLevel)(GFMMPROC_CONTROL_VOLUME handle, NvS32 level); + void (*MmProcControlVolumeSetMute)(GFMMPROC_CONTROL_VOLUME handle, NvS32 mute); + +} GFMMPROC_CONTROL_VOLUME_TABLE; + +#define GFMmProcControlVolumeGetLevel(handle) \ + ((GFMMPROC_CONTROL_VOLUME_TABLE*)handle)->MmProcControlVolumeGetLevel(handle) +#define GFMmProcControlVolumeIsMuted(handle) \ + ((GFMMPROC_CONTROL_VOLUME_TABLE*)handle)->MmProcControlVolumeIsMuted(handle) +#define GFMmProcControlVolumeSetLevel(handle, level) \ + ((GFMMPROC_CONTROL_VOLUME_TABLE*)handle)->MmProcControlVolumeSetLevel(handle, level) +#define GFMmProcControlVolumeSetMute(handle, mute) \ + ((GFMMPROC_CONTROL_VOLUME_TABLE*)handle)->MmProcControlVolumeSetMute(handle, mute) + + +#endif // GFMMPROC_BASIC_AUDIO_CONTROLS + +#endif // GFMMPROC_BASIC_AUDIO + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_ADVANCED +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_ADVANCED + +typedef GF_HANDLE GFMMPROC_MODULE; +typedef GFMMPROC_MODULE GFMMPROC_EFFECT_MODULE; +typedef GFMMPROC_MANAGER GFMMPROC_GLOBAL_MANAGER; +typedef GFMMPROC_CONTROLLABLE GFMMPROC_MEDIA_PROCESSOR; +typedef GF_HANDLE GFMMPROC_MEDIA_PROCESSOR_LISTENER; +typedef GFMMPROC_CONTROLLABLE GFMMPROC_SPECTATOR; +typedef GFMMPROC_MODULE GFMMPROC_SOUND_SOURCE_3D; + + +//***************************************************************************** +// Module +//***************************************************************************** +// +typedef struct _GFMMPROC_MODULE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Controllable Methods + // + GFMMPROC_CONTROL (*MmProcControllableGetControl)(GFMMPROC_CONTROLLABLE handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcControllableGetControls)(GFMMPROC_CONTROLLABLE handle); + + void (*MmProcModuleAddMIDIChannel)(GFMMPROC_MODULE handle, GFMMPROC_PLAYER player, NvS32 channel); + void (*MmProcModuleAddPlayer)(GFMMPROC_MODULE handle, GFMMPROC_PLAYER player); + void (*MmProcModuleRemoveMIDIChannel)(GFMMPROC_MODULE handle, GFMMPROC_PLAYER player, NvS32 channel); + void (*MmProcModuleRemovePlayer)(GFMMPROC_MODULE handle, GFMMPROC_PLAYER player); + +} GFMMPROC_MODULE_TABLE; + +#define GFMmProcModuleAddMIDIChannel(handle, player, channel) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleAddMIDIChannel(handle, player, channel) +#define GFMmProcModuleAddPlayer(handle, player) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleAddPlayer(handle, player) +#define GFMmProcModuleGetControl(handle, controlType) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleGetControl(handle, controlType) +#define GFMmProcModuleGetControls(handle) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleGetControls(handle) +#define GFMmProcModuleRemoveMIDIChannel(handle, player, channel) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleRemoveMIDIChannel(handle, player, channel) +#define GFMmProcModuleRemovePlayer(handle, player) \ + ((GFMMPROC_MODULE_TABLE*)handle)->MmProcModuleRemovePlayer(handle, player) + + +//***************************************************************************** +// EffectModule +//***************************************************************************** +// +typedef GFMMPROC_MODULE_TABLE GFMMPROC_EFFECT_MODULE_TABLE; + + +//***************************************************************************** +// GlobalManager +//***************************************************************************** +// +typedef struct _GFMMPROC_GLOBAL_MANAGER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Manager Methods + // + GFMMPROC_PLAYER (*MmProcManagerCreatePlayer)(GFMMPROC_MANAGER handle, char* locator); +// GFMMPROC_PLAYER (*MmProcManagerCreatePlayerForDataSource)(GFMMPROC_MANAGER handle, DataSource source); + GFMMPROC_PLAYER (*MmProcManagerCreatePlayerForStream)(GFMMPROC_MANAGER handle, GFMMPROC_STREAM stream, char* type); + char* (*MmProcManagerGetSupportedContentTypes)(GFMMPROC_MANAGER handle, char* protocol); + char* (*MmProcManagerGetSupportedProtocols)(GFMMPROC_MANAGER handle, char* contentType); + GFMMPROC_TIME_BASE (*MmProcManagerGetSystemTimeBase)(GFMMPROC_MANAGER handle); + void (*MmProcManagerPlayTone)(GFMMPROC_MANAGER handle, NvU32 note, NvU32 duration, NvU32 volume); + void (*MmProcManagerProcess)(GFMMPROC_MANAGER handle); + GFMMPROC_CODEC_TYPE (*MmProcManagerGetCodecType)(GFMMPROC_MANAGER handle); + void (*MmProcManagerCodecWrite)(GFMMPROC_MANAGER handle, NvU32 offset, NvU32 value); + NvU32 (*MmProcManagerCodecRead)(GFMMPROC_MANAGER handle, NvU32 offset); + + GFMMPROC_EFFECT_MODULE (*MmProcGlobalManagerCreateEffectModule)(GFMMPROC_GLOBAL_MANAGER handle); + GFMMPROC_MEDIA_PROCESSOR (*MmProcGlobalManagerCreateMediaProcessor)(GFMMPROC_GLOBAL_MANAGER handle); + GFMMPROC_SOUND_SOURCE_3D (*MmProcGlobalManagerCreateSoundSource3D)(GFMMPROC_GLOBAL_MANAGER handle); + GFMMPROC_CONTROL (*MmProcGlobalManagerGetControl)(GFMMPROC_GLOBAL_MANAGER handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcGlobalManagerGetControls)(GFMMPROC_GLOBAL_MANAGER handle); + GFMMPROC_SPECTATOR (*MmProcGlobalManagerGetSpectator)(GFMMPROC_GLOBAL_MANAGER handle); + char* (*MmProcGlobalManagerGetSupportedMediaProcessorInputTypes)(GFMMPROC_GLOBAL_MANAGER handle); + NvS32 (*MmProcGlobalManagerGetUnitsPerMeter)(GFMMPROC_GLOBAL_MANAGER handle); + void (*MmProcGlobalManagerSetUnitsPerMeter)(GFMMPROC_GLOBAL_MANAGER handle, NvS32 newScalingFactor); + +} GFMMPROC_GLOBAL_MANAGER_TABLE; + +#define GFMmProcGlobalManagerCreateEffectModule(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerCreateEffectModule(handle) +#define GFMmProcGlobalManagerCreateMediaProcessor(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerCreateMediaProcessor(handle) +#define GFMmProcGlobalManagerCreateSoundSource3D(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerCreateSoundSource3D(handle) +#define GFMmProcGlobalManagerGetControl(handle, controlType) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetControl(handle, controlType) +#define GFMmProcGlobalManagerGetControls(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetControls(handle) +#define GFMmProcGlobalManagerGetSpectator(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetSpectator(handle) +#define GFMmProcGlobalManagerGetSupportedMediaProcessorInputTypes(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetSupportedMediaProcessorInputTypes(handle) +#define GFMmProcGlobalManagerGetUnitsPerMeter(handle) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerGetUnitsPerMeter(handle) +#define GFMmProcGlobalManagerSetUnitsPerMeter(handle, newScalingFactor) \ + ((GFMMPROC_GLOBAL_MANAGER_TABLE*)handle)->MmProcGlobalManagerSetUnitsPerMeter(handle, newScalingFactor) + + +//***************************************************************************** +// MediaProcessor +//***************************************************************************** +// +typedef struct _GFMMPROC_MEDIA_PROCESSOR_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Controllable Methods + // + GFMMPROC_CONTROL (*MmProcControllableGetControl)(GFMMPROC_CONTROLLABLE handle, char* controlType); + GFMMPROC_CONTROL* (*MmProcControllableGetControls)(GFMMPROC_CONTROLLABLE handle); + + void (*MmProcMediaProcessorAbort)(GFMMPROC_MEDIA_PROCESSOR handle); + void (*MmProcMediaProcessorAddMediaProcessorListener)(GFMMPROC_MEDIA_PROCESSOR handle, + GFMMPROC_MEDIA_PROCESSOR_LISTENER mediaProcessorListener); + void (*MmProcMediaProcessorComplete)(GFMMPROC_MEDIA_PROCESSOR handle); + NvS32 (*MmProcMediaProcessorGetProgress)(GFMMPROC_MEDIA_PROCESSOR handle); + void (*MmProcMediaProcessorRemoveMediaProcessorListener)(GFMMPROC_MEDIA_PROCESSOR handle, + GFMMPROC_MEDIA_PROCESSOR_LISTENER mediaProcessorListener); + void (*MmProcMediaProcessorStart)(GFMMPROC_MEDIA_PROCESSOR handle); + void (*MmProcMediaProcessorStop)(GFMMPROC_MEDIA_PROCESSOR handle); + GFMMPROC_PLAYER (*MmProcMediaProcessorSetInput)(GFMMPROC_MEDIA_PROCESSOR handle, GFMMPROC_STREAM input, char* contentType, NvS32 length); + GFMMPROC_PLAYER (*MmProcMediaProcessorSetOutput)(GFMMPROC_MEDIA_PROCESSOR handle, GFMMPROC_STREAM output, char* contentType); + +} GFMMPROC_MEDIA_PROCESSOR_TABLE; + +#define GFMMPROC_MEDIA_PROCESSOR_UNKNOWN -1 + +#define GFMmProcMediaProcessorAbort(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorAbort(handle) +#define GFMmProcMediaProcessorAddMediaProcessorListener(handle, mediaProcessorListener) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorAddMediaProcessorListener(handle, mediaProcessorListener) +#define GFMmProcMediaProcessorComplete(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorComplete(handle) +#define GFMmProcMediaProcessorGetProgress(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorGetProgress(handle) +#define GFMmProcMediaProcessorRemoveMediaProcessorListener(handle, mediaProcessorListener) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorRemoveMediaProcessorListener(handle, mediaProcessorListener) +#define GFMmProcMediaProcessorStart(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorStart(handle) +#define GFMmProcMediaProcessorStop(handle) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorStop(handle) +#define GFMmProcMediaProcessorSetInput(handle, input, contentType, length) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorSetInput(handle, input, contentType, length) +#define GFMmProcMediaProcessorSetOutput(handle, output, contentType) \ + ((GFMMPROC_MEDIA_PROCESSOR_TABLE*)handle)->MmProcMediaProcessorSetOutput(handle, output, contentType) + + +//***************************************************************************** +// MediaProcessorListener +//***************************************************************************** +// +typedef struct _GFMMPROC_MEDIA_PROCESSOR_LISTENER_TABLE +{ + void (*MmProcMediaProcessorListenerMediaProcessorUpdate)(GFMMPROC_MEDIA_PROCESSOR_LISTENER handle, + GFMMPROC_MEDIA_PROCESSOR processor, char* event, + void* eventData); + +} GFMMPROC_MEDIA_PROCESSOR_LISTENER_TABLE; + +#define GFMMPROC_MEDIA_PROCESSOR_LISTENER_PROCESSING_COMPLETED "processingCompleted" +#define GFMMPROC_MEDIA_PROCESSOR_LISTENER_PROCESSING_ERROR "processingError" + +#define GFMmProcMediaProcessorListenerMediaProcessorUpdate(handle, processor, event, eventData) \ + ((GFMMPROC_MEDIA_PROCESSOR_LISTENER_TABLE*)handle)->MmProcMediaProcessorListenerMediaProcessorUpdate(handle, processor, event, eventData) + + +//***************************************************************************** +// Spectator +//***************************************************************************** +// +typedef GFMMPROC_CONTROLLABLE_TABLE GFMMPROC_SPECTATOR_TABLE; + + +//***************************************************************************** +// SoundSource3D +//***************************************************************************** +// +typedef GFMMPROC_MODULE_TABLE GFMMPROC_SOUND_SOURCE_3D_TABLE; + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS + +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_COMMIT; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_ORIENTATION; +typedef GFMMPROC_CONTROL_ORIENTATION GFMMPROC_CONTROL_DIRECTIVITY; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_DISTANCE_ATTENUATION; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_DOPPLER; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_LOCATION; +typedef GFMMPROC_CONTROL_ORIENTATION GFMMPROC_CONTROL_MACROSCOPIC; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_OBSTRUCTION; + +#include "GFAudio.h" + +//***************************************************************************** +// CommitControl +//***************************************************************************** +typedef struct _GFMMPROC_CONTROL_COMMIT_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlCommitCommit)(GFMMPROC_CONTROL_COMMIT handle); + NvS32 (*MmProcControlCommitIsDeferred)(GFMMPROC_CONTROL_COMMIT handle); + void (*MmProcControlCommitSetDeferred)(GFMMPROC_CONTROL_COMMIT handle, NvS32 deferred); + +} GFMMPROC_CONTROL_COMMIT_TABLE; + +#define GFMmProcControlCommitCommit(handle) \ + ((GFMMPROC_CONTROL_COMMIT_TABLE*)handle)->MmProcControlCommitCommit(handle) +#define GFMmProcControlCommitIsDeferred(handle) \ + ((GFMMPROC_CONTROL_COMMIT_TABLE*)handle)->MmProcControlCommitIsDeferred(handle) +#define GFMmProcControlCommitSetDeferred(handle, deferred) \ + ((GFMMPROC_CONTROL_COMMIT_TABLE*)handle)->MmProcControlCommitSetDeferred(handle, deferred) + + + +//***************************************************************************** +// OrientationControl +//***************************************************************************** +typedef struct _GFMMPROC_CONTROL_ORIENTATION_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlOrientationGetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32* frontVector, NvVectorS32* aboveVector); + void (*MmProcControlOrientationSetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32 frontVector, NvVectorS32 aboveVector); + +} GFMMPROC_CONTROL_ORIENTATION_TABLE; + +#define GFMmProcControlOrientationGetOrientation(handle, frontVector, aboveVector) \ + ((GFMMPROC_CONTROL_ORIENTATION_TABLE*)handle)->MmProcControlOrientationGetOrientation(handle, frontVector, aboveVector) +#define GFMmProcControlOrientationSetOrientation(handle, frontVector, aboveVector) \ + ((GFMMPROC_CONTROL_ORIENTATION_TABLE*)handle)->MmProcControlOrientationSetOrientation(handle, frontVector, aboveVector) + + +//***************************************************************************** +// DirectivityControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_DIRECTIVITY_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Orientation Methods + // + void (*MmProcControlOrientationGetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32* frontVector, NvVectorS32* aboveVector); + void (*MmProcControlOrientationSetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32 frontVector, NvVectorS32 aboveVector); + + void (*MmProcControlDirectivityGetParameters)(GFMMPROC_CONTROL_DIRECTIVITY handle, NvVectorS32* vector); + void (*MmProcControlDirectivitySetParameters)(GFMMPROC_CONTROL_DIRECTIVITY handle, + NvS32 minAngle, NvS32 maxAngle, NvS32 rearLevel); + +} GFMMPROC_CONTROL_DIRECTIVITY_TABLE; + +#define GFMmProcControlDirectivityGetParameters(handle, vector) \ + ((GFMMPROC_CONTROL_DIRECTIVITY_TABLE*)handle)->MmProcControlDirectivityGetParameters(handle, vector) +#define GFMmProcControlDirectivitySetParameters(handle, minAngle, maxAngle, rearLevel) \ + ((GFMMPROC_CONTROL_DIRECTIVITY_TABLE*)handle)->MmProcControlDirectivitySetParameters(handle, minAngle, maxAngle, rearLevel) + + +//***************************************************************************** +// DistanceAttenuationControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlDistanceAttenuationGetMaxDistance)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle); + NvS32 (*MmProcControlDistanceAttenuationGetMinDistance)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle); + NvS32 (*MmProcControlDistanceAttenuationGetMuteAfterMax)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle); + NvS32 (*MmProcControlDistanceAttenuationGetRolloffFactor)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle); + void (*MmProcControlDistanceAttenuationSetParameters)(GFMMPROC_CONTROL_DISTANCE_ATTENUATION handle, + NvS32 minDistance, NvS32 maxDistance, + NvS32 muteAfterMax, NvS32 rolloffFactor); + +} GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE; + +#define GFMmProcControlDistanceAttenuationGetMaxDistance(handle) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationGetMaxDistance(handle) +#define GFMmProcControlDistanceAttenuationGetMinDistance(handle) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationGetMinDistance(handle) +#define GFMmProcControlDistanceAttenuationGetMuteAfterMax(handle) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationGetMuteAfterMax(handle) +#define GFMmProcControlDistanceAttenuationGetRolloffFactor(handle) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationGetRolloffFactor(handle) +#define GFMmProcControlDistanceAttenuationSetParameters(handle, minDistance, maxDistance, muteAfterMax, rolloffFactor) \ + ((GFMMPROC_CONTROL_DISTANCE_ATTENUATION_TABLE*)handle)->MmProcControlDistanceAttenuationSetParameters(handle, minDistance, maxDistance, muteAfterMax, rolloffFactor) + + +//***************************************************************************** +// DopplerControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_DOPPLER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlDopplerGetVelocityCartesian)(GFMMPROC_CONTROL_DOPPLER handle, NvVectorS32* vector); + NvS32 (*MmProcControlDopplerIsEnabled)(GFMMPROC_CONTROL_DOPPLER handle); + void (*MmProcControlDopplerSetEnabled)(GFMMPROC_CONTROL_DOPPLER handle, NvS32 dopplerEnabled); + void (*MmProcControlDopplerSetVelocityCartesian)(GFMMPROC_CONTROL_DOPPLER handle, NvVectorS32 vector); + void (*MmProcControlDopplerSetVelocitySpherical)(GFMMPROC_CONTROL_DOPPLER handle, + NvS32 azimuth, NvS32 elevation, NvS32 radius); + +} GFMMPROC_CONTROL_DOPPLER_TABLE; + +#define GFMmProcControlDopplerGetVelocityCartesian(handle, vector) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerGetVelocityCartesian(handle, vector) +#define GFMmProcControlDopplerIsEnabled(handle) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerIsEnabled(handle) +#define GFMmProcControlDopplerSetEnabled(handle, dopplerEnabled) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerSetEnabled(handle, dopplerEnabled) +#define GFMmProcControlDopplerSetVelocityCartesian(handle, vector) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerSetVelocityCartesian(handle, vector) +#define GFMmProcControlDopplerSetVelocitySpherical(handle, azimuth, elevation, radius) \ + ((GFMMPROC_CONTROL_DOPPLER_TABLE*)handle)->MmProcControlDopplerSetVelocitySpherical(handle, azimuth, elevation, radius) + + +//***************************************************************************** +// LocationControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_LOCATION_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + void (*MmProcControlLocationGetCartesian)(GFMMPROC_CONTROL_LOCATION handle, NvVectorS32* vector); + void (*MmProcControlLocationSetCartesian)(GFMMPROC_CONTROL_LOCATION handle, NvVectorS32 vector); + void (*MmProcControlLocationSetSpherical)(GFMMPROC_CONTROL_LOCATION handle, NvS32 azimuth, NvS32 elevation, NvS32 radius); + void (*MmProcControlLocationSetCoefficients)(GFMMPROC_CONTROL_LOCATION handle,GFMMPROC_SOUND_SOURCE_3D SS3D,GFMMPROC_SPECTATOR spec, NvS32 CurrVec[],NvS32 TargVec[]); + void (*MmProcControlLocationGetCoefficients)(GFMMPROC_CONTROL_LOCATION handle, void* Coeff); + +} GFMMPROC_CONTROL_LOCATION_TABLE; + +#define GFMmProcControlLocationGetCartesian(handle, vector) \ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationGetCartesian(handle, vector) +#define GFMmProcControlLocationSetCartesian(handle, vector) \ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationSetCartesian(handle, vector) +#define GFMmProcControlLocationSetSpherical(handle, azimuth, elevation, radius) \ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationSetSpherical(handle, azimuth, elevation, radius) +#define GFMmProcControlLocationSetCoefficients(handle, SS3D,spec, CurrVec,TargVec) \ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationSetCoefficients(handle, SS3D,spec, CurrVec,TargVec) +#define GFMmProcControlLocationGetCoefficients(handle,pCoeff)\ + ((GFMMPROC_CONTROL_LOCATION_TABLE*)handle)->MmProcControlLocationGetCoefficients(handle,pCoeff) + +//***************************************************************************** +// MacroscopicControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_MACROSCOPIC_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + // + // Orientation Methods + // + void (*MmProcControlOrientationGetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32* frontVector, NvVectorS32* aboveVector); + void (*MmProcControlOrientationSetOrientation)(GFMMPROC_CONTROL_ORIENTATION handle, + NvVectorS32 frontVector, NvVectorS32 aboveVector); + + void (*MmProcControlMacroscopicGetSize)(GFMMPROC_CONTROL_MACROSCOPIC handle, NvVectorS32* vector); + void (*MmProcControlMacroscopicSetSize)(GFMMPROC_CONTROL_MACROSCOPIC handle, NvVectorS32 vector); + +} GFMMPROC_CONTROL_MACROSCOPIC_TABLE; + +#define GFMmProcControlMacroscopicGetSize(handle, vector) \ + ((GFMMPROC_CONTROL_MACROSCOPIC_TABLE*)handle)->MmProcControlMacroscopicGetSize(handle, vector) +#define GFMmProcControlMacroscopicSetSize(handle, vector) \ + ((GFMMPROC_CONTROL_MACROSCOPIC_TABLE*)handle)->MmProcControlMacroscopicSetSize(handle, vector) + + +//***************************************************************************** +// ObstructionControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_OBSTRUCTION_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlObstructionGetHFLevel)(GFMMPROC_CONTROL_OBSTRUCTION handle); + NvS32 (*MmProcControlObstructionGetLevel)(GFMMPROC_CONTROL_OBSTRUCTION handle); + void (*MmProcControlObstructionSetHFLevel)(GFMMPROC_CONTROL_OBSTRUCTION handle, NvS32 HFLevel); + void (*MmProcControlObstructionSetLevel)(GFMMPROC_CONTROL_OBSTRUCTION handle, NvS32 level); + +} GFMMPROC_CONTROL_OBSTRUCTION_TABLE; + +#define GFMmProcControlObstructionGetHFLevel(handle) \ + ((GFMMPROC_CONTROL_OBSTRUCTION_TABLE*)handle)->MmProcControlObstructionGetHFLevel(handle) +#define GFMmProcControlObstructionGetLevel(handle) \ + ((GFMMPROC_CONTROL_OBSTRUCTION_TABLE*)handle)->MmProcControlObstructionGetLevel(handle) +#define GFMmProcControlObstructionSetHFLevel(handle, HFLevel) \ + ((GFMMPROC_CONTROL_OBSTRUCTION_TABLE*)handle)->MmProcControlObstructionSetHFLevel(handle, HFLevel) +#define GFMmProcControlObstructionSetLevel(handle, level) \ + ((GFMMPROC_CONTROL_OBSTRUCTION_TABLE*)handle)->MmProcControlObstructionSetLevel(handle, level) + + +#endif // GFMMPROC_ADVANCED_3D_AUDIO_CONTROLS + + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_ADVANCED_CONTROLS +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_ADVANCED_CONTROLS + +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_AUDIO_FORMAT; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_EFFECT; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_EFFECT_ORDER; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_FORMAT; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_MIDI_CHANNEL; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_PAN; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_PRIORITY; + + + +//***************************************************************************** +// FormatControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_FORMAT_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlFormatGetEstimatedBitRate)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetFormat)(GFMMPROC_CONTROL_FORMAT handle); + NvS32 (*MmProcControlFormatGetIntParameterValue)(GFMMPROC_CONTROL_FORMAT handle, char* parameter); + NvS32 (*MmProcControlFormatGetMetadataOverride)(GFMMPROC_CONTROL_FORMAT handle); + NvS32 (*MmProcControlFormatGetMetadataSupportMode)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetStrParameterValue)(GFMMPROC_CONTROL_FORMAT handle, char* parameter); + char* (*MmProcControlFormatGetSupportedFormats)(GFMMPROC_CONTROL_FORMAT handle); + NvS32* (*MmProcControlFormatGetSupportedIntParameterRange)(GFMMPROC_CONTROL_FORMAT handle, char* parameter); + char* (*MmProcControlFormatGetSupportedIntParameters)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetSupportedMetadataKeys)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetSupportedStrParameters)(GFMMPROC_CONTROL_FORMAT handle); + char* (*MmProcControlFormatGetSupportedStrParameterValues)(GFMMPROC_CONTROL_FORMAT handle, char* parameter); + void (*MmProcControlFormatSetFormat)(GFMMPROC_CONTROL_FORMAT handle, char* format); + void (*MmProcControlFormatSetMetadata)(GFMMPROC_CONTROL_FORMAT handle, char* key, char* value); + void (*MmProcControlFormatSetMetadataOverride)(GFMMPROC_CONTROL_FORMAT handle, NvS32 override); + void (*MmProcControlFormatSetParameterStr)(GFMMPROC_CONTROL_FORMAT handle, char* parameter, char* value); + NvS32 (*MmProcControlFormatSetParameterInt)(GFMMPROC_CONTROL_FORMAT handle, char* parameter, NvS32 value); + +} GFMMPROC_CONTROL_FORMAT_TABLE; + +#define GFMMPROC_CONTROL_FORMAT_METADATA_NOT_SUPPORTED 0 +#define GFMMPROC_CONTROL_FORMAT_METADATA_SUPPORTED_FIXED_KEYS 1 +#define GFMMPROC_CONTROL_FORMAT_METADATA_SUPPORTED_FREE_KEYS 2 + +#define GFMMPROC_CONTROL_FORMAT_PARAM_BITRATE "bitrate" +#define GFMMPROC_CONTROL_FORMAT_PARAM_BITRATE_TYPE "bitrate type" +#define GFMMPROC_CONTROL_FORMAT_PARAM_BITS_PER_SAMPLE "bits per sample" +#define GFMMPROC_CONTROL_FORMAT_PARAM_CHANNELS "channels" +#define GFMMPROC_CONTROL_FORMAT_PARAM_FRAMERATE "frame rate" +#define GFMMPROC_CONTROL_FORMAT_PARAM_QUALITY "quality" +#define GFMMPROC_CONTROL_FORMAT_PARAM_SAMPLERATE "sample rate" +#define GFMMPROC_CONTROL_FORMAT_PARAM_TRACK "track" +#define GFMMPROC_CONTROL_FORMAT_PARAM_TRACKS_AVAILABLE "tracks available" +#define GFMMPROC_CONTROL_FORMAT_PARAM_VERSION_TYPE "version type" + +#define GFMMPROC_CONTROL_FORMAT_TRACK_ALL -1 +#define GFMMPROC_CONTROL_FORMAT_TRACK_DEFAULT 0 +#define GFMMPROC_CONTROL_FORMAT_TRACK_ONE 1 + + +#define GFMmProcControlFormatGetEstimatedBitRate(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetEstimatedBitRate(handle) +#define GFMmProcControlFormatGetFormat(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetFormat(handle) +#define GFMmProcControlFormatGetIntParameterValue(handle, parameter) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetIntParameterValue(handle, parameter) +#define GFMmProcControlFormatGetMetadataOverride(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetMetadataOverride(handle) +#define GFMmProcControlFormatGetMetadataSupportMode(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetMetadataSupportMode(handle) +#define GFMmProcControlFormatGetStrParameterValue(handle, parameter) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetStrParameterValue(handle, parameter) +#define GFMmProcControlFormatGetSupportedFormats(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedFormats(handle) +#define GFMmProcControlFormatGetSupportedIntParameterRange(handle, parameter) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedIntParameterRange(handle, parameter) +#define GFMmProcControlFormatGetSupportedIntParameters(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedIntParameters(handle) +#define GFMmProcControlFormatGetSupportedMetadataKeys(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedMetadataKeys(handle) +#define GFMmProcControlFormatGetSupportedStrParameters(handle) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedStrParameters(handle) +#define GFMmProcControlFormatGetSupportedStrParameterValues(handle, parameter) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatGetSupportedStrParameterValues(handle, parameter) +#define GFMmProcControlFormatSetFormat(handle, format) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetFormat(handle, format) +#define GFMmProcControlFormatSetMetadata(handle, key, value) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetMetadata(handle, key, value) +#define GFMmProcControlFormatSetMetadataOverride(handle, override) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetMetadataOverride(handle, override) +#define GFMmProcControlFormatSetParameterStr(handle, parameter, value) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetParameterStr(handle, parameter, value) +#define GFMmProcControlFormatSetParameterInt(handle, parameter, value) \ + ((GFMMPROC_CONTROL_FORMAT_TABLE*)handle)->MmProcControlFormatSetParameterInt(handle, parameter, value) + + + +//***************************************************************************** +// AudioFormatControl +//***************************************************************************** +// +typedef GFMMPROC_CONTROL_FORMAT_TABLE GFMMPROC_CONTROL_AUDIO_FORMAT_TABLE; + + +//***************************************************************************** +// EffectControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + +} GFMMPROC_CONTROL_EFFECT_TABLE; + +#define GFMMPROC_CONTROL_EFFECT_SCOPE_LIVE_ONLY 1 +#define GFMMPROC_CONTROL_EFFECT_SCOPE_RECORD_ONLY 2 +#define GFMMPROC_CONTROL_EFFECT_SCOPE_LIVE_AND_RECORD 3 + +#define GFMmProcControlEffectGetPreset(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectGetPreset(handle) +#define GFMmProcControlEffectGetPresetNames(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectGetPresetNames(handle) +#define GFMmProcControlEffectGetScope(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectGetScope(handle) +#define GFMmProcControlEffectIsEnabled(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectIsEnabled(handle) +#define GFMmProcControlEffectIsEnforced(handle) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectIsEnforced(handle) +#define GFMmProcControlEffectSetEnabled(handle, enable) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectSetEnabled(handle, enable) +#define GFMmProcControlEffectSetEnforced(handle, enforced) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectSetEnforced(handle, enforced) +#define GFMmProcControlEffectSetPreset(handle, preset) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectSetPreset(handle, preset) +#define GFMmProcControlEffectSetScope(handle, scope) \ + ((GFMMPROC_CONTROL_EFFECT_TABLE*)handle)->MmProcControlEffectSetScope(handle, scope) + + +//***************************************************************************** +// EffectOrderControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_ORDER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlEffectOrderGetEffectOrder)(GFMMPROC_CONTROL_EFFECT_ORDER handle, GFMMPROC_CONTROL_EFFECT effect); + GFMMPROC_CONTROL_EFFECT (*MmProcControlEffectOrderGetEffectOrders)(GFMMPROC_CONTROL_EFFECT_ORDER handle); + NvS32 (*MmProcControlEffectOrderSetEffectOrder)(GFMMPROC_CONTROL_EFFECT_ORDER handle, GFMMPROC_CONTROL_EFFECT effect, NvS32 order); + +} GFMMPROC_CONTROL_EFFECT_ORDER_TABLE; + +#define GFMmProcControlEffectOrderGetEffectOrder(handle, effect) \ + ((GFMMPROC_CONTROL_EFFECT_ORDER_TABLE*)handle)->(handle, effect) +#define GFMmProcControlEffectOrderGetEffectOrders(handle) \ + ((GFMMPROC_CONTROL_EFFECT_ORDER_TABLE*)handle)->MmProcControlEffectOrderGetEffectOrders(handle) +#define GFMmProcControlEffectOrderSetEffectOrder(handle, effect, order) \ + ((GFMMPROC_CONTROL_EFFECT_ORDER_TABLE*)handle)->MmProcControlEffectOrderSetEffectOrder(handle, effect, order) + + +//***************************************************************************** +// MIDIChannelControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_MIDI_CHANNEL_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + GFMMPROC_CONTROL (*MmProcControlMidiChannelGetChannelControl)(GFMMPROC_CONTROL_MIDI_CHANNEL handle, char* controlType, NvS32 channel); + GFMMPROC_CONTROL* (*MmProcControlMidiChannelGetChannelControls)(GFMMPROC_CONTROL_MIDI_CHANNEL handle, NvS32 channel); + +} GFMMPROC_CONTROL_MIDI_CHANNEL_TABLE; + +#define GFMmProcControlMidiChannelGetChannelControl(handle, controlType, channel) \ + ((GFMMPROC_CONTROL_MIDI_CHANNEL_TABLE*)handle)->MmProcControlMidiChannelGetChannelControl(handle, controlType, channel) +#define GFMmProcControlMidiChannelGetChannelControls(handle, channel) \ + ((GFMMPROC_CONTROL_MIDI_CHANNEL_TABLE*)handle)->MmProcControlMidiChannelGetChannelControls(handle, channel) + + +//***************************************************************************** +// PanControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_PAN_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlPanGetPan)(GFMMPROC_CONTROL_PAN handle); + NvS32 (*MmProcControlPanSetPan)(GFMMPROC_CONTROL_PAN handle, NvS32 pan); + +} GFMMPROC_CONTROL_PAN_TABLE; + +#define GFMmProcControlPanGetPan(handle) \ + ((GFMMPROC_CONTROL_PAN_TABLE*)handle)->MmProcControlPanGetPan(handle) +#define GFMmProcControlPanSetPan(handle, pan) \ + ((GFMMPROC_CONTROL_PAN_TABLE*)handle)->MmProcControlPanSetPan(handle, pan) + + +//***************************************************************************** +// PriorityControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_PRIORITY_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlPriorityGetPriority)(GFMMPROC_CONTROL_PRIORITY handle); + void (*MmProcControlPrioritySetPriority)(GFMMPROC_CONTROL_PRIORITY handle, NvS32 level); + +} GFMMPROC_CONTROL_PRIORITY_TABLE; + +#define GFMmProcControlPriorityGetPriority(handle) \ + ((GFMMPROC_CONTROL_PRIORITY_TABLE*)handle)->MmProcControlPriorityGetPriority(handle) +#define GFMmProcControlPrioritySetPriority(handle, level) \ + ((GFMMPROC_CONTROL_PRIORITY_TABLE*)handle)->MmProcControlPrioritySetPriority(handle, level) + + + +//***************************************************************************** +//***************************************************************************** +// +// +// GFMMPROC_ADVANCED_AUDIO_EFFECT_CONTROLS +// +// +//***************************************************************************** +//***************************************************************************** + +#if defined GFMMPROC_ADVANCED_AUDIO_EFFECT_CONTROLS + +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_ACOUSTIC_ECHO_CANCELLATION; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_CHORUS; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_EQUALIZER; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_REVERB; +typedef GFMMPROC_CONTROL_EFFECT GFMMPROC_CONTROL_EFFECT_DRC; +typedef GFMMPROC_CONTROL GFMMPROC_CONTROL_REVERB_SOURCE; + +//***************************************************************************** +// AudioVirtualizerControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectAudioVirtualizerGetSpread)(GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER handle); + void (*MmProcControlEffectAudioVirtualizerSetSpread)(GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER handle, NvS32 width); + +} GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_TABLE; + +#define GFMmProcControlEffectAudioVirtualizerGetSpread(handle) \ + ((GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_TABLE*)handle)->MmProcControlEffectAudioVirtualizerGetSpread(handle) +#define GFMmProcControlEffectAudioVirtualizerSetSpread(handle, width) \ + ((GFMMPROC_CONTROL_EFFECT_AUDIO_VIRTUALIZER_TABLE*)handle)->MmProcControlEffectAudioVirtualizerSetSpread(handle, width) + + +//***************************************************************************** +// AcousticEchoCancellationControl +//***************************************************************************** +// +typedef GFMMPROC_CONTROL_EFFECT_TABLE GFMMPROC_CONTROL_EFFECT_ACOUSTIC_ECHO_CANCELLATION_TABLE; + +//***************************************************************************** +// SBCControl +//***************************************************************************** +// +typedef GFMMPROC_CONTROL_EFFECT_TABLE GFMMPROC_CONTROL_EFFECT_SBC_TABLE; + +//***************************************************************************** +// SBRControl +//***************************************************************************** +// +typedef GFMMPROC_CONTROL_EFFECT_TABLE GFMMPROC_CONTROL_EFFECT_SBR_TABLE; + + +//***************************************************************************** +// ChorusControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectChorusGetAverageDelay)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetMaxAverageDelay)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetMaxModulationDepth)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetMaxModulationRate)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetMinModulationRate)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetModulationDepth)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetModulationRate)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + NvS32 (*MmProcControlEffectChorusGetWetLevel)(GFMMPROC_CONTROL_EFFECT_CHORUS handle); + void (*MmProcControlEffectChorusSetAverageDelay)(GFMMPROC_CONTROL_EFFECT_CHORUS handle, NvS32 delay); + void (*MmProcControlEffectChorusSetModulationDepth)(GFMMPROC_CONTROL_EFFECT_CHORUS handle, NvS32 depth); + void (*MmProcControlEffectChorusSetModulationRate)(GFMMPROC_CONTROL_EFFECT_CHORUS handle, NvS32 rate); + NvS32 (*MmProcControlEffectChorusSetWetLevel)(GFMMPROC_CONTROL_EFFECT_CHORUS handle, NvS32 level); + +} GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE; + +#define GFMmProcControlEffectChorusGetAverageDelay(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetAverageDelay(handle) +#define GFMmProcControlEffectChorusGetMaxAverageDelay(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetMaxAverageDelay(handle) +#define GFMmProcControlEffectChorusGetMaxModulationDepth(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetMaxModulationDepth(handle) +#define GFMmProcControlEffectChorusGetMaxModulationRate(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetMaxModulationRate(handle) +#define GFMmProcControlEffectChorusGetMinModulationRate(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetMinModulationRate(handle) +#define GFMmProcControlEffectChorusGetModulationDepth(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetModulationDepth(handle) +#define GFMmProcControlEffectChorusGetModulationRate(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetModulationRate(handle) +#define GFMmProcControlEffectChorusGetWetLevel(handle) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusGetWetLevel(handle) +#define GFMmProcControlEffectChorusSetAverageDelay(handle, delay) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusSetAverageDelay(handle, delay) +#define GFMmProcControlEffectChorusSetModulationDepth(handle, depth) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusSetModulationDepth(handle, depth) +#define GFMmProcControlEffectChorusSetModulationRate(handle, rate) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusSetModulationRate(handle, rate) +#define GFMmProcControlEffectChorusSetWetLevel(handle, level) \ + ((GFMMPROC_CONTROL_EFFECT_CHORUS_TABLE*)handle)->MmProcControlEffectChorusSetWetLevel(handle, level) + + +//***************************************************************************** +// EqualizerControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectEqualizerGetBand)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 frequency); + NvS32 (*MmProcControlEffectEqualizerGetBandLevel)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 band); + NvS32 (*MmProcControlEffectEqualizerGetBass)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + NvS32 (*MmProcControlEffectEqualizerGetCenterFreq)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 band); + NvS32 (*MmProcControlEffectEqualizerGetMaxBandLevel)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + NvS32 (*MmProcControlEffectEqualizerGetMinBandLevel)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + NvS32 (*MmProcControlEffectEqualizerGetNumberOfBands)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + NvS32 (*MmProcControlEffectEqualizerGetTreble)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle); + void (*MmProcControlEffectEqualizerSetBandLevel)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 level, NvS32 band); + NvS32 (*MmProcControlEffectEqualizerSetBass)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 level); + NvS32 (*MmProcControlEffectEqualizerSetTreble)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 level); + NvS32 (*MmProcControlEffectEqualizerSetBandX)(GFMMPROC_CONTROL_EFFECT_EQUALIZER handle, NvS32 *levelptr); + +} GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE; + +#define GFMMPROC_CONTROL_EFFECT_EQUALIZER_UNDEFINED -1004 + +#define GFMmProcControlEffectEqualizerGetBand(handle, frequency) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->(handle, frequency) +#define GFMmProcControlEffectEqualizerGetBandLevel(handle, band) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetBandLevel(handle, band) +#define GFMmProcControlEffectEqualizerGetBass(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetBass(handle) +#define GFMmProcControlEffectEqualizerGetCenterFreq(handle, band) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetCenterFreq(handle, band) +#define GFMmProcControlEffectEqualizerGetMaxBandLevel(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetMaxBandLevel(handle) +#define GFMmProcControlEffectEqualizerGetMinBandLevel(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetMinBandLevel(handle) +#define GFMmProcControlEffectEqualizerGetNumberOfBands(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetNumberOfBands(handle) +#define GFMmProcControlEffectEqualizerGetTreble(handle) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerGetTreble(handle) +#define GFMmProcControlEffectEqualizerSetBandLevel(handle, level, band) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerSetBandLevel(handle, level, band) +#define GFMmProcControlEffectEqualizerSetBass(handle, level) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerSetBass(handle, level) +#define GFMmProcControlEffectEqualizerSetTreble(handle, level) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerSetTreble(handle, level) +#define GFMmProcControlEffectEqualizerSetBandX(handle, levelptr) \ + ((GFMMPROC_CONTROL_EFFECT_EQUALIZER_TABLE*)handle)->MmProcControlEffectEqualizerSetBandX(handle, levelptr) + + +//***************************************************************************** +// Dynamic Range Control (DRC) +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_DRC_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectDRCGetDRCEnable)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetDRCEnable)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); + NvS32 (*MmProcControlEffectDRCGetNoiseGateTh)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetNoiseGateTh)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); + NvS32 (*MmProcControlEffectDRCGetLowerCompTh)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetLowerCompTh)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); + NvS32 (*MmProcControlEffectDRCGetUpperCompTh)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetUpperCompTh)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); + NvS32 (*MmProcControlEffectDRCGetClipTh)(GFMMPROC_CONTROL_EFFECT_DRC handle); + void (*MmProcControlEffectDRCSetClipTh)(GFMMPROC_CONTROL_EFFECT_DRC handle, NvS32 Param); +} GFMMPROC_CONTROL_EFFECT_DRC_TABLE; + +#define GFMmProcControlEffectDRCGetDRCEnable(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetDRCEnable(handle) +#define GFMmProcControlEffectDRCSetDRCEnable(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetDRCEnable(handle, Param) +#define GFMmProcControlEffectDRCGetNoiseGateTh(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetNoiseGateTh(handle) +#define GFMmProcControlEffectDRCSetNoiseGateTh(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetNoiseGateTh(handle, Param) +#define GFMmProcControlEffectDRCGetLowerCompTh(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetLowerCompTh(handle) +#define GFMmProcControlEffectDRCSetLowerCompTh(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetLowerCompTh(handle, Param) +#define GFMmProcControlEffectDRCGetUpperCompTh(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetUpperCompTh(handle) +#define GFMmProcControlEffectDRCSetUpperCompTh(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetUpperCompTh(handle, Param) +#define GFMmProcControlEffectDRCGetClipTh(handle) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCGetClipTh(handle) +#define GFMmProcControlEffectDRCSetClipTh(handle, Param) \ + ((GFMMPROC_CONTROL_EFFECT_DRC_TABLE*)handle)->MmProcControlEffectDRCSetClipTh(handle, Param) + + + + +//***************************************************************************** +// ReverbControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_EFFECT_REVERB_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + char* (*MmProcControlEffectGetPreset)(GFMMPROC_CONTROL_EFFECT handle); + char** (*MmProcControlEffectGetPresetNames)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectGetScope)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnabled)(GFMMPROC_CONTROL_EFFECT handle); + NvS32 (*MmProcControlEffectIsEnforced)(GFMMPROC_CONTROL_EFFECT handle); + void (*MmProcControlEffectSetEnabled)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enable); + void (*MmProcControlEffectSetEnforced)(GFMMPROC_CONTROL_EFFECT handle, NvS32 enforced); + void (*MmProcControlEffectSetPreset)(GFMMPROC_CONTROL_EFFECT handle, char* preset); + void (*MmProcControlEffectSetScope)(GFMMPROC_CONTROL_EFFECT handle, NvS32 scope); + + NvS32 (*MmProcControlEffectReverbGetReverbLevel)(GFMMPROC_CONTROL_EFFECT_REVERB handle); + NvS32 (*MmProcControlEffectReverbGetReverbTime)(GFMMPROC_CONTROL_EFFECT_REVERB handle); + NvS32 (*MmProcControlEffectReverbSetReverbLevel)(GFMMPROC_CONTROL_EFFECT_REVERB handle, NvS32 level); + void (*MmProcControlEffectReverbSetReverbTime)(GFMMPROC_CONTROL_EFFECT_REVERB handle, NvS32 time); + +} GFMMPROC_CONTROL_EFFECT_REVERB_TABLE; + +#define GFMmProcControlEffectReverbGetReverbLevel(handle) \ + ((GFMMPROC_CONTROL_EFFECT_REVERB_TABLE*)handle)->MmProcControlEffectReverbGetReverbLevel(handle) +#define GFMmProcControlEffectReverbGetReverbTime(handle) \ + ((GFMMPROC_CONTROL_EFFECT_REVERB_TABLE*)handle)->MmProcControlEffectReverbGetReverbTime(handle) +#define GFMmProcControlEffectReverbSetReverbLevel(handle, level) \ + ((GFMMPROC_CONTROL_EFFECT_REVERB_TABLE*)handle)->MmProcControlEffectReverbSetReverbLevel(handle, level) +#define GFMmProcControlEffectReverbSetReverbTime(handle, time) \ + ((GFMMPROC_CONTROL_EFFECT_REVERB_TABLE*)handle)->MmProcControlEffectReverbSetReverbTime(handle, time) + + +//***************************************************************************** +// ReverbSourceControl +//***************************************************************************** +// +typedef struct _GFMMPROC_CONTROL_REVERB_SOURCE_TABLE +{ + // + // Object Methods + // + NvS32 (*MmProcObjectIsInstance)(GF_HANDLE handle, const char* objectType); + + NvS32 (*MmProcControlReverbSourceGetRoomLevel)(GFMMPROC_CONTROL_REVERB_SOURCE handle); + void (*MmProcControlReverbSourceSetRoomLevel)(GFMMPROC_CONTROL_REVERB_SOURCE handle, NvS32 level); + +} GFMMPROC_CONTROL_REVERB_SOURCE_TABLE; + +#define GFMMPROC_CONTROL_REVERB_SOURCE_DISCONNECT -2147483648 + +#define GFMmProcControlReverbSourceGetRoomLevel(handle) \ + ((GFMMPROC_CONTROL_REVERB_SOURCE_TABLE*)handle)->MmProcControlReverbSourceGetRoomLevel(handle) +#define GFMmProcControlReverbSourceSetRoomLevel(handle, level) \ + ((GFMMPROC_CONTROL_REVERB_SOURCE_TABLE*)handle)->MmProcControlReverbSourceSetRoomLevel(handle, level) + + + +#endif // GFMMPROC_ADVANCED_AUDIO_EFFECT_CONTROLS + +#endif // GFMMPROC_ADVANCED_CONTROLS + +#endif // GFMMPROC_ADVANCED + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDec.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDec.h new file mode 100755 index 00000000..78cc7c5c --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDec.h @@ -0,0 +1,727 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. +* +* NVIDIA Corporation and its licensors retain all intellectual property +* and proprietary rights in and to this software, related documentation +* and any modifications thereto. Any use, reproduction, disclosure or +* distribution of this software and related documentation without an +* express license agreement from NVIDIA Corporation is strictly prohibited. +*/ + +/** @file GFMxDec.h +GFSDK MPEG Decode API header file. +*/ + +#ifndef _GF_MPEG_DEC__ +#define _GF_MPEG_DEC__ + +#include "nvtypes.h" +#include "GFVx.h" +#include "GFDef.h" + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif + + /** @addtogroup groupMxDec MxDecAPI MPEG Decode API +
        +
      • @ref pageMxDecAppNotes +
          +
        • @ref pageMxDecAppNotes1 +
        +
      + */ + /*@{*/ + + /****************************************************************************************************/ + // MXDECCapFlags + /** MxDecAPI property flag: Support for Simple Profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_SIMPLE 0x00000001 + /** MxDecAPI property flag: Support for simple profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ + +#define GF_MXDEC_CAP_SCALE 0x00000002 + /** MxDecAPI property flag: Support for simple scale profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ + +#define GF_MXDEC_CAP_CORE 0x00000004 + /** MxDecAPI property flag: Support for CORE profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ + +#define GF_MXDEC_CAP_MAIN 0x00000008 + /** MxDecAPI property flag: Support for MAIN profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ + + /** MxDecAPI property flag: Support for N_bit profile. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_N_BIT 0x00000010 + + /** MxDecAPI property flag: Support for LEVEL 1. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_LEVEL1 0x00000100 + + /** MxDecAPI property flag: Support for LEVEL 2. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_LEVEL2 0x00000200 + + /** MxDecAPI property flag: Support for LEVEL 3. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_LEVEL3 0x00000400 + + /** MxDecAPI property flag: Support for LEVEL 4. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_LEVEL4 0x00000800 + + /** MxDecAPI property flag: Support for Post Processing's de-blocking. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_DB 0x00001000 + + /** MxDecAPI property flag: Support for Post Processing's de-ringing. + @see GFMXDECTABLE::MxDecGetProperty, GFPROPERTY::Capability + */ +#define GF_MXDEC_CAP_DR 0x00002000 + + /****************************************************************************************************/ + /** This structure holds the video object plane (VOP) information. */ + typedef struct _GFMXDECVOP + { + NvU32 uiVOPinfo; /**< Set new VOP information */ + NvU32 uiFFORWARD; /**< FCODE_FORWARD, ignore this value if it is I frame */ + PGFRMSURFACE pRef; /**< Reference VOP, ignore this item, if current VOP is an I */ + PGFRMSURFACE pCur; /**< Current VOP */ + PGFRECT pRefRect; /**< Specifies a rectangular area within the pRef surface for the + GFMxDecAPI to use with the reference image. This field only takes + effect when MXDEC_VOP_SPECIFY_REFSURF_RECT is set. The rectangle’s + top and left should be aligned by the application, which should call + GFMxDecGetAttribute() with MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT + and MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT to get the required + alignment. The rectangle's width and height should exactly match the + image width and height that is encoded in the bit stream. */ + + PGFRECT pCurRect; /**< Specifies a rectangular area of the pCur surface within which the + GFMxDecAPI should place the decoded image output. This field only takes + effect if MXDEC_VOP_SPECIFY_CURSURF_RECT is set. The rectangle’s top and + left should be aligned by the application, which should call GFMxDecGetAttribute() + with MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT and + MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT to get the required alignment. + The rectangle's width and height should exactly match the image width and + height that is encoded in the bit stream. */ + }GFMXDECVOP, *PGFMXDECVOP; + + /****************************************************************************************************/ + //uiVOPinfo values + /** GFMXDECVOP::uiVOPinfo : If set, this is P VOP. If unset, it is I VOP. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_P_VOP 0x1 + + /** GFMXDECVOP::uiVOPinfo : This parameter comes as a part of the bitstream. + This indicates that rounding should be performed while doing Motion Compensation. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_ROUNDING_ONE 0x2 + + /** GFMXDECVOP::uiVOPinfo : If set, this bitstream is short video header format. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_SHORT_HEADER 0x4 + + /** GFMXDECVOP::uiVOPinfo : If set, If this flag is set, pRefSurfRect must be set. + GFMxDec will reference image in pRefSurfRect area of pRef surface. Otherwise, GFMxDec will reference the whole pRef surface area. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_SPECIFY_REFSURF_RECT 0x8 + + /** GFMXDECVOP::uiVOPinfo : If this flag is set, pCurSurfRect must be set. GFMxDec will output decoded image to + pCurSurfRect area of pCur surface. Otherwise, GFMxDec will output to pCur surface starting from top left corner , the width and + height are equal to pCur surface width and height. + @see GFMXDECVOP, GFMXDECTABLE::MxDecSetVOP */ +#define MXDEC_VOP_SPECIFY_CURSURF_RECT 0x10 + + /****************************************************************************************************/ + /** This structure holds the postprocessing information. */ + typedef struct _GFMXDECPP + { + PGFRMSURFACE* pDestSurf; /**< Pointer to an array of surfaces that will hold the result from Post Processing + pointer to an array of surfaces to accommodate auto post processing. */ + PGFRMSURFACE* pSrcSurf; /**< Pointer to an array of surfaces to be post processed pointer to an array of surfaces + to accommodate auto post processing. */ + PGFRECT pRect; /**< Rectangular area to be processed for both source and destination surfaces. + @see GFRECT */ + NvU32 numofDestSurf; /**< Number of Destination Surfaces. If MXDEC_PP_AUTO flag is set, this parameter must be filled. */ + NvU32 numofSrcSurf; /**< Number of Source Surfaces. If MXDEC_PP_AUTO flag is set, this parameter must be filled. */ + NvU8 * lpQuantiser; /**< Pointer to array of quantization steps (QPs) for macroblocks in + the source VOP. The GFMxDecAPI automatically saved the last + two decoded VOP’s QP tables. The application may not need to + reload the table if it can make sure the source VOP is one of the + last decoded VOPs. This field must be filled if + MXDEC_PP_RELOAD_QUANTIZER is set. */ + NvU32 PPOption; /**< Post-processing option. */ + /**< + + + + + + + + + + +
      #MXDEC_PP_DB_ONTurn on DeBlocking filter for this frame
      #MXDEC_PP_DR_ONTurn on DeRinging filter for this frame
      #MXDEC_PP_AUTOAuto trigger Post Processing by Hardware
      #MXDEC_PP_RELOAD_QUANTIZERReload the source VOP's qunantizers
      #MXDEC_PP_OP_ASYNCEnables ASYNC mode
      + */ + } GFMXDECPP, *PGFMXDECPP; + + /****************************************************************************************************/ + // PPOption + /** GFMXDECPP::PPOption : Turn on DeBlocking filter for this frame. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_DB_ON 0x1 + + /** GFMXDECPP::PPOption : Turn on DeRinging filter for this frame. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_DR_ON 0x2 + + /** GFMXDECPP::PPOption : Auto trigger Post Processing by Hardware. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_AUTO 0x4 + + /** GFMXDECPP::PPOption : Reload the source VOP's qunantizers. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_RELOAD_QUANTIZER 0x8 + + /** GFMXDECPP::PPOption : enables ASYN mode. GFMxDecPostProcessing() + will return after pushing the commands but without waiting for them to + complete. This option is useful to achieve some paralellism because + post-processed frame is usually not used right away for rendering. So + there is enough time for hardware to complete the decoding before this + frame will be used by app. It is ok to call PostProcessing even when + decoding of this frame is not complete. Inside GPU, hardware synchronizes + with the decoder. + @see GFMXDECPP, GFMXDECTABLE::MxDecPostProcessing */ +#define MXDEC_PP_OP_ASYNC 0x00000010 + + /****************************************************************************************************/ + //pStatus + /** Argument pStatus in GFMxDecGetStatus() : GFMxDecGetStatus() can be called by the application to indicate whether 1 frame + has been decoded or not. + @see GFMXDECTABLE::MxDecGetStatus */ +#define GF_DECODER_FRAME_DONE 0x00000010 + + /** Argument pStatus in GFMxDecGetStatus() : GFMxDecGetStatus() can be called by the application to indicate whether post-processing + engine is done with the frame or not. + @see GFMXDECTABLE::MxDecGetStatus */ +#define GF_DECODER_PP_FRAME_DONE 0x00000020 + + /****************************************************************************************************/ + /** GFMxDecSet::uiFeature : Application sets this attribute to register a callback function and + its correpnding parameter to read bitstream data */ +#define MXDEC_SET_READBITSTREAM 1 + + /** GFMxDecSet::uiFeature Application needs to set this flag in order to send MPEG4 bitstream data in Prefill Mode; + When this is set: + - application does not need to register any bitstream-read callback function as data will be fed upfront. + - application needs to set an attribute MXDEC_ATTR_PRE_DETERMINED_BOUNDARY to indicate that data will be fed on frame boundary. + @see GFMXDECTABLE::MxDecSet */ +#define GFMXDEC_OPTION_PREFILLBUFFER 0x00000002 + + /****************************************************************************************************/ + /** Structure holding the callback function pointer. + Used in registering the callback function + The callback function is a function which the API calls to request a portion of the bit stream from the application. + @see GFMXDECTABLE::MxDecSet + */ + typedef struct _GFMXDECCALLBACK + { + void *pPara; /**< pPara is a parameter passed from application and the application + wants the API to callback with this parameter. */ + NvU32 (*pCallBack)(void * pPara, NvU8 ** ppBuffer, NvS32 * BufferLength, NvU32 uFlag); + /**< + Application callback function pointer. + Register a callback function for fetching MPEG stream data. + + If application set MXDEC_ATTR_PRE_DETERMINED_BOUNDARY, application should + return MXDEC_BOUNDARY_REACHED when the boundary is detected. + If APP does not set MXDEC_ATTR_PRE_DETERMINED_BOUNDARY, 0 should be returned. + + @param *pPara Parameter to pass on to application callback function + @param ppBuffer Buffer Pointer + @param BufferLength Parameter to pass on to application callback function + @param uFlag Flag for reading bitstream backward/forward. + + + + + +
      #MXDEC_READ_BITSTREAM_FORWARDRead bitstream in forward direction
      #MXDEC_READ_BITSTREAM_BACKWARDRead bitstream in backward direction
      + + @retval The number of bytes read successfully, 0 if no bytes read. + */ + }GFMXDECCALLBACK, *PGFMXDECCALLBACK; + + /****************************************************************************************************/ + /** Returned by application when MXDEC_ATTR_PRE_DETERMINED_BOUNDARY is set and boundary is detected. */ +#define MXDEC_BOUNDARY_REACHED 0x00000001 + + // for backward/forward reading bitstream flags + /** Read bitstream in forward direction. + @see GFMXDECCALLBACK + */ +#define MXDEC_READ_BITSTREAM_FORWARD 0x00000002 + + /** Read bitstream in backward direction. + @see GFMXDECCALLBACK + */ +#define MXDEC_READ_BITSTREAM_BACKWARD 0x00000003 + + /****************************************************************************************************/ + //uiVOLinfo + /** GFMXDECMP4SETVOL::uiVOLinfo : If set indicates that VOL is in short header format. + @see GFMXDECMP4SETVOL*/ +#define MXDEC_MP4_SET_SHORT_HEADER 0x00000001 + + /****************************************************************************************************/ + /** This structure hold information of the PreFill buffer. + */ + typedef struct _GFMXDECPREFILLBUFFER + { + NvU8* pPreFillBuffer; /**< Input, Prefill buffer pointer filled by application. */ + NvU32 PreFillBufferLength; /**< Input, Length of pref-fill buffer. */ + NvU32 PreFillBufferBytesConsumed; /**< Output, Amount of bytes consumed by the component. */ + NvU32 prefill_enabled; /**< Flag to identify if prefill buffer is supplied by application. */ + } GFMXDECPREFILLBUFFER; + + /****************************************************************************************************/ + /** This structure hold the information needed for decoding a Video Object Layer (VOL). + @see GFMXDECTABLE::MxDecMP4DecVOL */ + typedef struct _GFMXDECMP4DECVOL + { + NvU32 uiVOLinfo; /**< Indicates format of the VOL. Set by API. */ + /**< + + + + + + + + + + + + + + + + + + +
      #MXDEC_MP4_SHORT_HEADERShort header format detected
      #MXDEC_MP4_DATA_PARTITIONData Partitioning mode detected
      #MXDEC_MP4_PROFILE_LEVELProfile and level field is valid
      #MXDEC_MP4_PRIORITYPriority field is valid
      #MXDEC_MP4_VSOTYPEVisual object type field is valid
      #MXDEC_MP4_VIDEO_SIGNALVideoFormat and VideoRange fields are valid
      #MXDEC_MP4_COLOR_DESCRIPTIONColor, Transfer and Matrix fields are valid
      #MXDEC_MP4_VOIDVObjectID field is valid
      #MXDEC_MP4_VOLIDVOLID field is valid
      + */ + NvU32 uiWidth; /**< Display width, set by API */ + NvU32 uiHeight; /**< Display height, set by API */ + unsigned int Profile; /**< Mpeg4 Profile. Set by API.*/ + /**< + + +
      #MXDEC_MP4_SIMPLE_PROFILEProfile is simple profile
      #MXDEC_MP4_ADVANCE_SIMPLE_PROFILEProfile is advance simple profile
      + */ + unsigned int Level; /**< Mpeg4 Level. Set by API. */ + unsigned int VObjectID; /**< Video Object ID. Set by API. */ + unsigned int VOLID; /**< Video Object Layer ID. Set by API. */ + unsigned int Priority; /**< Priority(of what (???)). Set by API. */ + unsigned int VSOType; /**< VSO(full form(???)) Type. Set by API. */ + unsigned int VideoFormat; /**< Video Format (what are the possible values (???)). Set by API. */ + unsigned int VideoRange; /**< Video Range. Set by API. */ + unsigned int Color; /**< Color primaries. */ + unsigned int Transfer; /**< Transfer charateristics. */ + unsigned int Matrix; /**< Matrix coefficients(???). */ + GFMXDECPREFILLBUFFER prefill; + }GFMXDECMP4DECVOL, *PGFMXDECMP4DECVOL; + + /****************************************************************************************************/ + //uiVOLinfo + /** GFMXDECMP4DECVOL::uiVOLinfo : Short header format detected. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_SHORT_HEADER 0x00000001 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Data Partitioning mode detected. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_DATA_PARTITION 0x00000002 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Profile and level field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_PROFILE_LEVEL 0x00000004 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Priority field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_PRIORITY 0x00000008 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Visual object type field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_VSOTYPE 0x00000010 + + /** GFMXDECMP4DECVOL::uiVOLinfo : VideoFormat and VideoRange fields are valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_VIDEO_SIGNAL 0x00000020 + + /** GFMXDECMP4DECVOL::uiVOLinfo : Color, Transfer and Matrix fields are valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_COLOR_DESCRIPTION 0x00000040 + + /** GFMXDECMP4DECVOL::uiVOLinfo : VObjectID field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_VOID 0x00000080 + + /** GFMXDECMP4DECVOL::uiVOLinfo : VOLID field is valid. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_VOLID 0x00000100 + + /****************************************************************************************************/ + //Profile + /** GFMXDECMP4DECVOL::Profile : Profile is simple profile. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_SIMPLE_PROFILE 0x00000000 + + /** GFMXDECMP4DECVOL::Profile : Profile is advance simple profile. + @see GFMXDECMP4DECVOL, GFMXDECTABLE::MxDecMP4DecVOL */ +#define MXDEC_MP4_ADVANCE_SIMPLE_PROFILE 0x00000009 + + /****************************************************************************************************/ + //resync options + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next nearest VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEAREST_VOL 0x1 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next nearest VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEAREST_VOP 0x2 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next nearest I-VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEAREST_I_VOP 0x4 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEXT_VOL 0x8 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEXT_VOP 0x10 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to next I-VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_FORWARD_NEXT_I_VOP 0x20 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous nearest VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_NEAREST_VOL 0x40 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous nearest VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_NEAREST_VOP 0x80 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous nearest I-VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_NEAREST_I_VOP 0x100 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous VOL. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_PREVIOUS_VOL 0x200 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_PREVIOUS_VOP 0x400 + + /** Argument ResyncOption for GFMXDECTABLE::MxDecMP4DecResync : Resync to previous I-VOP. + @see GFMXDECTABLE::MxDecMP4DecResync */ +#define MXDEC_MP4_RESYNC_BACKWARD_PREVIOUS_I_VOP 0x800 + + /****************************************************************************************************/ + /** This structure hold the information needed for decoding a Video Object Plane (VOP). + @see GFMXDECTABLE::MxDecMP4DecVOP */ + typedef struct _GFMXDECMP4DECVOP + { + PGFRMSURFACE pRef; /**< Reference VOP, ignore this item, if current VOP is an I. Set by application. */ + PGFRMSURFACE pCur; /**< Current VOP. Set by application. */ + PGFRECT pRefRect; /**< Reference rectangle. Set by application. + pRefRect specifies a rectangle area for GFMxDec to reference the reference image. + This rectangle area should be within the pRef surface. The rectangle top, left should + be aligned by application. Application should call GFMxDecGetAttribute() with + MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT and MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT + attributions to get the required alignment. This rectangle's width and height should + exactly match with the image width and height which has been coded in bit stream. If + pRefRect is NULL, GFMxDec will use pRef surface width and height as reference image dimension. + */ + PGFRECT pCurRect; /**< Current rectangle. Set by application. + pCurRect specifies a rectangle area for GFMxDec to output the decoded image. + This field only take effect when MXDEC_MP4_DEC_VOP_SPECIFY_REFSURF_RECT flag is set. + This rectangle area should be within the pCur surface. The rectangle top, left should be + aligned by application. Application should call GFMxDecGetAttribute() with + MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT and MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT + attributions to get the required alignment. This rectangle's width and height should exactly + match with the image width and height which has been coded in bit stream. If pCurRect is NULL, + GFMxDec will use pCur surface dimension as decoded image dimension. + */ + NvU32 uiVOPinfo; /**< Get current VOP information. Set by API. + + +
      #MXDEC_MP4_VOP_PVOP is coded as P-VOP
      #MXDEC_MP4_NOT_CODEDVOP is not coded
      (???)What about I-VOP?(???)
      + */ + NvU32 uiTimeStamp; /**< Time to display this VOP, in milliseconds. Set by API. */ + NvU8 *pMBInfo; /**< Pointer to array where information of whether the MB is decoded or not is stored. + Each element will tell if this corresponding MB is wrong. Set by API. */ + NvU32 uiVOPOption; /**< Must be used to set ASYNC option */ + + GFMXDECPREFILLBUFFER prefill; + }GFMXDECMP4DECVOP, *PGFMXDECMP4DECVOP; + + /** GFMXDECMP4DECVOP::uiVOPOption: enables ASYNC mode. GFMxDecMP4DecVOP() + will return after pushing the commands but without waiting for them to + complete. This option is useful to achieve some paralellism because + decoded frame is usually not used right away for rendering. So + there is enough time for hardware to complete the decoding before this + frame will be used by app. It is ok to call PostProcessing even when + decoding of this frame is not complete. Inside GPU, hardware synchronizes + with the decoder. */ +#define MXDEC_MP4DECVOP_OP_ASYNC 0x00000001 + + + /****************************************************************************************************/ + //uiVOPinfo + /** GFMXDECMP4DECVOP::uiVOPinfo : VOP is coded as P-VOP. + @see GFMXDECMP4DECVOP */ +#define MXDEC_MP4_VOP_P 0x00000001 + + /** GFMXDECMP4DECVOP::uiVOPinfo : VOP is not coded. + @see GFMXDECMP4DECVOP */ +#define MXDEC_MP4_NOT_CODED 0x00000002 //Not coded VOP + + /****************************************************************************************************/ + //when GF_ERROR is return check the following flag + /** This flag is set when atleast one MB is wrong. If application has setup pMBinfo, it can check which MB is wrong. */ +#define MXDEC_MP4_BAD_MB 0x00010000 + + /****************************************************************************************************/ + +#define MXDEC_ATTR_PRE_DETERMINED_BOUNDARY 0x00000001 + /**< MxDecAPI Attribute : Application will determine the decoding boundary, for MPEG4, this boundary means VOL + and VOP boundary. For certain file formats, those boundary information are stored in the video file, application + can easily use those information to determine the boundary. If APP wants API to detect the boundary, application + should not disable this attribute. This is mainly for streaming case, where application does not have those handy + boundary information. API will automatically detect those boundaries. Application does not need to parse the + bitstream to detect those boundaries.\n + Value to be passed to GFMxDecSetAttribute for setting this attribute: + +
      *pInfo == 1Application will determine the decoding boudary
      *pInfo == 0Application will not determine the decoding boudary
      + @see GFMXDECTABLE::MxDecSetAttribute + */ + +#define MXDEC_ATTR_MP4_DEC_VOP_RECT_TOP_ALIGNMENT 0x00000002 + /**< MxDecAPI Attribute : This attribute only can be used for GFMxDecGetAttribute. If application wants to set pDestRect + in GFMXDECVOP or GFMXDECMP4DECVOP, application must use this attribute to get alignment information and align the rectangle + top & left corner accordingly. Value returned by GFMxDecGetAttribute:\n + *pInfo: Top field alignment in term of lines + @see GFMXDECTABLE::MxDecGetAttribute + */ + +#define MXDEC_ATTR_MP4_DEC_VOP_RECT_LEFT_ALIGNMENT 0x00000003 + /**< MxDecAPI Attribute : This attribute only can be used for GFMxDecGetAttribute. If application wants to set pDestRect + in GFMXDECVOP or GFMXDECMP4DECVOP, application must use those attributes to get alignment information and align the rectangle + top & left corner accordinately. Value returned by GFMxDecGetAttrubute:\n + *pInfo: left field alignment in term of pixels + @see GFMXDECTABLE::MxDecGetAttribute + */ + +#define GF_MXDEC_ATTR_DEC_ENABLE_RAISE_WAIT 0x00000004 + /**< MxDecAPI Attribute : This attribute only can be used for GFMxDecSetAttribute. + Value passed to GFMxDecSetAttribute:\n + + + + + +
      *pInfo == 1Raisevectors are allocated per Surface.\n + There will be 2 (3 if PostProcessing is ON) sets of raise-wait happening\n + 1) Decoder raises On_Frame_Decoded, and VxBlt waits.\n + 2) (If enabled in APP) PostProcessing API raises On_PP_Frame_Done, and VxBlt waits.\n + 3) VxBlt raises On_Bltted, and Decoder waits.
      *pInfo == 0 (Default)We do not allocate surface raise vectors but a single raise vector.\n + 1) In Decoder, we poll Frame_done, and return only after its done.\n + 2) In PostProcessing we poll PP_Frame_done, and return only after its done.\n + 3) It is observed that Frame_done & PP_Frame_done bits are affected only if raise is done on those.\n + Thats why single raise vector is still needed. This raise vector is not in any suface but in MxDecHandle.
      + @see GFMXDECTABLE::MxDecSetAttribute + */ + +#define MXDEC_ATTR_DISABLE_EC 0x00000005 + /**< MxDecAPI Attribute : Application can disable Error Concealment (EC) by setting this attribute. By default, EC is enabled. + Decoder has The Error Robustness (ER) and Concealment (EC) for mpeg4 decoding. + + Error Robustness (Always ON) : + The ER means the code will detect any error in the bitstream at proper places and will still proceed ahead for decoding the + remaining stream, for posible non-errored data. + + Error Concealment (Default ON): Can be disabled by this very attribute MXDEC_ATTR_DISABLE_EC. + EC means, the decoder will try to use previously decoded information to simulate the lost data. The below steps of EC: + + Lost Motion Vector recovery and concealment: + 1. Rational interpolation: Predict the lost MV from the current frame + 2. Use MV from prev frame + 3. Use MV from step 3 and 4, to reconstruct 2 sets of the texture data for lost MB. + + @see GFMXDECTABLE::MxDecSetAttribute */ + +#define MXDEC_ATTR_MP4_DEC_GET_MBERR_MAP_MATRIX 0x00000006 + /**< MxDecAPI Attribute : This attribute only can be used for GFMxDecGetAttribute. If application wants to get MB error map for + till recently decoded frame. Input parameter is a character array pMBErrMapMatrix of size "number of MBs in a frame". On returning + this call fills this char array with 1s & 0s. 1: MB correctly decoded & 0: MB corrupted. This is cumulative err map till this call + is made. In this API call after copying the err map to the char array, internal map is resit to all clean MBs. \n + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU8 * pMBErrMapMatrix
+
      + @see GFMXDECTABLE::MxDecGetAttribute + */ + + /****************************************************************************************************/ + + /** Typesafe function for opening this component. + + @param hRm (GFRmHandle) Handle specific to Resource Manager API + @param phMxDec (GFMxDecHandle *) Pointer to handle specific to MxDecAPI + @param state (GF_STATE_TYPE) The state is used to decide if a new ChHandle is to be allocated for MxDec component or not. + The values that state can take are: + + + +
      #GF_STATE_DEFAULT
      #GF_STATE_NEW_OR_SHARE
      #GF_STATE_NEW_ONLY
      #GF_STATE_SHARE_ONLY
      + + @param hCh (GFRmChHandle) Resource Manager Channel Handle + + @retval GF_SUCCESS : If successful + @retval GF_ERROR : If error occured + */ + /**< Typesafe functions for opening and closing this component. + This API also checks for hardware resources needed through GFRmHwResourceConstraint(). + Trying to open a second video instance will fail due to existing open context. + */ + +GF_RETTYPE GFMxDecOpen(GFRmHandle hRm, GFMxDecHandle *phMxDec, + GF_STATE_TYPE state, GFRmChHandle hCh); + + /** Typesafe function for opening this component. + + @param phMxDec (GFMxDecHandle *) Pointer to handle specific to MxDecAPI + + Close the video instance. + */ +void GFMxDecClose(GFMxDecHandle *phMxDec); + +GF_RETTYPE GFMxDecGetProperty (GFMxDecHandle MxHandle, PGFPROPERTY pMXProp); +GF_RETTYPE GFMxDecPostProcessing (GFMxDecHandle pdec, PGFMXDECPP pP); +GF_RETTYPE GFMxDecSetAttribute (GFMxDecHandle pdec, NvU32 uiFeature, NvU32 *pInfo); +GF_RETTYPE GFMxDecGetAttribute (GFMxDecHandle pdec, NvU32 uiFeature, NvU32 *pInfo); +GF_RETTYPE GFMxDecSet (GFMxDecHandle pdec, NvU32 uiFeature, void *pInfo); +GF_RETTYPE GFMxDecMP4DecVOL (GFMxDecHandle pdec, PGFMXDECMP4DECVOL pVOL); +GF_RETTYPE GFMxDecMP4DecVOP (GFMxDecHandle pdec, PGFMXDECMP4DECVOP pVOP); +GF_RETTYPE GFMxDecMP4DecResync (GFMxDecHandle pdec, NvU32 ResyncOption); + + //return value +#define GFMXDEC_ERROR_NOT_SUPPORT_FORMAT (GFMXD_ERROR | 0x00000001) + /**< This error is returned when the input file format is not supported by the decoder. */ +#define GFMXDEC_ERROR_HEADER_DAMAGED (GFMXD_ERROR | 0x00000002) + /**< This error is returned when the header of the mpeg4 stream is damaged. */ +#define GFMXDEC_ERROR_NO_VOL_HEADER (GFMXD_ERROR | 0x00000003) + /**< This error is returned when no Video Object Layer (VOL) header is detected. */ +#define GFMXDEC_ERROR_NOT_ENOUGH_SYSTEM_MEM (GFMXD_ERROR | 0x00000004) + /**< This error is returned when system is out of memory. */ + + //return value +#define GFMXDEC_ERROR_DETECTED_VOL (GFMXD_ERROR | 0x00000005) + /**< This error is returned when VOL was detected while decoding VOP. */ +#define GFMXDEC_ERROR_END_OF_FILE (GFMXD_ERROR | 0x00000006) + /**< This error is returned when end of file is reached. */ +#define GFMXDEC_ERROR_CORRUPTED_VOP (GFMXD_ERROR | 0x00000007) + /**< This error is returned when the VOP is corrupted and cannot be recovered. */ + + //return value +#define GFMXDEC_ERROR_RESYNC_END_OF_FILE (GFMXD_ERROR | 0x00000008) + /**< This error is returned when end of file is reached while looking for resync marker. */ +#define GFMXDEC_ERROR_RESYNC_DETECTED_VOL (GFMXD_ERROR | 0x00000009) + /**< This error is returned when a VOL start is detected while searching for VOP resync marker. */ +#define GFMXDECMP4_DSP_TIMEOUT (GFMXD_ERROR | 0x00000010) + /**< This error is returned when DSP does not return anything for a predetermined timeout period. This error indicates possibility of DSP hang. */ +#define GFMXDEC_ERROR_START_CODE (GFMXD_ERROR | 0x00000011) + /**< This error is returned when no start code is found in a chunk of data. */ + + /*@}*/ + + /** @page pageMxDecAppNotes MxDecAPI Application Notes + @section pageMxDecAppNotes1 Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start + GFSDK usage. + + + 1. Initialize the display panel by using GFRmIxInit().\n + + 2. Open the display component by calling GFDxOpen() to get the GFMxDecAPI Dxhandle.\n + + 3. Initialize the display start address, stride and bits per pixel using GFDxSetDisplay().\n + + 4. Get the various attributes of the display panel (width, height, etc) using GFDxGetAttribute().\n + + 5. For clearing the screen, open the graphics component using GFGxOpen() and use GFGxFillRect() for filling the screen with + some color (say, black).\n + + 6. Open the FDev component for performing file I/O using GFFDevOpen() and mount it using GFFDevMount().\n + + 7. Open the Vx component using GFVxOpen() and get the GFVxAPI VxHandle. \n + + 8. Query the properties with GFVxGetProperty() to see whether this GFVxAPI version supports MPEG decoding.\n + + 9. If it supports MPEG decoding, call GFMxDecOpen() to get the GFMxDecAPI MxHandle.\n + + 10. Call GFMxDecGetProperty() to query properties. Check whether this GFMxDAPI version can support the desired + MPEG profile and level.\n + + 11. If the properties check out, call GFRmSurfaceAlloc() to allocate at least one reference surface and one + current surface for decoding purposes.\n + + 12. If the postprocessing engine is needed, allocate one surface to hold the postprocessing results.\n + + 13. For display purposes, the decoder application could call GFVxBlt() for the following two scenarios. \n + (a) Performing color space conversion and then a stretch blit to the primary surface directly. \n + (b) Blitting to the overlay surface.\n + Please refer to the latest GFVxAPI document for additional information. \n + + 14. The decoder application should decode VOP-by-VOP. Call GFMxDecSetVOP() to set up the VOP’s characteristics.\n + + 15. After the decoder application has decoded enough macroblocks, call GFMxDecSetMBs() to trigger the hardware + to decode those macroblocks until all macroblocks in the current VOP are finished. GFMxDecSetMBs() may initiate + the postprocessing engine or video engine automatically.\n + + 16. Before exiting the application, the decoder application should call GFRmSurfaceFree() to free the surfaces + that have been allocated. \n + + 17. Call GFMxClose() with the MxHandle to release the resources of the decoder module.\n + + 18. Similarly, call the close functions of the other components which have been opened.\n + + */ + +#ifdef __cplusplus +} // only need to export C interface if +// used by C++ source code +#endif + +#endif + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecH264.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecH264.h new file mode 100755 index 00000000..351ca7ca --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecH264.h @@ -0,0 +1,1536 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. +* +* NVIDIA Corporation and its licensors retain all intellectual property +* and proprietary rights in and to this software, related documentation +* and any modifications thereto. Any use, reproduction, disclosure or +* distribution of this software and related documentation without an +* express license agreement from NVIDIA Corporation is strictly prohibited. +*/ + +/** @file GFMxDecH264.h +GFSDK H264 Decode API header file. +*/ + +#ifndef _GF_MPEG_DEC_H264__ +#define _GF_MPEG_DEC_H264__ + +#include "nvtypes.h" +#include "GFVx.h" +#include "GFDef.h" + +#ifdef __cplusplus +extern "C" { +#endif + + /** @addtogroup groupMxDecH264 MxDecH264API H264 Decode API + + The H.264/AVC decoder API handles H.264/AVC baseline-compliant bit + streams for this version, but has been defined to handle all of the three + profiles for future expansion. + + The H.264/AVC decoder API has two sets of API—a high level API and a low + level API. + + Using the High Level API + + The high level API has a built-in entropy decoder. It decodes the bit stream + and performs error concealment if the bit stream has an error. This high level + API calls the low level API internally. When using the high level API, the + application can ignore the low level API. + + The MxDecH264API high level functions include the following: + - GFMxDecH264DecSequence() + - GFMxDecH264DecPicture() + - GFMxDecH264Set() + - GFMxDecH264DecSEI() + - GFMxDecH264DecNewFrameNum() + + Using the Low Level API + + The low level API is essentially a macroblock decoder engine. It decodes + macroblock by macroblock. When using the low level API, the application + needs to handle the entropy decoding and error concealment. The low level + API assumes that the information passed from caller is correct, and does not + have any error concealment functionality build in. The application which + called the low level API must make sure that no macroblocks are missing for + any picture. + + The MxDecH264API low level functions include the following: + - GFMxDecH264SetSequence() + - GFMxDecH264SetPicture() + - GFMxDecH264SetSlice() + - GFMxDecH264SetMBs() + + Application Notes + +
        +
      • @ref pageMxDecH264AppNotes +
          +
        • @ref pageMxDecH264AppNotes1 +
        • @ref pageMxDecH264AppNotes2 +
        +
      + */ + /*@{*/ + + /** MxDecH264API property flag: Baseline profile supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_BASELINE 0x00000001UL + + /** MxDecH264API property flag: Main profile supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_MAIN 0x00000002UL + + /** MxDecH264API property flag: Extended profile supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_EXTENDED 0x00000004UL + + /** MxDecH264API property flag: LEVEL 1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL10 0x00000100UL + + /** MxDecH264API property flag: LEVEL 1.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL11 0x00000200UL + + /** MxDecH264API property flag: LEVEL 1.2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL12 0x00000400UL + + /** MxDecH264API property flag: LEVEL 1.3 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL13 0x00000800UL + + /** MxDecH264API property flag: LEVEL 2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL20 0x00001000UL + + /** MxDecH264API property flag: LEVEL 2.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL21 0x00002000UL + + /** MxDecH264API property flag: LEVEL 2.2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL22 0x00004000UL + + /** MxDecH264API property flag: LEVEL 3 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL30 0x00008000UL + + /** MxDecH264API property flag: LEVEL 3.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL31 0x00010000UL + + /** MxDecH264API property flag: LEVEL 3.2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL32 0x00020000UL + + /** MxDecH264API property flag: LEVEL 4 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL40 0x00040000UL + + /** MxDecH264API property flag: LEVEL 4.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL41 0x00080000UL + + /** MxDecH264API property flag: LEVEL 4.2 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL42 0x00100000UL + + /** MxDecH264API property flag: LEVEL 5 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL50 0x00200000UL + + /** MxDecH264API property flag: LEVEL 5.1 supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_LEVEL51 0x00400000UL + + /** MxDecH264API property flag: Post Processing de-blocking supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_DB 0x01000000UL + + /** MxDecH264API property flag: Post Processing de-ringing supported. + @see GFMxDecH264GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_H264_CAP_DR 0x02000000UL + + /** VUI Parameters for GFMXDECH264DECSEQUENCE + */ + typedef struct _GFMXDECH264DECVUI + { + NvU32 num_units_in_tick; + NvU32 time_scale; + NvU32 fixed_frame_rate_flag; + }GFMXDECH264DECVUI, *PGFMXDECH264DECVUI; + + /** Parameter structure for MxDecH264DecSequence(). + Both input and output parameters are passed via this structure to MxDecH264DecSequence(). + @see MxDecH264DecSequence() + */ + typedef struct _GFMXDECH264DECSEQUENCE + { + NvU32 uiSequenceOption; /**< Input flags, see GFMXDECH264_DECSEQUENCEOPTION_* */ + NvU32 SequenceInfo; /**< Output flags, see GF_MXDEC_H264_DEC_SEQUENCE_* */ + NvU16 profile_idc; /**< Output, H264 profile ID */ + NvU16 level_idc; /**< Output, H264 level ID */ + NvU16 seq_parameter_set_id;/** PicOrderCnt(CurrPic) + Greater than 1 specifies that the pan-scan rectangle information persists until + - A new coded video sequence begins + - A picture in an access unit containing a pan-scan rectangle SEI message with the + same value of pan_scan_rect_id is output having + (PicOrderCnt() > PicOrderCnt(CurrPic)) && (PicOrderCnt()<= PicOrderCnt(CurrPic) + pan_scan_rect_repetition_period ) + */ + } GFMXDECH264DECSEIPANSCAN, *PGFMXDECH264DECSEIPANSCAN; + + typedef struct _GFMXDECH264DECSEISUBSEQLAYER + { + NvU32 num_sub_seq_layers_minus1; /**< Output, Specifies the number of sub-sequence layers in the sequence */ + NvU32 accurate_statistics_flag; /**< Output, This flag when equal to 1 indicates that the values of average_bit_rate and + average_frame_rate are rounded from statistically correct values. + When equal to 0 indicates that the average_bit_rate and the average_frame_rate are estimates + and may deviate somewhat from the correct values. + */ + NvU32 average_bit_rate; /**< Output, Indicates the average bit rate in units of 1000 bits per second. */ + NvU32 average_frame_rate; /**< Output, Indicates the average frame rate in units of frames/(256 seconds). */ + } GFMXDECH264DECSEISUBSEQLAYER, *PGFMXDECH264DECSEISUBSEQLAYER; + + typedef struct _GFMXDECH264DECSEISUBSEQ + { + NvU32 sub_seq_layer_num; /**< Output, Identifies the sub-sequence layer number of the target sub-sequence */ + NvU32 sub_seq_id; /**< Output, Identifies the target sub-sequence. */ + NvU32 duration_flag; /**< Output, Equal to 0 indicates that the duration of the target sub-sequence is not specified. */ + NvU32 sub_seq_duration; /**< Output, Specifies the duration of the target sub-sequence in clock ticks of a 90-kHz clock. */ + NvU32 average_rate_flag; /**< Output, equal to 0 indicates that the average bit rate and the average frame rate of the target + sub-sequence are unspecified + */ + NvU32 accurate_statistics_flag; /**< Output, Same as accurate_statistics_flag in _GFMXDECH264DECSEISUBSEQLAYER*/ + NvU32 average_bit_rate; /**< Output, Indicates the average bit rate in (1000 bits)/second of the target sub-sequence.*/ + NvU32 average_frame_rate; /**< Output, Indicates the average frame rate in units of frames/(256 seconds) of the target sub-sequence.*/ + NvU32 num_referenced_subseqs; /**< Output, Specifies the number of sub-sequences that contain pictures that are used as reference pictures + for inter prediction in the pictures of the target sub-sequence. + */ + NvU32 ref_sub_seq_layer_num; + NvU32 ref_sub_seq_id; + NvU32 ref_sub_seq_direction; /**< Output, ref_sub_seq_layer_num, ref_sub_seq_id, and ref_sub_seq_direction identify the sub-sequence + that contains pictures that are used as reference pictures for inter prediction in the pictures + of the target sub-sequence. + */ + } GFMXDECH264DECSEISUBSEQ, *PGFMXDECH264DECSEISUBSEQ; + + + + /** ulBitMask, ulBitpayloadType: Application will set the corresponding bit of ulBitMask depending upon its requirement of the + particular payload type of SEI Message. + H264 Decoder API will set the corresponding bit of ulBitpayloadType depending upon the availability of the + particular payload type indicated by ulBitMask flag in the SEI NAL unit. + + @see ulBitpayloadType, ulBitMask in _GFMXDECH264DECSEI + */ + + /** Bit 0: SEI message for buffering period. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_BUFFERING_PERIOD 0x00000001UL + + /** Bit 1: SEI message for picture timing. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_PICTURE_TIMING 0x00000002UL + + /** Bit 2: SEI message for Pan Scan Rect. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_PAN_SCAN 0x00000004UL + + /** Bit 11: SEI message for Sequence Layer Characterization. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_SEQ_LAYER_CHARECTERIZATION 0x00000800UL + + /** Bit 12: SEI message for Sequence Characterization. + */ +#define GF_MXDEC_H264_SEI_MESSAGE_SEQ_CHARECTERIZATION 0x00001000UL + + /** Parameter structure for MxDecH264DecSEI(). + Both input and output parameters are passed via this structure to MxDecH264DecSEI(). + @see MxDecH264DecSEI() + */ + typedef struct _GFMXDECH264DECSEI + { + NvU32 payloadType; /**< Output, Specifies the type of SEI payload */ + NvU32 payloadSize; /**< Output, Specifies the number of bytes in SEI payload */ + GFMXDECH264DECSEIBUFFERINGPERIOD buffperiod; /**< Output, Complete information after parsing the buffering period message of SEI NAL unit + GFMXDECH264DECSEIBUFFERINGPERIOD structure + */ + GFMXDECH264DECSEIPICTIMING pictiming; /**< Output, Complete information after parsing the pic_timing message of SEI NAL unit + GFMXDECH264DECSEIPICTIMING structure + */ + GFMXDECH264DECSEIPANSCAN panscan; /**< Output, Complete information after parsing the Pan Scan message of SEI NAL unit + GFMXDECH264DECSEIPANSCAN structure + */ + GFMXDECH264DECSEISUBSEQLAYER subseqlayer; /**< Output, Complete information after parsing the sub-Seqlayer message of SEI NAL unit + GFMXDECH264DECSEISUBSEQLAYER structure + */ + GFMXDECH264DECSEISUBSEQ subseq; /**< Output, Complete information after parsing the sub-Seqlayer message of SEI NAL unit + GFMXDECH264DECSEISUBSEQ structure + */ + NvU8 *pPreFillBuffer; /**< Input, Pointer bitstream for sequence header to decode */ + NvU32 PreFillBufferLength;/**< Input, Length of bitstream in bytes, must cover the entire sequence header */ + NvU32 ulBitpayloadType; /**< Output, Each Bit Informs a particular SEI message required by the application + so that the H264 decoder only parses that message related data stream + */ + NvU32 ulBitMask; /**< Input, Each Masking Bit indicated which information is required by the application */ + } GFMXDECH264DECSEI, *PGFMXDECH264DECSEI; + + /** GFMXDECH264DECSEQUENCE::SequenceInfo ouput flagbit: constraint_set0_flag is on in the bitstream. + */ +#define GF_MXDEC_H264_DEC_SEQUENCE_CONSTRAINT_SET0_FLAG 0x00000001 + + /** GFMXDECH264DECSEQUENCE::SequenceInfo ouput flagbit: constraint_set1_flag is on in the bitstream. + */ +#define GF_MXDEC_H264_DEC_SEQUENCE_CONSTRAINT_SET1_FLAG 0x00000002 + + /** GFMXDECH264DECSEQUENCE::SequenceInfo ouput flagbit: constraint_set2_flag is on in the bitstream. + */ +#define GF_MXDEC_H264_DEC_SEQUENCE_CONSTRAINT_SET2_FLAG 0x00000004 + + /** GFMXDECH264DECSEQUENCE::SequenceInfo output flagbit: Frame cropping. + If this flag is set GFMXDECH264DECSEQUENCE::CroppingRect contains a valid + frame cropping rectangle. + */ +#define GF_MXDEC_H264_DEC_SEQUENCE_FRAME_CROPPING_FLAG 0x00000008 + + /** GFMXDECH264DECSEQUENCE::uiSequenceOption input flagbit: Bitstream is passed with GFMxDecH264DecSequence(). + If this flag is set bitstream data is passed with the call to GFMxDecH264DecSequence() + instead via the read bitstrem callback. This can be used only with boundary detection + on application level. The bitstream data is passed via GFMXDECH264DECSEQUENCE::pPreFillBuffer and + GFMXDECH264DECSEQUENCE::PreFillBufferLength. + */ +#define GFMXDECH264_DECSEQUENCEOPTION_PREFILLBUFFER 0x00000001 + +#define GFMXDECH264_MAX_NUM_REF_FRAMES 17 + typedef struct + { + NvU32 POC; + NvU8 isNotDisplayed; + NvU8 RetainDuringDPBFlush; + NvU8 status; + }GFMXDECH264_DPB_DATA; + + + /** Parameter structure for MxDecH264DecPicture(). + Both input and output parameters are passed via this structure to MxDecH264DecPicture(). + @see MxDecH264DecPicture() + */ + typedef struct _GFMXDECH264DECPICTURE + { + NvU32 uiPictureOption; /**< Input flagbits, see GF_MXDEC_H264_DEC_PICTURE_SPECIFY_*. */ + PGFRECT pPictureRect; /**< Input, Target rectangle. + GFMXDECH264DECPICTURE::pPictureRect specifies a rectangle on the + output surface for GFMxDec to output the decoded image. + + This field only take effect when MXDEC_H264_DEC_PICTURE_SPECIFY_SURF_RECT + flag is set. + + The rectangle must be within the surface. The rectangle's top and + left position must be aligned by application. Call GFMxDecGetAttribute() + with #MXDEC_ATTR_H264_DEC_PICTURE_RECT_TOP_ALIGNMENT and + #MXDEC_ATTR_H264_DEC_PICTURE_RECT_LEFT_ALIGNMENT to read the alignment + requirements. The rectangle's width and height must match the video frame + width and height as returned from MxDecH264DecSequence() in + GFMXDECH264DECSEQUENCE::pic_width and GFMXDECH264DECSEQUENCE::pic_height. + + Note: Feature not yet implemented. + */ + NvU32 uiPictureInfo; /**< Output flags, see GF_MXDEC_H264_DEC_PICTURE_*. */ + PGFRMSURFACE reconstructedSurf; /**< Output, Surface holding the decoded picture. + If frame is not decoded then reconstructedSurf will not get initialsed i.e. NULL + So VXBLT is called if the reconstructedSurf is not NULL. + */ + NvU32 uiPictureOrderCount; /**< Output */ + NvU32 uiTimeStamp; /**< Output, frame timestamp in miliseconds, valid only if GF_MXDEC_H264_DEC_PICTURE_TIME_STAMP set. */ + NvU8 * pMBInfo; /**< Output, each element tells the particular MB is wrong or not. */ + NvU32 UsedAsReference; /**< Output */ + NvU8* pPreFillBuffer; /**< Input, Pointer bitstream for frame to decode + The bitstream pointer needs to be 4-bytes aligned. + */ + NvU32 PreFillBufferLength; /**< Input, Length of bitstream in bytes, must cover the entire frame */ + NvU32 PreFillBufferBytesConsumed; /**< Output, Amount of bytes consumed by the component */ + NvU16 flushDPB; /**< Output, set to !=0 by the decoder when it encounters a memory_management_control_operation = 5 + indication in the bitstream. The application should display (if the + NoOutputofPriorPics flag is not set) and flush the entire DPB, i.e remove + all previously stored frames from DPB. + Current frame should not be displayed/flushed. + + See \a NoOutputofPriorPics for more info. + */ + NvU16 NoOutputofPriorPics; /**< Output, set by the decoder when it encounters a no_output_of_prior_pics_flag in + the bitstream. If this set, then flushDPB will also be set. The application + should flush the entire DPB, i.e remove all previously stored frames from DPB. + Current frame should not be displayed/flushed. + + Summary: + + + + + +
      NoOutputofPriorPicsflushDPBApplications response
      1 1 Remove all previously stored frames. No display.
      0 1 Display all previously stored frames and then remove from DPB.
      0 0 Normal operation of decoder.
      + */ + NvU32 ReconSurfaceNumber; /**< Index of reconstructed surface, this is an index into GFMXDECH264SURFLIST::surfList[]. + valid only if GFMXDECH264DECPICTURE::reconstructedSurf is not NULL. + Invalid for streams with picture reordering. + */ + GFMXDECH264_DPB_DATA dpb_data[GFMXDECH264_MAX_NUM_REF_FRAMES]; + } GFMXDECH264DECPICTURE, *PGFMXDECH264DECPICTURE; + + //uiPictureOption + + /** GFMXDECH264DECPICTURE::uiPictureOption input flagbit: Use target rectangle. + If this flag is set, the GFMXDECH264DECPICTURE::pPictureRect will point to + a rectangle on the output surface, where the reconstructed frame is placed. + */ +#define GF_MXDEC_H264_DEC_PICTURE_SPECIFY_SURF_RECT 0x00000001 + + /** GFMXDECH264DECPICTURE::uiPictureOption input flagbit: Bitstream is passed with MxDecH264DecPicture(). + If this flag is set bitstream data is passed with the call to MxDecH264DecPicture() + instead via the read bitstrem callback. This can be used only with frame boundary detection + on application level. The bitstream data is passed via GFMXDECH264DECPICTURE::pPreFillBuffer and + GFMXDECH264DECPICTURE::PreFillBufferLength. + */ +#define GF_MXDEC_H264_DEC_PICTURE_SPECIFY_PREFILLBUFFER 0x00000002 + + //PictureInfo: + + /** GFMXDECH264DECSEQUENCE::PictureInfo output flagbit: Current picture is IDR. + */ +#define GF_MXDEC_H264_DEC_PICTURE_IDR 0x00000001 + + /** GFMXDECH264DECSEQUENCE::PictureInfo output flagbit: GFMXDECH264DECSEQUENCE::uiTimeStamp field is valid. + */ +#define GF_MXDEC_H264_DEC_PICTURE_TIME_STAMP 0x00000002 + + /** GFMXDECH264DECSEQUENCE::PictureInfo output flagbit: Decoded picture has at least one corrupted macroblock. + */ +#define GF_MXDEC_H264_DEC_PICTURE_BAD_MB 0x00000004 + + /** GFMXDECH264DECSEQUENCE::PictureInfo output flagbit: + Required by the application to decide whether post processing should be applied for a particular frame + DeblockingFlag is set, when Deblocking Filtering is disabled for all the slices + DeblockingFlag is reset even if deblocking filtering is enabled for atleast one slice + */ +#define GF_MXDEC_H264_DEC_PICTURE_DEBLOCKING_FILTER 0x00000008 + + typedef struct _GFMXDECH264SEQUENCE + { + NvU32 SequenceInfo; + NvU16 pic_width_in_mbs_minus1; + NvU16 pic_height_in_map_units_minus1; + } GFMXDECH264SEQUENCE, *PGFMXDECH264SEQUENCE; + //PictureInfo: +#define GF_MXDEC_H264_SEQUENCE_FRAME_MB_ONLY_FLAG 0x00000001 + //if frame_mb_only_flag is on, this flag must be on +#define GF_MXDEC_H264_SEQUENCE_MB_ADAPTIVE_FRAME_FIELD_FLAG 0x00000002 + //if mb_adaptive_frame_filed_flag is on, this flag must be on +#define GF_MXDEC_H264_SEQUENCE_DIRECT_8X8_INFERENCE_FLAG 0x00000004 + //if direct_8x8_inference_flag is on, this flag must be on + + + typedef struct _GFMXDECH264PICTURE + { + NvU32 PictureInfo; + PGFRMSURFACE reconstructedSurf; //surface to hold the decoded picture + PGFRECT pRect; + NvU8 weighted_bidpred_idc; + NvS8 chroma_qp_index_offset; + } GFMXDECH264PICTURE, *PGFMXDECH264PICTURE; + //PictureInfo: +#define GF_MXDEC_H264_PICTURE_WEIGHTED_PRED_FLAG 0x00000001 + //if weighted_pred_flag is on, this flag must be on +#define GF_MXDEC_H264_PICTURE_DEBLOCKING_FILTER_CONTROL_PRESENT_FLAG 0x00000002 + //if deblocing_filter_control_present_flag is on, this flag must be on +#define GF_MXDEC_H264_PICTURE_CONSTRAINED_INTRA_PRED_FLAG 0x00000004 + //if constrained_intra_pred_flag is on, this flag must be on +#define GF_MXDEC_H264_PICTURE_IDR 0x00000008 +#define GF_MXDEC_H264_PICTURE_SPECIFY_SURFACE_RECT 0x00000010 + // If this flag is set, pRect must be set. GFMxDec will reference image + // in pRect area of reference surface and output the decoded image in + // the pRect area of reconstructedSurf. Otherwise, GFMxDec will use + // the whole surface area. + + + typedef struct _GFMXDECH264WEIGHT + { + NvS8 luma_weight; + NvS8 luma_offset; + NvS8 Cb_weight; + NvS8 Cb_offset; + NvS8 Cr_weight; + NvS8 Cr_offset; + } GFMXDECH264WEIGHT, *PGFMXDECH264WEIGHT; + + + + typedef struct _GFMXDECH264SLICE + { + NvU32 SliceInfo; + NvU16 first_mb_in_slice; + NvU16 reserved; + NvU8 slice_type; + NvU8 num_ref_idx_l0_active_minues1; + NvU8 num_ref_idx_l1_active_minues1; + NvU8 disable_deblocking_filter_idc ; + NvU8 slice_alpha_c0_offset_div2; + NvU8 slice_beta_offset_div2; + PGFRMSURFACE ref_l0_surfaces[16]; + PGFRMSURFACE ref_l1_surfaces[16]; + GFMXDECH264WEIGHT weighttableL0[16]; + GFMXDECH264WEIGHT weighttableL1[16]; + } GFMXDECH264SLICE, *PGFMXDECH264SLICE; + //SliceInfo: +#define GF_MXDEC_H264_SLICE_FILED_PIC_FLAG 0x01 + //when filed_pic_flag is on, this flag must be set +#define GF_MXDEC_H264_SLICE_BOTTOM_FILED_FLAG 0x02 + //when bottom_field_flag is on, this flag must be set +#define GF_MXDEC_H264_SLICE_DIRECT_SPATIAL_MV_PRED_FLAG 0x04 + //when DIRECT_SPATIAL_MV_PRED_FLAG is on, this flag must be set + + + typedef struct _GFMXDECH264I4X4LPREDMODE + { + NvU32 uiPredMode0to7; //Luma4X4 Blk 0 to 7's prediction modes. + NvU32 uiPredMode8to15; //Luma4X4 Blk 8 to 15's prediction modes. + } GFMXDECH264I4X4LPREDMODE, *PGFMXDECH264I4X4LPREDMODE; + + typedef struct _GFMXDECH264MV + { + NvS16 Horizontal; + //Horizonal motion vector component. + NvS16 Vertical; + //Vertical motion vector component + } GFMXDECH264MV, *PGFMXDECH264MV; + + + typedef struct _GFMXDECH264REFIDX + { + NvU8 Ref_idx_l0[4]; //PartIdx's reference index + NvU8 Ref_idx_l1[4]; //PartIdx's reference index + } GFMXDECH264REFIDX, *PGFMXDECH264REFIDX; + + + typedef struct _GFMXDECH264SUBMBTYPE + { + NvU8 sub_mb_type[4]; //PartIdx's sub_mb_type + } GFMXDECH264SUBMBTYPE, *PGFMXDECH264SUBMBTYPE; + + + typedef struct _GFMXDECH264MB + { + NvU16 uiTotalSize; + //Total size in bytes for current macroblock, including this structure + //itself and necessary following structure behind of this structure. + //Reference the data following GFMXDECH264MB. + NvU16 uiTotalCOEFs;// total Coefs for this macroblock + NvU32 curMBAddress; // current macroblock address + NvU8 MBInfo; + // this is the mb_type in bit stream and mb_field_decoding_flag + NvU8 uiQP; //this is QPy + NvU8 coded_block_pattern; + //This field is only valid when current macroblock is not Intra_16x16 + NvU8 Intra_chroma_pred_mode; + //This field is valid only when current macroblock is Intra + GFMXDECH264SUBMBTYPE sub_mb_type; + union + { + GFMXDECH264I4X4LPREDMODE I4X4LPredMode; //Intra_4X4 only + GFMXDECH264REFIDX RefIdx; //Inter only + } mode; // TODO: Name this better + NvS32 numCoefsPerSubMB[32]; + NvS16 index; + } GFMXDECH264MB, *PGFMXDECH264MB; + + //MBInfo: +#define GF_MXDEC_H264_MB_FILED_DECODING_ENABLE 0x80 + //when mb_field_decoding_flag is on, this flag must be set +#define GF_MXDEC_H264_MB_SKIP_MB 0x40 + //skip MB + + //The data following GFMXDECH264MB: + //If current macroblock is skipped macroblock, no further data is needed. + + //If current macroblock is IPCM, there are 384 bytes following GFMXDECH264MB. + + //If current macroblock is Inter macroblock, and is using picture list 0 only, + //necessary number of GFMXDECH264MV are following. If current macroblock is + //using picture list 1 only, necessary number of GFMXDECH264MV are following. + //If current macroblock is using both picture list 0 and list 1, necessary + //number of GFMXDECH264MV for list 0, and necessary number of GFMXDECH264MV + //for list 1 are following GFMXDECH264MB. + + //For both Intra and Inter macroblock, the last portion of data which follows + //GFMXDECH264MB is GFMXDECH264MB.uiTotalCOEFs of GFMXDECH264COEF. + + + + // definition for attribute + + /** GFMxDecH264 Attribute: Application will determine the decoding boundaries. + For H.264/AVC, this boundary means sequence and picture boundary. For certain file formats, + those boundary information are stored in a meta data file. Alternatively the application + could parse NAL unit boundaries from the H264 stream and determine decoding units. + If application wants GFMxDecH264 to detect the boundary, it should not enable this + attribute. + + If prefill mode (see #GFMXDECH264_DECSEQUENCEOPTION_PREFILLBUFFER) is used, + this attribute must be enabled. Disabled by default. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 1: APP will determine the decoding boudary
+    0: APP will not determine the decoding boundary
+
      + + @see GFMxDecH264GetAttribute(), GFMxDecH264SetAttribute() + */ +#define GF_MXDEC_H264_ATTR_PRE_DETERMINED_BOUNDARY 0x00000001 + + /** GFMxDecH264 Attribute: Enforce display ordering for sequences containing out of order frames. + + Disabled by default. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 !=0: Enable reordering
+    0: Disable reordering
+
      + + @see GFMxDecH264GetAttribute(), GFMxDecH264SetAttribute() + */ +#define GF_MXDEC_H264_ATTR_DISPLAY_REORDERING 0x00000002 + +#define GF_MXDEC_H264_ATTR_DSP_STREAM_BUFFERING 0x00000003 + //This Attribute only can be used for GFMxDecH264SetAttribute + //If the Application wants to set the mode DSP_STREAM_BUFFERING in H264Decoder, enable the #define DSP_STREAM_BUFFERING in App, + //then APP will enable the attribute by calling the GFMxDecH264SetAttribute. + //this attribute is used to pass the buffer details, from Application to the host side of GFSDK H264 component. + + /** GFMxDecH264 Attribute: Enable decode surface locking in MxDecH264DecPicture(). + + MxDecH264DecPicture() returns the decoded surface number in GFMXDECH264DECPICTURE::ReconSurfaceNumber, + which is an index into the decode surface list GFMXDECH264SURFLIST::surfList[] set via + #GF_MXDEC_H264_SET_SURFACE_LIST. If surface locking is enabled, MxDecH264DecPicture() will + automatically 'lock' the returned surface and exclude it from its list of + surfaces used for further decoding. GFMxDecH264 can still read from a locked surface + (for reference frames), but it will not overwrite it. The application must not + write into a locked surface, since it still may be used as reference frame. + + This locking mechanism is intended for usecases, where the application directly displays + the decode surface as video overlay. See also @ref pageMxDecH264AppNotes2 + + With surface locking enable, each successfully decoded surface has to be unlocked by the + application with GFMxDecH264Set / #GF_MXDEC_H264_SET_UNLOCK_SURFACE. + + Since locked surfaces cannot be used for decoding, the number of decoding surfaces + set with #GF_MXDEC_H264_SET_SURFACE_LIST must be R+1+N, where R is the maximum number of + reference frames and N the maximum number of simultaneously locked surfaces. + Otherwise MxDecH264DecPicture() may fail. + + Disabled by default. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 !=0: Enable surface locking
+    0: Disable surface locking
+
      + + @see GFMxDecH264GetAttribute(), GFMxDecH264SetAttribute(), GF_MXDEC_H264_SET_UNLOCK_SURFACE, @ref pageMxDecH264AppNotes2 + */ +#define GF_MXDEC_H264_ATTR_SURFACE_LOCKING 0x00000004 + + /** GFMxDecH264 Attribute: Get H264 decoder's DSP handle. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 DSP handle
+
      + + GFMxDecH264GetAttribute() returns error GFMXDECH264_ERROR_INVALID_STATE, if DSP side not initialized. + Can be get only. + + @internal + @see GFMxDecH264GetAttribute() + */ +#define GF_MXDEC_H264_ATTR_GETDSPHANDLE 0x00000005 + +#define GF_MXDEC_H264_ATTR_DEC_PICTURE_RECT_TOP_ALIGNMENT 0x00000007 + //This attribute only can be used for GFMxDecGetAttribute + //If application wants to set pDestRect in GFMXDECPICTURE or GFMXDECH264DECPICTURE, + //application must use this attributes to get allignment information and + //align the rectangle top & left corner accordinately. + //*pInfo: top fieled alignment in term of lines + +#define GF_MXDEC_H264_ATTR_DEC_PICTURE_RECT_LEFT_ALIGNMENT 0x00000008 + //This attribute only can be used for GFMxDecGetAttribute + //If application wants to set pDestRect in GFMXDECH264PICTURE or GFMXDECH264DECPICTURE, + //application must use those attributes to get allignment information and + //align the rectangle top & left corner accordinately. + //*pInfo: left fieled alignment in term of pixels + +#define GF_MXDEC_H264_ATTR_DEC_ENABLE_RAISE_WAIT 0x00000009 + /* + * This attribute only can be used for GFMxDecSetAttribute + * if (*pInfo == 1) + * { + * Raisevectors are allocated per Surface. + * There will be 2 (3 if PostProcessing is ON) sets of raise-wait happening + * 1) Decoder raises On_Frame_Decoded, and VxBlt waits. + * 2) (If enabled in APP) PostProcessing API raises On_PP_Frame_Done, and VxBlt waits. + * 3) VxBlt raises On_Bltted, and Decoder waits. + * } + * else // DEFAULT + * { + * We do not allocate surface raise vectors but a single raise vector + * - In Decoder, we poll Frame_done, and return only after its done + * - In PostProcessing we poll PP_Frame_done, and return only after its done + * - I observed that Frame_done & PP_Frame_done bits are affected only if raise is done on those. Thats why single raise vector is still needed. + * This raise vector is not in any suface but in pdec. + * } + */ + +#define GF_MXDEC_H264_ATTR_LEN_OF_NALSIZE 0x0000000a + /*To support the decoding of .264 stream where NAL size appears instead of StartCode + This is to get the length of the NAL size value*/ +#define GF_MXDEC_H264_ATTR_NALSIZE_DECODING 0x0000000b + /* To support runtime decision making between the start code decoding and NAL size decoding*/ + + + /** GFMxDecH264 Attribute: Indicate to the H264 decoder that surfaces have + already been allocated by the Application before the sps is decoded. + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 (Height << 16)| (Width)
+
      + + Can be set only. + */ +#define GF_MXDEC_H264_ATTR_SURFACE_ALLOCATED 0x0000000c + + /** GFMxDecH264 Attribute: Set number of maximum supported reference frames. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 Number of reference frames 
+
      + + This can be called before or after GFMxDecH264Set(GF_MXDEC_H264_SET_SURFACE_LIST). + The number of reference frames must be smaller than the number of surfaces + set via GFMxDecH264Set(GF_MXDEC_H264_SET_SURFACE_LIST). + + If this attribute is not set, the number of supported reference frames will be + equal to one less the number of surfaces set in GFMxDecH264Set(GF_MXDEC_H264_SET_SURFACE_LIST). + + Can be set only. + + @see GF_MXDEC_H264_SET_SURFACE_LIST + */ +#define GF_MXDEC_H264_ATTR_MAXREFFRAMES 0x0000000d + + /** GFMxDecH264 Attribute: Get Error Map Matrix for MBs in last decoded frame. + + This attribute only can be used for GFMxDecGetAttribute. If application wants to get MB error map for + till recently decoded frame. Input parameter is a character array pMBErrMapMatrix of size "number of MBs in a frame". On returning + this call fills this char array with 1s & 0s. 1: MB correctly decoded & 0: MB corrupted. This is cumulative err map till this call + is made. In this API call after copying the err map to the char array, internal map is reset to all clean MBs. + Internal map is reset to all clean MBs also when I or SI slice is found. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU8 * pMBErrMapMatrix
+
      + + @internal + @see GFMxDecH264GetAttribute() + */ +#define GF_MXDEC_H264_ATTR_GET_MBERR_MAP_MATRIX 0x0000000e + +/** GFMxDecH264 Attribute: Set Error Concealment (EC) Mode ON or OFF. + + EC is Dynamically ON by default. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 !=0: Enable EC
+            0: Disable EC
+
      + + @see GFMxDecH264SetAttribute() +*/ +#define GF_MXDEC_H264_ATTR_SWITCH_EC_MODE 0x0000000f + +/** GFMxDecH264 Attribute: Set Single Slice Per Frame Mode ON or OFF. + + By default multiple slices per frame is assumed. + + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 !=0: Single slice per frame
+            0: Multiple slices per frame
+
      + + @see GFMxDecH264SetAttribute() +*/ +#define GF_MXDEC_H264_ATTR_SINGLE_SLICE_PER_FRAME 0x00000010 + + + +/** GFMxDecH264 Attribute: Put the h264 decoder in the TSPlayer + mode. This has to be done first, and sets up the h264 decoder to cooperate + with the TS Demux task on the AVP. Does nothing when decode is on the + host +*/ +#define GF_MXDEC_H264_ATTR_SET_TSPLAYER_MODE 0x00000011 + + +/** Parameter structure for MxDecH264PostProcessing(). + Both input and output parameters are passed via this structure to MxDecH264PostProcessing(). + @see MxDecH264PostProcessing() +*/ + + typedef struct _GFMXDECHH264PP + { + PGFRMSURFACE* pDestSurf;/**< input, + pointer to an array of surfaces that will + hold the result from Post Processing + pointer to an array of surfaces to + accommodate auto post processing + */ + PGFRMSURFACE* pSrcSurf; /**< input, + pointer to an array of surfaces to be //post processed + pointer to an array of surfaces to + accommodate auto post processing + */ + PGFRECT pRect; /**< input, + Rectangle area to be processed for both + src and dest surface + */ + + NvU32 numofDestSurf; /**< input, + If MXDEC_PP_AUTO flag is set, this + parameter must be filled + */ + NvU32 numofSrcSurf; /**< input, + If MXDEC_PP_AUTO flag is set, this + parameter must be filled + */ + NvU8 * lpQuantiser; /**< input, + point to array of QPs for Macro Blocks in + the source VOP. GFMX automatically saved + the last two decoded VOP's QP tables, + Decoder application may not need to reload + the table if it can make sure the source + VOP is the one within the last decoded + VOPs. If MXDEC_PP_RELOAD_QUANTIZER is set, + this field must be filled. + */ + NvU32 PPOption; /** + NvS32 >0 Surface index which was returned in GFMXDECH264DECPICTURE::ReconSurfaceNumber. + NvS32 -1 Reset all locked surfaces to unlocked + NvS32 -2 Reserved for internal use + + + @see GF_MXDEC_H264_ATTR_SURFACE_LOCKING + */ +#define GF_MXDEC_H264_SET_UNLOCK_SURFACE 3 + + /** GFMxDecH264Set() feature ID: Sync host side H264 state from DSP side. + @internal + */ +#define GF_MXDEC_H264_SET_SYNC_WITH_DSP 4 + + /** GFMxDecH264Set() feature ID: Set or reset DSP idle callback. + Can be called on DSP side only. + \a pInfo is a pointer to a #GFMXDECH264CALLBACK structure. + @internal + */ +#define GF_MXDEC_H264_SET_DSPIDLEHANDLER 5 + +/** GFMxDecH264Set() feature ID: Allow the DSP message poll thread to wake up and terminate. + Can be called on Host side only. + \a pInfo is ignored. + @internal +*/ +#define GF_MXDEC_H264_SET_EXITDSPMSGTHREAD 6 + + /** Parameter structure for GFMxDecH264Set() feature #GF_MXDEC_H264_SET_DSPIDLEHANDLER. + @internal + */ + typedef struct _GFMXDECH264DSPIDLECALLBACK + { + /** Application defined parameter to forward to GFMXDECH264DSPIDLECALLBACK::pCallBack. */ + void *pPara; + + /** Callback function, which is called from AVP idle loop. + @param pPara Application defined parameter, forwarded from GFMXDECH264DSPIDLECALLBACK::pPara + */ + void (*pCallBack)(void* pPara); + + } GFMXDECH264DSPIDLECALLBACK; + + + /** Parameter structure for GFMxDecH264Set() feature #GF_MXDEC_H264_SET_READBITSTREAM. */ + typedef struct _GFMXDECH264CALLBACK + { + /** Application defined parameter to forward to GFMXDECH264CALLBACK::pCallBack. */ + void *pPara; + + /** Callback function, which is called by MxDecH264 to fetch a portion of bitstream data. + @param pPara Application defined parameter, forwarded from GFMXDECH264CALLBACK::pPara + @param ppBuffer Callback returns address of the next portion of stream data in \a *ppBuffer + @param pBufferLength Callback returns number of bytes in \a ppBuffer in \a *pBufferLength + @param uFlag Specifies scan stream direction + + + +
      GF_MXDEC_H264_READ_BITSTREAM_FORWARD Forward scan
      GF_MXDEC_H264_READ_BITSTREAM_BACKWARDBackward scan
      + + @return If the #MXDEC_ATTR_PRE_DETERMINED_BOUNDARY attribute is set, the callback + should return #GF_MXDEC_H264_BOUNDARY_REACHED when a frame boundary is + detected, or 0 if no boundary is detected. + If the #MXDEC_ATTR_PRE_DETERMINED_BOUNDARY attribute is not set, the callback + should return 0. + */ + NvU32 (*pCallBack)(void* pPara, NvU8** ppBuffer, NvS32* pBufferLength, NvU32 uFlag); + + }GFMXDECH264CALLBACK, *PGFMXDECH264CALLBACK; + + + + /** GFMXDECH264CALLBACK::pCallBack return code */ +#define GF_MXDEC_H264_BOUNDARY_REACHED 0x00000001 + /** GFMXDECH264CALLBACK::pCallBack uFlag value: Stream forward scan. */ +#define GF_MXDEC_H264_READ_BITSTREAM_FORWARD 0x00000002 + /** GFMXDECH264CALLBACK::pCallBack uFlag value: Stream backward scan. */ +#define GF_MXDEC_H264_READ_BITSTREAM_BACKWARD 0x00000003 + + /** Maximum number of surface pointers GFMXDECH264SURFLIST::surfList[]. */ +#define MXDEC_H264_NUM_SURFACES 17 + + /** Parameter structure for GFMxDecH264Set() feature #GF_MXDEC_H264_SET_READBITSTREAM. */ + typedef struct _GFMXDECH264SURFLIST + { + /** Number of valid surfaces in GFMXDECH264SURFLIST::surfList[]. + The number of valid surfaces includes reference, decode surfaces and optional buffer frames. + Must be within range 1 and 17. + */ + NvU32 numSurfs; + + /** Surface pointer list. + + Assuming N is the number of reference frames, the first N+1 surfaces + in this list will be used as reference and decode surfaces. The currently + decoded surface can refer to the N remaining surfaces in this set as + reference frames. + + If surface locking mode (#GF_MXDEC_H264_ATTR_SURFACE_LOCKING) is enabled, + The remaining M = numSurfs - (N+1) surfaces are used as extra surfaces, + to fascilate pre-buffered decoding. + */ + PGFRMSURFACE surfList[MXDEC_H264_NUM_SURFACES]; + + }GFMXDECH264SURFLIST, *PGFMXDECH264SURFLIST; + + + typedef enum + { + GFMX_DEC_H264_INTERRUPT_ENABLE, + GFMX_DEC_H264_INTERRUPT_DISABLE, + GFMX_DEC_H264_INTERRUPT_CLEAR + } GFMX_DEC_H264_INTERRUPT_OPERATION_TYPE; // Interrupt operation. + + typedef enum + { + GFMX_DEC_H264_DSP_COMMAND_INTR, + GFMX_DEC_H264_POST_PROCESSING_DONE_INTR, + GFMX_DEC_H264_DECODE_DONE_INTR + } GFMX_DEC_H264_INTERRUPT_TYPE; + + typedef struct _GFMXDECH264TABLE + { + GF_RETTYPE (* MxDecH264GetProperty)(GFMxDecH264Handle hMxDecH264, PGFPROPERTY pMXProp ); + GF_RETTYPE (* MxDecH264GetStatus)(GFMxDecH264Handle hMxDecH264, NvU32 * pStatus); + GF_RETTYPE (* MxDecH264DecSequence)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264DECSEQUENCE pSequence); + GF_RETTYPE (* MxDecH264DecPicture)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264DECPICTURE pPicture); + GF_RETTYPE (* MxDecH264SetSequence)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264SEQUENCE pSequence); + GF_RETTYPE (* MxDecH264SetPicture)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264PICTURE pPicture); + GF_RETTYPE (* MxDecH264SetSlice)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264SLICE pSlice); + GF_RETTYPE (* MxDecH264SetMBs)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264MB pMBs); + GF_RETTYPE (* MxDecH264PostProcessing)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264PP pP); + GF_RETTYPE (* MxDecH264SetAttribute)(GFMxDecH264Handle hMxDecH264, NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* MxDecH264GetAttribute)(GFMxDecH264Handle hMxDecH264, NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* MxDecH264Set)(GFMxDecH264Handle hMxDecH264, NvU32 uiFeature, void * pInfo); + GF_RETTYPE (* MxDecH264InterruptControl)(GFMxDecH264Handle hMxDecH264, + GFMX_DEC_H264_INTERRUPT_TYPE IntType, GFMX_DEC_H264_INTERRUPT_OPERATION_TYPE op, + void * pData); + GF_RETTYPE (* MxDecH264InterruptHandler)(GFMxDecH264Handle hMxDecH264, + GFMX_DEC_H264_INTERRUPT_TYPE IntType, void * pData); // Reserved. + GF_RETTYPE (* MxDecH264DSPPoll)(GFMxDecH264Handle hMxDecH264, NvU32 timeout); + GF_RETTYPE (* MxDecH264DecSEI)(GFMxDecH264Handle hMxDecH264, PGFMXDECH264DECSEI pSEI); + GF_RETTYPE (* MxDecH264DecNewFrameNum)(GFMxDecH264Handle hMxDecH264,NvU8* VideoBuffPtr,NvU32 VideoBufferLength); + } GFMXDECH264TABLE, *PGFMXDECH264TABLE; + + /**< Typesafe functions for opening and closing this component. + This API also checks for hardware resources needed through GFRmHwResourceConstraint(). + Trying to open a second video instance will fail due to existing open context. + */ +GF_RETTYPE GFMxDecH264Open(GFRmHandle hRm, GFMxDecH264Handle *phMxDecH264, + GF_STATE_TYPE state, GFRmChHandle hCh); + + /**< Close the video instance. + */ +void GFMxDecH264Close(GFMxDecH264Handle *phMxDecH264); + +#if NVCPU_IS_XTENSA +#define MXDH264OFFSET sizeof(GFMXDECH264TABLE) +#else +#define MXDH264OFFSET 0 +#endif + + + /** GFMxDecH264 error code: GFMxDecH264DecSequence() encountered end of bitstream. + @see GFMxDecH264DecSequence() + */ +#define GFMXDECH264_ERROR_SEQUENCE_END_OF_FILE (GFMXDH264_ERROR | 0x00000001) + + /** GFMxDecH264 error code: GFMxDecH264DecSequence() bitstream format not supported. + The sequence header specifies a bitstream format, that is not supported. Most likely + reason for this error is that the H.264 profile is not supported. + @see GFMxDecH264DecSequence() + */ +#define GFMXDECH264_ERROR_SEQUENCE_NOT_SUPPORTED (GFMXDH264_ERROR | 0x00000002) + + /** GFMxDecH264 error code: GFMxDecH264DecSequence() encountered out of GPU memory error. + The application can try to free GPU memory and call GFMxDecH264DecSequence() again. + @see GFMxDecH264DecSequence() + */ +#define GFMXDECH264_ERROR_SEQUENCE_NOT_ENOUGH_MEM (GFMXDH264_ERROR | 0x00000003) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() encountered sequence header. + The application should call GFMxDecH264DecSequence() in response to this return code, + to decode the sequence header. + @see GFMxDecH264DecPicture(), GFMxDecH264DecSequence() + */ +#define GFMXDECH264_ERROR_PICTURE_DETECTED_SEQUENCE (GFMXDH264_ERROR | 0x00000004) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() encountered end of bitstream. + @see GFMxDecH264DecPicture() + */ +#define GFMXDECH264_ERROR_PICTURE_END_OF_FILE (GFMXDH264_ERROR | 0x00000005) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() encountered an unrecoverable bitstream error. + The application should call GFMxDecH264DecPicture() again, MxDecH264 will then + scan for the next frame boundary and try to decode this frame. + @see GFMxDecH264DecPicture() + */ +#define GFMXDECH264_ERROR_PICTURE_CORRUPTED_PICTURE (GFMXDH264_ERROR | 0x00000006) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() encountered out of GPU memory error. + The application can try to free GPU memory and call GFMxDecH264DecPicture() again. + @see GFMxDecH264DecPicture() + */ +#define GFMXDECH264_ERROR_PICTURE_NOT_ENOUGH_MEM (GFMXDH264_ERROR | 0x00000007) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() returns status to inform application + whether picture parameter set is not initialized, which may happen either when picture + parameter set is absent or corrupted. pic_parameter_set_id is checked for negative value. + */ +#define GFMXDECH264_ERROR_PICTURE_PARAMETER_SET_NOT_INITIALIZED (GFMXDH264_ERROR | 0x00000008) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() returns error status to inform application + that picture parameter set is corrupted. + */ +#define GFMXDECH264_ERROR_PICTURE_PARAMETER_SET_CORRUPTED (GFMXDH264_ERROR | 0x00000009) + + /** GFMxDecH264 error code: GFMxDecH264 API was used in invalid state of the decoder. + */ +#define GFMXDECH264_ERROR_INVALID_STATE (GFMXDH264_ERROR | 0x0000000A) + + /** GFMxDecH264 error code: GFMxDecH264DecPicture() returns status to inform application that + all the surfaces where it could decode are locked. + */ +#define GFMXDECH264_ERROR_PICTURE_ALL_SURFACES_LOCKED (GFMXDH264_ERROR | 0x0000000B) + + /*For DecPic timeout on DSP side.*/ +#define GFMXDECH264_ERROR_MXDEC_PIC_TIMEOUT (GFMXDH264_ERROR + 0x0000000C) + + + /** GFMxDecH264 error code: GFMxDecH264DecSEI() is not supported in bitstream callback mode. + @see GFMxDecH264DecSEI() + */ +#define GFMXDECH264_ERROR_SEI_NOT_SUPPORTED_FOR_BITSTREAM_CALLBACK_MODE (GFMXDH264_ERROR | 0x0000000D) + + /** GFMxDecH264 error code: GFMxDecH264DecSEI() encountered end of bitstream. + @see GFMxDecH264DecSEI() + */ +#define GFMXDECH264_ERROR_SEI_END_OF_FILE (GFMXDH264_ERROR | 0x0000000E) + + /** GFMxDecH264 error code: GFMxDecH264DecSEI() cannot decode this NAL Unit as its not SEI. + @see GFMxDecH264DecSEI() + */ +#define GFMXDECH264_ERROR_SEI_NOT_SEI_RBSP (GFMXDH264_ERROR | 0x0000000F) + + /** GFMxDecH264 error code: GFMxDecH264DecSEI() Timed out on DSP side. + @see GFMxDecH264DecSEI() + */ +#define GFMXDECH264_ERROR_SEI_TIMEOUT (GFMXDH264_ERROR | 0x00000010) + + /** GFMxDecH264 error code: GFMxDecH264DecNewFrameNum() cannot decode this NAL Unit as + it does not contain frame number information. + @see GFMxDecH264DecNewFrameNum() + */ +#define GFMXDECH264_ERROR_DECFRAMENUM_NOTSUPPORTED (GFMXDH264_ERROR | 0x00000011) + + /* #### MxDecH264 Helper macros. Maybe useful for backward compatible API. #### */ + + /** This function returns version and capabilities of API and hardware. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pMXProp (PGFPROPERTY) Pointer to property structure to be filled in + + @retval #GF_SUCCESS \a pJXProp filled in successfully + @retval #GF_ERROR Some error occured + + The #GFPROPERTY structure passed with parameter \a pMXProp will be + filled in on successfull return. The GFPROPERTY::Capability field + will hold a combination of flagbits indicating capabilities specific + to the MxDecH264API: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GF_MXDEC_H264_CAP_BASELINEBaseline profile supported
      #GF_MXDEC_H264_CAP_MAINMain profile supported
      #GF_MXDEC_H264_CAP_EXTENDEDExtended profile supported
      #GF_MXDEC_H264_CAP_LEVEL10LEVEL 1.0 supported
      #GF_MXDEC_H264_CAP_LEVEL11LEVEL 1.1 supported
      #GF_MXDEC_H264_CAP_LEVEL12LEVEL 1.2 supported
      #GF_MXDEC_H264_CAP_LEVEL13LEVEL 1.3 supported
      #GF_MXDEC_H264_CAP_LEVEL20LEVEL 2.0 supported
      #GF_MXDEC_H264_CAP_LEVEL21LEVEL 2.1 supported
      #GF_MXDEC_H264_CAP_LEVEL22LEVEL 2.2 supported
      #GF_MXDEC_H264_CAP_LEVEL30LEVEL 3.0 supported
      #GF_MXDEC_H264_CAP_LEVEL31LEVEL 3.1 supported
      #GF_MXDEC_H264_CAP_LEVEL32LEVEL 3.2 supported
      #GF_MXDEC_H264_CAP_LEVEL40LEVEL 4.0 supported
      #GF_MXDEC_H264_CAP_LEVEL41LEVEL 4.1 supported
      #GF_MXDEC_H264_CAP_LEVEL42LEVEL 4.2 supported
      #GF_MXDEC_H264_CAP_LEVEL50LEVEL 5.0 supported
      #GF_MXDEC_H264_CAP_LEVEL51LEVEL 5.1 supported
      #GF_MXDEC_H264_CAP_DBPost Processing de-blocking supported
      #GF_MXDEC_H264_CAP_DRPost Processing de-ringing supported
      + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxDecH264API functions. + + @see GFPROPERTY + */ +#define GFMxDecH264GetProperty(hMxDecH264, pMXProp) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264GetProperty(hMxDecH264, pMXProp) + +#define GFMxDecH264GetStatus(hMxDecH264, pStatus) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264GetStatus(hMxDecH264, pStatus) + + /** Decode sequence header. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pSequence (PGFMXDECH264DECSEQUENCE) Pointer to #GFMXDECH264DECSEQUENCE parameter structure + + @retval GF_SUCCESS Sequence header was decoded successfully + + NAL units with nal_unit_type = 7 should be passed to GFMxDecH264DecSequence(). Such NAL units + contain Sequence Parameter Set (SPS). The nal_ref_idc should be a non-zero value. + + This function will be called whenever a sequence header is found in the bitstream, decode + it and return its characteristics. + + @see GFMXDECH264DECSEQUENCE + */ +#define GFMxDecH264DecSequence(hMxDecH264, pSequence)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264DecSequence(hMxDecH264, pSequence) + + /** Decode a picture. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pPicture (PGFMXDECH264DECPICTURE) Pointer to #GFMXDECH264DECPICTURE parameter structure + + @retval GF_SUCCESS Frame was decoded successfully + @retval GFMXDECH264_ERROR_PICTURE_DETECTED_SEQUENCE Sequence header detected + @retval GFMXDECH264_ERROR_PICTURE_END_OF_FILE End of stream encountered + @retval GFMXDECH264_ERROR_PICTURE_CORRUPTED_PICTURE Unrecoverable bitstream error during frame decode + @retval GFMXDECH264_ERROR_PICTURE_NOT_ENOUGH_MEM Out of GPU memory + + All NAL units with nal_unit_type other than 7, should be passed to GFMxDecH264DecPicture(). + In specific, for nal_unit_type value as 8, the NAL Unit contains a Picture Parameter Set (PPS) and + for nal_unit_type ranging between 1 and 5, the NAL units contain coded slices. + + GFMxDecH264DecPicture decodes one picture from the bit stream. If GFMxDecH264DecPicture detects an + error, it will perform error concealment. If the error is not concealable, GFMxDecH264DecPicture returns + the error back to the application. + If the current stream position is not on the start of a frame, the function scans forward until a frame + start or sequence header is detected. + + For actions to take on the particular return codes, refer to the return code documentation. + + @see GFMXDECH264DECPICTURE + */ +#define GFMxDecH264DecPicture(hMxDecH264, pPicture)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264DecPicture(hMxDecH264, pPicture) + + + /** Decode a SEI rbsp. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pSEI (PGFMXDECH264DECSEI) Pointer to #GFMXDECH264DECSEI parameter structure + + @retval GF_SUCCESS SEI rbsp was decoded successfully + @retval GFMXDECH264_ERROR_SEI_NOT_SUPPORTED_FOR_BITSTREAM_CALLBACK_MODE This API is not supported in bitstream callback mode + @retval GFMXDECH264_ERROR_PICTURE_END_OF_FILE End of stream encountered + @retval GFMXDECH264_ERROR_SEI_NOT_SEI_RBSP cannot decode this NAL Unit as its not SEI + + All NAL units with nal_unit_type 6 can be passed to GFMxDecH264DecSEI() for decoding in prefill mode. + + GFMxDecH264DecSEI decodes SEI rbsp. + + For actions to take on the particular return codes, refer to the return code documentation. + + @see GFMXDECH264DECSEI + */ +#define GFMxDecH264DecSEI(hMxDecH264, pSEI)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264DecSEI(hMxDecH264, pSEI) + + + /** Decode slice header and extract framenumber. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param VideoBuffPtr Pointer to bitstream + @param VideoBufferLength Length of bitstream data available in the buffer + + @retval framenum Framenumber of current nal unit data + @retval GFMXDECH264_ERROR_DECFRAMENUM_NOTSUPPORTED Nal unit type not supported + + NAL units with nal_unit_type 1 and 5 can be passed to parse slice header and extract + framenumber. + This function can be used in prefill buffer mode to find all nal units which + belongs to same frame before calling GFMxDecH264DecPicture. + + */ + + +#define GFMxDecH264DecNewFrameNum(hMxDecH264,VideoBuffPtr,VideoBufferLength) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264DecNewFrameNum(hMxDecH264,VideoBuffPtr,VideoBufferLength) + + +#define GFMxDecH264SetSequence(hMxDecH264, pSequence)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetSequence(hMxDecH264, pSequence) + +#define GFMxDecH264SetPicture(hMxDecH264, pPicture)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetPicture(hMxDecH264, pPicture) + +#define GFMxDecH264SetSlice(hMxDecH264, pSlice)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetSlice(hMxDecH264, pSlice) + +#define GFMxDecH264SetMBs(hMxDecH264, pMBs) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetMBs(hMxDecH264, pMBs) + +/** Post Processing on a decoded YUV surface. + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param pP (PGFMXDECH264PP) Pointer to #GFMXDECH264PP parameter structure + + @retval GF_SUCCESS Applied post processing on decoded surface successfully + + GFMxDecH264PostProcessing() function can perform DeRinging and DeBlocking or DeBlocking only on a decoded YUV surface data. + + GFMXDECH264DECSEQUENCE::PictureInfo output flagbit (GF_MXDEC_H264_DEC_PICTURE_DEBLOCKING_FILTER) + is set by the API if H264 bit stream does not have in-the-loop DeBlocking. + This means app can perform out-of-the-loop DeBlocking by calling GFMxDecH264PostProcessing(). + If H264 bit stream has in-the-loop processing then hardware H264 decoder will perform in-the-loop DeBlokcing + and API resets this flag to zero to indicate that app should not perform DeBlocking. + + GFMxDecH264PostProcessing can be called any time. we need decoded YUV surface data and Qp values for each MB. + If video is decoded by our hardware decoder then Qp values are saved in the internal SRAM for the last frame. + + + @see GFMXDECH264PP + +*/ + + + +#define GFMxDecH264PostProcessing(hMxDecH264, pP) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264PostProcessing(hMxDecH264, pP) + +#define GFMxDecH264SetAttribute(hMxDecH264, uiFeature, pInfo) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264SetAttribute(hMxDecH264, uiFeature, pInfo) + +#define GFMxDecH264GetAttribute(hMxDecH264, uiFeature, pInfo) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264GetAttribute(hMxDecH264, uiFeature, pInfo) + + /** Set various runtime parameters. + + @param hMxDecH264 (GFMxDecH264Handle) Handle to MxDecH264 component + @param uiFeature (NvU32) ID of feature to set + @param pInfo (void*) Feature specific data + + @retval GF_SUCCESS Success + @retval GF_FAILURE Failure + + The following features identified by parameter \a uiFeature can be set, see documentation + for the individual \a uiFeature IDs for interpretation of data in parameter \a pInfo: + + + + + + + + + + + +
      uiFeatureMeaningpInfo interpretation
      #GF_MXDEC_H264_SET_READBITSTREAMSet up a stream callback function.GFMxDec calls + that callback function to request a portion of the bit stream from the application.#GFMXDECH264CALLBACK *
      #GF_MXDEC_H264_SET_SURFACE_LISTSet a list of surfaces for to be used to store reference and decode frames.#GFMXDECH264SURFLIST *
      #GF_MXDEC_H264_SET_UNLOCK_SURFACEUnlock one or all locked surface.NvS32
      + */ +#define GFMxDecH264Set(hMxDecH264, uiFeature, pInfo) \ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264Set(hMxDecH264, uiFeature, pInfo) + +#define GFMxDecH264InterruptControl(hMxDecH264, IntType, op, pData)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264InterruptControl(hMxDecH264, IntType, op, pData) + +#define GFMxDecH264InterruptHandler(hMxDecH264, IntType, pData)\ + ((PGFMXDECH264TABLE)((NvU32)hMxDecH264+MXDH264OFFSET))->MxDecH264InterruptHandler(hMxDecH264, IntType, pData) + +#define GFMxDecH264DSPPoll(MxHandle, timeout)\ + ((PGFMXDECH264TABLE)((NvU32)MxHandle+MXDH264OFFSET))->MxDecH264DSPPoll(MxHandle, timeout) + + //Use the following flags in the setattribute function for the picture boundary mode. + //If you wish to send the sequence header separately from the first frame use the first flag(SEPARATE_SEQUENCE_HEADER) + //else use the second flag. +#define GFMXDECH264_SEPARATE_SEQUENCE_HEADER 0x1 +#define GFMXDECH264_COMBINED_SEQUENCE_HEADER 0x2 + + + /*@}*/ + + /** @page pageMxDecH264AppNotes MxDecH264API Application Notes + + @section pageMxDecH264AppNotes1 Programming Sequence + + Todo + + @section pageMxDecH264AppNotes2 Decode Surface Locking + + The H264 decoder can operate in a surface locking mode, which is activated by + attribute #GF_MXDEC_H264_ATTR_SURFACE_LOCKING. In this mode, GFMxDecH264DecPicture() + will automatically 'lock' the current surface with the decoded frame, and exclude it + from its surface pool available for decoding new frames. + + Surface locking is intended for usecases, were the decode surface is directly used as overlay. + For the duration it is displayed as overlay, the locked state ensures, that it won't be + overwritten. With this mechanism H264 decode and screen update can run in independent thread + contexts. + + If a surface from the pool is locked, it can still be used as a reference frame. + However it will never be reused and overwritten during a succeeding call to + GFMxDecH264DecPicture(). + + The application can re-add the locked surface to the set of writable surfaces by + calling GFMxDecH264Set / GF_MXDEC_H264_SET_UNLOCK_SURFACE. + + A locked surface is identified on return from GFMxDecH264DecPicture() via + GFMXDECH264DECPICTURE::ReconSurfaceNumber. This ID needs to be passed later to + GF_MXDEC_H264_SET_UNLOCK_SURFACE to perform the unlocking. + + The application has to ensure that at least + 1 surfaces + in the pool stay unlocked. If GFMxDecH264DecPicture() is called with unsufficient + free surfaces, error GFMXDECH264_ERROR_PICTURE_ALL_SURFACES_LOCKED will be returned. + + The number of surfaces set via GFMxDecH264Set / GF_MXDEC_H264_SET_SURFACE_LIST / + GFMXDECH264SURFLIST::surfList must be at least N+1+M, where N is the number of reference + frames and M the maximum allowed number of simulteneously locked surfaces. + + The lock-state of all surfaces can be reset via GFMxDecH264Set / GF_MXDEC_H264_SET_UNLOCK_SURFACE + passing -1 as surface ID. + */ + + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecRV9.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecRV9.h new file mode 100755 index 00000000..a341d500 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecRV9.h @@ -0,0 +1,853 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFMxDecRV9.h + GFSDK RV9 Decode API header file. +*/ + +#ifndef _GF_MPEG_DEC_RV9__ +#define _GF_MPEG_DEC_RV9__ + +#include "nvtypes.h" +#include "GFVx.h" + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif +/** @addtogroup group MxDecRV9API +*/ +/*@{*/ + + +// MXDECRV9 CapabilityEx Flag +#define GF_MXDEC_RV9_CAPEx_USE_DSP 0x00000001 +// Whenever DSP is used for decoding +// Surace type should be = GF_SURFACE_VIDEO_MEMORY +// Surface hint type = GF_MEMORY_HINT_BOTTOM_UP +// In case of Host Used for decoding +// Surace type = GF_SURFACE_SYSTEM_MEMORY +// Surface hint type = 0 +// MXDECRV9CapFlags +/************************************************************************************************************/ + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_SIMPLE 0x00000001 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_MEDIUM 0x00000002 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_COMPLEX 0x00000004 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_LEVEL1 0x00000100 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_LEVEL2 0x00000200 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_LEVEL3 0x00000400 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_LEVEL4 0x00000800 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_DB 0x00001000 + +/** Argument "GFPROPERTY pMXProp" for MxDecRV9GetProperty().\n + Application returns the properties, in GFPROPERTY structure \n +@see GFMXDECRV9TABLE::MxDecRV9GetProperty , GFPROPERTY::Capability +*/ +#define GF_MXDEC_RV9_CAP_DR 0x00002000 +/*********************************************************************************************************************/ + + + + /** This structure holds various informations each of the frame to be decoded . +This structure is passed as parameter to GFMXDECRV9TABLE::MxDecRV9DecodeFrame. +*/ + +typedef struct _GFMXDECRV9FRAME +{ + + + NvU32 uiFrameOption; /**< uiFrameOption values + + + +
      #GF_MXDEC_RV9_DEC_FRAME_SPECIFY_SURF_RECTspecify rect area to hold the reconstructed image.
      + */ + PGFRECT pFrameRect; /**< not in use */ + NvU32 uiFrameType; /**< set new frame type information +
      + + + + + + +
      #GF_MXDEC_RV9_DISPLAY_FRAME
      #GF_MXDEC_RV9_KEY_FRAME
      #GF_MXDEC_RV9_P_FRAME
      #GF_MXDEC_RV9_B_FRAME
      #GF_MXDEC_RV9_DONT_DISPLAY_FRAME
      #GF_MXDEC_RV9_ERRONEOUS_FRAME
      + */ + PGFRMSURFACE pReconstructedSurf;/**< This is the surface to hold the decoded picture */ + NvU32 uiFrameSequenceCount; /**< set by GFMxDecRV9API */ + NvU32 uiTimeStamp; /**< in terms of millisecond */ + NvU8* pPreFillBuffer; /**< Input, Pointer bitstream for frame to decode */ + NvU32 PreFillBufferLength; /**< Input, Length of bitstream in bytes, must cover the entire frame */ + +}GFMXDECRV9FRAME, *PGFMXDECRV9FRAME; + +//uiFrameOption +/******************************************************************************************/ +/** uiFrameOption for GFMXDECRV9FRAME passed as an argument in MxDecRV9DecodeFrame(). \n +specify rect area to hold the reconstructed image.\n +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame. +*/ +#define GF_MXDEC_RV9_DEC_FRAME_SPECIFY_SURF_RECT 0x00000001 + +//uiFrameType values + +/******************************************************************************************/ +/** uiFrameType values for GFMXDECRV9FRAME set by MxDecRV9DecodeFrame(). \n + +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_DISPLAY_FRAME 0x0 + +/** uiFrameType values for GFMXDECRV9FRAME set by MxDecRV9DecodeFrame(). \n + The decoded Frame is I-frame. +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_KEY_FRAME 0x1 + +/** uiFrameType values for GFMXDECRV9FRAME set by MxDecRV9DecodeFrame(). \n +The Decoded Frame is P-frame. +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_P_FRAME 0x2 + +/** uiFrameType values for GFMXDECRV9FRAME set by MxDecRV9DecodeFrame(). \n + The decoded Frame is B-frame. +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_B_FRAME 0x4 + +/** uiFrameType values for GFMXDECRV9FRAME passed as an argument in MxDecRV9DecodeFrame(). \n + +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_DONT_DISPLAY_FRAME 0x8 + +/** uiFrameType values for GFMXDECRV9FRAME passed as an argument in MxDecRV9DecodeFrame(). \n + Decode frame is Erroneous +@see GFMXDECRV9FRAME, GFMXDECRV9TABLE::MxDecRV9DecodeFrame +*/ +#define GF_MXDEC_RV9_ERRONEOUS_FRAME 0x16 +/***********************************************************************************************************************/ + +/** This structure holds various informations needed for Post Processing of decoded frame . +This structure is passed as parameter to MxDecRV9PostProcessing(). +*/ +typedef struct _GFMXDECRV9PP +{ + PGFRMSURFACE pPPSurf; + /**< pointer to surface that will + hold the result from Post Processing + */ + PGFRECT pPPRect; + /**< Rectangle area to be processed for both + source and destination surface + */ + + PGFRMSURFACE pSrcSurf; + /**< pointer to surface that will + hold the result from Post Processing + */ + PGFRECT pSrcRect; + /**< Rectangle area to be processed for both + source and destination surface + */ +} GFMXDECRV9PP, *PGFMXDECRV9PP; + +// PPOption +#define GF_MXDEC_RV9_PP_SM_OFF 0x0 //Turn OFF Smoothing filter for this frame +#define GF_MXDEC_RV9_PP_SM_ON 0x1 //Turn ON Smoothing filter for this frame +#define GF_MXDEC_RV9_PP_DR_ON 0x2 //Turn ON DeRinging filter for this frame + + +// Hardware Status +/************************************************************************************************************/ + +#define GF_DECODER_FRAME_DONE 0x00000010 + + + +#define GF_DECODER_PP_FRAME_DONE 0x00000020 + +/*********************************************************************************************************/ +#define GF_DECODER_PP_FRAME_RV9 0x00000040// + + +/** Attribute MxDecRV9Set::uiFeature.\n + Application sets this attribute to register a callback function and + its correpnding parameter to read bitstream data . +@see GFMXDECRV9TABLE::MxDecRV9Set, pInfo should be a pointer to PGFMXDECRV9CALLBACK \n +*/ +#define GF_MXDEC_RV9_SET_READBITSTREAM 0x1 + + + +/** Attribute MxDecRV9Set::uiFeature \n + This will setup the surface list, including all of the ref surface and one reconstructed one. \n +@see GFMXDECRV9TABLE::MxDecRV9Set, pInfo should a pointer PGFMXDECRV9SURFLIST +*/ +#define GF_MXDEC_RV9_SET_SURFACE_LIST 0x2 + + + +/** Attribute MxDecRV9Set::uiFeature \n + This will Set the GFMxDecRV9API to decode the RV8 stream + By default GFMxDecRV9API will assume the stream to be RV9 stream\n +@see GFMXDECRV9TABLE::MxDecRV9Set +*/ +#define GF_MXDEC_RV9_BITSTREAM_RV8 0x4 + + +/** Attribute GFMxDecRV9SetAttribute::uiFeature and GFMxDecRV9GetAttribute::uiFeature \n + Application will determine the decoding boundary, for RV9, this boundary means VOL + and VOP boundary. For certain file formats, those boundary information are + stored in the video file, APP can easily use those information to determine + the boundary. + If APP wants API to detect the boundary,App should not disable this attribute. This is mainly for streaming case, APP does + not have those handy boundary information. API will automatically detects those + boundaries. APP does not need to parse the bitstream to detect those boundaries.\n + *pInfo: 1: APP will determine the decoding boudary\n + *pInfo: 0: APP will not determine the decoding boundary \n +@see GFMXDECRV9TABLE::MxDecRV9SetAttribute +*/ +#define GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY 0x00000001 + + + +/** Attribute GFMxDecRV9GetAttribute::uiFeature \n + This attribute only can be used for GFMxDecGetAttribute + If application wants to set pDestRect in GFMXDECVOP or GFMXDECMP4DECVOP, + application must use this attributes to get allignment information and + align the rectangle top & left corner accordinately.\n + *pInfo: top fieled alignment in term of lines \n +@see GFMXDECRV9TABLE::MxDecRV9GetAttribute +*/ +#define GF_MXDEC_ATTR_RV9_DEC_FRAME_RECT_TOP_ALIGNMENT 0x00000002 + + + +/** Attribute GFMxDecRV9GetAttribute::uiFeature \n + This attribute only can be used for GFMxDecGetAttribute + If application wants to set pDestRect in GFMXDECVOP or GFMXDECMP4DECVOP, + application must use those attributes to get allignment information and + align the rectangle top & left corner accordinately.\n + *pInfo: left fieled alignment in term of pixels\n + +@see GFMXDECRV9TABLE::MxDecRV9GetAttribute +*/ +#define GF_MXDEC_ATTR_RV9_DEC_FRAME_RECT_LEFT_ALIGNMENT 0x00000003 + + +/** Attribute GFMxDecRV9SetAttribute::uiFeature and GFMxDecRV9GetAttribute::uiFeature \n + Application will fill the buffer and push the data to the decoder. +*/ +#define GF_MXDEC_RV9_ATTR_PREFILLBUFFER 0x00000008 + +/********************************************************************************************************/ + +/** Structure holding the callback function pointer. +Used in registering the callback function +The callback function is a function which the API calls to request a portion of the bit stream from the application. +@see GFMXDECRV9TABLE::MxDecRV9Set +*/ + + + +typedef struct _GFMXDECRV9CALLBACK +{ + void *pPara;/**< pPara is a parameter passed from APP, + and APP wants API to call back with this parameter + */ + NvU32 (*pCallBack)(void * pPara, NvU8 ** ppBuffer, NvU32 * BufferLength,NvU32 uFlag); + /**< Application callback function pointer. + Register a callback function for fetching RV9 data. + + @param *pPara Parameter to pass on to application callback function + @param ppBuffer Buffer Pointer + @param BufferLength Parameter to pass on to application callback function + + If APP set GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY, + APP should return GF_MXDEC_RV9HD_BOUNDARY_REACHED when the boundary is + detected. + If APP does not set GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY, + 0 should be returned. + */ + +}GFMXDECRV9CALLBACK, *PGFMXDECRV9CALLBACK; + +#define GF_MXDEC_RV9HD_ENDOFFILE 0x00000200 +#define GF_MXDEC_RV9HD_APP_DETECT_BOUNDARY 0x00001000 +#define GF_MXDEC_RV9HD_BOUNDARY_REACHED 0x00002000 +#define GF_MXDEC_RV9HD_ENDOFFILE_REACHED 0x00004000 +#define GF_MXDEC_RV9HD_APP_PREFILLBUFFER 0x00008000 +#define GF_MXDEC_RV9HD_BEGININGOFFILE_REACHED 0x00010000 + + + +/** MxDecRV9API GFMXDECRV9CALLBACK::(*pCallBack)(, , ,uFlag)\n + for reading bitstream in forward direction +@see GFMXDECRV9CALLBACK +*/ +#define GF_MXDEC_RV9_READ_BITSTREAM_FORWARD 0x00000002 + +/** MxDecRV9API GFMXDECRV9CALLBACK::(*pCallBack)(, , ,uFlag) \n + for reading bitstream in reverse direction. +@see GFMXDECRV9CALLBACK +*/ +#define GF_MXDEC_RV9_READ_BITSTREAM_BACKWARD 0x00000003 + +//Resync options : + +/** MxDecRV9API GFMxDecRV9Resync( ,ResyncOption)\n + Resynchronize forward to the nearest I frame. If the GFMxDecRV9API is right + before an I frame, GFMxDecRV9Resync() returns immediately. Otherwise, + GFMxDecRV9Resync() moves forward, parsing bits until it reaches the first bit of the next I frame. +@see ResyncOption, GFMXDECRV9TABLE::MxDecRV9Resync +*/ + +#define GF_MXDEC_RV9_RESYNC_FORWARD_NEAREST_I_FRAME 0x00000001 + +/** MxDecRV9API GFMxDecRV9Resync(,ResyncOption)\n + Resynchronize backward to the nearest I frame. + GFMxDecRV9Resync() moves backward, parsing bits until it reaches the first bit of the previous I frame. +@see ResyncOption, GFMXDECRV9TABLE::MxDecRV9Resync +*/ +#define GF_MXDEC_RV9_RESYNC_BACKWARD_NEAREST_I_FRAME 0x00000002 + +/** MxDecRV9API GFMxDecRV9Resync(,ResyncOption)\n + Resynchronize backward to the nearest P frame. + GFMxDecRV9Resync() moves backward, parsing bits until it reaches the first bit of the previous P frame. +@see ResyncOption, GFMXDECRV9TABLE::MxDecRV9Resync +*/ +#define GF_MXDEC_RV9_RESYNC_BACKWARD_NEAREST_P_FRAME 0x00000004 + + + +/** this macro is used in GFMXDECRV9SURFLIST structure \n + Reference surfaces for RV9 decoder. */ +#define GF_MXDEC_RV9_NUM_SURFACES 3 + +/** This structure is used to Set up a list of surfaces for RV9 + decoder . +*/ + +typedef struct _GFMXDECRV9SURFLIST +{ + + PGFRMSURFACE SurfList[GF_MXDEC_RV9_NUM_SURFACES]; + /**< an array of PGFRMSURFACE + @see #GF_MXDEC_RV9_NUM_SURFACES + */ + + +}GFMXDECRV9SURFLIST, *PGFMXDECRV9SURFLIST; + +/** This structure is passed to MxDecRV9DecodePictureHeader() function, which sets + different fields of this structure. +*/ +typedef struct _GFMXDECRV9PICHDR +{ + NvU32 uiRV8StreamInfo; + /**< set by GFMxDecRV9API. Valid only if it is RV8 stream + + + + + + + + + + + +
      #GF_MXDEC_RV8_UMVUnrestricted Motion Vector
      #GF_MXDEC_RV8_DFIn loop Deblocking filter
      #GF_MXDEC_RV8_SSSlice Structured
      #GF_MXDEC_RV8_RPRReference Picture Resampling
      #GF_MXDEC_RV8_ROUNDRound off for half pixel motion compensation
      + */ + NvU32 uiRV9StreamInfo; + /**< set by GFMxDecRV9API. Valid only if it is RV9 stream + + + + + +
      #GF_MXDEC_RV9_INTERLACEInterlaced mode used
      #GF_MXDEC_RV9_DF_PASS_THRUIn loop Deblocking filter is disabled
      + */ + NvU32 uiWidth; /**< Video width */ + NvU32 uiHeight; /**< Video height */ + NvU32 uiTR; /**< Temporal reference in milliseconds */ + +}GFMXDECRV9PICHDR, *PGFMXDECRV9PICHDR; + +//uiRV8StreamInfo + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo \n + Unrestricted Motion Vector. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_UMV 0x00000001 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo \n + In loop Deblocking filter. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_DF 0x00000002 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo\n + Slice Structured. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_SS 0x00000004 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo \n + Reference Picture Resampling. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_RPR 0x00000008 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV8StreamInfo \n + Round off for half pixel motion compensation. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV8_ROUND 0x00000010 + +//uiRV9StreamInfo + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV9StreamInfo \n + Interlaced mode used. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV9_INTERLACE 0x00000001 + +/** MxDecRV9API GFMXDECRV9PICHDR::uiRV9StreamInfo \n + In loop Deblocking filter is disabled. +@see GFMXDECRV9PICHDR, GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_MXDEC_RV9_DF_PASS_THRU 0x00000002 + +//resync options +//TBD + +//when GF_ERROR is return check the following flag +#define GF_MXDEC_RV9_BAD_MB 0x00010000 //there is at least one MB is wrong + //if APP set up pMBInfo, APP can check which MB is wrong + +/** MxDecRV9API interrupt operation types. +Constants to specify operation for a call to MxDecRV9InterruptControl(). +@see GF_MXDEC_RV9_INTERRUPT_OPERATION_TYPE, GFMXDECRV9TABLE::MxDecRV9InterruptControl +*/ +typedef enum +{ + /** Enable interrupt/status assertion for an interrupt type. */ + GF_MXDEC_RV9_INTERRUPT_ENABLE, + + /** Disable interrupt/status assertion for an interrupt type. */ + GF_MXDEC_RV9_INTERRUPT_DISABLE, + + /** Clear interrupt/status assertion for an interrupt type. */ + GF_MXDEC_RV9_INTERRUPT_CLEAR +} GF_MXDEC_RV9_INTERRUPT_OPERATION_TYPE; // Interrupt operation. + + + +/** MxDecRV9API interrupt types. +@see GF_MXDEC_RV9_INTERRUPT_TYPE, GFMXDECRV9TABLE::MxDecRV9InterruptControl and GFMXDECRV9TABLE::MxDecRV9InterruptHandler +*/ +typedef enum +{ + /** Interrupt type is DSP Command Interrupt */ + GF_MXDEC_RV9_DSP_COMMAND_INTR, + + /** Interrupt type Post Processing done */ + GF_MXDEC_RV9_POST_PROCESSING_DONE_INTR, + + /** Interrupt type is Decoding done Interrupt */ + GF_MXDEC_RV9_DECODE_DONE_INTR +} GF_MXDEC_RV9_INTERRUPT_TYPE; + +/** MxDecRV9API virtual function pointer table. */ +typedef struct _GFMXDECRV9TABLE +{ + + /** This function returns version and capabilities of API and hardware. + + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param pMXProp (PGFPROPERTY) Pointer to GFPROPERTY structure to be filled in + + @retval GF_SUCCESS \a pMXProp filled in successfully + @retval GF_ERROR Some error occured + + The GFPROPERTY structure passed with parameter \a pMXProp will be + filled in on successfull return. The GFPROPERTY::Capability field + will hold a combination of flagbits indicating capabilities specific + to the MxDecRV9API: + + + + + + + + + + + + + + + + + + + + +
      #GF_MXDEC_RV9_CAP_SIMPLE support simple profile.
      #GF_MXDEC_RV9_CAP_MEDIUM support medium profile.
      #GF_MXDEC_RV9_CAP_COMPLEX support complex profile
      #GF_MXDEC_RV9_CAP_LEVEL1support LEVEL 1.
      #GF_MXDEC_RV9_CAP_LEVEL2 support LEVEL 2.
      #GF_MXDEC_RV9_CAP_LEVEL3 support LEVEL 3.
      #GF_MXDEC_RV9_CAP_LEVEL4 support LEVEL 4.
      #GF_MXDEC_RV9_CAP_DB support Post Processing's smoothing filter for RV8 streams.
      #GF_MXDEC_RV9_CAP_DR support Post Processing's de-ringing.
      + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxDecRV9API functions. + + @see GFPROPERTY +*/ + GF_RETTYPE (* MxDecRV9GetProperty)(GFMxDecRV9Handle hMxDecRV9, PGFPROPERTY pMXProp ); + + + + GF_RETTYPE (* MxDecRV9GetStatus)(GFMxDecRV9Handle hMxDecRV9, NvU32 * pStatus); + + + /** This function applies the postprocessing filters to the source surface and outputs + the new image to the destitation surface. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param pP (#PGFMXDECRV9PP) Pointer to the PGFMXDECRV9PP. + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + GF_ERROR Return values for the above function + + @see PGFMXDECRV9PP +*/ + GF_RETTYPE (* MxDecRV9PostProcessing)(GFMxDecRV9Handle hMxDecRV9, PGFMXDECRV9PP pP); + + + /** This function sets the MxDecRV9API options. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param uiFeature : + + + + + +
      #GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY will determine the VOL and VOP boundary, for RV9.
      #GF_MXDEC_RV9_ATTR_PREFILLBUFFERApp will fill the buffer and push the data to the decoder.
      + @param pInfo Pointer to the information buffer. + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + +*/ + GF_RETTYPE (* MxDecRV9SetAttribute)(GFMxDecRV9Handle hMxDecRV9, NvU32 uiFeature, NvU32* pInfo); + + + /** This function gets the MxDecRV9API options. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param uiFeature : + + + + + +
      #GF_MXDEC_ATTR_RV9_DEC_FRAME_RECT_TOP_ALIGNMENT
      #GF_MXDEC_ATTR_RV9_DEC_FRAME_RECT_LEFT_ALIGNMENT
      #GF_MXDEC_RV9_ATTR_PRE_DETERMINED_BOUNDARY
      #GF_MXDEC_RV9_ATTR_PREFILLBUFFER
      + @param pInfo Pointer to the information buffer. + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + +*/ + GF_RETTYPE (* MxDecRV9GetAttribute)(GFMxDecRV9Handle hMxDecRV9, NvU32 uiFeature, NvU32* pInfo); + + + /** This function sets the MxDecRV9API options. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param uiFeature : + + + + + + + +
      #GF_MXDEC_RV9_SET_READBITSTREAM will Set up readbitstream call back function.
      #GF_MXDEC_RV9_SET_SURFACE_LISTwill setup the surface list, including all of the ref surface and one reconstructed one.
      #GF_MXDEC_RV9_BITSTREAM_RV8 will Set the GFMxDecRV9API to decode the RV8 stream.
      + @param pInfo Pointer to the information buffer. + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + +*/ + GF_RETTYPE (* MxDecRV9Set)(GFMxDecRV9Handle hMxDecRV9, NvU32 uiFeature, void * pInfo); + + + + +/** This function Decodes the picture header and gives the related information in + PictureHeader. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param pPictureHeader Pointer to the #GFMXDECRV9PICHDR. + @retval GF_SUCCESS \a if it successfully decodes the Header + @retval GF_ERROR Some error occured + GF_ERROR Return values for the above function + + + + + + + + + +
      #GF_ERROR_RV9DECPICTUREHDR_DETECTED There is a sequence header in the bit stream. + Application need to decide this sequence is an error or this + is intended to be in the bit stream.
      #GF_ERROR_RV9DECPICTUREHDR_END_OF_FILE No more bit stream from application.
      #GF_ERROR_RV9DECPICTUREHDR_CORRUPTED GFMxDecRV9DecPicture encounters an un-recoverable error + in the bit stream. Application should call GFMxDecRV9Resync + API to skip this picture.
      #GF_ERROR_RV9DECPICTUREHDR_NOT_ENOUGH_MEM There is not enough memory.
      + + @see GFMXDECRV9PICHDR +*/ + GF_RETTYPE (* MxDecRV9DecodePictureHeader)(GFMxDecRV9Handle hMxDecRV9, PGFMXDECRV9PICHDR pPictureHeader); + + + /** This function decodes one frame from the bitstream. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param pFrame pointer to #PGFMXDECRV9FRAME + @retval GF_SUCCESS \a if successful + @retval #GF_MXDEC_RV9_FRAMEDEC_EOF_REACHED \a No more bit streams from the application. + +*/ + GF_RETTYPE (* MxDecRV9DecodeFrame)(GFMxDecRV9Handle hMxDecRV9, PGFMXDECRV9FRAME pFrame); + + + +/** GFMxDecRV9Resync re-synchronizes to a specific position of a bit stream.. + @param hMxDecRV9 (GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param ResyncOption : + + + + + + + +
      #GF_MXDEC_RV9_RESYNC_FORWARD_NEAREST_I_FRAME.Resynchronize forward to the nearest I frame.
      #GF_MXDEC_RV9_RESYNC_BACKWARD_NEAREST_I_FRAME.Resynchronize backward to the nearest I frame.
      #GF_MXDEC_RV9_RESYNC_BACKWARD_NEAREST_P_FRAME.Resynchronize backward to the nearest P frame.
      + @retval GF_SUCCESS \a if successful + @retval GF_ERROR Some error occured + +*/ + GF_RETTYPE (* MxDecRV9Resync)(GFMxDecRV9Handle hMxDecRV9, NvU32 ResyncOption); + + + + + GF_RETTYPE (* MxDecRV9InterruptControl)(GFMxDecRV9Handle hMxDecRV9, + GF_MXDEC_RV9_INTERRUPT_TYPE IntType, GF_MXDEC_RV9_INTERRUPT_OPERATION_TYPE op, + void * pData); + + + + /** This function provides component-level interrupt control for the + MxDecRV9API. It is optional because an interrupt service thread (IST) at the + application level can call the MxDecRV9API to complete the task. + @param hMxDecRV9(GFMxDecRV9Handle) Handle specific to MxDecRV9API + @param IntType MxDecRV9API interrupt type as defined in + “#GF_MXDEC_RV9_INTERRUPT_TYPE” + @param pData Pointer to data being passed in or out. + @retval GF_SUCCESS \a if successful. + @retval GF_ERROR Some error occured. + +*/ + GF_RETTYPE (* MxDecRV9InterruptHandler)(GFMxDecRV9Handle hMxDecRV9, + GF_MXDEC_RV9_INTERRUPT_TYPE IntType, void * pData); // Reserved. + +} GFMXDECRV9TABLE, *PGFMXDECRV9TABLE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFMxDecRV9Open(GFRmHandle hRm, GFMxDecRV9Handle *phMxDecRV9, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMxDecRV9Close(GFMxDecRV9Handle *phMxDecRV9); + +#if NVCPU_IS_XTENSA +#define MXDRV9OFFSET sizeof(GFMXDECRV9TABLE) +#else +#define MXDRV9OFFSET 0 +#endif + + +//ERROR return values for the GFMxDecRV9DecodePictureHeader() + +/** ERROR return values for the GFMxDecRV9DecodePictureHeader() \n + There is a sequence header in the bit stream. + Application need to decide this sequence is an error or this + is intended to be in the bit stream. + @see GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_ERROR_RV9DECPICTUREHDR_DETECTED 0x00000001 + + +/**ERROR return values for the GFMxDecRV9DecodePictureHeader() \n + No more bit stream from application. + @see GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_ERROR_RV9DECPICTUREHDR_END_OF_FILE 0x00000002 + + +/** ERROR return values for the GFMxDecRV9DecodePictureHeader() \n + GFMxDecRV9DecPicture encounters an un-recoverable error + in the bit stream. Application should call GFMxDecRV9Resync + API to skip this picture. + @see GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader +*/ +#define GF_ERROR_RV9DECPICTUREHDR_CORRUPTED 0x00000003 + +/**ERROR return values for the GFMxDecRV9DecodePictureHeader() \n + There is not enough memory. +*/ +#define GF_ERROR_RV9DECPICTUREHDR_NOT_ENOUGH_MEM 0x00000004 + +//ERROR return values for MxDecRV9DecodeFrame() +/** ERROR return values for MxDecRV9DecodeFrame()\n + API returns this error when End of file is reached,i.e No more bit stream from application. + once this ERROR is returned, the application should provide more media files to decode or + exit gracefully.*/ +#define GF_MXDEC_RV9_FRAMEDEC_EOF_REACHED 0x00000001 + +/* #### MxDecRV9API Helper macros. Maybe useful for backward compatible API. #### */ + + +/* #### MxDecRV9 Helper macros. Maybe useful for backward compatible API. #### */ +#define GFMxDecRV9GetProperty(hMxDecRV9, pMXProp) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9GetProperty(hMxDecRV9, pMXProp) + +#define GFMxDecRV9GetStatus(hMxDecRV9, pStatus) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9GetStatus(hMxDecRV9, pStatus) + +#define GFMxDecRV9DecodePictureHeader(hMxDecRV9, pPictureHeader)\ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9DecodePictureHeader(hMxDecRV9, pPictureHeader) + +#define GFMxDecRV9PostProcessing(hMxDecRV9, pP) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9PostProcessing(hMxDecRV9, pP); + +#define GFMxDecRV9SetAttribute(hMxDecRV9, uiFeature, pInfo) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9SetAttribute(hMxDecRV9, uiFeature, pInfo) + +#define GFMxDecRV9GetAttribute(hMxDecRV9, uiFeature, pInfo) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9GetAttribute(hMxDecRV9, uiFeature, pInfo) + +#define GFMxDecRV9Set(hMxDecRV9, uiFeature, pInfo) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9Set(hMxDecRV9, uiFeature, pInfo) + +#define GFMxDecRV9DecodeFrame(hMxDecRV9, pFrame) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9DecodeFrame(hMxDecRV9, pFrame) + +#define GFMxDecRV9Resync(hMxDecRV9, ResyncOption) \ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9Resync(hMxDecRV9, ResyncOption) + +#define GFMxDecRV9InterruptControl(hMxDecRV9, IntType, op, pData)\ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9InterruptControl(hMxDecRV9, IntType, op, pData) + +#define GFMxDecRV9InterruptHandler(hMxDecRV9, IntType, pData)\ + ((PGFMXDECRV9TABLE)((NvU32)hMxDecRV9+MXDRV9OFFSET))->MxDecRV9InterruptHandler(hMxDecRV9, IntType, pData) + + + +/*@}*/ +/*@}*/ + + +/** @page pageMxDecRV9AppNotes MxDecRV9API Application Notes + @section pageMxDecRV9AppNotes1 Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start + GFSDK usage. + + + + 1. Call GFMxDecRV9Open() to obtain RV9Handle. This handle will be passed to different functions of MxDecRV9API. + + 2. Call GFMxDecRV9GetProperty()to querry the properties.Check whether this + MxDecRV9API version can support the desired RV9 profile and level. + + 3. Set different attributes of RV9 decoder using GFMxDecRV9SetAttribute(), + #GFMXDECRV9TABLE::MxDecRV9SetAttribute. + + 4. Decode the picture header using GFMxDecRV9DecodePictureHeader(), + #GFMXDECRV9TABLE::MxDecRV9DecodePictureHeader. + + 5. call GFRmSurfaceAlloc() to allocate at least one reference surface and one + current surface for decoding purposes. + + 6. If the postprocessing engine is needed, allocate one surface to hold the + postprocessing results. + + 7. For display purposes, the decoder application could call GFVxBlt() for + the following two scenarios. Please refer to the latest GFVxAPI document + for additional information. + + + + 8. The decoder application should decode on frame by frame basis. Call GFMxDecRV9DecodeFrame() to decode each frame. + once GF_MXDEC_RV9_FRAMEDEC_EOF_REACHED is returnd by API, application should exit gracefully. + #GFMXDECRV9TABLE::MxDecRV9DecodeFrame + + 9. If Post processing is enabled , call GFMxDecRV9PostProcessing(). + #GFMXDECRV9TABLE::MxDecRV9PostProcessing + + 10. Before exiting the application, the decoder application should call + GFRmSurfaceFree() to free the surfaces that have been allocated. + + 11. Call GFMxDecRV9Close() with RV9Handle to release the resources of the decoder module. + +*/ + + +#ifdef __cplusplus +} // only need to export C interface if + // used by C++ source code +#endif + +#endif diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecVC1.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecVC1.h new file mode 100755 index 00000000..da28a6ec --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDecVC1.h @@ -0,0 +1,732 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFMxDecVC1.h +GFSDK VC1 Decode API header file. +*/ + +#ifndef _GF_MPEG_DEC_VC1__ +#define _GF_MPEG_DEC_VC1__ + +#include "nvtypes.h" +#include "GFVx.h" +#include "GFDef.h" + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif + + /** @addtogroup groupMxDecVC1 MxDecVC1API VC1 Decode API + The VC1 decoder API handles WMV simple profile-compliant bit + streams for this version, but has been defined to handle all of the three + profiles for future expansion. + + The VC1 decoder API has two sets of API—a high level API and a low + level API. + + Using the High Level API + + The high level API has a built-in entropy decoder. It decodes the bit stream. + This high level API calls the low level API internally. When using the high level API, the + application can ignore the low level API. + + The MxDecVC1API high level functions include the following: + - GFMxDecVC1DecSequenceLayer() + - GFMxDecVC1DecPicture() + - GFMxDecVC1Set() + + Using the Low Level API + + The low level API is essentially a macroblock decoder engine. It decodes + macroblock by macroblock. When using the low level API, the application + needs to handle the entropy decoding. The low level + API assumes that the information passed from caller is correct, and does not + have any error concealment functionality build in. The application which + called the low level API must make sure that no macroblocks are missing for + any picture. + + The MxDecVC1API low level functions include the following: + - GFMxDecVC1SetPicture() + - GFMxDecVC1SetMBs() + - GFMxDecVC1SetPicture() + +
        +
      • @ref pageMxDecVC1AppNotes +
          +
        • @ref pageMxDecVC1AppNotes1 +
        +
      + */ + /*@{*/ + + // MXDECVC1CapFlags + + /** MxDecVC1API property flag: Simple profile supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_SIMPLE 0x00000001 + + /** MxDecVC1API property flag: Main profile supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_MAIN 0x00000002 + + /** MxDecVC1API property flag: Extended profile supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_ADVANCE 0x00000004 + + /** MxDecVC1API property flag: Low LEVEL supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LOWLEVEL 0x00000008 + + /** MxDecVC1API property flag: Medium LEVEL supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_MEDIUMLEVEL 0x00000010 + + /** MxDecVC1API property flag: High LEVEL supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_HIGHLEVEL 0x00000100 + + /** MxDecVC1API property flag: LEVEL 0 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL0 0x00000200 + + /** MxDecVC1API property flag: LEVEL 1 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL1 0x00000400 + + /** MxDecVC1API property flag: LEVEL 2 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL2 0x00000800 + + /** MxDecVC1API property flag: LEVEL 3 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL3 0x00001000 + + /** MxDecVC1API property flag: LEVEL 4 supported. + @see GFMxDecVC1GetProperty(), GFPROPERTY::Capability + */ +#define GF_MXDEC_VC1_CAP_LEVEL4 0x00002000 + + + /**Enable the DSP side profiling */ +//#define GF_ENABLE_PROFILER 1 + +// to divert the code for checking the non-working of hw modules as of now +#define USE_HW_MODULES + + /** Parameter structure for MxDecVC1DecSequenceLayer(). + Both input and output parameters are passed via this structure to MxDecVC1DecSequenceLayer(). + @see MxDecVC1DecSequenceLayer() + */ + + + typedef struct _GFMXDECVC1DECSEQUENCELAYER + { + + NvU32 uiSequenceOption; /**< Input flags, see GFMXDECVC1_DECSEQUENCEOPTION_* */ + NvU8 ucSequenceLayerInfo; /**< SequenceLayerInfo Definition */ + NvU16 usWidth; /**< Horizontal size of the coded picture in pixels */ + NvU16 usHeight; /**< Vertical size of the coded picture in pixels */ + NvU8 ucProfile; /**< Profile of the sequence */ + NvU8 ucLevel; /**< Level of the sequence */ + NvU32 uiHRDRate; /**< Peak transmission rate R in bits per second */ + NvU32 uiHRDBufferSize; /**< Buffer size B in milliseconds. */ + NvU32 uiFrameRate; /**< Rounding frame rate of the encoded clips */ + NvU8* pPreFillBuffer; /**< Input, Pointer bitstream for sequence header to decode */ + NvU32 PreFillBufferLength; /**< Input, Length of bitstream in bytes, must cover the entire sequence header */ + NvU32 PreFillBufferBytesConsumed;/**< Output, Amount of bytes consumed by the component */ + + } GFMXDECVC1DECSEQUENCELAYER, *PGFMXDECVC1DECSEQUENCELAYER; + + //SequenceLayerInfo: +#define MXDEC_VC1_CONSTANT_BITRATE 0x00000001 /**< Flag is set when the sequence is encoded at constant bitrate */ +#define MXDEC_VC1_MULTIRESOLUTION 0x00000002 /**< Flag indicating that the frames can be coded at smaller */ + //resolution. Resolution change is allowed only on I pictures. + //Information of the picture + + /** GFMXDECVC1DECSEQUENCELAYER::uiSequenceOption input flagbit: Bitstream is passed with GFMxDecVC1DecSequenceLayer(). + If this flag is set bitstream data is passed with the call to GFMxDecVC1DecSequenceLayer() + instead via the read bitstrem callback. This can be used only with boundary detection + on application level. The bitstream data is passed via GFMXDECVC1DECSEQUENCELAYER::pPreFillBuffer and + GFMXDECVC1DECSEQUENCELAYER::PreFillBufferLength. + */ +#define GFMXDECVC1_DECSEQUENCEOPTION_PREFILLBUFFER 0x00000001 + + + /** Parameter structure for MxDecVC1DecPicture(). + Both input and output parameters are passed via this structure to MxDecVC1DecPicture(). + @see MxDecVC1DecPicture() + */ + typedef struct _GFMXDECVC1DECPICTURE + { + /**< the following fields are set by app */ + NvU32 uiPictureOption; /**< Set by application. Set to 0 for this version.*/ + PGFRMSURFACE pRef; /**< Reference Picture Surface */ + PGFRMSURFACE pCur; /**< Current Picture Surface */ + PGFRECT pRefRect; /**< pRefSurfRect specified a rectangular area within + the pRef surface, and GFMxDecVC1 references the + image in the pRefSurfRect area of the pRef surface. + If pRefSurfRect is NULL, entire pRef surface is referred.*/ + + PGFRECT pCurRect; /**pCurSurfRect specified a rectangular area within + the pCur surface, and GFMxDecVC1 references the + image in the pCurSurfRect area of the pCur surface. + If CurSurfRect is NULL, entire pCur surface is referred. + */ + + /**< the following fields are set by MxDecVC1DecPicture API */ + NvU32 uiPictureInfo; /**< Current Picture Information. */ + + NvU8* pPreFillBuffer; /**< Input, Pointer bitstream for frame to decode */ + NvU32 PreFillBufferLength; /**< Input, Length of bitstream in bytes, must cover the entire frame */ + NvU32 PreFillBufferBytesConsumed; /**< Output, Amount of bytes consumed by the component */ + + NvU32 uiTimeStamp; /**< Value Specified in Picture Layer Header.*/ + NvU8 * pMBInfo; /**< each element tells the particular MB is wrong or not.*/ + +#ifdef GF_ENABLE_PROFILER + + NvU32 DSPTimers[10]; +#endif + + } GFMXDECVC1DECPICTURE, *PGFMXDECVC1DECPICTURE; + + //PictureInfo: +#define MXDEC_VC1_DEC_PICTURE_P 0x00000001 //Flag is set when current Picture is P type +#define MXDEC_VC1_DEC_NOT_CODED 0x00000010 //Flag is set when current picture is not coded. + +//uiPictureOption + +/** GFMXDECVC1DECPICTURE::uiPictureOption input flagbit: Use target rectangle. + If this flag is set, the GFMXDECVC1DECPICTURE::pPictureRect will point to + a rectangle on the output surface, where the reconstructed frame is placed. +*/ +#define GF_MXDEC_VC1_DEC_PICTURE_SPECIFY_SURF_RECT 0x00000001 + +/** GFMXDECVC1DECPICTURE::uiPictureOption input flagbit: Bitstream is passed with MxDecVC1DecPicture(). + If this flag is set bitstream data is passed with the call to MxDecVC1DecPicture() + instead via the read bitstrem callback. This can be used only with frame boundary detection + on application level. The bitstream data is passed via GFMXDECVC1DECPICTURE::pPreFillBuffer and + GFMXDECVC1DECPICTURE::PreFillBufferLength. +*/ +#define GF_MXDEC_VC1_DEC_PICTURE_SPECIFY_PREFILLBUFFER 0x00000002 + +/** GFMXDECVC1DECPICTURE::uiPictureOption input flagbit: If This Flag is Set Reading of + .rcv wrapper will be skipped for each picture. +*/ +#define GF_MXDEC_VC1_DEC_PICTURE_SPECIFY_SKIP_RCV_WRAPPER 0x00000004 + + /**Low level API Picture structure + */ + typedef struct _GFMXDECVC1PICTURE + { + NvU32 PictureInfo; /**< Current Picture Information defined in + //GFMXDECVC1PICTURE Definitions */ + PGFRMSURFACE pRef; /**< Reference Picture Surface */ + PGFRMSURFACE pCur; /**< Current Picture Surface */ + PGFRECT pRefRect; /**< pRefSurfRect specified a rectangular area + within the pRef surface, and GFMxDecVC1 + references the image in the pRefSurfRect + area of the pRef surface. If pRefSurfRect is NULL, + entire pRef surface is referred. */ + PGFRECT pCurRect; /**< pCurSurfRect specified a rectangular area + within the pCur surface, and GFMxDecVC1 + references the image in the pCurSurfRect + area of the pRef surface. If pCurSurfRect is NULL, + entire pCur surface is referred. */ + + } GFMXDECVC1PICTURE, *PGFMXDECVC1PICTURE; + //PictureInfo: +#define MXDEC_VC1_PICTURE_P_PICTURE 0x00000001 + //Indicates a P Picture when set otherwise a I Picture +#define MXDEC_VC1_PICTURE_SPECIFY_REFSURF_RECT 0x00000002 + //If this Flag is set, pRefSurfRect must be set, and GFMxDecVC1 + //references the image in the pRefSurfRect area of the pRef surface. + //Otherwise entire pRef surface is referred. +#define MXDEC_VC1_PICTURE_SPECIFY_CURSURF_RECT 0x00000004 + //If this Flag is set, pCurSurfRect must be set, and GFMxDecVC1 outputs + //the decoded image in the pCurSurfRect area of the pCur surface. + //Otherwise entire pCur surface is referred. +#define MXDEC_VC1_PICTURE_ROUNDING_ONE 0x00000008 + //PICTURE_ROUNDING_TYPE is one + + + /**motion vector information for current macroblock*/ + + typedef struct _GFMXDECVC1VECTOR + { + NvS16 sH_MV_DATA; /**< Horizonal motion vector data. */ + NvS16 sV_MV_DATA; /**< Vertical motion vector data. */ + } GFMXDECVC1VECTOR, *PGFMXDECVC1VECTOR; + + /**coefficient information for macroblock*/ + + typedef struct _GFMXDECVC1COEF + { + NvU8 uiLAST; /**< This last non-zero coefficient in current block */ + NvU8 uiRUN; /**< How many zeroes precede this coefficient */ + NvS16 iLEVEL; /**< This coefficient's level value */ + } GFMXDECVC1COEF, *PGFMXDECVC1COEF; + + /**macroblock information*/ + + typedef struct _GFMXDECVC1MB + { + NvU16 uiX; /**< MB's x position in the picture*/ + NvU16 uiY; /**< MB's y position in the picture*/ + NvU32 uiMBInfo; /**< MacroBlock characteristics*/ + NvU32 uiBlkType[6]; /**< Block characteristics*/ + NvU8 uiBlkCoded[6]; /**< Block characteristics*/ + NvU8 uiBlkNZC[6]; /**< Block characteristics*/ + NvU8 ucFirstCodedBlk; /**< First Coded Block in Macroblock*/ + NvU16 uiQuantiser; /**< current MB's quantiser*/ + GFMXDECVC1VECTOR Vector[4]; /**< motion vector zero ~ three*/ + NvU32 uiNumofCoef; /**< number of GFMXDECVC1COEF //structures for current MB*/ + + } GFMXDECVC1MB, *PGFMXDECVC1MB; + + //MBInfo: +#define MXDEC_VC1_MB_TYPE_INTER 0x1 //inter mb + + /*Quantiser Type of MacroBlock */ +#define MXDEC_VC1_MB_NON_UNIFORM_QUANTISER 0x2 //Non Uniform Quantiser + + +#define MXDEC_VC1_MB_AC_PRED_ON 0x80 //AC prediction is on +#define MXDEC_VC1_MB_FIELDTX 0x100 +#define MXDEC_VC1_MB_MV_1_MVS 0x200 //1 motion vector coded +#define MXDEC_VC1_MB_MV_4_MVS 0x400 //4 motion vector coded +#define MXDEC_VC1_MB_SKIPPED 0x800 //Macro Block not coded + + /* Motion vector direction bits [15:14] */ +#define MXDEC_VC1_MB_DIRECT 0x1000 +#define MXDEC_VC1_MB_FORWARD 0x2000 +#define MXDEC_VC1_MB_BACKWARD 0x4000 + +#define MXDEC_VC1_MB_AUTO_DISPLAY 0x8000 +#define MXDEC_VC1_MB_OVERLAP 0x10000 + + +#define MXDEC_VC1_MB_MV_MODE1MV_HALF_PEL_BILINEAR 0x20000 +#define MXDEC_VC1_MB_MV_MODE1MV_HALF_PEL 0x40000 +#define MXDEC_VC1_MB_MV_MODE_MIXED_MV 0x100000 +#define MXDEC_VC1_MB_MV_MODE_INTENSITY_COMP 0x200000 + +#define MXDEC_VC1_MB_MV_RANGE_64_32 0x400000 +#define MXDEC_VC1_MB_MV_RANGE_128_64 0x800000 +#define MXDEC_VC1_MB_MV_RANGE_512_128 0x1000000 +#define MXDEC_VC1_MB_MV_RANGE_1024_256 0x2000000 + + + //uiBlkInfo +#define MXDEC_VC1_BLK_CODED 0x1 + + +#define MXDEC_VC1_BLK_INTER 0x2 +#define MXDEC_VC1_BLK_INTER8X8 0x4 +#define MXDEC_VC1_BLK_INTER8X4 0x8 +#define MXDEC_VC1_BLK_INTER4X8 0x10 +#define MXDEC_VC1_BLK_INTER4X4 0x20 +#define MXDEC_VC1_BLK_INTER_ANY 0x40 + +#define MXDEC_VC1_BLK_INTRA 0x80 +#define MXDEC_VC1_BLK_INTRA_TOP 0x100 +#define MXDEC_VC1_BLK_INTRA_LEFT 0x200 + + +#define MXDEC_VC1_SUBBLK_0 0x1 +#define MXDEC_VC1_SUBBLK_1 0x2 +#define MXDEC_VC1_SUBBLK_2 0x4 +#define MXDEC_VC1_SUBBLK_3 0x8 + + + + //After GFMX decodes this Macro Block, it will auto trigger video engine to display + //this VOP if decoder application set auto blt on through GFVxBlt. + //If MXDEC_MB_AUTO_PP and MXDEC_MA_AUTO_DISPLAY both on, //GFMX will trigger Post Processing first, then trigger display engine. + + + // definition for attribute + + /** GFMxDecVC1 Attribute: Application will determine the decoding boundary, this boundary + means sequence and picture layer boundary. + Interpretation of block referenced by \a pInfo parameter: + 
      +    NvU32 1: APP will determine the decoding boudary
+    0: APP will not determine the decoding boundary
+
      + + @see GFMxDecVC1GetAttribute(), GFMxDecVC1SetAttribute() + */ +#define GF_MXDEC_VC1_ATTR_PRE_DETERMINED_BOUNDARY 0x00000001 + + /** GFMxDecVC1 Attribute: This attribute only can be used for GFMxDecGetAttribute + If application wants to set pDestRect in GFMXDECPICTURE or GFMXDECVC1DECPICTURE, + application must use this attributes to get allignment information and + align the rectangle top & left corner accordinately. + *pInfo: top fieled alignment in term of lines + */ +#define GF_MXDEC_VC1_ATTR_DEC_PICTURE_RECT_TOP_ALIGNMENT 0x00000010 + + /** GFMxDecVC1 Attribute: This attribute only can be used for GFMxDecVC1GetAttribute + If application wants to set pDestRect in GFMXDECVC1PICTURE or GFMXDECVC1DECPICTURE, + application must use those attributes to get allignment information and + align the rectangle top & left corner accordinately. + *pInfo: left fieled alignment in term of pixels + */ +#define GF_MXDEC_VC1_ATTR_DEC_PICTURE_RECT_LEFT_ALIGNMENT 0x00000011 + + /** GFMxDecVC1 Attribute: Save decoder internal state information. This attribute only can be used for GFMxDecVC1GetAttribute + *pInfo: state handle + */ +#define GF_MXDEC_VC1_ATTR_DEC_SAVE_STATE 0x00000012 + + /** GFMxDecVC1 Attribute: Restore decoder internal state information. This attribute only can be used for GFMxDecVC1SetAttribute + *pInfo: state handle + */ +#define GF_MXDEC_VC1_ATTR_DEC_RESTORE_STATE 0x00000013 + + /** GFMxDecVC1 Attribute: Delete particular state handle. This attribute only can be used for GFMxDecVC1SetAttribute + *pInfo: state handle + */ +#define GF_MXDEC_VC1_ATTR_DEC_DELETE_STATE 0x00000014 + +#define GF_MXDEC_VC1_ATTR_DEC_ENABLE_RAISE_WAIT 0x00000015 + //Use this attribute to enable RaiseWait mechanish. This is required for OpenMax application. + //Decoder works in FRAME_DONE polling mode by default.This attribute only can be used for GFMxDecVC1SetAttribute + //*pInfo: state handle. + + typedef struct _GFMXDECVC1PP + { + PGFRMSURFACE* pDestSurf;/**< pointer to an array of surfaces that will + hold the result from Post Processing + pointer to an array of surfaces to + accommodate auto post processing + */ + PGFRMSURFACE* pSrcSurf; /**< pointer to an array of surfaces to be //post processed + pointer to an array of surfaces to + accommodate auto post processing + */ + PGFRECT pRect; /**< Rectangle area to be processed for both + src and dest surface + */ + NvU32 numofDestSurf; /**< If MXDEC_PP_AUTO flag is set, this + parameter must be filled + */ + NvU32 numofSrcSurf; /**< If MXDEC_PP_AUTO flag is set, this + parameter must be filled + */ + NvU8 * lpQuantiser; /**< point to array of QPs for Macro Blocks in + the source VOP. GFMX automatically saved + the last two decoded VOP's QP tables, + Decoder application may not need to reload + the table if it can make sure the source + VOP is the one within the last decoded + VOPs. If MXDEC_PP_RELOAD_QUANTIZER is set, + this field must be filled. + */ + NvU32 PPOption; /** + + +
      Performing color space conversion and then a stretch blit to the primary surface directly.Blitting to the overlay surface.
      GF_MXDEC_VC1_READ_BITSTREAM_FORWARD Forward scan
      GF_MXDEC_VC1_READ_BITSTREAM_BACKWARDBackward scan
      + + @return If the #MXDEC_ATTR_PRE_DETERMINED_BOUNDARY attribute is set, the callback + should return #GF_MXDEC_VC1_BOUNDARY_REACHED when a frame boundary is + detected, or 0 if no boundary is detected. + If the #MXDEC_ATTR_PRE_DETERMINED_BOUNDARY attribute is not set, the callback + should return 0. + */ + + /**pPara is a parameter passed from APP, + and APP wants API to call back with this parameter */ + + NvU32 (*pCallBack)(void * pPara, NvU8 ** ppBuffer, NvS32 * BufferLength, NvU32 uFlag); + /** If APP set GF_MXDEC_ATTR_PRE_DETERMINED_BOUNDARY, + APP should return GF_MXDEC_VC1_BOUNDARY_REACHED when the boundary is + detected. + If APP does not set GF_MXDEC_ATTR_PRE_DETERMINED_BOUNDARY, + 0 should be returned. */ + + }GFMXDECVC1CALLBACK, *PGFMXDECVC1CALLBACK; + + /** GFMXDECVC1CALLBACK::pCallBack return code */ +#define GF_MXDEC_VC1_BOUNDARY_REACHED 0x00000001 + /** GFMXDECVC1CALLBACK::pCallBack uFlag value: Stream forward scan. */ +#define GF_MXDEC_VC1_READ_BITSTREAM_FORWARD 0x00000002 + /** GFMXDECVC1CALLBACK::pCallBack uFlag value: Stream backward scan. */ +#define GF_MXDEC_VC1_READ_BITSTREAM_BACKWARD 0x00000003 + + + + typedef enum + { + GFMX_DEC_VC1_INTERRUPT_ENABLE, + GFMX_DEC_VC1_INTERRUPT_DISABLE, + GFMX_DEC_VC1_INTERRUPT_CLEAR + } GFMX_DEC_VC1_INTERRUPT_OPERATION_TYPE; // Interrupt operation. + + typedef enum + { + GFMX_DEC_VC1_DECODE_DONE_INTR, + GFMX_DEC_VC1_POST_PROCESSING_DONE_INTR, + GFMX_DEC_VC1_DSP_COMMAND_INTR, + } GFMX_DEC_VC1_INTERRUPT_TYPE; + + typedef struct _GFMXDECVC1TABLE + { + GF_RETTYPE (* MxDecVC1GetProperty)(GFMxDecVC1Handle hMxDecVC1, PGFPROPERTY pMXProp ); + GF_RETTYPE (* MxDecVC1GetStatus)(GFMxDecVC1Handle hMxDecVC1, NvU32 * pStatus); + GF_RETTYPE (* MxDecVC1DecSequenceLayer)(GFMxDecVC1Handle hMxDecVC1, PGFMXDECVC1DECSEQUENCELAYER pSequenceLayer); + GF_RETTYPE (* MxDecVC1DecPicture)(GFMxDecVC1Handle hMxDecVC1, PGFMXDECVC1DECPICTURE pPicture); + GF_RETTYPE (* MxDecVC1SetPicture)(GFMxDecVC1Handle hMxDecVC1, PGFMXDECVC1PICTURE pPicture); + GF_RETTYPE (* MxDecVC1SetMBs)(GFMxDecVC1Handle hMxDecVC1, PGFMXDECVC1MB pMBs); + GF_RETTYPE (* MxDecVC1SetAttribute)(GFMxDecVC1Handle hMxDecVC1, NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* MxDecVC1GetAttribute)(GFMxDecVC1Handle hMxDecVC1, NvU32 uiFeature, NvU32* pInfo); + GF_RETTYPE (* MxDecVC1Set)(GFMxDecVC1Handle hMxDecVC1, NvU32 uiFeature, void * pInfo); + GF_RETTYPE (* MxDecVC1InterruptControl)(GFMxDecVC1Handle hMxDecVC1, + GFMX_DEC_VC1_INTERRUPT_TYPE IntType, GFMX_DEC_VC1_INTERRUPT_OPERATION_TYPE op, + void * pData); + GF_RETTYPE (* MxDecVC1InterruptHandler)(GFMxDecVC1Handle hMxDecVC1, + GFMX_DEC_VC1_INTERRUPT_TYPE IntType, void * pData); // Reserved. + GF_RETTYPE (* MxDecVC1DecResync)(GFMxDecVC1Handle hMxDecVC1, NvU32 ResyncOption); + } GFMXDECVC1TABLE, *PGFMXDECVC1TABLE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFMxDecVC1Open(GFRmHandle hRm, GFMxDecVC1Handle *phMxDecVC1, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMxDecVC1Close(GFMxDecVC1Handle *phMxDecVC1); + +#if NVCPU_IS_XTENSA +#define MXDVC1OFFSET sizeof(GFMXDECVC1TABLE) +#else +#define MXDVC1OFFSET 0 +#endif + + /** #### MxDecVC1 Helper macros. Maybe useful for backward compatible API. #### + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxDecVC1API functions. + + @see GFPROPERTY + */ + +#define GFMxDecVC1GetProperty(hMxDecVC1, pMXProp) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1GetProperty(hMxDecVC1, pMXProp) + +#define GFMxDecVC1GetStatus(hMxDecVC1, pStatus) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1GetStatus(hMxDecVC1, pStatus) + + /** Decode sequence header. + + @param hMxDecVC1 (GFMxDecVC1Handle) Handle to MxDecVC1 component + @param pSequence (PGFMXDECVC1DECSEQUENCELAYER) Pointer to #GFMXDECVC1DECSEQUENCELAYER parameter structure + + @retval GF_SUCCESS Sequence header was decoded successfully + + This function will be called whenever a sequence header is found in the bitstream, decode + it and return its characteristics. + + @see GFMXDECVC1DECSEQUENCELAYER + */ +#define GFMxDecVC1DecSequenceLayer(hMxDecVC1, pSequenceLayer)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1DecSequenceLayer(hMxDecVC1, pSequenceLayer) + + + //return value + /** GFMxDecVC1 error code: GFMxDecVC1DecSequenceLayer() encountered end of bitstream. + @see GFMxDecVC1DecSequenceLayer() + */ +#define GFMXDECVC1_SEQUENCELAYER_ERROR_END_OF_FILE (GFMXDVC1_ERROR | 0x00000001) + + /** GFMxDecVC1 error code: GFMxDecVC1DecSequenceLayer() bitstream format not supported. + The sequence header specifies a bitstream format, that is not supported. Most likely + reason for this error is that the VC1 profile is not supported. + @see GFMxDecVC1DecSequenceLayer() + */ +#define GFMXDECVC1_SEQUENCELAYER_ERROR_NOT_SUPPORT_FORMAT (GFMXDVC1_ERROR | 0x00000002) + + /** GFMxDecVC1 error code: GFMxDecVC1DecSequenceLayer() bitstream format is damaged due to + erroroneous stream. + @see GFMxDecVC1DecSequenceLayer() + */ +#define GFMXDECVC1_SEQUENCELAYER_ERROR_HEADER_DAMAGED (GFMXDVC1_ERROR | 0x00000003) + + /** GFMxDecVC1 error code: GFMxDecVC1DecSequenceLayer() encountered out of GPU memory error. + The application can try to free GPU memory and call GFMxDecVC1DecSequenceLayer() again. + @see GFMxDecVC1DecSequenceLayer() + */ +#define GFMXDECVC1_SEQUENCELAYER_ERROR_NOT_ENOUGH_SYSTEM_MEM (GFMXDVC1_ERROR | 0x00000004) + + + /** Decode a picture. + + @param GFMxDecVC1 (GFMxDecVC1Handle) Handle to MxDecVC1 component + @param pPicture (PGFMXDECVC1DECPICTURE) Pointer to #GFMXDECVC1DECPICTURE parameter structure + + @retval GF_SUCCESS Frame was decoded successfully + @retval GFMXDECVC1_PICTURE_ERROR_END_OF_FILE End of stream encountered + @retval GFMXDECVC1_PICTURE_ERROR_CORRUPTED_PICTURE Unrecoverable bitstream error during frame decode + @retval GFMXDECVC1_PICTURE_ERROR_NOT_ENOUGH_SYSTEM_MEM Out of GPU memory + @retval GFMXDECVC1_ERROR_RESYNC_END_OF_FILE Resync was found at end of bitstream. + @retval GFMXDECVC1_ERROR_P_PICTURE_FOUND_AT_START instead of Inter frame, intra was found in beginning. + @retval GFMXDECVC1_ERROR_DSP_TIMEOUT AVP times out + + GFMxDecVC1DecPicture decodes one picture from the bit stream. If GFMxDecVC1DecPicture detects an + error, GFMxDecVC1DecPicture returns the error back to the application. + If the current stream position is not on the start of a frame, the function scans forward until a frame + start or sequence header is detected. + + @see GFMXDECVC1DECPICTURE + */ +#define GFMxDecVC1DecPicture(hMxDecVC1, pPicture)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1DecPicture(hMxDecVC1, pPicture) + + //return value + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() encountered end of bitstream. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_PICTURE_ERROR_END_OF_FILE (GFMXDVC1_ERROR | 0x00000005) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() encountered an unrecoverable bitstream error. + The application should call GFMxDecVC1DecResync() again, MxDecVC1 will then + scan for the next frame boundary and try to decode this frame. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_PICTURE_ERROR_CORRUPTED_PICTURE (GFMXDVC1_ERROR | 0x00000006) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() encountered out of GPU memory error. + System memory is not enough to decode Picture. The application can try to free GPU memory and call + GFMxDecVC1DecPicture() again. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_PICTURE_ERROR_NOT_ENOUGH_SYSTEM_MEM (GFMXDVC1_ERROR | 0x00000007) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() upon calling GFMxDecVC1DecResync() + encountered end of bitstream. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_ERROR_RESYNC_END_OF_FILE (GFMXDVC1_ERROR | 0x00000008) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() got a + "P" frame without it's prior reference frame + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_ERROR_P_PICTURE_FOUND_AT_START (GFMXDVC1_ERROR | 0x00000009) + + /** GFMxDecVC1 error code: GFMxDecVC1DecPicture() DSP times out while decoding. + @see GFMxDecVC1DecPicture() + */ +#define GFMXDECVC1_ERROR_DSP_TIMEOUT (GFMXDVC1_ERROR | 0x0000000a) // dsp hang workaround :( + +#define GFMxDecVC1SetPicture(hMxDecVC1, pPicture)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1SetPicture(hMxDecVC1, pPicture) + +#define GFMxDecVC1SetMBs(hMxDecVC1, pMBs) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1SetMBs(hMxDecVC1, pMBs); + +#define GFMxDecVC1SetAttribute(hMxDecVC1, uiFeature, pInfo) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1SetAttribute(hMxDecVC1, uiFeature, pInfo) + +#define GFMxDecVC1GetAttribute(hMxDecVC1, uiFeature, pInfo) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1GetAttribute(hMxDecVC1, uiFeature, pInfo) + +#define GFMxDecVC1Set(hMxDecVC1, uiFeature, pInfo) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1Set(hMxDecVC1, uiFeature, pInfo) + +#define GFMxDecVC1DecResync(hMxDecVC1, ResyncOption) \ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1DecResync(hMxDecVC1, ResyncOption) + +#define GFMxDecVC1InterruptControl(hMxDecVC1, IntType, op, pData)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1InterruptControl(hMxDecVC1, IntType, op, pData) + +#define GFMxDecVC1InterruptHandler(hMxDecVC1, IntType, pData)\ + ((PGFMXDECVC1TABLE)((NvU32)hMxDecVC1+MXDVC1OFFSET))->MxDecVC1InterruptHandler(hMxDecVC1, IntType, pData) + + + //resynch value +#define MXDEC_VC1_RESYNC_FORWARD_NEXT_PICTURE 0x00000001 + // resync to next picture +#define MXDEC_VC1_RESYNC_FORWARD_NEXT_I_PICTURE 0x00000002 + // resync to next I Picture +#define MXDEC_VC1_RESYNC_BACKWARD_PREVIOUS_PICTURE 0x00000004 + // resync to next picture +#define MXDEC_VC1_RESYNC_BACKWARD_PREVIOUS_I_PICTURE 0x00000008 + // resync to next I Picture + + //return value +#define VC1DECRESYNC_END_OF_FILE 0x00000002 // end of file whie resync + + /*@}*/ + + /** @page pageMxDecVC1AppNotes MxDecVC1API Application Notes + + @section pageMxDecVC1AppNotes1 Programming Sequence + + Todo + */ + + +#ifdef __cplusplus +} // only need to export C interface if +// used by C++ source code +#endif + +#endif + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDemTS.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDemTS.h new file mode 100755 index 00000000..3dbca68e --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxDemTS.h @@ -0,0 +1,725 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFMxDemTS.h + GFSDK MPEG2 Transport Stream API (host) header file. +*/ + +#ifndef _GF_MPEG_TS__ +#define _GF_MPEG_TS__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup groupMxDemTS MxDemTSAPI MPEG2 Transport Stream Demux API + + This GFSDK component allows to create MPEG TS demux parsers either running + on the host or DSP side. TS data can be pushed from the application, + or be streamed from VIP. + + The are multiple types of parser objects, see also GFMXDEMTSPARSERTYPE: + 
      +    GFMXDEMTSPARSERTYPE_HOST      - demux running on host
+    GFMXDEMTSPARSERTYPE_DSP       - demux running on DSP  
+    GFMXDEMTSPARSERTYPE_DSPAVSYNC - demux running on DSP with additional AVSync functionality
+
      + + Programming Sequence for Parsers running on Host, TS data from host + + - Call GFMxDemTSParserCreate(), in parameter structure GFMXDEMTSPARSERREQUEST pass + parameters #GFMXDEMTSPARSERTYPE_HOST and #GFMXDEMTSPARSERDATASOURCE_PUSH, + pass callback functions to handle demuxed substreams + - Poll GFMxDemTSParserPushData() to pass the incoming TS stream + - Call GFMxDemTSParserDestroy() to destroy parser object + + Programming Sequence for Parsers running on DSP, TS data from host + + - Call GFMxDemTSParserCreate(), in parameter structure GFMXDEMTSPARSERREQUEST pass + parameters #GFMXDEMTSPARSERTYPE_DSP and #GFMXDEMTSPARSERDATASOURCE_PUSH, + pass callback functions to handle demuxed substreams + - Poll GFMxDemTSParserPushData() to pass the incoming TS stream + - Call GFMxDemTSParserDestroy() to destroy parser object + - Destroy the DSP message handling thread + + Programming Sequence for Parser running on DSP, TS data from VIP + + Only one parser at a time can be created to capture data from VIP. + For this mode the parser must run on DSP. +*/ +/*@{*/ + +/** GFMxDemTSParser Maximum number of supported Services. + For ISDB-T 1seg, the max is 8 according to ARIB TR-B14, p7-28 +*/ +#define GFMXDEMTS_MAX_SERVICE_NO 8 + +/** GFMxDemTSParser Maximum number of supported Audio PES. + For ISDB-T 1seg, the max is 2. +*/ +#define GFMXDEMTS_MAX_AUDIO_PID_NO 2 + +/** Get TS Audio PID. + For detail see #GFMXDEMTSPARSERAUDIOPIDLIST. + @param audio (NvU32) Combined type and ID value + */ +#define GFMXDEMTS_GET_AUDIO_PID(audio) (audio & 0x1FFFU) // Get the lower 13 bits + +/** Get TS Service Type. + For detail see #GFMXDEMTSPARSERAUDIOPIDLIST. + @param service (NvU32) Combined type and ID value +*/ +#define GFMXDEMTS_GET_AUDIO_TYPE(audio) (audio >> 16) + +/** TS Audio Pid List. */ +typedef struct _GFMXDEMTSPARSERAUDIOPIDLIST +{ + NvU32 uAudioPidList[GFMXDEMTS_MAX_AUDIO_PID_NO]; //!< low 16 bits Audio PID, high 16 bits Audio Type + NvU32 uNoOfAudioPids; //!< Number valid entries in uAudioPidList[] + +} GFMXDEMTSPARSERAUDIOPIDLIST; + +/** Get TS Service ID. + For detail see #GFMXDEMTSPARSERPMTPIDLIST. + @param service (NvU32) Combined type and ID value +*/ +#define GFMXDEMTS_GET_PMT_PID(service) ((((NvU32)(service) & 0xffff00) >> 8) | 0x1FC8) + +/** Get TS Service Type. + For detail see #GFMXDEMTSPARSERPMTPIDLIST. + @param service (NvU32) Combined type and ID value +*/ +#define GFMXDEMTS_GET_PMT_PID_TYPE(service) ((NvU32)(service) & 0x0000ff) + +/** TS Service List. + */ +typedef struct _GFMXDEMTSPARSERPMTPIDLIST +{ + /** Array of services: + Array entries format: + 
      +        32      24 23                           8 7               0
+        +---------+------------------------------+----------------+
+        | Invalid |             Service ID       |Service Type    |
+        +---------+------------------------------+----------------+
+
      + */ + NvU32 uPmtPidList[GFMXDEMTS_MAX_SERVICE_NO]; + + /** Number of valid entries in GFMXDEMTSPARSERPMTPIDLIST::uPmtPidList[]. */ + NvU32 uNoOfServices; + +} GFMXDEMTSPARSERPMTPIDLIST; + + +/** TS parser types, parameter values for GFMXDEMTSPARSEREQUEST. */ +typedef enum +{ + /** Parser running on host system. + + Parser objects of this type run the TS demux on the host system. + In contrast to GFMXDEMTSPARSERTYPE_DSP no hardware resources are involved, + and any number of parser objects of this type can be created. + + TS data source is always of type GFMXDEMTSPARSERDATASOURCE_PUSH, i.e. + it is provided by the application via GFMxDemTSParserProcessData(). + */ + GFMXDEMTSPARSERTYPE_HOST = 0, + + /** Parser running on DSP. + + Parser objects of this type will instanciate a task on the DSP + to perform the demux processing. Demuxed data is returned to the host. + Demuxed audio data can optionally be processed entirely on DSP side + via GFMXDEMTSPARSERREQUEST::pAudioBufDesc. + + This parser type is intended for verifying demux functionality. + + TS data can be provided either from the host (GFMXDEMTSPARSERDATASOURCE_PUSH), + or acquired automatically from VIP (GFMXDEMTSPARSERDATASOURCE_VIP2DSP). + */ + GFMXDEMTSPARSERTYPE_DSP, + + /** Parser running on DSP with attached AVSync object. + + Parser objects of this type will instanciate 2 tasks on the DSP, + one to perform the demux processing, and one to decode AV-synced H264 video. + Audio is processed on DSP side via GFMXDEMTSPARSERREQUEST::pAudioBufDesc. + + TS data can be provided either from the host (GFMXDEMTSPARSERDATASOURCE_PUSH), + or acquired automatically from VIP (GFMXDEMTSPARSERDATASOURCE_VIP2DSP). + */ + GFMXDEMTSPARSERTYPE_DSPAVSYNC + +} GFMXDEMTSPARSERTYPE; + +/** TS data sources, parameter values for GFMXDEMTSPARSEREQUEST. */ +typedef enum +{ + /** TS data is pushed by the application. + + TS data is fed from the application via function calls to + GFMxDemTSParserProcessData(). + */ + GFMXDEMTSPARSERDATASOURCE_PUSH = 0, + + /** TS data is intercepted by the DSP task directly from VIP. + + The TS parser task running on the DSP will open the VIP in Type-A + interface mode to receive TS data via an interrupt handler. + + This setting can be used only for parsers running on the DSP + (#GFMXDEMTSPARSERTYPE is GFMXDEMTSPARSERTYPE_DSP). + */ + GFMXDEMTSPARSERDATASOURCE_VIP2DSP + +} GFMXDEMTSPARSERDATASOURCE; + +/** TS Parser object states. */ +typedef enum +{ + GFMXDEMTSDSPPARSERSTATE_INSTANTIATED=0, //!< Parser object instanciated, but not initialized + GFMXDEMTSDSPPARSERSTATE_READY, //!< Parser object initialized, ready to parse + GFMXDEMTSDSPPARSERSTATE_ERROR, //!< Parser object dead due to unrecoverable error (out of mem, etc) + GFMXDEMTSDSPPARSERSTATE_SHUTDOWN, //!< Parser object initialized, ready to parse, but shutdown initiated + GFMXDEMTSDSPPARSERSTATE_PAUSE //!< Parser object paused + +} GFMXDEMTSPARSERSTATE; + +/** TS Parser demux status bits. */ +typedef enum +{ + GFMXDEMTSPARSERSTATUS_PMT_READY = 0x01, + GFMXDEMTSPARSERSTATUS_NIT_READY = 0x02, + GFMXDEMTSPARSERSTATUS_VIDEO_FOUND = 0x04, + GFMXDEMTSPARSERSTATUS_AUDIO_FOUND = 0x08, + // if the number of status goes beyond 8, please change m_uStatus to 16 bits or 32 bits in #CNvTransportParser + +} GFMXDEMTSPARSERSTATUS; + +/** Parameter structure for GFMxDemTSParserGetStatus(). */ +typedef struct +{ + GFMXDEMTSPARSERSTATE state; //!< Parser object state + NvU32 status; //!< Parser status bitmask, see #GFMXDEMTSPARSERSTATUS + NvU32 frameDropCount; //!< Counts dropped frames in AVSync + +} GFMxDemTSParserStatus; + +/** TS parser notify reasoncodes for GFMXDEMTSPARSERREQUEST::OnNotify callback. */ +typedef enum +{ + /** Incoming TS starved. */ + GFMXDEMTSPARSERNOTIFY_TSSTARVED = 0, + + /** Overflow of TS data coming from VIP. */ + GFMXDEMTSPARSERNOTIFY_TSOVERFLOW, + + /** Underflow in audio buffer at demux output side. */ + GFMXDEMTSPARSERNOTIFY_AUDIOUNDERFLOW, + + /** Overflow in audio buffer at demux output side. */ + GFMXDEMTSPARSERNOTIFY_AUDIOOVERFLOW, + + /** Underflow in video buffer at demux output side. */ + GFMXDEMTSPARSERNOTIFY_VIDEOUNDERFLOW, + + /** Overflow in video buffer at demux output side. */ + GFMXDEMTSPARSERNOTIFY_VIDEOOVERFLOW, + + /** Parser detected PMT change. + Associated data: + 
      +        NvU32 new PMT PID
+
      = 2*max ADTS frame size. + */ + NvU32 AudioBufferSize; + + /** Size of video demux buffer to claim in GPU memory. + This field is used only for parsers of type GFMXDEMTSPARSERTYPE_DSP and GFMXDEMTSPARSERTYPE_DSPAVSYNC. + Size must be power of 2 and <=2^24 bytes. + Optimum size depends on H264 bitrate, and should big enough to hold multiple NAL units. + */ + NvU32 VideoBufferSize; + + /** DSP-side handle (address to GFMXDECH264TABLE) of initialized GFMxDecH264 instance. + This address is in DSP address space. + + This field is used only for parsers of type GFMXDEMTSPARSERTYPE_DSPAVSYNC. + + @internal + */ + NvU32 MxDecH264DSPHandle; + + /** Video section callback. + Ignored for parser type GFMXDEMTSPARSERTYPE_DSPAVSYNC. + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param pllPTS Pointer to PTS, or NULL if not existent + @param pllDTS Pointer to DTS, or NULL if not existent + */ + GF_RETTYPE (*OnVideoData)(void* user, NvU8* pBytes, NvU32 cbBytes, NvU32 StreamID, NvS64* pllPTS, NvS64* pllDTS, int bPesStart); + + /** Audio section callback, or NULL to use shared DSP buffer. + + Can be NULL for parser type GFMXDEMTSPARSERTYPE_DSP. + Ignored for parser type GFMXDEMTSPARSERTYPE_DSPAVSYNC. + + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param pllPTS Pointer to PTS, or NULL if not existent + @param pllDTS Pointer to DTS, or NULL if not existent + */ + GF_RETTYPE (*OnAudioData)(void* user, NvU8* pBytes, NvU32 cbBytes, NvU32 StreamID, NvS64* pllPTS, NvS64* pllDTS, int bPesStart); + + /** PCR (Program Clock Reference) callback. + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param llPCRBase Clock + @param llPCRExt Clock + @param uDiscontinuity discontinuity flag + */ + void (*OnPCR)(void* user, NvS64 llPCRBase, NvU32 llPCRExt, NvU32 uDiscontinuity); + + /** Parser object error and status notify callback. + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param notifycode Notify reasoncode, see GFMXDEMTSPARSERNOTIFY + @param data Data specific to a notifycode + */ + void (*OnNotify)(void* user, NvU32 notifycode, void* data); + + /** Frame Decoded Callback + Will be called in sync with PTS of the frame. The passed surface will be locked, and the + application must unlock it later via GFMxDecH264Set() with feature ID GF_MXDEC_H264_SET_UNLOCK_SURFACE. + @param user Application defined parameter, forwarded from INvTransportParserCallback::user + @param surfaceID surface id + @param resolution high 16 bit for xres, low 16 bit for yres + @param pPTS Pointer to PTS of this frame + @param flags Flag bitmask, bit 0 set validity of PAN Scan Info + @param PanTopLeft Top-Left Offset for PAN Scan Rect, low 16 bit signed X, top 16 bit signed Y + @param PanBottomRight Bottom-Right Offset for PAN Scan Rect , low 16 bit signed X, top 16 bit signed Y + @param FrameType I/P Frame Type + */ + void (*OnFrameDecoded)(void* user, NvU32 sufaceID, NvU32 resolution, NvS64* pPTS, NvU32 flags, NvU32 PanTopLeft, NvU32 PanBottomRight, NvU32 FrameType); + + /** TS data callback + @param user Application defined parameter, forwarded from GFMXDEMTSPARSERREQUEST::user + @param data TS data + @param size TS data size + */ + void (*OnTS)(void* user, NvU8* data, NvU32 size); + + /** Application private data, will be forwarded to callbacks */ + void* user; + + /** Returns address of circular buffer descriptor shared with audio decoder. + This address is in DSP address space. + This member is valid only, if GFMXDEMTSPARSERREQUEST::OnAudioData is NULL, + and if the parser is of type GFMXDEMTSPARSERTYPE_DSP. + */ + GF_RM_DSP_CIRCBUFFER* pAudioBufDesc; + +} GFMXDEMTSPARSERREQUEST; + +/** H264 Frame Type, the value is equal to Nal Type*/ +typedef enum +{ + MXDEMTS_H264_FRAME_IDR = 5, + MXDEMTS_H264_FRAME_P = 1, + MXDEMTS_H264_FRAME_INVALID = 0, +} MXDEMTS_H264_FRAME_TYPE; + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFMxDemTSOpen(GFRmHandle hRm, GFMxDemTSHandle *phMxDemTS, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFMxDemTSClose(GFMxDemTSHandle *phMxDemTS); + +/** Create a TS parser. + + This function creates a TS parser running on the host. + + @param TsHandle Handle to TS component + @param pParserReq Parameter structure + @param pParserHandle Returns handle on success, unchanged on failure + + @retval GF_SUCCESS Success + @retval GF_ERROR_OUT_MEMORY Out of memory + @retval GFMXDEMTS_ERROR_CREATEDSPPARSER Failed to create parse object on DSP side + @retval GFMXDEMTS_ERROR_NODSPSUPPORT No DSP support in GFSDK +*/ +GF_RETTYPE GFMxDemTSParserCreate(GFMxDemTSHandle TsHandle, GFMXDEMTSPARSERREQUEST* pParserReq, GFMxDemTSParserHandle* pParserHandle); + +/** Destroy TS parser. + + Destroy an TS parser object previously created with GFMxDemTSParserCreate(). + Save to call on NULL handle. + + @param TsHandle Handle to TS component + @param pParserHandle Pointer to parser handle, will be reset to NULL on exit +*/ +void GFMxDemTSParserDestroy(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle* pParserHandle); + +/** Process a section of the TS stream. + + The input Transport Stream is parsed and the section type handlers passed + with GFMXDEMTSPARSERREQUEST are called as their sections are encountered in + the stream. + + A call of this function is usually triggered by an interrupt to feed the next + portion of an incoming Transport Stream. + + On each call of this function at least 188 byte (TS packet size) must be passed. + The Transport Stream is parsed in entities of 188 byte packets. If the passed buffer + contains an incomplete packet at the end, it will be copied to an internal buffer + and automatically combined with the second part on the next function call. + + Thus it is not required to pass in buffers aligned to TS packet starts, and the + buffer must not be a multiple of 188 bytes (TS packet size). However + doing so will guarant maximum demux performance since copying around incomplete packets + can be avoided. + + This function may only be called for parses created with #GFMXDEMTSPARSERDATASOURCE_PUSH. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pData Pointer to buffer containing TS, the buffer must contain + at least 188 bytes of stream data. Buffer start does not + need to be aligned with the start of an TS package. + @param pSize Pointer to buffer size, must be 188 or larger, will be updated + on exit with the number of bytes in the buffer, which where consumed. + If the parser was created on the DSP, this size must + not exceed the buffersize passed in GFMXDEMTSPARSERREQUEST::TSBufferSize. + On success GFMxDemTSParserPushData() will always consume all data, + on failure *pSize returns the number of bytes that were successfully + consumed before the failure occured. + @param timeout Time in ms to wait until DSP parser object gets ready to accept new data, + or 0 to block forever, (NvU32)-1 to return immediately if busy. + Ignored for DSP objects created with #GFMXDEMTSPARSERTYPE_HOST. + + @retval GF_SUCCESS Success + @retval GF_WAIT_TIME_OUT Timeout before data could be sent to DSP + @retval GF_ERROR_BUSY DSP was busy and data was not sent, call again, + returned only if \a timeout was (NvU32)-1 +*/ +GF_RETTYPE GFMxDemTSParserPushData(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU8* pData, NvU32* pSize, NvU32 timeout); + +/** (Re-)Start VIP TS data capture and demux on DSP. + + This function can be used only for parsers created as #GFMXDEMTSPARSERDATASOURCE_VIP2DSP. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success +*/ +GF_RETTYPE GFMxDemTSParserDSPStart(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Pause VIP TS data capture and demux on DSP. + + This function can be used only for parsers created as #GFMXDEMTSPARSERDATASOURCE_VIP2DSP. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param onOff Indicate Pause on or off + + @retval GF_SUCCESS Success +*/ +GF_RETTYPE GFMxDemTSParserDSPPause(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32 onOff); + +/** Step to the next Frame. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success +*/ +GF_RETTYPE GFMxDemTSParserDSPNextFrame(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Step to the next I Frame. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success +*/ +GF_RETTYPE GFMxDemTSParserDSPNextIFrame(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Get TS PmtPid List + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pPmtPidList Returns PMT PID List in current TS, with Service ID and Service Type combined + + @retval GF_SUCCESS Success + @retval GFMXDEMTS_ERROR_SERVICESLISTUNAVAILABLE NIT/PAT has not been parsed yet. + + @see GFMxDemTSSetPmtPid() +*/ +GF_RETTYPE GFMxDemTSParserGetPmtPidList(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, GFMXDEMTSPARSERPMTPIDLIST *pPmtPidList); + +/** Set TS Service + + PMT PID is set without any check. if the new PMT PID is successfully set, a + #GFMXDEMTSPARSERNOTIFY_TSPMTCHANGED notify will be sent to the caller application. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param uPmtPid uPmtPid to be set + + @retval GF_SUCCESS Success * + @see GFMxDemTSGetPmtPidList() + */ +GF_RETTYPE GFMxDemTSParserSetPmtPid(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32 uPmtPid); + +/** Get Active PmtPid + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pServiceID pointer to Active PmtPid. + + @retval GF_SUCCESS Success * + */ +GF_RETTYPE GFMxDemTSParserGetActivePmtPid(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32* pPmtPid); + +/** Get TS AudioPid List + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pAudioPidList Returns AUDIO PID List in current TS, with PID and Type combined + + @retval GF_SUCCESS Success + @retval GFMXDEMTS_ERROR_AUDIOPIDLISTUNAVAILABLE NIT/PAT has not been parsed yet. + + @see GFMxDemTSSetAudioPid() +*/ +GF_RETTYPE GFMxDemTSParserGetAudioPidList(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, GFMXDEMTSPARSERAUDIOPIDLIST *pAudioPidList); + +/** Set TS Audio Pid + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param uAudioPid uAudioPid to be set + + @retval GF_SUCCESS Success + @retval GFMXDEMTS_ERROR_AUDIOPIDUNAVAILABLE + @see GFMxDemTSGetAudioPidList() + */ +GF_RETTYPE GFMxDemTSParserSetAudioPid(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32 uAudioPid); + +/** Get Active AudioPid + + Audio PID is set if this AUDIO PID exists in current streams. Otherwise return an error + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pAudioPid pointer to Active AudioPid. + + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserGetActiveAudioPid(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32* pAudioPid); + +/** Reset All Table Version + + Reset all Table Versions, including PAT, NIT, and PMT. + For reset only PMT table version, see GFMxDemTSParserResetPmtTableVersion + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserResetAllTableVersions(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Reset PMT Table Version + + To reset all table version, see GFMxDemTSParserResetAllTableVersion + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserResetPmtTableVersion(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Set Play Speed + + Just used for normal play, for trick play, see xxx. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param PlaySpeed Play speed to set in 1.0 * 10^6. + A value of 100000 plays at 100% of the current sample rate. 100100 plays at 1.1%, + 100010 plays at 100.01%, the smallest increment 100001 plays at 100.001%. + Number less than 100000 will slow down the stream in the same way. + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserSetPlaySpeed(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, NvU32 PlaySpeed); + +/** Set VIP Capture + + @deprecated Do not use, will be removed from public API + + @param TsHandle Handle to TS component + @param VxHandle the Vx handle for setting VIP + @retval GF_SUCCESS Success * + */ +GF_RETTYPE GFMxDemTSSetVIP(GFMxDemTSHandle TsHandle, GFVxHandle VxHandle); + +/** VIP Capture on Host Side + + @deprecated Do not use, will be removed from public API + + it captures VIP data from host side, instead of DSP side. + For VIP Capture from DSP side, see #GFMXDEMTSPARSERREQUEST (GFMXDEMTSPARSERDATASOURCE_VIP2DSP) + + @param TsHandle Handle to TS component + @param pBuf Buffer to host VIP data + @param pBufSize Maximum buf size for input, and Number bytes captured for output + @retval GF_SUCCESS Success * + */ +GF_RETTYPE GFMxDemTSPollVIP(GFMxDemTSHandle TsHandle, NvU8* pBuf, NvU32 *pBufSize); + +/** Close VIP Capture + + @deprecated Do not use, will be removed from public API + + @param TsHandle Handle to TS component + @param VxHandle the Vx handle for setting VIP + @retval GF_SUCCESS Success * + */ +void GFMxDemTSCloseVIP(GFMxDemTSHandle TsHandle, GFVxHandle VxHandle); + +/** Get demux object state and status. + + Check Parser Status, can be called any time on the parser. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param pStatus Returns parser object state and status. + + + + +
      Bits 0-7 Parser status bitmask, see #GFMXDEMTSPARSERSTATUS
      Bits 8-24 reserved for extension
      Bits 23-31Parser state, see #GFMXDEMTSPARSERSTATE
      + @retval GF_SUCCESS Success + @retval GFRM_ERROR_BAD_PARAMETER Invalid parser handle passed + */ +GF_RETTYPE GFMxDemTSParserGetStatus(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, GFMxDemTSParserStatus* pStatus); + +/** Clear Demux Buffers. + + This will clear demux input TS buffers. For parsers of type + GFMXDEMTSPARSERTYPE_DSPAVSYNC it will also clear ES (video and audio) output buffers. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserClearBuffers(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle); + +/** Enable or disable TS data to be returned from DSP to host. + + If disabled the GFMXDEMTSPARSERREQUEST::OnTS callback won't be called anymore. + This function has effect for parsers with datasource GFMXDEMTSPARSERDATASOURCE_VIP2DSP only. + + @param TsHandle Handle to TS component + @param ParserHandle Parser handle + @param enable 0 to disable, !=0 to enable + @retval GF_SUCCESS Success + */ +GF_RETTYPE GFMxDemTSParserDSPEnableOnTS(GFMxDemTSHandle TsHandle, GFMxDemTSParserHandle ParserHandle, int enable); + +/** GFMxDemTSAPI Error code: Create Parser object on DSP failed. + @see GFMxDemTSParserCreate() +*/ +#define GFMXDEMTS_ERROR_CREATEDSPPARSER (GFMXDEMTS_ERROR + 0) + +/** GFMxDemTSAPI Error code: GFSDK not setup for DSP support. + @see GFMxDemTSParserCreate() +*/ +#define GFMXDEMTS_ERROR_NODSPSUPPORT (GFMXDEMTS_ERROR + 1) + +/** GFMxDemTSAPI Error code: GFMxDemTSGetPmtPidList() called when NIT/PAT not parsed yet. + @see GFMxDemTSGetPmtPidList() +*/ +#define GFMXDEMTS_ERROR_SERVICESLISTUNAVAILABLE (GFMXDEMTS_ERROR + 2) + +/** GFMxDemTSAPI Error code: GFMxDemTSSetPmtPid() when a wrong PMT PID is passed. + @see GFMxDemTSSetPmtPid() +*/ +#define GFMXDEMTS_ERROR_SERVICEUNAVAILABLE (GFMXDEMTS_ERROR + 3) + +/** GFMxDemTSAPI Error code: GFMxDemTSGetAudioPidList() called when PMT does not parsed yet, or + there is no Audio in current service. + @see GFMxDemTSGetAudioPidList() +*/ +#define GFMXDEMTS_ERROR_AUDIOPIDLISTUNAVAILABLE (GFMXDEMTS_ERROR + 4) + +/** GFMxDemTSAPI Error code: GFMxDemTSSetAudioPid() when a wrong Audio PID is passed. + @see GFMxDemTSSetAudioPid() +*/ +#define GFMXDEMTS_ERROR_AUDIOPIDUNAVAILABLE (GFMXDEMTS_ERROR + 5) + +/** GFMxDemTSAPI Error code: Signal frame decoded. + @internal +*/ +#define GFMXDEMTS_ERROR_AVSYNCFRAMEDECODED (GFMXDEMTS_ERROR + 6) + +/** GFMxDemTSAPI Error code: Cannot claim VIP. + @see GFMxDemTSParserCreate() +*/ +#define GFMXDEMTS_ERROR_VIPUNAVAILABLE (GFMXDEMTS_ERROR + 7) + +/** GFMxDemTSAPI Error code: GFMxDemTSParserGetActivePmtPid() called when there is pending PMT PID to be set. + @see GFMxDemTSParserGetActivePmtPid() +*/ +#define GFMXDEMTS_ERROR_GETSERVICEPMTPID (GFMXDEMTS_ERROR + 8) + +/** GFMxDemTSAPI Semaphore IDs. + These IDs can be used in the RmCreateSemaphore implementation of the + OS porting layer to identify GFMxDemTSAPI semaphores. +*/ +typedef enum +{ + GFMXDEMTS_SEMAPHORE_TSBUF = GF_MXDEMTSAPI<<24 + +} GFMXDEMTS_SEMAPHORE; + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif /* _GF_MPEG_TS__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxEnc.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxEnc.h new file mode 100755 index 00000000..74d4bee7 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxEnc.h @@ -0,0 +1,795 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. +* +* NVIDIA Corporation and its licensors retain all intellectual property +* and proprietary rights in and to this software, related documentation +* and any modifications thereto. Any use, reproduction, disclosure or +* distribution of this software and related documentation without an +* express license agreement from NVIDIA Corporation is strictly prohibited. +*/ + +/** @file GFMxEnc.h +GFSDK MPEG Encode API header file. +*/ + +// The following ifdef block is the standard way of creating macros which make exporting +// from a DLL simpler. All files within this DLL are compiled with the GFMXENC_EXPORTS +// symbol defined on the command line. this symbol should not be defined on any project +// that uses this DLL. This way any other project whose source files include this file see +// GFMXENC_API functions as being imported from a DLL, wheras this DLL sees symbols +// defined with this macro as being exported. +#ifndef _GF_MPEG_ENC__ +#define _GF_MPEG_ENC__ + +#include "GFVx.h" +#include "GFDef.h" + +/** @addtogroup groupMxEnc GFMxEncAPI MPEG4 Encode API +
        +
      • @ref pageMxEncAppNotes +
          +
        • @ref pageMxEncAppNotes1 +
        +
      +*/ +/*@{*/ + +/** MxEncAPI property flag: Support Simple Profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_SIMPLE 0x00000001 //Support Simple Profile +/** MxEncAPI property flag: Support Simple Scale Profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_SCALE 0x00000002 //Support Simple Scale Profile +/** MxEncAPI property flag: Support CORE Profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_CORE 0x00000004 //Support CORE Profile +/** MxEncAPI property flag: Support MAIN Profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_MAIN 0x00000008 //Support MAIN Profile +/** MxEncAPI property flag: Support N_bit profile. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_N_BIT 0x00000010 //Support N_bit Profile +/** MxEncAPI property flag: Support LEVEL 1. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_LEVEL1 0x00000100 //Support LEVEL 1 +/** MxEncAPI property flag: Support LEVEL 2. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_LEVEL2 0x00000200 //Support LEVEL 2 +/** MxEncAPI property flag: Support LEVEL 3. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_LEVEL3 0x00000400 //Support LEVEL 3 +/** MxEncAPI property flag: Support LEVEL 4. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_LEVEL4 0x00000800 //Support LEVEL 4 +/** MxEncAPI property flag: Support Data Partitioning Mode. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_DATA_PARTITIONING 0x00001000 //Support Data Partitioning Mode +/** MxEncAPI property flag: Support RVLC Mode. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_RVLC 0x00002000 //Support RVLC Mode +/** MxEncAPI property flag: Support Rate Control. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_RATE_CONTROL 0x00004000 +//support rate control +/** MxEncAPI property flag: Support Intra MacroBlock Refreshing. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_IMRF 0x000008000 //Support Intra Macroblock Refreshing +/** MxEncAPI property flag: Support Rotation. + @see GFMxEncGetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_CAP_ROTATION 0x000010000 //Support Rotation + +/** GFMxEncSetVOL parameter struct. */ +typedef struct _GFMXENCVOL +{ + NvU32 uiVOLInfo; /**< VOL characteristics */ + /**< + + + + + + + + + + + +
      #GF_MXENC_VOL_SHORT_VIDEO_HEADER
      #GF_MXENC_VOL_BYPASS_VLC
      #GF_MXENC_VOL_RESYNC_MARK_ENABLE
      #GF_MXENC_VOL_DATA_PARTITION_ENABLE
      #GF_MXENC_VOL_REVERSIBLE_VLC_ENABLE
      #GF_MXENC_VOL_RATE_CONTROL_ENABLE
      #GF_MXENC_VOL_STUFFING_ENABLE
      #GF_MXENC_VOL_AUTO_IMRF_ENABLE
      #GF_MXENC_VOL_MC_IMRF_ENABLE
      #GF_MXENC_VOL_THUMBNAIL_ENABLE
      + */ + PGFRMSURFACE pSrcSurf;/**< Surface to encode*/ + PGFRECT pSrcRect; /** + #GF_MXENC_VOP_4MV_ENABLE + #GF_MXENC_VOP_HALF_PEL_ENABLE + #GF_MXENC_VOP_PACKET_BASED_ON_MB_NUM + #GF_MXENC_VOP_AC_PRE_ALWAYS_ON + #GF_MXENC_VOP_AC_PRE_DYNAMICALLY_ON + #GF_MXENC_VOP_CHANGE_EXPECTED_SIZE + #GF_MXENC_VOP_CHANGE_INITQP + #GF_MXENC_VOP_CHANGE_MIN_MAX_QP + #GF_MXENC_VOP_4MV_ENABLE + #GF_MXENC_VOP_REDUCE_FRAME_RATE + #GF_MXENC_VOP_ENCODE_I_ASAP + #GF_MXENC_VOP_IMRF_CONTROL_IP_RATIO + #GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE + #GF_MXENC_VOP_LOAD_IMRF_MATRIX + #GF_MXENC_VOP_TIMESTAMP_CPU + #GF_MXENC_VOP_TIMESTAMP_VI + #GF_MXENC_VOP_CHANGE_MAX_QP_RELIEF + + */ + + NvU16 uiPacketSize; /**< If GF_MXENC_VOP_PACKET_BASED_ON_MB_NUM flag is on, this field tells the number of macroblocks in a packet. Otherwise, this field tells number of bytes in a packet.*/ + NvU16 uiIntra_DC_VLC_Thr; /**< Intra DC VLC Threshold*/ + NvU16 uiHECNum; /**< Frequency to inset HEC marker. 0 means no HEC marker at all. 1~7 means to insert HEC after 1~7 resync marker(s).*/ + NvU16 uiExpectedISize; /**< If next encoded VOP is I, this field tells GFMxEncAPI the size of bit stream which application expects in number of DWORD.*/ + NvU16 uiExpectedPSize; /**< If next encoded VOP is P, this field tells GFMxEnc the size of bit stream which application expects in number of DWORD.*/ + NvU16 uiInitialIQP; /**< Initial QP value for I VOP*/ + NvU16 uiInitialPQP; /**< Initial QP value for P VOP */ + + NvU16 uiMaxIQP; /**< Max QP value for I VOP*/ + NvU16 uiMinIQP; /**< Min QP value for I VOP */ + + NvU16 uiMaxPQP; /**< Max QP value for P VOP*/ + NvU16 uiMinPQP; /**< Min QP value for P VOP */ + NvU16 uiMaxQPRelief; /**< Max qp Relief*/ + + NvU16 uiNumofP; /**< Number of consecutive P VOPs between two I VOPs.*/ + NvU16 uiRNumerator; /**< Desired Framerate value. This field must be filled if flag GF_MXENC_VOP_REDUCE_FRAME_RATE is on.*/ + NvU16 uiRDenominator; /**< Camera Framerate. This field must be filled if flag GF_MXENC_VOP_REDUCE_FRAME_RATE is on.*/ + + NvU8 uiIMRFIMinValue; /**< Those values will take effect only when GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever an I VOP is encoded, MxEnc will generate a random number in this range for each macroblock.*/ + NvU8 uiIMRFIMaxValue; /**< Those values will take effect only when GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever an I VOP is encoded, MxEnc will generate a random number in this range for each macroblock.*/ + NvU8 uiIMRFPMinValue; /**< Those values will take effect only when GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever a Macro Block counter is reduced to 0, an Intra Macro Block will be generated by MxEnc. MxEnc will generate a random number in this range for this macroblock.*/ + NvU8 uiIMRFPMaxValue; /**< Those values will take effect only when GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever a Macro Block counter is reduced to 0, an Intra Macro Block will be generated by MxEnc. MxEnc will generate a random number in this range for this macroblock.*/ + NvU8 uiIMRFDefaultCounter; /**< This value will be used as the new counter when the refresh counter in the matrix is decreased to 0.*/ + NvU8* pMIRFMatrix; /**< Pointer to an array that holds counter for each Macro Block. When this counter is decreased to 0, one Intra Macro Block will be inserted.*/ + + NvU32 uiTimeStampModel; /**< Time Stamp Model (VI or CPU). + + + +
      #GF_MXENC_VOP_TIMESTAMP_CPU
      #GF_MXENC_VOP_TIMESTAMP_VI
      + */ + +}GFMXENCVOP, *PGFMXENCVOP; + +//uiVOPInfo: +/**GFMXENCVOP::uiVOPInfo: Enable 4 motion vectors, GFMxEnc will pick 1 MV or 4 MV, depends on which mode is more efficient.*/ +#define GF_MXENC_VOP_4MV_ENABLE 0x00000001 + +/**GFMXENCVOP::uiVOPInfo : Enable Half Pel Motion Estimation search*/ +#define GF_MXENC_VOP_HALF_PEL_ENABLE 0x00000002 + +/**GFMXENCVOP::uiVOPInfo:New packet based on the number of MBs. Not the length of the bit stream*/ +#define GF_MXENC_VOP_PACKET_BASED_ON_MB_NUM 0x00000004 + +/**GFMXENCVOP::uiVOPInfo:AC prediction always on*/ +#define GF_MXENC_VOP_AC_PRE_ALWAYS_ON 0x00000008 + +/**GFMXENCVOP::uiVOPInfo:AC prediction dynamically on*/ +#define GF_MXENC_VOP_AC_PRE_DYNAMICALLY_ON 0x00000010 + +/**GFMXENCVOP::uiVOPInfo : Change the expected size for I and P encoded frames. uiExpectedISize, uiExpectedPSize must be filled*/ +#define GF_MXENC_VOP_CHANGE_EXPECTED_SIZE 0x00000020 + +/**GFMXENCVOP::uiVOPInfo : Change the initial QP for I and P. uiInitialIQP, uiInitialPQP must be filled*/ +#define GF_MXENC_VOP_CHANGE_INITQP 0x00000040 + +/**GFMXENCVOP::uiVOPInfo : Change the Min and Max QP for I and P frames. uiMaxIQP, uiMinIQP, uiMaxPQP, uiMinPQP must be filled*/ +#define GF_MXENC_VOP_CHANGE_MIN_MAX_QP 0x00000080 + +/**GFMXENCVOP::uiVOPInfo : Reduce the frame rate by skipping certain frames. uiRNumerator and uiRDenominator must be set.*/ +#define GF_MXENC_VOP_REDUCE_FRAME_RATE 0x00000100 + +/**GFMXENCVOP::uiVOPInfo : Encode I VOP as soon as possible*/ +#define GF_MXENC_VOP_ENCODE_I_ASAP 0x00000200 + +/**GFMXENCVOP::uiVOPInfo : Number of P VOPs between two I VOPs controlled by intra macro block refreshing. If this flag is off, it is controlled by uiNumofP*/ +#define GF_MXENC_VOP_IMRF_CONTROL_IP_RATIO 0x00000400 + +/**GFMXENCVOP::uiVOPInfo : Application can change the counter range by setting this flag and give the range in uiIMRFIMinValue, uiIMRFIMaxValue, uiIMRFPMinValue and uiIMRFPMaxValue. Application only can turn on this flag when GF_MXENC_VOL_AUTO_IMRF_ENABLE is on.*/ +#define GF_MXENC_VOP_LOAD_IMRF_COUNTER_RANGE 0x00000800 + +/**GFMXENCVOP::uiVOPInfo : Application must fill in uiIMRFDefaultCounter and pIMRFMatrix when this flag is on. Application only can turn on this flag when GF_MXENC_VOL_MC_IMRF_ENABLE flag is on.*/ +#define GF_MXENC_VOP_LOAD_IMRF_MATRIX 0x00001000 + +/**GFMXENCVOP::uiVOPInfo : Timestamp is provided by CPU*/ +#define GF_MXENC_VOP_TIMESTAMP_CPU 0x00010000 + +/**GFMXENCVOP::uiVOPInfo: Timestamp is generated by VI*/ +#define GF_MXENC_VOP_TIMESTAMP_VI 0x00020000 + +/**GFMXENCVOP::uiVOPInfo : Change MAX QP RELIEF value for Rate Control Algorithm*/ +#define GF_MXENC_VOP_CHANGE_MAX_QP_RELIEF 0x00100000 + +/**typedef struct _GFMXENCRCC*/ + +typedef struct _GFMXENCRCC +{ + NvU16 uiIQP; /** + #MXENC_VOP_P_VOP + #MXENC_VOP_MORE_FETCH + #MXENC_VOP_PORTION_PACKET + #MXENC_VOP_MORE_VOP + #MXENC_VOP_BEGIN_VOP + #MXENC_VOP_END_VOP + #MXENC_VOP_BUFFER_OVERFLOW + + */ + NvU32 uiAverageQP; /** + #GF_MXENC_CAP_SIMPLE + #GF_MXENC_CAP_SCALE + #GF_MXENC_CAP_CORE + #GF_MXENC_CAP_MAIN + #GF_MXENC_CAP_N_BIT + #GF_MXENC_CAP_LEVEL1 + #GF_MXENC_CAP_LEVEL2 + #GF_MXENC_CAP_LEVEL3 + #GF_MXENC_CAP_LEVEL4 + #GF_MXENC_CAP_DATA_PARTITIONING + #GF_MXENC_CAP_RVLC + #GF_MXENC_CAP_RATE_CONTROL + #GF_MXENC_CAP_IMRF + #GF_MXENC_CAP_ROTATION + + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxEncAPI functions. +*/ + +GF_RETTYPE GFMxEncGetStatus(GFMxEncHandle hMxEnc, NvU32 * pStatus); +/**< This function returns the hardware encoder’s status. + + @param MXhandle (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (NvU32 * ) @see GFMxEncGetStatus Definitions. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ +//pStatus +/**GFMxEncGetStatus Definitions : If hardware encoder is busy encoding VOPs*/ +#define GF_ENCODER_BUSY 0x00000001 + +/**GFMxEncGetStatus Definitions : At least one VOP is ready for fetching */ +#define GF_ENCODER_VOP_READY 0x00000002 + + +GF_RETTYPE GFMxEncSetVOL(GFMxEncHandle hMxEnc, PGFMXENCVOL pVOL); +/**< This function sets the characteristics of a new video object layer (VOL) and +tells the GFMxEncAPI the VOL information. The GFMxEncAPI does not +generate a VOL bit stream. The application needs to prepare a VOL by itself. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCVOL ) Set new VOL information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + + +GF_RETTYPE GFMxEncSetVOP(GFMxEncHandle hMxEnc, PGFMXENCVOP pVOP); +/**< This function sets the characteristics of a new video object plane (VOP). This +function should be called after GFMxEncSetVOL() and before +GFMxEncStart(). If the application decides to change any VOP information +during the encoding time (after GFMxEncStart()), the application can call +this function to pass the new VOP information to the GFMxEncAPI. +Otherwise, the application should not call this function, allowing the +GFMxEncAPI to reduce overhead. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCVOP ) Set new VOP information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + + +GF_RETTYPE GFMxEncRateControlConfig(GFMxEncHandle hMxEnc, PGFMXENCRCC pRCC); +/**< This function initializes the GFMxEncAPI rate control block. This function is +optional for application because the GFMxEncAPI automatically initializes +the rate control block. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCRCC ) Set rate control information.. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + +GF_RETTYPE GFMxEncFeedImage(GFMxEncHandle hMxEnc, + PGFMXENCFEEDIMAGE pFeedImage); +/**< The application can call this function if the application has the source image to feed to the encoder. +This function should not be called if the image comes directly from the video +input port (VIP), for example, from a camera. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCFEEDIMAGE ) New image information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + + +GF_RETTYPE GFMxEncFetchImage(GFMxEncHandle hMxEnc,PGFMXENCFETCHVOP pFetchVOP); +/**< An application should call this function to fetch the encoded VOP bit stream +or encoded raw data. If the source image is from the host, the application +should call this function after GFMxEncFeedImage(). If the source image is +from a video camera connected to the VIP and the application is using a +polling scheme, the application should call this function at least at the +camera’s frame rate. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param pStatus (PGFMXENCFETCHVOP ) Structure to hold encoded VOP information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + +GF_RETTYPE GFMxEncStart(GFMxEncHandle hMxEnc); +/**< This function starts the GFMxEncAPI module for encoding the bit stream. +The GFMxEncAPI assumes the first VOP it outputs is the first VOP in the +current VOL. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + +GF_RETTYPE GFMxEncPause(GFMxEncHandle hMxEnc); +/**< This function pauses the encoding process until GFMxEncPause() is called +again to Resume encoding, or GFMxEncStop() is called to totally stop encoding. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + +GF_RETTYPE GFMxEncStop(GFMxEncHandle hMxEnc); +/**< This function stops the encoding process. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + +GF_RETTYPE GFMxEncSetupInterrupt(GFMxEncHandle hMxEnc,void (*Inter)(void *), void * IPara); +/**< An application can use this function to set up the interrupt callback function. +This function must be called before GFMxEncStart(). +If this function returns GF_SUCCESS, whenever a VOP is ready the +GFMxEncAPI calls the interrupt callback function. Inside of the callback +function, the application can call GFMxEncSetVOP() if it is needed, and call +GFMxEncFetchImage() to fetch the encoded VOP. +If GF_ERROR is returned, the application should use a polling scheme. + + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param (*Inter)(void *) (void) Pointer to encoder application’s interrupt callback function. + @param IPara (void *) Pointer to parameter of encoder application’s interrupt callback function. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + + +GF_RETTYPE GFMxEncSetAttribute(GFMxEncHandle hMxEnc, NvU32 uiFeature, NvU32* pInfo); +/**< This function sets a feature of the MPEG encoder hardware. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param uiFeature (NvU32) @see GFMxEncSetAttribute Definitions + @param pInfo (NvU32*) Pointer to the information buffer. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes + + GFMxEncSetAttribute_Definitions: + + + + + +
      #MXENC_ATTR_KEEP_PREV_ENCODING_INTERNAL_RESOURCE
      #MXENC_PREVIEW_ROTATE_BUFFER
      #MXENC_GET_PREVIEW_BUFFER
      #MXENC_ENABLE_INTERRUPT_MODE
      + + MXENC_ENABLE_INTERRUPT_MODE MXENC_GET_PREVIEW_BUFFER MXENC_PREVIEW_ROTATE_BUFFER MXENC_ATTR_KEEP_PREV_ENCODING_INTERNAL_RESOURCE +*/ + + +GF_RETTYPE GFMxEncGetAttribute(GFMxEncHandle hMxEnc, NvU32 uiFeature, NvU32* pInfo); +/**< This function gets a feature of the MPEG encoder hardware.. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + @param uiFeature (NvU32) see GFMxEncGetAttribute_Definitions below. + @param pInfo (NvU32*) Pointer to the information buffer. + + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes + + + +GFMxEncGetAttribute_Definitions: +GF4800 and subsequent generation of GPUs have rotator block which can rotate +video frame before encoding. In a normal mode a Encoder doesn't need to +capture whole video frame before encoding but in rotation mode, it needs to +capture full video frame (YUV4:2:0) before encoding. This means rotation +mode requires more memory. +This option can be used to enable rotation with 4 basic modes which can be +ORed with two h-flip and v-flip options. +Total of 8 unique combination of rotation modes are available. +*pInfo rotation degree used with MXENC_ATTR_ROTATION + + + + + + + + + +
      #MXENC_ATTR_ROTATION
      #MXENC_ATTR_ROTATE_0
      #MXENC_ATTR_ROTATE_90
      #MXENC_ATTR_ROTATE_180
      #MXENC_ATTR_ROTATE_270
      #MXENC_ATTR_H_FLIP
      #MXENC_ATTR_V_FLIP
      + + + + +*/ + +/** @name GFMxEncGetAttribute_Definitions +*/ +//@{ + +/**GFMxEncGetAttribute_Definitions: +*/ + +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATION*/ +#define MXENC_ATTR_ROTATION 1 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATE_0*/ +#define MXENC_ATTR_ROTATE_0 0x0 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATE_90*/ +#define MXENC_ATTR_ROTATE_90 0x1 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATE_180*/ +#define MXENC_ATTR_ROTATE_180 0x2 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_ROTATE_270*/ +#define MXENC_ATTR_ROTATE_270 0x3 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_H_FLIP*/ +#define MXENC_ATTR_H_FLIP 0x10 +/**GFMxEncGetAttribute_Definitions::MXENC_ATTR_V_FLIP*/ +#define MXENC_ATTR_V_FLIP 0x20 +//@} + + + +GF_RETTYPE GFMxEncInterruptControl(GFMxEncHandle MxHandle); +/**< This function enables the MxEnc interrupt. + + @param hMxEnc (GFMxEncHandle) Handle specific to the GFMxEncAPI. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes +*/ + +/** @name GFMxEncAPI_Error_Codes +*/ +//@{ + +/** GFMXE_SUCCESS*/ +#define GFMXE_SUCCESS GF_SUCCESS +/** GFMXE_ERROR_NOT_SUPPORT_FORMAT */ +#define GFMXE_ERROR_NOT_SUPPORT_FORMAT (GFMXE_ERROR | 0x00000001) +/** GFMXE_ERROR_INVALID_PARAMETER */ +#define GFMXE_ERROR_INVALID_PARAMETER (GFMXE_ERROR | 0x00000002) +/** GFMXE_ERROR_NOT_ENOUGH_EMBEDDED_MEM */ +#define GFMXE_ERROR_NOT_ENOUGH_EMBEDDED_MEM (GFMXE_ERROR | 0x00000003) +/** GFMXE_ERROR_SET_ATTRIBUTE_FAILED */ +#define GFMXE_ERROR_SET_ATTRIBUTE_FAILED (GFMXE_ERROR | 0x00000004) + +//@} + + + /*@}*/ + + /** @page pageMxEncAppNotes MxEncAPI Application Notes + + @section pageMxEncAppNotes1 Programming Sequence + + Todo + */ + +#ifdef __cplusplus +} // only need to export C interface if +// used by C++ source code +#endif + +#endif //#ifndef _GF_MPEG_ENC__ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxEncH264.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxEncH264.h new file mode 100755 index 00000000..f4f81228 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFMxEncH264.h @@ -0,0 +1,788 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. +* +* NVIDIA Corporation and its licensors retain all intellectual property +* and proprietary rights in and to this software, related documentation +* and any modifications thereto. Any use, reproduction, disclosure or +* distribution of this software and related documentation without an +* express license agreement from NVIDIA Corporation is strictly prohibited. +*/ + +/** @file GFMxEncH264.h +GFSDK H264 Encode API header file. +*/ + +// The following ifdef block is the standard way of creating macros which make exporting +// from a DLL simpler. All files within this DLL are compiled with the GFMXENC_EXPORTS +// symbol defined on the command line. this symbol should not be defined on any project +// that uses this DLL. This way any other project whose source files include this file see +// GFMXENC_API functions as being imported from a DLL, wheras this DLL sees symbols +// defined with this macro as being exported. +#ifndef _GF_MPEG_ENC_H264__ +#define _GF_MPEG_ENC_H264__ + +#include "GFVx.h" + +#include "GFDef.h" + +/** @addtogroup groupMxEncH264 MxEncH264API H264 Encode API +
        +
      • @ref pageMxEncH264AppNotes +
          +
        • @ref pageMxEncH264AppNotes1 +
        +
      +*/ +/*@{*/ + +/** @name GFMxEncH264 API Property Caps */ +//@{ +/** MxEncH264API property flag: Support baseline Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_BASELINE 0x00000001 //support baseline profile +/** MxEncH264API property flag: Support Main Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_MAIN 0x00000002 //support main profile +/** MxEncH264API property flag: Support extended Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_EXTENDED 0x00000004 //support extended profile +/** MxEncH264API property flag: Support high 10 Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_HIGH10 0x00000008 //support high 10 profile +/** MxEncH264API property flag: Support high 422 Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_HIGH422 0x00000010 //support high 422 profile +/** MxEncH264API property flag: Support high 444 Profile. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_HIGH444 0x00000020 //support high 444 profile +/** MxEncH264API property flag: Level_IDC following H.264 spec definition. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_LEVEL_IDC(Capability) \ + ((Capability >> 12) & 0xfff)//Level_IDC following H.264 spec definition +/** MxEncH264API property flag: Support data partitioning mode. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_DATA_PARTITIONING 0x10000000 //support data partitioning mode +/** MxEncH264API property flag: Support rate control. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_RATE_CONTROL 0x20000000 //support rate control +/** MxEncH264API property flag: Support intra macro block refreshing. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_IMRF 0x40000000 //support intra macro block refreshing +/** MxEncH264API property flag: Support rotation. +@see MxEncH264GetProperty(), GFPROPERTY::Capability +*/ +#define GF_MXENC_H264_CAP_ROTATION 0x80000000 //support rotation + +//@} + + + + +/**typedef struct GFMXENCH264SETSEQUENCE_TAG*/ +typedef struct GFMXENCH264SETSEQUENCE_TAG +{ + NvU32 SequenceInfo; /**< Sequence characteristics */ + /**< + + + + + + + + + + + +
      #GF_MXENC_H264_SEQUENCE_CONSTRAINT_SET0_FLAG
      #GF_MXENC_H264_SEQUENCE_CONSTRAINT_SET1_FLAG
      #GF_MXENC_H264_SEQUENCE_CONSTRAINT_SET2_FLAG
      #GF_MXENC_H264_SEQUENCE_DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG
      #GF_MXENC_H264_SEQUENCE_FRAME_MBS_ONLY_FLAG
      #GF_MXENC_H264_SEQUENCE_RATE_CONTROL_ENABLE
      #GF_MXENC_H264_SEQUENCE_AUTO_IMRF_ENABLE
      #GF_MXENC_H264_SEQUENCE_MC_IMRF_ENABLE
      #GF_MXENC_H264_SEQUENCE_REALTIME_ENCODE
      #GF_MXENC_H264_SEQUENCE_DEBLK_I_SLICE
      + */ + NvU32 profile_idc; /** + #GF_MXENC_H264_PICTURE_CHANGE_INIT_QP + #GF_MXENC_H264_PICTURE_REDUCE_FRAME_RATE + #GF_MXENC_H264_PICTURE_ENCODE_IDR_ASAP + #GF_MXENC_H264_PICTURE_CHANGE_MIN_MAX_QP + #GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE + #GF_MXENC_H264_PICTURE_LOAD_IMRF_MATRIX + #GF_MXENC_H264_PICTURE_4MV_ENABLE + #GF_MXENC_H264_PICTURE_HALF_PEL_ENABLE + #GF_MXENC_H264_PICTURE_DEBLK_FILTER_ENABLE + #GF_MXENC_H264_PICTURE_MULTI_SLICE_ENABLE + + */ + NvU32 numofSlicesGroup; /**< Number of slice groups, default value = 0 */ + NvU32 sliceGroupMapType; /**< default value is 0 , interleaved slice groups */ + NvU32 num_of_ref_idx_10_active; /**< Specifies the maximum reference index for reference picture list 0 ,default value is 0 */ + NvU32 num_of_ref_idx_11_active; /**< Default value is 0 */ + NvS32 pic_init_qp; /**< Initial value of the slice QP*/ + NvS32 pic_init_qs; /**< Initial value of the slice QS */ + NvS32 chroma_qp_index_offset; /**< Specifies the offset that shall be added to QPY and QSY for addressing the table of QPC values. The value of chroma_qp_index_offset shall be in the range of -12 to +12, inclusive. */ + NvU32 uiMaxIDRQP; /**< Max QP value for IDR */ + NvU32 uiMinIDRQP; /**< Min QP value for IDR */ + + NvU32 uiMaxNONIDRQP; /**< Max QP value for non-IDR picture */ + NvU32 uiMinNONIDRQP; /**< Min QP value for non-IDR picture */ + + NvU32 SliceAlpha; /**< Aplha value for Deblocking */ + NvU32 SliceBeta; /**< Beta value for Deblocking */ + + /**< Packetisation for H264*/ + NvU32 uiPacketCtrlDisable; /**< Disables the packet mode control */ + NvU32 uiPacketMode; /**< If 1 ,then in macroblock mode else in bytes mode, bytes mode not supported */ + NvU32 uiPacketSize; /**< Packet size in MBs or bytes, packet size in bytes is not supported, Value can range from zero to the number of MBs in a frame */ + + NvU32 uiNumofPicBetween2IDRs; /**< Number of P frames in between consecutive I Frames */ + NvU32 uiRNumerator; /**< Desired Framerate value. This field must be filled if flag GF_MXENC_H264_PICTURE_REDUCE_FRAME_RATE is on. */ + NvU32 uiRDenominator; /**< Camera Framerate. This field must be filled if flag F_MXENC_H264_PICTURE_REDUCE_FRAME_RATE is on. */ + NvU32 uiIMRFIMinValue; /**< Those values will take effect only when GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever an I frame is encoded, MxEncH264 will generate a random number in this range for each macroblock */ + NvU32 uiIMRFIMaxValue; /**< Those values will take effect only when GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever an I frame is encoded, MxEncH264 will generate a random number in this range for each macroblock. */ + NvU32 uiIMRFPMinValue; /**< Those values will take effect only when GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever a Macro Block counter is reduced to 0, an Intra Macro Block will be generated by MxEncH264. MxEncH264 will generate a random number in this range for this macroblock. */ + NvU32 uiIMRFPMaxValue; /**< Those values will take effect only when GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE flag is set. Whenever a Macro Block counter is reduced to 0, an Intra Macro Block will be generated by MxEncH264. MxEncH264 will generate a random number in this range for this macroblock. */ + NvU32 uiIMRFDefaultCounter; /**< This value will be used as the new counter when the refresh counter in the matrix is decreased to 0. */ + NvU8 *pIMRFMatrix; /**< Pointer to an array that holds counter for each Macro Block. When this counter is decreased to 0, one Intra Macro Block will be inserted.*/ + + +} GFMXENCH264SETPICTURE, *PGFMXENCH264SETPICTURE; + +/** @name GFMxEncH264 API Setpicture::PictureInfo */ +//@{ +/**GFMXENCH264SETPICTURE::PictureInfo: When application enables this flag, application must set pic_init_qp, pic_init_qs and chroma_qp_index_offset.*/ +#define GF_MXENC_H264_PICTURE_CHANGE_INIT_QP 0x00000001 + +/**GFMXENCH264SETPICTURE::PictureInfo:Reduce the frame rate by skipping certain frames, Must set uiRNumerator and uiRDenominator.*/ +#define GF_MXENC_H264_PICTURE_REDUCE_FRAME_RATE 0x00000002 + +/**GFMXENCH264SETPICTURE::PictureInfo: Encode IDR as soon as possible .*/ +#define GF_MXENC_H264_PICTURE_ENCODE_IDR_ASAP 0x00000004 + +/**GFMXENCH264SETPICTURE::PictureInfo:When application set this flag, application must set uiMaxIDRQP, uiMinIDRQP, uiMaxNONIDRQP and uiMinNONIDRQP .*/ +#define GF_MXENC_H264_PICTURE_CHANGE_MIN_MAX_QP 0x00000008 + +/**GFMXENCH264SETPICTURE::PictureInfo:Application changes the counter range by setting this, flag and giving the range in uiIMRFIMinValue uiIMRFIMaxValue, uiIMRFPMinValue, and uiIMRFPMaxValue, Applications can turn on this flag only when GF_MXENC_H264_SEQUENCE_AUTO_IMRF_ENABLE is on.*/ +#define GF_MXENC_H264_PICTURE_LOAD_IMRF_COUNTER_RANGE 0x00000010 + +/**GFMXENCH264SETPICTURE::PictureInfo: Application must fill in uiIMRFDefaultCounter and pIMRFMatrix if this flag is on, Application can turn on flag only if GF_MXENC_H264_PICTURE_MC_IMRF_ENABLE is on .*/ +#define GF_MXENC_H264_PICTURE_LOAD_IMRF_MATRIX 0x00000020 + +/**GFMXENCH264SETPICTURE::PictureInfo: Enable 4 motion vectors, GFMxEncH264 will pick 1 MV or 4 MV, depends on which mode is more efficient.*/ +#define GF_MXENC_H264_PICTURE_4MV_ENABLE 0x00000040 + +/**GFMXENCH264SETPICTURE::PictureInfo: Enable half pel motion estimation search.*/ +#define GF_MXENC_H264_PICTURE_HALF_PEL_ENABLE 0x00000080 + +/**GFMXENCH264SETPICTURE::PictureInfo: Enable Deblocking.*/ +#define GF_MXENC_H264_PICTURE_DEBLK_FILTER_ENABLE 0x00000100 + +/**GFMXENCH264SETPICTURE::PictureInfo: Enable Multi Slicing. Mutli-slicing is not supported*/ +#define GF_MXENC_H264_PICTURE_MULTI_SLICE_ENABLE 0x00000200 +//@} + +/** typedef struct GFMXENCH264RCC_TAG */ +typedef struct GFMXENCH264RCC_TAG +{ + NvU16 uiIQP; /** + #GF_MXENC_H264_NALS_SEQUENCE_PARAMETER_SET + #GF_MXENC_H264_NALS_PICTURE_PARAMETER_SET + #GF_MXENC_H264_NALS_IDR_PIC + #GF_MXENC_H264_NALS_NON_IDR_PIC + #GF_MXENC_H264_NALS_BEGIN_ACCESS_UNIT + #GF_MXENC_H264_NALS_PARTIAL_ACCESS_UNIT + #GF_MXENC_H264_NALS_END_ACCESS_UNIT + #GF_MXENC_H264_NALS_DATA_NOT_READY + #GF_MXENC_H264_NALS_MORE_FETCH + #GF_MXENC_H264_NALS_MORE_NALS + + */ + NvU32 uiTime; /**< In milliseconds, the encoded picture's time stamp. First picture may start from 0. */ + NvU32 uiFetchedSize; /**< Number of available bytes */ +}GFMXENCH264FETCHNALS, *PGFMXENCH264FETCHNALS; + +/** @name GFMXENCH264FETCHNALS::uiNALsInfo definitions */ +//@{ + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current NAL unit is a Sequence Parameter Set. */ +#define GF_MXENC_H264_NALS_SEQUENCE_PARAMETER_SET 0x00000001 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current NAL unit is a Picture Parameter Set. */ +#define GF_MXENC_H264_NALS_PICTURE_PARAMETER_SET 0x00000002 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current NAL unit belongs to an IDR Pic. */ +#define GF_MXENC_H264_NALS_IDR_PIC 0x00000004 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current NAL unit belongs to a Non-IDR Pic. */ +#define GF_MXENC_H264_NALS_NON_IDR_PIC 0x00000008 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current data is the start of a new Access Unit. */ +#define GF_MXENC_H264_NALS_BEGIN_ACCESS_UNIT 0x00000010 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current data is a Partial Access Unit. */ +#define GF_MXENC_H264_NALS_PARTIAL_ACCESS_UNIT 0x00000020 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Current data is the End of the Access Unit. */ +#define GF_MXENC_H264_NALS_END_ACCESS_UNIT 0x00000040 + +/**GFMXENCH264FETCHNALS::uiNALsInfo:Data of current NAL is not ready yet.*/ +#define GF_MXENC_H264_NALS_DATA_NOT_READY 0x00000080 + +/**GFMXENCH264FETCHNALS::uiNALsInfo: Present NAL unit is larger than application's buffer size. Call FetchNALs again to get remaining data.*/ +#define GF_MXENC_H264_NALS_MORE_FETCH 0x00000100 + +/** GFMXENCH264FETCHNALS::uiNALsInfo: More NALs are encoded and ready to be fetched by the application. */ +#define GF_MXENC_H264_NALS_MORE_NALS 0x00000200 + +//@} + +/** @name GFMxEncH264SetAttribute Definitions */ +//@{ + +/**GFMxEncH264SetAttribute_Definitions::MXENC_H264_ATTR_ROTATION: +GF4800 and subsequent generation of GPUs have rotator block which can rotate +video frame before encoding. In a normal mode a Encoder doesn't need to +capture whole video frame before encoding but in rotation mode, it needs to +capture full video frame (YUV4:2:0) before encoding. This means rotation +mode requires more memory. +This option can be used to enable rotation with 4 basic modes which can be +ORed with two h-flip and v-flip options. +Total of 8 unique combination of rotation modes are available. +*pInfo rotation degree used with MXENC_ATTR_ROTATION +*/ +#define MXENC_H264_ATTR_ROTATION 1 + +#define MXENC_H264_ATTR_ROTATE_0 0x0 /**< No rotation */ +#define MXENC_H264_ATTR_ROTATE_90 0x1 /**< Rotate by 90 degree */ +#define MXENC_H264_ATTR_ROTATE_180 0x2 /**< Rotate by 180 degree */ +#define MXENC_H264_ATTR_ROTATE_270 0x3 /**< Rotate by 270 degree */ +#define MXENC_H264_ATTR_H_FLIP 0x10 /**< Flip horizontally */ +#define MXENC_H264_ATTR_V_FLIP 0x20 /**< Flip vertically */ + +/**GFMxEncH264SetAttribute_Definitions:MXENC_H264_INTRAREFRESH_MODE +This option allows you to change the INTRA REFRESH mode while encoding is in progress. +With this option, the application can switch/Turn ON MXENC_H264_INTRAREFRESH_AUTO or +MXENC_H264_INTRAREFRESH_MC. After switching to MXENC_H264_INTRAREFRESH_MC mode, the application +has to call GFMxEncH264SetPicture() with pPicture:pIMRFMatrix specifying the Intra Refresh pattern +*/ +#define MXENC_H264_INTRAREFRESH_MODE 2 +#define MXENC_H264_INTRAREFRESH_AUTO 0x1 /**< Set Intrarefresh pattern in Auto mode */ +#define MXENC_H264_INTRAREFRESH_MC 0x2 /**< Set Intrarefresh pattern in Motion Compensated mode */ + +//@} + +/** typedef enum GFMX_ENC_H264_INTERRUPT_OPERATION_TYPE : Set Interrupt Operation to perform */ +typedef enum +{ + GFMX_ENC_H264_INTERRUPT_ENABLE, /**< Enable Interrupt */ + GFMX_ENC_H264_INTERRUPT_DISABLE, /**< Disable Interrupt */ + GFMX_ENC_H264_INTERRUPT_CLEAR /**< Clear Interrupt */ +} GFMX_ENC_H264_INTERRUPT_OPERATION_TYPE; // Interrupt operation. + +/** typedef enum GFMX_ENC_H264_INTERRUPT_TYPE : Interrupt type*/ +typedef enum +{ + GFMX_ENC_H264_FRAME_ENCODE_DONE_INTR /**< Frame Encode Done Interrupt */ +} GFMX_ENC_H264_INTERRUPT_TYPE; + + +#ifdef __cplusplus +extern "C" { // only need to export C interface if + // used by C++ source code +#endif + + /** MxEncH264API virtual function pointer table. + These functions serve as the entry point to the MxEncH264API from the application. + */ + typedef struct _GFMXEncH264TABLE + { + GF_RETTYPE (* MxEncH264GetProperty)(GFMxEncH264Handle hMxEncH264, PGFPROPERTY pMXProp ); + /**< This function returns a variety of information, including the version of the + GFMxEncH264API encoder module. It is a good practice to call this function to query + for the GFMxEncH264API version and its capabilities before using the rest of the + GFMxEncH264API functions. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pMXProp (PGFPROPERTY) Pointer to GFPROPERTY. + MxEncH264API property flag below. + + MxEncH264API property flag: + + + + + + + + + + + + +
      #GF_MXENC_H264_CAP_BASELINE
      #GF_MXENC_H264_CAP_MAIN
      #GF_MXENC_H264_CAP_EXTENDED
      #GF_MXENC_H264_CAP_HIGH10
      #GF_MXENC_H264_CAP_HIGH422
      #GF_MXENC_H264_CAP_HIGH444
      #GF_MXENC_H264_CAP_LEVEL_IDC
      #GF_MXENC_H264_CAP_DATA_PARTITIONING
      #GF_MXENC_H264_CAP_RATE_CONTROL
      #GF_MXENC_H264_CAP_IMRF
      #GF_MXENC_H264_CAP_ROTATION
      + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the MxEncH264API functions. + */ + + GF_RETTYPE (* MxEncH264GetStatus)(GFMxEncH264Handle hMxEncH264, NvU32 * pStatus); + /**< This function returns the hardware encoder’s status. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pStatus (NvU32 * ) Status returned by the encoder. @see GFMxEncH264GetStatus Definitions. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264SetSequence)(GFMxEncH264Handle hMxEncH264, PGFMXENCH264SETSEQUENCE pSequence); + /**< This function sets the characteristics of a new H264 video sequence and + tells the GFMxEncH264API the sequence information. The GFMxEncH264API does not + generate a sequence bit stream. The application needs to prepare a sequence by itself. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pSequence (PGFMXENCH264SETSEQUENCE ) Set new sequence information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264SetPicture)(GFMxEncH264Handle hMxEncH264, PGFMXENCH264SETPICTURE pPicture); + /**< This function sets the characteristics of a new picture. This + function should be called after GFMxEncH264SetSequence() and before + GFMxEncH264Start(). If the application decides to change any picture information + during the encoding time (after GFMxEncH264Start()), the application can call + this function to pass the new picture information to the GFMxEncH264API. + Otherwise, the application should not call this function, allowing the + GFMxEncH264API to reduce overhead. + + @paramhMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pPicture (PGFMXENCH264SETPICTURE ) Set new picture information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264RateControlConfig)(GFMxEncH264Handle hMxEncH264, PGFMXENCH264RCC pRCC); + /**< This function initializes the GFMxEncH264API rate control block. This function is + optional for application because the GFMxEncH264API automatically initializes + the rate control block. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pRCC (PGFMXENCH264RCC ) Set rate control information.. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264FeedImage)(GFMxEncH264Handle hMxEncH264, + PGFMXENCH264FEEDIMAGE pFeedImage); + /**< The application can call this function if the application has the source image to feed to the encoder. + This function should not be called if the image comes directly from the video + input port (VIP), for example, from a camera. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pStatus (PGFMXENCH264FEEDIMAGE ) New image information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264FetchNALs)(GFMxEncH264Handle hMxEncH264, + PGFMXENCH264FETCHNALS pFetchNALs); + /**< An application should call this function to fetch the encoded NAL bit stream + or encoded raw data. If the source image is from the host, the application + should call this function after GFMxEnch264FeedImage(). If the source image is + from a video camera connected to the VIP and the application is using a + polling scheme, the application should call this function at least at the + camera’s frame rate. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param pFetchNALs (PGFMXENCH264FETCHNALS ) Structure to hold encoded NAL information. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264Start)(GFMxEncH264Handle hMxEncH264); + /**< This function starts the GFMxEncH264API module for encoding the bit stream. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + GF_RETTYPE (* MxEncH264Pause)(GFMxEncH264Handle hMxEncH264); + /**< This function pauses the encoding process until GFMxEnch264Pause() is called + again to Resume encoding, or GFMxEncH264Stop() is called to totally stop encoding. + + @param hMxEnc (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264Stop)(GFMxEncH264Handle hMxEncH264); + /**< This function stops the encoding process. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264SetupInterrupt)(GFMxEncH264Handle hMxEncH264, + void (*Inter)(void *), void * IPara); + /**< An application can use this function to set up the interrupt callback function. + + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param (*Inter)(void *) (void) Pointer to encoder application’s interrupt callback function. + @param IPara (void *) Pointer to parameter of encoder application’s interrupt callback function. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + */ + + GF_RETTYPE (* MxEncH264SetAttribute)(GFMxEncH264Handle hMxEncH264, NvU32 uiFeature, NvU32* pInfo); + /**< This function sets a feature of the H264 encoder. + + @param hMxEncH264 (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param uiFeature (NvU32) @see GFMxEncH264SetAttribute Definitions + @param pInfo (NvU32*) Pointer to the information buffer. + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncH264API_Error_Codes + + GFMxEncH264SetAttribute_Definitions: + + + +
      #MXENC_H264_ATTR_ROTATION
      #MXENC_H264_INTRAREFRESH_MODE
      + + + */ + GF_RETTYPE (* MxEncH264GetAttribute)(GFMxEncH264Handle hMxEncH264, NvU32 uiFeature, NvU32* pInfo); + /**< This function gets a feature of the H264 encoder. + + @param hMxEnc (GFMxEncH264Handle) Handle specific to the GFMxEncH264API. + @param uiFeature (NvU32) see GFMxEncH264GetAttribute_Definitions below. + @param pInfo (NvU32*) Pointer to the information buffer. + + + @retval GF_SUCCESS : If successful. + @retval GF_ERROR : If error. + @see GFMxEncAPI_Error_Codes + + */ + + }GFMXENCH264TABLE, *PGFMXENCH264TABLE; + + // Typesafe functions for opening and closing this component + GF_RETTYPE GFMxEncH264Open(GFRmHandle hRm, GFMxEncH264Handle *phMxEncH264, + GF_STATE_TYPE state, GFRmChHandle hCh); + /**< Typesafe function for opening the H264 Encoder component. + + @param hRm (GFRmHandle) RM Handle got from GFRmOpen. + @param phMxEncH264 (GFMxEncH264Handle *) Handle specific to the GFMxEncH264API is returned in this. + @param state (GF_STATE_TYPE) . + @param hCh (GFRmChHandle) Channel handle + */ + + void GFMxEncH264Close(GFMxEncH264Handle *phMxEncH264); + /**< Typesafe function for closing the H264 Encoder component. + + @param phMxEncH264 (GFMxEncH264Handle *) Pointer to handle specific to H264 encoder component. + */ + + /** @name GFMxEncH264GetStatus Definitions */ + //@{ +#define GF_ENCODER_BUSY 0x00000001 /**< Encoder is busy */ +#define GF_ENCODER_VOP_READY 0x00000002 /**< At least one VOP is ready for fetching */ + //@} + +/** @name GFMxEncH264API Helper Macros. */ + //@{ + +#define GFMxEncH264GetProperty(hMxEncH264, pMXProp) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264GetProperty(hMxEncH264, pMXProp) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264GetProperty + */ + +#define GFMxEncH264GetStatus(hMxEncH264, pStatus) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264GetStatus(hMxEncH264, pStatus) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264GetStatus + */ + +#define GFMxEncH264SetSequence(hMxEncH264, pSequence) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264SetSequence(hMxEncH264, pSequence) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264SetSequence + */ + +#define GFMxEncH264SetPicture(hMxEncH264, pPicture)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264SetPicture(hMxEncH264, pPicture) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264SetPicture + */ + +#define GFMxEncH264RateControlConfig(hMxEncH264, pRCC)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264RateControlConfig(hMxEncH264, pRCC) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264RateControlConfig + */ + +#define GFMxEncH264FeedImage(hMxEncH264, pFeedImage)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264FeedImage(hMxEncH264, pFeedImage) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264FeedImage + */ + +#define GFMxEncH264FetchNALs(hMxEncH264, pFetchNALs)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264FetchNALs(hMxEncH264, pFetchNALs) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264FetchNALs + */ + +#define GFMxEncH264Start(hMxEncH264)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264Start(hMxEncH264) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264Start + */ + +#define GFMxEncH264Pause(hMxEncH264)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264Pause(hMxEncH264) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264Pause + */ + +#define GFMxEncH264Stop(hMxEncH264)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264Stop(hMxEncH264) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264Stop + */ + +#define GFMxEncH264SetupInterrupt(hMxEncH264, Inter,IPara)\ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264SetupInterrupt(hMxEncH264, Inter,IPara) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264SetupInterrupt + */ + +#define GFMxEncH264SetAttribute(hMxEncH264, uiFeature, pInfo) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264SetAttribute(hMxEncH264, uiFeature, pInfo) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264SetAttribute + */ + +#define GFMxEncH264GetAttribute(hMxEncH264, uiFeature, pInfo) \ + ((PGFMXENCH264TABLE)hMxEncH264)->MxEncH264GetAttribute(hMxEncH264, uiFeature, pInfo) + /**< Helper macro for GFMxEncH264API. + @see GFMXENCH264TABLE::MxEncH264GetAttribute + */ + + //@} + + /** @name GFMxEncH264API_Error_Codes + */ + //@{ + + /** GFMXEH264_SUCCESS*/ +#define GFMXEH264_SUCCESS GF_SUCCESS + /** GGFMXEH264_ERROR_NOT_SUPPORT_FORMAT*/ +#define GFMXEH264_ERROR_NOT_SUPPORT_FORMAT (GFMXEH264_ERROR | 0x00000001) + /** GFMXEH264_ERROR_INVALID_PARAMETER*/ +#define GFMXEH264_ERROR_INVALID_PARAMETER (GFMXEH264_ERROR | 0x00000002) + /** GFMXEH264_ERROR_NOT_ENOUGH_EMBEDDED_MEM*/ +#define GFMXEH264_ERROR_NOT_ENOUGH_EMBEDDED_MEM (GFMXEH264_ERROR | 0x00000003) + //@} + + + /*@}*/ + + /** @page pageMxEncH264AppNotes MxEncH264API Application Notes + + @section pageMxEncH264AppNotes1 Programming Sequence + + The following procedure requires that GFRmOpen() is called first to start GFSDK usage. The description is for a typical case + where encoding of video being captured from a camera is done and preview shown on the display. + + 1. Initialize the display panel by using GFRmIxInit().\n + + 2. Open the display component by calling GFDxOpen() to get the GFMxDecAPI Dxhandle.\n + + 3. Initialize the display start address, stride and bits per pixel using GFDxSetDisplay().\n + + 4. Get the various attributes of the display panel (width, height, etc) using GFDxGetAttribute().\n + + 5. For clearing the screen, open the graphics component using GFGxOpen() and use GFGxFillRect() for filling the screen with + some color (say, green).\n + + 6. Open the Vx component using GFVxOpen() and get the GFVxAPI VxHandle. \n + + 7. Setup the camera. \n + + 8. Initialize VIP. \n + + 9. Obtain the handle specific to H264 encoder by calling GFMxEncH264Open(). \n + + 10. Call GFMxEncH264GetProperty() to query properties. Check whether this version can support the desired H264 profile and level. \n + + 11. If supported, call GFRmSurfaceAlloc() to allocate one surface for encoding purposes. \n + + 12. Call GFMxEncH264SetAttribute() if specific features need to be set. \n + + 13. Call GFMxEncH264SetSequence() for configuring the characteristics of a new H264 video sequence. \n + + 14. Call GFMxEncH264SetPicture() for setting the characteristics of a new picture. \n + + 15. If the current source image is from the CPU, the application should call GFMxEncH264FeedImage() to feed the + image to the GFMxEncH264API. If the current source image is coming from the VIP (for example. camera input), the + application should skip the GFMxEncH264FeedImage() call. + + 16. If the application uses an interrupt scheme, it must implement a callback function and set it up using GFMxEncH264SetupInterrupt. + Inside of the callback function, the application should call GFMxEncH264FetchNALs() to retrieve the encoded NALs. \n + + 17. Start the encoding by calling GFMxEncH264Start(). \n + + 18. The application should periodically call the callback function to get the data from the encoder. \n + + 19. The encoder can be paused by calling GFMxEncH264Pause() and can be resumed by calling GFMxEncH264Pause() again. \n + + 20. Before exiting, call GFMxEncH264Stop() to stop the encoder. \n + + 21. Call the callback function after waiting for some time to get the data for the last frame encoded. \n + + 22. Free all relevent resources and call GFMxEncH264Close() to free the H264 encoder component. \n + + */ + +#ifdef __cplusplus +} // only need to export C interface if +// used by C++ source code +#endif + +#endif //#ifndef _GF_MPEG_ENC_H264__ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFOSx.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFOSx.h new file mode 100755 index 00000000..f3f48b0d --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFOSx.h @@ -0,0 +1,39 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFOSx.h + GFSDK OS Abstraction API header file. +*/ + +#ifndef __GFOSx_H__ +#define __GFOSx_H__ + +#include "GFRmOEM.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupOSx OSxAPI OS Abstraction API +*/ +/*@{*/ + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFOSxOpen(GFRmHandle hRm, GFOSxHandle *phOSx, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFOSxClose(GFOSxHandle *phOSx); + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif // _GFOSx_H_ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFOption.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFOption.h new file mode 100755 index 00000000..c54f0d7e --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFOption.h @@ -0,0 +1,140 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFOption.h + GFSDK (Compile-time) Option header file. + Contains user level options and selected compile-time options. +*/ + +#ifndef __GFOPTION_H__ +#define __GFOPTION_H__ + +#include "cpuopsys.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + +/*************************************************************************** + * Hardware Dependent Options and Compile-time selections + ***************************************************************************/ + +/** @name Device ID options and compile-time selection + @anchor DeviceIDs + #GF_DEVICE_ID_DEFAULT option is for selecting any ID. +@{*/ + +#define GF_DEVICE_ID_DEFAULT 0x0000 +#define GF_DEVICE_ID_SC11 0x0011 +#define GF_DEVICE_ID_SC15 0x0015 +#define GF_DEVICE_ID_SC14 0x0014 + +#ifndef GF_DEVICE_ID +#define GF_DEVICE_ID GF_DEVICE_ID_SC15 + // Primary chip id +#endif /* GF_DEVICE_ID */ + +#define GF_DEVICE_ID_MASK 0x0000FFFF +#define GF_DEVICE_ID_SHIFT 0 +#define GF_DEVICE_ID_VALUE( val ) \ + (((val) >> GF_DEVICE_ID_SHIFT) & GF_DEVICE_ID_MASK) +/*@}*/ + +/** @name Device Revision options and compile-time selection + @anchor DeviceRevisions + #GF_DEVICE_REV_DEFAULT is for selecting any revision. + Always use 16bit when referring Device Revision only. +@{*/ +#define GF_REV_A1 0x00A1 +#define GF_REV_A2 0x00A2 +#define GF_REV_A3 0x00A3 +#define GF_REV_A4 0x00A4 + +#define GF_DEVICE_REV_DEFAULT 0x0000 +#ifndef GF_DEVICE_REV +#define GF_DEVICE_REV GF_DEVICE_REV_DEFAULT + //!< Primary chip revision +#endif /* GF_DEVICE_REV */ + +#define GF_DEVICE_REV_MASK 0x0000FFFF +#define GF_DEVICE_REV_SHIFT 16 +#define GF_DEVICE_REV_VALUE( val ) \ + (((val) >> GF_DEVICE_REV_SHIFT) & GF_DEVICE_REV_MASK) + +/*@}*/ + +#if defined(NVCPU_XTENSA) + +// On DSP, we always use direct addressing. +#define GF_DEVICE_ADDRESS_DEFAULT GF_DEVICE_ADDRESS_DIRECT +#define GF_DEVICE_ADDRESS GF_DEVICE_ADDRESS_DIRECT + +#else + +// On host CPU, direct & indirect addressing are available in runtime. Default +// is direct addressing. +#ifndef GF_DEVICE_ADDRESS_DEFAULT +#define GF_DEVICE_ADDRESS_DEFAULT GF_DEVICE_ADDRESS_DIRECT +#endif /* GF_DEVICE_ADDRESS_DEFAULT */ + +#ifndef GF_DEVICE_ADDRESS +#define GF_DEVICE_ADDRESS ( GF_DEVICE_ADDRESS_DIRECT \ + | GF_DEVICE_ADDRESS_INDIRECT16 \ + | GF_DEVICE_ADDRESS_INDIRECT8 \ + | GF_DEVICE_ADDRESS_INDIRECT32) +#endif /* GF_DEVICE_ADDRESS */ + +#endif + + + +/*************************************************************************** + * Operating system Dependent Options + ***************************************************************************/ + +/* The bootloader has already initialized the chip and display. To avoid + * writing the hardware again (which can cause screen flicker and other + * symptoms that the customer doesn't like), define this variable to 1. + */ +#ifndef GF_BOOTLOADER_PRESENT +#define GF_BOOTLOADER_PRESENT 0 +#endif + + + + +// If we're compiling for the bootloader right now, of course the +// bootloader cannot be present +#ifdef GF_BOOT_LIB +#undef GF_BOOTLOADER_PRESENT +#define GF_BOOTLOADER_PRESENT 0 +#endif + +/************************************************************************** + * GFSDK Library Auto Compiler Options + * Attempts to set up enough options if none is specified by Build Project. + **************************************************************************/ + +// XXX We should get rid of NV_DEBUG, so we don't have both DEBUG and NV_DEBUG +#if defined(NV_WINDOWS) && !defined(NV_WINDOWS_CE) +#ifdef _DEBUG +#ifndef NV_DEBUG +#define NV_DEBUG 1 +#endif +#endif +#endif + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFOPTION_H__ */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRm.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRm.h new file mode 100755 index 00000000..6669abcd --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRm.h @@ -0,0 +1,2039 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFRm.h + GFSDK Resource Manager API header file. +*/ + +#ifndef __GFRM_H__ +#define __GFRM_H__ + +#include "GF.h" +#include "GFRmError.h" + +/** @addtogroup groupRm RmAPI Resource Manager API +
        +
      • @ref pageRmAppNotes +
          +
        • @ref pageRmAppNotes1 +
        +
      +*/ +/*@{*/ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#include "GFRmScr.h" + +/** Hardware Module IDs. + List of all the modules in the SCXX chips. +*/ +typedef enum +{ +#define GFRM_MODULE(x,y) MODID_##x, +#include "gfrm_module_ids.h" +#undef GFRM_MODULE + GFNUMOFMODULEIDS +} eGFModuleIDs; + +/** @name Power Planes/Islands + List of all the power planes in the SCXX chips. +@{*/ + +/** Power Plane ID: Core Power Plane. */ +#define GFPPID_AOCVDD 0x00000001 + +/** Power Plane ID: Video Codec Power Plane. */ +#define GFPPID_VECVDD 0x00000002 + +/** Power Plane ID: SRAM Power Plane. */ +#define GFPPID_MMCVDD 0x00000004 + +/** Power Plane ID: 3D Power Plane. */ +#define GFPPID_TDCVDD 0x00000008 + +/** Power Plane ID: SRAM I/O Power Plane. */ +#define GFPPID_EMVDD 0x00000010 + +/** Power Plane ID: Mostly Bus Interface Power Plane. */ +#define GFPPID_HVDD 0x00000020 + +/** Power Plane ID: Video I/O Power Plane. */ +#define GFPPID_VVDD 0x00000040 + +/** Power Plane ID: LCD I/O Power Plane. */ +#define GFPPID_LVDD 0x00000080 + +/** Power Plane ID: Audio I/O Power Plane. */ +#define GFPPID_ACVDD 0x00000100 + +/** Power Plane ID: SD I/O Power Plane. */ +#define GFPPID_SDVDD 0x00000200 + +/** Power Plane ID: Oscillator Power Plane. */ +#define GFPPID_AVDDOSC 0x00000400 + +/** Power Plane ID: PLL1 Power Plane. */ +#define GFPPID_AVDDP1 0x00000800 + +/** Power Plane ID: PLL2 Power Plane. */ +#define GFPPID_AVDDP2 0x00001000 + +/** Power Plane ID: DRAM Power Plane. */ +#define GFPPID_DRAM 0x00002000 + +/** Number of power plane IDs. */ +#define GFNUMOFPPIDS 14 + +/*@}*/ + +/** @name States for Component Manager and general services +@{*/ + +/** State for registering Component. + @see GF_STATE_TYPE, GFRmComponentGet(). +*/ +#define GF_STATE_REGISTER 0x00000001 + +/** State for unregistering Component. + @see GF_STATE_TYPE, GFRmComponentRelease(). + */ +#define GF_STATE_UNREGISTER 0x00000002 + +/** State for unregistering all Components (internal used only). + @see GF_STATE_TYPE, GFRmComponentRelease(). + */ +#define GF_STATE_UNREGISTER_ALL 0x00000004 + +/** General Enable State. + @see GF_STATE_TYPE. +*/ +#define GF_STATE_ENABLE 0x00000008 + +/** General Disable State. + @see GF_STATE_TYPE. +*/ +#define GF_STATE_DISABLE 0x00000010 + +/** General Done State. + @see GF_STATE_TYPE. +*/ +#define GF_STATE_DONE 0x00000020 + +/** State for instantiating a new or share Component. + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_NEW_OR_SHARE 0x00000100 + +/** State for instantiating a new Component only. + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_NEW_ONLY 0x00000200 + +/** State for instantiating a share Component only. + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_SHARE_ONLY 0x00000400 + +/** State indicating special Block Device Component (internal use). + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_BLOCK_DEVICE 0x80000000 + +/** Default Component instantiation State. + @see GF_STATE_TYPE, GFRmComponentGet(). + */ +#define GF_STATE_DEFAULT GF_STATE_NEW_OR_SHARE + +/** Mask for the regular States. + @see GF_STATE_TYPE. +*/ +#define GF_STATE_MASK 0x000000FF + +/*@}*/ + + +/** Attributes ID/Values. + @see GFRmGetAttribute(), GFRmSetAttribute(). +*/ +typedef enum +{ + /** Attribute for changing device bus addressing (direct/indirect) mode. */ + GF_ATTRIB_DEVICE_ADDRESS, + + /** Attribute for mapped/virtual/usable I/O base address. */ + GF_ATTRIB_IO_MAP_BASE, + + /** Attribute for mapped/virtual/usable embedded memory base. */ + GF_ATTRIB_EMBEDDED_MEM_MAP_BASE, + + /** Attribute for initial embedded internal memory size. */ + GF_ATTRIB_INIT_EMBEDDED_MEM_TOTAL, + + /** Attribute for initial available embedded internal memory size. */ + GF_ATTRIB_INIT_EMBEDDED_MEM_AVAIL, + + /** Attribute for initial embedded extended memory size. */ + GF_ATTRIB_INIT_EXT_EMBEDDED_MEM_TOTAL, + + /** Attribute for user specific object 0. */ + GF_ATTRIB_USER_OBJECT_0, + + /** Attribute for user specific object 1. */ + GF_ATTRIB_USER_OBJECT_1, + + /** Attribute for user specific object 2. */ + GF_ATTRIB_USER_OBJECT_2, + + /** Attribute for user specific object 3. */ + GF_ATTRIB_USER_OBJECT_3, + + /** Attribute for swapping memory allocation with shared embedded memory + MAX CHUNK scheme. For advanced user only. */ + GF_ATTRIB_SWAP_SHARE_MEMORY_ALLOC_ON_MAX_CHUNK, + + /** Get device information structure. + GFRmGetAttribute() parameter \a AttribData is of type PGFRMDEVICEINFO. + */ + GF_ATTRIB_DEVICE_INFO_STRUCT, + + /** For internal use only. */ + GF_ATTRIB_RMC_FLAG, + + /** Enable/Disable Hardware Resource Constraint. */ + GF_ATTRIB_HW_RESOURCE_CONSTRAINT, + + /** Enable embedded extended memory. */ + GF_ATTRIB_ENABLE_EXTENDED_MEMORY, + + /** Disable RMC trace, closing any log files that might be opened */ + GF_ATTRIB_DISABLE_RMC_TRACE, + + /** Set/Clr surface with absolute rotation option. */ + GF_ATTRIB_SURFACE_ABSOLUTE_ROTATE, + + /** Primary surface freeing policy. */ + GF_ATTRIB_PRIMSURF_FREEING_POLICY, + + /** Primary surface allocation policy. */ + GF_ATTRIB_PRIMSURF_ALLOCATION_POLICY, + + /** Internal use. */ + GF_ATTRIB_EFUSE_PRODUCT_SKU_ID, + + /** Internal use. */ + GF_ATTRIB_MAIN_PANEL_INDEX, + + /** GFRm attribute: Set DSP2Host communication mode. + + This attribute can be used to control how components wait + for messages from the DSP. The following options for \a AttribData are available: + - #GF_ATTRIB_DSPCOMMODE_POLLING -- Register polling. + This mode is intended for debuging only, since it allows only one client + to use DSP2Host interrupts. + - #GF_ATTRIB_DSPCOMMODE_EVENT -- Receive DSP2Host messages via an interrupt framework. + This mode requires an ISR/IST to be setup, that handles DSP interrupts and calls + GFRmDispatchMessage(). + + The default setting is register polling. + + Attribute can be get and set. + + @see GFRmSetAttribute(), GFRmGetAttribute(), GFRmQueueSetHandler(), GFRmDispatchMessage() + */ + GF_ATTRIB_DSPCOMMODE, + + /** Set surface for DSP debug console output. + + This sets a surface which will be used to output text from the DSP debug console. + The DSP XRM must be initialized before this function can be called. + + GFRmSetAttribute() parameter \a AttribData is of type #PGFRMSURFACE and defines a pointer to a + surface descriptor. + + @retval GF_SUCCESS Successfully send message + @retval GF_WAIT_TIME_OUT Timeout sending message + @retval GFRM_ERROR_BAD_PARAMETER Bad parameters, e.g. surface color format is not supported + + @see GFRmSetAttribute() + + Attribute can be set only. + */ + GF_ATTRIB_DSPCONSOLE_SURFACE, + + /** Internal use. */ + GF_ATTRIB_USE_CAMERA_SCRIPT, + + /** Internal use. */ + GF_ATTRIB_DEVICE_TYPE, + + /** Timeout in ms for RM IST to wait for interrupts. + Set to 0 to disable timeout, default setting is 1000 ms. + GFRmSetAttribute() parameter \a AttribData is of type NvU32 and defines timout in ms. + */ + GF_ATTRIB_INTX_TIMEOUT, + + /** Enable debug printout for GPU memory allocations. + + GFRmSetAttribute() parameter \a AttribData is of type NvU32, + - 0 means disable log (default) + - !=0 means enable log + + This GFRmSetAttribute() call always succeeds. + + @see GFRmSetAttribute() + + Attribute can be set only. + */ + GF_ATTRIB_GPUMEM_ENABLELOG + +} GF_ATTRIBUTE_TYPE; + +/** DSP2Host communication modes, polling. + @see GF_ATTRIB_DSPCOMMODE +*/ +#define GF_ATTRIB_DSPCOMMODE_POLLING 0 +/** DSP2Host communication modes, OS event synchronization. + @see GF_ATTRIB_DSPCOMMODE +*/ +#define GF_ATTRIB_DSPCOMMODE_EVENT 1 + +/** GFSDK (low-level) device interface type. (Read Only) + * @see GF_ATTRIB_DEVICE_TYPE. + **/ +#define GF_ATTRIB_DEVICE_TYPE_HARDWARE 0x00000000 +#define GF_ATTRIB_DEVICE_TYPE_SIMULATOR 0x00001000 + + +/** @name Component Types + +@{*/ + +/** Component Type: EPP Component. + @anchor ComponentTypes +*/ +#define GF_EPPAPI 0x00000001L + +/** Component Type: Gx (2D) API Component. */ +#define GF_GXAPI 0x00000002L + +/** Component Type: Vx (general Video and Video Input Port) API Component. */ +#define GF_VXAPI 0x00000003L + +/** Component Type: JxE (JPEG Encode) API Component. */ +#define GF_JXEAPI 0x00000004L + +/** Component Type: JxE (JPEG Decode) API Component. */ +#define GF_JXDAPI 0x00000005L + +/** Component Type: MxE (MPEG Encode) API Component. */ +#define GF_MXEAPI 0x00000006L + +/** Component Type: MxD (MPEG Decode) API Component. */ +#define GF_MXDAPI 0x00000007L + +// 0x8 is unused + +/** Component Type: Dx (Display and Flat Panel) API Component. */ +#define GF_DXAPI 0x00000009L + +// 0xA is unused + +/** Component Type: ISP (Image Signal Processing) API Component. */ +#define GF_ISPAPI 0x0000000BL + +/** Component Type: FDev (Pseudo File System/Device) API Component. */ +#define GF_FDEVAPI 0x0000000CL + +/** Component Type: BDevSD (SD Block Device) Component. */ +#define GF_BDEVSDAPI 0x0000000DL + +// 0xE is unused +// 0xF is unused + +/** Component Type: OSx (Operating System) API COmponent */ +#define GF_OSXAPI 0x00000010L + +/** Component Type: I2C API Component */ +#define GF_I2CAPI 0x00000011L + +/** Component Type: I2S API COmponent */ +#define GF_I2SAPI 0x00000012L + +/** Component Type: MMProc (Audio) API COmponent */ +#define GF_MMPROCAPI 0x00000013L + +/** Component Type: CAM (Camera) API Component */ +#define GF_CAMAPI 0x00000014L + +/** Component Type: 3D API Component */ +#define GF_3DAPI 0x00000015L + +/** Component Type: INTx (Interrupt) API COmponent */ +#define GF_INTXAPI 0x00000016L + +/** Component Type: MXDH264 (H264 Decoder) API COmponent */ +#define GF_MXDH264API 0x00000017L + +/** Component Type: MXEH264 (H264 Encoder) API Component */ +#define GF_MXEH264API 0x00000018L + +/** Component Type: RM (Resource Manager) Services (listed only for return status). */ +#define GF_RMAPI 0x00000019L + +/** Component Type: GxFB (Gx/2D API with Frame Buffer rendering) API. Internal Use. */ +#define GF_GXFBAPI 0x0000001AL + +/** MXDRV9 (RV9 Decoder) API COmponent */ +#define GF_MXDRV9API 0x0000001BL + +/** Component Type: MXDVC1 (VC1 Decoder) API Component */ +#define GF_MXDVC1API 0x0000001CL + +/** Component Type: MXDEMTS (MPEG TS Demux) API Component */ +#define GF_MXDEMTSAPI 0x0000001DL + +/** Component Type: Minimal ISP API Component (NvIsp) */ +#define GF_MINIMALISPAPI 0x0000001EL + +/** Component Type: NvISP API Component ID -- only used for GF_TRACE */ +#define NV_ISPAPI 0x0000001FL + +/*@}*/ + +/** NULL driver related. Internal use. */ +#define GF_USE_NULL_DRIVER 0x1 + +/** NULL driver related. Internal use. */ +#define GF_USE_HW_DRIVER 0x2 + + +/** @name Hardware Resources + @anchor HardwareResources + Flags 'hwEngineReq' in GFRmHwResourceConstraint(). (not working yet). + @see GFRmHwResourceConstraint(). +@{*/ + +/** Hardware resource flag: MPEG Decoder Engine. */ +#define GF_HWR_MPEGD 0x00000001 + +/** Hardware resource flag: JPEG Decoder is same as MPEG Decoder Engine. */ +#define GF_HWR_JPEGD 0x00000001 + +/** Hardware resource flag: MPEG Encoder Engine. */ +#define GF_HWR_MPEGE 0x00000002 + +/** Hardware resource flag: JPEG Encoder shares FrontEnd and BackEnd with JPEG Enc Engine. */ +#define GF_HWR_JPEGE 0x00000002 + +/** Hardware resource flag: Video Input Port. */ +#define GF_HWR_VIP 0x00000004 + +/** Hardware resource flag: EPP */ +#define GF_HWR_EPP 0x00000008 + + + +/** Options for GFRmHwResourceConstraint(). + (not working yet!) + @see GFRmHwResourceConstraint(). +*/ +typedef enum +{ + /** check availability and allocate hardware resource. */ + GF_HRC_ALLOCATE, + + /** free hardware resource. */ + GF_HRC_FREE, + + /** check availability of hardware resource. */ + GF_HRC_CHECK +} GF_HRC_OPTIONS; + +/*@}*/ + +/** Component ID structure. */ +typedef struct _GFRMCOMPONENTID +{ + NvU32 ComponentType; /**< Component Type, see @ref ComponentTypes. */ + GFRmChHandle CxtHandle; +} GFRMCOMPONENTID, *PGFRMCOMPONENTID; + +/* Component */ + +/* forward declaration */ +typedef struct _GFRMCOMPONENT GFRMCOMPONENT, *PGFRMCOMPONENT; + +typedef GF_HANDLE (* GFOPENFUNCTIONTYPE)(GFRmHandle pRm, GFRmChHandle); +typedef GF_RETTYPE (* GFCLOSEFUNCTIONTYPE)(GF_HANDLE *); + +/** Component Registration structure. + Internal use. + @internal +*/ +struct _GFRMCOMPONENT +{ + GFRMCOMPONENTID id; /**< Structure defining component. */ + GFOPENFUNCTIONTYPE Open; /**< Component Open callback. Called from GFRmComponentGet(). */ + GFCLOSEFUNCTIONTYPE Close; /**< Component Close callback. Called from GFRmComponentRelease(). */ +}; + + +/** @name Surface Types + @anchor SurfaceTypes + @see GFRmSurfaceAlloc(). +@{*/ + +/** Surface Type: Surface rotation orientation at 0 degree. */ +#define GF_SURFACE_ROTATE_0 0x00000000 + +/** Surface Type: Surface rotation orientation at 90 degree (relative to _ROTATE_0). */ +#define GF_SURFACE_ROTATE_90 0x10000000 + +/** Surface Type: Surface rotation orientation at 180 degree (relative to _ROTATE_0). */ +#define GF_SURFACE_ROTATE_180 0x20000000 + +/** Surface Type: Surface rotation orientation at 270 degree (relative to _ROTATE_0). */ +#define GF_SURFACE_ROTATE_270 0x30000000 + +/* + * GF_SURFACE_H_FLIP and GF_SURFACE_V_FLIP can be ORed with above 4 rotation + * options to create 16 combinations but in reality there are only 8 unique + * combinations. + */ + +/** Surface Type: Horizontal Flip. You can or'ed this flag with _ROTATE_ flag above too. */ +#define GF_SURFACE_H_FLIP 0x40000000 + +/** Surface Type: Vertical Flip. You can or'ed this flag with _ROTATE_ flag above too. */ +#define GF_SURFACE_V_FLIP 0x80000000 + +/** Surface Type: internal use. */ +#define GF_SURFACE_ROTATE_MASK 0xF0000000 + +/** Surface Type: internal use. */ +#define GF_SURFACE_PLANAR_ROTATE_MASK 0x30000000 + +/** Surface Type: internal use. */ +#define GF_SURFACE_ROTATE_SHIFT 28 // bits[31:28] + +/** Surface Type: internal use. */ +#define GF_SURFACE_ROTATE_WRAP 8 + +/** Surface Type: Primary Surface (default rotate orientation). */ +#define GF_SURFACE_PRIMARY 0x00000001 //primary surface + +/** Surface Type: Primary Surface with 0 degree rotation. */ +#define GF_SURFACE_PRIMARY_0 (GF_SURFACE_PRIMARY| GF_SURFACE_ROTATE_0) + +/** Surface Type: Primary Surface with 90 degree rotation. */ +#define GF_SURFACE_PRIMARY_90 (GF_SURFACE_PRIMARY| GF_SURFACE_ROTATE_90) + +/** Surface Type: Primary Surface with 180 degree rotation. */ +#define GF_SURFACE_PRIMARY_180 (GF_SURFACE_PRIMARY| GF_SURFACE_ROTATE_180) + +/** Surface Type: Primary Surface with 180 degree rotation. */ +#define GF_SURFACE_PRIMARY_270 (GF_SURFACE_PRIMARY| GF_SURFACE_ROTATE_270) + +/** Surface Type: Overlay Surface. */ +#define GF_SURFACE_OVERLAY 0x00000002 + +/** Surface Type: Surface to reside in embedded (video) memory. */ +#define GF_SURFACE_VIDEO_MEMORY 0x00000004 + +/** Surface Type: Surface to reside in system memory. */ +#define GF_SURFACE_SYSTEM_MEMORY 0x00000008 + +/** Surface Type: Sub primary surface (for Sub LCD). */ +#define GF_SURFACE_PRIMARY_SUB 0x00000100 //Sub primary surface + +/** Surface Type: Surface to be allocated from "share" embedded memory for + advanced use only. + Cannot be used with #GF_SURFACE_PRIMARY. + No effect with #GF_SURFACE_SYSTEM_MEMORY. +*/ +#define GF_SURFACE_SHARE 0x00001000 + +/** Surface Type: Allocate surface with pre-allocated memory handle. */ +#define GF_SURFACE_PREALLOCATED_MEM 0x00002000 + +/** Request to use new API */ +#define GF_SURFACE_NEW_API 0x01000000 + +/* + * Note: GF_SURFACE_ROTATE_ refers to caller's view of current logical + * orientation relative to Primary Surface. And Primary surface is + * always set to GF_SURFACE_ROTATE_0 even though physical LCD Display + * panel may require different physical orientation. + */ + +/*@}*/ + +/** @name Surface Hints + @anchor SurfaceHints + @see GFRmSurfaceAlloc(). +@{*/ + +/** Surface Hint: Alloc from highest possible position. */ +#define GF_SURFACE_HINT_TOP_DOWN 0x1 + +/** Surface Hint: Alloc from lowest possible position. */ +#define GF_SURFACE_HINT_BOTTOM_UP 0x2 + +/** Surface Hint: Alloc max chunck of memory. */ +#define GF_SURFACE_HINT_MAX_CHUNK 0x4 + +/** Surface Hint: Try allocations from external memory first before internal memory */ +#define GF_SURFACE_HINT_EXT_MEMORY_PREFERRED 0x8 + +/** Surface Hint: Try allocations only from external memory. */ +#define GF_SURFACE_HINT_EXT_MEMORY_ONLY 0x10 + +/** Surface Hint: Try allocations only from internal memory. */ +#define GF_SURFACE_HINT_INT_MEMORY_ONLY 0x20 + +/** Surface Hint: Alloc from embedded memory, YUV in the same contiguous memory. + Valid only for GF_SURFACE_YUV420. +*/ +#define GF_SURFACE_HINT_CONTIGUOUS_MEMORY 0x40 + +/** Surface Hint: Try allocations from internal memory first before external memory */ +#define GF_SURFACE_HINT_INT_MEMORY_PREFERRED 0x80 + +/** Surface Hint: Hints to align stride to 4 bytes - default for YUV422 */ +#define GF_SURFACE_HINT_STRIDE_ALIGN4 0x100 + +/** Surface Hint: Hints to align stride to 8 bytes */ +#define GF_SURFACE_HINT_STRIDE_ALIGN8 0x200 + +/** Surface Hint: Hints to align stride to 16 bytes */ +#define GF_SURFACE_HINT_STRIDE_ALIGN16 0x400 + +/** Surface Hint: Hints to align stride to 32 bytes */ +#define GF_SURFACE_HINT_STRIDE_ALIGN32 0x800 + +/** Surface Hint: Surface will be used for direct read by the applications */ +#define GF_SURFACE_NEED_DIRECT_CPU_READ 0x1000 + +/** Surface Hint: Surface will be used for direct write by the applications */ +#define GF_SURFACE_NEED_DIRECT_CPU_WRITE 0x2000 + +/** Surface Hint: Surface will be used for direct access by the applications + both read and write actions are allowed + */ +#define GF_SURFACE_NEED_DIRECT_CPU_ACCESS \ + (GF_SURFACE_NEED_DIRECT_CPU_READ | GF_SURFACE_NEED_DIRECT_CPU_WRITE) +/*@}*/ + +/** @name Primary surface allocation and freeing policies + @see GFRmSetAttribute(). +@{*/ + +/** Any avaliable memory. Use with GF_ATTRIB_PRIMSURF_ALLOCATION_POLICY. */ +#define GF_ATTRIB_PRIMSURF_ALLOCP_NONE 0x0 + +/** Allocate Primary surface from embedded extended memory. + Use with GF_ATTRIB_PRIMSURF_ALLOCATION_POLICY. +*/ +#define GF_ATTRIB_PRIMSURF_ALLOCP_USE_EXT_MEM 0x1 + +/** Allocate Primary surface from internal memory (SRAM). + Use with GF_ATTRIB_PRIMSURF_ALLOCATION_POLICY. +*/ +#define GF_ATTRIB_PRIMSURF_ALLOCP_USE_INT_MEM 0x2 + +/** Use with GF_ATTRIB_PRIMSURF_FREEING_POLICY. */ +#define GF_ATTRIB_PRIMSURF_FREEP_NONE 0x0 + +/** Never free, Default policy. Use with GF_ATTRIB_PRIMSURF_FREEING_POLICY. */ +#define GF_ATTRIB_PRIMSURF_FREEP_NEVER_FREE 0x0 + +/** Free when the ref count is zero. Use with GF_ATTRIB_PRIMSURF_FREEING_POLICY. */ +#define GF_ATTRIB_PRIMSURF_FREEP_FREE_ON_EMPTY 0x1 + +/** Force free. Use with GF_ATTRIB_PRIMSURF_FREEING_POLICY. */ +#define GF_ATTRIB_PRIMSURF_FREEP_FORCE_FREE 0x2 + +/*@}*/ + +/** Surface structure. + @see GFRmSurfaceAlloc(), GFRmSurfaceFree(). +*/ +typedef struct _GFRMSURFACE +{ + NvU32 width; /**< Width in pixels. */ + NvU32 height; /**< Height in lines. */ + NvU32 SurfaceType; /**< Surface type, see @ref SurfaceTypes. */ + NvU32 ColorFormat; /**< Surface color format, see @ref SurfaceTypes. */ + + NvU32 YStride; /**< Stride for RGB, YUV422 surfaces, or Y plane. */ + NvU32 UStride; /**< U plane stride */ + NvU32 VStride; /**< V plane stride */ + + GFRmMemHandle YMemHandle; /**< Opaque handle for RGB, YUV422 surface, or Y plane memory. */ + GFRmMemHandle VMemHandle; /**< Opaque handle for V plane memory. */ + GFRmMemHandle UMemHandle; /**< Opaque handle for U plane memory. */ + + NvU32 YOffset; /**< Physical address of RGB, YUV422 surfae, or Y plane. */ + NvU32 UOffset; /**< Physical address of U plane. */ + NvU32 VOffset; /**< Physical address of U plane. */ + + /* Direct addressable pointer to the memory region. Don't + use these pointers, unless you want to run only in + "direct addressing mode". Instead, use handles for reading + or writing to the memory from the host, and offsets for + programming the hardware registers. */ + + NvU8 *pY; /**< Pointer to non-planar surface or Y plane of YUV420, valid only for direct addressing. */ + NvU8 *pU; /**< for YUV420 surface, valid only for direct addressing. */ + NvU8 *pV; /**< for YUV420 surface, valid only for direct addressing. */ + + NvU32 memUsed; /**< Total number of bytes used by surfaces. */ + + //void *reserved; // Reserved. Do not modify +} GFRMSURFACE, *PGFRMSURFACE; + +/** Surface Request + @see GFRmSurfaceAlloc(), GFRmSurfaceFree(). +*/ +typedef struct _GFRMSURFACEREQUEST +{ + NvU32 width; /**< Width in pixels. */ + NvU32 height; /**< Height in lines. */ + NvU32 SurfaceType;/**< Surface type, see @ref SurfaceTypes. */ + NvU32 ColorFormat;/**< Surface color format, see @ref SurfaceTypes. */ + NvU32 hint; /**< Allocation hint or 0, see @ref SurfaceHints. */ + NvU8 *pMem; /**< Pointer to pre-allocated memory from which + to allocate the surface planes. */ + NvU32 memSize; /**< Size of pre-allocated Y plane memory. */ + NvU32 id; /**< User defined ID to track allocated block, debugging use */ + + /* Reserved for future */ + /* GF_RETTYPE (* pSurfaceCallBack) + ( GFRmHandle RmHandle, PGFRMSURFACE pSurface); */ + /* Reserved for future */ + /* PGFRMSURFACE pSurfaceShare; */ +} GFRMSURFACEREQUEST, *PGFRMSURFACEREQUEST; + +/** Device Info */ +typedef struct _GFRMDEVICEINFO +{ + NvU32 MinorRev; + NvU32 MajorRev; + NvU32 ChipID; + NvU32 Family; +} GFRMDEVICEINFO, *PGFRMDEVICEINFO; + +/** @name Surface Update Flags + @anchor SurfaceUpdateFlags + @see GFRmSurfaceUpdate() +@{*/ + +/** GFRmSurfaceUpdate() attribute type: Update surface rotation. + + The following values are valid for parameter \a data of GFRmSurfaceUpdate(): + 
      +    #GF_SURFACE_ROTATE_0
+    #GF_SURFACE_ROTATE_90
+    #GF_SURFACE_ROTATE_180
+    #GF_SURFACE_ROTATE_270
+
      + + @see GFRmSurfaceUpdate() +*/ +#define GF_SURFACE_UPDATE_ROTATE 0x00000001 + +/** GFRmSurfaceUpdate() attribute type: Update surface width. + + Meaning of parameter \a data of GFRmSurfaceUpdate(): + New surface width in pixels. + + The number of bytes required for the new width must not exceed the + surface stride. It is the responsibility of the caller to ensure this. + + @see GFRmSurfaceUpdate() +*/ +#define GF_SURFACE_UPDATE_WIDTH 0x00000002 + +/** GFRmSurfaceUpdate() attribute type: Update surface height. + + Meaning of parameter \a data of GFRmSurfaceUpdate(): + New surface height in line. + + The set height * surface stride must not exceed the memory allocated + for the surface. It is the responsibility of the caller to ensure this. + + @see GFRmSurfaceUpdate() +*/ +#define GF_SURFACE_UPDATE_HEIGHT 0x00000003 + +/** GFRmSurfaceUpdate() attribute type: Update surface width and stride. + + Meaning of parameter \a data of GFRmSurfaceUpdate(): + New surface width in pixels. + + YStride, UStride, and VStride will be updated automatically according + to alignment requirements. Supported colour formats: + - GF_SURFACE_YUV420 + + @see GFRmSurfaceUpdate() +*/ +#define GF_SURFACE_UPDATE_WIDTH_STRIDE 0x00000004 + +/*@}*/ + + +/** @name Memory types + @anchor MemoryTypes + @see GFRMMEMORYREQUEST, GFRmMemHandleAlloc() +@{*/ + +/** Memory Type: Host system memory. */ +#define GF_MEMORY_SYSTEM 0x01 +/** Memory Type: Any GPU memory */ +#define GF_MEMORY_EMBEDDED 0x02 +/** Memory Type: Memory mapped memory. */ +#define GF_MEMORY_MEMMAPPED 0x04 +/** Memory Type: External GPU memory only. */ +#define GF_MEMORY_EMBEDDED_EXT_ONLY GF_MEMORY_EMBEDDED_EXT +#define GF_MEMORY_EMBEDDED_EXT 0x08 +/** Memory Type: Internal GPU memory only. */ +#define GF_MEMORY_EMBEDDED_INT_ONLY GF_MEMORY_EMBEDDED_INT +#define GF_MEMORY_EMBEDDED_INT 0x10 +/** Memory type: Internal or external memory with preference to internal memory. */ +#define GF_MEMORY_EMBEDDED_INT_PREFERRED 0x20 +/** Memory type: External or internal memory with preference to external memory. */ +#define GF_MEMORY_EMBEDDED_EXT_PREFERRED 0x40 +/** Memory type: Direct Read access */ +#define GF_MEMORY_DIRECT_CPU_READ_ACCESS 0x80 +/** Memory type: Direct Write access */ +#define GF_MEMORY_DIRECT_CPU_WRITE_ACCESS 0x100 + +/** Memory type: Direct Read/Write access */ +#define GF_MEMORY_DIRECT_CPU_ACCESS (GF_MEMORY_DIRECT_CPU_WRITE_ACCESS | GF_MEMORY_DIRECT_CPU_READ_ACCESS) + +/*@}*/ + +/** @name Memory Share Types + @anchor MemoryShare + @see GFRMMEMORYREQUEST, GFRmMemHandleAlloc() +@{*/ + +/** Memory Share Flag: Internal use, used in GFRmMemInfo only. */ +#define GF_MEMORY_SHARE 0x80 + +/*@}*/ + +/** @name Memory Alignment + @anchor MemoryAlignment + @see GFRMMEMORYREQUEST, GFRmMemHandleAlloc() +@{*/ + +/** Memory alignment types, must match log2 of alignment size. */ +enum +{ + GF_MEMORY_ALIGN_NONE = 0, /**< Memory Alignment: Don't care. */ + GF_MEMORY_ALIGN2, /**< Memory Alignment: Aligned to 2 byte boundary. */ + GF_MEMORY_ALIGN4, /**< Memory Alignment: Aligned to 4 byte boundary. */ + GF_MEMORY_ALIGN8, /**< Memory Alignment: Aligned to 8 byte boundary. */ + GF_MEMORY_ALIGN16, /**< Memory Alignment: Aligned to 16 byte boundary. */ + GF_MEMORY_ALIGN32, /**< Memory Alignment: Aligned to 32 byte boundary. */ + GF_MEMORY_ALIGN64, /**< Memory Alignment: Aligned to 64 byte boundary. */ + GF_MEMORY_ALIGN128, /**< Memory Alignment: Aligned to 128 byte boundary. */ + GF_MEMORY_ALIGN256, /**< Memory Alignment: Aligned to 256 byte boundary. */ + GF_MEMORY_ALIGN512, /**< Memory Alignment: Aligned to 512 byte boundary. */ + GF_MEMORY_ALIGN1024, /**< Memory Alignment: Aligned to 1024 byte boundary. */ + GF_MEMORY_ALIGN2048, /**< Memory Alignment: Aligned to 2048 byte boundary. */ + GF_MEMORY_ALIGN4096, /**< Memory Alignment: Aligned to 4096 byte boundary. */ + GF_MEMORY_ALIGN_DSP = 0xFF /**< Memory Alignment: Aligned properly for DSP cacheline size. */ +}; + +/*@}*/ + +/** @name Memory Allocation Hints + @anchor MemoryHints + @see GFRMMEMORYREQUEST, GFRmMemHandleAlloc() +@{*/ +/* Memory Hint - Follow Surface Hint */ +/** Memory Allocation Hint: Allocate from high to low addresses. */ +#define GF_MEMORY_HINT_TOP_DOWN GF_SURFACE_HINT_TOP_DOWN +/** Memory Allocation Hint: Allocate from low to high addresses. */ +#define GF_MEMORY_HINT_BOTTOM_UP GF_SURFACE_HINT_BOTTOM_UP +/** Memory Allocation Hint: Allocate from maximum available chunk. */ +#define GF_MEMORY_HINT_MAX_CHUNK GF_SURFACE_HINT_MAX_CHUNK +/** Memory Allocation Hint: Allocate at fixed address. */ +#define GF_MEMORY_HINT_FIXED (GF_MEMORY_HINT_MAX_CHUNK << 1) +/** Memory Allocation Hint: Allocate for 3D. */ +#define GF_MEMORY_HINT_3D (GF_MEMORY_HINT_MAX_CHUNK << 2) + +/* These options are for DRAM as extended memory. This option specifies + * bank the buffer should come from. This will avoid + * bank clobbering between two buffers that are accessed in lock + * step. + */ + +/** Memory Allocation Hint: Allocate from even banks in external memory. */ +#define GF_MEMORY_HINT_EVEN_BANK (GF_MEMORY_HINT_MAX_CHUNK << 3) +/** Memory Allocation Hint: Allocate from odd banks in external memory. */ +#define GF_MEMORY_HINT_ODD_BANK (GF_MEMORY_HINT_MAX_CHUNK << 4) +/*@}*/ + +/** Memory allocation request. + @see GFRmMemHandleAlloc() +*/ +typedef struct _GFRMMEMORYREQUEST +{ + NvU32 length; /**< Size in bytes. */ + NvU32 hint; /**< Allocation hint or 0, see @ref MemoryHints. */ + struct + { + NvU16 type; /**< Memory type, see @ref MemoryTypes. */ + NvU8 share; /**< Share flags or 0, see @ref MemoryShare. */ + NvU8 align; /**< Alignment flags, see @ref MemoryAlignment. */ + } + flag; + NvU32 id; /**< User defined ID to track allocated block, debugging use */ +} GFRMMEMORYREQUEST, *PGFRMMEMORYREQUEST; + +/** OS Critical Section bits 0-15 are general purpose use +bit 16-31 are for internal use */ +#define GF_CRITICAL_SECTION_HW 0x00000001 +/** RM internal use */ +#define GF_CRITICAL_SECTION_SW2 0x00000004 +/** RM internal use */ +#define GF_CRITICAL_SECTION_SW4 0x00000010 +/** I2C critical section */ +#define GF_CRITICAL_SECTION_I2C 0x00000020 +/** RM All channel lock, internal use */ +#define GF_CRITICAL_SECTION_ALL_CHANNELS 0x00000040 + +/** Ix internal use */ +#define GF_CRITICAL_SECTION_SW8 0x00000100 + +/** RM DSP to Host communication, internal use */ +#define GF_CRITICAL_SECTION_D2H 0x00000200 + +/** The SHUTDOWN_DSP lock protects the race between + * UpdateDSPFreq/DSPDisable and HandleInterrupt (IST). + * (Update and DSPDisable turn off the DSP, HandleInt reads + * DSP regs) + */ +#define GF_CRITICAL_SECTION_SHUTDOWN_DSP 0x00000400 +/** The DSP lock protects the race between + * AddTask and RemoveTask. + */ +#define GF_CRITICAL_SECTION_DSP 0x00000401 + +/** Define the ID for the kernel semaphore */ +#define GF_DSP_KERNEL_SEM_ID 0x0CAFEFAD + +/** Shared memory lock - used for internal purposes */ +#define GF_CRITICAL_SECTION_SHM 0x00000800 + +/** RM Host to DSP communication, internal use */ +#define GF_CRITICAL_SECTION_H2D 0x00001000 + +/** Rm internal use: lock for channel structures */ +#define GF_CRITICAL_SECTION_CHSTRUCT 0x00004000 + +/** Dx internal use */ +#define GF_CRITICAL_SECTION_DX 0x00008000 + +/** Vx internal use */ +#define GF_CRITICAL_SECTION_VX 0x00000080 + +#ifdef PROJECT_SEC_G1 +/** JxDec internal use */ +#define GF_CRITICAL_SECTION_JXDEC 0x00002000 +#endif + +/** Rm internal use: lock for DSP messages */ +#define GF_CRITICAL_SECTION_DSPMSG_MIN 0x00010000 +#define GF_CRITICAL_SECTION_DSPMSG_MAX 0x20000000 + +/** Audio Shared Memory lock - used for multiprocess OS */ +#define GF_CRITICAL_SECTION_SWAUDIO 0x10002000 + +/** Maximiun id */ +#define GF_CRITICAL_SECTION_SWMAX 0x00010000 + +/** OS IRQ Callback */ +typedef void (* GFRMOSIRQCALLBACK)( void *pData ); + +struct _GFRMCOMMONSTRUCT; +struct _GFRMENVIRONMENTVARIABLES; +struct _GFRMEXTDATASTRUCT; + +/** Definition of Ix powerplane operations + */ +typedef enum _GFIX_POWERPLANE_OP_TYPE + { + GFIX_POWERPLANE_OP_ENABLE = 0, + GFIX_POWERPLANE_OP_DISABLE, + GFIX_POWERPLANE_OP_QUERY +} GFIX_POWERPLANE_OP_TYPE; + +/** Configuration structure that may be passed to GFRmOpen(). + See GFRmOpen() for details. +*/ +typedef struct _GFRMOPENSTRUCT +{ + NvU32 isFirstProcess; + NvU32 isDeviceMapped; + GF_RETTYPE retStatus; //!< Return error reason code, in case GFRmOpen() fails + + /** Declare which driver HW or NULL driver to use. + This is for GFSDK compiled for NULL driver case. + */ + NvU32 useDriver; +} GFRMOPENSTRUCT; + +/** @name Interface Manager Returned Functions +@{*/ + +/** Write a 32-bit register in the device. + + @param base I/O base address + @param offset Offset of register + @param data Data to write + */ +typedef void (*GF_FUNC_WRITE_32BIT)(void * base, NvU32 offset, NvU32 data); + +/** Read a 32-bit register in the device. + + @param base I/O base address + @param offset Offset of register + + @retval #NvU32 register value + */ +typedef NvU32 (*GF_FUNC_READ_32BIT)(void * base, NvU32 offset); + +/*@}*/ + +/** Interface Options for Read/Write Embedded FIFO (for Jx/Mx APIs) */ +#define GF_EMBFIFO_SWAP_BYTE 0x00000001 +#define GF_EMBFIFO_SWAP_WORD 0x00000002 + +/** Interface FIFO flags */ +/** Front-End FIFO */ +#define GF_FIFO_FEND 0x00000001 +/** GE (2D/Primary) FIFO */ +#define GF_FIFO_SRC 0x00000002 + +/** Interface Helper macro to generate Address Pointer */ +#define GFMAKEADDR(base, offset) (void *)base, offset + +/** Utility Debug Flag */ +#define GF_DEBUG_DEFAULT 0 + +/** 4th argument for GFRmOSGetTickCount */ +#define GF_USEC_TICKS 0 +#define GF_MSEC_TICKS 1 +#define GF_SEC_TICKS 2 + +/** Flags for the Context manager GF_CTX_DEFAULT, GF_CTX_NEW */ +#define GF_CTX_DEFAULT 1 +#define GF_CTX_NEW 2 +#define GF_CTX_SHARED 3 + +/* + ######################################################################## + * Function Prototypes for GFSDK Resource Manager (RM) Services + ######################################################################## + */ + +/* Object Manager */ + +/** GFRmOpen - Starts Resource Manager and GFSDK. + + @param RmOpenHandle Must be NULL. + @return Resource manager handle, or NULL on failure. + + This must be called prior using any GFSDK component APIs and RM services. + This function can be called multiple times, for each successfull call + the application must also call GFRmClose(). + + If this function fails, and a pointer to an open structure is passed in + \a RmOpenHandle, the a failure reasoncode will be returned in GF_OPEN_RETTYPE::retStatus. +*/ +GFRmHandle GFRmOpen(GFRMOPENSTRUCT *RmOpenHandle); + +/** GFRmClose - Ends Resource Manager and GFSDK. + + @param pRmHandle Ptr to RmHandle to be closed. + @retval GF_RETTYPE #GF_SUCCESS if successful.
      + #GF_ERROR on error.
      + + All GFSDK resources will be freed related to this process. + Calls to GFRmOpen are reference counted, GFDSK will be closed only for + the last call to this function. + */ +void GFRmClose(GFRmHandle *pRmHandle); + +/** GFRmCleanUp - Frees resources allocated to a terminated Resource Manager session. + + @param RmProcessID RM Process ID to clean up after. + @retval GF_RETTYPE #GF_SUCCESS if successful.
      + #GF_ERROR on error.
      + + All GFSDK resources will be freed related to this + process. + */ +GF_RETTYPE +GFRmCleanUp( GFRmHandle RmHandle, NvU32 RmProcessID ); + +// FIXME: ripped off from the API doc. GFRmRecover is not implemented as of +// yet - there's null implementation in GFRmObj.c. +/** GFRmRecover - Handles ESD failures. + + @param RmHandle The handle to the Resource Manager. + @param option + @retval GF_RETTYPE #GF_SUCCESS if successful.
      + #GF_ERROR on error.
      + + This function is used to recover from an ESD (electrostatic discharge) + failure. If the system software finds that the GoForce processor is not + responding, the software uses the CPU GPIO to reset the GoForce processor + and then calls this function. GFRmRecover() only calls Recover() + functions of registered components. For example, the GFDxAPI and GFGxAPI + have registered Recover() functions that can bring the GoForce processor + back from the reset to normal working mode. + */ +GF_RETTYPE +GFRmRecover( GFRmHandle RmHandle, NvU32 option ); + +/** GFRmGetProperty - Returns properties of RM. + + @param pRmProp Caller passes ptr to GFPROPERTY that will be filled + upon return. + + @retval #GF_SUCCESS if successful. + */ +GF_RETTYPE +GFRmGetProperty( GFRmHandle RmHandle, + GFPROPERTY *pRmProp ); + +/** GFRmSetAttribute - Sets RM attribute. + + @param AttribType Attribute to get of type #GF_ATTRIBUTE_TYPE. + @param AttribData Data specific to AttribType. + + @retval #GF_SUCCESS if successful. + */ +GF_RETTYPE +GFRmSetAttribute(GFRmHandle RmHandle, + GF_ATTRIBUTE_TYPE AttribType, + NvU32 AttribData); + +/** GFRmGetAttribute - Gets RM attribute. + + @param AttribType Attribute to get of type #GF_ATTRIBUTE_TYPE. + @param AttribData Data specific to AttribType. + See GF_ATTRIBUTE_TYPE for interpretation. + May pass input and/or output parameters. + + @retval #GF_SUCCESS if successful. + */ +GF_RETTYPE +GFRmGetAttribute(GFRmHandle RmHandle, + GF_ATTRIBUTE_TYPE AttribType, + NvU32 *pAttribData); + +/** Claim or release a hardware resource. + + The GoForce GPU has a few hardware engines which are used by + different component API. If a component API is using that hardware + engine, then other API component should not be allowed to use that + engine. For example we have MPEG Decoder engine in the hardware which + is used by GFMxDecAPI and GFJxDecAPI components. If one of the API is + using MPEGD Engine and app/system software tries to use other engines, + it should not be allowed. + For SC4/SC5/SC10/SC12 GPU, we have following constraints: + GFMxDecAPI MPEGD, optional Auto Trigger SB + GFJxDecAPI MPEGD, optional Auto Trigger SB + Both of these component API share same engine so we should only allow + one component to be opened at a time. + + GFMxEncAPI MPEGE, EPP (planar converter) + GFJxEncAPI JPEGE, EPP (planar converter) + Both of these component API share same fron-end planar converter so we + should only allow one component to be opened. + + StetchBlt is represented by VxBlt(). SB has one context where auto + trigger SB can be set. Manual SB command uses same context for manual + command and then restores the auto context. + There is no need to check for manual VxBlt(). + Autotrigger need checking but it is difficult to check in the VxBlt() + function. + + This function only deals with Component level constraints. + Constraint checking can be enabled if GF_ATTRIB_HW_RESOURCE_CONSTRAINT. + + @param RmHandle Handle to the resource manager. + @param options Action code + @param hwEngineReq Flag bitmask specifying 0 or more HW engines, see @ref HardwareResources + + @retval GF_SUCCESS Hardware resource is available. + @retval GFRM_ERROR_HWRESOURCE_NOT_AVAILABLE Hardware resource is not available. + @retval GFRM_ERROR_BAD_PARAMETER Bad parameters passed +*/ +GF_RETTYPE +GFRmHwResourceConstraint( GFRmHandle RmHandle, + GF_HRC_OPTIONS options, + NvU32 hwEngineReq ); + +/* Context Manager */ + +/** GFRmContextGet - Retrieves either a default or new context. + + @param RmHandle Handle to the resource manager. + @param flags #GF_CTX_DEFAULT or #GF_CTX_NEW + @param pContext Pointer to the retreived context. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + */ +GF_RETTYPE +GFRmContextGet( GFRmHandle RmHandle, + NvU32 flags, + GFRmChHandle *pContext); + +/** GFRmChFree - Free a channel (same thing as a context). + + @param hRm Resource manager handle. + @param phCh Pointer to the channel handle. + + @see GFRmContextGet + */ +void GFRmChFree(GFRmHandle hRm, GFRmChHandle *phCh); + + +/* Component Manager */ + +/** GFRmComponentRegister - Register Component with Resource Manager + + @param pComponent Ptr to component to be registerd. + @param RegisterState Parameter of type GF_STATE_TYPE. + Usually, GF_STATE_REGISTER is passed. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + + */ +GF_RETTYPE +GFRmComponentRegister( GFRmHandle RmHandle, + GFRMCOMPONENT *pComponent, + GF_STATE_TYPE RegisterState ); + +/** GFRmComponentGet - Gets a registered component, associated with the passed + context. + + @param ComponentType Desired component type. + @param state Parameter of type #GF_STATE_TYPE. + @param pComponent Ptr to Handle to component available. + NULL if not available. + @param hCh Context Handle. Can be allocated by a call to + #GFRmContextGet function. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + + Depending on the requested state, a newly instantiated component or + a shared component is returned. GF_STATE_DEFAULT is the default option + for the state parameter. If the hCh passed is NULL, then a default + context is associalted with the component. + + */ +GF_RETTYPE +GFRmComponentGet(GFRmHandle hRm, + NvU32 ComponentType, + GF_HANDLE *pComponent, + GF_STATE_TYPE state, + GFRmChHandle hCh); + +/** GFRmComponentRelease - Releases the specified component handle. + + @param hRm Handle to the resource manager. + @param phComponent Pointer to component handle to be released. + + The handle pointed to by phComponent will be cleared to NULL as a side + effect of calling this function. Also, this function has no effect if + the handle pointed to by phComponent is already NULL, so it is not + necessary to check whether a component handle is NULL before releasing it. + */ +void GFRmComponentRelease(GFRmHandle hRm, GF_HANDLE *phComponent); + +/* Surface Manager */ + +/** GFRmSurfaceAlloc - Allocate a Surface without synchronization. + + @param pSurfaceReq Pointer to surface request structure #GFRMSURFACEREQUEST. + @param ppSurface Pointer to surface pointer. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + @retval #GF_OUT_OF_MEMORY when low on memory. + */ +GF_RETTYPE +GFRmSurfaceAlloc( GFRmHandle RmHandle, + GFRMSURFACEREQUEST *pSurfaceReq, + PGFRMSURFACE *ppSurface ); + +/** GFRmSurfaceFree - Frees an allocated surface. + + @param ppSurface Pointer to surface pointer. + + *ppSurface is cleared to NULL. + */ +void +GFRmSurfaceFree(GFRmHandle hRm, + PGFRMSURFACE *ppSurface); + +/** GFRmSurfaceQueryPrimaryInfo - Make a query on Primary Surface. + + @param ppSurface Pointer to Primary surface pointer. + @param pRotate Ptr to current Rotation orientation. + @retval GF_RETTYPE #GF_SUCCESS on success. + #GF_ERROR on error. + + Returned surface pointer is for quick reference only and is a + pointer to transient structure. In other words, this will not + increment the reference count as GFRmSurfaceAlloc does. + */ +GF_RETTYPE +GFRmSurfaceQueryPrimaryInfo( GFRmHandle RmHandle, + PGFRMSURFACE *ppSurface, + NvU32 *pRotate, + NvU32 subSurfaceType ); + +/** Update surface attributes. + + @param ppSurface Pointer to Primary surface pointer. + @param type Type of attribute to update: + + + + +
      #GF_SURFACE_UPDATE_ROTATESet surface rotation
      #GF_SURFACE_UPDATE_WIDTH Set surface width
      #GF_SURFACE_UPDATE_HEIGHTSet surface height
      + @param data Data specific to the type. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + + Currently only one update flag is defined #GF_SURFACE_UPDATE_ROTATE + + */ +GF_RETTYPE +GFRmSurfaceUpdate( GFRmHandle RmHandle, + PGFRMSURFACE pSurface, + NvU32 type, + NvU32 data ); + +/* Memory Manager */ + +/** Allocate a linear piece of internal memory block. + + @param pMemoryReq Pointer to Memory Request struct #GFRMMEMORYREQUEST. + @param pMemHandle A Pointer to the memory handle. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + */ +GF_RETTYPE +GFRmMemHandleAlloc(GFRmHandle RmHandle, + GFRMMEMORYREQUEST *pMemoryReq, + GFRmMemHandle *pMemHandle ); + +/** Frees an allocated internal memory block. + + @param phMem A Pointer to the memory handle. + */ +void +GFRmMemHandleFree(GFRmHandle hRm, + GFRmMemHandle *phMem); + +/** Current memory info. Only supports embedded memory. + + @param pTotalFree Pointer to NvU32 holding total free memoory available. + @param flag Type of memory. Can be one the + #GF_MEMORY_EMBEDDED + #GF_MEMORY_EMBEDDED_EXT + #GF_MEMORY_EMBEDDED_INT + @param pMaxChunk Size of the max chunk. + + @retval #GF_SUCCESS on success. + @retval #GF_ERROR on error. + + GF_MEMORY_EMBEDDED returns the free memory available in both internal + and external memory. + */ +GF_RETTYPE +GFRmMemInfo (GFRmHandle RmHandle, + NvU32 *pTotalFree, + NvU32 *pMaxChunk, + NvU32 flag ); + + +/** Get an handle for the entire internal memory. Used for debugging purposes + only. +*/ +GFRmMemHandle GFRmMemGetIntMemHandle(GFRmHandle RmHandle); + +/** Get an handle for the entire external memory. Used for debugging purposes + only. +*/ +GFRmMemHandle GFRmMemGetExtMemHandle(GFRmHandle RmHandle); + +/** Handle to offset(sc15 view of hw address) conversion. + */ +NvU32 GFRmMemGetOffset(GFRmMemHandle hMem); + +/** Handle to DSP offset(DSP address address map) conversion. + */ +NvU32 GFRmMemGetDSPOffset(GFRmMemHandle hMem); + +/** Handle to virtual address conversion. + + Returned pointer cannot be dereferenced excpet in direct + addressing mode. + */ +void *GFRmMemGetPointer(GFRmMemHandle hMem); + +/** Get the DSP address with a particular caching attribute for a given memory + handle. + */ +NvU32 GFRmMemGetUncachedDSPAddr(GFRmMemHandle hMem); +NvU32 GFRmMemGetWriteBackDSPAddr(GFRmMemHandle hMem); +NvU32 GFRmMemGetWriteThroughDSPAddr(GFRmMemHandle hMem); + +/** Memory Handle reverse lookup from offset. + + This can be used only for the embedded memory. + */ +GF_RETTYPE +GFRmMemOffsetToHandle(GFRmHandle RmHandle, NvU32 offset, GFRmMemHandle *MemHandle); + +/** Converts offset to virtual address. + + @param offset Hardware offset as seen by the SCxx chip. + @param ppMemory Pointer to Virtual address. + + */ +GF_RETTYPE +GFRmMemOffsetToVirt(GFRmHandle RmHandle, NvU32 offset, void **ppMemory); + +/** Converts virtual to offset (SCxx hw view) + + @param offset Hardware offset SCxx view. + @param ppMemory Virtual address. + */ +GF_RETTYPE +GFRmMemVirtToOffset(GFRmHandle RmHandle, void *ppMemory, NvU32 *offset); + +/** Test if the memory offset is from external memory. + + Returns NV_TRUE if the offset is comming from + external memory, otherwise NV_FALSE. + */ +NvBool +GFRmIsExternalMemoryOffset(GFRmHandle RmHandle, + NvU32 offset); + +/** Test if the memory handle is from external memory. + + Returns NV_TRUE if the handle is comming from + external memory, otherwise NV_FALSE. + */ +NvBool +GFRmIsExternalMemoryHandle(GFRmHandle RmHandle, + GFRmMemHandle memhandle); + +/** Test if the memory offset is valid. + @return NV_TRUE if valid, or NV_FALSE otherwise. + */ +NvBool GFRmIsMemoryOffsetValid(GFRmHandle hRm, NvU32 Offset); + +/** Test for bufferoverflows in allocated GPU memory. + This does nothing for release builds. In GFSDK debug build + each GPU memory block will be guarded by leading and trailing + 8 byte marker sequences: + 
      +    Start of block: 0x0D,0xF0,0xAD,0xDE,0x0D,0xF0,0xAD,0xDE
+    End   of block: 0xDE,0xAD,0xFO,0xOD,0xDE,0xAD,0xFO,0xOD
+
      + This call checks if these guard markers have been overwritten + @return Index of corrupted memory block, or -1 if all are ok. +*/ +int GFRmMemEmbVerify(GFRmHandle RmHandle); + +/* CPU bound memory fill functions: + These functions will use CPU cycles to write 16 to 32-bit fixed data + pattern into GPU memory. These API's will use user specified channel + apperture to access memory directly and are equipped with Lock and Unlock + routines to be thread safe. +*/ + +/** Fill memory with fixed data pattern on a particular channel. + Function locks and unlocks the channel automatically. + @param ChHandle User-specified channel to use. + @param memHandle GPU memory handle to write fixed 32-bit data. + @param offset Byte offset relative to memHandle block, + must be 32-bit aligned. + @param fill 32-bit fixed data pattern. + @param words Number of DWORDs to write. +*/ +void +GFRmChMemFill32(GFRmChHandle ChHandle, GFRmMemHandle memHandle, NvU32 offset, + NvU32 fill, NvU32 words); + +/** Fill memory with fixed data pattern on a particular channel. + Function locks and unlocks the channel automatically. + @param ChHandle User-specified channel to use. + @param memHandle GPU memory handle to write fixed 16-bit data. + @param offset Byte offset relative to memHandle block, + must be 32-bit aligned. + @param fill 16-bit fixed data pattern. + @param words Number of DWORDs to write. +*/ +void +GFRmChMemFill16(GFRmChHandle ChHandle, GFRmMemHandle memHandle, NvU32 offset, + NvU16 fill, NvU32 words); + +/** Save/Restore functions - These functions Save embedded memory to system memory. + * This memory can then be restored back to sys mem when required. These functions + * are used during DeepPowerDown. + */ +GF_RETTYPE GFRmSaveMemory(GFRmHandle pRm, + void *sysMemPtr, + NvU32 memSize); + +GF_RETTYPE GFRmRestoreMemory(GFRmHandle pRm, + void *sysMemPtr, + NvU32 memSize); + +/* Linear video memory functions: + + These functions are used for transferring system memory to video memory, + filling video memory, and video memory to video memory operations. These + set of functions use the "1d" engine in hardware. All operations use + channels and will be synchronized with other commands. Optionally each + operation can be passed a flag to insert a "clear/raise/wait" sequence + which will guarantee that the operation has completed before processing + more commands in the command stream. For example, if a texture is being + downloaded, it is useful that the download be complete prior to some other + engine (3d maybe) using this memory. + + Prior to using functions, the 1d engine must be enabled. Disabling + will cause the channel passed in to be idled. This is required by hardware + so that the command processors state can be updated when the 1d engine + has its clock disabled and put into reset. + +*/ + + +/** Callback prototype for GFRmChLinearSetDMACallback(). */ +typedef void (*GF_FUNC_DMA_CALLBACK)(void *dstAddr, void *srcAddr, NvU32 lengthInWords); + +/** Setup an DMA callback for downloading data to SRAM. + * + * This function allows for the user to to setup a DMA callback when + * downloading code to the frame buffer. + * + * The callback function should return AFTER all data has been transferred to + * the device. The downloader writes all data to the framebuffer through + * the registered frame buffer window. This window is 4KBytes in length, + * so there will be a callback once for each 4Kbytes (or less to handle alignment + * constraints). + * + * Also, it is possible for downloads to be occuring on multiple channels + * concurrently, which means that this Callback function must be able to + * handle calls from different threads, and do whatever arbitration is required. + * + * For indirect addressing modes, inside the GFSDK a semaphore will be taken + * and held for the duration of this transaction, as multiple threads cannot + * access the device concurrently when using an indirect addressing model. + * + * @param ChHandle The channel that will be used for the download (channel aperture is used) + * @param dmaCallback Pointer to the callback function that is called to do the download + */ +GF_RETTYPE +GFRmChLinearSetDMACallback(GFRmChHandle ChHandle, + GF_FUNC_DMA_CALLBACK dmaCallback); + +/** Flag for GFRmChLinearSysToVidMemcpy(): use a clear/raise/wait. */ +#define GF_RM_LINEAR_USE_CRW 0x01 + +/** Flag for GFRmChLinearSysToVidMemcpy(): don't synchronize with channel's pushbuffer. */ +#define GF_RM_LINEAR_NO_PB_SYNC 0x02 + +/** Enable 1D engine for GFRmChLinear* functions. + * + * Call before using any GFRmChLinear* function. This enables the hardware that is + * used for these functions. Internally there is a reference count, so it is safe + * to call this multiple times. + * + * @param ChHandle Any valid channel handle should work. + * @see GFRmChLinearDisable() + */ + +GF_RETTYPE +GFRmChLinearEnable(GFRmChHandle ChHandle); + + +/** Disable 1D engine for GFRmChLinear* functions. + * + * When the internal reference count reaches zero, the accelerator's clocks will be turned + * off to save power + * + * @param ChHandle Any valid channel should work. + * @see GFRmChLinearEnable() + */ + +GF_RETTYPE +GFRmChLinearDisable(GFRmChHandle ChHandle); + + + +/** Downloads a system memory buffer to the GPU memory buffer. + * + * The main reason for using this is that + * the copy to video memory is serialized with other operations. A typical use would be something + * like: 3d-driver issues draw commands that use a texture. 3d-driver issues a clear/raise/wait to + * know when draw is complete. 3d-driver issues a download to update the texture. + * + * @param pCtx : Current context (channel) + * @param memHandle : Handle returned from the memory allocator + * @param dstOffset : Offset from the beginning of the block referenced in memHandle + * @param pSrc : Source memory address in system memory + * @param len : Length in bytes to copy + * @param flags : Flags to optionally modify copy behavior + * + * flags can be one of: + * + * GF_RM_LINEAR_USE_CRW -- use a clear/raise/wait to make the operation finish prior to other command + * in the command stream being executed. + * GF_RM_LINEAR_NO_PB_SYNC -- This means the download does not need to be synchronous with the pushbuffer + * and the RM can optionally use different more efficient path + * than the pushbuffer. + * + * @return Returns GF_SUCCESS on success + */ +GF_RETTYPE +GFRmChLinearSysToVidMemcpy(GFRmChHandle pCtx, + GFRmMemHandle memHandle, + NvU32 dstOffset, + void *srcPtr, + NvU32 bytes, + NvU32 flags); + +/** Fills a region of GPU memory with a constant value, by memory handle. + * + * @param ctx Current context (or channel) + * @param memHandle Handle to the memory to fill + * @param dstOffset Offset inside the memory handle + * @param data32 The value being replicated in memory. This value is + * interpreted differently depending on the align parameter. + * if align==4 all of data32 is used + * if align==2 lower 16-bits of data32 is used + * if align==1 lower 8-bits of data32 is used + * + * @param bytes Number of bytes to fill + * @param align must 1,2,4 + * @param flags Can be 0 or GF_RM_LINEAR_USE_CRW + */ +GF_RETTYPE +GFRmChLinearVidMemFill(GFRmChHandle ctx, + GFRmMemHandle memHandle, + NvU32 dstOffset, + NvU32 data32, + NvU32 bytes, + NvU32 align, + NvU32 flags); + +/** Copies memory within GPU memory, by memory handle. + * + * @param ctx The channel handle + * @param dstMemHandle memory handle returned from memalloc + * @param dstOffset Offset from the beginning of dstMemHandle + * @param srcMemhandle memory handle of the src memory + * @param srcOffset Offset from the beginning of srcMemHandle + * @param bytes Number of bytes to be copied. + * @param flags Must be 0 or GF_RM_LINEAR_USE_CRW + * + */ +GF_RETTYPE +GFRmChLinearVidMemcpy(GFRmChHandle ctx, + GFRmMemHandle dstMemHandle, + NvU32 dstOffset, + GFRmMemHandle srcMemHandle, + NvU32 srcOffset, + NvU32 bytes, + NvU32 flags); + + +/** @name OS Manager +@{*/ + +/** Enter Critical section, extended version. + @param id GF_CRITICAL_SECTION_xxx + */ +void GFRmOSEnterCSExt(GFRmHandle hRm, NvU32 id); + +/** Exit Critical section, extended version. + @param id GF_CRITICAL_SECTION_xxx + */ +void GFRmOSExitCSExt(GFRmHandle hRm, NvU32 id); + +/** Enter Hardware Access Critical section. + */ +void GFRmOSEnterCS(GFRmHandle hRm); + +/** Exit Hardware Access Critical section. + */ +void GFRmOSExitCS(GFRmHandle hRm); + +/** Waits for some number of milliseconds. + @param msec Number of milliseconds to wait. + */ +void GFRmOSWaitMSec(NvU32 msec); + +/** Get the current OS tick counter. + @return Low 32 bits of millisecond counter. +*/ +NvU32 GFRmGetTickCountMSec(void); + +/** Get the current OS tick counter. + + NOTE: This function is NOT guaranteed to exist on all + platforms. Drivers should NOT call this function; it's + meant only for benchmarking. + + @return 64 bit microsecond counter. + */ +NvU64 GFRmGetTickCountUSec(void); + +/** Waits for a keypress with a timeout, and returns the key. + + @param timeOutMSec (NvU32) Milliseconds to wait for the keypress. + @retval (int) The code for the key, or zero if we timed out. + */ +int GFRmWaitKey(NvU32 timeOutMSec); + +/*@}*/ + +/** @name Read/Write functions + + We provide APIs to read and write GPU registers and memory, independent of + which bus addressing mode is in use (direct or indirect, 16 or 32). + + WARNING: These functions are not safe in all cases. + 1. They do not take into account handshake mode. With fixed timings it may + be unsafe, for example, to use GFRmMemRd/Wr32 to access external memory. + 2. They do not take into account limitations on the # of address bits. On + some direct addressing platforms, not all the address bits are wired up, + so it is impossible to directly access all of memory. For example, it + may be unsafe to use GFRmMemRd/Wr32 to access external memory. + 3. Some buses do not have full byte enable support. It is possible that + GFRmMemWr08, for example, may clobber the other byte in the word. + + It is believed that the first two pitfalls only apply to external memory. + You can probably use these APIs safely to access internal memory, subject to + caveat (3) (i.e. you should stick to 16-bit or 32-bit writes). For external + memory, "use at your own risk." + +@{*/ + +/** Read or write an 8-, 16-, or 32-bit register in the device. */ +NvU8 GFRmRegRd08(GFRmHandle hRm, NvU32 offset); +NvU16 GFRmRegRd16(GFRmHandle hRm, NvU32 offset); +NvU32 GFRmRegRd32(GFRmHandle hRm, NvU32 offset); +void GFRmRegWr08(GFRmHandle hRm, NvU32 offset, NvU8 data); +void GFRmRegWr16(GFRmHandle hRm, NvU32 offset, NvU16 data); +void GFRmRegWr32(GFRmHandle hRm, NvU32 offset, NvU32 data); + +/** Read or write 8, 16, or 32 bits of data to a given offset in a block of memory. + Offset is relative to the memory handle AND not the absolute one. + */ +NvU8 GFRmMemRd08(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset); +NvU16 GFRmMemRd16(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset); +NvU32 GFRmMemRd32(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset); +void GFRmMemWr08(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, NvU8 data); +void GFRmMemWr16(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, NvU16 data); +void GFRmMemWr32(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, NvU32 data); + +/** Read or write a region of a block of memory. Size is in bytes */ +void GFRmMemRead(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, + void *pDst, NvU32 size); +void GFRmMemWrite(GFRmHandle hRm, GFRmMemHandle hMem, NvU32 offset, + const void *pSrc, NvU32 size); + +/** Fill a block of memory with a given 8-, 16-, or 32-bit word. Size is in words, not bytes */ +void GFRmMemFill08(GFRmHandle hRm, GFRmMemHandle hMem, + NvU32 offset, NvU32 size, NvU8 data); +void GFRmMemFill16(GFRmHandle hRm, GFRmMemHandle hMem, + NvU32 offset, NvU32 size, NvU16 data); +void GFRmMemFill32(GFRmHandle hRm, GFRmMemHandle hMem, + NvU32 offset, NvU32 size, NvU32 data); + +/** Write to a FIFO in the chip. */ +void GFRmFifoWrite(GFRmHandle hRm, const void *srcPtr, + NvU32 dstOffset, NvU32 sizeIn32bits); + +/** Waits for the host to idle. + + @retval GF_SUCCESS on success + @retval GF_ERROR on error +*/ +GF_RETTYPE +GFRmWaitForHostIdle( GFRmHandle RmHandle ); + +/*@}*/ + +/** Dispatch DSP2Host messages. + + This function can be called from an IST in response to the DSP2Host + interrupt. It will perform the following sequence: + + - read the DSP2Host message from the DSP2Host registers, i.e. GFRmGetMessage() + - identify DSP task from the task ID in message parameter 0 + - add the message to that task's queue + - set an event registered with that task to notify it about the new message + - clear DSP2Host interrupt register, i.e. GFRmClearDspCommInterrupt() + + If the task ID from the message is unknown, the interrupt is still cleared, + but the message is ignored. + + @param ChHandle Channel to use, should be the protected channel (GF_PROTECTED_CHANNEL) + @return Returns the DSP task ID the received message belonged to, or 0 if unknown +*/ +NvU32 GFRmDispatchMessage(GFRmChHandle ChHandle); +NvU32 GFRmDispatchMessageDual(GFRmChHandle ChHandle, NvU32 dspModule); + +/** Descriptor for circular buffer in DSP memory. + This structure is intended for shared use between DSP tasks. + + If GF_RM_DSP_CBUFFER::wr == GF_RM_DSP_CBUFFER::rd, the circular buffer is empty. + If GF_RM_DSP_CBUFFER::wr != GF_RM_DSP_CBUFFER::rd, the buffer contains + (wr>=rd)?wr-rd:size+wr-rd bytes of data, starting at offset rd, wrapping on the buffer end. +*/ +typedef struct _GFRM_DSP_CIRCBUFFER +{ + NvU8* adr; //!< buffer address, DSP address space in GPU memory + NvU32 size; //!< Buffer size in bytes + NvU32 wr; //!< Current write offset relative to buffer address + NvU32 rd; //!< Current read offset relative to buffer address + NvU32 userData[4]; //!< User defined, specific depending on usage + +} GF_RM_DSP_CIRCBUFFER; + + +/* + * Pins that can be used as GPIOs once the corresponding module + * has been enabled + */ +typedef enum { + + /* SD PINS */ + GPIO_SD_PIN_DATA0 = 1, + GPIO_SD_PIN_DATA1, + GPIO_SD_PIN_DATA2, + GPIO_SD_PIN_DATA3, + GPIO_SD_PIN_CLK, + GPIO_SD_PIN_CMD, + GPIO_SD_PIN_SDGP0, + GPIO_SD_PIN_SDGP1, + + /* VI PINS */ + GPIO_VI_PIN_VD0, + GPIO_VI_PIN_VD1, + GPIO_VI_PIN_VD2, + GPIO_VI_PIN_VD3, + GPIO_VI_PIN_VD4, + GPIO_VI_PIN_VD5, + GPIO_VI_PIN_VD6, + GPIO_VI_PIN_VD7, + GPIO_VI_PIN_VD8, + GPIO_VI_PIN_VD9, + GPIO_VI_PIN_VD10, + GPIO_VI_PIN_VD11, + GPIO_VI_PIN_VSCK, + GPIO_VI_PIN_VHS, + GPIO_VI_PIN_VVS, + GPIO_VI_PIN_VGP0, + GPIO_VI_PIN_VGP1, + GPIO_VI_PIN_VGP2, + GPIO_VI_PIN_VGP3, + GPIO_VI_PIN_VGP4, + GPIO_VI_PIN_VGP5, + GPIO_VI_PIN_VGP6 + +} GFGPIOPin; + +/* + * I/O options for pins + */ +typedef enum { + GPIO_OPTION_DISABLE = 1, + GPIO_OPTION_INPUT, + GPIO_OPTION_OUTPUT +} GFGPIOOption; + +/* + * Enable/Disable I/O for GPIOS + */ +typedef enum { + GPIO_MODE_DISABLE = 1, + GPIO_MODE_ENABLE +} GFGPIOMode; + +/* + * Pin groups whose selects are tied together + */ +typedef enum { + GPIO_SD_PINGRP_D0_CLK_CMD = 1, + GPIO_SD_PINGRP_D1_D2 +} GFGPIOPinGrp; + +/* + * Pin select for GPIOS + */ +typedef enum { + GPIO_SELECT_GPIO = 1, + GPIO_SELECT_FUNC +} GFGPIOSelect; + +/** + * + * Sets all the pins of a specific module to GPIO mode + * + * @param RmHandle Handle specific to the GFRm + * @param modid Module + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIOEnable(GFRmHandle RmHandle, eGFModuleIDs modid); + +/** + * Initializes the GPIO API + * + * + * @param RmHandle Handle specific to the GFRm + * @param modid Module + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIODisable(GFRmHandle RmHandle, eGFModuleIDs modid); + +/** + * + * Modifies the pin's input/output modes + * + * @param ChHandle Channel to write to modules through + * @param pin Pin to set + * @param options One of GPIO_OPTION_DISABLE (ignores mode), + * GPIO_OPTION_INPUT, GPIO_OPTION_OUTPUT + * @param mode One of GPIO_MODE_ENABLE, GPIO_MODE_DISABLE + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIOSetPinMode(GFRmChHandle ChHandle, GFGPIOPin pin, GFGPIOOption option, GFGPIOMode mode); + +/** + * + * Sets a particular pin's output select + * + * @param ChHandle Channel to write to modules through + * @param pin Pin to set + * @param select One of GPIO_SELECT_GPIO, GPIO_SELECT_FUNC + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIOSetPinSelect(GFRmChHandle ChHandle, GFGPIOPin pin, GFGPIOSelect select); + +/** + * + * Sets a particular pin group's output select + * + * @param ChHandle Channel to write to modules through + * @param group Pin group to set + * @param select One of GPIO_SELECT_GPIO, GPIO_SELECT_FUNC + * + * @return GF_SUCCESS on success + * + */ +GF_RETTYPE +GFRmGPIOSetPinGrpSelect(GFRmChHandle ChHandle, GFGPIOPinGrp group, GFGPIOSelect select); + +/** + * + * Sets the status (high/low) of a pin + * + * @param ChHandle Channel to write to modules through + * @param pin Pin to set + * @param value Value to write to pin + * + */ +void +GFRmGPIOSetPin(GFRmChHandle ChHandle, GFGPIOPin pin, NvU8 value); + +/** + * Gets the status (high/low) of a pin + * + * @param ChHandle Channel to write to modules through + * @param pin Pin to set + * + * @return Status (high/low) of pin + * + */ +NvU32 +GFRmGPIOGetPin(GFRmChHandle ChHandle, GFGPIOPin pin); + +/** @ name Bootflags + List of flags inidicating all the devices which are booted +@{*/ + +/** Chip is initalized in other words IxInit is called */ +#define GFRM_BOOT_IXINIT 0x1 + +/** Display is initalized */ +#define GFRM_BOOT_DXINIT 0x2 + +/*@}*/ + +/** + * Writes to some scratch register with a log of all the components which are + * initalized. GFRM_BOOT_* are passed as bootflags. + */ +GF_RETTYPE GFRmBootPostInit(GFRmHandle hRm, NvU32 bootflags); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/*@}*/ + +/** @page pageRmAppNotes RmAPI Application Notes + + @section pageRmAppNotes1 Todo + +*/ + +#endif /* __GFRM_H__ */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmError.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmError.h new file mode 100755 index 00000000..7295b9f2 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmError.h @@ -0,0 +1,68 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFRmError.h + GFSDK Resource Manager API error code header file. +*/ + +#ifndef __GFRMERROR_H__ +#define __GFRMERROR_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** GFRM error code: Function not supported. */ +#define GFRM_ERROR_NO_SUPPORT (GFRM_ERROR | 0x02) +/** GFRM error code: Out of memory. */ +#define GFRM_ERROR_OUT_MEMORY (GFRM_ERROR | 0x03) +/** GFRM error code: Operation on primary surface, but primary surface not set. */ +#define GFRM_ERROR_NO_PRIMARY_SURFACE (GFRM_ERROR | 0x04) +/** GFRM error code: Bad parameters. */ +#define GFRM_ERROR_BAD_PARAMETER (GFRM_ERROR | 0x05) +/** GFRM error code: Out of memory in DSP XRM heap. */ +#define GFRM_ERROR_XRM_OUTMEMORY (GFRM_ERROR | 0x06) +/** GFRM error code: GFRM memory manager is not initialized. */ +#define GFRM_ERROR_MEM_MANAGER_NOT_INITIALIZED (GFRM_ERROR | 0x07) +/** GFRM error code: DSP2Host message queue overflow. */ +#define GFRM_ERROR_QUEUE_OVERFLOW (GFRM_ERROR | 0x08) +/** GFRM error code: DSP2Host message queue empty (not an error). */ +#define GFRM_ERROR_QUEUE_EMPTY (GFRM_ERROR | 0x09) +/** GFRM error code: DSP2Host message with unknown task ID received. */ +#define GFRM_ERROR_QUEUE_UNKNOWNTASK (GFRM_ERROR | 0x0A) +/** GFRM error code: Error getting GPU base address. */ +#define GFRM_ERROR_IXOPEN_GETADDRESS (GFRM_ERROR | 0x0C) +/** GFRM error code: Error opening file. */ +#define GFRM_ERROR_FILE_OPEN_FAILED (GFRM_ERROR | 0x0D) +/** GFRM error code: Cannot create XRM task. */ +#define GFRM_ERROR_XRM_CREATETASK (GFRM_ERROR | 0x0E) +/** GFRM error code: GFRmOSEventWait() failed. */ +#define GF_WAIT_ERROR (GFRM_ERROR | 0x0F) +/** GFRM error code: GFRmOSEventWait() timed out, the event was not set. */ +#define GF_WAIT_TIME_OUT (GFRM_ERROR | 0x10) +/** GFRM error code: RmEnableModule tried to enable a module that doesn't exist. */ +#define GFRM_ERROR_MODULE_NOT_EXIST (GFRM_ERROR | 0x11) +/** GFRM error code: HW Resource not available on GFRmHwResourceConstraint(). */ +#define GFRM_ERROR_HWRESOURCE_NOT_AVAILABLE (GFRM_ERROR | 0x12) +/** GFRM error code: Host2DSP task message queue overflow. */ +#define GFRM_ERROR_XRM_QUEUE_OVERFLOW (GFRM_ERROR | 0x13) +/** GFRM error code: Host2DSP task message queue empty. */ +#define GFRM_ERROR_XRM_QUEUE_EMPTY (GFRM_ERROR | 0x14) +/** GFRM error code: File not found */ +#define GFRM_ERROR_FILE_NOT_FOUND (GFRM_ERROR | 0x15) +/** GFRM error code: Create semaphore */ +#define GFRM_ERROR_CREATE_SEMAPHORE (GFRM_ERROR | 0x16) + +#ifdef __cplusplus +} +#endif + +#endif // __GFRMERROR_H__ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmHelp.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmHelp.h new file mode 100755 index 00000000..82c1fa5a --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmHelp.h @@ -0,0 +1,515 @@ +/* + * Copyright 2003 NVIDIA Corporation. All Rights Reserved. + * + * BY INSTALLING THE SOFTWARE THE USER AGREES TO THE TERMS BELOW. + * + * User agrees to use the software under carefully controlled conditions + * and to inform all employees and contractors who have access to the software + * that the source code of the software is confidential and proprietary + * information of NVIDIA and is licensed to user as such. User acknowledges + * and agrees that protection of the source code is essential and user shall + * retain the source code in strict confidence.User shall restrict access to + * the source code of the software to those employees and contractors of user + * who have agreed to be bound by a confidentiality obligation which + * incorporates the protections and restrictions substantially set forth + * herein, and who have a need to access the source code in order to carry out + * the business purpose between NVIDIA and user. The software provided + * herewith to user may only be used so long as the software is used solely + * with NVIDIA products and no other third party products (hardware or + * software). The software must carry the NVIDIA copyright notice shown + * above. User must not disclose, copy, duplicate, reproduce, modify, + * publicly display, create derivative works of the software other than as + * expressly authorized herein. User must not under any circumstances, + * distribute or in any way disseminate the information contained in the + * source code and/or the source code itself to third parties except as + * expressly agreed to by NVIDIA. In the event that user discovers any bugs + * in the software, such bugs must be reported to NVIDIA and any fixes may be + * inserted into the source code of the software by NVIDIA only. User shall + * not modify the source code of the software in any way. User shall be fully + * responsible for the conduct of all of its employees, contractors and + * representatives who may in any way violate these restrictions. + * + * NO WARRANTY + * THE ACCOMPANYING SOFTWARE (INCLUDING OBJECT AND SOURCE CODE) PROVIDED BY + * NVIDIA TO USER IS PROVIDED "AS IS." NVIDIA DISCLAIMS ALL WARRANTIES, + * EXPRESS, IMPLIED OR STATUTORY, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. + + * LIMITATION OF LIABILITY + * NVIDIA SHALL NOT BE LIABLE TO USER, USER’S CUSTOMERS, OR ANY OTHER PERSON + * OR ENTITY CLAIMING THROUGH OR UNDER USER FOR ANY LOSS OF PROFITS, INCOME, + * SAVINGS, OR ANY OTHER CONSEQUENTIAL, INCIDENTAL, SPECIAL, PUNITIVE, DIRECT + * OR INDIRECT DAMAGES (WHETHER IN AN ACTION IN CONTRACT, TORT OR BASED ON A + * WARRANTY), EVEN IF NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGES. THESE LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF THE + * ESSENTIAL PURPOSE OF ANY LIMITED REMEDY. IN NO EVENT SHALL NVIDIA’S + * AGGREGATE LIABILITY TO USER OR ANY OTHER PERSON OR ENTITY CLAIMING THROUGH + * OR UNDER USER EXCEED THE AMOUNT OF MONEY ACTUALLY PAID BY USER TO NVIDIA + * FOR THE SOFTWARE PROVIDED HEREWITH. + */ + +/* + * File: GFRmHelp.inl + * GFSDK Resource Manager Helper Manager inline header file. + * #### The helper functions are highly dependent on Operating System #### + * #### and Compiler. A number of these functions are macros that #### + * #### maps to corresonding operating system functions directly. #### + */ + +#ifndef __GFRMHelp_INL__ +#define __GFRMHelp_INL__ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/* Defined in GFRMHelp.c */ +extern int GFStricmp(char *, char *); +extern int GFStrincmp(char *, char *, int); + +extern void *GFMalloc(int); +extern void GFFree(void *ptr); + +#if NVOS_IS_WINDOWS_CE + +#ifndef __KERNEL__ +#include +#include +#endif // __KERNEL__ + +/* String Helper functions */ +#define GFStrcpy(p1, p2) strcpy(p1, p2) +#define GFStrncpy(p1, p2, p3) strncpy(p1, p2, p3) +#define GFStrcat(p1, p2) strcat(p1, p2) +#define GFStrncat(p1, p2, p3) strncat(p1, p2, p3) +#define GFStrlen(p1) strlen(p1) +#define GFStrchr(p1, p2) strchr(p1, p2) +#define GFStrcmp(p1, p2) strcmp(p1, p2) +#define GFStrncmp(p1, p2, p3) strncmp(p1, p2, p3) +#define GFStrtok(p1, p2) strtok(p1, p2) +#define GFStrstr(p1, p2) strstr(p1, p2) +#define GFSscanf(p1, p2, p3) sscanf(p1, p2, p3) +#define GFToupper(p1) toupper(p1) +#define GFTolower(p1) tolower(p1) +#define GFAtoi(p1) atoi(p1) + +// convert char string to wchar_t +// p1 = src string of type char +// p2 = dst string of type wchar_t +// p3 = size of dst string in wchar_t unit +#define GFStrConvert(p1, p2, p3) \ + MultiByteToWideChar(CP_ACP, 0, p1, -1, p2, p3); + +// convert wchar_t string to char +// p1 = src string of type wchar_t +// p2 = dst string of type char +// p3 = size of dst string in char unit +#define GFWStrConvert(p1, p2, p3) \ + WideCharToMultiByte(CP_ACP, 0, p1, -1, p2, p3, NULL, NULL) + +/* Standard Helper functions */ +#define GFStrtol(p1, p2, p3) strtol(p1, p2, p3) +#define GFStrtod(p1, p2) strtod(p1, p2) + +/* Memory Helper functions */ +#define GFMemcpy( p1, p2, p3 ) memcpy( p1, p2, p3 ) +#define GFMemmove( p1, p2, p3 ) memmove( p1, p2, p3 ) +#define GFMemcmp( p1, p2, p3 ) memcmp( p1, p2, p3 ) +#define GFMemset( p1, p2, p3 ) memset( p1, p2, p3 ) + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +/* Debug Helper functions */ +#if !defined(PROJECT_SEC_G1) || defined(DEBUG) +#define GFPrintf printf +#else +#define GFPrintf +#endif +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintfVAL vprintf + +#ifdef DEBUG +extern void RmDebugBreak(void); +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + RmDebugBreak(); \ + } +#endif + +#elif NVOS_IS_LINUX + +#ifndef __KERNEL__ +void RmDebugBreak(void); +#ifdef DEBUG +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + RmDebugBreak(); \ + } +#endif + +#include +#define GFToupper toupper +#define GFTolower tolower + +#include +#ifndef GF_XTENSA_RM_TASK +#include +#endif +#define GFMemcpy memcpy +#define GFMemmove memmove +#define GFMemset memset +#define GFMemcmp memcmp +#define GFStrchr strchr +#define GFStrcmp strcmp +#define GFStrcpy strcpy +#define GFStrncpy strncpy +#define GFStrlen strlen +#define GFStrcat strcat +#define GFStrncmp strncmp +#define GFStrtok strtok +#define GFStrstr strstr +#define GFSscanf sscanf + +#include +#define GFPrintf printf +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintf printf +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintfVAL vprintf + +#include +#define GFStrtol strtol +#define GFStrtod strtod +#define GFAtoi atoi +#include + +/* Add or overload RMCTrace function here */ +#if defined(GF_ENABLE_RMC_TRACE) +#include +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#else /* kernel mode */ + +#include +#include + +#include +#define GFToupper toupper +#define GFTolower tolower + +#include +#define GFMemcpy memcpy +#define GFMemmove memmove +#define GFMemset memset +#define GFStrcpy strcpy +#define GFStrncpy strncpy +#define GFStrlen strlen +#define GFMemcmp memcmp +#define GFStrcmp strcmp +#define GFStrncmp strncmp +#define GFStrcat strcat +#define GFStrncat strncat + +#define GFStrstr strstr +#define GFSscanf sscanf + +#define GFPrintf printk +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintfVAL vprintf +#define GFAtoi atoi + +#if defined(GF_ENABLE_RMC_TRACE) +#include +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#endif /* KERNEL */ + +#elif NVOS_IS_WINDOWS + +#include +#include +#include +#include + +/* String functions */ +#define GFStrcpy(p1, p2) strcpy(p1, p2) +#define GFStrncpy(p1, p2, p3) strncpy(p1, p2, p3) +#define GFStrcat(p1, p2) strcat(p1, p2) +#define GFStrncat(p1, p2, p3) strncat(p1, p2, p3) +#define GFStrstr(p1, p2) strstr(p1, p2) +#define GFSscanf(p1, p2, p3) sscanf(p1, p2, p3) +#define GFStrlen(p1) strlen(p1) +#define GFStrchr(p1, p2) strchr(p1, p2) +#define GFStrcmp(p1, p2) strcmp(p1, p2) +#define GFStrncmp(p1, p2, p3) strncmp(p1, p2, p3) +#define GFStrtok(p1, p2) strtok(p1, p2) +#define GFToupper(p1) toupper(p1) +#define GFTolower(p1) tolower(p1) +#define GFStrConvert(p1, p2, p3) \ + strcpy(p2,p1) +// MultiByteToWideChar( CP_ACP, 0, p1, -1, p2, p3 ); + // convert char string to Wide + // p1 = src string of type char + // p2 = dst string of type wchar_t + // p3 = size of dst string in wchar_t unit + +/* Standard Helper functions */ +#define GFStrtol(p1, p2, p3) strtol(p1, p2, p3) +#define GFStrtod(p1, p2) strtod(p1, p2) + +/* Memory Helper functions */ +#define GFMemcpy( p1, p2, p3 ) memcpy( p1, p2, p3 ) +#define GFMemmove( p1, p2, p3 ) memmove( p1, p2, p3 ) +#define GFMemcmp( p1, p2, p3 ) memcmp( p1, p2, p3 ) +#define GFMemset( p1, p2, p3 ) memset( p1, p2, p3 ) + +#define GFAtoi( p1 ) atoi( p1 ) +/* Debug Helper functions */ +#if !defined(PROJECT_SEC_G1) || defined(DEBUG) +#define GFPrintf printf +#else +#define GFPrintf +#endif +#define GFSprintf sprintf +#define GFSprintfVAL vsprintf +#define GFPrintfVAL vprintf + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +void RmDebugBreak(void); +#ifdef DEBUG +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + RmDebugBreak(); \ + } +#endif + +// Operating system running on the Xtensa +#elif NVCPU_IS_XTENSA + +#include + +/* Memory Helper functions */ +#define GFMemcpy( p1, p2, p3 ) memcpy(p1, p2, p3) +#define GFMemset( p1, p2, p3 ) memset(p1, p2, p3) + +#define GFRMCTrace(a) +#define GFRMCVTrace(a) + +#else + +#include +#include +#include +#include +#include + +/* String functions */ +extern char GFToupper(char); +extern char GFTolower(char); + +extern int GFAtoi(const char *); + +extern void *GFMemcpy(void *, const void *, int); +extern void *GFMemmove(void *, const void *, int); +extern void *GFMemset(void *, int, int); +extern int GFMemcmp(void *, void *, int); + +extern char *GFStrcpy(char *, const char *); +extern char *GFStrncpy(char *, const char *, int); + +extern char *GFStrcat(char *, const char *); +extern char *GFStrncat(char *, const char *, int); + +extern int GFStrlen(const char *); + +extern char *GFStrchr(const char *,int); +extern char *GFStrrchr(const char *,int); + +extern int GFStrcmp(const char *, const char *); +extern int GFStrncmp(const char *, const char *, int); + +extern char *GFStrstr(const char * string1, const char * string2); +extern int GFSscanf(char * string1, const char * string2, ...); + +extern char *GFStrtok(char *, const char *); + +extern long GFStrtol(const char *, char **, int); +extern double GFStrtod(const char *, char **); + +extern int GFPrintf(const char *, ... ); +extern int GFSprintf(char * , const char *, ... ); +extern int GFSprintfVAL(char *, const char *, va_list); +extern int GFPrintfVAL(const char *, va_list); + +#define GFStrConvert(p1, p2, p3) GFStrncpy(p1, p2, p3) + +#if defined(GF_ENABLE_RMC_TRACE) +#define GFRMCTrace(a) printf a +#define GFRMCVTrace(a) vprintf a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#ifdef DEBUG +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + } +#endif + +#endif /* GF_OS */ + +/* Virtual Key Mappings for Specific OS */ +#if NVOS_IS_LINUX +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 65 +#define GF_VKEY_LEFT 68 +#define GF_VKEY_RIGHT 67 +#define GF_VKEY_DOWN 66 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#elif NVOS_IS_WINDOWS_CE + +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 72 +#define GF_VKEY_LEFT 75 +#define GF_VKEY_RIGHT 77 +#define GF_VKEY_DOWN 80 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#elif NVOS_IS_WINDOWS +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 72 +#define GF_VKEY_LEFT 75 +#define GF_VKEY_RIGHT 77 +#define GF_VKEY_DOWN 80 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#else + +/* Virtual Keys */ +#define GF_VKEY_BACK 2 +#define GF_VKEY_FORWARD 3 +#define GF_VKEY_UP 4 +#define GF_VKEY_LEFT 5 +#define GF_VKEY_RIGHT 6 +#define GF_VKEY_DOWN 7 +#define GF_VKEY_SEND 8 +#define GF_VKEY_END 9 +#define GF_VKEY_0 10 +#define GF_VKEY_1 11 +#define GF_VKEY_2 12 +#define GF_VKEY_3 13 +#define GF_VKEY_4 14 +#define GF_VKEY_5 15 +#define GF_VKEY_6 16 +#define GF_VKEY_7 17 +#define GF_VKEY_8 18 +#define GF_VKEY_9 19 +#define GF_VKEY_STAR 20 +#define GF_VKEY_POUND 21 + +#endif /* GF_OS */ + +#ifndef GFDEBUG_ASSERT +#define GFDEBUG_ASSERT(x) do {} while (0) +#endif /* GFDEBUG_ASSERT */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFRMHelp_INL__ */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmHelp.inl b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmHelp.inl new file mode 100755 index 00000000..4612fce2 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmHelp.inl @@ -0,0 +1,626 @@ +/* + * Copyright 2003 NVIDIA Corporation. All Rights Reserved. + * + * BY INSTALLING THE SOFTWARE THE USER AGREES TO THE TERMS BELOW. + * + * User agrees to use the software under carefully controlled conditions + * and to inform all employees and contractors who have access to the software + * that the source code of the software is confidential and proprietary + * information of NVIDIA and is licensed to user as such. User acknowledges + * and agrees that protection of the source code is essential and user shall + * retain the source code in strict confidence. User shall restrict access to + * the source code of the software to those employees and contractors of user + * who have agreed to be bound by a confidentiality obligation which + * incorporates the protections and restrictions substantially set forth + * herein, and who have a need to access the source code in order to carry out + * the business purpose between NVIDIA and user. The software provided + * herewith to user may only be used so long as the software is used solely + * with NVIDIA products and no other third party products (hardware or + * software). The software must carry the NVIDIA copyright notice shown + * above. User must not disclose, copy, duplicate, reproduce, modify, + * publicly display, create derivative works of the software other than as + * expressly authorized herein. User must not under any circumstances, + * distribute or in any way disseminate the information contained in the + * source code and/or the source code itself to third parties except as + * expressly agreed to by NVIDIA. In the event that user discovers any bugs + * in the software, such bugs must be reported to NVIDIA and any fixes may be + * inserted into the source code of the software by NVIDIA only. User shall + * not modify the source code of the software in any way. User shall be fully + * responsible for the conduct of all of its employees, contractors and + * representatives who may in any way violate these restrictions. + * + * NO WARRANTY + * THE ACCOMPANYING SOFTWARE (INCLUDING OBJECT AND SOURCE CODE) PROVIDED BY + * NVIDIA TO USER IS PROVIDED "AS IS." NVIDIA DISCLAIMS ALL WARRANTIES, + * EXPRESS, IMPLIED OR STATUTORY, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. + + * LIMITATION OF LIABILITY + * NVIDIA SHALL NOT BE LIABLE TO USER, USER’S CUSTOMERS, OR ANY OTHER PERSON + * OR ENTITY CLAIMING THROUGH OR UNDER USER FOR ANY LOSS OF PROFITS, INCOME, + * SAVINGS, OR ANY OTHER CONSEQUENTIAL, INCIDENTAL, SPECIAL, PUNITIVE, DIRECT + * OR INDIRECT DAMAGES (WHETHER IN AN ACTION IN CONTRACT, TORT OR BASED ON A + * WARRANTY), EVEN IF NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGES. THESE LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF THE + * ESSENTIAL PURPOSE OF ANY LIMITED REMEDY. IN NO EVENT SHALL NVIDIA’S + * AGGREGATE LIABILITY TO USER OR ANY OTHER PERSON OR ENTITY CLAIMING THROUGH + * OR UNDER USER EXCEED THE AMOUNT OF MONEY ACTUALLY PAID BY USER TO NVIDIA + * FOR THE SOFTWARE PROVIDED HEREWITH. + */ + +/* + * File: GFRmHelp.inl + * GFSDK Resource Manager Helper Manager inline header file. + * #### The helper functions are highly dependent on Operating System #### + * #### and Compiler. A number of these functions are macros that #### + * #### maps to corresonding operating system functions directly. #### + */ + +#ifndef __GFRMHelp_INL__ +#define __GFRMHelp_INL__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/* + * Define the macro GFRMHELP_IMPORTFUNC to import the helper functions + * referenced in GFSDK. Typically Target OS provides definitions for these + * functions. Sample definitions are provided in file RMHelpGeneric.c. + */ + +#if defined(GFRMHELP_ABSTRACTION) +extern char GFAToupper(char); +extern char GFATolower(char); + +extern void *GFMalloc(int); +extern void GFFree(void *ptr); + +extern void *GFMemcpy(void *, const void *, int); +extern void *GFMemmove(void *, const void *, int); +extern void *GFMemset(void *, int, int); +extern int GFMemcmp(void *, void *, int); + +extern char *GFAStrcpy(char *, const char *); +extern char *GFAStrncpy(char *, const char *, int); + +extern char *GFAStrcat(char *, const char *); +extern char *GFAStrncat(char *, const char *, int); + +extern char *GFAStrstr(const char * string1, const char * string2); +extern int GFASscanf(char * string1, const char * string2, ...); + +extern int GFAStrlen(const char *); + +extern char *GFAStrchr(const char *,int); + +extern int GFAStrcmp(const char *, const char *); +extern int GFAStrncmp(const char *, const char *, int); + +extern char *GFAStrtok(char *, const char *); + +extern long GFAStrtol(const char *, char **, int); +extern double GFAStrtod(const char *, char **); + +extern int GFAPrintf(const char *, ... ); + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +#define GFRMCTrace(a) GFRmRMCTrace a +#else +#define GFRMCTrace(a) +#endif + +#else + +/* Defined in GFRMHelp.c */ +extern int GFAStricmp(char *, char *); +extern int GFAStrincmp(char *, char *, int); + + +#if defined(NV_WINDOWS_CE) + +#ifndef __KERNEL__ +#include +#include +#include +#endif // __KERNEL__ + +/* String Helper functions */ +#define GFAStrcpy(p1, p2) strcpy(p1, p2) +#define GFAStrncpy(p1, p2, p3) strncpy(p1, p2, p3) +#define GFAStrcat(p1, p2) strcat(p1, p2) +#define GFAStrncat(p1, p2, p3) strncat(p1, p2, p3) +#define GFAStrlen(p1) strlen(p1) +#define GFAStrchr(p1, p2) strchr(p1, p2) +#define GFAStrcmp(p1, p2) strcmp(p1, p2) +#define GFAStrncmp(p1, p2, p3) strncmp(p1, p2, p3) +#define GFAStrtok(p1, p2) strtok(p1, p2) +#define GFAStrstr(p1, p2) strstr(p1, p2) +#define GFASscanf(p1, p2, p3) sscanf(p1, p2, p3) +#define GFAToupper(p1) toupper(p1) +#define GFATolower(p1) tolower(p1) +#define GFAAtoi(p1) atoi(p1) + +// convert char string to wchar_t +// p1 = src string of type char +// p2 = dst string of type wchar_t +// p3 = size of dst string in wchar_t unit +#define GFAStrConvert(p1, p2, p3) \ + MultiByteToWideChar(CP_ACP, 0, p1, -1, p2, p3); + +// convert wchar_t string to char +// p1 = src string of type wchar_t +// p2 = dst string of type char +// p3 = size of dst string in char unit +#define GFWStrConvert(p1, p2, p3) \ + WideCharToMultiByte(CP_ACP, 0, p1, -1, p2, p3, NULL, NULL) + +/* Standard Helper functions */ +#define GFAStrtol(p1, p2, p3) strtol(p1, p2, p3) +#define GFAStrtod(p1, p2) strtod(p1, p2) + +/* Memory Helper functions */ +#define GFMalloc( p1 ) malloc( p1 ) +#define GFFree( p1 ) free( p1 ) +#define GFMemcpy( p1, p2, p3 ) memcpy( p1, p2, p3 ) +#define GFMemmove( p1, p2, p3 ) memmove( p1, p2, p3 ) +#define GFMemcmp( p1, p2, p3 ) memcmp( p1, p2, p3 ) +#define GFMemset( p1, p2, p3 ) memset( p1, p2, p3 ) + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +/* Debug Helper functions */ +#define GFAPrintf printf +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintfVAL vprintf + +#ifdef DEBUG +extern void RmDebugBreak(void); +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + RmDebugBreak(); \ + } +#endif + +#elif defined(NV_LINUX) + +#ifndef __KERNEL__ +#ifdef DEBUG +#include +#define GFDEBUG_ASSERT(x) assert(x) +#endif + + +#define __declspec(x) + +#include +#define GFMalloc malloc +#define GFFree free + +#include +#define GFAToupper toupper +#define GFATolower tolower + +#include +#ifndef GF_XTENSA_RM_TASK +#include +#endif +#define GFMemcpy memcpy +#define GFMemmove memmove +#define GFMemset memset +#define GFMemcmp memcmp +#define GFAStrcmp strcmp +#define GFAStrcpy strcpy +#define GFAStrncpy strncpy +#define GFAStrlen strlen +#define GFAStrcat strcat +#define GFAStrncmp strncmp +#define GFAStrtok strtok +#define GFAStrstr strstr +#define GFASscanf sscanf + +#include +#define GFAPrintf printf +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintf printf +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintfVAL vprintf + +#include +#define GFAStrtol strtol +#define GFAStrtod strtod +#define GFAAtoi atoi +#include + +/* Add or overload RMCTrace function here */ +#if defined(GF_ENABLE_RMC_TRACE) +#include +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#else /* kernel mode */ + +#include +#include +#define GFMalloc(x) kmalloc((x), GFP_KERNEL) +#define GFFree kfree + +#include +#define GFAToupper toupper +#define GFATolower tolower + +#include +#define GFMemcpy memcpy +#define GFMemmove memmove +#define GFMemset memset +#define GFAStrcpy strcpy +#define GFAStrncpy strncpy +#define GFAStrlen strlen +#define GFMemcmp memcmp +#define GFAStrcmp strcmp +#define GFAStrncmp strncmp +#define GFAStrcat strcat +#define GFAStrncat strncat + +#define GFAStrstr strstr +#define GFASscanf sscanf + +#define GFAPrintf printk +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintfVAL vprintf +#define GFAAtoi atoi + +#if defined(GF_ENABLE_RMC_TRACE) +#include +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#endif /* KERNEL */ + +#elif defined(NV_WINDOWS) + +#include +#include +#include +#include +#include +#include + +/* String functions */ +#define GFAStrcpy(p1, p2) strcpy(p1, p2) +#define GFAStrncpy(p1, p2, p3) strncpy(p1, p2, p3) +#define GFAStrcat(p1, p2) strcat(p1, p2) +#define GFAStrncat(p1, p2, p3) strncat(p1, p2, p3) +#define GFAStrstr(p1, p2) strstr(p1, p2) +#define GFASscanf(p1, p2, p3) sscanf(p1, p2, p3) +#define GFAStrlen(p1) strlen(p1) +#define GFAStrchr(p1, p2) strchr(p1, p2) +#define GFAStrcmp(p1, p2) strcmp(p1, p2) +#define GFAStrncmp(p1, p2, p3) strncmp(p1, p2, p3) +#define GFAStrtok(p1, p2) strtok(p1, p2) +#define GFAToupper(p1) toupper(p1) +#define GFATolower(p1) tolower(p1) +#define GFAStrConvert(p1, p2, p3) \ + strcpy(p2,p1) +// MultiByteToWideChar( CP_ACP, 0, p1, -1, p2, p3 ); + // convert char string to Wide + // p1 = src string of type char + // p2 = dst string of type wchar_t + // p3 = size of dst string in wchar_t unit + +/* Standard Helper functions */ +#define GFAStrtol(p1, p2, p3) strtol(p1, p2, p3) +#define GFAStrtod(p1, p2) strtod(p1, p2) + +/* Memory Helper functions */ +#define GFMalloc( p1 ) malloc( p1 ) +#define GFFree( p1 ) free( p1 ) +#define GFMemcpy( p1, p2, p3 ) memcpy( p1, p2, p3 ) +#define GFMemmove( p1, p2, p3 ) memmove( p1, p2, p3 ) +#define GFMemcmp( p1, p2, p3 ) memcmp( p1, p2, p3 ) +#define GFMemset( p1, p2, p3 ) memset( p1, p2, p3 ) + +#define GFAAtoi( p1 ) atoi( p1 ) +/* Debug Helper functions */ +#define GFAPrintf printf +#define GFASprintf sprintf +#define GFASprintfVAL vsprintf +#define GFAPrintfVAL vprintf + +#if defined(GF_ENABLE_RMC_TRACE) +void GFRmRMCTrace(const char *printf_format, ...); +void GFRmRMCVTrace(const char *printf_format, va_list ap); +#define GFRMCTrace(a) GFRmRMCTrace a +#define GFRMCVTrace(a) GFRmRMCVTrace a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#ifdef DEBUG +#include "assert.h" +#define GFDEBUG_ASSERT( x ) assert( x ) +#endif + +// Operating system running on the Xtensa +#elif defined(NVCPU_XTENSA) + +#include + +#define GFAAtoi(p1) +/* String functions */ +#define GFAStrcpy(p1, p2) strcpy(p1, p2) +#define GFAStrncpy(p1, p2, p3) +#define GFAStrcat(p1, p2) +#define GFAStrncat(p1, p2, p3) +#define GFAStrlen(p1) +#define GFAStrchr(p1, p2) +#define GFAStrcmp(p1, p2) +#define GFAStrncmp(p1, p2, p3) + +#define GFAStrstr(p1, p2) +#define GFASscanf(p1, p2, p3) + +#define GFAStrncmp(p1, p2, p3) +#define GFAStrtok(p1, p2) +#define GFAToupper(p1) +#define GFATolower(p1) +#define GFAStrConvert(p1, p2, p3) +#define GFAAtoi(p1) + +/* Standard Helper functions */ +#define GFAStrtol(p1, p2, p3) +#define GFAStrtod(p1, p2) + +/* Memory Helper functions */ +#define GFMalloc( p1 ) +#define GFFree( p1 ) +#define GFMemcpy( p1, p2, p3 ) memcpy(p1, p2, p3) +#define GFMemmove( p1, p2, p3 ) memmove(p1, p2, p3) +#define GFMemcmp( p1, p2, p3 ) memcmp(p1, p2, p3) +#define GFMemset( p1, p2, p3 ) memset(p1, p2, p3) + +/* Debug Helper functions */ +#define GFAPrintf +#define GFASprintf +#define GFASprintfVAL +#define GFAPrintfVAL + +#define GFRMCTrace(a) +#define GFRMCVTrace(a) + +#else + +#include +#include +#include +#include +#include + +/* String functions */ +extern char GFAToupper(char); +extern char GFATolower(char); + +extern int GFAAtoi(const char *); +//#define GFMalloc( p1 ) malloc( p1 ) +//#define GFFree( p1 ) free( p1 ) +extern void *GFMalloc(int); +extern void GFFree(void *); + +extern void *GFMemcpy(void *, const void *, int); +extern void *GFMemmove(void *, const void *, int); +extern void *GFMemset(void *, int, int); +extern int GFMemcmp(void *, void *, int); + +extern char *GFAStrcpy(char *, const char *); +extern char *GFAStrncpy(char *, const char *, int); + +extern char *GFAStrcat(char *, const char *); +extern char *GFAStrncat(char *, const char *, int); + +extern int GFAStrlen(const char *); + +extern char *GFAStrchr(const char *,int); +extern char *GFAStrrchr(const char *,int); + +extern int GFAStrcmp(const char *, const char *); +extern int GFAStrncmp(const char *, const char *, int); + +extern char *GFAStrstr(const char * string1, const char * string2); +extern int GFASscanf(char * string1, const char * string2, ...); + +extern char *GFAStrtok(char *, const char *); + +extern long GFAStrtol(const char *, char **, int); +extern double GFAStrtod(const char *, char **); + +extern int GFAPrintf(const char *, ... ); +extern int GFASprintf(char * , const char *, ... ); +extern int GFASprintfVAL(char *, const char *, va_list); +extern int GFAPrintfVAL(const char *, va_list); + +#define GFAStrConvert(p1, p2, p3) GFAStrncpy(p1, p2, p3) + +#if defined(GF_ENABLE_RMC_TRACE) +#define GFRMCTrace(a) printf a +#define GFRMCVTrace(a) vprintf a +#else +#define GFRMCTrace(a) +#define GFRMCVTrace(a) +#endif + +#ifdef DEBUG +#define GFDEBUG_ASSERT(x) if(!(x)) \ + { \ + GFPrintf(" Assert at Line no: %d in %s ", \ + __LINE__, __FILE__); \ + } +#endif + +#endif /* GF_OS */ + +#endif /* GFRMHELP_ABSTRACTION */ + + +#define GFStrcpy GFAStrcpy +#define GFStrncpy GFAStrncpy +#define GFStrcat GFAStrcat +#define GFStrncat GFAStrncat +#define GFStrlen GFAStrlen +#define GFStrchr GFAStrchr +#define GFStrrchr GFAStrrchr +#define GFStrstr GFAStrstr +#define GFStrcmp GFAStrcmp +#define GFStricmp GFAStricmp +#define GFStrincmp GFAStrincmp +#define GFStrncmp GFAStrncmp +#define GFStrtok GFAStrtok +#define GFToupper GFAToupper +#define GFTolower GFATolower +#define GFStrConvert GFAStrConvert +#define GFPrintf GFAPrintf +#define GFSprintf GFASprintf +#define GFSprintfVAL GFASprintfVAL +#define GFPrintfVAL GFAPrintfVAL +#define GFStrtol GFAStrtol +#define GFStrtod GFAStrtod +#define GFSscanf GFASscanf +#define GFAtoi GFAAtoi + + +/* Virtual Key Mappings for Specific OS */ +#if defined(NV_LINUX) +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 65 +#define GF_VKEY_LEFT 68 +#define GF_VKEY_RIGHT 67 +#define GF_VKEY_DOWN 66 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#elif defined(NV_WINDOWS_CE) + +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 72 +#define GF_VKEY_LEFT 75 +#define GF_VKEY_RIGHT 77 +#define GF_VKEY_DOWN 80 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#elif defined(NV_WINDOWS) +/* Virtual Keys */ +#define GF_VKEY_BACK 27 +#define GF_VKEY_FORWARD 13 +#define GF_VKEY_UP 72 +#define GF_VKEY_LEFT 75 +#define GF_VKEY_RIGHT 77 +#define GF_VKEY_DOWN 80 +#define GF_VKEY_SEND 46 +#define GF_VKEY_END 44 +#define GF_VKEY_0 48 +#define GF_VKEY_1 49 +#define GF_VKEY_2 50 +#define GF_VKEY_3 51 +#define GF_VKEY_4 52 +#define GF_VKEY_5 53 +#define GF_VKEY_6 54 +#define GF_VKEY_7 55 +#define GF_VKEY_8 56 +#define GF_VKEY_9 57 +#define GF_VKEY_STAR 42 +#define GF_VKEY_POUND 35 + +#else + +/* Virtual Keys */ +#define GF_VKEY_BACK 2 +#define GF_VKEY_FORWARD 3 +#define GF_VKEY_UP 4 +#define GF_VKEY_LEFT 5 +#define GF_VKEY_RIGHT 6 +#define GF_VKEY_DOWN 7 +#define GF_VKEY_SEND 8 +#define GF_VKEY_END 9 +#define GF_VKEY_0 10 +#define GF_VKEY_1 11 +#define GF_VKEY_2 12 +#define GF_VKEY_3 13 +#define GF_VKEY_4 14 +#define GF_VKEY_5 15 +#define GF_VKEY_6 16 +#define GF_VKEY_7 17 +#define GF_VKEY_8 18 +#define GF_VKEY_9 19 +#define GF_VKEY_STAR 20 +#define GF_VKEY_POUND 21 + +#endif /* GF_OS */ + +#ifndef GFDEBUG_ASSERT +#define GFDEBUG_ASSERT(x) do {} while (0) +#endif /* GFDEBUG_ASSERT */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFRMHelp_INL__ */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmIx.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmIx.h new file mode 100755 index 00000000..c2dddd0d --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmIx.h @@ -0,0 +1,654 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFRmIx.h + Chip Initialization API header file. +*/ + +#ifndef __GFRMIX_H__ +#define __GFRMIX_H__ + +#include "GFRm.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** @addtogroup groupRmIx Chip Initialization API +*/ +/*@{*/ + +/* GPIO configurations + * Host GPIO1~GPIO7 correspond to HGP0~HGP6, C32KHZ. + * When configured as output, it is necessay to select output as data or + * Clocks or interrupt. + * GFIX_GPIO_CFG_OUTPUT can Or with GFIX_GPIO_CFG_OUTPUT_SEL_* + */ + +/* Host GPIO type enum */ +typedef enum +{ + GFIX_GPIO0 = 0, + GFIX_GPIO1, + GFIX_GPIO2, + GFIX_GPIO3, + GFIX_GPIO4, + GFIX_GPIO5, + GFIX_GPIO6, + GFIX_GPIO7 +} GFIX_GPIO_TYPE; + +/* Host GPIO operations. */ +#define GFIX_GPIO_GET_INPUT_ENABLE 0x80000000UL +#define GFIX_GPIO_GET_OUT_PUT_ENABLE 0x40000000UL +#define GFIX_GPIO_SET_DATA 0x20000000UL +#define GFIX_GPIO_CLR_DATA 0x10000000UL +#define GFIX_GPIO_GET_DATA 0x08000000UL + +#define GFIX_GPIO_SET_INPUT_ENABLE 0x04000000UL +#define GFIX_GPIO_CLR_INPUT_ENABLE 0x02000000UL +#define GFIX_GPIO_SET_OUTPUT_ENABLE 0x01000000UL +#define GFIX_GPIO_CLR_OUTPUT_ENABLE 0x00800000UL + +/* + * GPIO output select data, configure the pin as data output. + * Meaningful for pin0~pin4(HGP0~HGP4) + */ + +#define GFIX_GPIO_CFG_OUTPUT_SEL_DATA 0x00000000 + +/* + * GPIO output select interrupt, configure the pin as interrupt output. + * Meaningful for pin3(HGP3) only + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_INTR 0x00000040 + +/* + * GPIO output select RDY signal + * Meaningful for pin4(HGP4) only + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_RDY 0x00000100 + +/* + * For pin5 and pin6(HGP5, HGP6), config output clock or data on HGP5 and HGP6. + * + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP56_CLK 0x00000800 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP56_DATA 0x00000000 + +/* + * For pin5(HGP5) + * select monitor clock to HGP5 + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP5_PLL1 0x00000000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP5_PLL2 0x00001000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP5_PLLCOSC 0x00002000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP5_PLLROSC 0x00003000 + +/* + * For pin6(HGP6) + * select monitor clock to HGP6 + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP6_PLL2 0x00000000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP6_DCFCLK 0x00004000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP6_MCCLK 0x00008000 +#define GFIX_GPIO_CFG_OUTPUT_SEL_HGP6_DSPCLK 0x0000C000 + +/* + * For pin7(C32KHZ) + */ +#define GFIX_GPIO_CFG_OUTPUT_SEL_C32KHZ 0x00000000 + +/* + * Definition of attribute ids for Set/GetAttributes() + */ +typedef enum _GFIX_ATTR_TYPE + { + GFIX_ATTR_NONE = 0, + GFIX_ATTR_DEVICE_INFO, + GFIX_ATTR_DEVICE_INFO_STRUCT, /* Get Device ID & Rev */ + GFIX_ATTR_EFUSE_PRODUCT_SKU_ID, + GFIX_ATTR_DRAM_SELF_REFRESH, + GFIX_ATTR_DRAM_DEEP_POWER_DOWN +} GFIX_ATTR_TYPE; + +/* + * Definition of module frequency types. + */ +typedef enum _GFIX_MODULEFREQ_TYPE + { + GFIX_MODULEFREQ_OPTIMAL = 0, + GFIX_MODULEFREQ_MINIMUM, + GFIX_MODULEFREQ_MAXIMUM, + GFIX_MODULEFREQ_REQUESTED, + GFIX_MODULEFREQ_ACTUAL +} GFIX_MODULEFREQ_TYPE; + +/* + * Definition of module operations. + */ +#define GFIX_DISABLECLOCK 0x00000001 +#define GFIX_ENABLECLOCK 0x00000002 +#define GFIX_SPECIAL 0x00000004 +#define GFIX_FORCEDISABLECLOCK 0x00000008 +#define GFIX_FORCEENABLECLOCK 0x00000010 +#define GFIX_DYNAMICSWITCH 0x00000020 + +#define GFIX_FORCEDISABLEMODULE 0x00010000 +#define GFIX_FORCEENABLEMODULE 0x00020000 + +/* + * Clock selections, profile and options + */ +enum +{ +#define GFRM_CLOCK(x, y) GFIX_##x, +#define GFRM_CLOCK_PLL(x, y) GFIX_##x, +#include "gfrm_clock_ids.h" +#undef GFRM_CLOCK +#undef GFRM_CLOCK_PLL + GFNUMOFCLOCKIDS +}; + +enum +{ +#define GFRM_CLOCK(x, y) (1 << GFIX_##x )| +#define GFRM_CLOCK_PLL(x, y) (1 << GFIX_##x )| + GFIX_ALL_CLOCKS = +#include "gfrm_clock_ids.h" + 0, // | 0 to GFIX_ALL_CLOCKS +#undef GFRM_CLOCK +#undef GFRM_CLOCK_PLL + +#define GFRM_CLOCK(x, y) (1 << GFIX_##x )| +#define GFRM_CLOCK_PLL(x, y) + GFIX_NO_PLLS = +#include "gfrm_clock_ids.h" + 0, // | 0 to GFIX_NO_PLLS +#undef GFRM_CLOCK +#undef GFRM_CLOCK_PLL + +#define GFRM_CLOCK(x, y) +#define GFRM_CLOCK_PLL(x, y) (1 << GFIX_##x )| + GFIX_ONLY_PLLS = +#include "gfrm_clock_ids.h" + 0, // | 0 to GFIX_NO_PLLS +#undef GFRM_CLOCK +#undef GFRM_CLOCK_PLL + + GFIX_N_CLOCKSOURCES = GFNUMOFCLOCKIDS, + GFIX_NO_CLOCK = 0xFFFFFFFF, + GFIX_PLL_QUERY = 0x80000000 +}; + +#define GFIX_POWER 0x00010000 +#define GFIX_PERFORMANCE 0x00020000 + +#define GFIX_DEFAULTSLK 0x00000000 +#define GFIX_HIGHESTSLK 0x00000001 + +/** Module clock profile */ +typedef struct _GFIXMODULECONFIG +{ + NvU8 clockSelection; /**< Selection mode */ + NvU32 minFrequency; /**< Lowest frequency allowed */ + NvU32 optimalFrequency; /**< Optimal frequency */ + NvU32 maxFrequency; /**< Max frequency */ + NvU32 sourceClocks; /**< Bitfield of valid source clocks */ +} GFIXMODULECONFIG, *PGFIXMODULECONFIG; + +/** Module state */ + typedef struct _GFIXMODULESTATE +{ + NvU32 clkRefCount; /**< Reference counter used in GFRmIxEnableModuleClock */ + NvU32 clkSelect; /**< Clock selected for module (only valid when clkRefCount is non-zero) */ + /**< If clkSelect==GFIX_NO_CLOCK no clock is selected by this module */ + NvU32 enableRefCount; /**< Reference counter used in GFRmIxEnableModule */ +} GFIXMODULESTATE, *PGFIXMODULESTATE; + + +/** typedef for callback when the module is disabled */ + +typedef GF_RETTYPE (*GF_FUNC_RMIX_CALLBACK)(void *handle); + +/** Initializes the chip + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFRmIxInit() is the first function which touches the hardware, there are no + hardware accesses before GFRmIxInit(). It initializes some module's clocks + and as well as taking some modules out of reset. It also initializes + device-control registers. + + @see GFRmIxDeInit() +*/ +GF_RETTYPE +GFRmIxInit( GFRmHandle RmHandle ); + +/** De-initializes the chip + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + GFRmIxDeInit() does the reverse of GFRmIxInit(), it shut downs the chip. + All modules are put back in reset and clocks turned off. + + @see GFRmIxInit() +*/ +GF_RETTYPE +GFRmIxDeInit( GFRmHandle RmHandle ); + +/** This function enables a module's clock + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param modid (#eGFModuleIDs) ID of the module + @param option (NvU32) Bit field of options, GFIX_ENABLECLOCK, + GFIX_DISABLECLOCK, GFIX_FORCEENABLECLOCK, + GFIX_FORCEDISABLECLOCK, GFIX_DYNAMICSWITCH, GFIX_SPECIAL + @param special (NvU32) Specifies a module specific setting, only used when + option contains GFIX_SPECIAL + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function enables and disables a module's clock as well as enables the + module's source clock. There are two types of enables, the normal enable + and the force enable. When doing a normal enable the module's clock enable + reference count is increased as well as a call to GFRmIxEnableClockSource() + which ensures the module's source clock is enabled. When doing a force + enable/disable the modules reference counter is not touched, + GFRmIxEnableClockSource() is called which increases/deceases the source's + reference count. If the operation is to enable and the clock is currently + disabled, for the both normal enable and force disable GFRmIxEnableModuleClock + will attempt to find the best clock source and divider for the module. + + Some modules support a dynamic clock divider, that is the clock doesn't have + to be turned off before reprogramming the divider. To switch a module's + frequency that supports dynamic dividers without first turning the module + off set option to GFIX_DYNAMICSWITCH. GFRmIxEnableModuleClock will attempt + to find the closest frequency to the desired without changing clock sources. + + Some modules have special clock configurations such as VI, GFIX_SPECIAL can + be specified along with GFIX_ENABLECLOCK or by itself to configure the special + option for the module. +*/ +GF_RETTYPE +GFRmIxEnableModuleClock( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 option, + NvU32 special ); + +/** Same as GFRmIxEnableModuleClock, but takes a callback + function which will be called when the refcount goes + to zero. + + @param func Callback funtion of type GFRmIxEnableModuleClock + @param arg used as an argument to when callback function is called. + + @see GFRmIxEnableModuleClock() +*/ +GF_RETTYPE +GFRmIxEnableModuleClockEx( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 option, + NvU32 special, + GF_FUNC_RMIX_CALLBACK func, + void *arg); + +/** Enables a module + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param modid (#eGFModuleIDs) ID of the module + @param option (NvU32) If option is nonzero the module will be enabled + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function takes a module out of reset. Each module has a reference + count which is used to keep track of how many outstanding enables the + module has. The module will not be disabled until the reference counter + is returned to zero. +*/ +GF_RETTYPE +GFRmIxEnableModule( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 option ); + +/** Same as GFRmIxEnableModule() but calls the passing in callback + function when the refcount of the module goes to zero. + + @param callback Callback function of type GF_FUNC_RMIX_CALLBACK + @param arg Argument passed to the callback function. + + @see GFRmIxEnableModule() +*/ +GF_RETTYPE +GFRmIxEnableModuleEx( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 option, + GF_FUNC_RMIX_CALLBACK callback, + void *arg + ); + +/** Changes frequency of a clock. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param option (NvU32) GFIX_PLL1, GFIX_PLL2, GFIX_ROSC, GFIX_OSC, + GFIX_REFCLK0, GFIX_REFCLK1 or GFIX_PLL_QUERY + @param pFrequency (NvU32*) Pointer to 32-bit value in KHz to get three + digit MHz precision. Returns with newly set + current frequency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GF_ERROR_BAD_PARAMETER Bad parameter passed + + This function sets a clock to a certain frequency. If the clock cannot meet + the requested frequency then the closest one will be chosen. For the PLLs + this function determines the closest dividers to arrive at the requested + frequency. To determine the frequency that will be chosen without actually + setting it GFIX_PLL_QUERY can be Or'ed along with the clock ID. + + Some clocks only have one frequency that never changes; this function must + still be called at least once to allow the internal logic to know what the + frequency of the clock is. To disable the selection of a clock by a module, + a clock can be disabled by setting its frequency to zero; this will remove + it from consideration for all modules. + + This function will fail if a module is already using the clock. + + @see GFRmIxGetFrequency() +*/ +GF_RETTYPE +GFRmIxSetFrequency( GFRmHandle RmHandle, + NvU32 option, + NvU32 *pFrequency ); + +/** Retrieves frequency of a clock. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param option (NvU32) GFIX_PLL1, GFIX_PLL2, GFIX_ROSC, GFIX_OSC, + GFIX_REFCLK0, GFIX_REFCLK1 + @param pFrequency (NvU32*) Pointer to 32-bit value in KHz to get three + digit MHz precision. Returns with currently + set frequency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GF_ERROR_BAD_PARAMETER Bad parameter passed + + @see GFRmIxSetFrequency() +*/ +GF_RETTYPE +GFRmIxGetFrequency( GFRmHandle RmHandle, + NvU32 option, + NvU32 *pFrequency ); + +/** Sets the requested frequency of the module. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param modid (#eGFModuleIDs) ID of the module + @param frequency (NvU32) 32-bit value in KHz to get three digit MHz + precision + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function sets the requested frequency of a module, this value must + lie between the minimum and maximum frequencies specified in + GFRmIxSetModuleConfig(). This value is cached and used when + GFRmIxEnableModuleClock() is called attempting to enable the clock to the + module. + + @see GFRmIxSetModuleConfig() +*/ +GF_RETTYPE +GFRmIxSetModuleFrequency( GFRmHandle RmHandle, + eGFModuleIDs modid, + NvU32 frequency ); + +/** This function is used to retrieve clock frequency information about a module. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param modid (#eGFModuleIDs) ID of the module + @param type (#GFIX_MODULEFREQ_TYPE) Type of frequency + @param pFrequency (NvU32*) Pointer to 32-bit value in KHz to get three digit + MHz precision. Returns with currently frequency. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +GF_RETTYPE +GFRmIxGetModuleFrequency( GFRmHandle RmHandle, + eGFModuleIDs modid, + GFIX_MODULEFREQ_TYPE type, + NvU32 *pFrequency ); + +/** This function enables and disables power plane(s). + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param ppID (NvU32) ID of power plane (More then one can be Or'ed to perform + operation in parallel) + @param operation (#GFIX_POWERPLANE_OP_TYPE) Operation to perform on the + power planes + @param states (NvU32*) Ptr to 32 bit value to store the resulting bit + field of a GFIX_POWERPLANE_OP_QUERY operation. + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GF_ERROR_BAD_PARAMETER Bad parameter passed + + This function enables and disables power plane(s), multiple power planes can + be disabled in one function call. There is two versions of this functions + specified with the compilation flag GF_EXTERNAL_POWERPLANE_LOGIC. If this + flag is set to 1 then all the power plane logic is done in the platform code, + if 0 then all the logic is done in Ix. + + When internal power plane logic is chosen, each power plane has a reference + count. If the power plane is to be enabled or disabled, GFRmIxPowerPlane() + will call out to RmPowerPlane(), which will perform platform specific enabling. +*/ +GF_RETTYPE +GFRmIxPowerPlane( GFRmHandle RmHandle, + NvU32 ppID, + GFIX_POWERPLANE_OP_TYPE operation, + NvU32 *states ); + +/** Enable and disables clock sources. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param clockid (NvU32) ID of the clock + @param state (NvU32) 0 for disable, 1 for enable + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function enables and disables a clock's source. A reference counter is + used to ensure the clock's source won't be disabled until there is a matching + number of enable and disable operations. If a clocks source is to be enabled + or disabled, GFRmIxEnableClockSource() will call out to RmEnableClockSource() + to do the platform specific enabling or disabling. +*/ +GF_RETTYPE +GFRmIxEnableClockSource( GFRmHandle RmHandle, + NvU32 clockid, + NvU32 state ); + +/** This function sets the list of reference clocks that a PLL may choose. + + @param RmHandle (#GFRmHandle) Handle specific to the GFRm + @param option (NvU32) GFIX_PLL1, GFIX_PLL2 + @param clocks (NvU32) Bitfield of clocks. (1< + 
      +                                                      0    -> audio structs can be locate anywhere, dspcore will be allocated anywhere (default)
+                                                      1    -> audio structs must be allocated in internal SRAM, dspcore will be allocated anywhere
+                                                      0xMM -> MM is a 8 bit wide bitmask: b'10XXYYZZ (i.e. 0x80 | b'XXYYZZ)
+
+                                                      XX controls allocation of dspcore DSP image (about 100 kB)
+                                                      YY to control allocation of GfSgl (about 90 kB, not required for encoding=ADTSINTERNAL)
+                                                      ZZ controls allocation of GfGlobalParameters struct (about 36 kB)
+
+                                                      bitmask meaning:
+                                                      b'00 no special requirement
+                                                      b'01 force internal SRAM
+                                                      b'10 force external SRAM
+                                                      b'11 unused
+
      + */ + + NvU32 AudioRecordEnable; //!< GFSDK_AUDIO_REC_ENABLE, Enable SC15 I2S Record, default : 0 + NvU32 AudioNoI2C; //!< Disable codec I2C access in GFAudioAPI + char I2SCodecInit[RM_ENV_MAXLEN]; //!< Codec init addr/data sequence comma delimited zero padded 32 bit hex values "xxxxxxxx,xxxxxxxx,..." up to 128 chars + char I2SCodecReset[RM_ENV_MAXLEN]; //!< Codec reset addr/data sequence comma delimited zero padded 32 bit hex values "xxxxxxxx,xxxxxxxx,..." up to 128 chars + //!< I2S "aaaaddrr" aaaa - i2s slave address, dd - 8 bit data, rr 7 bit i2s register + //!< AC97 "aaaadddd" aaaa - ac97 register address, dddd - 16 bit data value + NvU32 I2SCodecEnableSMCLK; + NvU32 SCInterfaceMode; + + NvU32 perfMode3D; // 3D perf mode. + NvU32 DxInitBypass; // This is used to tell DxSetDisplay() to initialize the + // software state without touching the hardware + NvU32 noDCPreLoadCtx; + NvU32 nulldriver2D; +#if NVOS_IS_WINDOWS_CE + NvU32 BackupMemory; +#endif + NvU32 IndirectAddrSet; +} GFRMENVIRONMENTVARIABLES, *PGFRMENVIRONMENTVARIABLES; + +/* Rm Public Services for platform only. May depend on GFPlat.h */ +enum +{ + RM_EXTDATA_INIT_TYPE = 0 +}; + +enum +{ + RM_EXTDATA_INIT_SCRIPT = 0, + RM_EXTDATA_RM_SCRIPT, + RM_EXTDATA_CAMERA_SCRIPT, + RM_EXTDATA_ENVVARS_SCRIPT, + RM_EXTDATA_DISPLAY_SCRIPT, + RM_EXTDATA_DISPLAY_SUB_SCRIPT, + RM_EXTDATA_AUTOCTRL_SCRIPT, + RM_EXTDATA_AVP_IMAGE_AUDIO_AVP1, + RM_EXTDATA_AVP_IMAGE_MP3_AVP1, + RM_EXTDATA_AVP_IMAGE_SBC_AVP1, + RM_EXTDATA_AVP_IMAGE_AAC_AVP1, + RM_EXTDATA_AVP_IMAGE_EAAC_AVP1, + RM_EXTDATA_AVP_IMAGE_AACLPSBR_AVP1, + RM_EXTDATA_AVP_IMAGE_AMRNB_AVP1, + RM_EXTDATA_AVP_IMAGE_AMRWB_AVP1, + RM_EXTDATA_AVP_IMAGE_WMA_AVP1, + RM_EXTDATA_AVP_IMAGE_AUDIO_AVP2, + RM_EXTDATA_AVP_IMAGE_MP3_AVP2, + RM_EXTDATA_AVP_IMAGE_SBC_AVP2, + RM_EXTDATA_AVP_IMAGE_AAC_AVP2, + RM_EXTDATA_AVP_IMAGE_EAAC_AVP2, + RM_EXTDATA_AVP_IMAGE_AACLPSBR_AVP2, + RM_EXTDATA_AVP_IMAGE_AMRNB_AVP2, + RM_EXTDATA_AVP_IMAGE_AMRWB_AVP2, + RM_EXTDATA_AVP_IMAGE_WMA_AVP2, + RM_EXTDATA_AVP_IMAGE_H264DEC_AVP1, + RM_EXTDATA_AVP_IMAGE_H264DEC_AVP2, + RM_EXTDATA_AVP_IMAGE_MP4DEC_AVP1, + RM_EXTDATA_AVP_IMAGE_MP4DEC_AVP2, + RM_EXTDATA_AVP_IMAGE_JPEGDEC_AVP1, + RM_EXTDATA_AVP_IMAGE_JPEGDEC_AVP2, + RM_EXTDATA_AVP_IMAGE_H264ENC_AVP1, + RM_EXTDATA_AVP_IMAGE_H264ENC_AVP2, + RM_EXTDATA_AVP_IMAGE_VC1DEC_AVP1, + RM_EXTDATA_AVP_IMAGE_VC1DEC_AVP2, + RM_EXTDATA_AVP_IMAGE_RV9DEC_AVP1, + RM_EXTDATA_AVP_IMAGE_RV9DEC_AVP2, + RM_EXTDATA_AVP_IMAGE_ISP3A_AE_AF_AVP1, + RM_EXTDATA_AVP_IMAGE_ISP3A_AWB_AVP1, + RM_EXTDATA_AVP_IMAGE_ISP3A_DVS_AVP1, + RM_EXTDATA_AVP_IMAGE_BEATNIK_AVP1, + RM_EXTDATA_AVP_IMAGE_BEATNIK_AVP2, + RM_EXTDATA_AVP_IMAGE_KERNEL_AVP1, + RM_EXTDATA_AVP_IMAGE_KERNEL_AVP2, + RM_EXTDATA_AVP_IMAGE_DSP_UNITTESTS, + RM_EXTDATA_AVP_IMAGE_TSDEM_AVP1, //!< SC15 version of GFMxDemTS DSP image + RM_EXTDATA_AVP_IMAGE_TSDEM_AVP2, //!< SC14 version of GFMxDemTS DSP image + RM_EXTDATA_AVP_IMAGE_ISP_AVP1 +}; + +enum +{ + RM_EXTDATA_FILE = 0, + RM_EXTDATA_FILE_WITH_SUBID, +}; + +#define DEFAULTSCRIPTNAME "default" + +#define RM_EXTDATA_READ 1 // Read in data +#define RM_EXTDATA_USEBUFFER 4 // RmAccessExternalData shouldn't handle + // allocation of buffer, the data is to + // be placed at the orginal buffer address +#define RM_EXTDATA_SIZE 8 // Query the size of the data +#define RM_EXTDATA_FILENAME 0x10 // return script file name +#define RM_EXTDATA_NAME 0x20 // return name of script without prefix and sub ID +#define RM_EXTDATA_IDLIST 0x40 // return array of script sub ID + +/* Fields in struct PGFRMEXTDATASTRUCT + * dataType : Type of the data + * dataID : ID of the data + * subID : Sub ID of script + * buffer : Pointer to pointer of the data address + * size : Address to store the resulting size. During a read operation if size + * is non-zero the amount of bytes read in will be stored there. If size + * or the value pointed to by size is zero all the data represented by + * dataID will be read in. + * option : flag that will change what is returned in buffer and size. + */ +typedef struct _GFRMEXTDATASTRUCT +{ + NvU32 dataType; // type of data + NvU32 dataID; // ID of data + NvU32 subID; // sub ID of data + void ** buffer; + NvU32 * size; + NvU32 option; +} GFRMEXTDATASTRUCT, *PGFRMEXTDATASTRUCT; + + + /** This function is called to get value from curent environment. + + @param envName environment name in env table + @param envType environment type + RM_ENV_DECIMAL // String should be parsed as a decimal + RM_ENV_HEX // String should be parsed as a hexadecimal + RM_ENV_CHAR // String should be parsed as a character + RM_ENV_STRING // String used as-is. + @param parsedval converted value. Only available while environment type is RM_ENV_DECIMAL or RM_ENV_HEX + @return a pointer to the environment table entry containing varname. + */ +// char * ReadEnvVars( const char *envName, int envType, NvU32 *parsedval); +GF_RETTYPE nvGetConfigUint32(const char *name, NvU32 *value); + +GF_RETTYPE nvGetConfigString( const char *envName, char **value); + +/** Retrieves the Process id of the current process. + + @param RmGetProcessID Pointer to NvU32 for returning the prcess id, + + @return GF_SUCCESS If the platforms support some sort of get process id API + @return GF_ERROR. if not support +*/ +GF_RETTYPE RmGetProcessID( NvU32 *RmProcessID ); + +/* Thread, Mutex, Event and Semaphore opaque handles */ +typedef struct GFMutex_t *GFMutex; +typedef struct GFSemaphore_t *GFSemaphore; +typedef struct GFEvent_t *GFEvent; +typedef struct GFThread_t *GFThread; + +/* Rm platform functions for OS abstraction */ + +/** Create Mutex object. + + @param id - Mutex identiifer. Used to cretate named objects. If the + id is 0, un named object is created. + + @return Handle to the event object, or 0 on failure. +*/ +GFMutex RmCreateMutex( NvU32 id ); + +/** Lock mutex object, blocks until mutex can be taken. Must always succeed if + given a valid mutex handle. + + @param mutex Mutex handle +*/ +void RmLockMutex(GFMutex mutex); + +/** Unlock mutex object. Must always succeed if given a valid mutex handle. + + @param mutex Mutex handle +*/ +void RmUnlockMutex(GFMutex mutex); + +/** Destroy mutex object. Must always succeed if given a valid mutex handle. + Must not crash (should do nothing) if given a NULL handle. + + @param mutex Mutex handle. +*/ +void RmDestroyMutex(GFMutex mutex ); + +/** Create semaphore object. + + @param id - Semaphore identifer. Used to create named objects. If the + id is 0, unnamed object is created. + + @param InitCount (NvU32) Initial count of semaphore. This value must be + greater than zero. + @param MaxCount (NvU32) Maximum count of semaphore. This value must be + greater than zero. + + @return Handle to semaphore object, or 0 on failure +*/ +GFSemaphore RmCreateSemaphore(NvU32 id, NvU32 InitCount, NvU32 MaxCount); + +/** Destroy semaphore object. Must always succeed if given a valid semaphore + handle. Must not crash (should do nothing) if given a NULL handle. + + @param sem Semaphore handle +*/ +void RmDestroySemaphore(GFSemaphore sem); + +/** Signal semaphore object. This function increments the semaphore's counter. + Must always succeed if given a valid semaphore handle. + + @param sem Semaphore handle +*/ +void RmSignalSemaphore(GFSemaphore sem); + +/** Wait on semaphore. + Function blocks while semaphore's count is 0. Once the count is non-zero, + the count is decremented by one and function returns. If timeout is passed + as 0, the function does not block. + + @param sem Semaphore handle + @param timeout Timeout in miliseconds, 0 for non-blocking, (NvU32)-1 for infinite wait. + @retutn GF_SUCCESS indicates that the semaphore was taken successfully, GF_WAIT_TIME_OUT + indicates timeout, any other return value indicates error. +*/ +GF_RETTYPE RmWaitOnSemaphore(GFSemaphore sem, NvU32 timeout); + + +/** Create event object. + + @return Handle to event object, or NULL on failure +*/ +GFEvent RmCreateEvent(void); + +/** Sets the event object to the signaled state. Must always succeed if given + a valid event handle. + + @param event Event handle +*/ +void RmSetEvent( GFEvent event ); + +/** Resets the event object to the nonsignaled state. Must always succeed if + given a valid event handle. + + @param event Event handle +*/ +void RmResetEvent( GFEvent event ); + +/** Function blocks until the event is signaled. + + @param event Event handle. + @param msec Milli seconds to wait. + + @retval GF_WAIT_GET_OBJECT Event was signaled, and the event object was acquired. + @retval GF_WAIT_TIME_OUT Timeout before event was signaled + @retval GF_WAIT_ERROR An error occured. +*/ +GF_RETTYPE RmWaitForEvent(GFEvent event, NvU32 msec ); + + +/** Destroys the event object. Must always succeed if given a valid event + handle. Must not crash (should do nothing) if given a NULL handle. + + @param event Event Handle. This is the handler returned by + the call to RmCreateEvent function. +*/ +void RmDestroyEvent( GFEvent event ); + +/** Creates a thread to execute within the calling process. + + @param func (NvU32 (*)(void *)) Pointer to a function to be executed + by the thread. + @param data (void *) Pointer to variable to be passed to the thread + + @return Handle to thread on success, otherwise 0 is returned. +*/ +GFThread RmCreateThread(NvU32 (*StartFunction)(void *), void *data); + +/** Blocks until the specified thread terminates, then frees system resources + associated with the thread. Must always succeed if given a valid thread + handle. Must not crash (should do nothing) if given a NULL handle. + + @param ThreadHandle Thread handle retruned by RmCreateThread call +*/ +void RmJoinThread(GFThread ThreadHandle); + +/** Yield execution to other threads. This will be called inside spin loops + that are waiting for the hardware to finish something. +*/ +void RmYield(void); + +/** Get full path of extended script data. Assume the script data is at same directory as bootload module. + @param modulename (char *)Bootloader module name. If the script data is not at same directory as module, could be NULL. + @param fullpath (char *)Pointer to extened script data path. + + @return GF_SUCCESS to signal success, or error code to signal failure +*/ +GF_RETTYPE + RmGetExtDataPath(char *modulename, char *fullpath ); + +/* File and File Search opaque handles */ +typedef struct GFFile_t *GFFile; +typedef struct GFFileSearch_t *GFFileSearch; + +/** Searches a directory for a file whose name matches the specified file name. + It examines subdirectory names as well as file names + @param filePath (char *) Pointer to a null-terminated string that specifies a valid directory or path and file name, + which can contain wildcard characters (* and ?) + @param filename (char *) pointer to the full path file/dir which match this search. + + @return If the function succeeds, the return value is a search handle used in a subsequent call to RmFindNextFile or RmFindClose, + NULL if the function failed. +*/ +GFFileSearch RmFindFirstFile(const char *filePath, char *fileName); + +/** Continues a file search from a previous call to the RmFindFirstFile function. + @param hFind (GFFileSearch ) Search handle returned by a previous call to the RmFindFirstFile function. + @param filename (char *) pointer to the filename with full path which match this search. + @return GF_SUCCESS to signal success, or error code to signal failure +*/ +GF_RETTYPE RmFindNextFile(GFFileSearch hFind, char *fileName); + +/** Closes the specified search handle. Must always succeed if given a valid + search handle. Must not crash (should do nothing) if given a NULL handle. + + @param hFind (GFFileSearch) Search handle returned by a previous call to the RmFindFirstFile function. +*/ +void RmFindClose(GFFileSearch hFind); + +/** Open file. + @param filename (const char *) Filename + @param fileSpec (const char *) Type of access permitted + @return Handle to the open file. A NULL pointer value indicates an error. +*/ +GFFile RmFileOpen(const char *fileName, const char *fileSpec); + +/** Close file. Must always succeed if given a valid file handle. Must not + crash (should do nothing) if given a NULL handle. + + @param fp Handle that RmFileOpen() returned +*/ +void RmFileClose(GFFile fp); + +/** Read data from file. + @param buffer (void *) Storage location for data + @param lSize (NvU32) Item size in bytes + @param lCount(NvU32) Maximum number of items to be read + @param fp (GFFile) Pointer that RmFileOpen() returned + @return Number of full items actually read, 0 if nothing is read out. +*/ +GF_RETTYPE RmFileRead(void *buffer, NvU32 lSize, NvU32 lCount, GFFile fp); + +/** Get file size. + @param fp(GFFile ) Pointer that RmFileOpen() returned + @return Current file size in bytes. +*/ +GF_RETTYPE RmFileSize(GFFile fp); + +/** Platform abstraction for millisecond sleep. + + @param msec Milliseconds to sleep. + */ +void RmWaitMSec(NvU32 msec); + +/** Waits for a keypress with a timeout, and returns the key. + + @param timeOutMSec Milliseconds to wait for the keypress. + @retval The code for the key, or zero if we timed out. + */ +int RmWaitKey(NvU32 timeOutMSec); + +/** Get the current OS tick counter. + @return Low 32 bits of millisecond counter. +*/ +NvU32 RmGetTickCountMSec(void); + +/** Get the current OS tick counter. + + NOTE: This function is NOT guaranteed to exist on all + platforms. Drivers should NOT call this function; it's + meant only for benchmarking. + + @return (NvU64) 64 bit microsecond counter. + */ +NvU64 RmGetTickCountUSec(void); + +/** SetupPlatform - It is called by RmSetupPlatform to setup any platform specific stuff. + + @param pOutput (PGFRMSETUPPLATFORM) output structure. Used to pass variables to high layer function RmSetupPlatform + @param penv (PGFRMENVIRONMENTVARIABLES) pass Environment Variable Configuration structure + + @return GF_SUCCESS to signal success, or error code to signal failure + +*/ +GF_RETTYPE SetupPlatform( PGFRMSETUPPLATFORM pOutput, PGFRMENVIRONMENTVARIABLES penv ); + +/** Called by RmExitPlatform to exit and clean-up any platform specific stuff, if any + + @param pUserObject0 (void *) Pointer to user specified object 0 from high layer function RmExitPlatform + + @return GF_SUCCESS to signal success, or error code to signal failure +*/ +GF_RETTYPE ExitPlatform( void *pUserObject0); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFRMOEM_H__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmRDMA.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmRDMA.h new file mode 100755 index 00000000..151ec65d --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmRDMA.h @@ -0,0 +1,411 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @File: GFRmRDMA.h + GFSDK Read DMA memmory manager. + + */ + +#ifndef __GFRMRDMA_H__ +#define __GFRMRDMA_H__ + +#include "GF.h" + +/** @addtogroup groupRDMA RDMA ReadDMA API +
        +
      • @ref pageRDMAAppNotes +
      +*/ + +/*@{*/ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + + +/** eGFRmRDMAClientID: Enumeration of client id's. SC15 has 4 + RDMA (Read DMA) FIFO's. Modules specified below can be + attached to the RDMA FIFO's. See @ + */ +typedef enum +{ + RDMA_CLID_CPU = 0, + RDMA_CLID_DSP, + RDMA_CLID_I2S, + RDMA_CLID_SD, + RDMA_CLID_MPEGE, + RDMA_CLID_JPEGE, + RDMA_CLID_EPP, + RDMA_CLID_VI, + RDMA_CLIDS +} eGFRmRDMAClientID; + +/** RDMA buffer header. + + For non-rectangular (or linear) reads + RDMA expects a header in the memory. The header formart is as specified + below. GFRmRDMAReadHeader function returns the header in this format. + + @See GFRmRDMAReadHeader() + */ + +typedef struct _RDMA_BUF_HEADER +{ + NvU32 bufferSize; + NvU32 raiseVector; + NvU32 channel; + NvU8 raiseEnable; + NvU8 frameStart; + NvU8 frameEnd; + NvU8 largeHdr; + NvU32 extHeader; + +} RDMA_BUFFER_HEADER, *pRDMA_BUFFER_HEADER; + + +/* RDMA flags */ + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + No byte swap. +*/ +#define GF_RDMA_FLAGS_SWAP_NONE 0x00000000 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + Swap bytes in a word. example: 0xaabbccdd to 0xbbaaddcc. +*/ +#define GF_RDMA_FLAGS_SWAP_BYTE_IN_WORD 0x00000001 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + Swap bytes in dword: 0xaabbccdd to 0xddccbbaa. +*/ +#define GF_RDMA_FLAGS_SWAP_BYTE_IN_DWORD 0x00000002 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + Swap word in dword example: 0xaabbccdd to 0xccddaabb. +*/ +#define GF_RDMA_FLAGS_SWAP_WORD_IN_DWORD 0x00000003 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags bitmask: + mask out byte swap options GF_RDMA_FLAGS_SWAP_*. +*/ +#define GF_RDMA_FLAGS_SWAP_MASK 0x00000003 + +/** RDMA_NONRECT::flags and RDMA_RECT::flags flagbit: + Tells the RDMA engine to output header. Will output a header into the data stream, + which has to be read with GFRmRDMAReadHeader() before calling GFRmRDMARead(). + This flag is relevant only in non-rectangular reads. + */ +#define GF_RDMA_FLAGS_STR_HEADER 0x00010000 + +/** RDMA_RECT + Setup information for the RDMA. + */ +typedef struct _RDMA_RECT +{ + /** physical addess of the buffer in the SC15 Memory view. 32-bit alignment + * required. */ + NvU32 baseOffset; + + /** client id. See @eGFRmRDMAClientID */ + eGFRmRDMAClientID clid; + + /** buffers/stride/width/lines of the rectangular buffer. + + Need to comply with the following constraints provided + by the hardware + - if width is not a multiple of 4 bytes (one word): + - stride equals width, stride should be the exact stride in bytes (eg. line_stride[1:0] not equal to 0) + - if stride is bigger than width, stride should be rounded down to the nearest word + (eg. line_stride[1:0] should be zero) + + For example: width = 42 bytes, stride = 82 -> stride should be programmed to 80 + width = 42 bytes, stride = 42 -> stride should be programmed to 42 + */ + NvU32 buffers; + NvU32 stride; + NvU32 width; + NvU32 lines; + + /* use the RDMA flags defined above as GF_RDMS_FLAGS_* */ + NvU32 flags; //!< Flagbits, see GF_RDMA_FLAGS_* + + /* Timeout in msec. If <=0, then no timeout */ + NvU32 timeout; + +} RDMA_RECT, *pRDMA_RECT; + +/** RDMA_NONRECT + + Setup structure for non-rectangular reads. + + */ +typedef struct _RDMA_NONRECT +{ + /** Physical addess of the buffer in the GPU address space. Needs to be + * 32-bit aligned. */ + NvU32 baseOffset; + + /** client id. See @eGFRmRDMAClientID */ + eGFRmRDMAClientID clid; + + NvU32 buffers; + NvU32 stride; + + /* use the RDMA flags defined above as GF_RDMS_FLAGS_* */ + NvU32 flags; //!< Flagbits, see GF_RDMA_FLAGS_* + + /* Timeout in msec. If =0, then no timeout */ + NvU32 timeout; + +} RDMA_NONRECT, *pRDMA_NONRECT; + + +/** There are four read dma channels, the RM manages the allocation/ + freeing of these channels. This function allocates a channel. + + @param RmHandle Handle to the Rm allocated via call to GFRmOpen. + @param DmaHandle Pointer to an allocated handle. + + @retval GF_SUCCESS if a RDMA channel is available, and returns + RDMA handle on allocation. + + The release function will return GF_ERROR + if the read dma is already released. + */ + +GF_RETTYPE +GFRmRDMAAlloc(GFRmHandle RmHandle, GFRmRdmaHandle *DmaHandle); + +/** There are four read dma channels, the RM manages the allocation/ + freeing of these channels. This function frees an allocated + channel. + + @param hRm Handle to the Rm allocated via call to GFRmOpen. + @param phDma Pointer to the DMA handle to be released. + */ +void +GFRmRDMARelease(GFRmHandle hRm, GFRmRdmaHandle *phDma); + +/** Setup non-rectangular RDMA. + + When the flag GF_RDMA_FLAGS_STR_HEADER is set, buffer header is written to the + memory by the RDMA client. So, when the cpu reads the data, buffer + header comes first and then the data. Buffer header has the information + of buffer, like its size etc. + + + So, an example sequence would be + - Call setup with GF_RDMA_FLAGS_STR_HEADER flag set. + - Read header with the GFRmRDMAReadHeader(...) + - Read buffer size of data with GFRmRDMARead() funtion. + Buffer size is in the buffer header. + + If this flag is not set, then the there is no buffer header. + In this case it is assumed that the the size of the buffer is prefixed + and known to the module API writers. + + So, an example sequence would be + - Call setup GF_RDMA_FLAGS_STR_HEADER flag not set. + - Read buffer size of data with GFRmRDMARead() funtion. + Buffer size is known to the callers. + + baseOffset of pReq structure needs to be 32-bit aligned. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param pReq Populated RDMA req structure. See @RDMA_NONRECT +*/ + +GF_RETTYPE +GFRmRDMASetupNONRect(GFRmRdmaHandle DmaHandle, pRDMA_NONRECT pReq); + +/** Setup RDMA for rectangular read. + + Requirement: + baseOffset of pReq structure needs to be 32-bit aligned. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param pReq Populated RDMA req structure. See @RDMA_RECT +*/ +GF_RETTYPE +GFRmRDMASetupRect(GFRmRdmaHandle DmaHandle, pRDMA_RECT pReq); + +/** Reads the RDMA FIFO status register and returns the + available number of FIFO slots. A slot is 32-bit. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + */ +NvU32 GFRmRDMAFIFOAvailIn32Bits(GFRmRdmaHandle DmaHandle); + +/** Reads memory from SC15 internal/external + memory to the system memory pointed by the dstAddr. Need + to pass the same rectangular attributes passed, when the + RDMA is setup. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param dstAddr aligned or non-aligned dest pointer. Aligned + pointer results in faster reads. + @param width Width in bytes to read. + @param height Height of the rectangular region. + + @retval Returns GF_SUCCESS or GF_ERROR. + */ + +GF_RETTYPE +GFRmRDMARectRead(GFRmRdmaHandle DmaHandle, void *dstAddr, NvU32 width, NvU32 height); + + +/** Reads memory from SC15 internal/external + memory to the system memory pointed by the dstAddr. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param dstAddr aligned or non-aligned dest pointer. Aligned + pointer results in faster reads. + @param sizeInBytes Number of bytes to read. + + @retval Returns GF_SUCCESS or GF_ERROR. + */ + +GF_RETTYPE +GFRmRDMARead(GFRmRdmaHandle DmaHandle, void *dstAddr, NvU32 sizeInBytes); + +/** Reads buffer header. Once this info is read + API's will know how much data to read or expect. + + @param DmaHandle Handle returned by @GFRmRDMAAlloc function. + @param header Pointer to RDMA header structure. See @RDMA_BUFFER_HEADER + */ +GF_RETTYPE +GFRmRDMAReadHeader(GFRmRdmaHandle DmaHandle, pRDMA_BUFFER_HEADER header); + + +/** Cleanup the RDMA FIFO, by reading out any extra DOWRDS + GFRmRDMARead might not have read. + + In general this function need not be used. + */ + +GF_RETTYPE +GFRmRDMACleanup(GFRmRdmaHandle DmaHandle); + + +/** Gets the actual RDMA channel number from the DMA handle. This is + usefull for DSP development. Host code allocates the DMAHandle + gets the DMA number from that and creates the DMA handle on the + DSP side using GFXRmRDMAAlloc function. GFXRmRDMAAlloc needs to + know what DMA channel to use. + + @param DmaHandle RDMA handle. + @param dmaNumber RDMA channel number used the handle. + +*/ + +void +GFRmRDMAGetPortNumber(GFRmRdmaHandle DmaHandle, NvU32 *portNumber); + +#if NVCPU_IS_XTENSA + +// In XRM, it is expected that the dma handle is allocated on +// the Host side, and just the dma number is passed into code +// running on the Xtensa. These functions will setup a +// DMA handle that can used in the XRM. + + +GF_RETTYPE +GFXRmRDMAAlloc(NvU32 dmaNumber, GFRmRdmaHandle *DmaHandle); + + +GF_RETTYPE +GFXRmRDMARelease(GFRmRdmaHandle *DmaHandle); + +#endif // NVCPU_IS_XTENSA + + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + + +/*@}*/ + +/** @page pageRDMAAppNotes RDMA Application Notes + + General information about RDMA - RDMA is read DMA hw block. Unlike + traditional DMA, sw reads the data from the FIFO to system memory. This is + becasuse SC15 cannot bus master and write directly to the system memory. + RDMA will be faster becasue the data is buffered by the HOST1x Block and sw + reads back data in a tight loop. + + SC15 RDMA supports 2 modes - Linear(AKA NON-Rect) and Rect mode. + In both modes the sequence of programming same - setup and then read the data. + + RDMA setup is 2 step process. + - RDMA need to know which client will trigger the RDMA. It also need to other + parameters like which varies for linear and RECT modes. + In rect reads software has to setup the stride/width/number of lines. + This information is needed to describe a buffer. In case of non-rect + read a buffer header is expected, which describes the buffer. In both + cases one need to specify the number of buffers. + + - Client module also need to be setup, as it notifies the RDMA hw block when + the data is ready. This step is not needed for CPU triggered case, as the + data is already available in the memory. + + Sample program sequence: + + Setup RDMA + Setup Client side register (example - vi, SD etc...). Not needed when + setup for CLID CPU. + + wait till the data is available () + { + Read the data(..) + } + + Amount of data to read is either known a-priori (RECT mode) or read from + the header (linear mode). + + + As described ealier RDMA supports 2 modes + + Linear RDMA - RDMA expects a header in the memory right before the data, when + it is triggered. That header describes the length and the attributes of the + buffer. + + Depending on how the RDMA is setup, buffer header will be/will not be + (i.e RDMA_BUFFER_HEADER struct) readout. see #GF_RDMA_FLAGS_STR_HEADER + + When the header is returned the usage looks like + + RDMA_BUFFER_HEADER header; + GFRmRDMAReadHeader(...,&header); + While (header->bufferSize) + { + ... + GFRmReadRDMA(...) + } + + In this mode, it is important is to note that RDMA expect the buffer header + in the memory. So, this is not good for CPU triggerd case, as in that case + CPU should somehow write the buffer header to read the data already present + in the embedded memory. + + Rect RDMA - In this mode, there is no concept of buffer header. Exact size + should be programmed in the RDMA registers when the Setup is done. So, sw + should know how much data to pull out. Requests for data more than available + will result in timeout errors. + + A guideline: if an engine already generated the buffer for you, then use + non-rectangular read. Otherwise, use rect read. + +*/ + +#endif /* __GFRMRDMA_H__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmScr.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmScr.h new file mode 100755 index 00000000..1678ba09 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFRmScr.h @@ -0,0 +1,59 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#if !defined (__GFRMSCR_INC__) +#define __GFRMSCR_INC__ + +/* Surface ColorFormat - Follow GFBITMAP type (GF_BITMAP_xxx) */ + +#define GF_SURFACE_YUV420 1 +#define GF_SURFACE_YUV422 2 +#define GF_SURFACE_YUV444 4 +#define GF_SURFACE_ROTATED_YUV422 8 + +#define GF_SURFACE_YUYV (GF_SURFACE_YUV422|0x00000004) +#define GF_SURFACE_YVYU (GF_SURFACE_YUV422|0x00000008) +#define GF_SURFACE_UYVY (GF_SURFACE_YUV422|0x00000010) +#define GF_SURFACE_VYUY (GF_SURFACE_YUV422|0x00000020) +#define GF_SURFACE_MPEGDEC (GF_SURFACE_YUV420|0x00000040) + + +/** Image is for encoding purpose. Must combine with particular YUV format. */ +#define GF_SURFACE_MPEGENC 0x00000080 +#define GF_SURFACE_JPEGDEC (GF_SURFACE_YUV420|0x00000100) + +/** Image is for encoding purpose. Must combine with particular YUV format. */ +#define GF_SURFACE_JPEGENC 0x00000200 +#define GF_SURFACE_PLANAR_YUV422 0x400 +#define GF_SURFACE_RGB565 0x00010000 + +/** Used for 18 bpp (MSB bits) (18bpp MSB bits) case. */ +#define GF_SURFACE_RGB888 0x00020000 +#define GF_SURFACE_ARGB8888 0x00030000 +#define GF_SURFACE_ARGB1555 0x00040000 +#define GF_SURFACE_ARGB4444 0x00050000 + +/** Used for 18 bpp (LSB bits). */ +#define GF_SURFACE_RGB666 0x00060000 + +/** 8bpp surface. */ +#define GF_SURFACE_RGB8 0x00070000 +#define GF_SURFACE_RGB_MASK 0x000F0000 + +/** Bayer 8bit ColorFormat. */ +#define GF_SURFACE_BAYER8 0x00100000 + +/** Bayer 16bit ColorFormat. */ +#define GF_SURFACE_BAYER16 0x00200000 +#define GF_SURFACE_ABGR8888 0x00400000 + +/** YUV422 rotated averaging. */ +#define GF_SURFACE_PLANAR_YUV422RA 0x00800000 + +#endif diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFTrace.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFTrace.h new file mode 100755 index 00000000..4d50b3bd --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFTrace.h @@ -0,0 +1,304 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* GFTrace.h: Tracing utility for GFSDK libraries. + * + * Features a suite of conditionally compilied tracing macros: + * + * GF_TRACE( a ): for "don't care" tracing - will be mapped + * to the DEBUG priority. + * + * And several others, each with a different priority. + * + * GF_TRACE_CRITICAL( a ) + * GF_TRACE_WARNING( a ) + * GF_TRACE_NORMAL( a ) + * GF_TRACE_VERBOSE( a ) + * GF_TRACE_DEBUG( a ) + * + * The trace macro parameter is treated as a printf style argument + * list, so it should be wrapped in double-parenthesis, such as: + * + * GF_TRACE(("Register value is: %x", reg)); + * + * Tracing is either handled via priorities (normal tracing). + * Tracing supports logging to a file (defaulting to "gfsdk.log") + */ + +#ifndef GF_RMTRACE_H +#define GF_RMTRACE_H + +/* Required for compilation: + * + * GF_TRACE_COMPONENTID [id] + * 'id' is a number 0 to GF_TRACE_COMPONENT_MAX. Tracing priorities + * and thresholds are set via the component id. + * + * Example usage of this header file: + * + * #define GF_TRACE_COMPONENTID GF_GXAPI + * #define GF_TRACE_ENABLE 1 + * #include "GFTrace.h" + * + * void + * foo( NvU32 x ) + * { + * GF_TRACE_DEBUG(("foo called with: %x", x )); + * } + * + */ + +#ifndef GF_TRACE_COMPONENTID +#error "GF_TRACE_COMPONENTID must be defined." +#endif + +#include +#include "GFRm.h" + +/* see GFRm.h for available component ids */ + +/* Compiliation options: + * + * GF_TRACE_ENABLE [0|1] + * If zero, will remove tracing for that file. + * + * GF_TRACE_GLOBAL_DISABLE + * If this is defined and set to 1 - tracing is force globally disabled. + * If not defined will be controlled by the GF_TRACE_ENABLE macro. + * + * GF_TRACE_GLOBAL_ENABLE + * If this is defined and set to 1 - tracing is force globally enabled. + * If not defined will be controlled by the GF_TRACE_ENABLE macro and + * GF_TRACE_GLOBAL_DISABLE macros. + * + * So, the precedence is GF_TRACE_GLOBAL_ENABLE > GF_TRACE_GLOBAL_DISABLE > + * GF_TRACE_ENABLE + * + * GF_TRACE_COMPONENTID_MAX [max] + * The maximum number of component ids that may exist for tracing. + * + * GF_TRACE_MESSAGESIZE_MAX [max] + * The maximum length of a tracing message, in bytes. + * + * GF_TRACE_DECORATE [0|1] + * Automatically add a newline, componentname and process ID to + * the output. + */ + +/* default for component id max */ +#ifndef GF_TRACE_COMPONENTID_MAX +#define GF_TRACE_COMPONENTID_MAX 32 +#endif + +/* default for message size max */ +#ifndef GF_TRACE_MESSAGESIZE_MAX +#define GF_TRACE_MESSAGESIZE_MAX 256 +#endif + +/* default for decoration is 1 */ +#ifndef GF_TRACE_DECORATE +#define GF_TRACE_DECORATE 1 +#endif + +#if defined(NV_MODS) + +/* By default enable everything for MODS */ +#undef GF_TRACE_ENABLE +#define GF_TRACE_ENABLE 1 + +#ifndef INCLUDED_GFMODS_H +#include "GFMods.h" +#endif + +#endif /* NV_MODS */ + +#if defined(GF_TRACE_GLOBAL_ENABLE) && defined(GF_TRACE_GLOBAL_DISABLE) +#error "Both GF_TRACE_GLOBAL_DISABLE and GF_TRACE_GLOBAL_ENABLE cannot be defined" +#endif + +/* global overrides */ +#ifdef GF_TRACE_GLOBAL_ENABLE + #undef GF_TRACE_ENABLE + #define GF_TRACE_ENABLE 1 +#endif + +#ifdef GF_TRACE_GLOBAL_DISABLE + #undef GF_TRACE_ENABLE + #define GF_TRACE_ENABLE 0 +#endif + +/* Several priorities from which to choose. Use the + * GFRmTrace*Threshold functions to limit tracing output. + * By deafult, all messages will be traced in a Debug build, + * only Warning, and Critical in a Release build. + * + * The priority numbers should exactly match the printing + * priorities in MODS. + */ +#define GF_TRACE_PRI_CRITICAL 5 +#define GF_TRACE_PRI_WARNING 4 +#define GF_TRACE_PRI_NORMAL 3 +#define GF_TRACE_PRI_VERBOSE 2 +#define GF_TRACE_PRI_DEBUG 1 + +/* Returns the current tracing threshold. + */ +NvU32 +GFRmTraceGetThreshold( NvU32 componentId ); + +/* Sets the current tracing threshold. All messages with an equal-to or + * greater-than priority will be traced. + */ +void +GFRmTraceSetThreshold( NvU32 componentId, NvU32 thresh ); + +/* Gets the current tracing priority. + */ +NvU32 +GFRmTraceGetPriority( NvU32 componentId ); + +/* Sets the current tracing priority for the given component. + */ +void +GFRmTraceSetPriority( NvU32 componentId, NvU32 pri ); + +/* Trace a message. Takes variable arguments that exactly match those + * of the libc printf family. Messages may or may not be controlled + * via a priority mechanism. + */ +void +GFRmTrace( NvU32 componentId, NvU32 priority, const char *msg, va_list args ); + +/* Tracing may be controlled via run-time as well as compile-time. + * The run-time options that are available (to be passed into + * GFRmTraceConfigure as the option flag) are: + * + * GF_TRACE_OPT_OUTPUT [ioname] + * The output device of normal tracing. Defaults to stdout. + * 'value' is a char *, max len is 256. Should be null-terminated. + * May be "default" or a filename. + * + * GF_TRACE_OPT_COMPONENT_ENABLE [id] [0|1] + * Component that have compiled in tracing can be turned off or + * back on. The configure value is a pointer to an array of two + * integers, the first is id, the second is the enable/disable. + * + * GF_TRACE_OPT_DECORATE [id] [0|1] + * Automatically add a newline and component id to the output. + * 1 for on, 0 for off. 'id' is the component id. + */ +#define GF_TRACE_OPT_OUTPUT 0 +#define GF_TRACE_OPT_COMPONENT_ENABLE 1 +#define GF_TRACE_OPT_DECORATE 2 + +/* Open the trace file. Called by GFRmOpen */ +GF_RETTYPE GFRmTraceOpen(void); + +/* Closes the trace file. Called by GFRmClose */ +void GFRmTraceClose(void); + +/* Run-time configuration for tracing. See the GF_TRACE_OPT + * flags for 'value' documentation. All configuration settings + * assigned via GFRmTraceConfigure() are global across all component + * ids, and should be synchronized if accessed by multiple threads. + * + * Returns 0 on failure, 1 otherwise. + */ +NvU32 +GFRmTraceConfigure( int option, void *value ); + +/* Returns a nice name for the component id. + * Note that this will always be defined (never compiled out). + */ +const char * +GFRmTraceGetComponentName( NvU32 componentId ); + +#if !GF_TRACE_ENABLE || NVCPU_IS_XTENSA + +#define GF_TRACE( a ) +#define GF_TRACE_CRITICAL( a ) +#define GF_TRACE_WARNING( a ) +#define GF_TRACE_NORMAL( a ) +#define GF_TRACE_VERBOSE( a ) +#define GF_TRACE_DEBUG( a ) + +#else /* tracing is enabled */ + +static NV_INLINE void GFRmTraceWithPriority(const char *msg, ...) +{ + va_list list; + NvU32 priority = 0; + + va_start( list, msg ); + + priority = GFRmTraceGetPriority( GF_TRACE_COMPONENTID ); + +#if !defined(NV_MODS) + GFRmTrace( GF_TRACE_COMPONENTID, priority, msg, list ); +#else + GFModsTrace( GF_TRACE_COMPONENTID, priority, msg, list ); +#endif + va_end( list ); +} + +/* component id will be defined to be -1 for the trace implementation. + * Each client must define component id before including this file. + * + * For a MODS build, GFRmTraceWithPriority() must call ModsDrvVPrintf(). + * See main/diag/mods/include/modsdrv.h for details. ModsDrvVPrintf() + * is called via GFModsTrace(). + */ +#if GF_TRACE_COMPONENTID >= 0 + +#define GF_TRACE( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_DEBUG ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_CRITICAL( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_CRITICAL ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_WARNING( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_WARNING ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_NORMAL( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_NORMAL ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_VERBOSE( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_VERBOSE ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) + +#define GF_TRACE_DEBUG( a ) \ + do \ + { \ + GFRmTraceSetPriority( GF_TRACE_COMPONENTID, GF_TRACE_PRI_DEBUG ); \ + GFRmTraceWithPriority a; \ + } while( 0 ) +#endif /* componentid check */ + +#endif /* enable trace */ + +#endif /* GFRMTRACE_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFTypes.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFTypes.h new file mode 100755 index 00000000..49145b10 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFTypes.h @@ -0,0 +1,65 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFTypes.h + * GFSDK standard data types. + */ + +#ifndef __GFTYPES_H__ +#define __GFTYPES_H__ + +#include "nvtypes.h" + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +/* Misc Helper macros on data types (deal with byte-endianness later ) */ +#ifndef MAKENvU32 +#define MAKENvU32(dataLo16, dataHi16) \ + (NvU32)(((NvU32)(dataHi16) << 16) | (NvU32)(dataLo16)) +#endif /* MAKENvU32 */ + +#ifndef MAKENvU16 +#define MAKENvU16(dataLo8, dataHi8) \ + (NvU16)(((NvU16)(dataHi8) << 8) | (NvU16)(dataLo8)) +#endif /* MAKENvU16 */ + +#if defined(__arm) +# define GFALIGN8 __align(1) +# define GFALIGN16 __align(2) +# define GFALIGN32 __align(4) +#elif defined(__IAR_SYSTEMS_ICC__) +# define GFALIGN8 +# define GFALIGN16 +# define GFALIGN32 +#elif defined(NV_LINUX) +# define GFALIGN8 +# define GFALIGN16 __attribute__ ((aligned (2))) +# define GFALIGN32 __attribute__ ((aligned (4))) +#elif defined(NVCPU_XTENSA) +# define GFALIGN8 +# define GFALIGN16 __attribute__ ((aligned (2))) +# define GFALIGN32 __attribute__ ((aligned (4))) +#elif defined(NV_WINDOWS) +# define GFALIGN8 +# define GFALIGN16 +# define GFALIGN32 +#else +# define GFALIGN8 +# define GFALIGN16 +# define GFALIGN32 +#endif + +#endif /* __GFTYPES_H__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVersion.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVersion.h new file mode 100755 index 00000000..399900be --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVersion.h @@ -0,0 +1,24 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * File: GFVersion.h + * GFSDK build version header file. + */ + +#ifndef __GFVERSION_H__ +#define __GFVERSION_H__ + +#define GF_MAJOR_VERSION 0x0017 +#define GF_MINOR_VERSION 0x0100 +#define GF_BUILD_NUMBER 1039 + + +#endif /* __GFVERSION_H__ */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVx.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVx.h new file mode 100755 index 00000000..5af9e634 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVx.h @@ -0,0 +1,3028 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFVx.h + GFSDK Video API header file. +*/ + +#ifndef __GFVX_H__ +#define __GFVX_H__ + +#include "GFRm.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#include "GFVxScr.h" + +/** @addtogroup groupVx VxAPI Video API +
        +
      • @ref pageVxOverview +
          +
        • @ref pageVxOverview1 +
        • @ref pageVxOverview2 +
        • @ref pageVxOverview3 +
        +
      • @ref pageVxAppNotes +
          +
        • @ref pageVxAppNotes1 +
        +
      +*/ +/*@{*/ + +/* GFVX Property Capability */ + +/** VxAPI property flag: Color space conversion supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_CSC 0x00000001 + +/** VxAPI property flag: VIP functions available. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_VIP 0x00000002 + +/** VxAPI property flag: Enlarge source image via VIP supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_ENLARGE 0x00000004 + +/** VxAPI property flag: Shrink source image via VIP supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_SHRINK 0x00000008 + +/** VxAPI property flag: Overlay supported. + The GoForce processor version supports overlay display. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_OVERLAY 0x00000020 + +/** VxAPI property flag: MPEG4 decoder supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_MPEGDEC 0x00000040 + +/** VxAPI property flag: MPEG4 encoder supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_MPEGENC 0x00000080 + +/** VxAPI property flag: JPEG decoder supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_JPEGDEC 0x00000100 + +/** VxAPI property flag: JPEG encoder supported. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_JPEGENC 0x00000200 + +/** VxAPI property flag: Alpha blending supported. + @version SC12 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_ALPHA_BLEND 0x00000400 + +/** VxAPI property flag: Extended RGB format 32 bpp supported. + @version SC12 above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_EXTEND_RGB 0x00000800 + +/** VxAPI property flag: Variable sized data camera interface (Type A/B/C) + supported. See section @ref pageVxOverview2 for information on Type A/B/C + camera interfaces. + @version SC12 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability, +*/ +#define GFVX_CAP_ENCODE_TYPE 0x00001000 + +/** VxAPI property flag: Bayer type camera interface supported. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability, +*/ +#define GFVX_CAP_BAYER_TYPE 0x00002000 // support bayer type input + +/** VxAPI property flag: YUV Overlay supported. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_OVERLAY_YUV 0x00004000 + +/** VxAPI property flag: Overlay with scaling supported. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_OVERLAY_SCALE 0x00008000 + +/** VxAPI property flag: Multiple Overlay supported. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_OVERLAY_MULTIPLE 0x00010000 + +/** VxAPI property flag: Per pixel alpha supported. + Used when application wants to use weight (overlay and blend) + defined in pixels alpha bits. + @version SC15 and above only. + @see GFVxGetProperty(), GFPROPERTY::Capability +*/ +#define GFVX_CAP_PER_PIXEL_ALPHA 0x00020000 + +/** VxAPI GFVXBLT::BltOption flagbit: Disable VSync wait. + Disable GFVxBlt() synchronization with VSync. The default behaviour of + GFVxBlt() is to wait for VSync to prevent display flicker. Note that + if the display is disabled there is no VSync signal and GFVxBlt() + would block. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_DISABLE_WAIT_VSYNC 0x00000080 + +/** VxAPI GFVXBLT::BltOption flagbit: Source color key. + GFVxBlt() compares each pixel of the source surface with the color key. + If the colors match, the pixel is not copied to the destination surface. + + The source color key option is not very useful when scaling is used. + + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_SRC_KEY 0x00000100 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-blit at end of VIP frame. + If this flag is set, GFVxBlt() configures blit parameters for + VIP auto-blit. VIP auto-blit can be used to fire stretch blit automatically + at the end of the video input frame from the video input port (VIP). This + requires double buffering of the input and output of stretch blit. The use + of this flag is to be combined with GFVxVIPUpdate() flag + #GFVX_VIP_AUTO_TRIGER_BLT. + @see GFVXBLT, GFVxBlt(), #GFVX_VIP_AUTO_TRIGER_BLT +*/ +#define GFVX_AUTO_BLT 0x00000400 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-blit at end of VIP frame. + This flag is the same as #GFVX_AUTO_BLT + @version SC15 and above only + @see GFVXBLT, GFVxBlt(), #GFVX_VIP_AUTO_TRIGER_BLT, #GFVX_AUTO_BLT +*/ +#define GFVX_BLT_AUTO_VI 0x00000400 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-display destination surface. + The application does not need call GFVxFlip() to show the surface. + With the auto-display option, the VI module triggers stretch blit which + in turn sends the destination surface's buffer address to the display + controller (GC). VI input data goes into double buffers which become the + stretch blit source, the output of stretch blit is also double buffered. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_AUTO_DISPLAY 0x00000800 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-display destination surface. + This flag is the same as #GFVX_AUTO_DISPLAY + @version SC15 and above only + @see GFVXBLT, GFVxBlt(), #GFVX_AUTO_DISPLAY +*/ +#define GFVX_BLT_AUTO_DISPLAY 0x00000800 + +/** VxAPI GFVXBLT::BltOption flagbit: Set up parameters for partial blit + If this flag is set, GFVxBlt() configures blit parameters for + partial blit. The partial blit works only with circular buffers and + source and destination format are not YUV planar format. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_PARTIAL 0x00001000 + +/** VxAPI GFVXBLT::BltOption flagbit: Trigger partial blit + If this flag is set, GFVxBlt() will blit buffer specified + in buffer index option of circular buffers to destination surface. + The use of this flag is to be combined with GFVxBlt() flag + #GFVX_BLT_PARTIAL. + @see GFVXBLT, GFVxBlt(), #GFVX_BLT_PARTIAL +*/ +#define GFVX_BLT_PARTIAL_TRIGGER 0x00002000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit without rotation + If this flag is set, GFVxBlt() blits without rotation + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ROTATE_0 0x00004000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with 90 degree rotation + If this flag is set, GFVxBlt() blits with 90 degree rotation + Currently, SC15 doesn't support this feature. However, this flag + can be combined with flag GFVX_BLT_H_FLIP to blit with XY swap + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ROTATE_90 0x00008000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with 180 degree rotation + If this flag is set, GFVxBlt() blits with 180 degree rotation + Currently, SC15 doesn't support this feature. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ROTATE_180 0x00010000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with 270 degree rotation + If this flag is set, GFVxBlt() blits with 270 degree rotation + Currently, SC15 doesn't support this feature. However, this flag + can be combined with flag GFVX_BLT_V_FLIP to blit with XY swap + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ROTATE_270 0x00020000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with horizontal flip + If this flag is set, GFVxBlt() blits with horizontal flip + Currently, SC15 doesn't support this feature. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_H_FLIP 0x00040000 + +/** VxAPI GFVXBLT::BltOption flagbit: Blit with vertical flip + If this flag is set, GFVxBlt() blits with vertical flip + Currently, SC15 doesn't support this feature + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_V_FLIP 0x00080000 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-display destination surface + using overlay window 2. This is exactly identical to #GFVX_AUTO_DISPLAY + except that it uses overlay window 2 instead of overlay window 1 (default). + + @version SC15 and above only + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_AUTO_DISPLAY_OVERLAY2 0x00100000 + +/** VxAPI GFVXBLT::BltOption flagbit: Auto-display destination surface + using overlay window 2. This flag is the same as #GFVX_AUTO_DISPLAY_OVERLAY2 + @version SC15 and above only + @see GFVXBLT, GFVxBlt(), #GFVX_AUTO_DISPLAY_OVERLAY2 +*/ +#define GFVX_BLT_AUTO_DISPLAY_OVERLAY2 0x00100000 + +/** VxAPI GFVXBLT::BltOption flagbit: Enables full range in color spce conversion + 0<= Y <=255, -128<= U <=127, -128<= V <=127 + YUV-->RGB conversion formula: + R = 1.000Y + 1.402V + G = 1.000Y - 0.344U - 0.714V + B = 1.000Y + 1.772U + This option is useful for decoded video from movies. + When this flag is not set, uses CCIR601 range (16-235) as follows: + 16<= Y <=235, 16<= U <=240, 16<= V <=240 + YUV-->RGB conversion formula: + R = 1.164(Y-16) + 1.596(Cr-128) + G = 1.164(Y-16) - 0.391(Cb-128) - 0.813(Cr-128) + B= 1.164(Y-16) + 2.018(Cb-128) + This option is useful for video from camera. + @version SC15 and above only + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_CSC_FULL_RANGE 0x00200000 + +/** VxAPI GFVXBLT::BltOption flagbit: Enable camera VSync wait. + Enable GFVxBlt() synchronization with camera VSync. Note that + if the camera is disabled there is no VSync signal and GFVxBlt() + would block. + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_ENABLE_WAIT_CAMERA_VSYNC 0x00400000 + +/** VxAPI GFVXBLT::BltOption flagbit: Disable vertical and horizontal filters + By default, the vertical and horizontal filters are enabled. If this flag + is set, GFVxBlt() blits with filters disabled + @see GFVXBLT, GFVxBlt() +*/ +#define GFVX_BLT_DISABLE_FILTERS 0x00800000 + +/** VxAPI option parameter of routines GFVxBltSetCSCCoefff() + and GFVxVIPSetCSCCoeff() to use CCIR601 range + + CSC_USE_CCIR601_RANGE (16-235) as follows: + 16<= Y <=235, 16<= U <=240, 16<= V <=240 + YUV-->RGB conversion formula: + + R = sat(KYRGB*(Y + YOF) + KUR*U + KVR*V) + G = sat(KYRGB*(Y + YOF) + KUG*U + KVG*V) + B = sat(KYRGB*(Y + YOF) + KUB*U + KVB*V) + + The CSC coefficients are: + + KYRGB, KUR, KVR 1.1644 0.0000 1.5960 + KYRGB, KUG, KVG = 1.1644 -0.3918 -0.8130 + KYRGB, KUB, KVB 1.1644 2.0172 0.0000 + + and YOF = -16.0000 + This option is useful for video from camera. + + @see GFVxBltSetCSCCoeff(), GFVxVIPSetCSCCoeff() +*/ +#define GFVX_SET_CSC_USE_CCIR601_RANGE 0x00800000 + +/** VxAPI option parameter of routines GFVxBltSetCSCCoefff() + and GFVxVIPSetCSCCoeff() to use full range in color space conversion + + CSC_USE_FULL_RANGE + 0<= Y <=255, -128<= U <=127, -128<= V <=127 + YUV-->RGB conversion formula: + + R = sat(KYRGB*(Y + YOF) + KUR*U + KVR*V) + G = sat(KYRGB*(Y + YOF) + KUG*U + KVG*V) + B = sat(KYRGB*(Y + YOF) + KUB*U + KVB*V) + + The CSC coefficients are: + + KYRGB, KUR, KVR 1.0000 0.0000 1.4020 + KYRGB, KUG, KVG = 1.0000 -0.3440 -0.7140 + KYRGB, KUB, KVB 1.0000 1.7720 0.0000 + + and YOF = 0.0000 + This option is useful for decoded video from movies. + @see GFVxBltSetCSCCoeff(), GFVxVIPSetCSCCoeff() +*/ +#define GFVX_SET_CSC_USE_FULL_RANGE 0x01000000 + +/** VxAPI option parameter of routines GFVxBltSetCSCCoefff() + and GFVxVIPSetCSCCoeff() to use user defined range + provided in option parameter pCoeff pointer to GFVXCSCCOEF struct + + @see GFVxBltSetCSCCoeff(), GFVxVIPSetCSCCoeff() +*/ +#define GFVX_SET_CSC_USE_USER_DEFINED_RANGE 0x02000000 +/** Structure to control GFVxBlt() behaviour. + @see GFVxBlt() +*/ + +typedef struct _GFVXBLT +{ + PGFRMSURFACE *ppDestSurf; /**< Pointer to an array of destination + surfaces of identical dimensions. + + For passing scaled YUV output data to + the planar block as input to the + JPEG/MPEG encoder, pass an array containing + one NULL pointer. + + Destination surface dimensions limitations: + + + + + + + +
      Minimum stride0 bytes
      Minimum width 1
      Minimum height1
      Maximum stride4095 bytes
      Maximum width 4064 (YUV) + (YUV data restricted by JPEG encoder),
      + 32767 (RGB) + (RGB data restricted by stride) +
      Maximum height32766, or unlimited + if \a pDestRect is specified
      + + If the destination color format is YUV (pass to + JPEG/MPEG EPP, and \a pDestRect is not specified, + the surface width must be a multiple of 2. + */ + PGFRMSURFACE *ppSrcSurf; /**< Pointer to an array of source surfaces + of identical dimensions. + Source surface dimensions limitations: + + + + + + + +
      Minimum stride0 bytes
      Minimum width 1
      Minimum height1
      Maximum stride4095 bytes
      Maximum width + 16383 (SC15), + 2032 (SC12), + 496 (SC5, RGB or YUV422), 512 (SC5), + 496 (SC10, SC4), + 312 (SC3 and below), + or unlimited if \a pSrcRect is specified +
      Maximum height32766, or unlimited + if \a pDestRect is specified
      + */ + PGFRECT pDestRect; /**< Destination rectangle, or NULL to blit + scaled to the size of the entire target + surface (size of first surface in + \a ppDestSurf is used). + Destination cropping rectangle limitations: + + + + + +
      Minimum width 1
      Minimum height1
      Maximum width 4064 (YUV), + 32767 (RGB) +
      Maximum height32766
      + + If the destination color format is YUV (pass to + JPEG/MPEG EPP), the destination cropping rectangle's + width must be a multiple of 2. + */ + PGFRECT pSrcRect; /**< Source cropping rectangle, or NULL for + no cropping and blit the entire source + surface (size of first surface in + \a ppSrcSurf is used). + Source cropping rectangle limitations: + + + + + +
      Minimum width 1
      Minimum height1
      Maximum width + 16383 (SC15), + 2032 (SC12), + 496 (SC5, RGB or YUV422), 512 (SC5), + 496 (SC10, SC4), + 312 (SC3 and below) +
      Maximum height32766
      + */ + NvU32 numofDestSurf;/**< Number of destination surfaces in array + \a ppDestSurf, used only if + #GFVX_AUTO_BLT flag set + */ + NvU32 numofSrcSurf; /**< Number of source surfaces in array + \a ppSrcSurf, used only if + #GFVX_AUTO_BLT flag or #GFVX_BLT_PARTIAL flag set + */ + NvU32 colorKey; /**< Color key value in RGB888 format */ + NvU32 BltOption; /**< Flag bitmask: + + + + + + + + + + + + + + + + +
      #GFVX_BLT_DISABLE_WAIT_VSYNCDisable VSync +
      #GFVX_BLT_SRC_KEYSource color key +
      #GFVX_AUTO_BLTAuto-blit at end of VIP frame +
      #GFVX_AUTO_DISPLAYAuto-show destination surface +
      #GFVX_AUTO_DISPLAY_OVERLAY2Auto-show destination surface from overlay window 2 +
      #GFVX_BLT_PARTIALConfigure partial blit parameters +
      #GFVX_BLT_PARTIAL_TRIGGERTrigger partial blit at end of circular buffer +
      #GFVX_BLT_ENABLE_WAIT_CAMERA_VSYNCEnable wait for camera VSYNC +
      + */ + // Fill The following fields if GFVX_BLT_PARTIAL_TRIGGER is set in BltOption + NvU32 FrameStart; /* @Notify start of frame. + Used only if #GFVX_BLT_PARTIAL_TRIGGER is set + in \a BltOption. + */ + NvU32 FrameEnd; /* @Notify end of frame. + Used only if #GFVX_BLT_PARTIAL_TRIGGER is set + in \a BltOption. + */ + NvU32 BufferIndex; /* @Specify which buffer of circular buffers is blitted. + Used only if #GFVX_BLT_PARTIAL_TRIGGER is set + in \a BltOption. + */ +} GFVXBLT, *PGFVXBLT; + +/** VxAPI GFVXFLIP::FlipOption flagbit: Flip uses second overlay window. + + By default, VxFlip associates foreground and background surfaces + to first overlay window and flips them. However, the application can override + the default behavior and use second overlay window by using this flag in FlipOption. + + This option should be used only if second overlay surface has been + previously set using UpdateOverlay(). . + + @version SC15 and above only + @see GFVXFLIP, GFVxFlip() +*/ +#define GFVX_FLIP_OVERLAY2 0x00000001 + +/** Structure to control GFVxFlip() behaviour. + @see GFVxFlip() +*/ +typedef struct _GFVXFLIP +{ + PGFRMSURFACE pBackGroundSurf; /**< Pointer to the surface to be flipped + to the background. This surface will + not be seen anymore after the + GFVxFlip() call. + */ + PGFRMSURFACE pForeGroundSurf; /**< Pointer to the surface to be flipped + to the foreground. This surface will + be seen after the GFVxFlip() call. + */ + NvU32 FlipOption; + /**< Flagbit mask controlling flip: + + + + + +
      0 Default. Flip uses first overlay window
      GFVX_FLIP_SECOND_OVERLAY Flip uses second overlay window
      + */ +} GFVXFLIP, *PGFVXFLIP; + + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay without rotation. + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_ROTATE_0 GF_SURFACE_ROTATE_0 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay with 180 degree rotation. + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_ROTATE_180 GF_SURFACE_ROTATE_180 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay with horizontal + flip. + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_H_FLIP 0x00000010 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay with vertical + flip. + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_V_FLIP 0x00000020 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Source color keying. + + A pixel from the source (overlay) surface is displayed only if pixel + color from the source surface matches the color key in + GFVXUPDATEOVERLAY::ColorKey. + + Source color keying is not useful for video overlay, because changing + video is the source. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay(), GFVX_UO_DEST_COLOR_KEY +*/ +#define GFVX_UO_SRC_COLOR_KEY 0x00010000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Destination color keying. + + A pixel from the source (overlay) surface is displayed only if pixel + color from the destination surface matches the color key in + GFVXUPDATEOVERLAY::ColorKey. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay(), GFVX_UO_SRC_COLOR_KEY +*/ +#define GFVX_UO_DEST_COLOR_KEY 0x00020000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Alpha blending. + Enable alpha blending. Alpha value is used from + GFVXUPDATEOVERLAY::AlphaValue. + + As AlphaVal increases, the weight of source (overlay) window increases + until the window reaches its maximum weight of 0xFF. + + Even though AlphaVal is a 32 bit number, alpha value can only be a 8 bit value. + Application should specify the same value in byte 1 (LSB), 2 and 3 else the API + will fail. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_ALPHA_BLENDING 0x00040000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay based on + destination alpha only. + + If destination is in 1-bit alpha format (eg ARGB1555), GFVXUPDATEOVERLAY::ColorKey bit[24] + contains the alpha value. GFVxUpdateOverlay() compares this value with + the target surface's alpha and ignores the RGB value. Overlay (source) surface + shows up in portions of the screen where the two match. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_COLOR_KEY_ALPHA_ONLY 0x00080000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay based on + destination alpha and color + + If destination is in 1-bit alpha format (eg ARGB1555), + GFVXUPDATEOVERLAY::ColorKey bit [24] contains alpha and + GFVXUPDATEOVERLAY::ColorKey bit [23:0] contains RGB color values. + GFVxUpdateOverlay() compares the key's alpha value and + color values with destination surface pixels. + + Overlay (source) surface shows up in portions of the screen where both + alpha and color values match. + + If neither #GFVX_UO_COLOR_KEY_ALPHA_ONLY nor #GFVX_UO_COLOR_KEY_ALPHA_COLOR are + set, GFVxUpdateOverlay() assumes the RGB values in + GFVXUPDATEOVERLAY::ColorKey to be valid and compares the RGB value with + surface's RGB value. Depending upon whether #GFVX_UO_SRC_COLOR_KEY or + #GFVX_UO_DEST_COLOR_KEY is defined, RGB value is compared with source or + destination pixels. If neither #GFVX_UO_SRC_COLOR_KEY nor #GFVX_UO_DEST_COLOR_KEY + is defined, overlay(source) surface is overlayed on top of destination surface + without any match. #GFVX_UO_COLOR_KEY_ALPHA_ONLY nor #GFVX_UO_COLOR_KEY_ALPHA_COLOR + if defined, are ignored. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_COLOR_KEY_ALPHA_COLOR 0x00100000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Alpha blending based on + destination alpha. + + If destination is in 1-bit alpha format (eg ARGB1555), + GFVXUPDATEOVERLAY::BlendingColorKey bit [24] contains an alpha value. + GFVxUpdateOverlay() compares this value with the destination surface's + alpha only and ignores the RGB value. + + If the two match, GFVXUPDATEOVERLAY::AlphaValue determines the weight + of source surface. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY 0x00200000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Alpha blending based on + destination alpha and color + + If destination is in 1-bit alpha format (eg ARGB1555), + GFVXUPDATEOVERLAY::BlendingColorKey bit [24] contains an alpha value and + GFVXUPDATEOVERLAY::BlendingColorKey bit [23:0] contains RGB values. + GFVxUpdateOverlay() compares alpha value and color value with the + destination surface's alpha and color value. + + Source and destination pixels appear blended in portions of the screen where both + alpha and color values match. GFVXUPDATEOVERLAY::AlphaValue determines the weight + of source surface. + + If neither #GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY nor #GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR + are set, GFVxUpdateOverlay() assumes the RGB portion in the key to be + valid and compares the RGB value with the surface's RGB value. + + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR 0x00400000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Enable Second overlay window + + SC15 supports two overlay windows. This flag is used to enable + the second overlay window. + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_OVERLAY2 0x00800000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Show this overlay window on top + + When more than one overlay windows are enabled and their destination rectangles + overlap, this flag can be defined to indicate which overlay window should appear + on top. + + By default, first overlay window will appear on top if destination + rectangles for the two windows overlap. However, application can override the + default behavior by specifying #GFVX_UO_ACTIVETOP flag in relevant windows's + UpdateOption. + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_ACTIVETOP 0x01000000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Overlay and Blend weight + comes from per-pixel alpha channel. + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_COLOR_KEY_PER_PIXEL_ALPHA 0x02000000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption flagbit: Enable digital vibrance for + overlay. + + If this bit is set in UpdateOption, then dvRed, dvGreen and dvBlue must be + set in UpdateOverlay structure for overlay window. + + If this bit is set in UpdateOption2, then dvRed2, dvGreen2 and dvBlue2 must be + set in UpdateOverlay structure for overlay2 window. + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_DIGITAL_VIBRANCE 0x04000000 + +/** VxAPI GFVXUPDATEOVERLAY::UpdateOption2 flagbit: Enable AlphaValue2 + + If this bit is set in UpdateOption2, then the alpha value is used + from GFVXUPDATEOVERLAY::AlphaValue2 + + @version SC15 and above only + @see GFVXUPDATEOVERLAY, GFVxUpdateOverlay() +*/ +#define GFVX_UO_USE_ALPHAVALUE2 0x08000000 + +/** Structure for controlling GFVxUpdateOverlay() behaviour. + @see GFVxUpdateOverlay() +*/ +typedef struct _GFVXUPDATEOVERLAY +{ + PGFRMSURFACE pDestSurf; /**< Destination surface pointer */ + PGFRMSURFACE pSrcSurf; /**< Source surface pointer, if this pointer + is NULL, disable overlay. + */ + PGFRECT pDestRect; /**< Destination rectangle */ + PGFRECT pSrcRect; /**< Source rectangle */ + NvU32 ColorKey; /**< Color key value in ARGB32 format. + Color keying takes effect only when + #GFVX_UO_SRC_COLOR_KEY or + #GFVX_UO_DEST_COLOR_KEY is set. + */ + NvU32 UpdateOption; + /**< Flagbit mask controlling rotation, color keying: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_UO_ROTATE_0 Overlay without rotation
      #GFVX_UO_ROTATE_180 Overlay with 180 degree rotation
      #GFVX_UO_H_FLIP Overlay with horizontal flip
      #GFVX_UO_V_FLIP Overlay with vertical flip
      #GFVX_UO_SRC_COLOR_KEY Source color keying
      #GFVX_UO_DEST_COLOR_KEY Destination color keying
      #GFVX_UO_ALPHA_BLENDING Alpha blending
      #GFVX_UO_COLOR_KEY_ALPHA_ONLY Overlay based on destination alpha
      #GFVX_UO_COLOR_KEY_ALPHA_COLOR Overlay based on destination alpha and color
      #GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY Alpha Blending based on destination alpha
      #GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR Alpha Blending based on destination alpha and color
      #GFVX_UO_OVERLAY2 Enable second overlay window
      #GFVX_UO_ACTIVETOP Show this overlay window on top
      #GFVX_UO_DIGITAL_VIBRANCE Enable digital vibrance for first overlay window
      + */ + NvU32 BlendingColorKey; + /**< Blending color key value in ARGB32 format. + Value takes effect only when #GFVX_UO_ALPHA_BLENDING and + (#GFVX_UO_SRC_COLOR_KEY or #GFVX_UO_DEST_COLOR_KEY) + are set. + */ + NvU32 AlphaValue; + /**< Alpha value for blending overlay. + Alpha value is used to do blending when + blending color key matches. Even though AlphaVal + is a 32 bit number, alpha value can only be a 8 bit value. + Application should specify the same value in byte 1 (LSB), + 2 and 3 else the API will fail. + */ + + PGFRMSURFACE pDestSurf2; /**< Destination surface pointer for second overlay */ + PGFRMSURFACE pSrcSurf2; /**< Source surface pointer for second overlay, + if this pointer is NULL, disable second overlay. + */ + PGFRECT pDestRect2; /**< Destination rectangle for second overlay */ + PGFRECT pSrcRect2; /**< Source rectangle for second overlay */ + NvU32 UpdateOption2; + /**< Flagbit mask controlling rotation, color keying for second overlay: + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_UO_ROTATE_0 Overlay without rotation
      #GFVX_UO_ROTATE_180 Overlay with 180 degree rotation
      #GFVX_UO_H_FLIP Overlay with horizontal flip
      #GFVX_UO_V_FLIP Overlay with vertical flip
      #GFVX_UO_SRC_COLOR_KEY Source color keying
      #GFVX_UO_DEST_COLOR_KEY Destination color keying
      #GFVX_UO_ALPHA_BLENDING Alpha blending
      #GFVX_UO_COLOR_KEY_ALPHA_ONLY Overlay based on destination alpha
      #GFVX_UO_COLOR_KEY_ALPHA_COLOR Overlay based on destination alpha and color
      #GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY Alpha Blending based on destination alpha
      #GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR Alpha Blending based on destination alpha and color
      #GFVX_UO_ACTIVETOP Show this overlay window on top
      #GFVX_UO_DIGITAL_VIBRANCE Enable digital vibrance for second overlay window
      + */ + NvU8 dvRed; /**< Digital vibrance amplification factor for R overlay. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvRed's valid value range + is 1 to 100. + */ + NvU8 dvGreen; /**< Digital vibrance amplification factor for G overlay. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvGreen's valid value range + is 1 to 100. + */ + NvU8 dvBlue; /**< Digital vibrance amplification factor for B overlay. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvBlue's valid value range + is 1 to 100. + */ + NvU8 dvRed2; /**< Digital vibrance amplification factor for R overlay2. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvRed2's valid value range + is 1 to 100. + */ + NvU8 dvGreen2; /**< Digital vibrance amplification factor for G overlay2. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvGreen2's valid value range + is 1 to 100. + */ + NvU8 dvBlue2; /**< Digital vibrance amplification factor for B overlay2. + It is configured via GFVxUpdateOverlay(), + GFVXUPDATEOVERLAY::dvBlue2's valid value range + is 1 to 100. + */ + NvU32 AlphaValue2; + /**< Alpha value for blending Window C overlay. + Same restriction as for GFVXUPDATEOVERLAY::AlphaValue apply. + */ + +} GFVXUPDATEOVERLAY, *PGFVXUPDATEOVERLAY; + + +/** Parameter structure for GFVxVIPFeedImage(). + This structure describes the image data that is to be fed to the VIP + via the CPU host. + @see GFVxVIPFeedImage() +*/ +typedef struct _GFVXVIPFEEDIMAGE +{ + PGFRMSURFACE pSurf; /**< Surface to feed data from, must be in a YUV + format and accessible by the host CPU + */ + PGFRECT pSrcRect; /**< Source clipping rectangle for data feeding, or + NULL for no clipping + */ +} GFVXVIPFEEDIMAGE, *PGFVXVIPFEEDIMAGE; + + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP supports image shrinking. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_SHRINK 0x00000001 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP supports image enlarging. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_ENLARGE 0x00000002 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: Parallel video input supported. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_PARALLEL 0x00000004 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: Serial video input supported. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_SERIAL 0x00000008 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: Vertical and horizontal flip supported + for VIP output RGB image. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_RGB_VH_FLIP 0x00000010 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can supply VClock and VHSync + signals to the camera chip. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_OUTPUT_VCLOCK_VHSYNC 0x00000020 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can supply a master clock to the + camera chip. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_OUTPUT_MASTER_CLOCK 0x00000040 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept a JPEG bitstream from + a camera with type A interface. + See section @ref pageVxOverview2 for description of type A, B, and C + interfaces. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_TYPE_A 0x00000080 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept a JPEG bitstream from + a camera with type B interface. + See section @ref pageVxOverview2 for description of type A, B, and C + interfaces. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_TYPE_B 0x00000100 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept a JPEG bitstream from + a camera with type C interface. + See section @ref pageVxOverview2 for description of type A, B, and C + interfaces. + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_TYPE_C 0x00000200 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept Bayer format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_BAYER 0x00000400 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept RGB565 format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_RGB565 0x00000800 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept RGB888 format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_RGB888 0x00001000 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept RGB444 format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_RGB444 0x00002000 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept YUV420NP format input. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_YUV420NP 0x00004000 + +/** VxAPI GFVXVIPPROPERTY::Flag flagbit: VIP can accept JPEG image from camera + through type C_RAW interface. See section @ref pageVxOverview2. + @version SC15 and above + @see GFVXVIPPROPERTY, GFVxVIPGetProperty(), GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CAP_TYPE_C_RAW 0x00008000 + +/** Structure used by GFVxVIPGetProperty() to describe VIP capabilities. + @see GFVxVIPGetProperty() +*/ +typedef struct _GFVXVIPPROPERTY +{ + NvU32 Flag; /**< Flag bitmask describing VIP capabilities: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_VIP_CAP_SHRINKVIP supports image shrinking
      #GFVX_VIP_CAP_ENLARGEVIP supports image enlarging
      #GFVX_VIP_CAP_PARALLELParallel video input supported
      #GFVX_VIP_CAP_SERIALSerial video input supported
      #GFVX_VIP_CAP_RGB_VH_FLIPVertical and horizontal flip supported for VIP + output RGB image
      #GFVX_VIP_CAP_OUTPUT_VCLOCK_VHSYNCVIP can supply VClock and VHSync signals to the + camera chip
      #GFVX_VIP_CAP_OUTPUT_MASTER_CLOCKVIP can supply a master clock to the + camera chip
      #GFVX_VIP_CAP_TYPE_AVIP can accept a JPEG bitstream from a camera with + type A interface
      #GFVX_VIP_CAP_TYPE_BVIP can accept a JPEG bitstream from a camera with + type B interface
      #GFVX_VIP_CAP_TYPE_CVIP can accept a JPEG bitstream from a camera with + type C interface
      #GFVX_VIP_CAP_BAYERVIP can accept Bayer format input
      #GFVX_VIP_CAP_RGB565VIP can accept RGB565 format input
      #GFVX_VIP_CAP_RGB888VIP can accept RGB888 format input
      #GFVX_VIP_CAP_RGB444VIP can accept RGB444 format input
      #GFVX_VIP_CAP_YUV420NPVIP can accept YUV420NP format input
      #GFVX_VIP_CAP_TYPE_C_RAWVIP can accept JPEG image from Camera through + type C_RAW interface
      + */ + NvU32 DestFormat;/**< Supported color formats at VIP output, the returned + value is a logically OR'ed combination of the + following surface identifiers: + + + + + + + + + + + + + + + +
      #GF_SURFACE_YUYVYUV422 in YUYV order
      #GF_SURFACE_YVYUYUV422 in YVYU order
      #GF_SURFACE_UYVYYUV422 in UYVY order
      #GF_SURFACE_VYUYYUV422 in VYUY order
      #GF_SURFACE_RGB565RGB565, 16 bpp
      #GF_SURFACE_RGB888RGB888, 24 bpp
      #GF_SURFACE_ARGB8888ARGB8888, 32 bpp
      + To check if a specific colour format is + supported, logically AND \a DestFormat against the + format identifier and compare it as below: + 
      +    if ((DestFormat & GF_SURFACE_RGB565) == GF_SURFACE_RGB565)
+    {
+        // RGB565 is supported
+    }
+
      + */ + NvU32 HMaxNumerator; /**< Maximum horizontal numerator for VI + decimation. VI decimation is configured via + GFVxVIPSetVIP(), GFVXVIPINFO::HNumerator's + valid value range is 1 to \a HMaxNumerator. + */ + NvU32 HMaxDenominator; /**< Maximum horizontal denominator for VI + decimation. VI decimation is configured via + GFVxVIPSetVIP(), GFVXVIPINFO::HDenominator's + valid value range is 1 to \a HMaxDenominator. + */ + NvU32 VMaxNumerator; /**< Maximum vertical numerator for VI decimation. + VI decimation is configured via + GFVxVIPSetVIP(), GFVXVIPINFO::VNumerator's + valid value range is 1 to \a VMaxNumerator. + */ + NvU32 VMaxDenominator; /**< Maximum vertical denominator for VI decimation. + VI decimation is configured via + GFVxVIPSetVIP(), GFVXVIPINFO::VDenominator's + valid value range is 1 to \a VMaxDenominator. + */ +} GFVXVIPPROPERTY, *PGFVXVIPPROPERTY; + + +/** Structure used to describe the input frame size if input data format is Bayer. + This structure is not used when input source is VIP. + @see +*/ +typedef struct _GFVXBAYERINPUTFRAME +{ + NvU16 Width; /**< Host Input source width. */ + NvU16 Height; /**< Host Input source height. */ +} GFVXBAYERINPUTFRAME, *PGFVXBAYERINPUTFRAME; + +/** Structure used to describe ISP scan size if input data format is Bayer. + Scan size is camera specific. + + The application should populate this structure with + values filled by GFCameraSetup() in GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo. + The application should also configure ISP with values in + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ScanWidth and + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ScanHeight. + + This structure is used only when input source is VIP and input data format is Bayer. + + @see GFISPIMGTIMING +*/ +typedef struct _GFVXBAYERSCANSIZE +{ + NvU16 HScan; /**< VIP input signal horizontal scan size. */ + NvU16 VScan; /**< VIP input signal vertical scan size. */ +} GFVXBAYERSCANSIZE, *PGFVXBAYERSCANSIZE; + +/** Structure used to describe ISP Active Area if input data format is Bayer. + Active Area is camera specific. + + The application should populate this structure with + values filled by GFCameraSetup() in GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo. + The application should also configure ISP with values in + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ActiveFrameStart, + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ActiveLineStart, + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ActiveFrameHeight and + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo::ActiveLineWidth. + + Active Area rectangle should fall inside the Scan Size. + This structure is used only when input source is VIP and input data format is Bayer. + + @see GFISPIMGTIMING +*/ +typedef struct _GFVXBAYERACTIVEAREA +{ + NvU16 LineStart; /**< VIP input signal horizontal active offset. */ + NvU16 FrameStart; /**< VIP input signal vertical active offset. */ + NvU16 LineWidth; /**< VIP input signal horizontal active width. */ + NvU16 FrameHeight; /**< VIP input signal vertical active height. */ +} GFVXBAYERACTIVEAREA, *PGFVXBAYERACTIVEAREA; + +/** Structure used to describe ISP Output Area if input data format is Bayer. + + This structure is not used by VI. It is used to configure ISP. + Output Area rectangle can be equal to or less than Active Area rectangle. + This structure is used only when input source is VIP and input data format is Bayer. + + @see GFISPIMGTIMING +*/ +typedef struct _GFVXBAYEROUTPUTAREA +{ + NvU16 LineStart; /**< VIP input signal horizontal output offset. */ + NvU16 FrameStart; /**< VIP input signal vertical output offset. */ + NvU16 LineWidth; /**< VIP input signal horizontal output width. */ + NvU16 FrameHeight; /**< VIP input signal vertical output height. */ +} GFVXBAYEROUTPUTAREA, *PGFVXBAYEROUTPUTAREA; + + +/** Structure used to describe the rectangles needed by ISP to properly process Bayer input from camera. + This structure is used only when input source is VIP and input data format is Bayer. + + @see GFVXBAYERINPUTFRAME, GFVXBAYERSCANSIZE, GFVXBAYERACTIVEAREA, GFVXBAYEROUTPUTAREA +*/ +typedef struct _GFVXBAYERINFO +{ + PGFVXBAYERINPUTFRAME pInputFrameSize; /**< For VIP input, this field is not used. + */ + PGFVXBAYERSCANSIZE pScanSize; /**< ISP Scan Size. + Scan size is camera specific. This field is set + by GFCameraAPI in GFCAMERARESOLUTIONTYPE::pBayerInfo. + */ + PGFVXBAYERACTIVEAREA pActiveArea; /**< ISP Active Area. + Active Area is camera specific. This field is set + by GFCameraAPI in + GFCAMERATABLETYPE::GFCAMERARESOLUTIONTYPE::pBayerInfo. + Active Area rectangle should fall inside the Scan Size. + */ + PGFVXBAYEROUTPUTAREA pOutputArea; /**< ISP Output Area. This field is not used by VI. + Output Area rectangle can be equal to or less than + Active Area rectangle. + */ + NvU8 DemosaicKernelSize; /**< For VIP input, this field is not used. + */ + NvU16 IspDownscaleUsed; /**< Use Isp downscale (Only for sc17 and above) + */ +} GFVXBAYERINFO, *PGFVXBAYERINFO; + + +///////////Cindy: Following is CSI defination. + +/* flags optoins */ + +/** Pixel Parser stream is from CSI A +*/ +#define GFVX_CSI_SOURCE_CSI_A 0x00000001 + +/** Pixel Parser stream is from CSI B +*/ +#define GFVX_CSI_SOURCE_CSI_B 0x00000002 + +/** Pixel Parser stream is from HOST +*/ +#define GFVX_CSI_SOURCE_HOST 0x00000004 + +/** Pixel Parser stream is from VIP +*/ +#define GFVX_CSI_SOURCE_VIP 0x00000008 + +/** Pixel Parser A enable +*/ +#define GFVX_CSI_PPA_ENABLE 0x00000010 + +/** Pixel Parser B enable +*/ +#define GFVX_CSI_PPA_DISABLE 0x00000020 + +//#define GFVX_CSI_PPA_MASK 0x00000030 + +/** Pixel Parser A enable +*/ +#define GFVX_CSI_PPB_ENABLE 0x00000040 + +/** Pixel Parser B enable +*/ +#define GFVX_CSI_PPB_DISABLE 0x00000080 + +//#define GFVX_CSI_PPB_MASK 0x000000C0 + +/** whether packet header is sent in the beginning of packet or not. payload only mode: no header +*/ +#define GFVX_CSI_PACKET_HEADER_ENABLE 0x00000100 + +/** Check data_type and Virtural_Channel_ID or not +*/ +#define GFVX_CSI_DATA_IDENTIFIER_ENABLE 0x00000200 + +/** check WordCount from header or register +*/ +#define GFVX_CSI_WORD_COUNT_SELECT_HEADER 0x00000400 + +/** check ECC from header +*/ +#define GFVX_CSI_HEADER_EC_DISABLE 0x00000800 + +/** pad short line with 0 +*/ +#define GFVX_CSI_LINE_PAD_NONE 0x00001000 + +/** pad short line with 1 +*/ +#define GFVX_CSI_LINE_PAD_1 0x00002000 + +/** pad short frame with 0 +*/ +#define GFVX_CSI_FRAME_PAD_NONE 0x00004000 + +/** pad short frame with 1 +*/ +#define GFVX_CSI_FRAME_PAD_1 0x00008000 + +/** 2 bytes CRC Check enable +*/ +#define GFVX_CSI_CRC_CHECK 0x00010000 + +/** Embedded data enable +*/ +#define GFVX_CSI_EMBEDDED_DATA_ENABLE 0x00020000 + +/** enable timeout checking +*/ +#define GFVX_CSI_LINE_TIMEOUT_ENABLE 0x00040000 + +#define GFVX_CSI_VSYNC_START_MARK_VSYNC 0x00080000 + +#define GFVX_CSI_VI_HSYNC_CONTROL 0x00100000 + +#define GFVX_CSI_VI_VSYNC_CONTROL 0x00200000 + + +typedef struct _GFVXCSISET +{ + NvU32 flags; /** flag options see above */ + NvU32 HOffset; /**< VIP input signal horizontal offset. */ + NvU32 HActive; /**< VIP input signal horizontal active width. */ + NvU32 VOffset; /**< VIP input signal vertical offset. */ + NvU32 VActive; /**< VIP input signal vertical active height.*/ + NvU32 ColorFormat; /** convert to data type*/ + +// PIXEL_STREAM_PPA_COMMAND: + NvU32 StartMarkerFrameMin; //CSI_PPA_START_MARKER_FRAME_MIN; /** comment */ + NvU32 StartMarkerFrameMax; //CSI_PPA_START_MARKER_FRAME_MAX; /** comment */ + +// PIXEL_STREAM_A_CONTROL0: + NvU32 VirtualChannelID; //CSI_PPA_VIRTUAL_CHANNEL_ID; /** stream virtual ID number */ + NvU32 OutputFormatOpt; //CSI_PPA_OUTPUT_FORMAT_OPTIONS; /** output format */ + +// PIXEL_STREAM_A_CONTROL1: + NvU32 TopFieldFrame; //CSI_PPA_TOP_FIELD_FRAME; /** camera spec */ + NvU32 TopFieldFrameMask; //CSI_PPA_TOP_FIELD_FRAME_MASK; /** camera sepc */ + +// PIXEL_STREAM_A_GAP: + NvU32 LineMinGap; //PPA_LINE_MIN_GAP; /** gap between lines */ + NvU32 FrameMinGap; //PPA_FRAME_MIN_GAP; /** gat between frames */ + +// PIXEL_STREAM_A_EXPECTED_FRAME: + NvU32 LineTimeOutMaxClock; //PPA_MAX_CLOCKS; /** line time out value */ + +} GFVXCSISET, *PGFVXCSISET; + +/* CSI data types + *` Set by camera script to match + * stream supplied by camera + */ + +#define GFVX_CSI_DATA_YUV420_8 (24UL) +#define GFVX_CSI_DATA_YUV420_10 (25UL) +#define GFVX_CSI_DATA_LEG_YUV420_8 (26UL) +#define GFVX_CSI_DATA_YUV420CSPS_8 (28UL) +#define GFVX_CSI_DATA_YUV420CSPS_10 (29UL) +#define GFVX_CSI_DATA_YUV422_8 (30UL) +#define GFVX_CSI_DATA_YUV422_10 (31UL) +#define GFVX_CSI_DATA_RGB444 (32UL) +#define GFVX_CSI_DATA_RGB555 (33UL) +#define GFVX_CSI_DATA_RGB565 (34UL) +#define GFVX_CSI_DATA_RGB666 (35UL) +#define GFVX_CSI_DATA_RGB888 (36UL) +#define GFVX_CSI_DATA_RAW6 (40UL) +#define GFVX_CSI_DATA_RAW7 (41UL) +#define GFVX_CSI_DATA_RAW8 (42UL) +#define GFVX_CSI_DATA_RAW10 (43UL) +#define GFVX_CSI_DATA_RAW12 (44UL) +#define GFVX_CSI_DATA_RAW14 (45UL) +#define GFVX_CSI_DATA_ARB_DT1 (48UL) +#define GFVX_CSI_DATA_ARB_DT2 (49UL) +#define GFVX_CSI_DATA_ARB_DT3 (50UL) +#define GFVX_CSI_DATA_ARB_DT4 (51UL) + + +/** OutputFormatOpt */ +#define GFVX_CSI_OUTPUT_FORMAT_OPTIONS_ARBITRARY (0UL) +#define GFVX_CSI_OUTPUT_FORMAT_OPTIONS_PIXEL (1UL) +#define GFVX_CSI_OUTPUT_FORMAT_OPTIONS_PIXEL_REP (2UL) +#define GFVX_CSI_OUTPUT_FORMAT_OPTIONS_STORE (3UL) + +#define GFVX_INTERNAL_DEBUG 0x10000000 + +// Below defines are used only when input source is HOST and input format is Bayer +// Since this is not a valid customer use case, we will not add Doxygen comments to these defines + +// Minimum padding requirement for ISP +#define MIN_SCANSIZE_WIDTH_DIFF 20 +#define MIN_SCANSIZE_HEIGHT_DIFF 10 + +// The actual minimum padding has not been determined; +// however, 30 padding on all sides is not enough for +// Demosaic mode 4 (5X5BPNR) with M3 statistics gathering. +// 35 on right + 15 on top/left/bottom seems to +// work fine. +#define MIN_ACTIVE_AREA_LEFT_PADDING 15 +#define MIN_ACTIVE_AREA_RIGHT_PADDING 35 +#define MIN_ACTIVE_AREA_TOP_PADDING 15 +#define MIN_ACTIVE_AREA_BOTTOM_PADDING 15 + +// Active Rect must be a few pixels larger than Output Rect to avoid +// a halo effect where the outer pixels are wrong. +#define MIN_OUTPUT_AREA_PADDING_3X3 2 +#define MIN_OUTPUT_AREA_PADDING_5X5 3 + + +/** Parameter structure passed to GFVxVIPSetVIP(). + @see GFVxVIPSetVIP() +*/ +typedef struct _GFVXVIPINFO +{ + NvU32 Flag; + /**< Flag bitmask, OR'ed combination of: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_VIP_PARALLEL_INPUT8-bit/clock video data
      #GFVX_VIP_SERIAL_INPUTSerial input
      #GFVX_VIP_HVSYNC_IN_STREAMVHSYNC and VVSYNC in the data stream
      #GFVX_VIP_EXTERNAL_VHSYNCCamera VHSYNC asserted by external signal
      #GFVX_VIP_INTERNAL_VHSYNCCamera VHSYNC generated by GoForce chip
      #GFVX_VIP_EXTERNAL_VCLKVCLK generated externally
      #GFVX_VIP_INTERNAL_VCLKVCLK generated by GoForce chip
      #GFVX_VIP_DETECT_FIELDDetect field 0 or 1, will not work for internal VHSYNC + (#GFVX_VIP_INTERNAL_VHSYNC) +
      #GFVX_VIP_RGB_H_FLIPHorizontal flip
      #GFVX_VIP_RGB_V_FLIPVertical flip
      #GFVX_VIP_HOST_IMAGECPU feeds image to VIP
      #GFVX_VIP_CHANGE_DEFAULT_TIMINGChange the default timing for VHSYNC and VCLK
      #GFVX_VIP_ASK_FOR_MCLOCKCamera master clock provided by GoForce chip
      #GFVX_VIP_TYPE_AVIP input type A interface
      #GFVX_VIP_TYPE_BVIP input type B interface
      #GFVX_VIP_TYPE_CVIP input type C interface
      #GFVX_VIP_DEST_BYTE_SWAPEnable destination byte swap for YUV/RGB data written to + preview surface +
      #GFVX_VIP_TYPE_C_RAWDo not remove the 0xFF, 0x02 sequence when camera is + running at type C interface +
      #GFVX_VIP_VIP_ROTATE_0VI output without rotation
      #GFVX_VIP_VIP_ROTATE_90VI output with 90 degree rotation
      #GFVX_VIP_VIP_ROTATE_180VI output with 180 degree rotation
      #GFVX_VIP_VIP_ROTATE_270VI output with 270 degree rotation
      #GFVX_VIP_RGB565RGB565 input to EPP
      #GFVX_VIP_RGB888RGB888 input to EPP
      #GFVX_VIP_RGB444RGB444 input to EPP
      #GFVX_VIP_BYPASS_MCLOCK_PINBypass any manipulation on internal master clock generation + output pin +
      #GFVX_VIP_BYPASS_NON_MCLOCK_PINSBypass any manipulation on VCLK, VHSYNC, and VID[7:0] pins +
      #GFVX_VIP_PRE_GENERATE_MCLOCKPre-generation of master clock
      + */ + NvU32 HOffset; /**< VIP input signal horizontal offset. */ + NvU32 HActive; /**< VIP input signal horizontal active width. */ + NvU32 VOffset; /**< VIP input signal vertical offset. */ + NvU32 VActive; /**< VIP input signal vertical active height. */ + NvU32 ColorFormat; /**< VIP input color format identifier, see + GFRMSURFACE::ColorFormat. + */ + NvU32 SerialDelay; /**< VIP serial input delay, reserved for future + use. + */ + NvU32 NewTiming; /**< Flag bitmask configuring VIP input timing, used + only if flag #GFVX_VIP_CHANGE_DEFAULT_TIMING + set, OR'ed combination of: + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_VIP_PDL_FALLING_VCLKParallel data latched at falling edge + of VCLK (default is rising edge) +
      #GFVX_VIP_SDL_RISING_VCLKSerial data lacthed at rising edge of + VCLK (default is falling edge) +
      #GFVX_VIP_VHSYNC_ACTIVE_LOWVHSYNC active low (default is active + high) +
      #GFVX_VIP_VVSYNC_ACTIVE_LOWVVSYNC active low (default is active + high) +
      #GFVX_VIP_VHSYNC_ACTIVE_EDGE_LEADVHSYNC active leading edge (default + is trailing edge) +
      #GFVX_VIP_VVSYNC_ACTIVE_EDGE_LEADVVSYNC active leading edge (default + is trailing edge) +
      #GFVX_VIP_SFRAME_ACTIVE_LOWSerial video frame sync active low, + falling edge indicates start of data + frame (default is active high, rising + edge indicates start of data frame) +
      #GFVX_VIP_SFRAME_SIZE_16Serial video input is 16 bit per frame + (default is 8 bit per frame) +
      #GFVX_VIP_FILED_0_BOTTOMField 0 is bottom/even field + (default is top/odd field) +
      #GFVX_VIP_VCLK_OUTPUT_ACTIVE_LOWVCLK output from GoForce chip active + low (default is active high) +
      + */ + NvU32 HNumerator; /**< VI decimation horizontal numerator, number of + pixels to keep from a group of incoming + pixels. + */ + NvU32 HDenominator;/**< VI decimation horizontal denominator, group + size. + */ + NvU32 VNumerator; /**< VI decimation vertical numerator, number of + lines to keep from a group of incoming lines. + */ + NvU32 VDenominator;/**< VI decimation vertical numerator, group + size. + */ + NvU32 MClockFreq; /**< Master clock frequency supplied to camera from + GoForce chip, used only if + #GFVX_VIP_ASK_FOR_MCLOCK set. + */ + NvU32 VClockFreq; /**< Clock frequency required for VIP input signal. + */ + + // Fill The following fields if GFVX_VIP_INTERNAL_VHSYNC is set in Flag + NvU32 VHPulseWidth; /**< VHSYNC pulse width in number of VCLK cycles, + valid range is 1 to 8. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + NvU32 VHPulsePeriod;/**< VHSYNC pulse period in number of VCLK cycles, + valid range 32 to 2048. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + NvU32 VVPulseWidth; /**< VVSYNC pulse width in number of VCLK cycles + valid range is 1 to 8. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + NvU32 VVPulsePeriod;/**< VVSYNC pulse period in number of VCLK + valid range 32 to 1024. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + NvU32 VVDelay; /**< Number of VCLK cycles from the leading edge + of VHSYNC to the leading edge of VVSYNC, + valid range is -2 to 13. Used only if + #GFVX_VIP_INTERNAL_VHSYNC is set. + */ + PGFVXBAYERINFO pBayerInfo; /**< Structure used to describe the rectangles needed by ISP + to properly process Bayer input from camera. This + structure is used only when input source is VIP and + input data format is Bayer. + */ + PGFVXCSISET pCSIInfo; /** Structure used to describe CSI stream info. Only used when input source is CSI stream + */ +} GFVXVIPINFO, *PGFVXVIPINFO; + + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Start VIP data feeding. + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_START 0x00000001 + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Stop VIP data feeding. + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_STOP 0x00000002 + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Start VIP data feeding with + synchronized auto-display surface after a frame is captured from VIP. + If no output surface is set (GFVXVIPUPDATE::ppSurf is NULL), this action + behaves in the same way as #GFVX_VIP_START. + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_AUTO_FLIP (0x00000004 | GFVX_VIP_START) + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Start VIP data feeding with + synchronized auto-blit from VIP output surface to another surface. + + Parameters for the blit have to be set up separately via GFVxBlt() with + flag #GFVX_AUTO_BLT. Auto-blit is triggered after a complete frame has + been captured from VIP. + + If no output surface is set (GFVXVIPUPDATE::ppSurf is NULL), this action + behaves in the same way as #GFVX_VIP_START. + + Once auto-blit has been enabled it can be disabled with GFVxVIPUpdate() + action identifier #GFVX_VIP_AUTO_TRIGER_BLT_OFF. + + @see GFVXVIPUPDATE, GFVxVIPUpdate(), #GFVX_VIP_AUTO_TRIGER_BLT_OFF, + #GFVX_AUTO_BLT +*/ +#define GFVX_VIP_AUTO_TRIGER_BLT (0x00000008 | GFVX_VIP_START) + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Stop auto-blit that has been + enabled earlier via #GFVX_VIP_AUTO_TRIGER_BLT. + + Note that this action only disables auto-blit. It does not disable the + VIP data feed. If also VIP is to be disabled, GFVxVIPUpdate() has to be + called again with action #GFVX_VIP_STOP. + + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_AUTO_TRIGER_BLT_OFF 0x00000010 + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Start VIP data feeding with + synchronized auto-display surface after a frame is captured from VIP. + Second Overlay Window is used instead of first. + If no output surface is set (GFVXVIPUPDATE::ppSurf is NULL), this action + behaves in the same way as #GFVX_VIP_START. + + @version SC15 and above only + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_AUTO_FLIP_OVERLAY2 (0x00000020 | GFVX_VIP_START) + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Capture one frame in VIP buffer + if it is combined with flag #GFVX_VIP_START + + @version SC15 and above only + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_CAPTURE_ONE_FRAME 0x00000040 + +/** VxAPI GFVXVIPUPDATE::UpdateOption action: Restart VIP without changes VI + state after stop VI + + @version SC15 and above only + @see GFVXVIPUPDATE, GFVxVIPUpdate() +*/ +#define GFVX_VIP_RESTART 0x00000080 + +/** Parameter structure for GFVxVIPUpdate(). + @see GFVxVIPUpdate() +*/ +typedef struct _GFVXVIPUPDATE +{ + PGFRMSURFACE *ppSurf; /**< Pointer to an array of VIP output surfaces + pointers, or NULL to feed to MPEG/JPEG without + display. + */ + NvU32 numofSurf; /**< Number of surface pointers in \a ppSurf, valid + range is 1 to 2. + */ + NvU16 XStart; /**< Destination surface X position for the output + from VIP + */ + NvU16 YStart; /**< Destination surface Y position for the output + from VIP + */ + NvU32 UpdateOption; + /**< Action identifier, one of: + + + + + + + + + + + +
      #GFVX_VIP_STARTStart VIP data feeding
      #GFVX_VIP_STOPStop VIP data feeding
      #GFVX_VIP_AUTO_FLIPStart VIP data feeding and enable + auto-display of the last VIP target + surface +
      #GFVX_VIP_AUTO_TRIGER_BLTStart VIP data feeding and enable + auto-blit from the last target surface + to additional surfaces +
      #GFVX_VIP_AUTO_TRIGER_BLT_OFFDisable auto-blit
      + */ +} GFVXVIPUPDATE, *PGFVXVIPUPDATE; + +/** VxAPI VxBlt operation modes. + Constants to specify SB mode for a call to GFVxBltSetCSCCoeff(). + @see GFVxBltSetCSCCoeff(), GFVxBltGetCSCCoeff() +*/ +typedef enum +{ + /** Host full frame stretchblt trigger */ + GFVX_BLT_FULL_MODE, + + /** Host partial frame stretchblt trigger */ + GFVX_BLT_PARTIAL_MODE, + + /** Auto stretchblt trigger from VI */ + GFVX_BLT_AUTO_VI_MODE +} GFVXBLTMODE; + +/** VxAPI component level interrupt operation types. + Constants to specify operation for a call to GFVxInterruptControl(). + @see GFVX_INTERRUPT_TYPE, GFVxInterruptControl() +*/ +typedef enum +{ + /** Enable interrupt/status assertion for an interrupt type. */ + GFVX_INTERRUPT_ENABLE, + + /** Disable interrupt/status assertion for an interrupt type. */ + GFVX_INTERRUPT_DISABLE, + + /** Clear interrupt/status assertion for an interrupt type. */ + GFVX_INTERRUPT_CLEAR, + + /** Query for interrupt/status assertion for an interrupt type. */ + GFVX_INTERRUPT_QUERY_STATUS, + + /** Set Y-FIFO threshold. */ + GFVX_INTERRUPT_SET_Y_FIFO_THRESHOLD, + + /** Get Y-FIFO threshold. */ + GFVX_INTERRUPT_GET_Y_FIFO_THRESHOLD, + + /** Set V-counter threshold. */ + GFVX_INTERRUPT_SET_V_COUNTER_THRESHOLD, + + /** Get V-counter threshold. */ + GFVX_INTERRUPT_GET_V_COUNTER_THRESHOLD, + + /** Get all bits of VI interrupt status register. */ + GFVX_INTERRUPT_GET_ALL_STATUS, + + /** Clear all VI interrupt status bits. */ + GFVX_INTERRUPT_CLEAR_ON_ALL_STATUS + +} GFVX_INTERRUPT_OPERATION_TYPE; + +/** VxAPI interrupt types. + @see GFVX_INTERRUPT_OPERATION_TYPE, GFVxInterruptControl() +*/ +typedef enum +{ + /** VID[8] pin rising edge interrupt. */ + GFVX_VD8PIN_RISING_EDGE_INTR = 0x0100001, + /** VID[9] pin rising edge interrupt. */ + GFVX_VD9PIN_RISING_EDGE_INTR = 0x0100002, + /** VID[10] pin rising edge interrupt. */ + GFVX_VD10PIN_RISING_EDGE_INTR = 0x0100004, + /** VID[11] pin rising edge interrupt. */ + GFVX_VD11PIN_RISING_EDGE_INTR = 0x0100008, + /** VGP[4] pin rising edge interrupt. */ + GFVX_VGP4PIN_RISING_EDGE_INTR = 0x0100010, + /** VGP[5] pin rising edge interrupt. */ + GFVX_VGP5PIN_RISING_EDGE_INTR = 0x0100020, + /** VGP[6] pin rising edge interrupt. */ + GFVX_VGP6PIN_RISING_EDGE_INTR = 0x0100040, + /** VHSYNC pin rising edge interrupt. */ + GFVX_VHSYNC_RISING_EDGE_INTR = 0x0100080, + /** VVSYNC pin rising edge interrupt. */ + GFVX_VVSYNC_RISING_EDGE_INTR = 0x0100100, + + /** Vertical counter threshold interrupt. */ + GFVX_VERTICAL_COUNTER_THRESHOLD_INTR = 0x0000200, + /** Y-FIFO threshold int. */ + GFVX_Y_FIFO_THRESHOLD_INTR = 0x0000400, + /** Buffer done first output interrupt. */ + GFVX_BUFFER_FIRST_OUTPUT_INTR = 0x0000800, + /** Frame done first output interr upt. */ + GFVX_FRAME_FIRST_OUTPUT_INTR = 0x0001000, + /** Buffer done second output interrupt. */ + GFVX_BUFFER_SECOND_OUTPUT_INTR = 0x0002000, + /** Frame done second output interrupt. */ + GFVX_FRAME_SECOND_OUTPUT_INTR = 0x0004000, + /** VI to EPP error interrupt. */ + GFVX_EPP_ERROR_INTR = 0x0008000, + /** YUV420PA error interrupt. */ + GFVX_YUV420PA_ERROR_INTR = 0x0010000, + /** First output peer stall interrupt. */ + GFVX_FIRST_OUTPUT_PEER_STALL_INTR = 0x0020000, + /** Second output peer stall interrupt. */ + GFVX_SECOND_OUTPUT_PEER_STALL_INTR = 0x0040000, + /** DMA stall interrupt. */ + GFVX_DMA_STALL_INTR = 0x0080000, + + + /** VD[8] pin falling edge interrupt. */ + GFVX_VD8PIN_FALLING_EDGE_INTR = 0x0000001, + /** VD[9] pin falling edge interrupt. */ + GFVX_VD9PIN_FALLING_EDGE_INTR = 0x0000002, + /** VD[10] pin falling edge interrupt. */ + GFVX_VD10PIN_FALLING_EDGE_INTR = 0x0000004, + /** VD[11] pin falling edge interrupt. */ + GFVX_VD11PIN_FALLING_EDGE_INTR = 0x0000008, + /** VGP[4] pin falling edge interrupt. */ + GFVX_VGP4PIN_FALLING_EDGE_INTR = 0x0000010, + /** VGP[5] pin falling edge interrupt. */ + GFVX_VGP5PIN_FALLING_EDGE_INTR = 0x0000020, + /** VGP[6] pin falling edge interrupt. */ + GFVX_VGP6PIN_FALLING_EDGE_INTR = 0x0000040, + /** VHSYNC pin falling edge interrupt. */ + GFVX_VHSYNC_FALLING_EDGE_INTR = 0x0000080, + /** VVSYNC pin falling edge interrupt. */ + GFVX_VVSYNC_FALLING_EDGE_INTR = 0x0000100, + + /** VD[8] pin rising edge interrupt. */ + GFVX_VD8PIN_RISING_LEVEL_INTR = 0x1100001, + /** VD[9] pin rising edge interrupt. */ + GFVX_VD9PIN_RISING_LEVEL_INTR = 0x1100002, + /** VD[10] pin rising edge interrupt. */ + GFVX_VD10PIN_RISING_LEVEL_INTR = 0x1100004, + /** VD[11] pin rising edge interrupt. */ + GFVX_VD11PIN_RISING_LEVEL_INTR = 0x1100008, + /** VGP[4] pin rising edge interrupt. */ + GFVX_VGP4PIN_RISING_LEVEL_INTR = 0x1100010, + /** VGP[5] pin rising edge interrupt. */ + GFVX_VGP5PIN_RISING_LEVEL_INTR = 0x1100020, + /** VGP[6] pin rising edge interrupt. */ + GFVX_VGP6PIN_RISING_LEVEL_INTR = 0x1100040, + /** VHSYNC pin rising edge interrupt. */ + GFVX_VHSYNC_RISING_LEVEL_INTR = 0x1100080, + /** VVSYNC pin rising edge interrupt. */ + GFVX_VVSYNC_RISING_LEVEL_INTR = 0x1100100, + + /** VD[8] pin falling level interrupt. */ + GFVX_VD8PIN_FALLING_LEVEL_INTR = 0x1000001, + /** VD[9] pin falling level interrupt. */ + GFVX_VD9PIN_FALLING_LEVEL_INTR = 0x1000002, + /** VD[10] pin falling level interrupt. */ + GFVX_VD10PIN_FALLING_LEVEL_INTR = 0x1000004, + /** VD[11] pin falling level interrupt. */ + GFVX_VD11PIN_FALLING_LEVEL_INTR = 0x1000008, + /** VGP[4] pin falling level interrupt. */ + GFVX_VGP4PIN_FALLING_LEVEL_INTR = 0x1000010, + /** VGP[5] pin falling level interrupt. */ + GFVX_VGP5PIN_FALLING_LEVEL_INTR = 0x1000020, + /** VGP[6] pin falling level interrupt. */ + GFVX_VGP6PIN_FALLING_LEVEL_INTR = 0x1000040, + /** VHSYNC pin falling level interrupt. */ + GFVX_VHSYNC_FALLING_LEVEL_INTR = 0x1000080, + /** VVSYNC pin falling level interrupt. */ + GFVX_VVSYNC_FALLING_LEVEL_INTR = 0x1000100 + +} GFVX_INTERRUPT_TYPE; + +/** VxAPI related attributes. + @see GFVxGetAttribute() +*/ +typedef enum _GFVXATTRIBUTES +{ + /** VxAPI attribute: Video input interrupt status. + Use this attribute with GFVxGetAttribute() to read the current video + input interrupt status. + + Interpretation of associated attribute value: + 
      +        NvU32 Bitmask with interrupt status
+              For bitpositions see the VI status register in the GoForce
+              technical manual (Register VI11 on SC12)
+
      + + Attribute is get only. + + @see GFVxGetAttribute() + */ + GFVX_ATTR_VIDEO_BUF, + + /** VxAPI attribute: Video VIP input status. + Use this attribute with GFVxGetAttribute() to read the current number + of frames received + */ + + GFVX_ATTR_VIP_INPUT_FRAME_COUNT, + + /** VxAPI attribute: Video VIP input status. + Use this attribute with GFVxGetAttribute() to read the current number + of lines received + */ + + GFVX_ATTR_VIP_INPUT_LINE_COUNT, + +} GFVXATTRIBUTES; + +/** YUV Color Space Conversion (CSC) coefficients. + Parameter structure for GFVxVIPSetCSCCoeff(), GFVxBltSetCSCCoeff(), + GFVxVIPGetCSCCoeff(), and GFVxBltGetCSCCoeff() + + YUV color space conversion is used when converting from a YUV formatted + surface to RGB formatted surface. The YUV color space conversion formular + appears as follows: + + R = sat(KYRGB*(Y + YOF) + KUR*U + KVR*V) + G = sat(KYRGB*(Y + YOF) + KUG*U + KVG*V) + B = sat(KYRGB*(Y + YOF) + KUB*U + KVB*V) + + By default, the YUV color space conversion coefficients are: + + KYRGB, KUR, KVR 1.1644 0.0000 1.5960 + KYRGB, KUG, KVG = 1.1644 -0.3918 -0.8130 + KYRGB, KUB, KVB 1.1644 2.0172 0.0000 + + and YOF = -16.0000 + + The value corresponding to each of these YUV color space conversion + coefficients is a Q16 (signed 15.16 fixed point value). + + For examples: + YOF = -16.0000, the value corresponding is 0xFFF00000 + KYRGB = 1.1644, the value corresponding is 0x00012A16 + KVR = 1.5960, the value corresponding is 0x00019893 + KUG = -0.3918, the value corresponding is 0xFFFF9BB3 + KVG = -0.8130, the value corresponding is 0xFFFF2FE0 + KUB = 2.0172, the value corresponding is 0x00020467 +*/ +typedef struct _GFVXCSCCOEF +{ + NvU32 YOF; + NvU32 KYRGB; + NvU32 KUR; + NvU32 KVR; + NvU32 KUG; + NvU32 KVG; + NvU32 KUB; + NvU32 KVB; +} GFVXCSCCOEF; + + +// Typesafe functions for opening and closing this component +GF_RETTYPE GFVxOpen(GFRmHandle hRm, GFVxHandle *phVx, + GF_STATE_TYPE state, GFRmChHandle hCh); +void GFVxClose(GFVxHandle *phVx); + +/** @name Functions +@{*/ + +/** This function returns version and capabilities of API and hardware. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pVXProp (#PGFPROPERTY) Pointer to property structure to be + filled in + + @retval #GF_SUCCESS \a pJXProp filled in successfully + @retval #GF_ERROR Some error occured + + This function returns information about the VxAPI, including the following: + - VxAPI module version + - VIP support + - Overlay support + - MPEG decoding and encoding + - JPEG decoding and encoding + + The #GFPROPERTY structure passed with parameter \a pVXProp will be + filled in on successfull return. The #GFPROPERTY::Capability field + will hold a combination of flagbits indicating capabilities specific + to the VxAPI: + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_CAP_CSCColor space conversion supported
      #GFVX_CAP_VIPVIP functions available
      #GFVX_CAP_ENLARGEEnlarge source image supported
      #GFVX_CAP_SHRINKShrink source image supported
      #GFVX_CAP_COLOR_CONTROLColor control supported
      #GFVX_CAP_OVERLAYOverlay supported
      #GFVX_CAP_MPEGDECMPEG4 decoder supported
      #GFVX_CAP_MPEGENCMPEG4 encoder supported
      #GFVX_CAP_JPEGDECJPEG decoder supported
      #GFVX_CAP_JPEGENCJPEG encoder supported
      #GFVX_CAP_ALPHA_BLENDAlpha blending supported
      #GFVX_CAP_EXTEND_RGBExtended RGB format 32 bpp supported
      #GFVX_CAP_OVERLAY_YUVYUV overlay supported
      #GFVX_CAP_OVERLAY_SCALEOverlay with scaling supported
      #GFVX_CAP_OVERLAY_MULTIPLEMultiple overlay supported
      #GFVX_CAP_ENCODE_TYPEVariable sized data camera interface (Type A/B/C) supported
      + + It is a good practice to call this function to query for the API version + and its capabilities before using the rest of the JxDecAPI functions. + + @see GFPROPERTY +*/ +GF_RETTYPE GFVxGetProperty(GFVxHandle VxHandle, PGFPROPERTY pVvProp); + +/** Stretch-blit rectangular area from source to destination surface. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pBlt (#PGFVXBLT) Pointer to #GFVXBLT structure + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function copies a rectangular area from a source surface to a + rectangle in the destination surface. If source and destination + rectangles differ in size, the GPU's stretch blit (SB) unit scales the + source data to fit the destination rectangle. If the source and destination + surfaces have different color formats, GFVxBlt() provides limited color + format conversions. + + Source and Destination surfaces have to be in GPU memory. Source surfaces + can be in YUV420, YUV422, or RGB565 format. Destination surfaces can be + in RGB565, RGB888 (SC12), or ARGB8888 (SC12 SC15) format. YUV output can also + be routed to EPP for encoding. + + Color format conversions from a YUV420 or YUV422 source are supported for these + destination formats: + - RGB565 + - ARGB8888 (SC12 SC15) + - RGB888 (SC12) + + A #GFVXBLT control structure is passed with parameter \a pBlt. + GFVXBLT::ppDestSurf points to an array of destination surface pointers, + with the number of pointers in this array specified by + GFVXBLT::numofDestSurf. GFVXBLT::ppSrcSurf points to an array of source + surface pointers, with the size of this array specified by + GFVXBLT::numofSrcSurf. + + When the destination surface pointer is NULL, output of SB goes + to EPP for encoding. + + See #GFVXBLT for minimum and maximum specifications of source and destination + rectangle sizes. + + Instant Blit Mode + + In this mode of operation, the blit is executed immediately via the command + FIFO. It is always performed from the first surface in GFVXBLT::ppSrcSurf + to the first surface in GFVXBLT::ppDestSurf. Other pointers in these + arrays are ignored. + + Auto Blit Mode + + VxBlt() can be used to enable auto-blit mode (flag #GFVX_AUTO_BLT + in GFVXBLT::BltOption). Whenever the end of a frame coming from VIP is + reached, SB will be fired automatically with the parameters set in GFVXBLT. + Auto-blit mode remains set until it is reset by another auto-blit command. + During auto-blit mode, manual SB commands should save and restore SB + registers (SC12 and below). This is not required for SC15 and above because + they have three hardware contexts: one for auto-blit, one for host trigger + (manual SB commands) and one for host partial trigger. + + The first time auto-blit is fired, the first surface in GFVXBLT::ppSrcSurf + is copied to the first surface in GFVXBLT::ppDestSurf. In subsequent blits, + the source and destination arrays are walked through subsequently. If + there is only one surface in the GFVXBLT::ppSrcSurf or GFVXBLT::ppDestSurf + arrays, only this one is used. + + Note that VxBlt() only sets auto-blit parameters. It is actually enabled by + GFVxVIPUpdate() using action #GFVX_VIP_AUTO_TRIGER_BLT, or GFMxDecSetMBs(). + + Auto Display + + If auto-display (#GFVX_AUTO_DISPLAY or #GFVX_AUTO_DISPLAY_OVERLAY2) is on, + GFVxBlt() automatically shows the destination surface on the screen. + The application does not need to call GFVxFlip() to show the surface. + Auto-display can be combined with both auto-blit and instant-blit modes. + + Color Keying + + If source color keying (#GFVX_BLT_SRC_KEY) is set, all pixels from the + source surface matching GFVXBLT::colorKey are transparent (not copied). + + VSync Synchronisation + + By default all blits are synchronized to display VSync. Note that blits + may block, if the display is disabled. Flag #GFVX_BLT_DISABLE_WAIT_VSYNC + can be used to disable VSync synchronisation. + + @see GFVXBLT +*/ +GF_RETTYPE GFVxBlt(GFVxHandle VxHandle, PGFVXBLT pBlt); + +/** Activate surface for display. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pFlip (#PGFVXFLIP) Pointer to #GFVXFLIP structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If ColorFormat is unsupported + + This function changes the display buffer address from one surface to + another. + + This function displays #GFVXFLIP::pForeGroundSurf. If + GFVXFLIP::pForeGroundSurf is an overlay surface, this function displays + that surface to the destination rectangle that has been set by + GFVxUpdateOverlay(). + + If GFVXFLIP::pForeGroundSurf is not an overlay surface, this function + displays the entire surface. In this case GFVxFlip() can show either the + primary surface or an offscreen surface on the display screen. + + If there is only one surface for primary or overlay, GFVxFlip() should not + be called. + + @see GFVXFLIP +*/ +GF_RETTYPE GFVxFlip(GFVxHandle VxHandle, PGFVXFLIP pFlip); + +/** Configure properties of overlay (WinB) display. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pOverlay (#PGFVXUPDATEOVERLAY) Pointer to #GFVXUPDATEOVERLAY structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_SURFACETYPE_NOT_SUPPORTED If Source SurfaceType is unsupported + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If Source ColorFormat is unsupported + @retval GFVX_ERROR_ILLEGAL_ALPHA_VALUE If Alpha Value is incorrect + + This function controls overlay (WinB) display, setting the following + features: + - Destination and source rectangle areas + - Rotation for overlay surface + - Color keying + - Alphablending Color Key (GoForce 4800 and above) + - Foreground and Background alpha values. (GoForce 4800 and above) + - Destination surface color format (RGB888, ARGB8888 for GoForce 4800 and + above) + + SC15 supports the following overlay surface orientations - 0 degree rotated, + 180 degree rotated, horizont flip, vertical flip. Overlay surface orientation + is always relative to the orientaton of primary surface. For eg. if primary + surface is 180 degree rotated and requested overlay surface orientation is + 0 degree rotated, then overlay surface will be 180 degree rotated. + + This function supports the following source surface type - GF_SURFACE_OVERLAY. + It supports the following source surface colorformats - RGB565, ARGB8888, ARGB1555, + ARGB4444. + + In order to work around a hardware bug in SC12, in which the GC displays + pixels at the end of the line that are 64 pixels back from the end of + the line, the overlay window width will be aligned to 4-pixels. + + If GFVXUPDATEOVERLAY::pSrcSurf is NULL then overlay display is disabled. + + This function will have no effect, if the GoForce media processor version + does not support overlays. This can be checked via the #GFVX_CAP_OVERLAY + attribute with GFVxGetProperty(). + + Color Keying + + With color keying pixels from the overlay surface can be masked (made + transparent). It can be enabled in different modes of operation by setting + one of the following flags in GFVXUPDATEOVERLAY::UpdateOption: + - #GFVX_UO_SRC_COLOR_KEY + - #GFVX_UO_DEST_COLOR_KEY + + The color key is passed in GFVXUPDATEOVERLAY::ColorKey. Refer to the flags' + documentation for details on modes of operation. + + An exotic color which does not conflict with other colors of a use-case + should be selected as the color key. Color keying for overlay display is + processed on the fly, no pixels in the surfaces are overwritten. + + If destination is in 1-bit alpha format (eg ARGB1555), application can + use two additional flags - #GFVX_UO_COLOR_KEY_ALPHA_ONLY and + #GFVX_UO_COLOR_KEY_ALPHA_COLOR. Refer to the flags' + documentation for details on modes of operation. + + Alpha Blending + + Overlay display with alpha blending can be enabled by setting + flag #GFVX_UO_ALPHA_BLENDING. + + Setting flag #GFVX_UO_ALPHA_BLENDING lets the overlay surface to appear + blended with the destination surface using the alpha value passed in + GFVXUPDATEOVERLAY::AlphaValue. Refer to the flags' documentation for details + on how to define AlphaVal. + + If destination is in 1-bit alpha format (eg ARGB1555), application can + use two additional flags - #GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY and + #GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR. Refer to the flags' + documentation for details on modes of operation. + + Just like overlay colorkey, an exotic color which does not conflict with + other colors of a use-case should be selected as the blending color key. + Blending is processed on the fly, no pixels in the surfaces are overwritten. + + If #GFVX_UO_DEST_COLOR_KEY is set, alpha blending enabled, and the + destination pixel color matches BlendingColorKey, the following equation + is used to generate the final pixel: + 
      +    src * AlphaValue + dest * (1-AlphaValue)
+
      + Otherwise, the original pixel is not updated. + + Alpha blending is supported only on GoForce 4800 and above. + + SC15 supports alphablending with the following restriction - You cannot alpha-match + (alpha-blend) in non-key-match areas, at the same time you alpha-blend in key-match areas. + In other words, the following flag combinations will not work - + + #GFVX_UO_DEST_COLOR_KEY|#GFVX_UO_ALPHA_BLENDING|#GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY + #GFVX_UO_DEST_COLOR_KEY|#GFVX_UO_COLOR_KEY_ALPHA_COLOR|#GFVX_UO_ALPHA_BLENDING|#GFVX_UO_BLD_COLOR_KEY_ALPHA_ONLY + #GFVX_UO_DEST_COLOR_KEY|#GFVX_UO_COLOR_KEY_ALPHA_ONLY|#GFVX_UO_ALPHA_BLENDING + #GFVX_UO_DEST_COLOR_KEY|#GFVX_UO_COLOR_KEY_ALPHA_ONLY|#GFVX_UO_ALPHA_BLENDING|#GFVX_UO_BLD_COLOR_KEY_ALPHA_COLOR + + @see GFVXUPDATEOVERLAY +*/ +GF_RETTYPE GFVxUpdateOverlay(GFVxHandle VxHandle, + PGFVXUPDATEOVERLAY pOverlay); + +/** Feed image data from host to VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pImage (#PGFVXVIPFEEDIMAGE) Pointer to #GFVXVIPFEEDIMAGE parameter + structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If Source ColorFormat is unsupported + + This function feeds an image from the CPU host via the VI source FIFO to + the VIP. It supports YUV420, YUV422 (YUYV, YVYU, UYVY, VYUY), YUV422 planar and + Bayer (8, 12) formats. + + For an YUV420 image, it feeds Y-Fifo, U-Fifo, V-Fifo interleaved at 32 bit. + For an YUV422 image, it feeds the Y-Fifo only. + + This function is intended to be used for feeding YUV data to the JPEG + encoder, or for feeding input for VIP preview display (GFVxVIPSetVIP() + and GFVxVIPUpdate()). YUV data for MPEG encoding is fed with + GFMxEncFeedImage(). + + Parameter \a pImage passes a surface containing source image data and an + optional source clipping rectangle. Surface data has to reside in memory + accessible by the host CPU, e.g. a surface allocated as type + #GF_SURFACE_SYSTEM_MEMORY. + + @see GFVXVIPFEEDIMAGE, GFVX_VIP_HOST_IMAGE +*/ +GF_RETTYPE GFVxVIPFeedImage(GFVxHandle VxHandle, + PGFVXVIPFEEDIMAGE pImage); + +/** Setup partial feed image data from host to VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param colorFormat Color format of feed image surface + @param width Width of feed image + @param height Height of feed image + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_ILLEGAL_PARAMETER If width and height values are incorrect + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If color format of feed image surface is unsupported + + This function setups partial feed image from the CPU host via the VI source FIFO to + the VIP. It supports YUV420, YUV422 (YUYV, YVYU, UYVY, VYUY), YUV422 planar formats. + The partial image data is fed with + GFVxVIPPartialFeedImage(). + + @see GFVxVIPPartialFeedImage, GFVX_VIP_HOST_IMAGE +*/ +GF_RETTYPE GFVxVIPPartialFeedImageSetup(GFVxHandle VxHandle, + NvU32 colorFormat, + NvU32 width, + NvU32 height); + +/** Feed partial image data from host to VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pSrcSurf Pointer to source feed image surface + @param pSrcRect Pointer to a clip rectangle from source feed image surface + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_ILLEGAL_PARAMETER If pSrcSurf is NULL + + This function feeds a partial image from the CPU host via the VI source FIFO to + the VIP. It supports YUV420, YUV422 (YUYV, YVYU, UYVY, VYUY), YUV422 planar formats. + + For an YUV420 image, it feeds Y-Fifo, U-Fifo, V-Fifo interleaved at 32 bit. + For an YUV422 image, it feeds the Y-Fifo only. + + This function is intended to be used for feeding partial YUV data to the JPEG + encoder, or for feeding partial input for VIP preview display (GFVxVIPSetVIP() + and GFVxVIPUpdate()). YUV data for MPEG encoding is fed with + GFMxEncFeedImage(). + + Parameter \a pSrcRect is an optional source clipping rectangle. + Surface data has to reside in memory accessible by the host CPU, + e.g. a surface allocated as type + #GF_SURFACE_SYSTEM_MEMORY. +*/ +GF_RETTYPE GFVxVIPPartialFeedImage(GFVxHandle VxHandle, + PGFRMSURFACE pSrcSurf, + PGFRECT pSrcRect); + +/** Put video unit into sleep mode. + @param VxHandle (#GFVxHandle) Handle to VxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @note Not implemented by default, this function is intended to be + implemented only in GFSDK ports to platforms that are in need of + this feature. + + @see GFVxWakeup() +*/ +GF_RETTYPE GFVxSleep(GFVxHandle VxHandle); + +/** Wake up video unit from sleep mode. + @param VxHandle (#GFVxHandle) Handle to VxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + @note Not implemented by default, this function is intended to be + implemented only in GFSDK ports to platforms that are in need of + this feature. + + @see GFVxSleep() +*/ +GF_RETTYPE GFVxWakeup(GFVxHandle VxHandle); + +/** This function enumerates capabilities of the Video Input Port (VIP). + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pVIPProp (#PGFVXVIPPROPERTY) Pointer to #GFVXVIPPROPERTY structure + to be filled in + + @retval #GF_SUCCESS \a pVIPProp filled in successfully + @retval #GF_ERROR Some error occured + + The #GFPROPERTY structure passed with parameter \a pVIPProp will be + filled in on successfull return. + + The following GoForce VIP features are described by this function: + - Image decimation (scaling) limits + - Image flipping + - Video input interface type + + Parameters that are passed with a #GFVXVIPINFO structure to GFVxVIPSetVIP() + must be within the limits returned by this function. + + @see GFVXVIPPROPERTY, GFVxVIPSetVIP(), GFVXVIPINFO +*/ +GF_RETTYPE GFVxVIPGetProperty(GFVxHandle VxHandle, + PGFVXVIPPROPERTY pVIPProp); + +/** Configure video input to VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pVIPInfo (#PGFVXVIPINFO) Pointer to GFVXVIPINFO parameter structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_ILLEGAL_BAYER_VALUES If values in BayerInfo structure are incorrect + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If Source ColorFormat is unsupported + + The following VIP properties can be configured using this function, see + #GFVXVIPINFO for details: + - Data source and format (CPU host or video input) + - VIP input cropping rectangle + - Image decimation + - Input (camera) color format + + After configuring video input, the flow of data has to be explicitly + enabled with GFVxVIPUpdate(). + + See GFVxVIPGetProperty() for how to test for VIP capabilities at runtime. + + This function returns GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED error if color format + is not supported. Supported color formats for HOST input are - YUV422, YUV422 Planar, + YUV420 and Bayer (8 and 12). YUV420 is not supported if input source is VIP. + + @see GFVXVIPINFO, GFVxVIPUpdate(), GFVxVIPGetProperty() +*/ +GF_RETTYPE GFVxVIPSetVIP(GFVxHandle VxHandle, + PGFVXVIPINFO pVIPInfo); + +/** Enable or disable video feeding through VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param pUpdate (#GFVXVIPUPDATE) Pointer to a #GFVXVIPUPDATE structure + + @retval #GF_SUCCESS Success + @retval GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED If Source ColorFormat is unsupported + + This function enables or disables data feeding through VIP after it has + been configured with GFVxVIPSetVIP(). + + The action to be performed by this function is defined by the action + identifier passed in GFVXVIPUPDATE::UpdateOption of parameter \a pUpdate. + + + + + + + + + + + + + + + + + + +
      #GFVX_VIP_START + Enable VIP data feeding + + The structure passed via \a pUpdate controls the output of the VIP, setting + the following parameters: + - Destination surface(s) (single or double buffered) + - Top-left corner the output video is written to the destination surfaces + + GFVXVIPUPDATE::ppSurf passes an array of 1 or 2 destination surfaces to + capture the incoming video stream. If 2 surfaces are passed, the VIP target + surface is flipped after each frame of VIP input if #GFVX_VIP_AUTO_FLIP or + #GFVX_VIP_AUTO_FLIP_OVERLAY2 flag is specified. + + Color space conversion (CSC) is performed depending on the output surface + color formats: + - #GF_SURFACE_RGB565 (16 bpp): VI CSC is used. + - #GF_SURFACE_ARGB8888 (32 bpp): VI CSC is used, only available for SC12 + and above + - #GF_SURFACE_YUV422: (32 bits per two pixels): No CSC is used, data from + the VIP is stored as is in memory + - any other format is considered to be YUV422, and the data is stored as is + + If GFVXVIPUPDATE::ppSurf is NULL, data flow through the VIP is still enabled. + Data from the VIP is not written to target surfaces, but is is fed to the + MPEG or JPEG encoder pre-processor. This mode of operation is useful for the + following two cases: + - There is not enough memory for JPEG encoding. The application could turn + off the screen, enable this mode, and let the JPEG encoder utilize screen + memory (the primary surface). + - In single-shot mode, the application does not want to display the video + image on the screen after enabling the JPEG encoder, thus allowing faster + captures and power savings, and freeing bandwidth. After the image is + captured, the application enables the JPEG decoder to decode the captured + image and shows it on the screen. +
      #GFVX_VIP_AUTO_FLIP + Enable VIP data feeding with auto-display + + Behaviour is identical to #GFVX_VIP_START, additionally auto-display of the + last captured VIP frame is enabled. It is recommended to use this feature + in double buffer mode, passing 2 surfaces in GFVXVIPUPDATE::ppSurf. +
      #GFVX_VIP_AUTO_FLIP_OVERLAY2 + Enable VIP data feeding with auto-display from overlay window2 + + If surfaces to be flipped are overlay surfaces, they are associated with + first overlay surface unless #GFVX_VIP_AUTO_FLIP_OVERLAY2 flag is defined. + This flag should be used only if UpdateOverlay has been previously called + with #GFVX_UO_OVERLAY2 UpdateOption and VxFlip has been called with + #GFVX_FLIP_OVERLAY2 FlipOption. + +
      #GFVX_VIP_AUTO_TRIGER_BLT + Enable VIP data feeding with auto-blit + + Behaviour is identical to #GFVX_VIP_START, additionally auto-blit of the + last captured VIP frame is enabled. It is recommended to use this feature + in double buffer mode, passing 2 surfaces in GFVXVIPUPDATE::ppSurf. + + If #GFVX_VIP_AUTO_FLIP and #GFVX_VIP_AUTO_TRIGER_BLT are required at the + same time, these two action identifiers can be logically OR'ed and passed + in GFVXVIPUPDATE::UpdateOption. +
      #GFVX_VIP_STOP + Disable VIP data feeding + + Stop data feeding through VIP. All other flags and parameters passed in + \a pUpdate are ignored. +
      #GFVX_VIP_AUTO_TRIGER_BLT_OFF + Disable VIP auto-blit + + Stop auto-blit that has been enabled earlier with this function via + #GFVX_VIP_AUTO_TRIGER_BLT. This does not disable VIP data feed. +
      + + This function returns GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED error if destination + surface color format is not supported. Supported destination color formats are - + RGB565, ARGB8888, YUV422, YUV422P, YUV420P and YUV420PA. + + @see GFVXVIPUPDATE, GFVxVIPSetVIP() +*/ +GF_RETTYPE GFVxVIPUpdate(GFVxHandle VxHandle, + PGFVXVIPUPDATE pUpdate); + +/** Manipulate GPIO signals on VIP. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param gpio (#GFVX_VIP_GPIO_TYPE) Signal (pin) to manipulate + @param operation (NvU32) Operation type, one of: + + + + + + + + + + + + + + + + + + Get output data. +
      #GF_GPIO_SET_INPUT_ENABLEInput enable set to 1
      #GF_GPIO_CLR_INPUT_ENABLEInput enable clr to 0.
      #GF_GPIO_GET_INPUT_ENABLEGet input enable.
      #GF_GPIO_SET_OUTPUT_ENABLEOutput enable set to 1.
      #GF_GPIO_CLR_OUTPUT_ENABLEOutput enable clr to 0.
      #GF_GPIO_GET_OUTPUT_ENABLEGet output enable.
      #GF_GPIO_SET_DATAOutput data set to 1.
      #GF_GPIO_CLR_DATAOutput data clr to 0.
      #GF_GPIO_GET_DATA
      + @param pGPIOStatus (#PGFGPIOSTATUS) Pointer to #GFGPIOSTATUS structure + returning pin status + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + This function manipulates the GPIO signals on the video input port (VIP). + The supported operations are clearing to 0, setting to 1, and getting the + status of the input enable, output enable, and data bits. + + @see GFGPIOSTATUS, GFVX_VIP_GPIO_TYPE +*/ +GF_RETTYPE GFVxVIPGPIO(GFVxHandle VxHandle, + GFGPIOPin gpio, + NvU32 operation, + PGFGPIOSTATUS pGPIOStatus); + +/** VxAPI component-level interrupt control. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param IntType (#GFVX_INTERRUPT_TYPE) VxAPI interrupt type + @param op (#GFVX_INTERRUPT_OPERATION_TYPE) VxAPI interrupt operation + @param pData (void*) Pointer to input or output data block, depending + on interrupt type and operation + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + @retval #GFVX_ERROR_NO_SUPPORT Operation not supported + + Interpretation of the datablock passed with \a pData depends on the + interrupt operation. The following operations (parameter op) + are defined for this call, + + + + + + + + + + + + + + + + + + + + + + + + + + +
      #GFVX_INTERRUPT_ENABLEEnable interrupt/status assertion for interrupt type \a IntType. + \a pData is ignored. +
      #GFVX_INTERRUPT_DISABLEDisable interrupt/status assertion for interrupt type \a IntType. + \a pData is ignored. +
      #GFVX_INTERRUPT_DISABLEClear interrupt/status assertion for interrupt type \a IntType. + \a pData is ignored. +
      #GFVX_INTERRUPT_QUERY_STATUSQuery for interrupt/status assertion for interrupt type \a IntType. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Interrupt/status assertion state, one of:
+              GF_INTERRUPT_ON_STATUS_TRUE = asserted
+              GF_INTERRUPT_ON_STATUS_FALSE = not asserted
+
      +
      #GFVX_INTERRUPT_SET_Y_FIFO_THRESHOLD,
      + #GFVX_INTERRUPT_GET_Y_FIFO_THRESHOLD +       		Set or get DMA FIFO threshold value that controls interrupt/status + assertion for interrupt type #GFVX_Y_FIFO_THRESHOLD_INTR. If the + number of filled locations in the Y-FIFO is greater or equal + than the programmed value, #GFVX_Y_FIFO_THRESHOLD_INTR is asserted. + Note that the threshold value must not be changed within a frame. + + Parameter \a IntType is ignored. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Y-FIFO threshold value in range 0..31
+
      +
      #GFVX_INTERRUPT_SET_V_COUNTER_THRESHOLD,
      + #GFVX_INTERRUPT_GET_V_COUNTER_THRESHOLD +       		Set or get threshold value that controls interrupt/status assertion + for interrupt type #GFVX_VERTICAL_COUNTER_THRESHOLD_INTR. If the + vertical scanline position for data from parallel video input is + greater or equal than the programmed value, + #GFVX_VERTICAL_COUNTER_THRESHOLD_INTRis asserted. + + Parameter \a IntType is ignored. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Vertical counter threshold value in range 0..4095
+
      +
      #GFVX_INTERRUPT_GET_ALL_STATUSGet VI interrupt status bitmask. + + Parameter \a IntType is ignored. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Interrupt status bitmask,
+              Logically OR'ed combination of:
+              #GFVX_VID0PIN_RISING_EDGE_INTR
+              #GFVX_VID1PIN_RISING_EDGE_INTR
+              #GFVX_VID2PIN_RISING_EDGE_INTR
+              #GFVX_VID3PIN_RISING_EDGE_INTR
+              #GFVX_VID4PIN_RISING_EDGE_INTR
+              #GFVX_VID5PIN_RISING_EDGE_INTR
+              #GFVX_VID6PIN_RISING_EDGE_INTR
+              #GFVX_VID7PIN_RISING_EDGE_INTR
+              #GFVX_VERTICAL_COUNTER_THRESHOLD_INTR
+              #GFVX_VHSYNC_RISING_INTR
+              #GFVX_VVSYNC_RISING_INTR
+              #GFVX_VIDEO_IN_FIELD_DATA_RECV_INTR
+              #GFVX_EARLY_VIDEO_INTR
+              #GFVX_Y_FIFO_THRESHOLD_INTR
+
      +
      #GFVX_INTERRUPT_CLEAR_ON_ALL_STATUSClear VI interrupt assertions. + + Parameter \a IntType is ignored. + + Interpretation of associated data block \a pData: + 
      +        NvU32 Interrupt status bitmask,
+              set bit   = clear this interrupt assertion
+              unset bit = leave unchanged
+
+              Valid bits which can be logically OR'ed:
+              #GFVX_VID0PIN_RISING_EDGE_INTR
+              #GFVX_VID1PIN_RISING_EDGE_INTR
+              #GFVX_VID2PIN_RISING_EDGE_INTR
+              #GFVX_VID3PIN_RISING_EDGE_INTR
+              #GFVX_VID4PIN_RISING_EDGE_INTR
+              #GFVX_VID5PIN_RISING_EDGE_INTR
+              #GFVX_VID6PIN_RISING_EDGE_INTR
+              #GFVX_VID7PIN_RISING_EDGE_INTR
+              #GFVX_VERTICAL_COUNTER_THRESHOLD_INTR
+              #GFVX_VHSYNC_RISING_INTR
+              #GFVX_VVSYNC_RISING_INTR
+              #GFVX_VIDEO_IN_FIELD_DATA_RECV_INTR
+              #GFVX_EARLY_VIDEO_INTR
+              #GFVX_Y_FIFO_THRESHOLD_INTR
+
      +
      + + @see GFVX_INTERRUPT_TYPE, GFVX_INTERRUPT_OPERATION_TYPE, + GFVxInterruptHandler() +*/ +GF_RETTYPE GFVxInterruptControl(GFVxHandle VxHandle, + GFVX_INTERRUPT_TYPE IntType, GFVX_INTERRUPT_OPERATION_TYPE op, + void * pData); + +/** Get information about a feature of the VxAPI. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + @param aid (NvU32) Attribute type identifier, see table. + @param pAttr (NvU32*) Returns 32 bit attribute value, see attribute + type documentation for interpretation + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + + + + + + + + +
      \b Attribute \b Direction \b Synopsis
      #GFVX_ATTR_VIDEO_BUFgetVideo input interrupt status
      + + @see GFVxSetAttribute() +*/ +GF_RETTYPE GFVxGetAttribute(GFVxHandle VxHandle, NvU32 aid, NvU32 *attr); + +/** Reset VI to a reset state. + + @param VxHandle (#GFVxHandle) Handle to VxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +GF_RETTYPE GFVxReset(GFVxHandle); + +/** This function waits until the next camera vsync has occurred. + It is implemented with interrupt mode. Therefore, it assumes that + interrupt platform has already supported or taken care, + otherwise it will wait forever for interrupt event + + @param VxHandle (#GFVxHandle) Handle to VxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured +*/ +GF_RETTYPE GFVxWaitCameraVSync(GFVxHandle); + +/** This function ensures synchronization between StretchBlt operations and others + modules operations. + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + When several modules share the same channel (like SB,JxDec,MxDec), + it may be necessary to synchronize the command flow with the StretchBlt (SB) + module execution. Putting a GFVxBltNotBusy() call after a SB operation ensures + that commands which follow the SB command are executed after full completion + of the SB command. + + As opposed to GFVxBltWaitNotBusy(), this function doesn't block the CPU thread. + stretchblt engine may not be idle when returning from the function. Control returns + to the CPU right after a wait command is placed in the stretchblt engine command FIFO. + The GoForce hardware begins executing the commands following the StretchBlt engine idle + command only after the stretchblt engine becomes idle. + + @see GFVxBltWaitNotBusy() +*/ +GF_RETTYPE GFVxBltNotBusy(GFVxHandle VxHandle); + +/** This function checks whether the stretchblt engine is busy or idle. + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + + The function will wait until the stretchblt engine is idle. For example, if you want + to stretchblt to the frame buffer but the stretchblt engine is busy the function can + be used to wait until it is idle. + + As opposed to GFVxBltNotBusy(), this function blocks the CPU thread while waiting for + the stretchblt engine to become idle. + + @see GFVxBltNotBusy() + +*/ +GF_RETTYPE GFVxBltWaitNotBusy(GFVxHandle VxHandle); + +/** This function sets the current state stretchblt color space converion (CSC) + coefficients that will be programmed to GPU after calling GFVxBlt to do + YUV color space conversion to RGB. + How to use this routine: + - GFVxBltGetCSCCoeff() to get default YUV CSC coefficients, save them + - GFVxBltSetCSCCoeff() to change to new YUV CSC coefficients + - GFVxBlt() to stretchblt image with your new YUV CSC coefficients to RGB, + then done whatever + - GFVxBltSetCSCCoeff() to restore back default YUV CSC coefficients + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + @param pCoef (GFVXCSCCOEF*) Pointer to #GFVXCSCCOEF structure + @param option (NvU32) Option type, one of: + 
      +                - #GFVX_SET_CSC_USE_CCIR601_RANGE -- Use CCIR601 range.
+                  This option will ignore parameter pCoef. It will use
+                  pre-defined CSC CCIR601 coefficients values.
+                - #GFVX_SET_CSC_USE_FULL_RANGE -- Use color full range.
+                  This option will ignore parameter pCoef. It will use
+                  pre-defined CSC full range coefficients values.
+                - #GFVX_SET_CSC_USE_USER_DEFINED_RANGE -- Use user defined range.
+                  This option will require parameter pCoef. It will use
+                  CSC coefficients values provided from pCoef.
+
      + @param sbMode (#GFVXBLTMODE) StretchBlt mode, one of: + 
      +                - GFVX_BLT_FULL_MODE: Host full frame stretchblt trigger
+                - GFVX_BLT_PARTIAL_MODE: Host partial frame stretchblt trigger
+                - GFVX_BLT_AUTO_VI_MODE: Auto stretchblt trigger from VI
+
      + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFVxBltSetCSCCoeff(GFVxHandle VxHandle, + GFVXCSCCOEF *pCoef, + NvU32 option, + GFVXBLTMODE sbMode); + +/** This function sets the current state VI color space converion (CSC) + coefficients that will be programmed to GPU after calling GFVxVIPUpdate + to do YUV color space conversion to RGB. + How to use this routine: + - GFVxVIPGetCSCCoeff() to get default YUV CSC coefficients, save them + - GFVxVIPSetCSCCoeff() to change to new YUV CSC coefficients + - GFVxVIPUpdate() to preview image with your new YUV CSC coefficients to RGB + - GFVxVIPSetCSCCoeff() to restore back default YUV CSC coefficients + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + @param pCoef (#GFVXCSCCOEF*) Pointer to #GFVXCSCCOEF structure + @param option (NvU32) Option type, one of: + 
      +                - #GFVX_SET_CSC_USE_CCIR601_RANGE -- Use CCIR601 range.
+                  This option will ignore parameter pCoef. It will use
+                  pre-defined CSC CCIR601 coefficients values.
+                - #GFVX_SET_CSC_USE_FULL_RANGE -- Use color full range.
+                  This option will ignore parameter pCoef. It will use
+                  pre-defined CSC full range coefficients values.
+                - #GFVX_SET_CSC_USE_USER_DEFINED_RANGE -- Use user defined range.
+                  This option will require parameter pCoef. It will use
+                  CSC coefficients values provided from pCoef.
+
      + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFVxVIPSetCSCCoeff(GFVxHandle VxHandle, GFVXCSCCOEF *pCoef, NvU32 option); + +/** This function gets the current state stretchblt color space conversion (CSC) + coefficients + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + @param pCoef (#GFVXCSCCOEF*) Pointer to #GFVXCSCCOEF structure + @param sbMode (#GFVXBLTMODE) StretchBlt mode, one of: + - GFVX_BLT_FULL_MODE: Host full frame stretchblt trigger + - GFVX_BLT_PARTIAL_MODE: Host partial frame stretchblt trigger + - GFVX_BLT_AUTO_VI_MODE: Auto stretchblt trigger from VI + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFVxBltGetCSCCoeff(GFVxHandle VxHandle, GFVXCSCCOEF *pCoef, GFVXBLTMODE sbMode); + +/** This function gets the current state VI color space conversion (CSC) coefficients + + @param VxHandle (#GFVxHandle) Handle to GFVxAPI + @param pCoef (#GFVXCSCCOEF*) Pointer to #GFVXCSCCOEF structure + + @retval #GF_SUCCESS Success + @retval #GF_ERROR Some error occured + +*/ +GF_RETTYPE GFVxVIPGetCSCCoeff(GFVxHandle VxHandle, GFVXCSCCOEF *pCoef); + +/** @page pageVxOverview VxAPI Overview + + The GFVxAPI is an abstraction layer for both the Video Scalar (StretchBlt) + and the Video Input (VI) module. The Video Scalar provides color space + conversion (CSC) and smooth scaling of video. The VI module, which connects + to the Video Input Port (VIP), accepts data from the VIP or the host CPU + through a FIFO mechanism. + + Video data, either decimated or not, can be sent from the VI to JPEG or + MPEG encoder, and at the same time can go to memory through CSC for previewing, + again either decimated or not. If a decimator is used in both the preview and + the encoder paths, it has to have same decimation factor. + + Video data can also be sent to EPP. RGB565, RGB444 and RGB888 data goes directly + and YUV422 data, pre or post decimated, is first converted to YUV444 by VI + before sending to EPP. + + If data coming from VIP is in Bayer format, VI first sends this data to ISP. + After processing, ISP returns YUV444 data to VI. VI converts output of ISP to + YUV422 before sending it to core for decimation or to memory or both. + + There are also options to crop, mirror and/or flip video data. + + The Video Scalar and the VI module accept YUV (4:2:2 or 4:2:0) and + RGB (565) data as input. YUV data can be converted to YUV planar data or + RGB data (RGB:565 for all processors, and RGB:888 or ARGB:8888 for GoForce + 3D 4800). RGB data can be scaled, but cannot be converted to YUV, for all + processors up to the GoForce 3D 4800. + + @section pageVxOverview1 Video Sources + + The video source for the VI module can be the host CPU or a camera + connected to the VIP. The video source for the Video Scalar can be the + video memory surface or the output of the JPEG or MPEG decoder through a + circular buffer. The GFVxAPI functions that deal only with the VIP have VIP + in their function names. + + @section pageVxOverview2 Video Camera Interface + + Usually a video camera connected through the VIP generates YUV 422 data + (CCIR656 format) which can be encoded by the NVIDIA GPU. Some cameras + generate JPEG-encoded images directly, and the GFSDK can be configured to + accept those JPEG-encoded bit streams. + + To control the JPEG input stream, VIP of newer NVIDIA GPUs supports the + following camera interface protocols for variably sized bitstream data: + - Type A interface: VHSync and VVSync length can be variable, and + VVClk should be kept running. (SC12 only) + - Type B interface: VHSync and VVSync length can be variable, and + VVClk can be stopped during the image transfer period. (SC12 only) + - Type C interface: VHSync and VVSync length are fixed, and VVClk + should be kept running. The camera can insert 0xff in the image as + padding. + + @section pageVxOverview3 Video Coordinate Systems (Regular and Rotated) + + A destination coordinate is always the same as a screen coordinate. The + source coordinate stays the same, even if there is rotation. +*/ + +/** @page pageVxAppNotes VxAPI Application Notes + + @section pageVxAppNotes1 Programming Sequence + + The easiest way to learn the VxAPI is by referring to the demonstration + application source code that come with the GFSDK package. A new application + can be started by creating a project at the same directory level as the + demo application source directory. This way the same directory tree + structure can be maintained. The general sequence for programming the + VxAPI is as follows: + + -# Make sure that the build project or file has the right paths to the + library and header files. Use relative directory addressing if possible. + The GFSDK/Inc directory must be included. + -# Include GFVx.h in the source file. This header is all that is needed to + access the exposed API functions. + -# Call GFRmOpen() before any other GFSDK functions (including the VxAPI). + -# Use the handle returned from the Resource Manager in the previous step + to call GFRmComponentGet() with #GF_VXAPI as the ComponentType in the + #GFRMCOMPONENT structure. The returned handle is the one to use + throughout all VxAPI calls. + -# To better utilize VxAPI functions, it is a good idea to call + GFVxGetProperty() to determine the version that you are using and the + available video memory. + -# Make calls to the appropriate VxAPI functions. Always remember to pass + the same #GFVxHandle returned from GFRmComponentGet(). + -# When all the VxAPI calls are completed, call GFRmComponentRelease(). + -# When exiting the application, call RmClose() to release everything + associated with the GFSDK. +*/ + +//////////////////Raw Capture Defination ////////////////////////// +/** Descriptor for raw data fetch buffers. + This structure describes a buffer and its fill status for Raw YUV transfered + from RDMA to the application. + It is used with GFVxRawCapture() and GFVxRawCaptureFetchImage() + in either polling or callback data fetch mode. + + @see GFVxCapture(), GFVxRawCaptureFetchImage() +*/ +typedef struct _GFVX_BUF { + NvU8 *pBuf; /**< Pointer to the buffer */ + NvU32 bufSize; /**< Size of the buffer in bytes */ + NvU32 nBytesCaptured; /**< Number of bytes captured, + app initializes to 0 + */ +} GFVX_BUF, *PGFVX_BUF; + + +/** Image source/target dimensions and data source for Raw data capturing. + + This structure is passed as parameter to GFVxRawCaptureStart() and describes + data source, source cropping rectangle and destination image size. + + @see GFVxRawCaptureStart() +*/ +typedef struct _GFVXRAWINFO +{ + PGFRMSURFACE pSrcSurf;/**< Surface to encode, + NULL for camera. + */ + PGFRECT pSrcRect; /**< Source image area need to capture */ + NvU32 DestWidth; /**< Final output data width */ + NvU32 DestHeight; /**< Final output data height */ + NvU32 uiOptions; /**< Bitmask of flags to control capturing + +
      + */ + NvU32 Error; /**< Returns detailed error code on GFVxRawCaptureStart() failure + + + + + + + +
      #GF_CAPT_ERROR_VIDEO_MEMORY_NOT_BIG_ENOUGHNot enough free video memory, try to release + unnecessary video surfaces
      #GF_CAPT_ERROR_WRONG_CONFIGWrong input parameters, for example srcRect + size greater than pSrcSurf dimensions
      #GF_CAPT_ERROR_NO_CALLBACKNo callback function available
      + */ + NvU32 colorFormat; +} GFVXRAWINFO, *PGFVXRAWINFO; + +/** GFVXRAWINFO uiOptions: +*/ +#define RAWCAPTURE_ATTR_RAW_DATA 0x00000010 +#define RAWCAPTURE_ATTR_RAW_JPEG_CAPTURE 0x00000020 +#define RAWCAPTURE_ATTR_RAW_DATA_STREAM 0x00000030 + +/** Raw data capture APIs +*/ +GF_RETTYPE GFVxRawCaptureStart( GFVxHandle VxHandle, + PGFVXRAWINFO pStart); + +GF_RETTYPE GFVxRawCaptureSetupInterrupt(GFVxHandle VxHandle, + void (*Inter)(void *), void *IPara); + +GF_RETTYPE GFVxRawCapture (GFVxHandle VxHandle, + PGFVX_BUF aBuf, NvU32 nBuf, NvU32 *pStatus ); + +GF_RETTYPE GFVxRawCaptureFetchImage (GFVxHandle pVx, + PGFVX_BUF aBuf, NvU32 nBuf, NvU32 *pStatus ); + +GF_RETTYPE GFVxRawCaptureEnd( GFVxHandle pVx ); + +//uiFrameStatus; + +/** Raw Capture data fetch status code: All data of the current frame was fetched. + @see GFVxRawCaptureFetchImage(), GFVxRawCapture() +*/ +#define RAWCAPTURE_DATA_COMPLETE 0x1 + +/** Raw Capture data fetch status code: Data was fetched only partially. + The application should make more calls to GFVxRawCaptureFetchImage() to fetch + the rest. + @see GFVxRawCaptureFetchImage(), GFVxRawCapture() +*/ +#define RAWCAPTURE_MORE_FETCH 0x2 + +/** Raw Capture data fetch status code: New frame was captured and is ready to + fetch. + @see GFVxRawCaptureFetchImage(), GFVxRawCapture() +*/ +#define RAWCAPTURE_NEW_FRAME 0x8 + +/** Raw Capture data fetch status code: Time out error occured while output data is fetching. + fetch. + @see GFVxRawCaptureFetchImage(), GFVxRawCapture() +*/ +#define RAWCAPTURE_TIME_OUT 0x10 + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __GFVX_H__ */ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVxError.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVxError.h new file mode 100755 index 00000000..7f81f255 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVxError.h @@ -0,0 +1,42 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file GFVxError.h + GFVxAPI error codes +*/ + +#ifndef __GFVXERROR_H__ +#define __GFVXERROR_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#define GFVX_ERROR_GET_COMPONENT (GFVX_ERROR | 0x00000001L) +/** GFVxAPI error code: Function not supported. */ +#define GFVX_ERROR_NO_SUPPORT (GFVX_ERROR | 0x00000002L) +#define GFVX_ERROR_COLORFORMAT_NOT_SUPPORTED (GFVX_ERROR | 0x00000003L) +#define GFVX_ERROR_SURFACETYPE_NOT_SUPPORTED (GFVX_ERROR | 0x00000004L) +#define GFVX_ERROR_ILLEGAL_ALPHA_VALUE (GFVX_ERROR | 0x00000005L) +#define GFVX_ERROR_ILLEGAL_BAYER_VALUES (GFVX_ERROR | 0x00000006L) +#define GFVX_ERROR_ILLEGAL_PARAMETER (GFVX_ERROR | 0x00000007L) +#define GFVX_ERROR_DRIVER_NOT_SUPPORTED (GFVX_ERROR | 0x00000008L) +#define GFVX_ERROR_FLAG_NOT_SUPPORTED (GFVX_ERROR | 0x00000009L) +#define GFVX_ERROR_FAIL_ALLOCATE_MEMORY (GFVX_ERROR | 0x0000000AL) +#define GFVX_ERROR_ILLEGAL_VALUE (GFVX_ERROR | 0x0000000BL) + +#ifdef __cplusplus +} +#endif + +#endif // __GFVXERROR_H__ + + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVxScr.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVxScr.h new file mode 100755 index 00000000..394a33ef --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/GFVxScr.h @@ -0,0 +1,311 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#if !defined (__GFVXSCR_INC__) +#define __GFVXSCR_INC__ + +/** VxAPI GFVXVIPINFO::Flag flagbit: 8-bit/clock video data. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_PARALLEL_INPUT 0x00000001 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Serial input. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_SERIAL_INPUT 0x00000002 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VHSYNC and VVSYNC in the data stream. + If this flag is set, vertical and horizontal sync for the camera picture + is contained in the data stream going into the data port of the VIP. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_HVSYNC_IN_STREAM 0x00000004 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Camera VHSYNC asserted by external signal. + If this flag is set, vertical and horizontal sync for the camera picture + is asserted to the GoForce chip by external signals, usually coming from + the camera chip. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_EXTERNAL_VHSYNC 0x00000008 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Camera VHSYNC generated by GoForce chip. + If this flag is set, vertical and horizontal sync is generated by the + GoForce chip, and not contained in the data stream. The following members + of GFVXVIPINFO have to be set to define the timing: + - GFVXVIPINFO::VHPulseWidth + - GFVXVIPINFO::VHPulsePeriod + - GFVXVIPINFO::VVPulseWidth + - GFVXVIPINFO::VVPulsePeriod + - GFVXVIPINFO::VVDelay + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_INTERNAL_VHSYNC 0x00000010 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VCLK generated externally. + If this flag is set, camera VCLK is provided from an external source, + and VLCK will be selected as clock source for VI module. + @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVX_VIP_EXTERNAL_VCLK_PRESERVE_CLKSEL +*/ +#define GFVX_VIP_EXTERNAL_VCLK 0x00000020 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VCLK generated by GoForce chip. + If this flag is set, camera VCLK is provided by the GoForce chip. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_INTERNAL_VCLK 0x00000040 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Detect field 0 or 1, will not work for + internal VHSYNC (#GFVX_VIP_INTERNAL_VHSYNC). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_DETECT_FIELD 0x00000080 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Horizontal flip. + Flip VIP image horizontally. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB_H_FLIP 0x00000100 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Vertical flip. + Flip VIP image vertically. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB_V_FLIP 0x00000200 + +/** VxAPI GFVXVIPINFO::Flag flagbit: CPU feeds image to VIP. + This flag indicates to the VIP, that image data is fed from the + host interface. + @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVxVIPFeedImage() +*/ +#define GFVX_VIP_HOST_IMAGE 0x00000400 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Change the default timing for VHSYNC and + VCLK. If this flag is set, VHSYNC and VCLK timing characteristics such as + polarity, active edge, serial frame polarity, size, field info are + overridden with GFVxVIPSetVIP() by the parameters passed in + GFVXVIPINFO::NewTiming. + + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_CHANGE_DEFAULT_TIMING 0x00000800 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Camera master clock provided by GoForce + chip. When this flag is set, GFVXVIPINFO::MClockFreq must be set to the + ideal clock which the camera wants. Internally the best matching frequency + is provided to the camera. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ASK_FOR_MCLOCK 0x00001000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type A interface. + @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2 +*/ +#define GFVX_VIP_TYPE_A 0x00002000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type B interface. + @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2 +*/ +#define GFVX_VIP_TYPE_B 0x00004000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type C interface. + @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2 +*/ +#define GFVX_VIP_TYPE_C 0x00008000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Camera is running at type C interface + and do not remove the 0xFF, 0x02 sequence. + @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2 +*/ +#define GFVX_VIP_TYPE_C_RAW 0x00010000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Enable destination byte swap for YUV/RGB + data written to preview surface. + + This flag enables byte swap for 32 bit words of data coming from VIP and + going to a target RGB or YUV422 surface. The sequence of 4 byte groups in + (LSB)b0 b1 b2 b3(MSB) order is swapped to + (LSB)b1 b0 b3 b2(MSB). + + This flag only affects data written to a preview surface, i.e. VIP image + capture enabled with GFVxVIPSetVIP() and GFVxVIPUpdate(). It does not + affect raw data going to the JPEG/MPEG encoder. + + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_DEST_BYTE_SWAP 0x00020000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VI output without rotation + Rotate VIP image 0 degree + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ROTATE_0 0x00040000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 90 degree rotation + Rotate VIP image 90 degree + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ROTATE_90 0x00080000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 180 degree rotation + Rotate VIP image 180 degree + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ROTATE_180 0x00100000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 270 degree rotation + Rotate VIP image 270 degree + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_ROTATE_270 0x00200000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: RGB565 input to EPP. + @todo clarify + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB565 0x00400000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: RGB888 input to EPP. + @todo clarify + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB888 0x00800000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: RGB444 input to EPP. + @todo clarify + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_RGB444 0x01000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Preserve VI clock source but enable external VLCK pad. + This flag can be used in combination with GFVX_VIP_EXTERNAL_VCLK to enable + an external clock on VLCK, but keep the VI module clocksource. + @version SC15 and above + @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVX_VIP_EXTERNAL_VCLK +*/ +#define GFVX_VIP_EXTERNAL_VCLK_PRESERVE_CLKSEL 0x02000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type D interface. + @version SC17 and above + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_TYPE_D 0x04000000 + +#define GFVX_VIP_CSI_ENABLE 0x08000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Bypass any manipulation on internal master + clock generation output pin. + + This flag is mutually exclusive to #GFVX_VIP_PRE_GENERATE_MCLOCK and + #GFVX_VIP_ASK_FOR_MCLOCK. + + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_BYPASS_MCLOCK_PIN 0x20000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Bypass any manipulation on VCLK, VHSYNC, + and VID[7:0] pins. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_BYPASS_NON_MCLOCK_PINS 0x40000000 + +/** VxAPI GFVXVIPINFO::Flag flagbit: Pre-generation of master clock. + Useful for scanning the I2C bus for a camera. + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_PRE_GENERATE_MCLOCK 0x80000000 + +/** + Bypass ISP mode. +*/ +#define GFVX_VIP_BYPASS_ISP 0x10000000 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Parallel data latched at falling edge + of VCLK (default is rising edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_PDL_FALLING_VCLK 0x00000001 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial data lacthed at rising edge of + VCLK (default is falling edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_SDL_RISING_VCLK 0x00000001 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC active low (default is active + high). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VHSYNC_ACTIVE_LOW 0x00000002 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC active low (default is active + high). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VVSYNC_ACTIVE_LOW 0x00000004 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC active leading edge (default + is trailing edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VHSYNC_ACTIVE_EDGE_LEAD 0x00000008 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC active leading edge (default + is trailing edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VVSYNC_ACTIVE_EDGE_LEAD 0x00000010 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial video frame sync active low, + falling edge indicates start of data frame (default is active high, rising + edge indicates start of data frame). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_SFRAME_ACTIVE_LOW 0x00000020 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial video input is 16 bit per + frame (default is 8 bit per frame). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_SFRAME_SIZE_16 0x00000040 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: Field 0 is bottom/even field + (default is top/odd field). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_FILED_0_BOTTOM 0x00000080 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VCLK output from GoForce chip active + low (default is active high). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VCLK_OUTPUT_ACTIVE_LOW 0x00000100 + +#define GFVX_VIP_VHSYNC_ACTIVE_LOW_RESET 0x00000200 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC reset active low (default is active + high). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ +#define GFVX_VIP_VVSYNC_ACTIVE_LOW_RESET 0x00000400 + +/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC reset active leading edge (default + is trailing edge). + @see GFVXVIPINFO, GFVxVIPSetVIP() +*/ + + +#endif diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/cpuopsys.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/cpuopsys.h new file mode 100755 index 00000000..daa89a73 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/cpuopsys.h @@ -0,0 +1,309 @@ + +/*! \brief + * Define compile time symbols for CPU type and operating system type. + * This file should only contain preprocessor commands so that + * there are no dependencies on other files. + * + * cpuopsys.h + * + * Copyright (c) 2001, Nvidia Corporation. All rights reserved. + */ + +/*! + * Uniform names are defined for compile time options to distinguish + * CPU types and Operating systems. + * Distinctions between CPU and OpSys should be orthogonal. + * + * These uniform names have initially been defined by keying off the + * makefile/build names defined for builds in the OpenGL group. + * Getting the uniform names defined for other builds may require + * different qualifications. + * + * The file is placed here to allow for the possibility of all driver + * components using the same naming convention for conditional compilation. + */ + +#ifndef __cpuopsys_h_ +#define __cpuopsys_h_ + +/*****************************************************************************/ +// Define all OS/CPU-Chip related symbols + +// ***** DOS variations +#if defined(__DJGPP__) +# define NV_DOS +#endif + +// ***** WINDOWS variations +#if defined(_WIN32) || defined(_WIN16) +# define NV_WINDOWS + +# if defined(_WIN32_WINNT) +# define NV_WINDOWS_NT +# elif defined(_WIN32_WCE) +# define NV_WINDOWS_CE +# elif !defined(NV_MODS) +# define NV_WINDOWS_9X +# endif +#endif // _WIN32 || defined(_WIN16) + +// ***** Unix variations +#if defined(__linux__) && !defined(NV_LINUX) +# define NV_LINUX +#endif // defined(__linux__) + +// SunOS + gcc +#if defined(__sun__) && defined(__svr4__) +# define NV_SUNOS +#endif // defined(__sun__) && defined(__svr4__) + +// SunOS + Sun Compiler (named SunPro, Studio or Forte) +#if defined(__SUNPRO_C) || defined(__SUNPRO_CC) +# define NV_SUNPRO_C +# define NV_SUNOS +# define __FUNCTION__ __func__ +# define NV_OPENGL_THREAD_UNSAFE // XXX To start with +#endif // defined(_SUNPRO_C) || defined(__SUNPRO_CC) + +#if defined(__FreeBSD__) +# define NV_BSD +#endif // defined(__FreeBSD__) + +// XXXar don't define NV_UNIX on MacOSX or vxworks or dos or QNX +#if (defined(__unix__) || defined(__unix) ) && !defined(macosx) && !defined(vxworks) && !defined(__DJGPP__) && !defined(NV_UNIX) && !defined(__QNX__) && !defined(__QNXNTO__)// XXX until removed from Makefiles +# define NV_UNIX +#endif // defined(__unix__) + +#if (defined(__QNX__) || defined(__QNXNTO__)) && !defined(NV_QNX) +# define NV_QNX +#endif + +// ***** Apple variations +#if defined(macintosh) || defined(__APPLE__) +# define NV_MACINTOSH +# if defined(__MACH__) +# define NV_MACINTOSH_OSX +# if !defined(NV_MODS) +# define NV_MACOSX_OPENGL +# endif +# else +# define NV_MACINTOSH_OS9 +# endif +# if defined(__LP64__) +# define NV_MACINTOSH_64 +# endif +#endif // defined(macintosh) + +// ***** VxWorks +// Tornado 2.21 is gcc 2.96 and #defines __vxworks. +// Tornado 2.02 is gcc 2.7.2 and doesn't define any OS symbol, so we rely on +// the build system #defining vxworks. +#if defined(__vxworks) || defined(vxworks) +# define NV_VXWORKS +# if (CPU==PENTIUM) +# define NV_VXWORKS_PENTIUM +# elif (CPU==PPC604) +# define NV_VXWORKS_PPC604 +# endif +#endif + +// ***** Integrity OS +#if defined(__INTEGRITY) +# if !defined(NV_INTEGRITY) +# define NV_INTEGRITY +# endif +#endif + +// ***** Processor type variations +// Note: The prefix NV_CPU_* is taken by \\sw\main\sdk\nvidia\inc\Nvcm.h + +#if ((defined(_M_IX86) || defined(__i386__) || defined(__i386)) && !defined(NVCPU_X86)) // XXX until removed from Makefiles + // _M_IX86 for windows, __i386__ for Linux (or any x86 using gcc) + // __i386 for Studio compiler on Solaris x86 +# define NVCPU_X86 // any IA32 machine (not x86-64) +#endif + +#if defined(_WIN32) && defined(_M_IA64) +# define NVCPU_IA64_WINDOWS // any IA64 for Windows opsys +#endif +#if defined(NV_LINUX) && defined(__ia64__) +# define NVCPU_IA64_LINUX // any IA64 for Linux opsys +#endif +#if defined(NVCPU_IA64_WINDOWS) || defined(NVCPU_IA64_LINUX) || defined(IA64) +# define NVCPU_IA64 // any IA64 for any opsys +#endif + +#if (defined(NV_MACINTOSH) && !(defined(__i386__) || defined(__x86_64__))) || defined(__PPC__) || defined(__ppc) +# ifndef NVCPU_PPC +# define NVCPU_PPC // any PowerPC architecture +# endif +# ifndef NV_BIG_ENDIAN +# define NV_BIG_ENDIAN +# endif +#endif + +#if defined(__x86_64) || defined(AMD64) || defined(_M_AMD64) +# define NVCPU_X86_64 // any x86-64 for any opsys +#endif + +#if defined(__arm__) && !defined(NVCPU_ARM) +# define NVCPU_ARM +#endif + +#if defined(__XSCALE__) +#define NVCPU_XSCALE // for XSCALE ARM processors +#endif + +#if defined(__SH4__) +# ifndef NVCPU_SH4 +# define NVCPU_SH4 // Renesas (formerly Hitachi) SH4 +# endif +#endif + +// For Xtensa processors +#if defined(__XTENSA__) +# define NVCPU_XTENSA +# if defined(__XTENSA_EB__) +# define NV_BIG_ENDIAN +# endif +#endif + + +// Other flavors of CPU type should be determined at run-time. +// For example, an x86 architecture with/without SSE. +// If it can compile, then there's no need for a compile time option. +// For some current GCC limitations, these may be fixed by using the Intel +// compiler for certain files in a Linux build. + + +#if defined(NVCPU_IA64) || defined(NVCPU_X86_64) +# define NV_64_BITS // all architectures where pointers are 64 bits +#else + // we assume 32 bits. I don't see a need for NV_16_BITS. +#endif + +// NOTE: NV_INT64_OK is not needed in the OpenGL driver for any platform +// we care about these days. The only consideration is that Linux does not +// have a 64-bit divide on the server. To get around this, we convert the +// expression to (double) for the division. +#if (!(defined(macintosh) || defined(vxworks) || defined(__INTEL_COMPILER)) || defined(NV_LINUX)) && !defined(NV_INT64_OK) +#define NV_INT64_OK +#endif + +// For verification-only features not intended to be included in normal drivers +#if defined(NV_MODS) && defined(DEBUG) && !defined(NV_DOS) +#define NV_VERIF_FEATURES +#endif + + +/* + * New, safer family of #define's -- these ones use 0 vs. 1 rather than + * defined/!defined. This is advantageous because if you make a typo, say: + * + * #if NVCPU_IS_BIG_ENDAIN // Oops! Endian is misspelled + * + * ...some compilers can give you a warning telling you that you screwed up. + * The compiler can also give you a warning if you forget to #include + * "cpuopsys.h" in your code before the point where you try to use these + * conditionals. + * + * Also, the names have been prefixed in more cases with "CPU" or "OS" for + * increased clarity. You can tell the names apart from the old ones because + * they all use "_IS_" in the name. + * + * Finally, these can be used in "if" statements and not just in #if's. For + * example: + * + * if (NVCPU_IS_BIG_ENDIAN) x = Swap32(x); + * + * Maybe some day in the far-off future these can replace the old #define's. + */ +#if defined(NV_WINDOWS) +#define NVOS_IS_WINDOWS 1 +#else +#define NVOS_IS_WINDOWS 0 +#endif +#if defined(NV_WINDOWS_CE) +#define NVOS_IS_WINDOWS_CE 1 +#else +#define NVOS_IS_WINDOWS_CE 0 +#endif +#if defined(NV_LINUX) +#define NVOS_IS_LINUX 1 +#else +#define NVOS_IS_LINUX 0 +#endif +#if defined(NV_UNIX) +#define NVOS_IS_UNIX 1 +#else +#define NVOS_IS_UNIX 0 +#endif +#if defined(NV_QNX) +#define NVOS_IS_QNX 1 +#else +#define NVOS_IS_QNX 0 +#endif +#if defined(NV_MACINTOSH) +#define NVOS_IS_MACINTOSH 1 +#else +#define NVOS_IS_MACINTOSH 0 +#endif +#if defined(NV_VXWORKS) +#define NVOS_IS_VXWORKS 1 +#else +#define NVOS_IS_VXWORKS 0 +#endif +#if defined(NV_INTEGRITY) +#define NVOS_IS_INTEGRITY 1 +#else +#define NVOS_IS_INTEGRITY 0 +#endif +#if defined(NVCPU_X86) +#define NVCPU_IS_X86 1 +#else +#define NVCPU_IS_X86 0 +#endif +#if defined(NVCPU_IA64) +#define NVCPU_IS_IA64 1 +#else +#define NVCPU_IS_IA64 0 +#endif +#if defined(NVCPU_X86_64) +#define NVCPU_IS_X86_64 1 +#else +#define NVCPU_IS_X86_64 0 +#endif +#if defined(NVCPU_PPC) +#define NVCPU_IS_PPC 1 +#else +#define NVCPU_IS_PPC 0 +#endif +#if defined(NVCPU_ARM) +#define NVCPU_IS_ARM 1 +#else +#define NVCPU_IS_ARM 0 +#endif +#if defined(NVCPU_SH4) +#define NVCPU_IS_SH4 1 +#else +#define NVCPU_IS_SH4 0 +#endif +#if defined(NVCPU_XTENSA) +#define NVCPU_IS_XTENSA 1 +#else +#define NVCPU_IS_XTENSA 0 +#endif +#if defined(NV_BIG_ENDIAN) +#define NVCPU_IS_BIG_ENDIAN 1 +#else +#define NVCPU_IS_BIG_ENDIAN 0 +#endif +#if defined(NV_64_BITS) +#define NVCPU_IS_64_BITS 1 +#else +#define NVCPU_IS_64_BITS 0 +#endif + +/*****************************************************************************/ + +#endif /* __cpuopsys_h_ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/gfrm_clock_ids.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/gfrm_clock_ids.h new file mode 100755 index 00000000..bd0d1209 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/gfrm_clock_ids.h @@ -0,0 +1,22 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file clock_ids.h + Clock List & string names +*/ + +GFRM_CLOCK(OSC,"osc") +GFRM_CLOCK(ROSC,"rosc") +GFRM_CLOCK_PLL(PLL1,"pll1") +GFRM_CLOCK_PLL(PLL2,"pll2") +GFRM_CLOCK(REFCLK0,"refclk0") +GFRM_CLOCK(REFCLK1,"refclk1") +GFRM_CLOCK(REFCLK2,"refclk2") +GFRM_CLOCK_PLL(PLL3,"pll3") + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/gfrm_module_ids.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/gfrm_module_ids.h new file mode 100755 index 00000000..fb644b13 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/gfrm_module_ids.h @@ -0,0 +1,56 @@ +/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an + * express license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/** @file module_ids.h + Module List & string names +*/ + + +GFRM_MODULE(HOST1X, "host1x") +GFRM_MODULE(MPD,"mpd") +GFRM_MODULE(ME,"me") +GFRM_MODULE(JPEGE,"jpege") +GFRM_MODULE(VI,"vi") +GFRM_MODULE(EPP,"epp") +GFRM_MODULE(ISP,"isp") +GFRM_MODULE(DSPCORE,"dspcore") +GFRM_MODULE(GR2D,"gr2d") +GFRM_MODULE(GR3D,"gr3d") +GFRM_MODULE(DISPLAY,"display") +GFRM_MODULE(I2S,"i2s") +GFRM_MODULE(IC,"ic") +GFRM_MODULE(SD,"sd") +GFRM_MODULE(MC,"mc") +GFRM_MODULE(EMC,"emc") +GFRM_MODULE(DSP,"dsp") +GFRM_MODULE(EFUSE,"efuse") +GFRM_MODULE(AUDIO,"audio") +GFRM_MODULE(TVO,"tvo") +GFRM_MODULE(DISPLAYB,"displayb") +GFRM_MODULE(I2SB,"i2sb") +GFRM_MODULE(DSPB,"dspb") +GFRM_MODULE(CVE,"cve") +GFRM_MODULE(DSPBCORE,"dspbcore") +GFRM_MODULE(CSI,"csi") +GFRM_MODULE(TVDAC,"tvdac") +GFRM_MODULE(APB,"apb") +GFRM_MODULE(RESET, "reset") +GFRM_MODULE(SPROM, "sprom") +GFRM_MODULE(GPIO, "gpio") +GFRM_MODULE(CLK, "clk") +GFRM_MODULE(UART, "uart") +GFRM_MODULE(UART2, "uart2") +GFRM_MODULE(UART3, "uart3") +GFRM_MODULE(TIMER, "timer") +GFRM_MODULE(KBC, "kbc") +GFRM_MODULE(DMA, "dma") +GFRM_MODULE(USB, "usb") +GFRM_MODULE(CEATA, "ceata") +GFRM_MODULE(FLASH, "flash") +GFRM_MODULE(XHOST, "xhost") diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvboard.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvboard.h new file mode 100755 index 00000000..9277a904 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvboard.h @@ -0,0 +1,619 @@ +/* + * Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef NVBOARD_H +#define NVBOARD_H + +#include "nvcommon.h" +#include "nverror.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** NvBoard - Board Support Package + + NvBoard is designed to decouple customer platform specifics from generic + binary only drivers. + + The interface must be thread-safe. + */ + +typedef struct NvBoardAperture_t +{ + /* Physical Address */ + NvPhysAddr address; + + /* Size of Aperture */ + NvU32 size; +} NvBoardAperture; + +typedef struct NvBoardApertureIO_t +{ + void ( *Write8 )( void *pAddress, NvU8 data ); + void ( *Write16 )( void *pAddress, NvU16 data ); + void ( *Write32 )( void *pAddress, NvU32 data ); + void ( *Write64 )( void *pAddress, NvU64 data ); + NvU8 ( *Read8 )( void *pAddress ); + NvU16 ( *Read16 )( void *pAddress ); + NvU32 ( *Read32 )( void *pAddress ); + NvU64 ( *Read64 )( void *pAddress ); +} NvBoardApertureIO; + +typedef struct NvBoardApertures_t +{ + NvBoardAperture hostInterface; + + /* pIO is null unless the apertures cannot be dereferenced */ + NvBoardApertureIO *pIO; +} NvBoardApertures; + +typedef enum +{ + /* Bus type A */ + NvBoardBusType_A, + + /* Bus type C */ + NvBoardBusType_C, + + NvBoardBusType_Forceword = 0x7fffffff, +} NvBoardBusType; + +typedef enum +{ + /* Direct Addressing */ + NvBoardBusAddressing_Direct, + + /* Indirect Addressing */ + NvBoardBusAddressing_Indirect, + + NvBoardBusAddressing_Forceword = 0x7fffffff, +} NvBoardBusAddressing; + +typedef enum +{ + /* 16-bit bus */ + NvBoardBusWidth_16, + + /* 32-bit bus */ + NvBoardBusWidth_32, + + NvBoardBusWidth_Forceword = 0x7fffffff, +} NvBoardBusWidth; + +typedef enum +{ + /* Handshake mode. */ + NvBoardBusMode_Handshake, + + /* Fixed cycle mode. */ + NvBoardBusMode_FixedCycle, + + NvBoardBusMode_Forceword = 0x7fffffff, +} NvBoardBusMode; + +typedef enum +{ + /* Asynchronous. */ + NvBoardBusSynchronization_Asynchronous, + + /* Synchronous. */ + NvBoardBusSynchronization_Synchronous, + + NvBoardBusSynchronization_Forceword = 0x7fffffff, +} NvBoardBusSynchronization; + +typedef enum +{ + /* Active low. */ + NvBoardBusReadyPolarity_ActiveLow, + + /* Active high. */ + NvBoardBusReadyPolarity_ActiveHigh, + + NvBoardBusReadyPolarity_Forceword = 0x7fffffff, +} NvBoardBusReadyPolarity; + +typedef struct NvBoardMode_t +{ + NvBoardBusAddressing GPUaddressing; // Bus perspective from GPU + NvBoardBusWidth GPUwidth; + NvBoardBusAddressing CPUaddressing; // Bus perspective from CPU + NvBoardBusWidth CPUwidth; + NvBoardBusType type; + NvBoardBusMode mode; + NvBoardBusSynchronization synchronization; + NvBoardBusReadyPolarity readyPolarity; +} NvBoardMode; + +/** Stateless methods. Methods can be called before NvBoardInit */ + +/** NvBoardListSupportedModes - Method to enumerate the modes of the board + + Two calls should be made to this method. + + On the first call, the method populates the number of modes, for the + display. When this call is issued pMode should be NULL. + + On the second call, the length of the pMode array is indicated by + the value of *pNum. When pNum is less than the number of modes the + method populates the pMode array with only the first pNum modes. + When is more than the number of modes, the method populates the + pMode array with the number of modes and writes the number of modes + into pNum. + + The first mode enumerated by this method is the recommended / default mode + for the display. + + @param pNum unsigned integer value indicating the number of modes in + the array pMode. + + @param pMode pointer to an array of mode structures, where the size of + the array is determined by the value in pNum. + + @retval NvSuccess - on success + NvErrorBadParameter - when at least one parameter is incorrect + */ +NvError +NvBoardListSupportedModes( NvU32 *pNum, NvBoardMode *pMode ); + +/** Library Initialization */ + +/** NvBoardInit - platform initialization. Typically chip select is configured here. + + NvBoardInit uses a reference counter. The first invocation performs the + initialization, all future calls increment the counter. The counter is + decremented by NvBoardDeInit. + + This method is to be called before any other NvBoard methods can be used. + + @param pMode pointer to structure containing a mode to set on the board. + If mode is null, the recommended mode will be chosen. + */ +NvError +NvBoardInit( const NvBoardMode *pMode ); + +/** NvBoardDeInit - platform deinitialization. + */ +void +NvBoardDeInit( void ); + +/** Wince platform resume control */ +NvError +NvBoardResume( void ); + +/** Wince platform suspend control */ +NvError +NvBoardSuspend( void ); + +/** SD card detect status when card detect pin is connected to CPU GPIO pin */ +NvError +nvBoardSDCardDetectStatus(NvU32 *bCardInserted); + +/** SD card detect sysintr number if card detect pin is connected to CPU GPIO pin*/ +NvError +nvBoardSDCardDetectSysintr(NvU32 *dwSysintr); + +/** SD card socket power pin configuration + In general, this pin is connected to CPU GPIO pin, and we need to configure + GPIO input/output mode and setup default value +*/ +NvError +nvBoardSDSocketPowerInit(void); + +/** SD card socket power control*/ +NvError +nvBoardSDSocketPowerOnOff(NvU32 SDPowerOn); + +/** Camera(VI) interface power plane control*/ +NvError +nvBoardVIPowerOnOff(NvU32 VIPowerOn); + +/** OEM specific powerOn related calls after NV backlight ON. + + @retval ERROR_SUCCESS on success or appropriate wince error + codes. +*/ +NvError +nvBoard_PostOEMBacklightOn(void); + +/** OEM specific powerOff related calls after NV backlight Off. + + @retval ERROR_SUCCESS on success or appropriate wince error + codes. +*/ +NvError +nvBoard_PostOEMBacklightOff(void); + +/** NvBoardGetApertures - get apertures + */ +NvError +NvBoardGetApertures( NvBoardApertures *pApertures ); + +/** NvBoardGetMode - get current mode + */ +NvError +NvBoardGetMode( NvBoardMode *pMode ); + +/** Device Events -- Abstraction for interrupts */ + +/* NvDeviceEvent enumerates the types of events. NvBoard implementors should not + hardcode event names. The only enumerated value that should be used in the + implementation of NvBoard is NvDeviceEvent_Num. + */ +typedef enum NvDeviceEvent_t +{ + /* NOTE: Currently using unabstracted events until INTx is removed. */ + NvDeviceEvent_HOST = 0, + NvDeviceEvent_GRMPD, + NvDeviceEvent_ME, + NvDeviceEvent_JPEGE, + NvDeviceEvent_VI, + NvDeviceEvent_EPP, + NvDeviceEvent_ISP, + NvDeviceEvent_DSP, + NvDeviceEvent_GR2D, + NvDeviceEvent_GR3D, + NvDeviceEvent_DISPLAY, + NvDeviceEvent_I2S, + NvDeviceEvent_IC, + NvDeviceEvent_SD, + NvDeviceEvent_MC, + NvDeviceEvent_EMC, + + /* NUM should always be the 2nd last enumerated value */ + NvDeviceEvent_Num, + + NvDeviceEvent_Forceword = 0x7fffffff, +} NvDeviceEvent; + +/** NvBoardEnableEvent - Method to enable an event + + If the event is fired before a client is waiting, the event will be remembered + for the next NvBoardWaitForEvent invocation. + */ +NvError +NvBoardEnableEvent( NvDeviceEvent event ); + +/** NvBoardDisableEvent - Method to disable an event + */ +void +NvBoardDisableEvent( NvDeviceEvent event ); + +/** NvBoardWaitForEvent - This method blocks until the event is fired + + Each event may only have one client waiting on it. If more than one client + needs to be notified of an event, a broadcast layer will need to be + developed on top of this API. + + Once an event is fired, it is disabled. To reenable the event use + NvBoardEnableEvent. +*/ +NvError +NvBoardWaitForEvent( NvDeviceEvent event ); + +/** NvBoardWaitForEventWithTimeOut - NvBoardWaitForEvent with a timeout + + @param timeOut Unit is milliseconds + */ +NvError +NvBoardWaitForEventWithTimeOut( NvDeviceEvent event, NvU32 timeOut ); + +/** I2C I/O */ + +/** NvBoardI2CWrite - I2C write operation. Implementing this function is optional. + */ +NvError +NvBoardI2CWrite( NvU32 addr, const void *ptr, NvU32 size ); + +/** NvBoardI2CRead - I2C read operation. Implementing this function is optional. + */ +NvError +NvBoardI2CRead( NvU32 addr, void *ptr, NvU32 size ); + +/** Voltage and power control */ + +typedef enum NvBoardPowerPlane_t +{ + NvBoardPowerPlane_AOCVDD = 0, + NvBoardPowerPlane_VECVDD, + NvBoardPowerPlane_MMCVDD, + NvBoardPowerPlane_TDCVDD, + NvBoardPowerPlane_VVDD, + NvBoardPowerPlane_EMVDD, + NvBoardPowerPlane_ACVDD, + NvBoardPowerPlane_LVDD, + NvBoardPowerPlane_HVDD, + NvBoardPowerPlane_AUXVDD, + NvBoardPowerPlane_R1CVDD, + NvBoardPowerPlane_SDVDD, + NvBoardPowerPlane_DRAM, + + NvBoardPowerPlane_Forceword = 0x7fffffff, +} NvBoardPowerPlane; + +typedef enum NvBoardClock_t +{ + NvBoardClock_PLL1 = 0, + NvBoardClock_PLL2, + NvBoardClock_COSC, + NvBoardClock_ROSC, + NvBoardClock_REF1, + NvBoardClock_REF2, + + NvBoardClock_Forceword = 0x7fffffff, +} NvBoardClock; + +/** NvBoardSetVoltage - change voltage of hardware block + + @param voltage Unit is millivolts + */ +NvError +NvBoardSetVoltage( NvBoardPowerPlane block, NvU32 voltage ); + +/** NvBoardGetVoltage - get voltage of hardware block + + @param voltage Unit is millivolts + */ +NvError +NvBoardGetVoltage( NvBoardPowerPlane plane, NvU32 *voltage ); + +/** NvBoardPowerOn - enable power to block + */ +NvError +NvBoardPowerOn( NvBoardPowerPlane plane ); + +/** NvBoardPowerOff - disable power to block + */ +NvError +NvBoardPowerOff( NvBoardPowerPlane plane ); + +/** NvBoardClockOn - enable clock + */ +NvError +NvBoardClockOn( NvBoardClock clock ); + +/** NvBoardClockOff - disable clock + */ +NvError +NvBoardClockOff( NvBoardClock clock ); + +/** NvBoardSetFrequency - set frequency of clock + + @param frequency unit is KHz + */ +NvError +NvBoardSetFrequency( NvBoardClock clock, NvU32 frequency ); + + +/** Platfrom specific debug function. This like an ioctl to the platfrom + sepcific code. + */ +void NvBoardDebug(void *p, NvU32 op, NvU32 arg); + +/** Event notification */ + +typedef enum +{ + NvBoardDeviceType_Silicon, + NvBoardDeviceType_Emulator, + NvBoardDeviceType_Forceword = 0x7fffffff, +} NvBoardDeviceType; + +typedef struct NvBoardDeviceInfo_t +{ + NvU32 MinorRev; + NvU32 MajorRev; + NvU32 ChipID; + NvU32 Family; + NvBoardDeviceType Type; +} NvBoardDeviceInfo; + +/** NvBoardPostChipInit - Called after the chip is intialized. + + Chip specific timings can be programmed at this point. + + NvIrqPostChipInit should be called here. + */ +NvError +NvBoardPostChipInit( NvBoardDeviceInfo *deviceInfo ); + +/** NvBoardPreChipDeInit - Called before chip is shutdown. + + NvIrqPreChipDeInit should be called here. + */ +NvError +NvBoardPreChipDeInit( void ); + +/** NvBoardClockSwitch - Clock switch handling + + @param frequency Unit is kHz + */ +NvError +NvBoardClockSwitch( NvU32 frequency ); + +typedef enum NvBoardStateEvent_t +{ +#ifdef NV_WINDOWS_CE + NvBoardStateEvent_PreDeviceInit, + NvBoardStateEvent_PostDeviceInit, + NvBoardStateEvent_PrePanelInit, + NvBoardStateEvent_PostPanelInit, + NvBoardStateEvent_PreSetMode, + NvBoardStateEvent_PostSetMode, + NvBoardStateEvent_PreDisplayInit, + NvBoardStateEvent_PostDisplayInit, + NvBoardStateEvent_PreOEMPowerHandlerVideoPowerOff, + NvBoardStateEvent_PostOEMPowerHandlerVideoPowerOff, + NvBoardStateEvent_PreOEMPowerHandlerVideoPowerOn, + NvBoardStateEvent_PostOEMPowerHandlerVideoPowerOn, +#endif + + NvBoardStateEvent_Forceword = 0x7fffffff, +} NvBoardStateEvent; + +/** NvBoardGlobalStateNotification - Called during global state transitions + + Only used on Windows CE at the moment. + */ +NvError +NvBoardGlobalStateNotification( NvBoardStateEvent event ); + +void +NvBoardOsWaitUS( NvU32 usec ); + +void +NvBoardOsSleepMS( NvU32 msec ); + +typedef struct NvBoardOsMutex_t *NvBoardOsMutex; +typedef struct NvBoardOsSemaphore_t *NvBoardOsSemaphore; +typedef struct NvBoardOsThread_t *NvBoardOsThread; + +NvError +NvBoardOsMutexCreate( const char *key, NvBoardOsMutex *mutex ); + +void +NvBoardOsMutexLock( NvBoardOsMutex mutex ); + +void +NvBoardOsMutexUnlock( NvBoardOsMutex mutex ); + +void +NvBoardOsMutexDestroy( NvBoardOsMutex mutex ); + +typedef struct NvBoardOsSharedMemDescriptor_t *NvBoardOsSharedMemDescriptor; + +NvError +NvBoardOsSharedMemAlloc( const char *key, size_t size, + NvBoardOsSharedMemDescriptor *descriptor ); + +NvError +NvBoardOsSharedMemMap( NvBoardOsSharedMemDescriptor descriptor, size_t offset, + size_t size, void **ptr ); + +void +NvBoardOsSharedMemUnmap( void *ptr, size_t size ); + +void +NvBoardOsSharedMemFree( NvBoardOsSharedMemDescriptor descriptor ); + +void +NvBoardOsMemset( void *s, NvU8 c, size_t size ); + +int +NvBoardOsMemcmp( const void *s1, const void *s2, size_t size ); + +#define NVBOARDOS_KEY_MAX 128 + +#define NVBOARDOS_MEM_NONE 0x0 +#define NVBOARDOS_MEM_READ 0x1 +#define NVBOARDOS_MEM_WRITE 0x2 +#define NVBOARDOS_MEM_EXECUTE 0x4 +#define NVBOARDOS_MEM_READ_WRITE ( NVBOARDOS_MEM_READ | NVBOARDOS_MEM_WRITE ) + +typedef enum +{ + NvBoardOsMemAttribute_Uncached = 0, + NvBoardOsMemAttribute_WriteBack = 1, + NvBoardOsMemAttribute_WriteCombined = 2, + + NvBoardOsMemAttribute_Force32 = 0x7FFFFFFF +} NvBoardOsMemAttribute; + +NvError +NvBoardOsPhysicalMemMap( NvPhysAddr phys, size_t size, + NvBoardOsMemAttribute attrib, NvU32 flags, void **ptr ); + + +void +NvBoardOsPhysicalMemUnmap( void *ptr, size_t size ); + +NvError +NvBoardOsMemoryAlloc(void **ptr, size_t size); + +void +NvBoardOsMemoryFree(void *ptr, size_t size); + +NvError +NvBoardOsGetConfigU32( const char *name, NvU32 *value ); + +void * +NvBoardOsAlloc( size_t size ); + +void +NvBoardOsFree( void *ptr ); + +typedef void (*NvBoardOsThreadFunction)( void *args ); + +NvError +NvBoardOsThreadCreate( const char *name, NvBoardOsThreadFunction function, + void *args, NvBoardOsThread *thread ); + +void +NvBoardOsThreadJoin( NvBoardOsThread thread ); + +void +NvBoardOsThreadYield( void ); + +NvError +NvBoardOsSemaphoreCreate( const char *key, NvBoardOsSemaphore *semaphore, + NvU32 value ); + +void +NvBoardOsSemaphoreWait( NvBoardOsSemaphore semaphore ); + +void +NvBoardOsSemaphoreSignal( NvBoardOsSemaphore semaphore ); + +void +NvBoardOsSemaphoreDestroy( NvBoardOsSemaphore semaphore ); + +NvError +nvBoard_PreDisplayInit(void); + +NvError +nvBoard_PostDisplayInit(void); + +NvError +nvBoard_PrePanelInit(void); + +NvError +nvBoard_PostPanelInit(void); + +NvError +nvBoard_PreDeviceInit(void); + +NvError +nvBoard_PostDeviceInit(void); + +NvError +nvBoard_PreSetMode(void); + +NvError +nvBoard_PostSetMode(void); + +NvError +nvBoard_PreOEMPowerHandlerVideoPowerOff(void); + +NvError +nvBoard_PostOEMPowerHandlerVideoPowerOff(void); + +NvError +nvBoard_PreOEMPowerHandlerVideoPowerOn(void); + +NvError +nvBoard_PostOEMPowerHandlerVideoPowerOn(void); + +#ifdef __cplusplus +} +#endif + +#endif // NVBOARD_H diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvcommon.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvcommon.h new file mode 100755 index 00000000..ab79088f --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvcommon.h @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2006 - 2007 NVIDIA Corporation. All Rights Reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef NVCOMMON_H +#define NVCOMMON_H + +#include "nvtypes.h" + +// Include headers that provide NULL, size_t, offsetof, and [u]intptr_t. In the +// event that the toolchain doesn't provide these, provide them ourselves. +#include +#if NVOS_IS_WINDOWS_CE +typedef int intptr_t; +typedef unsigned int uintptr_t; +#elif (NVOS_IS_LINUX && !defined(__KERNEL__)) || defined(__arm) +#include +#endif + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/** nvcommon.h contains standard definitions used by various interfaces + */ + +/** A physical address */ +#if NVOS_IS_WINDOWS +typedef NvU64 NvPhysAddr; +#else +typedef NvU32 NvPhysAddr; +#endif + +// For historical reasons that are hard to fix, nvtypes.h has an incorrect +// definition of NV_ALIGN_BYTES for Windows and Macintosh, and for other +// unsupported compilers like IAR. Provide a correct macro, which we call +// NV_ALIGN. This can be removed if and when nvtypes.h is fixed. +// Alternatively, we could use NV_DECLARE_ALIGNED... +#if NVOS_IS_WINDOWS +#define NV_ALIGN(size) __declspec(align(size)) +#elif defined(__GNUC__) || NVOS_IS_QNX +#define NV_ALIGN(size) __attribute__ ((aligned (size))) +#elif defined(__arm) +#define NV_ALIGN(size) __align(size) +#endif + +/** + * This macro wraps its argument with the equivalent of "#ifdef DEBUG", but also + * can be used where #ifdef's can't, like inside a macro. + */ +#if defined(DEBUG) +#define NV_DEBUG_CODE(x) x +#else +#define NV_DEBUG_CODE(x) +#endif + +/** Macro for determining the size of an array */ +#define NV_ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +/** Macro for taking min or max of a pair of numbers */ +#define NV_MIN(a,b) (((a) < (b)) ? (a) : (b)) +#define NV_MAX(a,b) (((a) > (b)) ? (a) : (b)) + +/** + * By convention, we use this value to represent an infinite wait interval in + * APIs that expect a timeout argument. A value of zero should not be + * interpreted as infinite -- it should be interpreted as "time out immediately + * and simply check whether the event has already happened." + */ +enum { NV_WAIT_INFINITE = 0xFFFFFFFF }; + +/** + * Union that can be used to view a 32-bit word as your choice of a 32-bit + * unsigned integer, a 32-bit signed integer, or an IEEE single-precision float. + * Here is an example of how you might use it to extract the (integer) bitwise + * representation of a floating-point number: + * NvData32 data; + * data.f = 1.0f; + * printf("%x", data.u); + */ +typedef union NvData32Rec +{ + NvU32 u; + NvS32 i; + NvF32 f; +} NvData32; + +/** NvPoint structure is used to determine a location on a 2-dimensional + object, where the coordinate (0,0) is located at the top-left of the + object. The values of x and y are in pixels. + */ +typedef struct _NvPoint_t +{ + /** horizontal location of the point */ + NvS32 x; + + /** vertical location of the point */ + NvS32 y; + +} NvPoint; + + +/** NvRect structure is used to define a 2-dimensional rectangle + where the rectangle is bottom right exclusive (i.e. the right most + column, and the bottom row of the rectangle is not included) + */ +typedef struct _NvRect_t +{ + /** left column of a rectangle */ + NvS32 left; + + /** top row of a rectangle*/ + NvS32 top; + + /** right column of a rectangle */ + NvS32 right; + + /** bottom row of a rectangle */ + NvS32 bottom; + +} NvRect; + + +/** NvSize structure is used to define a 2-dimensional surface + where the surface is determined by it's height and width in + pixels + */ +typedef struct _NvSize_t +{ + /* width of the surface in pixels */ + NvS32 width; + + /* height of the surface in pixels */ + NvS32 height; + +} NvSize; + + +/** NvDeviceHandle is an opaque handle to a device + */ +typedef struct NvDeviceStruct_t *NvDeviceHandle; +#ifdef __cplusplus +} +#endif + +#endif /* NVCOMMON_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nverror.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nverror.h new file mode 100755 index 00000000..6ef69080 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nverror.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006 NVIDIA Corporation. All Rights Reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef NVERROR_H +#define NVERROR_H + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/* NvError_t enumeration contains ALL return / error codes. Error codes + are specifically explicit to make it easy to identify where an error + came from. + + All error codes are derived from the macros in NvErrVal.h + */ +typedef enum _NvError_t +{ + +#ifdef NVERROR +#undef NVERROR +#endif /* NVERROR */ + +#define NVERROR(_name_, _value_, _desc_) _name_ = _value_, + + /* header included for macro expansion of error codes */ + #include "nverrval.h" + + /* bogus error code used to padd the enum to 32bits */ + NvErrorMax = 0x7FFFFFFF + +#undef NVERROR + +} NvError; + + +#ifdef __cplusplus +} +#endif + +#endif /* NVERROR_H */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nverrval.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nverrval.h new file mode 100755 index 00000000..2045dd83 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nverrval.h @@ -0,0 +1,277 @@ +/* + * Copyright (c) 2006 NVIDIA Corporation. All Rights Reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* NvErrVal.h is a header used for macro expansion of the errors defined for + the Nv methods & interfaces. + + This header is NOT protected from being included multiple times, as it is + used for C pre-processor macro expansion of error codes, and the + descriptions of those error codes. + + Each error code has a unique name, description and value to make it easier + for developers to identify the source of a failure. Thus there are no + generic or unknown error codes. +*/ + +/* common error codes */ +NVERROR(NvSuccess, 0x00000000, "success") +NVERROR(NvError_NotImplemented, 0x00000001, "method or interface is not implemented") +NVERROR(NvError_NotSupported, 0x00000002, "requested operation is not supported") +NVERROR(NvError_NotInitialized, 0x00000003, "method or interface is not initialized") +NVERROR(NvError_BadParameter, 0x00000004, "bad parameter to method or interface") +NVERROR(NvError_Timeout, 0x00000005, "not completed in the expected time") +NVERROR(NvError_InsufficientMemory, 0x00000006, "insufficient system memory") +NVERROR(NvError_ReadOnlyAttribute, 0x00000007, "cannot write a read-only attribute") +NVERROR(NvError_InvalidState, 0x00000008, "module is in invalid state to perform the requested operation") +NVERROR(NvError_InvalidAddress, 0x00000009, "invalid address") +NVERROR(NvError_InvalidSize, 0x0000000A, "invalid size") +NVERROR(NvError_BadValue, 0x0000000B, "illegal value specified for parameter") + +/* surface specific error codes */ +NVERROR(NvError_InsufficientVideoMemory, 0x00010000, "insufficient video memory") +NVERROR(NvError_BadSurfaceColorScheme, 0x00010001, "this surface scheme is not supported in the current controller") + +/* display specific error codes */ +NVERROR(NvError_DisplayIncompatible, 0x00020000, "display incompatible with method or interface") +NVERROR(NvError_NoCompatibleMode, 0x00020001, "no compatible mode exists for the attached displays") +NVERROR(NvError_ModeNotSupported, 0x00020002, "the mode is not supported by the display or controller") +NVERROR(NvError_ControllerActive, 0x00020003, "the controller is active and cannot perform the operation") +NVERROR(NvError_DisplayAlreadyAttached, 0x00020004, "the display is already attached to the controller") +NVERROR(NvError_DetachDisplayFirst, 0x00020005, "the display is already attached to another controller") +NVERROR(NvError_TooManyDisplays, 0x00020006, "the controller has not enough free display slots") +NVERROR(NvError_NoDisplaysAttached, 0x00020007, "there are no displays attached to this controller") +NVERROR(NvError_AlreadySuspended, 0x00020008, "the controller is already suspended") +NVERROR(NvError_NotSuspended, 0x00020009, "the controller is not suspended, so cannot resume it") +NVERROR(NvError_EmptyColorKeyRange, 0x00020010, "color key range that was set is empty") +NVERROR(NvError_NoMode, 0x00020011, "controller is not driving a mode, cannot perform the selected action") +NVERROR(NvError_NotInVerticalBlank, 0x00020012, "controller is not in vertical blank") + +/* DMA specific error codes */ +NVERROR(NvError_DmaTargetNotLocked, 0x00030000, "client does not have a lock for this target DMA controller") +NVERROR(NvError_DmaCommunicationError, 0x00030001, "the DMA controller had failed to communicate with the target") +NVERROR(NvError_DmaOpNotFinished, 0x00030002, "the DMA operation has not completed") +NVERROR(NvError_DmaChannelNotAvailable, 0x00030003, "the requested DMA channel is not available") +NVERROR(NvError_InvalidSourceId, 0x00030004, "invalid source ID") +NVERROR(NvError_InvalidDestinationId, 0x00030005, "invalid destination ID") + +/* NvOs error codes */ +NVERROR(NvError_FileWriteFailed, 0x00040000, "the file write operation failed") +NVERROR(NvError_FileReadFailed, 0x00040001, "the file read operation failed") +NVERROR(NvError_EndOfFile, 0x00040002, "the end of file has been reached") +NVERROR(NvError_FileOperationFailed, 0x00040003, "the file operation has failed") +NVERROR(NvError_DirOperationFailed, 0x00040004, "the directory operation has failed") +NVERROR(NvError_EndOfDirList, 0x00040005, "there are no more entries in the directory") +NVERROR(NvError_ConfigVarNotFound, 0x00040006, "the configuration variable is not present") +NVERROR(NvError_InvalidConfigVar, 0x00040007, "the configuration variable is corrupted") +NVERROR(NvError_LibraryNotFound, 0x00040008, "the dynamic library was not found for open") +NVERROR(NvError_SymbolNotFound, 0x00040009, "the symbol in a dyanmic library was not found") +NVERROR(NvError_MemoryMapFailed, 0x0004000a, "the memory mapping operation failed") +NVERROR(NvError_MutexCreateFailed, 0x0004000b, "the mutex create operation failed") +NVERROR(NvError_SemaphoreCreateFailed, 0x0004000c, "the semaphore create operation failed") +NVERROR(NvError_ThreadCreateFailed, 0x0004000d, "the thread create operation failed") +NVERROR(NvError_SharedMemAllocFailed, 0x0004000e, "the shared memory allocation operation failed") + +/* NvBoard error codes */ +NVERROR(NvError_I2CNotAcknowledged, 0x00050000, "I2C acknowledge was not received") +NVERROR(NvError_KernelDriverNotFound, 0x00050001, "unable to find kernel driver") +NVERROR(NvError_KernelDriverBadVersion, 0x00050002, "the kernel driver is out of date") +NVERROR(NvError_KernelDriverIOFailed, 0x00050003, "the driver operation failed") +NVERROR(NvError_ModeMismatched, 0x00050004, "conflicting board mode") +NVERROR(NvError_VoltageOutsideRange, 0x00050005, "requested voltage is outside valid range") +NVERROR(NvError_EventNotEnabled, 0x00050006, "the event is not enabled") +NVERROR(NvError_EventBusy, 0x00050007, "the event is busy") +NVERROR(NvError_InterruptInitFailed, 0x00050008, "error initializing interrupts") + +/* NvIrq error codes */ +NVERROR(NvError_EventNotFound, 0x00060000, "no event found") + +/* Nv2D error codes */ +NVERROR(NvError_InvalidSurface, 0x00070000, "invalid surface") +NVERROR(NvError_RopNotSupported, 0x00070001, "rop not supported") +NVERROR(NvError_SurfaceNotSupported, 0x00070002, "surface is not supported") +NVERROR(NvError_BitmapNotSupported, 0x00070003, "bitmap is not supported") + +/* NvPower error codes */ +NVERROR(NvError_ResourceAlreadyInUse, 0x00080000, "resource already in use") +NVERROR(NvError_ResourceNotInUse, 0x00080001, "resource not in use") +NVERROR(NvError_ResourceInUse, 0x00080002, "resource is in use") + +/* UART error codes */ +NVERROR(NvError_UartOverrun, 0x00090000, "overrun occurred when receiving the data") +NVERROR(NvError_UartFraming, 0x00090001, "data received had framing error") +NVERROR(NvError_UartParity, 0x00090002, "data received had parity error") +NVERROR(NvError_UartFifoError, 0x00090003, "FIFO error occurred during receive/transmit") +NVERROR(NvError_UartBreakReceived, 0x00090004, "received break signal") +NVERROR(NvError_UartTransmit, 0x00090005, "UART transmit error") + +/* NvRm error code */ +NVERROR(NvError_RmInitFailed, 0x000a0000, "rm failed to initialize") +NVERROR(NvError_RmChannelInitFailure, 0x000a0001, "channel init failed") +NVERROR(NvError_RmStreamInitFailure, 0x000a0002, "stream init failed") +NVERROR(NvError_RmSyncPointAllocFailure, 0x000a0003, "sync point alloc failed") +NVERROR(NvError_RmStreamFlushFailure, 0x000a0004, "stream flush failed") + +/* NvIsp error codes */ +NVERROR(NvError_ChannelAllocFailed, 0x000B0000, "channel allocation failed") +NVERROR(NvError_NoConnectedImager, 0x000B0001, "no imager connected") +NVERROR(NvError_UnsupportedResolution, 0x000B0002, "unsupported resolution") +NVERROR(NvError_I2CCommunicationError, 0x000B0003, "i2c communication failed") +NVERROR(NvError_IspConfigFileParseError, 0x000B0004, "isp config file parse error") +NVERROR(NvError_IspBusy, 0x000B0005, "isp 3A algorithm busy") +NVERROR(NvError_TooDark, 0x000B0006, "image too dark for 3A operation") + +/* NvTest error codes */ +NVERROR(NvError_TestApplicationFailed, 0x000c0000, "the test application failed") +NVERROR(NvError_TestNoUserInput, 0x000c0001, "no user input available") +NVERROR(NvError_TestCommandLineError, 0x000c0002, "command line parsing error") + +/* NvCam error codes */ +NVERROR(NvError_VmAllocFailed, 0x000D0000, "virtual machine allocation failed") +NVERROR(NvError_ScriptAccessFailed, 0x000D0001, "unable to access script") +NVERROR(NvError_GettingComponentFailed, 0x000D0002, "getting component failed") +NVERROR(NvError_VmBufferAllocFailed, 0x000D0003, "vm buffer allocation failed") +NVERROR(NvError_CameraScriptNotPresent, 0x000D0004, "camera script not present") +NVERROR(NvError_IllegalBayerValues, 0x000D0005, "illegal bayer values") +NVERROR(NvError_ColorFormatNotSupported, 0x000D0006, "color format not supported") + +/* USBF error codes */ +NVERROR(NvError_UsbfTxfrActive, 0x000E0000, "The endpoint has an active transfer in progress.") +NVERROR(NvError_UsbfTxfrComplete, 0x000E0001, "The endpoint has a completed transfer that has not been cleared.") +NVERROR(NvError_UsbfEpStalled, 0x000E0002, "The endpoint has been placed in a halted or stalled state.") +NVERROR(NvError_UsbfEpError, 0x000E0003, "The last transfer started on this endpoint failed to complete.") + +/* ^^^ ADD ALL NEW ERRORS RIGHT ABOVE HERE ^^^ */ + +NVERROR(NvErrorNotImplemented, 0x00000001, "remove me later!") +NVERROR(NvErrorNotSupported, 0x00000002, "remove me later!") +NVERROR(NvErrorNotInitialized, 0x00000003, "remove me later!") +NVERROR(NvErrorBadParameter, 0x00000004, "remove me later!") +NVERROR(NvErrorTimeout, 0x00000005, "remove me later!") +NVERROR(NvErrorInsufficientMemory, 0x00000006, "remove me later!") +NVERROR(NvErrorReadOnlyAttribute, 0x00000007, "remove me later!") +NVERROR(NvErrorInvalidState, 0x00000008, "remove me later!") +NVERROR(NvErrorInvalidAddress, 0x00000009, "remove me later!") +NVERROR(NvErrorInvalidSize, 0x0000000A, "remove me later!") +NVERROR(NvErrorBadValue, 0x0000000B, "remove me later!") + +/* surface specific error codes */ +NVERROR(NvErrorInsufficientVideoMemory, 0x00010000, "remove me later!") +NVERROR(NvErrorBadSurfaceColorScheme, 0x00010001, "remove me later!") + +/* display specific error codes */ +NVERROR(NvErrorDisplayIncompatible, 0x00020000, "remove me later!") +NVERROR(NvErrorNoCompatibleMode, 0x00020001, "remove me later!") +NVERROR(NvErrorModeNotSupported, 0x00020002, "remove me later!") +NVERROR(NvErrorControllerActive, 0x00020003, "remove me later!") +NVERROR(NvErrorDisplayAlreadyAttached, 0x00020004, "remove me later!") +NVERROR(NvErrorDetachDisplayFirst, 0x00020005, "remove me later!") +NVERROR(NvErrorTooManyDisplays, 0x00020006, "remove me later!") +NVERROR(NvErrorNoDisplaysAttached, 0x00020007, "remove me later!") +NVERROR(NvErrorAlreadySuspended, 0x00020008, "remove me later!") +NVERROR(NvErrorNotSuspended, 0x00020009, "remove me later!") +NVERROR(NvErrorEmptyColorKeyRange, 0x00020010, "remove me later!") +NVERROR(NvErrorNoMode, 0x00020011, "remove me later!") +NVERROR(NvErrorNotInVerticalBlank, 0x00020012, "remove me later!") + +/* DMA specific error codes */ +NVERROR(NvErrorDmaTargetNotLocked, 0x00030000, "remove me later!") +NVERROR(NvErrorDmaCommunicationError, 0x00030001, "remove me later!") +NVERROR(NvErrorDmaOpNotFinished, 0x00030002, "remove me later!") +NVERROR(NvErrorDmaChannelNotAvailable, 0x00030003, "remove me later!") +NVERROR(NvErrorInvalidSourceId, 0x00030004, "remove me later!") +NVERROR(NvErrorInvalidDestinationId, 0x00030005, "remove me later!") + +/* NvOs error codes */ +NVERROR(NvErrorFileWriteFailed, 0x00040000, "remove me later!") +NVERROR(NvErrorFileReadFailed, 0x00040001, "remove me later!") +NVERROR(NvErrorEndOfFile, 0x00040002, "remove me later!") +NVERROR(NvErrorFileOperationFailed, 0x00040003, "remove me later!") +NVERROR(NvErrorDirOperationFailed, 0x00040004, "remove me later!") +NVERROR(NvErrorEndOfDirList, 0x00040005, "remove me later!") +NVERROR(NvErrorConfigVarNotFound, 0x00040006, "remove me later!") +NVERROR(NvErrorInvalidConfigVar, 0x00040007, "remove me later!") +NVERROR(NvErrorLibraryNotFound, 0x00040008, "remove me later!") +NVERROR(NvErrorSymbolNotFound, 0x00040009, "remove me later!") +NVERROR(NvErrorMemoryMapFailed, 0x0004000a, "remove me later!") +NVERROR(NvErrorMutexCreateFailed, 0x0004000b, "remove me later!") +NVERROR(NvErrorSemaphoreCreateFailed, 0x0004000c, "remove me later!") +NVERROR(NvErrorThreadCreateFailed, 0x0004000d, "remove me later!") +NVERROR(NvErrorSharedMemAllocFailed, 0x0004000e, "remove me later!") + +/* NvBoard error codes */ +NVERROR(NvErrorI2CNotAcknowledged, 0x00050000, "remove me later!") +NVERROR(NvErrorKernelDriverNotFound, 0x00050001, "remove me later!") +NVERROR(NvErrorKernelDriverBadVersion, 0x00050002, "remove me later!") +NVERROR(NvErrorKernelDriverIOFailed, 0x00050003, "remove me later!") +NVERROR(NvErrorModeMismatched, 0x00050004, "remove me later!") +NVERROR(NvErrorVoltageOutsideRange, 0x00050005, "remove me later!") +NVERROR(NvErrorEventNotEnabled, 0x00050006, "remove me later!") +NVERROR(NvErrorEventBusy, 0x00050007, "remove me later!") +NVERROR(NvErrorInterruptInitFailed, 0x00050008, "remove me later!") + +/* NvIrq error codes */ +NVERROR(NvErrorEventNotFound, 0x00060000, "remove me later!") + +/* Nv2D error codes */ +NVERROR(NvErrorInvalidSurface, 0x00070000, "remove me later!") +NVERROR(NvErrorRopNotSupported, 0x00070001, "remove me later!") +NVERROR(NvErrorSurfaceNotSupported, 0x00070002, "remove me later!") +NVERROR(NvErrorBitmapNotSupported, 0x00070003, "remove me later!") + +/* NvPower error codes */ +NVERROR(NvErrorResourceAlreadyInUse, 0x00080000, "remove me later!") +NVERROR(NvErrorResourceNotInUse, 0x00080001, "remove me later!") +NVERROR(NvErrorResourceInUse, 0x00080002, "remove me later!") + +/* UART error codes */ +NVERROR(NvErrorUartOverrun, 0x00090000, "remove me later!") +NVERROR(NvErrorUartFraming, 0x00090001, "remove me later!") +NVERROR(NvErrorUartParity, 0x00090002, "remove me later!") +NVERROR(NvErrorUartFifoError, 0x00090003, "remove me later!") +NVERROR(NvErrorUartBreakReceived, 0x00090004, "remove me later!") +NVERROR(NvErrorUartTransmit, 0x00090005, "remove me later!") + +/* NvRm error code */ +NVERROR(NvErrorRmInitFailed, 0x000a0000, "remove me later!") +NVERROR(NvErrorRmChannelInitFailure, 0x000a0001, "remove me later!") +NVERROR(NvErrorRmStreamInitFailure, 0x000a0002, "remove me later!") +NVERROR(NvErrorRmSyncPointAllocFailure, 0x000a0003, "remove me later!") +NVERROR(NvErrorRmStreamFlushFailure, 0x000a0004, "remove me later!") + +/* NvIsp error codes */ +NVERROR(NvErrorChannelAllocFailed, 0x000B0000, "remove me later!") +NVERROR(NvErrorNoConnectedImager, 0x000B0001, "remove me later!") +NVERROR(NvErrorUnsupportedResolution, 0x000B0002, "remove me later!") +NVERROR(NvErrorI2CCommunicationError, 0x000B0003, "remove me later!") +NVERROR(NvErrorIspConfigFileParseError, 0x000B0004, "remove me later!") +NVERROR(NvErrorIspBusy, 0x000B0005, "remove me later!") +NVERROR(NvErrorTooDark, 0x000B0006, "remove me later!") + +/* NvTest error codes */ +NVERROR(NvErrorTestApplicationFailed, 0x000c0000, "remove me later!") +NVERROR(NvErrorTestNoUserInput, 0x000c0001, "remove me later!") +NVERROR(NvErrorTestCommandLineError, 0x000c0002, "remove me later!") + +/* NvCam error codes */ +NVERROR(NvErrorVmAllocFailed, 0x000D0000, "remove me later!") +NVERROR(NvErrorScriptAccessFailed, 0x000D0001, "remove me later!") +NVERROR(NvErrorGettingComponentFailed, 0x000D0002, "remove me later!") +NVERROR(NvErrorVmBufferAllocFailed, 0x000D0003, "remove me later!") +NVERROR(NvErrorCameraScriptNotPresent, 0x000D0004, "remove me later!") +NVERROR(NvErrorIllegalBayerValues, 0x000D0005, "remove me later!") +NVERROR(NvErrorColorFormatNotSupported, 0x000D0006, "remove me later!") + +/* USBF error codes */ +NVERROR(NvErrorUsbfTxfrActive, 0x000E0000, "remove me later!") +NVERROR(NvErrorUsbfTxfrComplete, 0x000E0001, "remove me later!") +NVERROR(NvErrorUsbfEpStalled, 0x000E0002, "remove me later!") +NVERROR(NvErrorUsbfEpError, 0x000E0003, "remove me later!") + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvime.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvime.h new file mode 100755 index 00000000..e533f47f --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvime.h @@ -0,0 +1,849 @@ +/* + * Copyright (c) 2006 - 2007 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software and related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +/* + * nvime.h + * + * A collection of image enhancing functions that utilize the GoForce + * h/w. This file contains the common routines that are used by all + * image enhancing functions, as well as the APIs/enums/defines that are + * specific to all image enhancing functions. + * + * PLEASE NOTE: NvIme is not thread-safe. All API calls must be made in + * a single thread, or the application must explicitly protect each NvIme + * call with its own mutex. Any other usage is not guaranteed to work. + */ + +#ifndef NVIME +#define NVIME + +#include "nvtypes.h" +#include "GFRm.h" +#include "GFGx.h" +#include "GFVx.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct NvImeStruct_t *NvImeHandle; + +typedef enum { + NVIME_OK=0, + NVIME_OUT_OF_MEMORY=1, + NVIME_INIT_FAILED=2, + NVIME_INVALID_HANDLE=3, + NVIME_SURFACE_INDEX_OUT_OF_RANGE=4, + NVIME_INVALID_SURFACE=5, + NVIME_ILLEGAL_SURFACE_BASE=6, + NVIME_ILLEGAL_SURFACE_STRIDE=7, + NVIME_INVALID_ROTATION=8, + NVIME_INVALID_COORD=9, + NVIME_MISSING_SURFACE=10, + NVIME_INVALID_KERNEL=11, + NVIME_INVALID_KERNEL_SIZE=12, + NVIME_INVALID_PIXFMT=13, + NVIME_INVALID_LUT=14, + NVIME_UNSPECIFIED_OPERATION=15, + NVIME_UNSUPPORTED_OPERATION=16, + NVIME_OPERATION_FAILED=17, + NVIME_INVALID_FLAG=18, + NVIME_INVALID_GET=19, + NVIME_INVALID_SCALE=20, + NVIME_INVALID_BIAS=21, + NVIME_ILLEGAL_CSC_VALUES=22, + NVIME_ILLEGAL_COEFF=23, + NVIME_ILLEGAL_COEFF_ARRAY_SIZE=24, +} NvImeStatus; + + +// NvImeOpen() +// +// Initialize the library and return a handle to pass into all future +// API calls into this library. + +NvImeStatus NvImeOpen(GFRmHandle hRm, NvImeHandle *phIme); + + +// NvImeClose() +// +// Close down the library and relinquish all held resources. + +void NvImeClose(NvImeHandle *phIme); + + +// NvImeSetSourceSurface() +// +// Set a source surface. "index" can be in 0..NVIME_MAX_SOURCE_SURFACES-1. +// Because each source surface will be read as a texture by the 3D unit, +// each must abide by 3D's texture alignment restrictions. These +// restrictions are: +// +// SB1) Base of surface must begin at an aligned memory address. Use +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_ALIGNMENT_BYTES) +// to get this value. +// +// SB2) Stride must be a multiple of +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_STRIDE_BYTES) +// +// SB3) Stride must be a power of two +// +// SB4) Width must be between +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_MIN_WIDTH_PIXELS) and +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_MAX_WIDTH_PIXELS) +// +// SB5) Height must be between +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_MIN_HEIGHT_PIXELS) and +// NvIme_GetIntegerv(NVIME__GET_SRC_SURF_MAX_HEIGHT_PIXELS) +// +// Even though the 3D unit only understands textures that are powers of +// two in width and height, the width and height of the data contained +// within the source surfaces do NOT need to actually be a powers of two +// in size. Likewise, the height of the surface does not need to be a +// power of two (although the width always must be). +// +// If the width of the source data is not a power of two, then in addition +// to the above texture alignment restrictions, the following must be true: +// +// SBW1) Memory between the end of the data in a row and the end of the +// row must be allowed to be overwritten by this library. Because +// the 3D texture unit does bilinear interpolation, this library +// will need to replicate the last column of data out to the next +// (M/2) columns over, where M is the width of the kernel used. +// If width + (M/2) crosses over a power of two boundary, the +// adjusted width need only be as large as the power of two +// boundary. +// +// If the height of the source data is not a power of two, then in addition +// to the above texture alignment restrictions, the following must be true: +// +// SBH1) The height of the source surface does *not* need to be a power +// of two. +// +// SBH2) The height of the source surface needs to be large enough for the +// library to replicate the last row to the next (N/2) rows down, +// where N is the height of the kernel used. This area must be +// allowed to be overwritten by this library. If height + (N/2) +// crosses over a power of two boundary, the adjusted height need +// only be as large as the power of two boundary. +// +// Note that some image enhancing operations will only work on certain +// source pixel formats. The NvImeProcessRect() call will return an +// error code on a source pixel format mismatch. + +#define NVIME_MAX_SOURCE_SURFACES 5 +NvImeStatus NvImeSetSourceSurface(NvImeHandle hIme, + NvU32 index, + GFRMSURFACE *sourceSurface); + + +// NvImeSetDestSurface() +// +// Set the destination surface. Because the destination surface will be +// written by the 3D unit, each surface must abide by 3D's surface +// alignment restrictions. These restrictions are: +// +// DB1) Base of surface must begin at an aligned memory address. Use +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_ALIGNMENT_BYTES) +// to get this value. +// +// DB2) Stride must be a multiple of +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_STRIDE_BYTES) +// +// DB3) Width must be between +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_MIN_WIDTH_PIXELS) and +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_MAX_WIDTH_PIXELS) +// +// DB4) Height must be between +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_MIN_HEIGHT_PIXELS) and +// NvIme_GetIntegerv(NVIME__GET_DST_SURF_MAX_HEIGHT_PIXELS) +// +// "rotation" specifies how to rotate the source surfaces onto the +// destination surface as part of the rendering process. "rotation" +// must be one of GFGx's fast rotation modes. Specifically these are: +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_IDENTITY | 0 | 1 | | 0 | 1 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 2 | 3 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_ROT_90 | 0 | 1 | | 1 | 3 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 0 | 2 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_ROT_180 | 0 | 1 | | 3 | 2 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 1 | 0 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_ROT_270 | 0 | 1 | | 2 | 0 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 3 | 1 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_FLIP_X | 0 | 1 | | 1 | 0 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 3 | 2 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_FLIP_Y | 0 | 1 | | 2 | 3 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 0 | 1 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_TRANS_LR | 0 | 1 | | 0 | 2 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 1 | 3 | +// +---+---+ +---+---+ +// +// +---+---+ +---+---+ +// GFGXEX2_FAST_ROTATE_TRANS_RL | 0 | 1 | | 3 | 1 | +// +---+---+ --> +---+---+ +// | 2 | 3 | | 2 | 0 | +// +---+---+ +---+---+ +// +// Note that some image enhancing operations will only work on certain +// destination pixel formats. The NvImeProcessRect() call will return an +// error code on a destination pixel format mismatch. + +NvImeStatus NvImeSetDestSurface(NvImeHandle hIme, + GFRMSURFACE *destSurface, + NvU32 rotation); + + +// NvImeSetVxBltCSCCoeff() +// +// Set the Vx's color space conversion coefficients in the channel that +// NvIme is using. This API is nothing more than a pass-through to +// GFVxBltSetCSCCoeff(). However, it does need to be called if CSCCoeffs +// are desired to be changed. If GFVxBltSetCSCCoeff() is called directly +// by the application, the Vx issued commands in that channel will pick +// up the CSCCoeffs, but NvIme will not see them. +NvImeStatus NvImeSetVxBltCSCCoeff(NvImeHandle hIme, + GFVXCSCCOEF *pCoef, + NvU32 option); + + +// NvImeProcessRect() +// +// Render using the current algorithm. Application must call an NvIme +// API not contained within this header file that registers the algorithm +// to render with. +// +// "srcCoords" points to "numSrcCoords" GFRECTs. "srcCoords[i]" describes +// the region to use from the i'th sourceSurface. "dstCoord" points to a +// single GFRECT. If a coord extends beyond the size of the surface it +// refers to, it will be clamped to the surface boundaries. +// +// The range of pixels referred to in "dstCoord" and each "srcCoords[i]" +// do not have to match. Scaling up and down is supported. The quality +// of scaling up and down can vary with the particular image enhancing +// algorithm used. +// +// flags is used to pass down optional parameters to the renderer. +// +// NVIME_PR_FLAGS_DITHER_OUTPUT: dither color output to destination +// surface. This flag has no effect if destSurface->ColorFormat +// is GF_SURFACE_ARGB8888. + +#define NVIME_PR_FLAGS_DITHER_OUTPUT (1<<0) + +NvImeStatus NvImeProcessRect(NvImeHandle hIme, + NvU32 numSrcCoords, + GFRECT *srcCoords, + GFRECT *dstCoord, + NvU32 flags); + +// NvImeFinish() +// +// A blocking call that does not return until all previously called +// NvIme commands are complete. + +void NvImeFinish(NvImeHandle hIme); + + +// +// Kernel sizes +// +// When kernels are specified, they use row major order. For example a +// 3x3 kernel with weights arranged like so: +// +// w00 w01 w02 +// w10 w11 w12 +// w20 w21 w22 +// +// would be specified in memory in the following order: +// +// w00 w01 w02 w10 w11 w12 w20 w21 w22 + +typedef enum { + NVIME_KERNEL_SIZE_1x1=0, + NVIME_KERNEL_SIZE_3x1=1, + NVIME_KERNEL_SIZE_5x1=2, +} NvImeKernelSize; + + +// +// Pixel formats +// + +#define NVIME_COMPONENT_MASK(a) \ + (((1U << NVIME_PIXFMT_##a##_BITS) - 1) << NVIME_PIXFMT_##a##_SHIFT) + +#define NVIME_PIXFMT_L8_LUMINANCE_BITS 8 +#define NVIME_PIXFMT_L8_LUMINANCE_SHIFT 0 +#define NVIME_PIXFMT_L8_LUMINANCE_MASK NVIME_COMPONENT_MASK(L8_LUMINANCE) + +#define NVIME_PIXFMT_RGB565_BLUE_BITS 5 +#define NVIME_PIXFMT_RGB565_BLUE_SHIFT 0 +#define NVIME_PIXFMT_RGB565_BLUE_MASK NVIME_COMPONENT_MASK(RGB565_BLUE) +#define NVIME_PIXFMT_RGB565_GREEN_BITS 6 +#define NVIME_PIXFMT_RGB565_GREEN_SHIFT 5 +#define NVIME_PIXFMT_RGB565_GREEN_MASK NVIME_COMPONENT_MASK(RGB565_GREEN) +#define NVIME_PIXFMT_RGB565_RED_BITS 5 +#define NVIME_PIXFMT_RGB565_RED_SHIFT 11 +#define NVIME_PIXFMT_RGB565_RED_MASK NVIME_COMPONENT_MASK(RGB565_RED) + +#define NVIME_PIXFMT_RGB888_BLUE_BITS 8 +#define NVIME_PIXFMT_RGB888_BLUE_SHIFT 0 +#define NVIME_PIXFMT_RGB888_BLUE_MASK NVIME_COMPONENT_MASK(RGB888_BLUE) +#define NVIME_PIXFMT_RGB888_GREEN_BITS 8 +#define NVIME_PIXFMT_RGB888_GREEN_SHIFT 8 +#define NVIME_PIXFMT_RGB888_GREEN_MASK NVIME_COMPONENT_MASK(RGB888_GREEN) +#define NVIME_PIXFMT_RGB888_RED_BITS 8 +#define NVIME_PIXFMT_RGB888_RED_SHIFT 16 +#define NVIME_PIXFMT_RGB888_RED_MASK NVIME_COMPONENT_MASK(RGB888_RED) + +#define NVIME_PIXFMT_ARGB8888_BLUE_BITS 8 +#define NVIME_PIXFMT_ARGB8888_BLUE_SHIFT 0 +#define NVIME_PIXFMT_ARGB8888_BLUE_MASK NVIME_COMPONENT_MASK(ARGB8888_BLUE) +#define NVIME_PIXFMT_ARGB8888_GREEN_BITS 8 +#define NVIME_PIXFMT_ARGB8888_GREEN_SHIFT 8 +#define NVIME_PIXFMT_ARGB8888_GREEN_MASK NVIME_COMPONENT_MASK(ARGB8888_GREEN) +#define NVIME_PIXFMT_ARGB8888_RED_BITS 8 +#define NVIME_PIXFMT_ARGB8888_RED_SHIFT 16 +#define NVIME_PIXFMT_ARGB8888_RED_MASK NVIME_COMPONENT_MASK(ARGB8888_RED) +#define NVIME_PIXFMT_ARGB8888_ALPHA_SHIFT 24 +#define NVIME_PIXFMT_ARGB8888_ALPHA_MASK NVIME_COMPONENT_MASK(ARGB8888_ALPHA) + +#define NVIME_PIXFMT_BAYER10_BITS 10 +#define NVIME_PIXFMT_BAYER10_SHIFT 0 +#define NVIME_PIXFMT_BAYER10_MASK NVIME_COMPONENT_MASK(BAYER10) + +#define NVIME_PIXFMT_BAYER12_BITS 12 +#define NVIME_PIXFMT_BAYER12_SHIFT 0 +#define NVIME_PIXFMT_BAYER12_MASK NVIME_COMPONENT_MASK(BAYER12) + +#define NVIME_PIXFMT_BAYER14_BITS 14 +#define NVIME_PIXFMT_BAYER14_SHIFT 0 +#define NVIME_PIXFMT_BAYER14_MASK NVIME_COMPONENT_MASK(BAYER14) + +#define NVIME_PIXFMT_BAYER3D_LO_BITS 7 +#define NVIME_PIXFMT_BAYER3D_LO_SHIFT 0 +#define NVIME_PIXFMT_BAYER3D_LO_MASK NVIME_COMPONENT_MASK(BAYER3D_LO) +#define NVIME_PIXFMT_BAYER3D_HI_BITS 7 +#define NVIME_PIXFMT_BAYER3D_HI_SHIFT 8 +#define NVIME_PIXFMT_BAYER3D_HI_MASK NVIME_COMPONENT_MASK(BAYER3D_HI) + +typedef enum { + NVIME_PIXFMT_L8=0, // L=Luminance (R8=L8, G8=L8, B8=L8) + NVIME_PIXFMT_RGB565=1, + NVIME_PIXFMT_RGB888=2, + NVIME_PIXFMT_ARGB8888=3, + NVIME_PIXFMT_BAYER10=4, + NVIME_PIXFMT_BAYER12=5, + NVIME_PIXFMT_BAYER14=6, + NVIME_PIXFMT_BAYER3D=7, +} NvImePixelFormat; + + +// +// LUT values +// + +#define NVIME_LUT_ENTRIES 256 + + +// +// Scale factors +// + +typedef enum { + NVIME_SCALE_1_0=0, + NVIME_SCALE_2_0=1, + NVIME_SCALE_4_0=2, +} NvImeScaleFactor; + + +/* + * Below are APIs used to control the sharpening image enhancement + * operation. Sharpening takes in a YUV420p source surface and outputs + * to a destination surface of type RGB565, ARGB8888 or YUV420p. + * ==================================================================== + */ + +// NvImeSharpenGetIntegerv() +// +// Return the value or values of a selected parameter that apply to +// the YUV420p sharpen image enhancing operation. +// +// NVIME_SHARPEN_GET_SRC_SURF_ALIGNMENT_BYTES +// NVIME_SHARPEN_GET_DST_SURF_ALIGNMENT_BYTES +// +// "params" returns 1 value, the SOURCE/DEST surface's starting +// address must be aligned to this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_STRIDE_BYTES +// NVIME_SHARPEN_GET_DST_SURF_STRIDE_BYTES +// +// "params" returns 1 value, the SOURCE/DEST surface's stride must +// be a multiple of this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_MIN_WIDTH_PIXELS +// NVIME_SHARPEN_GET_DST_SURF_MIN_WIDTH_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's width in +// pixels must be greater than or equal to this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_MAX_WIDTH_PIXELS +// NVIME_SHARPEN_GET_DST_SURF_MAX_WIDTH_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's width in +// pixels must be less than or equal to this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_MIN_HEIGHT_PIXELS +// NVIME_SHARPEN_GET_DST_SURF_MIN_HEIGHT_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's height in +// pixels must be greater than or equal to this value. +// +// NVIME_SHARPEN_GET_SRC_SURF_MAX_HEIGHT_PIXELS +// NVIME_SHARPEN_GET_DST_SURF_MAX_HEIGHT_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's height in +// pixels must be less than or equal to this value. + +typedef enum { + NVIME_SHARPEN_GET_SRC_SURF_ALIGNMENT_BYTES=0, + NVIME_SHARPEN_GET_SRC_SURF_STRIDE_BYTES=1, + NVIME_SHARPEN_GET_SRC_SURF_MIN_WIDTH_PIXELS=2, + NVIME_SHARPEN_GET_SRC_SURF_MAX_WIDTH_PIXELS=3, + NVIME_SHARPEN_GET_SRC_SURF_MIN_HEIGHT_PIXELS=4, + NVIME_SHARPEN_GET_SRC_SURF_MAX_HEIGHT_PIXELS=5, + NVIME_SHARPEN_GET_DST_SURF_ALIGNMENT_BYTES=6, + NVIME_SHARPEN_GET_DST_SURF_STRIDE_BYTES=7, + NVIME_SHARPEN_GET_DST_SURF_MIN_WIDTH_PIXELS=8, + NVIME_SHARPEN_GET_DST_SURF_MAX_WIDTH_PIXELS=9, + NVIME_SHARPEN_GET_DST_SURF_MIN_HEIGHT_PIXELS=10, + NVIME_SHARPEN_GET_DST_SURF_MAX_HEIGHT_PIXELS=11, +} NvImeSharpenGet; + +NvImeStatus NvImeSharpenGetIntegerv(NvImeHandle hIme, + NvImeSharpenGet name, + int *params); + + +// NvImeSharpenParams() +// +// Specify sharpen parameters to use during subsequent call to +// NvImeProcessRect(). +// +// When NvImeProcessRect() is called with sharpening in effect, there +// are additional restrictions are applied: +// +// 1) Only sourceSurfaces[0] is used. Which means that numSrcCoords +// must be 1. Stretching sub-regions of a surface is not +// supported. Because pixels will be replicated as needed to +// provide a buffer for the filter kernel, if one were to use +// a sub-region of a surface, valid data would be over-written. +// dstCoord can have arbitrary values that allow scaling within +// destSurface. +// +// 2) sourceSurfaces[0]->ColorFormat must be one of: +// +// GF_SURFACE_YUV420 +// GF_SURFACE_JPEGDEC +// GF_SURFACE_MPEGDEC +// +// 3) destSurface->ColorFormat must be one of: +// +// GF_SURFACE_RGB565 +// GF_SURFACE_ARGB8888 +// GF_SURFACE_YUV420 +// GF_SURFACE_JPEGDEC +// GF_SURFACE_MPEGDEC +// +// 4) The rotation value must be GFGXEX2_FAST_ROTATE_IDENTITY (any +// desired rotation must be performed after this library has +// finished its processing). +// +// The sharpening algorithm is described as follows: +// +// 1) The Y data in sourceSurfaces[0] is replicated as needed. The +// number of pixels replicated at the end of each row will be: +// +// MAX( (M/2), distance to next power-of-two ) +// +// where M is the width of the kernel. Note that if +// sourceSurfaces[0]'s width is a power-of-two, then the distance +// to the next power-of-two will be zero, and no pixels will be +// replicated. +// +// The number of pixels replicated at the bottom of each column +// will be: +// +// MAX( (N/2), distance to next power-of-two ) +// +// where N is the height of the kernel. Note that if +// sourceSurfaces[0]'s height is a power-of-two, then the distance +// to the next power-of-two will be zero, and no pixels will be +// replicated. +// +// 2) If destSurface->ColorFormat is GF_SURFACE_RGB565 or +// GF_SURFACE_ARGB8888, then a 2D StretchBlit is performed on +// sourceSurfaces[0] to destSurface. The full range of +// sourceSurfaces[0] will be scaled to the region indicated by +// dstCoord within destSurface. +// +// If destSurface->ColorFormat is GF_SURFACE_YUV420, +// GF_SURFACE_JPEGDEC or GF_SURFACE_MPEGDEC then no StretchBlit +// will be performed. The 3D stage of the algorithm will write +// the destination directly without blending to an RGB surface. +// +// 3) For each pixel in the region within destSurface specified by +// dstCoord, the 3D unit will perform a number of texture reads from +// sourceSurfaces[0] that matches the size of the kernel. Each +// texture read will be bilinearly filtered. The texture reads will +// be multiplied times the S1.8 kernel weights, summed together, +// scaled by one of 1.0, 2.0 or 4.0, a bias is added, and the result +// is clamped to the 0.0 to 1.0 range (note that intermediate values +// that exceed the h/w's S1.8 numeric range will be clamped to S1.8). +// The final clamped value will index into the provided LUT, which +// contains biased color values. +// +// When destSurface->ColorFormat is GF_SURFACE_RGB565 or ARGB8888: +// +// Each color channel from the LUT value will be multiplied by +// 2.0 and then have 1.0 subtracted from it. These unbiased +// colors will be added to the pixel in destSurface. +// +// When destSurface->ColorFormat is GF_SURFACE_YUV420, +// GF_SURFACE_JPEGDEC or GF_SURFACE_MPEGDEC: +// +// The red color channel from the LUT value will be multiplied +// by 2.0 and then have 1.0 subtracted from it. This unbiased +// color will be added to the Y value from sourceSurfaces[0] +// and be written to the Y pixel in destSurface. The U and V +// pixels in destSurface will be scaled by the 3D h/w using a +// 2x2 filter. No sharpening is applied to the U and V pixels. +// +// Below is a psuedo-code approximation for this part of the algorithm: +// +// // for each pixel +// for ( y=dstCoord->top ; x<=dstCoord->bottom ; y++ ) { +// for ( x=dstCoord->left ; x<=dstCoord->right ; x++ ) { +// +// // get proper indices for sourceSurfaces[0] +// srcX = sourcesSurfaces[0].width * x/destSurface.width; +// srcY = sourcesSurfaces[0].height * y/destSurface.height; +// +// // for each kernel entry +// idx = 0; +// for ( ky=0 ; ky 1.0) idx = 1.0; +// +// if ((destSurface->ColorFormat == GF_SURFACE_YUV420) || +// (destSurface->ColorFormat == GF_SURFACE_JPEGDEC) || +// (destSurface->ColorFormat == GF_SURFACE_MPEGDEC)) { +// // write the color value +// dstColor[x,y] = srcColor[srcX, srcY] + +// 2.0 * lut[NVIME_LUT_ENTRIES * idx] - 1.0; +// } else { +// // update color value +// dstColor[x,y] += 2.0 * lut[NVIME_LUT_ENTRIES * idx] - 1.0; +// } +// } +// } +// +// The supported kernel sizes are: +// +// NVIME_KERNEL_SIZE_1x1 +// NVIME_KERNEL_SIZE_3x1 +// NVIME_KERNEL_SIZE_5x1 +// +// Each value in the kernel must be in S1.8 format, which means values +// between -2 inclusive and +2 exclusive in increments of 1/256 are +// representable. +// +// The LUT must contain NVIME_LUT_ENTRIES entries, each of size NvU32. +// The supported LUT formats are: +// +// NVIME_PIXFMT_L8 +// NVIME_PIXFMT_RGB888 +// +// Refer to the NVIME_PIXFMT_* macros for appropriate color channel bit +// positions. When destSurface->ColorFormat is GF_SURFACE_YUV420, +// GF_SURFACE_JPEGDEC or GF_SURFACE_MPEGDEC the Y buffer is processed +// directly without going through an RGB space. Because the Y buffer is +// monochrome, only the red channel of an RGB888 LUT will be used when +// the destSurface->ColorFormat is GF_SURFACE_YUV420, GF_SURFACE_JPEGDEC +// or GF_SURFACE_MPEGDEC. +// +// The finalScale parameter can be any of NVIME_SCALE_1_0, NVIME_SCALE_2_0, +// or NVIME_SCALE_4_0. +// +// The finalBias parameter must be in S1.8 format. + +NvImeStatus +NvImeSharpenParams(NvImeHandle hIme, + NvImeKernelSize kernelSize, + NvU32 *kernel, + NvImePixelFormat lutFormat, + NvU32 *lut, + NvImeScaleFactor finalScale, + NvU32 finalBias); + + +/* + * Below are APIs used to control the anti-vignetting (also known as + * lens correction) image enhancement operation. Anti-vignetting takes + * in a BAYER3D source surface and outputs either BAYER10, BAYER12 or + * BAYER14 data to the same source surface. BAYER3D is format that has + * 14bits of data like BAYER14, but has unused bits at positions 8 and 16. + * So if your 16bits of data looked like --dcba9876543210, these would + * be stored in BAYER3D as -dcba987-6543210. + * ==================================================================== + */ + +// NvImeAntivigGetIntegerv() +// +// Return the value or values of a selected parameter that apply to +// the BAYER3D anti-vignetting image operation. +// +// NVIME_ANTIVIG_GET_SURF_ALIGNMENT_BYTES +// +// "params" returns 1 value, the SOURCE/DEST surface's starting +// address must be aligned to this value. +// +// NVIME_ANTIVIG_GET_SURF_STRIDE_BYTES +// +// "params" returns 1 value, the SOURCE/DEST surface's stride must +// be a multiple of this value. +// +// NVIME_ANTIVIG_GET_SURF_MIN_WIDTH_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's width in +// pixels must be greater than or equal to this value. +// +// NVIME_ANTIVIG_GET_SURF_MAX_WIDTH_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's width in +// pixels must be less than or equal to this value. +// +// NVIME_ANTIVIG_GET_SURF_MIN_HEIGHT_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's height in +// pixels must be greater than or equal to this value. +// +// NVIME_ANTIVIG_GET_SURF_MAX_HEIGHT_PIXELS +// +// "params" returns 1 value, the SOURCE/DEST surface's height in +// pixels must be less than or equal to this value. +// +// NVIME_ANTIVIG_GET_COEFF_ARRAY_MIN_WIDTH +// +// "params" returns 1 value, the minimum "widthCoeffArrays" that +// can be passed into NvImeAntivigParams. +// +// NVIME_ANTIVIG_GET_COEFF_ARRAY_MAX_WIDTH +// +// "params" returns 1 value, the maximum "widthCoeffArrays" that +// can be passed into NvImeAntivigParams. +// +// NVIME_ANTIVIG_GET_COEFF_ARRAY_MIN_HEIGHT +// +// "params" returns 1 value, the minimum "heightCoeffArrays" that +// can be passed into NvImeAntivigParams. +// +// NVIME_ANTIVIG_GET_COEFF_ARRAY_MAX_HEIGHT +// +// "params" returns 1 value, the maximum "heightCoeffArrays" that +// can be passed into NvImeAntivigParams. + +typedef enum { + NVIME_ANTIVIG_GET_SURF_ALIGNMENT_BYTES=0, + NVIME_ANTIVIG_GET_SURF_STRIDE_BYTES=1, + NVIME_ANTIVIG_GET_SURF_MIN_WIDTH_PIXELS=2, + NVIME_ANTIVIG_GET_SURF_MAX_WIDTH_PIXELS=3, + NVIME_ANTIVIG_GET_SURF_MIN_HEIGHT_PIXELS=4, + NVIME_ANTIVIG_GET_SURF_MAX_HEIGHT_PIXELS=5, + NVIME_ANTIVIG_GET_COEFF_ARRAY_MIN_WIDTH=6, + NVIME_ANTIVIG_GET_COEFF_ARRAY_MAX_WIDTH=7, + NVIME_ANTIVIG_GET_COEFF_ARRAY_MIN_HEIGHT=8, + NVIME_ANTIVIG_GET_COEFF_ARRAY_MAX_HEIGHT=9, +} NvImeAntivigGet; + +NvImeStatus NvImeAntivigGetIntegerv(NvImeHandle hIme, + NvImeAntivigGet name, + int *params); + + +// NvImeAntivigParams() +// +// Specify anti-vignetting parameters to use during subsequent call to +// NvImeProcessRect(). +// +// When NvImeProcessRect() is called with anti-vignetting in effect, +// there are additional restrictions that are applied: +// +// 1) Only sourceSurfaces[0] is used. Which means that numSrcCoords +// must be 1. +// +// 2) sourceSurfaces[0]->ColorFormat must be GF_SURFACE_BAYER16. +// The actual data contained in the surface must be in the +// BAYER3D format. BAYER3D has 14 bits of data, where bits 13 +// and 7 are ignored. So if your data value is --dcba9876543210, +// that would be stored in BAYER3D format as -dcba987-6543210. +// +// 3) The contents of the structure pointed to by destSurface must +// be equal to the contents of the structure pointed to by +// sourceSurfaces[0]. +// +// 4) The contents of the structure pointed to by dstCoord must be +// equal to the contents of the structure pointed to by +// srcCoords[0]. +// +// 5) The rotation value must be GFGXEX2_FAST_ROTATE_IDENTITY (any +// desired rotation must be performed after this library has +// finished its processing). +// +// The anti-vignetting algorithm is described below: +// +// 1) The 4 passed in coefficient arrays are scanned looking for the +// largest gain value. The largest gain is used to determine +// whether the overall coefficient range is in [0.0 .. 2.0], +// [0.0 .. 4.0], [0.0 .. 8.0] or [0.0 .. 16.0]. The lower the +// maximum gain, the more precise the output will be. Here is +// a table showing the output format as a function of the maximum +// gain value: +// +// Maximum gain Output pixel format +// ------------- ------------------- +// [0.0 .. 2.0] BAYER14 +// [0.0 .. 4.0] BAYER12 +// [0.0 .. 8.0] BAYER12 +// [0.0 .. 16.0] BAYER10 +// +// 2) After the maximum gain has been determined, the coefficient +// arrays are divided by their maximum value rounded up to a power +// of 2, and stored in an 8bit value. +// +// 3) When NvImeProcessRect is called, the 8bit gain values for the +// appropriate 00, 01, 10, 11 pixel are bilinearly interpolated. +// The result is multiplied times the BAYER3D pixel value from +// the source surface and then written back in place in a +// BAYER10/12/14 format. +// +// 4) NvImeProcessRect can process an entire BAYER3D buffer at a time, +// or a horizontal swath of the buffer. This is to support large +// buffers (like 5Mpixel) where it may not be practical (or even +// possible) to have multiple buffers residing in memory at the same +// time. +// +// NvImeAntivigAdjustScanline() modifies the access pattern of the +// 8bit gain values as if srcCoords[0].top were scanlineBias larger. +// This shifts the accesses down. +// +// For example, suppose you had a 2048x64 BAYER3D surface which is +// used to hold 32 pixel high swaths of a 2048x2048 surface in +// a double buffered manner. You would process the buffer like so: +// +// srcCoordsLow.top = 0; +// srcCoordsLow.left = 0; +// srcCoordsLow.right = 2047; +// srcCoordsLow.bottom = 31; +// +// srcCoordsHigh.top = 32; +// srcCoordsHigh.left = 0; +// srcCoordsHigh.right = 2047; +// srcCoordsHigh.bottom = 63; +// +// // Fill SourceSurface[0] rows [0..31] with camera rows [0..31] +// NvImeAntivigAdjustScanline(hIme, 0); +// NvImeProcessRects(hIme, 1, &srcCoordsLow, &srcCoordsLow, 0); +// +// // Fill SourceSurface[0] rows [32..63] with camera rows [32..63] +// NvImeProcessRects(hIme, 1, &srcCoordsHigh, &srcCoordsHigh, 0); +// +// // Fill SourceSurface[0] rows [0..31] with camera rows [64..95] +// NvImeAntivigAdjustScanline(hIme, 32); +// NvImeProcessRects(hIme, 1, &srcCoordsLow, &srcCoordsLow, 0); +// +// // Fill SourceSurface[0] rows [32..63] with camera rows [96..127] +// NvImeProcessRects(hIme, 1, &srcCoordsHigh, &srcCoordsHigh, 0); +// +// // Fill SourceSurface[0] rows [0..31] with camera rows [128..159] +// NvImeAntivigAdjustScanline(hIme, 64); +// NvImeProcessRects(hIme, 1, &srcCoordsLow, &srcCoordsLow, 0); +// +// // Fill SourceSurface[0] rows [32..63] with camera rows [160..191] +// NvImeProcessRects(hIme, 1, &srcCoordsHigh, &srcCoordsHigh, 0); +// +// // and so on... + +NvImeStatus +NvImeAntivigParams(NvImeHandle hIme, + NvU32 widthCoeffArrays, + NvU32 heightCoeffArrays, + float *coeffsPix00, + float *coeffsPix01, + float *coeffsPix10, + float *coeffsPix11, + NvU32 totalSurfaceWidth, + NvU32 totalSurfaceHeight, + NvImePixelFormat *outFormat); + +NvImeStatus +NvImeAntivigAdjustScanline(NvImeHandle hIme, NvU32 scanlineBias); + +#ifdef __cplusplus +} +#endif + +#endif /* NVIME */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvirq.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvirq.h new file mode 100755 index 00000000..d3bf5d8b --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvirq.h @@ -0,0 +1,144 @@ +/* + * Copyright (c) 2006 NVIDIA Corporation. All rights reserved. + * + * NVIDIA Corporation and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA Corporation is strictly prohibited. + */ + +#ifndef NVIRQ_H +#define NVIRQ_H + +/** NvIrq - Interrupt abstraction layer: + + This provides a simple interface for querying and masking abstract interrupt + events. The interface is designed to be used inside of the OEM's ISR or IST. + + NvIrq needs NvOsPhysicalMemMap and NvOsPhysicalMemUnmap (Only uncached + write-through functionality is used). NvOsSharedMem* is needed if NvIrq + isn't initialized as a singleton. + + NvIrq is not thread-safe. + */ + +#include "nvcommon.h" +#include "nverror.h" +#include "nvboard.h" + +/** NvIrqChannel enum defines available I/O channels. No two I/O operations can + safely occur at the same time on a channel. (This is only important in + indirect addressing. In direct address I/O operators are atomic and there + is no concept of channels). + */ +typedef enum +{ + /* Channel used while not in ISR. This channel is used by all user-mode code. */ + NvIrqChannel_Normal, + + /* Channel used in ISR context */ + NvIrqChannel_Isr +} NvIrqChannel; + +/* NvIrqInterruptPortInfo struct describes the MMIO layout of the interrupt + status registers */ +typedef struct NvIrqInterruptPortInfo_t +{ + /* Offset of status register */ + NvU32 statusOffset; + + /* Offset of mask register */ + NvU32 maskOffset; +} NvIrqInterruptPortInfo; + +/** NvIrqInit - Method to initialize the NvIrq API. + + This method is to be called before any other NvIrq methods can be used. + + If NvIrq is not initialized as a singleton, NvIrq will put its state in + shared memory. + */ +NvError +NvIrqInit( const NvBoardMode *pMode, const NvBoardApertures *pApertures, + NvBool singleton ); + +/** NvIrqDeInit - Method to deinitialize the NvIrq API. + */ +void +NvIrqDeInit( void ); + +/** NvIrqPostChipInit - To be called after the chip is intialized. + + This method should be called during NvBoardPostChipInit. If NvIrqInit succeeds + NvIrqEnableInterrupt() should be used to unmask the global interrupt line. + */ +NvError +NvIrqPostChipInit( NvIrqChannel channel ); + +/** NvIrqPreChipDeInit - To be called before chip is shutdown. + + This method should be called during NvBoardPreChipDeInit. NvIrqDisableInterrupt() + should be called before invoking this method. + */ +void +NvIrqPreChipDeInit( NvIrqChannel channel ); + +/** NvIrqFastScan - Method to quickly check if interrupt is pending + + This method is faster than NvIrqScanForEvent. It only checks whether an + interrupt is pending or not. NvIrqScanForEvent should be called from an + IST to do the actual decoding. This is useful when ISR latency is + important. + + If an interrupt is pending the global SCxx interrupt line is masked + and should reenabled using NvIrqEnableInterrupt after NvIrqScanForEvent + is called. + */ +NvBool +NvIrqFastScan( NvIrqChannel channel ); + +/** NvIrqScanForEvent - Method to check SCxx for pending events. + + This method should be called from an ISR or IST. If a pending event is + found, the event is masked. Once an upper layer clears the source of + the event in hardware, the event can be reenabled. + + @retval NvSuccess - on success + NvErrorEventNotFound - no event found + */ +NvError +NvIrqScanForEvent( NvIrqChannel channel, NvDeviceEvent *event ); + +/** NvIrqIsEventPending - Check whether the event is pending + */ +NvBool +NvIrqIsEventPending( NvIrqChannel channel, NvDeviceEvent event ); + +/** NvIrqEnableInterrupt - Method to unmask global interrupt line + */ +void +NvIrqEnableInterrupt( NvIrqChannel channel ); + +/** NvIrqDisableInterrupt - Method to mask global interrupt line + */ +void +NvIrqDisableInterrupt( NvIrqChannel channel ); + +/** NvIrqEnableEvent - Method to unmask an event + */ +void +NvIrqEnableEvent( NvIrqChannel channel, NvDeviceEvent event ); + +/** NvIrqDisableEvent - Method to mask an event + */ +void +NvIrqDisableEvent( NvIrqChannel channel, NvDeviceEvent event ); + +/** NvIrqQueryInterruptPortInfo - Method to query interrupt port info. Calling + this method should be strongly avoided. + */ +NvError +NvIrqQueryInterruptPortInfo( NvIrqInterruptPortInfo *pPortInfo ); + +#endif // NVIRQ_H diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvtypes.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvtypes.h new file mode 100755 index 00000000..ba01db2d --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/nvtypes.h @@ -0,0 +1,258 @@ + /***************************************************************************\ +|* *| +|* Copyright 1993-1998 NVIDIA, Corporation. All rights reserved. *| +|* *| +|* NOTICE TO USER: The source code is copyrighted under U.S. and *| +|* international laws. Users and possessors of this source code are *| +|* hereby granted a nonexclusive, royalty-free copyright license to *| +|* use this code in individual and commercial software. *| +|* *| +|* Any use of this source code must include, in the user documenta- *| +|* tion and internal comments to the code, notices to the end user *| +|* as follows: *| +|* *| +|* Copyright 1993-1998 NVIDIA, Corporation. All rights reserved. *| +|* *| +|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| +|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| +|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| +|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| +|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| +|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| +|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| +|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| +|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| +|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| +|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| +|* *| +|* U.S. Government End Users. This source code is a "commercial *| +|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| +|* consisting of "commercial computer software" and "commercial *| +|* computer software documentation," as such terms are used in *| +|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| +|* ment only as a commercial end item. Consistent with 48 C.F.R. *| +|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| +|* all U.S. Government End Users acquire the source code with only *| +|* those rights set forth herein. *| +|* *| + \***************************************************************************/ + + + /***************************************************************************\ +|* *| +|* NV Architecture Interface *| +|* *| +|* defines common widths used to access hardware in of NVIDIA's *| +|* Unified Media Architecture (TM). *| +|* *| + \***************************************************************************/ + + +#ifndef NVTYPES_INCLUDED +#define NVTYPES_INCLUDED +#ifdef __cplusplus +extern "C" { +#endif + +#include "cpuopsys.h" + +#define NVRM_64 1 +#if defined(NV_64_BITS) +#define NVRM_TRUE64 1 +#endif + + /***************************************************************************\ +|* Typedefs *| + \***************************************************************************/ + +typedef unsigned char NvV8; /* "void": enumerated or multiple fields */ +typedef unsigned short NvV16; /* "void": enumerated or multiple fields */ +typedef unsigned char NvU8; /* 0 to 255 */ +typedef unsigned short NvU16; /* 0 to 65535 */ +typedef signed char NvS8; /* -128 to 127 */ +typedef signed short NvS16; /* -32768 to 32767 */ +typedef signed int NvS32; /* -2147483648 to 2147483647 */ +typedef float NvF32; /* IEEE Single Precision (S1E8M23) */ +typedef double NvF64; /* IEEE Double Precision (S1E11M52) */ + +/* mainly for 64-bit linux, where long is 64 bits + * and win9x, where int is 16 bit. + */ +#if (defined(NV_UNIX) || defined(vxworks) || defined(NV_WINDOWS_CE) || \ + defined(__arm) || defined(__IAR_SYSTEMS_ICC__) || defined(NV_QNX) || \ + defined(NV_INTEGRITY) || defined(NV_MODS) || defined(__GNUC__) ) && \ + !defined(NV_MACINTOSH) +typedef unsigned int NvV32; /* "void": enumerated or multiple fields */ +typedef unsigned int NvU32; /* 0 to 4294967295 */ +#else +typedef unsigned long NvV32; /* "void": enumerated or multiple fields */ +typedef unsigned long NvU32; /* 0 to 4294967295 */ +#endif + +/* 64-bit types for compilers that support them, plus some obsolete variants */ +#if defined(__GNUC__) || defined(__arm) || defined(__IAR_SYSTEMS_ICC__) || defined(__ghs__) || defined(_WIN64) +typedef unsigned long long NvU64; /* 0 to 18446744073709551615 */ +typedef long long NvS64; /* 2^-63 to 2^63-1 */ +#else +typedef unsigned __int64 NvU64; /* 0 to 18446744073709551615 */ +typedef __int64 NvS64; /* 2^-63 to 2^63-1 */ +#endif + +/* Boolean type */ +enum { NV_FALSE = 0, NV_TRUE = 1 }; +typedef NvU8 NvBool; + +/* Macros to extract the low and high parts of a 64-bit unsigned integer */ +/* Also designed to work if someone happens to pass in a 32-bit integer */ +#define NvU64_HI32(n) ((NvU32)(((NvU64)(n)) >> 32)) +#define NvU64_LO32(n) ((NvU32)((NvU64)(n))) +#define NvU40_HI32(n) ((NvU32)((((NvU64)(n))>>8)&0xffffffff)) +#define NvU40_HI24of32(n) ((NvU32)((((NvU64)(n)& 0xffffffff))&0xffffff00)) + + /***************************************************************************\ +|* *| +|* 64 bit type definitions for use in interface structures. *| +|* *| + \***************************************************************************/ + +#if defined(NV_64_BITS) + +typedef void* NvP64; /* 64 bit void pointer */ +typedef NvU64 NvUPtr; /* pointer sized unsigned int */ + +#define NvP64_VALUE(n) (n) + +#else + +typedef NvU64 NvP64; /* 64 bit void pointer */ +typedef NvU32 NvUPtr; /* pointer sized unsigned int */ + +#define NvP64_VALUE(n) ((void *)(NvUPtr)(n)) + +#endif + +// XXX Obsolete -- get rid of me... +typedef NvP64 NvP64_VALUE_T; +typedef NvUPtr NV_UINTPTR_T; +#define NvP64_LVALUE(n) (n) +#define NvP64_SELECTOR(n) (0) + +/* Useful macro to hide required double cast */ +#define NV_PTR_TO_NvP64(n) (NvP64)(NV_UINTPTR_T)(n) + +/* obsolete stuff */ +/* MODS needs to be able to build without these definitions because they collide + with some definitions used in mdiag. */ +#ifndef DONT_DEFINE_U032 +typedef NvV8 V008; +typedef NvV16 V016; +typedef NvV32 V032; +typedef NvU8 U008; +typedef NvU16 U016; +typedef NvU32 U032; +typedef NvS8 S008; +typedef NvS16 S016; +typedef NvS32 S032; +#endif +#if defined(MACOS) || defined(macintosh) || defined(__APPLE_CC__) || defined(NV_MODS) || defined(MINIRM) || defined(NV_UNIX) || defined (NV_QNX) +/* more obsolete stuff */ +/* need to provide these on macos9 and macosX */ +#if defined(__APPLE_CC__) /* gross but Apple osX already claims ULONG */ +#undef ULONG // just in case +#define ULONG unsigned long +#else +typedef unsigned long ULONG; +#endif +typedef unsigned char *PUCHAR; +#endif + +#if !defined(NV_PTR) + /* Supports 32bit libraries on Win64 + See drivers\opengl\include\nvFirst.h for explanation */ +#define NV_PTR +#define CAST_NV_PTR(p) p +#endif + +/* Aligns fields in structs so they match up between 32 and 64 bit builds */ +/* XXX Mac still uses structures without alignment -- needs to be fixed */ +#if (defined(__GNUC__) || defined(NV_QNX)) && !defined(NV_MACINTOSH) +#define NV_ALIGN_BYTES(size) __attribute__ ((aligned (size))) +#elif defined(__arm) +#define NV_ALIGN_BYTES(size) __align(ALIGN) +#else +// XXX This is dangerously nonportable! We really shouldn't provide a default +// version of this that doesn't do anything. +#define NV_ALIGN_BYTES(size) +#endif + +// NV_DECLARE_ALIGNED() can be used on all platforms. +// This macro form accounts for the fact that __declspec on Windows is required +// before the variable type, +// and NV_ALIGN_BYTES is required after the variable name. +#if defined(NV_WINDOWS) +#define NV_DECLARE_ALIGNED(TYPE_VAR, ALIGN) __declspec(align(ALIGN)) TYPE_VAR +#elif defined(__GNUC__) || defined(NV_QNX) +#define NV_DECLARE_ALIGNED(TYPE_VAR, ALIGN) TYPE_VAR __attribute__ ((aligned (ALIGN))) +#elif defined(__arm) +#define NV_DECLARE_ALIGNED(TYPE_VAR, ALIGN) __align(ALIGN) TYPE_VAR +#endif + + +/***************************************************************************\ +|* Function Declaration Types *| + \***************************************************************************/ + +// stretching the meaning of "nvtypes", but this seems to least offensive +// place to re-locate these from nvos.h which cannot be included by a number +// of builds that need them + +#if defined(NV_WINDOWS) + + #define NV_INLINE __inline + + #if _MSC_VER >= 1200 + #define NV_FORCEINLINE __forceinline + #else + #define NV_FORCEINLINE __inline + #endif + + #define NV_APIENTRY __stdcall + #define NV_FASTCALL __fastcall + #define NV_CDECLCALL __cdecl + #define NV_STDCALL __stdcall + +#else // defined(NV_WINDOWS) + + #if defined(__GNUC__) || defined(__INTEL_COMPILER) + #define NV_INLINE __inline__ + #elif defined (macintosh) + #define NV_INLINE inline + #elif defined(__arm) + #define NV_INLINE __inline + #else + #define NV_INLINE + #endif + + #if defined(__GNUC__) + // GCC 3.1 and beyond support the always_inline function attribute. + #if (__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1) + #define NV_FORCEINLINE __inline__ __attribute__((always_inline)) + #else + #define NV_FORCEINLINE __inline__ + #endif + #else /* defined(__GNUC__) */ + #define NV_FORCEINLINE NV_INLINE + #endif + + #define NV_APIENTRY + #define NV_FASTCALL + #define NV_CDECLCALL + #define NV_STDCALL + +#endif // defined(NV_WINDOWS) + +#ifdef __cplusplus +}; +#endif + +#endif /* NVTYPES_INCLUDED */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/vssver2.scc b/kernel-2.6.33/arch/arm/mach-pxa/g900/gf5500/inc/vssver2.scc new file mode 100755 index 0000000000000000000000000000000000000000..aaf2f3863685f3f430796c71bfeea422f9c199b3 GIT binary patch literal 1261 zcmYk)Ye-XJ7zglUVuE?eLa7Y;;DRFCyqlJnxw|#DwmI|GI&LSOdA7ODwUtGYnbL-$Az7N4ftrZ*B`T>tL>KXbi5MlRX(4_vvd8D_b$!|M|Gm%izUSqfC2sMfA|9qT zB=g2Zt;5rco0DczD(ecb^MfdgPf=7d)Sne2v+wJIBK*K9;EIfiFDd?a&DYP2= zYyX26#7DtnR}78B8t{h9@R%Q=r8utz$INy_?cL!*>%dbDQ;Ew@o#;I9@0jksl9DR4 z9=v$8qT$4K*Kzs}w_4r2M#l~|uUjQy|c-v202yP!~pKPiKzUqCMz)gW_5AkvE>F&}|PnbXU4dAwyhJCL({m>`COX`-MPEjbD22&fWm&yON z6dX3*yR>OC82d)>z*gRQ(&q_eabjh*K`lt~lBSnx+!Z8BRiWt*KWZNn&{S;kId6f-AD)f(+wG}C3?;IN5UlbCjTXWh6g zQLC{^#f%Gsj9ZtvC3d@&J3|pK!j>Xl%hg;RH>7ZISAgo9&T)$wBhKZxB^E9zS+(8j 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zoWsxf1;64vF5ox(jz4e_f8sCvjZ3(UE6_$A4|u{0`b@G9c$im8K%d{y?zgnftt3i8 zyS?IJbm2KYXGYmmlltU==Y4{4Lh)Sr8Dxh;9sRsRpK@EhVCTigp)J7fDMLlS{ zVgocpBQ!=6grg}U&rR$!((_H>+u9O;7M%6COn0w z@eDTOSv-d=cph8v0=D5ryo8sr9k1Y3yoT5D2HwP5cpLx3JJ^Apco(~{8+-5`-p9YN z7a!n5e1v`Y7@y!%?8gBd#Ai5!!}uIu;0V6NQ5?f@e1)%Z0w-|_r*Q_~;9Go$@9_hE z#991=bNCs*;8&c-1^kBJ@dqyAPyB_yaS4}k1zPayqko?8f;W8NixTjIKLSt^r4WeH zD1#vAL%ty>i*g7>c~k)ZyhbXaGOC~|s-Ze+APhB83%8&)>Yy&_p*|X*AsV4Enjjoa z5rJlCjuvQ%NVGz0v_V_6Lwj^UN8E}|h(c#{L05D`cl1C{M57maqYwHb2K~?<127P` zAr^5Mguxhsp%{kYxE&*K2S#EPMk5|$kbp!aAsH!1MH=qJSfnEZnaDym#$h~ikc$bJ zh)I}?DVU18Fb&f&12d6_yKxWh#VpLm9NdSwn1}he9}BP$58xko5R0%F4`B(GVi_LB za;(5gtimH$jWu`_Yq1WG;c=|T6WD+!u@Rf_6rRR2(7fkahR|svsJ&Rr*WvX9?@!*haGE)1GivSeGRAf{ z=z2oupQkj-*R0eR*Sq`&2;i?75w9Waef^0|!JjD@UtY&sWtOio`QUn&uhCA{6Ooq> zS1$VF2)$pY$G(^CPThFp6YJ*y#;h*i_&<&}y#F`rqJzxne6HH^8(W_?EZ>``bldgi zawQ9V_@dMDJ-G7I`<&Ta(Ty>#v^byC>uW$REm#As? ze + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile new file mode 100755 index 00000000..3cae3177 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile @@ -0,0 +1,31 @@ +# +# DOC driver Makefile for Linux 2.6. +# Copyright (C) 2006, msystems Ltd. All rights reserved. +# +# Use this Makefile if you want to build DOC driver as loadable +# kernel module. +# + +obj-m += tffs.o + +tffs-objs := trace32.o +tffs-objs += defs.o +tffs-objs += docdrv.o +tffs-objs += doch_api.o +tffs-objs += doch_ata.o +tffs-objs += dochstub.o +tffs-objs += dochtl.o +tffs-objs += docsys.o +tffs-objs += extfiltr.o +tffs-objs += fatfilt.o +tffs-objs += flbase.o +tffs-objs += flcustom.o +tffs-objs += flioctl.o +tffs-objs += flsystem.o +tffs-objs += hal_nor.o +tffs-objs += tffs2lnx.o +tffs-objs += tffs_api.o +tffs-objs += tffsarch.o +tffs-objs += tffs-pm26.o +tffs-objs += tffsdrv26.o + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-m b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-m new file mode 100755 index 00000000..3cae3177 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-m @@ -0,0 +1,31 @@ +# +# DOC driver Makefile for Linux 2.6. +# Copyright (C) 2006, msystems Ltd. All rights reserved. +# +# Use this Makefile if you want to build DOC driver as loadable +# kernel module. +# + +obj-m += tffs.o + +tffs-objs := trace32.o +tffs-objs += defs.o +tffs-objs += docdrv.o +tffs-objs += doch_api.o +tffs-objs += doch_ata.o +tffs-objs += dochstub.o +tffs-objs += dochtl.o +tffs-objs += docsys.o +tffs-objs += extfiltr.o +tffs-objs += fatfilt.o +tffs-objs += flbase.o +tffs-objs += flcustom.o +tffs-objs += flioctl.o +tffs-objs += flsystem.o +tffs-objs += hal_nor.o +tffs-objs += tffs2lnx.o +tffs-objs += tffs_api.o +tffs-objs += tffsarch.o +tffs-objs += tffs-pm26.o +tffs-objs += tffsdrv26.o + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-omap2420 b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-omap2420 new file mode 100755 index 00000000..f42dfefb --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-omap2420 @@ -0,0 +1,137 @@ +############################################################################### +# +# DOC driver Makefile for Linux 2.6. +# Copyright (C) 2006, msystems Ltd. All rights reserved. +# +# Use this Makefile if you want to build DOC driver outside of Linux +# kernel's source code tree. You will need to change the following +# macros in this Makefile as appropriate for your project: +# KERNEL_DIR +# CC +# CFLAGS +# LD +# LDFLAGS +# +############################################################################### + +# +# Specify name of this kernel module +# +MODULE_NAME = tffs + +# +# Specify root directory of kernel's source tree as appropriate +# for your installation. +# +KERNEL_DIR = /opt/ti/omap2420/kernel/269 + +# +# Specify which compiler to use (default is ARM/GCC compiler) +# +CC = arm-unknown-linux-gnu-gcc + +# +# Specify compiler flags in the same fashion as 'make modules' does. +# Flags below are appropriate for ARM compilation. +# +CFLAGS += -nostdinc +CFLAGS += -iwithprefix include +CFLAGS += -D__KERNEL__ +CFLAGS += -I$(KERNEL_DIR)/include +CFLAGS += -Wall +CFLAGS += -Wstrict-prototypes +CFLAGS += -Wno-trigraphs +CFLAGS += -fno-strict-aliasing +CFLAGS += -fno-common + +# Uncomment line below if you want compiler to optimize for speed +# CFLAGS += -O2 +# Uncomment line below if you want compiler to optimize for space +# CFLAGS += -Os +# Uncomment line below if you are going to debug DOC driver +# CFLAGS += -g + +CFLAGS += -Wdeclaration-after-statement +CFLAGS += -fno-omit-frame-pointer +CFLAGS += -mapcs +CFLAGS += -mno-sched-prolog +CFLAGS += -mlittle-endian +CFLAGS += -mapcs-32 +CFLAGS += -D__LINUX_ARM_ARCH__=6 +CFLAGS += -march=armv5t +CFLAGS += -Wa,-march=armv6 +CFLAGS += -mtune=strongarm +CFLAGS += -malignment-traps +CFLAGS += -msoft-float +CFLAGS += -Uarm +CFLAGS += -DMODULE +CFLAGS += -DKBUILD_BASENAME=$(MODULE_NAME) +CFLAGS += -DKBUILD_MODNAME=$(MODULE_NAME) +# CFLAGS += -DTRACE32 +CFLAGS += -c + +# +# Uncomment line below only if you are using multiple cascaded +# mDOC devices +# +# CFLAGS += -DATA_MAX_NUM_OF_DEVICES=2 +# + +# +# Specify which linker to use (default is ARM linker) +# +LD = arm-unknown-linux-gnu-ld + +# +# Specify linker flags in the same fashion as 'make modules' does. +# Flags below are appropriate for ARM compilation. +# +LDFLAGS = -EL +LDFLAGS += -r + +# +# Module's objects: +# - trace32.o (if used) must be first in the link order ! +# - $(MODULE_NAME).mod.o must be last in the link order ! +# +OBJS = trace32.o +OBJS += defs.o +OBJS += docdrv.o +OBJS += doch_api.o +OBJS += doch_ata.o +OBJS += dochstub.o +OBJS += dochtl.o +OBJS += docsys.o +OBJS += extfiltr.o +OBJS += fatfilt.o +OBJS += flbase.o +OBJS += flcustom.o +OBJS += flioctl.o +OBJS += flsystem.o +OBJS += hal_nor.o +OBJS += tffs2lnx.o +OBJS += tffs_api.o +OBJS += tffsarch.o +OBJS += tffs-pm26.o +OBJS += tffsdrv26.o +OBJS += $(MODULE_NAME).mod.o + +# +# rule for building loadable kernel module +# +$(MODULE_NAME).ko : $(OBJS) + $(LD) $(LDFLAGS) -o $@ $(OBJS) + +# +# C compilation rules +# +%.o: %.c + $(CC) $(CFLAGS) -o $@ $< + +# +# 'make clean' rule +# +clean : + rm *.o *.ko + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-pxa27x b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-pxa27x new file mode 100755 index 00000000..20d4981c --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-pxa27x @@ -0,0 +1,177 @@ +#============================================================== +# +# Makefile for building DiskOnChip driver loadable module +# for Linux 2.6.x kernels +# +# Version 1.0 +# +#============================================================== + + +# +# Specify name of this kernel module +# +MODULE_NAME = tffs + + +# +# Specify root directory of Linux kernel's source tree as appropriate +# for your installation. +# +KERNEL_DIR = /opt/mobilinux41/pxa27x/andrayk/kernel/2.6.10 + + +# +# Specify which compiler to use (default is XScale compiler) +# +CC = iwmmxt_le-gcc + + +# +# Specify compiler flags in the same fashion as 'make modules' does. +# Flags below are appropriate for XScale compilation. +# +CFLAGS += -nostdinc +CFLAGS += -iwithprefix include +CFLAGS += -D__KERNEL__ +CFLAGS += -I$(KERNEL_DIR)/include +CFLAGS += -Wall +CFLAGS += -Wstrict-prototypes +CFLAGS += -Wno-trigraphs +CFLAGS += -fno-strict-aliasing +CFLAGS += -fno-common +# CFLAGS += -Os +CFLAGS += -fno-omit-frame-pointer +CFLAGS += -g +CFLAGS += -marm +CFLAGS += -fno-omit-frame-pointer +CFLAGS += -mapcs +CFLAGS += -mno-sched-prolog +CFLAGS += -mlittle-endian +CFLAGS += -mabi=aapcs +CFLAGS += -mno-thumb-interwork +CFLAGS += -D__LINUX_ARM_ARCH__=5 +CFLAGS += -march=armv5te +CFLAGS += -mtune=xscale +CFLAGS += -Wa,-mcpu=xscale +CFLAGS += -msoft-float +CFLAGS += -Uarm +CFLAGS += -Wdeclaration-after-statement +CFLAGS += -DMODULE +CFLAGS += -DKBUILD_BASENAME=$(MODULE_NAME) +CFLAGS += -DKBUILD_MODNAME=$(MODULE_NAME) +# CFLAGS += -DTRACE32 +CFLAGS += -c + +# +# Uncomment line below only if you are using multiple cascaded +# mDOC devices +# +# CFLAGS += -DATA_MAX_NUM_OF_DEVICES=2 +# + +# +# Specify which linker to use (default is XScale linker) +# +LD = iwmmxt_le-ld + + +# +# Specify linker flags in the same fashion as 'make modules' does. +# Flags below are appropriate for XScale compilation. +# +LDFLAGS = -EL +LDFLAGS += -r + + +# +# Module's headers +# +H_FILES = flcustom.h +H_FILES += flsystem.h +H_FILES += extfiltr.h +H_FILES += tffs2lnx.h +H_FILES += tffsarch.h +H_FILES += tffsdrv.h +H_FILES += _tffsioct.h +H_FILES += tffsioct.h +H_FILES += bddefs.h +H_FILES += blockdev.h +H_FILES += _common.h +H_FILES += defs.h +H_FILES += docbdk.h +H_FILES += _docsys.h +H_FILES += docsys.h +H_FILES += dosformt.h +H_FILES += fatfilt.h +H_FILES += flbase.h +H_FILES += flbuffer.h +H_FILES += flchkdef.h +H_FILES += flcommon.h +H_FILES += flioctl.h +H_FILES += flstdcmp.h +H_FILES += flstruct.h +H_FILES += flsysfun.h +H_FILES += flsystyp.h +H_FILES += _fltl.h +H_FILES += fltl.h +H_FILES += part_inf.h +H_FILES += bdkemul.h +H_FILES += _dochapi.h +H_FILES += doch_api.h +H_FILES += doch_ata.h +H_FILES += doch_func.h +H_FILES += doch_sys.h +H_FILES += dochstub.h +H_FILES += dochtl.h +H_FILES += hal_nor.h +H_FILES += hib.h +H_FILES += tffs_api.h + +# +# Module's objects: +# - trace32.o (if used) must be first in the link order ! +# - $(MODULE_NAME).mod.o must be last in the link order ! +# +OBJS = trace32.o +OBJS += defs.o +OBJS += docdrv.o +OBJS += doch_api.o +OBJS += doch_ata.o +OBJS += dochstub.o +OBJS += dochtl.o +OBJS += docsys.o +OBJS += extfiltr.o +OBJS += fatfilt.o +OBJS += flbase.o +OBJS += flcustom.o +OBJS += flioctl.o +OBJS += flsystem.o +OBJS += hal_nor.o +OBJS += tffs2lnx.o +OBJS += tffs_api.o +OBJS += tffsarch.o +OBJS += tffs-pm26.o +OBJS += tffsdrv26.o +OBJS += $(MODULE_NAME).mod.o + + +# +# rule for building loadable kernel module +# +$(MODULE_NAME).ko : $(OBJS) + $(LD) $(LDFLAGS) -o $@ $(OBJS) + +# +# C compilation rules +# +%.o: %.c + $(CC) $(CFLAGS) -o $@ $< + +# +# 'make clean' rule +# +clean : + rm *.o *.ko + +################ Thank you for using M-Systems' products. #################### diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-y b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-y new file mode 100755 index 00000000..9e7c5dce --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/Makefile-y @@ -0,0 +1,31 @@ +# +# DOC driver Makefile for Linux 2.6. +# Copyright (C) 2006, msystems Ltd. All rights reserved. +# +# Use this Makefile if you want to link DOC driver statically +# with the Linux kernel. +# + +obj-y += tffs.o + +tffs-objs := trace32.o +tffs-objs += defs.o +tffs-objs += docdrv.o +tffs-objs += doch_api.o +tffs-objs += doch_ata.o +tffs-objs += dochstub.o +tffs-objs += dochtl.o +tffs-objs += docsys.o +tffs-objs += extfiltr.o +tffs-objs += fatfilt.o +tffs-objs += flbase.o +tffs-objs += flcustom.o +tffs-objs += flioctl.o +tffs-objs += flsystem.o +tffs-objs += hal_nor.o +tffs-objs += tffs2lnx.o +tffs-objs += tffs_api.o +tffs-objs += tffsarch.o +tffs-objs += tffs-pm26.o +tffs-objs += tffsdrv26.o + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/README.TXT b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/README.TXT new file mode 100755 index 00000000..e2d0e290 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/README.TXT @@ -0,0 +1,1109 @@ + + ******************************************************************************* + * * + * DOC Driver for Linux 2.6 * + * Source Code Edition * + * * + * * + * INSTALLATION MANUAL * + * * + * * + * Version 1.0.85-beta, released on February 06 2008 * + * Based on DOC Driver Block Device SDK version 1.1.0 EQA9 * + * * + * Copyright SanDisk IL Ltd. (C) 2008 * + * Please note that effective January 1, 2007, the name msystems Ltd. was * + * changed to SanDisk IL Ltd. * + * * + * Email questions to: oemsupport@sandisk.com * + * * + ******************************************************************************* + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version. * + * This program is distributed in the hope that it will be useful, but WITHOUT * + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program, * + * except for the rights expressly granted in this License. * + * * + ******************************************************************************* + + + Contents + ======== + + 1. Introduction + 2. Supported types of mDOC devices + 3. Conventions used in this document + 4. DOC driver's general configuration options + 5. Board specific configuration options + 6. Configuring DOC driver to use Direct Memory Access (DMA) + 7. Configuring DOC driver to use mDOC READY interrupt + 8. Compiling DOC driver + 9. Installing DOC driver + 10. Using DOC driver + 11. Configuring DOC driver to reduce power consumption + 12. Improving DOC driver's I/O performance + 13. Reducing DOC driver's load on CPU + 14. Access to DOC driver's Extended Functions + 15. Formatting mDOC + 16. Updating firmware in mDOC devices + 17. Memory footprint + 18. Known limitations + 19. Disclaimer of Liability + 20. Contact information + + + 1. Introduction + =============== + + 1.1. This document explains how to install DOC driver, and use mDOC device + with Linux operating system. The information in this document applies + to 2.6.x versions of the Linux kernel. + + 1.2. The mDOC devices are high performance, low cost data storage products + based on the latest flash technology. The mDOC devices serve two + purposes under Linux: + + (1) Main data storage device + + In this role, mDOC devices serve the same purpose that + conventional hard disks serve in Linux servers or workstations - + they store various Linux kernel componenets (such as device + drivers, Linux libraries and configuration files), user + applications etc. + + (2) System's boot device + + All mDOC devices feature ROM area which can be programmed via + IOCTL calls to DOC driver. Boards developers usually arrange + for this ROM area to appear at CPU's reset vector, and software + developers program board-specific bootstrap code into it. When + CPU is reset, it executes this bootstrap code, and boots Linux + system entirely from mDOC device. Dedicated boot devices such as + separate ROM or NOR flash chips are no longer needed. + + This document describes only the data storage function of mDOC devices. + + 1.3. Although mDOC devices use multi-level cell NAND flash technology + internally, DOC driver completely hides this fact from the user, and + implements traditional block device interface. This allow mDOC devices + to works with all standard disk-oriented Linux file systems (such as + EXT2, EXT3 etc.). In that respect DOC driver is similar to ATA hard + disks and CompactFlash cards, and is different from other NAND or NOR + flash devices (which must be managed by flash-specific file systems such + as JFFS2). All standard disk oriented Linux utilities (such as 'fdisk', + 'du' etc.) work with mDOC devices. + + 1.4. DOC driver is distributed in the source code form, and is expected to + be compiled at customer's site. Instructions on how to configure and + compile DOC driver are provided in later chapters in this document. + + + + 2. Supported types of mDOC devices + ================================== + + 2.1. This version of DOC driver supports the following types of mDOC + devices: + + - mDOC H3 family + + ===> NOTE. This version of DOC driver will NOT work with the + following types of mDOC devices: + + G3/P3 family + G4 family + H1 family + + You will need to use TrueFFS driver version 7.1.0 (or higher) + with these types of mDOC devices. + + + + 3. Conventions used in this document + ==================================== + + 3.1. Term "host" is used in this document to refer to computer where DOC + driver's source code is located, and where DOC driver is compiled and + linked. Typically "hosts" are engineering workstations running RedHat + or SUSE Linux, or Windows operating systems. + + Term "target" is used in this document to refer to computer where DOC + driver's executable runs, and where mDOC devices are installed. Typical + targets are mobile devices powered by ARM or XScale microprocessors, + specialized communication equipment powered by PowerPC microprocessors, + and various other embedded systems. + + ===> NOTE. Although usually host and target are different systems, in + some cases "host" and "target" could actually refer to the + same system. For example, it is possible to plug mDOC into + the PCI slot of PC workstation running Linux. If this + workstation contains kernel's source tree installed on it, + then it is possible to compile DOC driver, and run it on + this workstation. In this case PC workstation serves both + as host and target system. + + All instructions provided by this document refer to the case when + "host" and "target" are separate systems. + + 3.2. Installation instructions in this document assume that user is logged + into the system as "root". + + + + 4. DOC driver's general configuration options + ============================================= + + 4.1. Linux kernel requires that every device driver use unique major device + number. By default, DOC driver uses major device number '100'. If + you would like DOC driver to use different major device number, you + can do so by passing "tffs_major=" command line option when + starting the driver. For example, to tell DOC driver to use major + device number '120': + + insmod tffs.ko tffs_major=120 + + ==> NOTE. File Documentation/devices.txt in Linux kernel's directory + list all major device numbers that had been reserved for the + various types of block devices. When specifying major device + number for DOC driver, it is essential to pick the number that + isn't listed in that file as already reserved for some other + block device. Consider using block device numbers that are + allocated for "local/experimental use" (for example, major + block device numbers in 120..127 range). + + + + 5. Board specific configuration options + ======================================= + + 5.1. As shipped, the DOC driver should work with the following boards: + + - Texas Instruments OMAP 2420 ("H4") + - Intel PXA27x Development Platform ("Mainstone") + + If you are using one of these boards, you can skip remaining Sections + in Chapter 5. For all other boards, you will need to configure DOC + driver as appropriate for your system. Instructions below explain how + to do this. + + 5.2. User must tell DOC driver where to look for mDOC. This can be + accomplished by using "tffs_addr=" command line + option, where specifies physical address of the mDOC. + For example, if in your particular board mDOC resides at physical + address 0xc0000000, you would start DOC driver as follows: + + insmod tffs.ko tffs_addr=0x00000000 + + Alternatively, you can set macro TFFS_PHYS_ADDR in DOC driver's header + tffsarch.h to the physical address of the mDOC, and recompile the + driver. For example, if mDOC device resides at physical address + 0xc0000000, macro TFFS_PHYS_ADDR should be #defined as follows: + + #define TFFS_PHYS_ADDR 0xc0000000 + + In this case you DOC driver by default would look for mDOC at the + specified address, so you can omit "tffs_addr=" + command line parameter, and start DOC driver simply as: + + insmod tffs.ko + + 5.3. When DOC driver starts up, it calls routine tffsarch_init() to do any + board-specific hardware initialization (such as configuring Chip Select + that mDOC is connected to, allocating and configuring DMA channels and + interrupt request lines to be used by DOC driver etc.). The DOC + driver's file tffsarch.c contains example implementations of this + routine for a number of reference boards. + + Users are required to implement this routine as appropriate for their + particular boards. + + 5.4. When DOC driver shuts down, it calls routine TffsHWRelease() to do any + board-specific hardware cleanup (such as releasing previously allocated + DMA channels and interrupt request lines etc.). The DOC driver's file + tffsarch.c contains example implementations of this routine for number + of reference boards. + + Users are required to implement this routine as appropriate for their + particular boards. + + + + 6. Configuring DOC driver to use Direct Memory Access (DMA) + =========================================================== + + 6.1. By default, DOC driver uses software loops to transfer blocks of data + to and from mDOC. In many cases it is possible to substantially improve + mDOC's 'read' performance by using DMA controler to do these data + transfers. + + Current version of DOC driver includes example implementations of DMA + support for the following reference boards: + + - Texas Instruments OMAP2420 ("H4") + - Intel PXA27x ("Mainstone") + + These example implementations are found in DOC driver's files + tffsarch.h and tffsarch.c, and consists of the following items: + + macro flReadEvenNumberOfBytes defined in tffsarch.h + macro flWriteEvenNumberOfBytes defined in tffsarch.h + + routine tffs_dma_init() defined in tffsarch.c + routine tffs_dma_release() defined in tffsarch.c + routine __dmasw_bread() defined in tffsarch.c + routine __dmasw_bwrite() defined in tffsarch.c + + You can use these example implementation as the starting point for DMA + implementation for your own system. + + ===> NOTE. Most likely you will be able to use the definitions of all + macros in file tffsarch.h "as is". You do have to implement + routines in file tffsarch.c as appropriate for your own + system. + + 6.2. To instruct DOC driver to use DMA during 'read' and/or 'write + operations, use 'tffs_dma_mode=' command line option. Possible + values are described below: + + tffs_dma_mode Description + + 1 DMA is used during 'read' operations. + Data is transferred in two steps: first, it is + read (using DMA) from mDOC device into driver's + internal non-cachable DMA buffer; secondly, data + is copied (using memcpy()) from the internal DMA + buffer to destination buffer. + + 2 DMA is used during 'write' operations. + Data is transferred in two steps: first, it is + copied (using memcpy()) from source buffer into + driver's internal non-cacheable DMA buffer; + secondly, data is written (using DMA) from DMA + buffer to mDOC device. + + 3 This is the combination of modes '1' and '2'. + + 5 DMA is used during 'read' operations. + Data is transferred (using DMA) directly from mDOC + device to the destination buffer, without using + intermediate non-cachable DMA buffer. + + 6 DMA is used during 'write' operations. + Data is transferred (using DMA) directly from + the source buffer to mDOC device, without using + intermediate non-cachable DMA buffer. + + 7 This is the combination of modes '5' and '6'. + + ===> NOTE. Systems with fast CPU-to-external-RAM interfaces would benefit + most from the DMA modes 1..3. Systems with slow + CPU-to-external-RAM interfaces (such as PXA27x Mainstone) + would benefit most from the DMA modes 5..7. We advice that you + try various DMA modes with your particular system, and pick + the one with the best I/O performance. + + For example, to instruct DOC driver to use DMA mode '1' during + 'read' operations only, and don't use it during 'write' operations, you + would start the driver as follows: + + insmod tffs.ko tffs_dma_mode=1 + + + + 7. Configuring DOC driver to use mDOC READY interrupt + ===================================================== + + 7.1. The 'write' operations in modern flash devices (such as mDOC) might + take hundreeds of microseconds. Often it is possible to improve overall + system's responsiveness and throughput by configuring DOC driver to + yield CPU during these periods of time. + + ===> NOTE. This option could negatively impact mDOC's "write" + performance, especially when workload on the system + increases. + + 7.2. By default, DOC driver enables mDOC READY interrupt for Intel PXA27x + board ("Mainstone"), and disables it for all other boards. + + To override this default, use 'tffs_irq=' command line option. + The argument specifies board's interrupt request line that mDOC's + IREQ signal is connected to. + + Current version of DOC driver support mDOC interrupts for the following + reference boards: + + +------------------------------------+--------------------+ + | Board | Interrupt | + +------------------------------------+--------------------+ + | Texas Instruments OMAP2420 ("H4") | 190 | + +------------------------------------+--------------------+ + | Intel PXA27x ("Mainstone") | 167 | + +------------------------------------+--------------------+ + + For example, in case of Texas Instruments's OMAP2420 board ("H4"), + mDOC's IRQ signal is connected to board's GPIO_94 line (which generates + interrupt 190), so you would start DOC driver as follows: + + insmod tffs.ko tffs_irq=190 + + To disable mDOC's READY interrupt, specify as '-1'. For example: + + insmod tffs.ko tffs_irq=-1 + + + + 8. Compiling DOC driver + ======================= + + 8.1. This Chapter contains instructions for compiling DOC driver. + + The DOC driver can be placed into the Linux kernel's source code tree, + and compiled as part of the Linux kernel compilation. Section 8.2 + provides instructions of how to do that. + + The DOC driver can also be placed in the separate directory outside of + Linux kernel's source code tree, and compiled separately from the Linux + kernel. Section 8.3 explains how to do that. + + Instructions below refer to the top directory of Linux kernel's source + code tree (where .config kernel configuration file resides) as . + + 8.2. Sections 8.2.1 - 8.2.5 describe how to add DOC driver to Linux kernel's + source code tree, and build it as part of Linux kernel compilation. + + 8.2.1. Create new directory /drivers/tffs, copy DOC driver's archive + to this directory, and unpack it there. + + 8.2.2. If you are using multiple cascaded mDOC devices, edit + /drivers/tffs/flcustom.h file, and uncomment the following + line there: + + #define ATA_MAX_NUM_OF_DEVICES 2 /* only when using casacded devices */ + + 8.2.3. Edit /drivers/Makefile, and add the following statement at the + end of this file: + + obj-y += tffs/ + + This will cause 'make' utility to descend into /drivers/tffs + directory during Linux kernel compilation, build DOC driver, and + statically link it into Linux kernel. + + If you don't want to statically link DOC driver into Linux kernel, + and instead prefer to build it as dynamically loadable kernel module, + you should change this statement as shown below: + + obj-m += tffs/ + + This will cause 'make' utility to descend into /drivers/tffs + directory when building Linux kernel modules, and compile DOC driver + as dynamically loadble Linux kernel. + + 8.2.4. Create /drivers/tffs/Makefile with the following contents: + + obj-y += tffs.o + + tffs-objs := trace32.o + tffs-objs += defs.o + tffs-objs += docdrv.o + tffs-objs += doch_api.o + tffs-objs += doch_ata.o + tffs-objs += dochstub.o + tffs-objs += dochtl.o + tffs-objs += docsys.o + tffs-objs += extfiltr.o + tffs-objs += fatfilt.o + tffs-objs += flbase.o + tffs-objs += flcustom.o + tffs-objs += flioctl.o + tffs-objs += flsystem.o + tffs-objs += hal_nor.o + tffs-objs += tffs2lnx.o + tffs-objs += tffs_api.o + tffs-objs += tffsarch.o + tffs-objs += tffs-pm26.o + tffs-objs += tffsdrv26.o + + This Makefile instructs 'make' utility to build DOC driver, and + statically link it into Linux kernel. + + If you don't want to statically link DOC driver into Linux kernel, + and instead prefer to build it as dynamically loadable kernel module, + you should change the first line of this Makefile as shown below: + + obj-m += tffs.o + + 8.2.5. If you now build Linux kernel (if you have choosen to statically link + DOC driver into Linux kernel) or kernel modules (if you have choosen + to build DOC driver as loadable kernel module), you should see DOC + driver being built as part of this process. + + You are done; skip the rest of Chapter 8. + + 8.3. Sections 8.3.1 - 8.3.5 describe how to build DOC driver in the separate + directory outside of Linux kernel's source code tree, separately from + the Linux kernel. In this case DOC driver will be built as loadable + kernel module tffs.ko. + + 8.3.1. Place DOC driver's archive into the private directory outside of + kernel's source tree, and unpack it there. + + 8.3.2. If you are using multiple cascaded mDOC devices, edit + /drivers/tffs/flcustom.h file, and uncomment the following + line there: + + #define ATA_MAX_NUM_OF_DEVICES 2 /* only when using casacded devices */ + + 8.3.3. DOC driver directory includes example Makefiles for the following + reference boards: + + +------------------------------------+--------------------+ + | Board | Makefile- | + +------------------------------------+--------------------+ + | Texas Instruments OMAP2420 ("H4") | Makefile-omap2420 | + +------------------------------------+--------------------+ + | Intel PXA27x ("Mainstone") | Makefile-pxa27x | + +------------------------------------+--------------------+ + + If you are using one of these boards, then copy the respective file + Makefile- to Makefile. For example, if you are using Texas + Instruments' OMAP2420 board: + + cp Makefile-omap2420 Makefile + + If you are using board other then listed above, you will need to write + your own Makefile. The simplest way to do this is to take any of the + provided reference Makefile-, and change the following macros + as appropriate to your development setup: + + KERNEL_DIR + CC + CFLAGS + LD + LDFLAGS + + The KERNEL_DIR macro should be set to point to top directory of your + kernel's source code tree. + + Macros CC and CFLAGS specify which compiler to use to build DOC driver, + and which compiler flags to use for that. Similarly, macros LD and + LDFLAGS specify which linker to use to link DOC driver's binary, and + which linker flags to use for that. + + ===> NOTE. The easy way to figure out appropriate settings for CC, + CFLAGS, LD and LDFLAGS macros is to execute: + + make V=1 modules + + in the kernel's top directory, and observe the values that + this this command is using to compile and link all Linux + loadable kernel modules. + + The 'V=1' command line option instructs 'make' utility to + issue verbose output (which includes compiler's command line + parameters) rather then terse messages that it produces by + default. + + 8.3.4. Make sure that compiler (as specified by macro CC in Section 8.3.3) + is in the PATH, and build DOC driver by executing: + + make + + in DOC driver's directory. This command should generate tffs.ko + loadable kernel module. + + 8.3.5. You will need to create directory + + lib/modules//kernel/drivers/tffs + + on your target system's root file system, and copy loadable kernel + module tffs.ko to that directory. + + + + 9. Installing DOC driver + ======================== + + 9.1. Add the following line to /lib/modules//modules.dep + file on target's root file system: + + /lib/modules//kernel/drivers/tffs/tffs.ko: + + 9.2. Create mDOC entries for mDOC devices under /dev directory. + + Since current version of DOC driver supports up to 12 "disks" on mDOC + device, with up to 15 file system partition on each of such "disks", + you will need to create up to 192 mDOC entries under /dev (one "raw + disk" entry is required for each of 16 "disk"). You can use script + make_tffs_nodes.sh to create all these /dev entries, or you can do + that manually using Linux 'mknod' utility. For example: + + # mknod /dev/tffsa b 100 0 + # mknod /dev/tffsa1 b 100 1 + # mknod /dev/tffsa2 b 100 2 + # mknod /dev/tffsa3 b 100 3 + # mknod /dev/tffsa4 b 100 4 + + ===> NOTE. If you have configured DOC driver to use different major + device number (see Section 4.1), you will need to replace + '100' in the commands above accordingly. + + These /dev entries refer to: + + /dev/tffsa is the "raw disk" entry for the first mDOC "disk" + /dev/tffsa1 refers to 1-st file system partitions on this disk + /dev/tffsa2 refers to 2-nd file system partitions on this disk + /dev/tffsa3 refers to 3-rd file system partitions on this disk + /dev/tffsa4 refers to 4-th file system partitions on this disk + + ===> NOTE. While there is rarely a need to have more then four file + system partitions on mDOC, DOC driver actually supports + up to 15 of such partitions. If you opted to have more then + four file system partitions, simply add more 'mknod' commands + to the script above to create device entries for additional + partitions. + + ===> NOTE. Current version of mDOC driver doesn't take advantage of + devFs ability to allocate major driver numbers and create + device entries under /dev dynamically. + + + + 10. Using DOC driver + ==================== + + 10.1. The DOC driver can be loaded in the same way that other kernel modules + are loaded: + + insmod tffs.ko [params] + + The following command line parameters are currently supported by DOC + driver: + + tffs_major major device number to use (default is '100') + tffs_addr physical address of mDOC + tffs_sg_read "gather" data during read operations + tffs_sg_write "scatter" data during write operations + tffs_irq IRQ (interrupt request line) to use; '-1' for none + tffs_dma_mode DMA mode (default is don't use DMA) + tffs_pio polled I/O mode + prio controls priority of driver's I/O processing thread + hardsect size of the hardware sector in bytes + rahead read-ahead parameter + fl_debug controls verbosity level of driver's debug messages + tffs_dpd_timeout delay before mDOC automatically enters powerdown mode + + 10.2. To create disk partition table on mDOC: + + fdisk /dev/tffsa + + When 'fdisk' utility presents you with command prompt, you can choose + 'p' to print existing disk partition table, 'd' to delete existing disk + partitions (if exists), or 'n' to create new disk partitions. + + 10.3. If you created new disk partitions in Section 10.2, you will need to + initialize file systems on these disk partition(s). For example, + to initialize EXT2 file system on the first partition (/dev/tffsa1), + use: + + mke2fs /dev/tffsa1 + + When initializing file system on mDOC disk partition, 'mke2fs' utility + calculated file system's block size based on the size of this disk + partition. Currently EXT2 and EXT3 file systems supports file system + blocks of 1024, 2048 and 4096 bytes. Smaller file system blocks (1024 + bytes) allow more efficient use of disk space, at the expense of DOC + driver's 'write' performance. Larger file system blocks (4096 bytes) + noticably increase 'write' performance, at the expense of some disk + space. You can pass '-b ' parameter to 'mke2fs' utility to + explicitely specify size of file system blocks. + + For example, if you want to maximize 'write' performance of DOC driver, + you can do so by telling 'mke2fs' to use largest possible (4096 bytes) + file system blocks: + + mke2fs -b 4096 /dev/tffsa1 + + 10.4. Create mount point for mDOC partition(s), and mount them: + + mkdir -p /mnt/tffsa1 + mount /dev/tffsa1 /mnt/tffsa1 + + 10.5. You can now create files and directories on mDOC. For example: + + echo have a nice day > /mnt/tffsa1/greetings.txt + + To see if the above command worked as expected, execute: + + cat /mnt/tffsa1/greetings.txt + + 10.6. Before shutting the system down, unmount all previously mounted mDOC + partition(s): + + umount /dev/tffsa1 + + + + 11. Configuring DOC driver to reduce power consumption + ====================================================== + + 11.1. This Chapter is only relevant to devices where power conservation is of + major concern. Various battery powered systems (such as mobile phones + and PDAs) fall into this category. + + 11.2. The mDOC device automatically switches from the normal power state into + the low-power state after certain amount of time passes from the + completion of the last read/write access to mDOC device. By default, + this power-down timeout is set to 100 milliseconds; it can be changed + via driver's command line option "tffs_dpd_timeout=". The argument + specifies duration of power-down timeout in milliseconds, for + example: + + insmod tffs.ko tffs_dpd_timeout=1000 + + would cause mDOC device to automatically power itself down one second + (1000 milliseconds) after the last read/write access. + + ===> NOTE. Currently mDOC firmware rounds down power-down timeout to + nearest 100 millisecons multiple, i.e. "tffs_dpd_timeout=345' + has the same effect as "tffs_dpd_timeout=300". + + 11.3. DOC driver supports standard Linux 2.6 power management scheme (option + CONFIG_PM in kernel's .config configuration file). The relevant power + suspend/resume code resides in file tffs-pm26.c, and is + self-explanatory. + + + + 12. Improving DOC driver's I/O performance + ========================================== + + 12.1. This Chapter provides overview of the various means of improving + 'read' and 'write' performance of DOC driver. + + 12.2. The duration of the access cycles to mDOC's registers is one of the + major factors affecting both 'read' and 'write' performance of + DOC driver. The duration of these access cycles is usually + determined by the settings of board's Chip Select that mDOC device + is connected to. If duration of these access cycles substantially + exceeds timings specified in documentation for your mDOC device, + 'write' and especially 'read' performance of DOC driver will be + sub-optimal. + + 12.3. It is possible to improve I/O performance of DOC driver by enabling + compiler optimizations when compiling DOC driver. + + If you have choosen to place DOC driver into Linux kernel's source code + tree (see Section 8.2), you can instruct compiler to optimize generated + code by adding the following line to DOC driver's Makefile: + + EXTRA_CFLAGS := -O2 + + If you have choosen to build DOC driver outside of the Linux kernel's + source code tree (see Section 8.3), you can instruct compiler to + optimize generated code by adding the following line to DOC driver's + Makefile: + + CFLAGS += -O2 + + 12.4. For portability reasons, Linux drivers use dedicated macros and routines + to access registers of peripheral devices. By default DOC driver + adheres to this policy. However, in many cases it is possible to + substantially increase performance of DOC driver by instructing it + to use general purpose memory routines (such as memcpy()) to transfer + blocks of data to and from mDOC device. To do so, use driver's + "tffs_memcpy=1" command line option: + + insmod tffs.ko tffs_memcpy=1 + + ===> NOTE. The "tffs_memcpy=1" command line option might not work + with some boards. + + 12.5. If you are using any of the following reference boards: + + - Texas Instruments's OMAP2420 ("H4") + - Intel PXA27x ("Mainstone") + + you can substantially improve DOC driver's 'read' performance by + telling it to use DMA to transfer data between mDOC and main memory. + See Chapter 6 for more details on "tffs_dma_mode=" command + line option. + + If you are using different board, consider adding support for your + specific DMA implementation to DOC driver. + + 12.6. By default, DOC driver attempts to internally combine few 'write' + requests into single 'write' operation on mDOC device (this process is + usually referred to as "gathering" of I/O requests). Similarly, DOC + driver attempts to internally combine few 'read' requests into single + 'read' operation on mDOC device (this process is usually referred to as + "scattering" of I/O requests). + + While this behavior improves DOC driver's performance for many + systems, it might actually reduce it in case of systems with slow + access to DRAM (such as Intel PXA27x "Mainstone"). For this kind of + systems, it is possible to improve DOC driver's performance by + instructing driver not to perform any scattering/gathering of I/O + requests. + + To tell DOC driver not to combine (gather) 'write' requests, use + command line option "tffs_sg_write=0": + + insmod tffs.ko tffs_sg_write=0 + + To tell DOC driver not to combine (scatter) 'read' requests, use + command line option "tffs_sg_read=0": + + insmod tffs.ko tffs_sg_read=0 + + Use both of these command line options to tell DOC driver not to do + any scattering/gathering of I/O requests: + + insmod tffs.ko tffs_sg_write=0 tffs_sg_read=0 + + 12.7. By default, DOC driver uses polled I/O mode, and transfers single + sector (512 bytes) at a time. It is possible to improve driver's + I/O performance by instructing it to transfer multiple sectors a time. + This could be done by using "tffs_pio=" command line option, where + is either 2 (for two-sector transfers) or 4 (for four-sector + transfers). For example: + + insmod tffs.ko tffs_pio=4 + + 12.8. It is possible to substantially improve DOC driver's 'write' performance + by increasing file system's block size. In case of EXT2 file systems, + file system's block size is determined by 'mke2fs' utility when it + initializes file system on the disk partitions (see Section 10.3), and + is set to 1024, 2048 or 4096 bytes depending on the size of this disk + partition. Passing '-b 4096' command line option to 'mke2fs' utility + forces it to use 4096-byte blocks (the largest possible file system + block size) regardless of the actual size of the disk partition, + therefore improving DOC driver's 'write' performance. + + + 13. Reducing DOC driver's load on CPU + ===================================== + + 13.1. During 'write' operations DOC driver normally polls mDOC device in + order to detect completion of the operation. While this approach allows + DOC driver to maximize mDOC's 'write' performance, it also ties up CPU + for extensive periods of time, reducing amount of CPU time available to + all other processes in the Linux system. + + The alternative approach for DOC driver would be to yield CPU right + after starting 'write' operation on mDOC device, and sleep until + completion of this operation. While this approach is optimal in terms + of minimizing DOC driver's load on CPU, it is only possible if + DOC driver supports mDOC interrupt generation on your particular + system. + + See Chapter 7 for more details regarding mDOC interrupts. + + 13.2. If mDOC interrupt isn't supported for your particular board, it is still + possible to reduce DOC driver's load on CPU by using the command line + option "tffs_skip_sleeps=", where values depend on the type of + mDOC device. You should specify values equal to or greater then + 100. Greater values will improve DOC driver's 'write' + performance, but will also increase it's load on CPU. The optimal + value depends on the desired tradeoff between 'write' performance and + load on CPU. You can start by trying set to 5000: + + insmod tffs.ko tffs_skip_sleeps=5000 + + and measure DOC driver's 'write' performance, and it's load on CPU. + If DOC driver's load on CPU will be acceptable but it's 'write' + performance is too low, try increasing value. If DOC driver's + load on CPU will be too high, try decreasing value until you + reduced the load on CPU to the desired level. + + + + 14. Access to DOC driver's Extended Functions + ============================================= + + 14.1. In addition to standard block device functionality, DOC driver provides + access to DOC driver's Extended Functions, which is not a part of the + standard file system API. See included manual "DOC Driver Extended + Functions Developer Guide" for detailed explanation of all DOC driver's + Extended Functions. + + ===> NOTE. For security reasons, FL_IOCTL_DELETE_SECTORS Extended + function was disabled in the current version of DOC + driver. + + The following section describes only the functionality that is not + supported by DOC drivers for other operating systems. + + Your application code which utilizes DOC driver's IOCTLs, should contain + the following: + + #include "tffsioct.h" + + Your application's Makefile should add DOC driver's headers to + compiler's include path. For example, if you added DOC driver to + kernel's source tree (see Section 8.2): + + -I/drivers/tffs + + The 'ioctl_example' sub-directory in DOC driver archive contains + example application code which shows how to access Extended Functions + via IOCTL calls to DOC driver. + + 14.2. IOCTL limitations + + 14.2.1. All pointers in IOCTL structures should be valid values or null, even + if not used in IOCTL. + + 14.2.2. For FL_IOCTL_FLASH_FORMAT call, 'volumeLabel, 'embeddedSIC' and + 'progressCallback' fields of formatParams must be NULL. The DOC + driver must be restarted right after calling this IOCTL. + + 14.2.3. The FL_IOCTL_SET_ACCESS_ROUTINE and FL_IOCTL_GET_ACCESS_ROUTINE are + not supported. + + + + 15. Formatting mDOC + =================== + + 15.1. The easiest way to format mDOC is to start DOC driver with + "tffs_format=" command line parameter. The argument + specifies which mDOC to format; it is usually specified as zero: + + insmod tffs.ko tffs_format=0 + + In this case DOC driver will re-format mDOC using standard formatting + parameters. + + 15.2. If you are interested in formatting mDOC using custom formatting + parameters, you can accomplish this using FL_IOCTL_FLASH_FORMAT mDOC + Extended Function. See Chapter 14 for more information on mDOC + Extended Functions. + + 15.3. Although not mandatory, it's a good idea to reset mDOC (for example + by rebotting the system) right after formatting it. + + + + 16. Updating firmware in mDOC devices + ===================================== + + 16.1. DOC driver comes with the utility program 'doch-firmware' which can be + used to upgrade firmware in mDOC devices. The source code and Makefile + for this utility program reside in subdirectory 'doch-firmware' in DOC + driver's archive. + + 16.1.1. By default, doch-firmware/Makefile assumes XScale compiler + 'iwmmxt_le-gcc'. If you are using different compiler, change + definition of macro 'CC' in this Makefile accordingly. + + 16.1.2. You will need to change definition of macro 'INCLUDE_DIR' in + doch-firmware/Makefile to point to the directory where all your + applications #include .h files from. + + ===> NOTE. The applications' 'INCLUDE_DIR' is different from + the your kernel's /include directory that is used + in kernel builds. For example, header + exists in the former but not in the latter directories. + + 16.1.3. Change to 'doch-firmware' subdirectory, and build 'doch-firmware' + utility program: + + cd doch-firmware + make + + 16.1.4. Copy doch-firmware/doch-firmware utility program to the + appropriate location on the target's root file system, and + set permissions accordingly. For example: + + cp doch-firmware /sbin + chmod 750 /sbin/doch-firmware + + 16.2. Login to the target as superuser ("root"), and verify that DOC driver is + loaded and running. + + 16.3. Copy mDOC firmware file to the target. + + 16.4. To prevent corruption of the file systems that reside on mDOC, + unmount previously mounted mDOC partition(s) (see Chapter 10 + for more details on mouting mDOC partition(s)). + + 16.5. Execute: + + /sbin/doch-firmware /dev/tffsa + + where is mDOC firmware file (see Section 16.3). + + 16.6. Reset target system to put new mDOC firmware into effect. + + + + 17. Memory footprint + ==================== + + 17.1. This Section describes DOC driver's memory footprint (amount of RAM + that DOC driver's code and data take at runtime) for the reference + case of Intel's PXA27x ("Mainstone") board (ARM processer). DOC + driver's memory footprint varies significabtly between various + processor architectures and compiler optimizations. + + In case of Intel's PXA27x ("Mainstone") board, if compiled without + any optimizations, DOC driver takes about 240 KB of kernel memory + for it's code and data. + + In addition to the above, DOC driver may also do the following + dynamic memory allocations if respective runtime configuration + options are enabled: + + - The buffer for internal scatter/gather operations (see + Section 12.6). By default, size of this buffer is 64 KB. + + - If DMA is used (see Chapter 6), DOC driver allocates internal + 4 KB buffer for use with DMA operations. + + + + 18. Known limitations + ===================== + + - Current version of DOC driver limits number of "disks" per mDOC + "socket" to 12. + + - Current version of DOC driver doesn't support FL_IOCTL_GET_INFO + Extended Function on OTW BDTL partitions ("disks"). + + - Current version of DOC driver fails to re-format 16Gbit mDOC + H3 devices that have protected BDTL partitions ("disks") on them. + + - Current version of DOC driver will not recognize mDOC H3 devices if + they are configured to work in 128KB window mode. + + - When formatting with flCreateLogicalPartitions + - Minimal size for logical partition is twice flash unit size + - Usable user space is one flash unit size less than allocated (FAT + alignment overhead) + + Device Minimal Partition Size Overhead + + mDOC H3 128MB and MCP45 512 KB 256KB + mDOC H3 1GB 4 MB 2MB + mDOC H3 2GB 8 MB 4MB + + - More than one device of mDOC H3 in one system is not supported. + + - Using PortaDOC when DOC is configured for 128KB window, requires flSystem + adaptation. + + - IPL size in normal mode 128KB window should not exceed 8KB. + This limitation is not applicable to paged RAM mode and Virtual mode. + + - The field fastAreaLength in structure BDTLPartitionFormatParams3 must + always be set to zero (already set to zero in SDK default). + + - Burst mode not supported. + - Burst Mode with DMA is supported in the following mDoc H3 products: + + SDEDX-aaab-ccc (X 5 or 7, a,b,c arbitrary numbers) + + - In MCP45: DOCH_IM_IDLE and DOCH_IM_DPD disables AutoDPD. Selecting + DOCH_IM_IDLE_2_DPD (default) is required in order to have autoDPD enabled. + + - In MCP45: Inserting wrong key to a protected partition more than 16 + times will cause rejection of any further attempt until host reset. + + - When using 8KB memory window, only boot from lowest mDOC address + (mDOC base address, typically address zero) is supported. + Boot from top address (mDOC base address + 0x1ffe) is not supported, as mDOC + top address range (0x1800-0x1ffe) does not alias IPL in this mode. + + - flIdentifyProtection will return flHWProtection when the requested + partition is RW protected and the key is not inserted. + + - IPL in virtual ram mode in cascaded configuration is not supported. + + - Fast area is supported on the following products: + + SDEDX-aaab-ccc (X 5 or 7, a,b,c arbitrary numbers) + + - IPL in paged ram mode is not supported in the following devices: + + SDED5-aaab-ccc devices (a,b,c arbitrary numbers) + + + + 19. Disclaimer of Liability + =========================== + + SanDisk IL Ltd.'s general policy does not recommend the use of its products + in life support applications wherein a failure or malfunction of the + product may directly threaten life or injury. + Accordingly, in any use of products in life support systems or other + applications where failure could cause damage, injury or loss of life, + the products should only be incorporated in systems designed with + appropriate redundancy, fault tolerant or back-up features. + + SanDisk IL shall not be liable for any loss, injury or damage caused by + use of the Products in any of the following applications: + + Special applications such as military related equipment, nuclear reactor + control, and aerospace + + Control devices for automotive vehicles, train, ship and traffic + equipment + + Safety system for disaster prevention and crime prevention + + Medical-related equipment including medical measurement device. + + + + 20. Contact information + ======================= + + For comments, questions and bug reports, please contact your SanDisk + representative or e-mail us at oemsupport@sandisk.com. + + This document is for information use only and is subject to change + without prior notice. + + SanDisk IL Ltd. assumes no responsibility for any errors that may + appear in this document, nor for incidental or consequential damages + resulting from the furnishing, performance or use of this material. + + SanDisk IL's products are not warranted to operate without failure. + SanDisk IL's general policy does not recommend the use of its products + in life support applications where a failure or malfunction of the + product could cause injury or loss of life. Per SanDisk IL's Terms and + Conditions of Sale, the user of SanDisk IL's products in life support + applications assumes all risk of such use and indemnifies SanDisk IL + against all damages. See "Disclaimer of Liability". Accordingly, in + any use of the Product in life support systems or other applications + where failure could cause injury or loss of life, the Product should + only be incorporated in systems designed with appropriate and + sufficient redundancy or backup features. + + All parts of the SanDisk IL's documentation are protected by copyright + law and all rights reserved. + + Contact your local SanDisk sales office or distributor to obtain the + latest specifications before placing your order. + + (C) 1995-2007 SanDisk IL Ltd. All rights reserved. + + mDOC, DOC, TrueFFS, SureFS, SanDisk and SanDisk logo are registered + trademarks of SanDisk IL Ltd. and SanDisk Corporation, respectively. + Other product names or service marks mentioned herein may be trademarks + or registered trademarks of their respective owners and are hereby + acknowledged. diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/VERSIONS.TXT b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/VERSIONS.TXT new file mode 100755 index 00000000..c3b447a8 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/VERSIONS.TXT @@ -0,0 +1,215 @@ + + ******************************************************************************* + * * + * DOC Driver for Linux 2.6 * + * Source Code Edition * + * * + * VERSIONS * + * * + * * + * Version 1.0.85-beta, released on February 06 2008 * + * Based on DOC Driver Block Device SDK version 1.1.0 EQA9 * + * * + * Copyright (C) SanDisk IL Ltd. 2008 * + * Please note that effective January 1, 2007, the name msystems Ltd. was * + * changed to SanDisk IL Ltd. * + * * + * Email questions to: oemsupport@sandisk.com * + * * + ******************************************************************************* + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version. * + * This program is distributed in the hope that it will be useful, but WITHOUT * + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program, * + * except for the rights expressly granted in this License. * + * * + ******************************************************************************* + +This package is beta version for DOC driver for mDOC H3. + +The list below documents and logs the changes in DOC driver for Linux +over time. + + +Version 1.0.85-beta - February 06, 2008 +---------------------------------------- +1. DOC Driver SDK changes. +1.1. Bug Fixes + - init sequence: + -- Wait enough time for mount to complete before sofware reset. + -- Wait for both floors to be ready after software reset. + -- Part of configuration registers should be set only after device + selection. + -- Add delay between sequential access to same register. + - Check for format completeness in flAbsMountVolume. + - flChangeProtectionType() and flIPLChangeProtectionType() do not support + OTW_PROTECTED flag. + - Verify write on cascaded device. + - flRecoverFromPowerLoss fixed sequence. + - Multiple mount on the same partition caused memory leak. + - flUnformat should not delete all partitions only if identified + protected partitions. + - Alignment to unit in FAT32 format. + - Simulator's file register was not updated correctly in case of failure. + - Simulator's last partition fast area size fixed to fit real + device calculation. + + +Version 1.0.84-alpha - November 16, 2007 +---------------------------------------- +1. Linux driver changes. +1.1. Added "tffs_unformat= command line option for unformatting mDOC device +1.2. New cylinder/head/sectors-per-track geometry calculation for mDOC capacities + of 4 GByte and higher. +1.3. Improved locking in tffsdrv26.c. + + +Version 1.0.83 - January 07, 2007 +--------------------------------- +1. Supports the following mDOC Products: + - mDOC H3 family + +2. DOC Driver SDK changes. +2.1. Bug Fixes + - Fixed various compilation warnings. + - Added wait for ATA BUSY de assertion before performing ATA reset during init. + - Fixed IRQ handling in case of cascaded configuration. + - Fixed OTW for cascaded configuration. + - Enable removing 'lock enabled' attribute from a partition. + - Added SDK level secure-wipe power-failure immunity. +2.2. Added mDOC H3 2GBit device simulation. + +3. Linux driver changes. +3.1. Added support for Intel PXA27x board (aka "Mainstone"). +3.2. The following bugs has been fixed in this version: + - The FL_IOCTL_GET_INFO Advanced Function causes CPU fault on 13-th and + higher disks. + - The FL_IOCTL_IPL_HW_PROTECTION Advanced Function fails. + - Write performance is low in case of cascaded mDOC H3 configuration. +3.3. The following files have been changed: + - tffsdrv26.c + - tffsarch.c + - tffs-pm26.c + - flcustom.c + - flsystem.c + - flcustom.h + - flsystem.h + - tffsdrv.h + + +Version 1.0.82-beta - November 13, 2006 +--------------------------------------- +1. Supports the following mDOC Products: + - mDOC H3 family + +2. DOC Driver SDK changes. +2.1. Bug Fixes: + - Cascaded configuration support. + - DMA handling when data size exceeds frame size. + - OTW setting changed when changing protection type. + - SLOCK setting disabled when using flChangeProtectionType. + - flChangeProtectionKey() returned flWrongKey instead of flHWProtection upon failure. + - Set IPL partition as 'protectable' upon creation. +2.2. API Changes: + - IPL protection APIs added. + - 16 partitions supported (14 user partitions + mandatory IPL and OTP partitions). + - TL_LEAVE_SOME_PARTITIONS added to flFlashFormat() + - RW protection enabled. +2.3. Joint Protection removed. +2.4. Compilation warnings fixed. + +3. Linux driver changes. +3.1. Added mDOC IRQ support for Texas Instruments OMAP2420 ("H4") board. +3.2. Added s/w DMA support for Texas Instruments OMAP2420 ("H4") board. +3.3. Added suspend/resume support for Texas Instruments OMAP2420 ("H4") board. +3.4. Added "tffs_dpd_timeout=" command line option for better automatic + power-down control. +3.5. Added "tffs_memcpy=1" command line option to improve performance. +3.6. Number of supported "disks" (BDTL partitions) has been increased from + 6 to 12. + + + +Version 1.0.81-alpha - August 10, 2006 +-------------------------------------- +1. Supports the following mDOC Products: + - mDOC H3 family + + + +Disclaimer of Liability +----------------------- + +SanDisk IL Ltd.'s general policy does not recommend the use of its products +in life support applications wherein a failure or malfunction of the +product may directly threaten life or injury. +Accordingly, in any use of products in life support systems or other +applications where failure could cause damage, injury or loss of life, +the products should only be incorporated in systems designed with +appropriate redundancy, fault tolerant or back-up features. + +SanDisk IL shall not be liable for any loss, injury or damage caused by +use of the Products in any of the following applications: + +Special applications such as military related equipment, nuclear reactor +control, and aerospace + +Control devices for automotive vehicles, train, ship and traffic +equipment + +Safety system for disaster prevention and crime prevention + +Medical-related equipment including medical measurement device. + + + +Contact information +------------------- + +For comments, questions and bug reports, please contact your SanDisk +representative or e-mail us at oemsupport@sandisk.com. + + This document is for information use only and is subject to change + without prior notice. + + SanDisk IL Ltd. assumes no responsibility for any errors that may + appear in this document, nor for incidental or consequential damages + resulting from the furnishing, performance or use of this material. + + SanDisk IL's products are not warranted to operate without failure. + SanDisk IL's general policy does not recommend the use of its products + in life support applications where a failure or malfunction of the + product could cause injury or loss of life. Per SanDisk IL's Terms and + Conditions of Sale, the user of SanDisk IL's products in life support + applications assumes all risk of such use and indemnifies SanDisk IL + against all damages. See "Disclaimer of Liability". Accordingly, in + any use of the Product in life support systems or other applications + where failure could cause injury or loss of life, the Product should + only be incorporated in systems designed with appropriate and + sufficient redundancy or backup features. + + All parts of the SanDisk IL's documentation are protected by copyright + law and all rights reserved. + + Contact your local SanDisk sales office or distributor to obtain the + latest specifications before placing your order. + + (C) 1995-2007 SanDisk IL Ltd. All rights reserved. + + mDOC, DOC, TrueFFS, SureFS, SanDisk and SanDisk logo are registered + trademarks of SanDisk IL Ltd. and SanDisk Corporation, respectively. + Other product names or service marks mentioned herein may be trademarks + or registered trademarks of their respective owners and are hereby + acknowledged. diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_common.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_common.h new file mode 100755 index 00000000..7a12be3c --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_common.h @@ -0,0 +1,124 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/***********************************************************************************/ +/* */ +/* Header file containing definitions used by external API */ +/* */ +/***********************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/version 7.0/TrueFFS FS/src/mdoc/_common.h-arc $ + * + * Rev 1.3 Oct 22 2007 11:34:46 einat.avidan + * update copyrights header + * + * Rev 1.2 Sep 11 2006 13:45:10 yaniv.iarovici + * Legal header added + * + * Rev 1.1 Aug 09 2006 16:52:44 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#ifndef _COMMON_H +#define _COMMON_H + +/**************************************************************************/ +/* General types definitions */ +/* TrueFFS interface of all packages uses the following types as the */ +/* variable definision. */ +/**************************************************************************/ + +typedef int FLBoolean; +typedef unsigned char FLByte; /* 8 bit unsigned variable */ +typedef unsigned short FLWord; /* 16 bit unsigned variable */ +typedef unsigned long FLDword; /* 32 bit unsigned variable */ +typedef unsigned int FLNative; /* Native variable at least 16 bits */ +typedef signed char FLSByte; /* 8 bit signed variable */ +typedef signed short FLSWord; /* 16 bit signed variable */ +typedef signed long FLSDword; /* 32 bit signed variable */ +typedef int FLSNative; /* Signed native variable at least 16 bits */ +typedef FLSWord FLWchar; /* Unicode type variable */ +typedef FLDword CardAddress ; /* Physical offset on card */ + +/**************************************************************************/ +/* I O r e q */ +/* */ +/* IOreq is a common structure passed to all TrueFFS functions. */ +/* Refer to the description of individual functions for specific usage */ +/* of fields. Some fields have different names when used by different */ +/* functions, hence the use of unions. */ +/* */ +/**************************************************************************/ + +typedef unsigned FLHandle; /* Handle of an open file or drive. */ + /* Actually an index to file table or */ + /* drive table. */ + + +typedef struct { + FLHandle irHandle; /* Handle of file or drive for operation*/ + FLDword irFlags; /* function-specific flags */ + void * irPath; /* path of file for operation */ + void * irData; /* Pointer to user-buffer for operation */ + FLSDword irLength; /* No. of bytes, size or position for */ + /* operation */ + FLSDword irCount; /* Count or offset for operaion */ +} IOreq; + +/**************************************************************************/ +/* Special ioreq field names: */ +/* IOReq structure is the basic IO type used for all TrueFFS calls. */ +/* Some of the fields has additional name for more trivial use of the */ +/* function. The duplicate names are defined below. */ +/**************************************************************************/ +#define irSectorCount irCount +#define irSectorNo irLength +#define irByteCount irCount +#define irAddress irLength + +#define FL_GET_SOCKET_FROM_HANDLE(ioreq) (FLByte)((ioreq)->irHandle & 0x0f) +#define FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq) (FLByte)(((ioreq)->irHandle & 0xf0) >> 4) + +#endif /*_COMMON_H*/ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_dochapi.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_dochapi.h new file mode 100755 index 00000000..76109ae9 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_dochapi.h @@ -0,0 +1,2621 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/***********************************************************************************/ +/* */ +/* Internal header file for doch_api module */ +/* */ +/***********************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/version 7.0/TrueFFS FS/src/h3/_dochapi.h-arc $ + * + * Rev 1.23 Dec 03 2007 18:54:24 einat.avidan + * Add flag for DochRecoverFromPowerLoss + * Remove flDOCHWipeSectorsByWriting + * + * Rev 1.22 Oct 30 2007 15:29:20 einat.avidan + * add new function flDOCHWipeSectorsByWriting + * + * Rev 1.21 Oct 22 2007 11:34:46 einat.avidan + * update copyrights header + * + * Rev 1.20 Oct 21 2007 15:28:26 einat.avidan + * fix compilation warnings + * + * Rev 1.19 Oct 11 2007 18:47:12 Einat.Avidan + * Replace global Boolean pattern with pattern in size of + * byte instead of dWord + * Add support for reporting internal errors + * add compilation flags for SOTP and SLPP + * + * Rev 1.18 Mar 22 2007 17:12:10 einat.avidan + * add SOTP + * + * Rev 1.17 Mar 13 2007 13:47:18 einat.avidan + * add support for SLPP + * + * Rev 1.16 Sep 11 2006 13:45:10 yaniv.iarovici + * Legal header added + * + * Rev 1.15 Sep 10 2006 10:02:40 Yaniv.Iarovici + * Change SA SDK sub-version to "1.51 Prelim2". + * + * Rev 1.14 Aug 24 2006 11:40:36 Yaniv.Iarovici + * Added 'DOCH_ACCESS_ALL_PARTITIONS' to structure 'DOCH_Access_Op'. + * + * Rev 1.13 Aug 16 2006 08:43:02 Yaniv.Iarovici + * change SA SDK sub-version to Fin4 + * Change DOCH_SECTOR_SIZE_BITS to bit-manipulation on DOCH_SECTOR_SIZE_BITS insead of value of 512 + * Add #define DOCH_MAX_DRQ_SUPPORTED to indicate max DRQ size supported by the SDK + * Change description of flDOCHGetPowerMode() and flDOCHSetPowerMode() to fit SW Spec 0.84 + * + * Rev 1.12 Aug 09 2006 17:27:42 Polina.Marimont + * initial for DOC Driver 1.0 + * + * Rev 1.10 Jul 03 2006 22:45:02 polina.marimont + * version change + * + * Rev 1.9 Jul 03 2006 22:12:32 polina.marimont + * version changed + * + * Rev 1.8 Jun 22 2006 16:56:32 Polina.Marimont + * version changed + * + * Rev 1.7 Jun 21 2006 18:23:34 Polina.Marimont + * 1. version update + * 2. set power mode function description updated + * + * Rev 1.6 Jun 18 2006 13:01:58 Polina.Marimont + * 1. version changed + * 2. power mode save function chaged + * + * Rev 1.5 Jun 14 2006 17:31:52 Polina.Marimont + * version updated + * + * Rev 1.4 May 30 2006 10:40:24 polina.marimont + * version change to 1.42 Pre 3 + * + * Rev 1.3 May 28 2006 12:48:26 polina.marimont + * version 1.42 Pre1 + * + * Rev 1.2 May 18 2006 14:40:46 polina.marimont + * PVCS inside + */ + +#ifndef _DOCHAPI +#define _DOCHAPI + +#include "_common.h" + +/***********************/ +/* SDK Version Number */ +/***********************/ +#define DochSDKVersion "0151" +#define DochSDKSubVersion "Pre2" + +/********************/ +/* Partitions */ +/********************/ + +/* Pattern to indicate a boolean global variable was set + (to deal with "naughty" compilers...)*/ +#define DOCH_GLOBAL_BOOL_PATTERN 0xCA + +/* Max number of paritions */ +#define DOCH_MAX_PARTITIONS 16 + +/*IPL partition*/ +#define DOCH_IPL_PARTITION 0 +#define IPL_PARTITION_SIZE_SECTORS 0x200 /*256KB in sectors*/ +#define IPL_PARTITION_SIZE_V_SECTORS 0x10 /* 8K KB sectors*/ + + +/********************/ +/* Various Defines */ +/********************/ + +/* On/Off definitions */ +#define DOCH_OFF 0 +#define DOCH_ON 1 + +/* size of DOCH data block in FLBytes */ +#define DOCH_SECTOR_SIZE_BITS 9 +#define DOCH_SECTOR_SIZE (1<irHandle & 0x0f) +#define DOCH_SET_SOCKET_TO_IOREQ_HANDLE(ioreq, socket) ((ioreq)->irHandle |= (socket)) + +#define DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) (FLByte)(((ioreq)->irHandle & 0xf0) >> 4) +#define DOCH_SET_PARTITION_TO_IOREQ_HANDLE(ioreq, part) ((ioreq)->irHandle = \ + ( ((part & 0xF) << 4) | ((ioreq)->irHandle & 0xFFFFFF0F)) ) + +/* Operation type (for long operations) */ +#define DOCH_NORMAL_OPERATION 0x00 +#define DOCH_IMMEDIATE_OPERATION 0x80 + +/* Data transfer modes */ +typedef enum { DOCH_DATA_XFER_MODE_SINGLE = 0x00, + DOCH_DATA_XFER_MODE_MULT = 0x01 +} DOCH_DataTransferMode; +/*Max supported DRQ*/ +#define DOCH_MAX_DRQ_SUPPORTED 4 + +/*ETFFS Alert Levels*/ +typedef enum { + DOCH_ALERT_LEVEL_CRASH = 0, /*Prints only errors that H3 can not recover from*/ + DOCH_ALERT_LEVEL_EMERGENCY = 1, /*Prints only important, but not lethal errors*/ + DOCH_ALERT_LEVEL_REPORT = 2, /*Prints basic report on H3 operations*/ + DOCH_ALERT_LEVEL_DEBUG = 3, /*Prints full report on H3 progress*/ + DOCH_ALERT_LEVEL_BORING = 4 /*Prints every operation done by H3*/ +} DOCH_AlertLevel; + +/* Power mode constants */ +typedef enum { + DOCH_PM_SET_NONE = 0x00, + DOCH_PM_SET_WORK_MODE = 0x01, + DOCH_PM_SET_INACTIVE_MODE = 0x02, + DOCH_PM_SET_BOTH_MODES = 0x03 +} DOCH_SetPowerMode; + +typedef enum { + DOCH_PM_WORK_MODE = 0x00, + DOCH_PM_INACTIVE_MODE = 0x04 +} DOCH_SelectedPowerMode; + +typedef enum { + DOCH_WM_NORMAL = 0x00, /*Same as ATA ACTIVE Mode*/ + DOCH_WM_LOW_FREQ = 0x01, /*Same as ATA IDLE Mode*/ + DOCH_WM_NORMAL_AND_AUTO_STBY = 0x02, + DOCH_WM_LOW_FREQ_AND_AUTO_STBY = 0x03 +} DOCH_WorkMode; + +typedef enum { + DOCH_IM_IDLE = 0x00, /*Same as ATA STANDBY Mode*/ + DOCH_IM_DPD = 0x10, /*Same as ATA SLEEP Mode*/ + DOCH_IM_IDLE_2_DPD = 0x20 /*No timeout IDLE ==> DPD */ +} DOCH_InactiveMode; + +#define DOCH_PM_SAVE_DEFAULT 0x10 /*Save power mode settings as device default*/ + +/* Custom Parameters Table */ +typedef enum { + DOCH_CP_BOOT_MODE = 0x00, /*Boot Mode (See DOCH_IPLModes)*/ + DOCH_CP_XIP_TEST_MODE = 0x01, /*XIP Test Modes (See DOCH_XIPTestModes)*/ + DOCH_CP_XIP_MAX_SIZE = 0x02, /*Max XIP Size*/ + DOCH_CP_XIP_ETFFS_SIZE = 0x03, /*Returns the size of the currently saved ETFFS (required for uploading the ETFFS)*/ + DOCH_CP_WORK_MODES = 0x04, /*Work Modes (Bit Field, see enum DOCH_CPWorkModes)*/ + DOCH_CP_SLOCK_CTRL = 0x05, /*Sticky Lock control (See DOCH_SlockCtrl)*/ + DOCH_CP_BYTE_SWAP_CTRL = 0x06, /*Byte Swap control (See DOCH_ByteSwapCtrl)*/ + DOCH_CP_FLASH_TEST_MODE = 0x07, /*Enable/Disable flash test mode (See DOCH_FlashTestModeCtrl)*/ + DOCH_CP_REPORT_ECC_MODE =0x08 /*Enable/Disable report of ECC errors (See DOCH_EccErrorCtrl)*/ +} DOCH_CustomParams; + +#define DOCH_CUSTOM_PARAM_TEMP 1 +#define DOCH_CUSTOM_PARAM_DEFAULT 0 + +/* IPL Modes */ +typedef enum { + DOCH_IPL_MODE_NORMAL_RAM = 0x0000, + DOCH_IPL_MODE_PAGED_RAM = 0x0001, + DOCH_IPL_MODE_VIRTUAL_RAM = 0x0002, + DOCH_IPL_MODE_CS_DELAY = 0x1000, /*Should be Or`ed with 0x0XX0, where bits 4-11 indicating delay*/ + DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT = 0x2000, + DOCH_IPL_MODE_ACTIVE_SWAP_BYTES = 0x4000, + DOCH_IPL_MODE_8KB_WINDOW = 0x8000 +} DOCH_IPLModes; + +#define DOCH_IPL_WRITE_FIRST_CHUNK 0x80000000 /*Defines first chunk when writing IPL in chunks*/ + +/* XIP Test Modes */ /*No default value, will be cleared upon reset*/ +typedef enum { + DOCH_XIP_NORMAL = 0x0000, + DOCH_XIP_WRITEABLE = 0x0001, + DOCH_XIP_FILL_PATTERN = 0x0002, /*"M-Systems" and the rest with consecutive 16bit numbers*/ + DOCH_XIP_PIPELINE = 0x0003 /*Places the device in pipeline access mode*/ +} DOCH_XIPTestModes; + +typedef enum { + DOCH_WORK_MODES_BLOCK_SPI = 0x0002 /*Block SPI*/ +} DOCH_CPWorkModes; + +typedef enum { + DOCH_STICKY_LOCK_UNSET = 0x00, + DOCH_STICKY_LOCK_SET = 0x01 +} DOCH_SlockCtrl; + +typedef enum { + DOCH_BYTE_SWAP_UNSET = 0x00, + DOCH_BYTE_SWAP_SET = 0x01 +} DOCH_ByteSwapCtrl; + +typedef enum { + DOCH_DISABLE_FLASH_TEST_MODE = 0x00, + DOCH_ENABLE_FLASH_TEST_MODE = 0x01 +} DOCH_FlashTestModeCtrl; + +typedef enum { + DOCH_DISABLE_REPORT_ECC_ERRORS = 0x00, + DOCH_ENABLE_REPORT_ECC_ERRORS = 0x01 +} DOCH_EccErrorCtrl; + + +typedef enum { + DOCH_DLMCODE_DOWNLOAD = 0x01, /*Download is for immediate, temporary use*/ + DOCH_DLMCODE_DOWNLOAD_AND_SAVE = 0x07, /*Save downloaded code for immediate & future use*/ + DOCH_DLMCODE_DOWNLOAD_AND_LAST_SAVE = 0x87, /*Same as code 0x07, but marking this as the last permanent + download accepted by the device*/ + DOCH_DLMCODE_UPLOAD = 0xFF +} DOCH_DLMcodeModes; + +/* Set of access options for DOCH_EN_ACCESS_WPWD */ +typedef enum { DOCH_ACCESS_USER_PASSWORD = 0x00, + DOCH_ACCESS_MASTER_PASSWORD = 0x01, + DOCH_ACCESS_GATE_KEEPER = 0x02, + + DOCH_ACCESS_ALL_PARTITIONS = 0xFF +} DOCH_Access_Op; + +/*Defines for DOCHConfigHW*/ +/*------------------------*/ +typedef enum { + DOCH_BURST_WRITE_MODE_CTRL = 0x0, + DOCH_BURST_READ_MODE_CTRL = 0x1, + DOCH_IPL_CTRL = 0x2, + DOCH_WARM_BOOT_CTRL = 0x3, + DOCH_POWER_DOWN = 0x4, + DOCH_DMA_CTRL = 0x5, + DOCH_DMA_ENABLE = 0x6, + DOCH_DMA_NEGATION_CTRL = 0x7, + DOCH_SLOCK = 0x8, + DOCH_ENDIAN_CTRL = 0x9, + DOCH_OPERATION_MODE_CTRL = 0xA, + DOCH_POWER_MODE_CTRL = 0xB +} DOCH_HwConfigType; + +/* DOCH_NUM_OF_DCONFIGHW_ITEMS should be set to number of items in DOCH_HwConfigType*/ +#define DOCH_NUM_OF_DCONFIGHW_ITEMS 0xC + +/*IPL Control Register*/ +#define DOCH_IPL_WRITE_DISABLE 0x0000 +#define DOCH_IPL_WRITE_READY 0x0001 +#define DOCH_IPL_WRITE_ENABLE 0x0002 + +#define DOCH_IPL_ALL_CS_ENABLED 0x0000 +#define DOCH_IPL_CLOSE_2LOW_IPLS 0x0010 +#define DOCH_IPL_CLOSE_2HIGH_IPLS 0x0020 +#define DOCH_IPL_CLOSE_ALL_IPLS 0x0030 + +/*Warm Boot Register*/ +#define DOCH_WARM_RST_POLARITY_LOW 0x0000 +#define DOCH_WARM_RST_POLARITY_HIGH 0x0001 + +#define DOCH_WARM_RST_BURST_ON 0x0000 +#define DOCH_WARM_RST_BURST_NO_CHNG 0x0002 + +/*Deep Power Down Mode Register*/ +#define DOCH_DPD_PIN_POL_LOW 0x0000 +#define DOCH_DPD_PIN_POL_HIGH 0x0001 + +#define DOCH_DPD_PIN_DISABLED 0x0000 +#define DOCH_DPD_PIN_ENABLED 0x0002 + +#define DOCH_DPD_WAKEUP_HOST_CE 0x0000 +#define DOCH_DPD_WAKEUP_ASYNC_CLK 0x0100 + +/*DMA Control Register*/ +#define DOCH_DMA_REQ_DISABLE 0x0000 +#define DOCH_DMA_REQ_ENABLE 0x0001 + +#define DOCH_DMA_REQ_POL_HIGH 0x0000 +#define DOCH_DMA_REQ_POL_LOW 0x0002 + +#define DOCH_DMA_REQ_LEVEL 0x0000 +#define DOCH_DMA_REQ_EDGE 0x0004 + +/*SLOCK Control Register*/ +#define DOCH_SLOCK_ACTIVE 0x0001 +#define DOCH_SLOCK_OFF 0x0000 + +/*Burst write/read mode control*/ +#define DOCH_BURST_DISABLE 0x0000 +#define DOCH_BURST_ENABLE 0x0002 + +#define DOCH_BURST_HOLD_1_CLK 0x0000 +#define DOCH_BURST_HOLD_2_CLK 0x2000 + +#define DOCH_BURST_LEN_4_CYC 0x0000 +#define DOCH_BURST_LEN_8_CYC 0x0800 +#define DOCH_BURST_LEN_16_CYC 0x1000 +#define DOCH_BURST_LEN_32_CYC 0x1800 + +/*Endian Control Register*/ +#define DOCH_END_SWAP_OFF 0x0000 +#define DOCH_END_SWAP_ON 0x0101 + +/*Operation Mode Register*/ +#define DOCH_NON_PIPE_ACCESS 0x00 +#define DOCH_PIPE_ACCESS 0x01 + +#define DOCH_NO_ADDR_SHIFT 0x00 +#define DOCH_ADDR_SHIFT 0x02 + +/*Power Mode Register*/ +#define DOCH_POWER_MODE_DPD 0x0001 + +/*Environment variables*/ +typedef enum { + DOCH_ENV_VERIFY_WRITE = 0x01, /* Verifies every written sector by reading it back from device */ + DOCH_ENV_ATA_DEBUG = 0x02, /* Retrieve debug buffer from device after completion of ATA command */ + DOCH_ENV_BLOCK_SPI = 0x03, /* Block SPI */ + DOCH_ENV_NO_ATA_TIMEOUT = 0x04, /* Disable ATA command timeout */ + DOCH_ENV_AUTO_DPD_BY_HOST = 0x05 /* Host automatically enters device to DPD after every command*/ +} DOCH_EnVars; + +/*Flags for read/write operations using DMA/Burst*/ +#define DOCH_USE_DMA 0x01 +#define DOCH_USE_BURST 0x02 + +/* Strings lengths */ +#define DOCH_PASS_KEY_LEN 0x80 +#define DOCH_PASS_KEY_LEN_NO_NULL (H3_PASS_KEY_LEN-1) +#define DOCH_SER_NO_LEN 0x14 +#define DOCH_MODEL_NO_LEN 0x28 +#define DOCH_PROG_NAME_LEN 0x10 +#define DOCH_PROG_VER_LEN 0x8 + +/* DOCHRecoverFromPowerLoss flags */ +#define DOCH_DO_NOT_REINIT_MASTER 0x1 + + +/* DOCH error codes */ +/*------------------*/ +#define DOCH_ATA_ERROR_BASE 0x0 +#define DOCH_SDK_ERROR_BASE 0x100 +#define DOCH_FS_ERROR_BASE 0x200 + +typedef enum { DOCH_OK = 0, + + /*ATA Error codes*/ + + DOCH_ATA_NO_ERROR = DOCH_ATA_ERROR_BASE + 0x00, + DOCH_ATA_ERROR_MEDIA_ERROR_DETECTED = DOCH_ATA_ERROR_BASE + 0x01, /*ATA-4*/ + DOCH_ATA_ERROR_ADDRESS_MARK_NOT_FOUND = DOCH_ATA_ERROR_BASE + 0x01, /*Repeat last operation*/ + DOCH_ATA_ERROR_TRACK_0_NOT_FOUND = DOCH_ATA_ERROR_BASE + 0x02, /*Protection violation*/ + DOCH_ATA_ERROR_NO_MEDIA = DOCH_ATA_ERROR_BASE + 0x02, /*ATA-4*/ + DOCH_ATA_ERROR_ABORT = DOCH_ATA_ERROR_BASE + 0x04, /*Always need to be supplied*/ + DOCH_ATA_ERROR_MEDIA_CHANGE_REQUESTED = DOCH_ATA_ERROR_BASE + 0x08, /*Not to use for now*/ + DOCH_ATA_ERROR_ID_NOT_FOUND = DOCH_ATA_ERROR_BASE + 0x10, /*Passing partition boundary*/ + DOCH_ATA_ERROR_MEDIA_CHANGE_DETECTED = DOCH_ATA_ERROR_BASE + 0x20, /*Not to use for now*/ + DOCH_ATA_ERROR_WRITE_PROTECTED = DOCH_ATA_ERROR_BASE + 0x40, /*on writes - only if we run out of space*/ + DOCH_ATA_ERROR_UNCORRECTABLE_DATA = DOCH_ATA_ERROR_BASE + 0x40, /*on reads - possible for unrecoverable ECC - should not be returned by write routines*/ + DOCH_ATA_ERROR_ICRC = DOCH_ATA_ERROR_BASE + 0x80, /*on DMA xfers - to leave for now*/ + + /*SDK Error Codes*/ + DOCH_TimedOut = DOCH_SDK_ERROR_BASE, + DOCH_GeneralFailure = DOCH_SDK_ERROR_BASE + 5, + DOCH_AdapterNotFound = DOCH_SDK_ERROR_BASE + 6, + DOCH_DeviceTurnedOff = DOCH_SDK_ERROR_BASE + 7, + DOCH_BadParameter = DOCH_SDK_ERROR_BASE + 10, + DOCH_DriveNotAvailable = DOCH_SDK_ERROR_BASE + 15, + DOCH_DriveNotReady = DOCH_SDK_ERROR_BASE + 20, + DOCH_NotEnoughMemory = DOCH_SDK_ERROR_BASE + 25, + DOCH_ReadFault = DOCH_SDK_ERROR_BASE + 30, + DOCH_WriteFault = DOCH_SDK_ERROR_BASE + 31, + DOCH_VerifyFault = DOCH_SDK_ERROR_BASE + 32, + DOCH_ProtectionFault = DOCH_SDK_ERROR_BASE + 33, + DOCH_UnknownCmd = DOCH_SDK_ERROR_BASE + 35, + DOCH_DiskNotFound = DOCH_SDK_ERROR_BASE + 40, + DOCH_PartitionNotFound = DOCH_SDK_ERROR_BASE + 45, + DOCH_PartitionLimitExceeded = DOCH_SDK_ERROR_BASE + 50, + DOCH_FeatureNotSupported = DOCH_SDK_ERROR_BASE + 55, + DOCH_ATABusyNotCleared = DOCH_SDK_ERROR_BASE + 60, + DOCH_ATANotReady = DOCH_SDK_ERROR_BASE + 61, + DOCH_ATAErrorDetected = DOCH_SDK_ERROR_BASE + 65 + +} DOCH_Error; + + +/* IOCTL Codes */ +typedef enum { + /*Get Info*/ + SDK_IDENTIFY_DISKONCHIP_DEVICE = 0x200, + SDK_GET_RESET_STATUS = 0x201, + SDK_NOTIFY_RESET = 0x202, + SDK_NOTIFY_PLATFORM_RESUMED = 0x203, + SDK_GET_PARTITION_INFO = 0x204, + SDK_SET_DISK_USER_ATTR = 0x205, + SDK_GET_DISK_USER_ATTR = 0x206, + SDK_GET_CONFIG_DATA = 0x207, + SDK_SET_CONFIG_DATA = 0x208, + + /*Media*/ + SDK_SET_DEFAULT_PARTITION = 0x210, + SDK_SET_DATA_XFER_MODE = 0x211, + SDK_OPTIMIZE_MEDIA = 0x212, + SDK_DELETE_PARTITIONS = 0x213, + SDK_ADD_PARTITION = 0x214, + SDK_UNFORMAT_DEVICE = 0x215, + SDK_WRITE_IPL = 0x216, + SDK_READ_IPL = 0x217, + + /*IO*/ + SDK_READ_PARTITION_SECTORS = 0x220, + SDK_WRITE_PARTITION_SECTORS = 0x221, + SDK_WRITE_AND_LOCK = 0x222, + SDK_WIPE_SECTORS = 0x223, + SDK_FREE_SECTORS = 0x224, + SDK_PREPARE_FOR_WRITE = 0x225, + SDK_WIPE_SECTORS_BY_WRITING = 0x226, + + /*Flexi-Flash*/ + SDK_WRITE_FLEXI_FAST = 0x230, + SDK_WRITE_FLEXI_NORMAL = 0x231, + SDK_REWRITE_FLEXI_NORMAL = 0x232, + + /*Hash*/ + SDK_READ_WITH_HASH_VERIFY = 0x240, + SDK_READ_HASH = 0x241, + SDK_WRITE_HASH = 0x242, + + /*Protection*/ + SDK_ACCESS_PART_WITH_PWD = 0x250, + SDK_DISABLE_PART_ACCESS = 0x251, + SDK_SET_PART_PROTECTION = 0x252, + SDK_SET_PART_USER_ATTR = 0x253, + SDK_GET_PART_USER_ATTR = 0x254, + + /*PKI*/ + SDK_PKI_HOST = 0x260, + SDK_PKI_DOCH = 0x261, + SDK_PKI_VERIFY_HOST_KEY = 0x262, + + /*Custom Parameters*/ + SDK_GET_CUSTOM_PARAM = 0x270, + SDK_SET_CUSTOM_PARAM = 0x271, + + /*Atomic Read/Write Sequence*/ + SDK_ATOMIC_WRITE_SEQ = 0x280, + + /*Algorithms*/ + SDK_REPORT_SUPP_ALG = 0x290, + SDK_REPORT_ALG_CAPAB = 0x291, + SDK_SET_ALG_MODE = 0x292, + + /*Hash*/ + SDK_AUTO_HASH_CTRL = 0x2A0, + SDK_READ_CALC_HASH = 0x2A1, + SDK_WRITE_CALC_HASH = 0x2A2, + SDK_READ_ORIG_HASH = 0x2A3, + SDK_WRITE_GIVEN_HASH = 0x2A4, + SDK_START_HASH_STREAM_CALC = 0x2A5, + SDK_READ_HASH_STREAM_CALC = 0x2A6, + SDK_RETURN_RAND_NUMS = 0x2A7, + SDK_SET_HASH_KEY = 0x2A8, + + /*General (Control/Configuration)*/ + SDK_SET_POWER_MODE = 0x2B0, + SDK_GET_POWER_MODE = 0x2B1, + SDK_HW_CONFIG = 0x2B2, + SDK_RECOVER_FROM_POWER_LOSS = 0x2B3, + SDK_RESET_SOCKET = 0x2B4, + SDK_SET_ENV_VAR = 0x2B5, + SDK_CLEAR_ATA_INTERRUPT = 0x2B6, +#ifndef FL_SLPP + SDK_GET_PHYSICAL_ADDRESS = 0x2B7 +#else /*FL_SLPP*/ + SDK_GET_PHYSICAL_ADDRESS = 0x2B7, + /*SLPP Specific*/ + SDK_SLPP_UNLOCK_RANGE = 0x2C0, + SDK_SLPP_UNLOCK_ENTIRE_PARTITION = 0x2C1, + SDK_SLPP_LOCK_RANGE = 0x2C2, + SDK_SLPP_STICKY_LOCK_RANGE = 0x2C3, + SDK_SLPP_REPORT_LOCKED_RANGES = 0x2C4 +#endif /*FL_SLPP*/ + +} SDKFunctionNo; + +/* runtime socket init data */ +typedef struct { + unsigned int nDeviceAddress; +} DOCH_InitSocket; + +/* Access layer routines registration structure */ +typedef struct { + unsigned char (*hal_get_ata_reg_user) (volatile unsigned char *base, int reg); + void (*hal_set_ata_reg_user) (volatile unsigned char *base, int reg, unsigned int val); + unsigned short(*hal_get_ctrl_reg_user) (volatile unsigned char *base, int reg); + void (*hal_set_ctrl_reg_user) (volatile unsigned char *base, int reg, unsigned int val); + int (*hal_blk_read_user) (volatile unsigned char *base, unsigned char *buf, int sectors); + int (*hal_blk_write_user) (volatile unsigned char *base, unsigned char *buf, int sectors); + int (*hal_release_user) (int socketNo); +} DOCH_BusAccess_routines; + +/********************/ +/* API Defines */ +/********************/ + +/* set of DOCH ATA registers */ +typedef enum { + DOCH_DATA_REG = 0x00, + DOCH_ERROR_REG = 0x01, + DOCH_FEATURES_REG = 0x01, + DOCH_SECTOR_CNT_REG = 0x02, + DOCH_SECTOR_NO_REG = 0x03, + DOCH_CYLINDER_LOW_REG = 0x04, + DOCH_CYLINDER_HIGH_REG = 0x05, + DOCH_DRIVE_HEAD_REG = 0x06, + DOCH_STATUS_REG = 0x07, + DOCH_COMMAND_REG = 0x07, + DOCH_ALT_STATUS_REG = 0x0E, + DOCH_CONTROL_REG = 0x0E +} DOCH_Reg; + +/* ATA registers structure */ +typedef struct { FLByte bFeaturesError; /* DOCH_FEATURES_REG or DOCH_ERROR_REG */ + FLByte bSectorCount; /* DOCH_SECTOR_CNT_REG */ + FLByte bSectorNumber; /* DOCH_SECTOR_NO_REG */ + FLByte bCylLow; /* DOCH_CYLINDER_LOW_REG */ + FLByte bCylHigh; /* DOCH_CYLINDER_HIGH_REG */ + FLByte bDriveHead; /* DOCH_DRIVE_HEAD_REG */ + FLByte bCommandStatus; /* DOCH_COMMAND_REG or DOCH_STATUS_REG*/ + FLByte bContorlAltStatus; /* DOCH_CONTROL_REG or DOCH_ALT_STATUS_REG*/ +} DOCH_Registers; + +/* Set of operation codes for PassThru */ +typedef enum { DOCH_PASSTHRU_NO_DATA = 0x00, + DOCH_PASSTHRU_DATA_IN = 0x01, + DOCH_PASSTHRU_DATA_OUT = 0x02 +} DOCH_PassThru_Op; + +typedef enum { DOCH_PASSTHRU_NO_INT = 0x00, + DOCH_PASSTHRU_USE_INT = 0x04 + +} DOCH_PassThru_Int; + + +/*OPTIMIZE_MEDIA*/ +#define DOCH_OPTIMIZE_BY_PREPARE_FOR_WRITE 0 +#define DOCH_OPTIMIZE_DEFAULT 1 + +typedef enum { + SET_DEFAULT_PARTITION_TEMP = 0x0, + SET_DEFAULT_PARTITION_PERM = 0x1 +} DOCH_DefaultPartSet; + +typedef enum { + DOCH_FAST_PARTITOIN_DELETE = 0x0, + DOCH_COMPLETE_PARTITION_DELETE = 0x8 +} DOCH_DeletePartitionsMode; + + +/******************************************************************************/ +/* + * Partition Info structure, sub-structures and ENUMS + */ +/******************************************************************************/ + +/*Partition dwCommandFlagsOrStatuses Offsets*/ +#define DOCH_CFSO_FAST_AREA_SIZE_TYPE 8 +#define DOCH_CFSO_USER_AUTHENTICATED 16 +#define DOCH_CFSO_PERM_LOCKED 17 +#define DOCH_CFSO_MASTER_AUTHENTICATED 18 +#ifdef FL_SOTP +#define DOCH_CFSO_SOTP_LOCKED 19 +#endif /*FL_SOTP*/ +#define DOCH_CFSO_HW_LOCK_ASSERTED 30 +#define DOCH_CFSO_SW_LOCK_ASSERTED 31 + +/*Partition dwCommandFlagsOrStatuses Bits*/ +#define DOCH_CFSB_FAST_AREA_SIZE_TYPE 0x00000100 +#define DOCH_CFSB_USER_AUTHENTICATED 0x00010000 +#define DOCH_CFSB_PERM_LOCKED 0x00020000 +#define DOCH_CFSB_MASTER_AUTHENTICATED 0x00040000 +#ifdef FL_SOTP +#define DOCH_CFSB_SOTP_LOCKED 0x00080000 +#endif /*FL_SOTP*/ +#define DOCH_CFSB_HW_LOCK_ASSERTED 0x40000000 +#define DOCH_CFSB_SW_LOCK_ASSERTED 0x80000000 + +/*Partition Attribute1 Offsets*/ +#define DOCH_PA1O_PARTITION_TYPE 0 +#define DOCH_PA1O_PERFORMANCE_CTRL 8 +#define DOCH_PA1O_PAGE_SIZE_EXP 16 +#define DOCH_PA1O_HASH_TYPE 24 + +/*Partition Attribute1 Bits*/ +#define DOCH_PA1B_PARTITION_TYPE 0x000000FF +#define DOCH_PA1B_PERFORMANCE_CTRL 0x00000F00 +#define DOCH_PA1B_PAGE_SIZE_EXP 0x000F0000 +#define DOCH_PA1B_HASH_TYPE 0x3F000000 + +/*Partition Attribute2 Offsets*/ +#define DOCH_PA2O_PROTECTION_TYPE 0 +#define DOCH_PA2O_USER_MODE 6 +#define DOCH_PA2O_GUEST_MODE 9 +#define DOCH_PA2O_MASTER_CTRL 12 +#define DOCH_PA2O_ENCRYPT_TYPE 15 +#define DOCH_PA2O_OTP_BIT 21 +#define DOCH_PA2O_LOCK_CTRL 22 +#define DOCH_PA2O_MAX_AUTH_ATTEMPTS 24 + +/*Partition Attribute2 Bits*/ +#define DOCH_PA2B_PROTECTION_TYPE 0x00000007 /*DOCH_ProtectionType*/ +#define DOCH_PA2B_USER_MODE 0x000001C0 /*DOCH_PartitionAccessMode*/ +#define DOCH_PA2B_GUEST_MODE 0x00000E00 /*DOCH_PartitionAccessMode*/ +#define DOCH_PA2B_MASTER_CTRL 0x00007000 /*DOCH_PartitionAccessMode*/ +#define DOCH_PA2B_ENCRYPT_TYPE 0x00038000 /*DOCH_EncryptType*/ +#define DOCH_PA2B_OTP_BIT 0x00200000 +#define DOCH_PA2B_LOCK_CTRL 0x00C00000 /*DOCH_LockControl*/ +#define DOCH_PA2B_MAX_AUTH_ATTEMPTS 0x0F000000 + +/* Structure that holds various partition data*/ +typedef struct { + FLByte bDevice; /*On which device (0/1) the partition reside*/ +} DOCH_PartitionAttr; + +/*Partition formatting info*/ + +/*API exported for partition preporties*/ +typedef struct { + FLDword dwProtectionType; /*DOCH_ProtectionType*/ + FLDword dwUserAccessMode; /*DOCH_PartitionAccessMode*/ + FLDword dwGuestAccessMode; /*DOCH_PartitionAccessMode*/ + FLDword dwMasterControl; /*DOCH_PartitionAccessMode*/ + FLDword dwEncryptionType; /*DOCH_EncryptType*/ + FLDword dwLockControl; /*DOCH_LockControl*/ + FLDword dwMaxNumOfAuthAttempts; /*0 = Unlimited number*/ + FLByte bPasskey[0x80]; /*ASCII*/ +} DOCH_PartitionProtectionAPI; + +typedef enum { + DOCH_PASSKEY_VALID = 0x01, /* Passkey in DOCH_PartitionProtectionAPI is valid */ + DOCH_ATTRIBUTES_VALID = 0x02, /* All attributes in DOCH_PartitionProtectionAPI besides passkey are valid */ + DOCH_LOCK_AS_OTP = 0x04, /* Lock the partition for writing */ + DOCH_SEQUENTIAL_OTP = 0x08 /* Enable sequential OTP partition, must be always set with DOCH_LOCK_AS_OTP*/ +} DOCH_PartitionProtectioValidity; + +/*Partition Info structure*/ + +typedef struct { + FLByte bReserved1[0x4]; + FLDword dwCommandFlagsOrStatuses; /*Dynamic info*/ + FLDword partitionAttributes1; + FLDword partitionAttributes2; + FLDword nPartitionSize; /*In Sectors*/ + FLDword nFastAreaSize; /*In Sectors or Percent. for IPL partition: size reported in XIP*/ + FLWord wFastAreaFactor; /*Exponent*/ + FLByte bReserved2[0x2]; + FLDword wPartitionStartSector; + FLWord wCurrentSectorsPerTrack; + FLWord wDefaultSectorsPerTrack; + FLWord wCurrentCylinders; + FLWord wDefaultCylinders; + FLWord wCurrentHeads; + FLWord wDefaultHeads; + FLByte bReserved3[0x4]; /*44-48*/ + FLDword dwSOTPoffset; + FLByte bReserved4[0xC]; + FLWord wFastAreaSectorsInErasableUnit; /*Exponent*/ + FLWord wNormalAreaSectorsInErasableUnit; /*Exponent*/ + FLWord wRecommendedSectorsPerCluster; + FLWord wFastMaxRelatedSectors; + FLWord wNormalMaxRelatedSectors; + FLByte bReserved5[0xB6]; + FLByte bPartitionKey[0x80]; + FLByte bReserved6[0x80]; +} DOCH_PartitionInfo; + +typedef struct { + FLDword dwPartitionType; /*DCOH_PartitionType*/ + FLDword dwPerformanceControl; /*DOCH_PerformanceControl*/ + FLDword dwPageSizeExp; /*DOCH_PageSizeExp*/ + FLDword dwHashType; /*DOCH_HashType*/ + FLDword dwFastAreaSizeType; /*DOCH_FastAreaType*/ + FLDword dwProtectionType; /*DOCH_ProtectionType*/ + FLDword dwUserAccessMode; /*DOCH_PartitionAccessMode*/ + FLDword dwGuestAccessMode; /*DOCH_PartitionAccessMode*/ + FLDword dwMasterControl; /*DOCH_PartitionAccessMode*/ + FLDword dwEncryptionType; /*DOCH_EncryptType*/ + FLDword dwLockControl; /*DOCH_LockControl*/ + FLDword dwOtpEnabled; /*DOCH_OTPBit*/ + FLDword dwMaxNumOfAuthAttempts; /*0 = Unlimited number*/ + FLNative nPartitionSize; /*In Sectors*/ + FLNative nFastAreaSize; /*In Sectors or Percent**/ + FLWord wFastAreaFactor; /*Exponent*/ + FLByte bPasskey[0x80]; /*ASCII*/ +#ifdef FL_SOTP + FLByte bSOTP; /*SOTP partition*/ +#endif /*FL_SOTP*/ +} DOCH_PartitionFormatInfoAPI; + +/*Partition formatting info*/ +typedef struct { + FLByte bReserved1[0x4]; + FLDword dwCommandFlagsOrStatuses; + FLDword partitionAttributes1; + FLDword partitionAttributes2; + FLDword nPartitionSize; /*In Sectors*/ + FLDword nFastAreaSize; /*In Sectors or Percent*/ + FLWord wFastAreaFactor; /*Exponent*/ + FLByte bReserved2[0x12]; + FLDword dwValidity; /*DOCH_PartitionProtectioValidity*/ + FLByte bReserved3[0xD0]; + FLByte bPasskey[0x80]; + FLByte bReserved4[0x80]; +} DOCH_PartitionFormatInfo; + +/*Device dwCommandFlagsOrStatuses Offsets*/ +#define DOCH_DCFSO_CURRENT_XFER_MODE 0 +#define DOCH_DCFSO_CURRENT_MULTI_SECTOR 8 +#define DOCH_DCFSO_HW_LOCK_ASSERTED 30 +#define DOCH_DCFSO_SW_LOCK_ASSERTED 31 + +/*Device dwCommandFlagsOrStatuses Bits*/ +#define DOCH_DCFSB_CURRENT_XFER_MODE 0x00000007 +#define DOCH_DCFSB_CURRENT_MULTI_SECTOR 0x00000F00 +#define DOCH_DCFSB_HW_LOCK_ASSERTED 0x40000000 +#define DOCH_DCFSB_SW_LOCK_ASSERTED 0x80000000 + +/*Device Attributes1 Offsets*/ +#define DOCH_DA1O_SUPPORTED_XFER_MODES_BMP 0 +#define DOCH_DA1O_MAX_MULTI_SEC_XFER_SIZE 8 +#define DOCH_DA1O_SUPPORT_48_BITS 31 + +/*Device Attributes1 Bits*/ +#define DOCH_DA1B_SUPPORTED_XFER_MODES_BMP 0x000000FF +#define DOCH_DA1B_MAX_MULTI_SEC_XFER_SIZE 0x00000F00 +#define DOCH_DA1B_SUPPORT_48_BITS 0x80000000 + +/*Gate Keeper Attributes Offsets*/ +#define DOCH_DA2O_AUTH_TYPE 0 /*DOCH_DeviceAuthType*/ +#define DOCH_DA2O_GUEST_ACCESS_MODE 9 /*DOCH_DeviceAccessMode*/ +#define DOCH_DA2O_MASTER_CONTROL 12 /*DOCH_DeviceAccessMode*/ +#define DOCH_DA2O_MAX_AUTH_ATTEMPTS 24 + +/*Gate Keeper Attributes Bits*/ +#define DOCH_DA2B_AUTH_TYPE 0x00000003 +#define DOCH_DA2B_GUEST_ACCESS_MODE 0x00000E00 +#define DOCH_DA2B_MASTER_CONTROL 0x00007000 +#define DOCH_DA2B_MAX_AUTH_ATTEMPTS 0x0F000000 + +/*Authentication types*/ +typedef enum { + DOCH_DEVICE_AUTH_NONE = 0, + DOCH_DEVICE_AUTH_PWD = 1, + DOCH_DEVICE_AUTH_RSA = 2 +} DOCH_DeviceAuthType; +/*Access modes*/ +typedef enum { + DOCH_DEVICE_ACCESS_MODE_FULL = 0, + DOCH_DEVICE_ACCESS_MODE_RO = 1, + DOCH_DEVICE_ACCESS_MODE_NONE = 2 +} DOCH_DeviceAccessMode; + +#define DOCH_CONFIGURATION_EXISTS_SIGN 0x1F2E3D4C + +typedef struct { + FLWord wVersion; + FLWord wVersionCompatability; + FLDword dwCommandFlagsOrStatuses; + FLDword dwDiskAttributes1; + FLDword dwRservedGateKeeperAttr; + FLDword dwMiscFlags; + FLByte bReserved2[0xC]; + FLByte bUniqueID[0x10]; + FLByte bReserved3[0x10]; + FLByte bSerialNumber[0x14]; + FLByte bModelNumber[0x28]; + FLWord wTotalNumOfPartitions; /*0=IPL not present, 1=Only IPL Present, ... 16=IPL partition + 15 user partitions (MAX)*/ + FLWord wDefaultPartitionNumber; + FLDword dwUnformattedCapacity; /*In Sectors*/ + FLDword dwConfigurationPartitionExistsSign; + FLDword dwETFFSVER; + FLDword dwReservedConfigPartitionSize; /*In Sectors*/ + FLByte bProgrammerName[0x10]; + FLByte bProgrammerVersion[0x8]; + FLDword dwUnitSize; /* In Sectors */ + FLByte bReserved5[0x54]; /*In Sectors*/ + FLByte bReservedGateKeeperKey[0x80]; + FLByte bReserved6[0x80]; +} DOCH_DeviceInfo; + +/*Enums*/ +/*=====*/ +typedef enum { DOCH_PRT_TYPE_NORMAL = 0, /*normal*/ + DOCH_PRT_TYPE_PAGED = 1, /*paged*/ + DOCH_PRT_TYPE_PAGED_DIGEST = 2, /*paged + keeps digest information*/ + DOCH_PRT_TYPE_PAGED_COMPRESSED = 3, /*paged + keeps data in compressed form */ + DOCH_PRT_TYPE_PAGED_DIGEST_COMPRESSED= 4 /*paged + keeps data in compressed form + digest*/ +} DCOH_PartitionType; + + +/*Performance Control*/ +typedef enum { DOCH_NORMAL_PERFORMANCE = 0, /*MLC*/ + DOCH_FIRM_FLASH_OPTIMIZE = 1, /*Rigid MLC/SLC division, fast area field defines division*/ + DOCH_FLEXI_FLASH_OPTIMIZE= 2 /*Adaptive MLC/SLC division, fast area field defines size of spare capacity for performance optimization*/ +} DOCH_PerformanceControl; + +/*Page size exponent (for paged partitions)*/ +typedef enum { DOCH_PAGE_SIZE_512B = 0, + DOCH_PAGE_SIZE_1KB = 1, + DOCH_PAGE_SIZE_2KB = 2, + DOCH_PAGE_SIZE_4KB = 3, + DOCH_PAGE_SIZE_8KB = 4, + DOCH_PAGE_SIZE_16KB = 5, + DOCH_PAGE_SIZE_32KB = 6 +} DOCH_PageSizeExp; + +/*Page size exponent (for paged partitions)*/ +typedef enum { DOCH_HASH_TYPE_SHA1 = 0 +} DOCH_HashType; + +/*Fast Area Type*/ +typedef enum { DOCH_FAST_AREA_TYPE_SECTORS = 0, + DOCH_FAST_AREA_TYPE_PERCENT = 1 +} DOCH_FastAreaType; + +/*Protection Type*/ +typedef enum { DOCH_PARTITION_NOT_PROTECTED = 0, + DOCH_PARTITION_PWD_PROTECTED = 1, + DOCH_PARTITION_RSA_PROTECTED = 2, + DOCH_PARTITION_SLPP_PROTECTED = 3 +} DOCH_ProtectionType; + +#define DOCH_MAX_PWD_ATTEMPTS 5 /*"0" for Unlimited # of attempts*/ + +/*Partition access mode*/ +typedef enum { + DOCH_PART_ACCESS_MODE_FULL = 0, + DOCH_PART_ACCESS_MODE_RO = 1, + DOCH_PART_ACCESS_MODE_NONE = 2 +} DOCH_PartitionAccessMode; + +/*Encryption Type*/ +typedef enum { DOCH_ENCRYPT_NONE = 0, /*Partition is not encrypted*/ + DOCH_ENCRYPT_AES_CTR = 1, /*Partition is AES-encrypted, CTR mode*/ + DOCH_ENCRYPT_RC4 = 2 /*Partition is RC4-encrypted*/ +} DOCH_EncryptType; + + +/*Lock Control*/ +typedef enum { DOCH_LOCK_NOT_ACTIVE = 0,/*LOCK# signal or soft-lock do not affect the access to this partition*/ + DOCH_LOCK_ACTIVE = 1 /*After LOCK# signal is active or soft-lock is written, access to partition*/ + /*can not be authenticated. If access has already been authenticated, it remains*/ +} DOCH_LockControl; + +/*OTP Bit*/ +typedef enum { DOCH_OTP_BIT_OFF = 0, + DOCH_OTP_BIT_ON = 1 +} DOCH_OTPBit; + +typedef enum { + PARTITION_TYPE_IPL = 0x00, + PARTITION_TYPE_BDTL = 0x01, + PARTITION_TYPE_BINARY = 0x02, + PARTITION_TYPE_OTP = 0x03 +} DOCH_PartitionType; + +/******************************************************************************/ +/* + * Partition Access structure + */ +/******************************************************************************/ + +/*Structure for DOCH_VSCMD_EXT_DEVICE_CTRL::DOCH_SET_PARTITION_PROTECTION + and DOCH_VSCMD_EXT_SECURITY_CTRL::DOCH_EN_ACCESS_WPWD*/ +typedef struct { + FLByte bReserved1[0x100]; + FLByte bPassword[0x80]; + FLByte bReserved2[0x80]; +} DOCH_PartitionAcessPassword; + +/******************************************************************************/ +/* + * PKI structures + */ +/******************************************************************************/ + +#define DOCH_CHLNG_SIZE 0x40 +#define DOCH_PKI_KEY_SIZE 0x80 + +/*Structure for DOCH_VSCMD_EXT_SECURITY_CTRL::DOCH_TX_HOST_PUBLICKEY*/ +typedef struct { + FLWord wVersion; + FLByte bReserved1[0xBE]; + FLByte bHostRandomChallange[DOCH_CHLNG_SIZE]; + FLByte bHostPublicKey[DOCH_PKI_KEY_SIZE]; + FLByte bReservedForLargerKey[0x80]; +} DOCH_HostPublicKey; + +/*Structure for DOCH_VSCMD_EXT_SECURITY_CTRL::DOCH_RX_DOCH_PUBLICKEY*/ +typedef struct { + FLWord wVersion; + FLByte bReserved1[0x3E]; + FLByte bHostRandomChallangeByDochPrivateKey[DOCH_CHLNG_SIZE]; + FLByte bReserved2[0x40]; + FLByte bDochRandomChallange[DOCH_CHLNG_SIZE]; + FLByte bDochPublicKey[DOCH_PKI_KEY_SIZE]; + FLByte bReservedForLargerKey[0x80]; +} DOCH_DochPublicKey; + +/*Structure for DOCH_VSCMD_EXT_SECURITY_CTRL::DOCH_VERIFY_HOST_KEY*/ +typedef struct { + FLWord wVersion; + FLByte bReserved1[0x3E]; + FLByte bDochRandomChallangeByHostPrivateKey[DOCH_CHLNG_SIZE]; + FLByte bReserved2[0x180]; +} DOCH_VerifyHostKey; + +/******************************************************************************/ +/* + * Algorithm structures + */ +/******************************************************************************/ + +/*Supported algorithms retrieval structure*/ +/*----------------------------------------*/ +typedef struct { + FLWord wVersion; + FLByte bReserved1[0x2]; + FLDword wSymmetricAlgorithmsSupported; /*Bitmap: AES...*/ + FLDword wAsymmetricAlgorithmsSupported; /*Bitmap: RSA...*/ + FLDword wHashSchemesSupported; /*Bitmap: SHA-1...*/ + FLDword wRNGSchemesSupported; /*Bitmap: TrueRandom...*/ + FLDword wDecompressionSchemesSupported; /*Bitmap: LZ77...*/ + FLDword wCompressionSchemesSupported; /*Bitmap: LZ77...*/ + FLByte bReserved2[0x1E4]; +} DOCH_supportedAlgorithms; + +/*Specific algorithm capabilities retrieval structure and sub-structures*/ +/*----------------------------------------------------------------------*/ +typedef struct { + FLDword dwSize; + FLDword dwCalcTime; /*For the key, in nano*/ +} KeyAttr; + +typedef struct { + FLByte bName[8]; /*In ASCII*/ + FLWord wKeySizes; /*Bitmap of key sizes supported by this mode*/ + FLByte bReserved[0x6]; +} ModeAttr; + +typedef struct { + FLWord wVersion; + FLByte bReserved1[0x2]; + FLByte bAlgorithmName[0x10]; /*In ASCII*/ + FLWord wNumOfKeySizesSupported; + FLWord wNumOfModesSupported; + FLByte bReserved2[0x8]; + KeyAttr keysAttributes[0x8]; + ModeAttr modesAttributes[0x18]; +} DOCH_AlgorithmCapabilities; + +/*Enums for HASH control*/ +/*----------------------*/ +typedef enum { + DOCH_HASH_REINITIALIZE = 0x00, + DOCH_HASH_CONTINUE = 0x01, + DOCH_HASH_CONTINUE_ACCUM = 0x00, + DOCH_HASH_STOP_ACCUM = 0x01, + DOCH_HASH_DONT_RETURN_DATA = 0x00, + DOCH_HASH_RETURN_ACCUM_DIGEST = 0x02 +} DOCH_HashStartStream; + +typedef enum { + DOCH_HASH_DECRYPTION_KEY = 0x00, + DOCH_HASH_ENCRYPTION_KEY = 0x01, + + /*For Decryption*/ + DOCH_HASH_USE_DOCH_PUBLIC_KEY = 0x00, + DOCH_HASH_USE_HOST_PUBLIC_KEY = 0x01, + DOCH_HASH_USE_PARTITION_PUBLIC_KEY = 0x02, + + /*For Encryption*/ + DOCH_HASH_USE_DOCH_PRIVATE_KEY = 0x00, + DOCH_HASH_USE_HOST_PRIVATE_KEY = 0x01 +} DOCH_HashSetKey; + +#ifdef FL_SLPP +/*SLPP Specific*/ +/* should be replaced by the real values/structures once they are defined!!! */ + +#define DOCH_SLPP_MAX_LOCK_RANGES 16 + +typedef enum { + DOCH_SLPP_UNLOCKED_RANGE = 1, + DOCH_SLPP_PERM_LOCKED_RANGE = 2 +} DOCH_SLPPRangeType; + +typedef struct { + FLDword dwRangeStartSector; + FLDword dwRangeSizeInSectors; + FLDword lockType; +} DOCH_SLPPRange; + +typedef struct { + FLDword numOfActiveRanges; + DOCH_SLPPRange rangeParams[DOCH_SLPP_MAX_LOCK_RANGES]; + FLByte spare[0x200 - (DOCH_SLPP_MAX_LOCK_RANGES*sizeof(DOCH_SLPPRange)) - sizeof(FLDword)]; +} DOCH_SLPPReport; + +typedef struct { + FLDword dwRangeStartSector; + FLDword dwRangeSizeInSectors; + FLByte passkey[0x80]; + FLByte spare[0x178]; +} DOCH_SLPPRangeRequestSector; +#endif /*FL_SLPP*/ + +/********************/ +/* API Routines */ +/********************/ + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t D e f a u l t P a r t i t i o n */ +/* */ +/* Set default partition for Standard-ATA commands */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irCount : SET_DEFAULT_PARTITION_TEMP */ +/* SET_DEFAULT_PARTITION_PERM */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SET_DEFAULT_PARTITION */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetDefaultPartition(ioreq) bdCallDOCH(SDK_SET_DEFAULT_PARTITION, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t D a t a T r a n s f e r M o d e */ +/* */ +/* Set Data transfer mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : Requested data transfer mode: */ +/* DOCH_DATA_XFER_MODE_SINGLE */ +/* DOCH_DATA_XFER_MODE_MULT */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_DATA_XFER_MODE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetDataTransferMode(ioreq) bdCallDOCH(SDK_SET_DATA_XFER_MODE, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H I d e n t i f y D i s k O n C h i p D e v i c e */ +/* */ +/* Returns general information about the Device */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_IDENTIFY_FROM_FLASH */ +/* DOCH_IDENTIFY_EXISTANCE */ +/* irData : Address of DOCH_DeviceInfo struct */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_IDENTIFY_DISKONCHIP_DEVICE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHIdentifyDiskOnChipDevice(ioreq) bdCallDOCH(SDK_IDENTIFY_DISKONCHIP_DEVICE, ioreq) +#define DOCH_IDENTIFY_FROM_FLASH 0x0 +#define DOCH_IDENTIFY_EXISTANCE DRIVE_HEAD_OPT1 + + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t R e s e t S t a t u s */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_RESET_STATUS */ +/* */ +/* Returns: */ +/* irCount : 0 = No reset since last query */ +/* 1 = The device has been reset since last*/ +/* query */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHGetResetStatus(ioreq) bdCallDOCH(SDK_GET_RESET_STATUS, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H N o t i f y R e s e t */ +/* */ +/* Notify the Device on an upcoming reset initiated by the Host. */ +/* Host should NOT perform actual reset before this command completes */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_NOTIFY_RESET */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHNotifyReset(ioreq) bdCallDOCH(SDK_NOTIFY_RESET, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H N o t i f y P l a t f o r m R e s u m e d */ +/* */ +/* Notify the Device that there was a reset, */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_NOTIFY_PLATFORM_RESUMED */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHNotifyPlatformResumed(ioreq) bdCallDOCH(SDK_NOTIFY_PLATFORM_RESUMED, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H P a r t i t i o n I n f o */ +/* */ +/* Get information about a specific partition. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to read partition */ +/* information into. */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_GET_PARTITION_INFO */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHPartitionInfo(ioreq) bdCallDOCH(SDK_GET_PARTITION_INFO, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H D e l e t e P a r t i t i o n s */ +/* */ +/* Delete range of partitions */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irFlags : DOCH_NORMAL_OPERATION */ +/* DOCH_IMMEDIATE_OPERATION */ +/* irCount : First partition to delete */ +/* irLength : Last partition to delete */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_DELETE_PARTITIONS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHDeletePartitions(ioreq) bdCallDOCH(SDK_DELETE_PARTITIONS, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H U n f o r m a t */ +/* */ +/* Unformats DOCH device. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_DELETE_PARTITIONS */ +/* DOCH_SET_DISK_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHUnformatDevice(ioreq) bdCallDOCH(SDK_UNFORMAT_DEVICE, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H A d d P a r t i t i o n */ +/* */ +/* Adds a partition */ +/* The new partition is created on existing un-formatted disk capacity */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_ADD_PARTITION */ +/* */ +/* Returns: */ +/* irCount : Number of the created partition */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHAddPartition(ioreq) bdCallDOCH(SDK_ADD_PARTITION, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H W r i t e I P L */ +/* */ +/* Writes IPL partition. */ +/* Sets IPL mode and size. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irFlags : DOCH_IPL_MODE_NORMAL_RAM */ +/* DOCH_IPL_MODE_PAGED_RAM */ +/* DOCH_IPL_MODE_VIRTUAL_RAM */ +/* DOCH_IPL_MODE_CS_DELAY */ +/* DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT */ +/* DOCH_IPL_MODE_ACTIVE_SWAP_BYTES */ +/* DOCH_IPL_MODE_8KB_WINDOW */ +/* DOCH_IPL_WRITE_FIRST_CHUNK */ +/* irCount : Max IPL size */ +/* Up to 32KB for Normal Mode */ +/* Up to 128KB for Virtual Mode */ +/* Up to 256KB for Paged Mode */ +/* irLength : Current chunk length (in sectors) */ +/* irData : Pointer to user buffer (length defined by */ +/* irLength) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* DOCH_SET_CUSTOM_PARAM */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHWriteIPL(ioreq) bdCallDOCH(SDK_WRITE_IPL, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e a d I P L */ +/* */ +/* Read specified sectors from IPL partition. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : First sector to read */ +/* irLength : Number of sectors to read */ +/* irData : Pointer to user buffer (length defined by */ +/* irLength) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* DOCH_SET_CUSTOM_PARAM */ +/* */ +/* Returns: */ +/* irFlags : DOCH_IPL_MODE_NORMAL_RAM */ +/* DOCH_IPL_MODE_PAGED_RAM */ +/* DOCH_IPL_MODE_VIRTUAL_RAM */ +/* DOCH_IPL_MODE_CS_DELAY */ +/* DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT */ +/* DOCH_IPL_MODE_ACTIVE_SWAP_BYTES */ +/* DOCH_IPL_MODE_8KB_WINDOW */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHReadIPL(ioreq) bdCallDOCH(SDK_READ_IPL, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e a d P a r t i t i o n S e c t o r s */ +/* */ +/* Reads sectors by sector no from a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to read into */ +/* irSectorNo : First sector no. to read. */ +/* irSectorCount : Number of consecutive sectors to read */ +/* irFlags : DOCH_USE_DMA */ +/* DOCH_USE_BURST */ +/* Note: 4 methods of data transfer are */ +/* available: */ +/* Normal transfer */ +/* DMA transfer */ +/* Burst transfer */ +/* DMA & Burst transfer */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_READ_PARTITION */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors NOT read (in case of an */ +/* error - this number may not be accurate) */ +/*----------------------------------------------------------------------*/ +#define flDOCHReadPartitionSectors(ioreq) bdCallDOCH(SDK_READ_PARTITION_SECTORS, ioreq) + +/*----------------------------------------------------------------------*/ +/* D O C H W r i t e P a r t i t i o n S e c t o r s */ +/* */ +/* Writes sectors by sector no to a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* irFlags : DOCH_USE_DMA */ +/* DOCH_USE_BURST */ +/* Note: 4 methods of data transfer are */ +/* available: */ +/* Normal transfer */ +/* DMA transfer */ +/* Burst transfer */ +/* DMA & Burst transfer */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors NOT read (in case of an */ +/* error - this number may not be accurate) */ +/*----------------------------------------------------------------------*/ +#define flDOCHWritePartitionSectors(ioreq) bdCallDOCH(SDK_WRITE_PARTITION_SECTORS, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H W r i t e A n d L o c k */ +/* */ +/* Writes sectors by sector no to a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors NOT read (in case of an */ +/* error - this number may not be accurate) */ +/*----------------------------------------------------------------------*/ +#define flDOCHWriteAndLock(ioreq) bdCallDOCH(SDK_WRITE_AND_LOCK, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H F r e e S e c t o r s */ +/* */ +/* Marks absolute sectors by sector no. as free to be written */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irSectorNo : First sector no. to delete */ +/* irSectorCount : Number of consecutive sectors to delete */ +/* irFlags : DOCH_NORMAL_OPERATION */ +/* DOCH_IMMEDIATE_OPERATION */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ERASE_PARTITION_SECTORS */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually deleted */ +/*----------------------------------------------------------------------*/ +#define flDOCHFreeSectors(ioreq) bdCallDOCH(SDK_FREE_SECTORS, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H W i p e S e c t o r s */ +/* */ +/* Securely erase data in sectors */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irSectorCount : Number of sectors to transfer (1..2). */ +/* irData : 1..2 sectors with following layout: */ +/* - 1st 8bytes - reserved as zeroes */ +/* - (FLDWord) : First sector to delete */ +/* (FLDWord) : # of sectors to delete */ +/* - (FLDWord) : Second sector to delete */ +/* (FLDWord) : # of sectors to delete */ +/* - ... */ +/* - (FLDWord) : Nth sector to delete */ +/* (FLDWord) : # of sectors to delete */ +/* * Last transaction should have both start */ +/* and length fields set to 0. */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SECURE_ERASE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHWipeSectors(ioreq) bdCallDOCH(SDK_WIPE_SECTORS, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H P r e p a r e F o r W r i t e */ +/* */ +/* Signal to DOCH that these sectors are going to be over-written in */ +/* following write command */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_OPTIMIZE_PARTITION_SECTORS */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHPrepareForWrite(ioreq) bdCallDOCH(SDK_PREPARE_FOR_WRITE, ioreq) + +/* Flexi-Flash */ + +/*----------------------------------------------------------------------*/ +/* f l D O C H W r i t e F l e x i F a s t */ +/* */ +/* Flexi-Flash Write Fast */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_FLEXI */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually written */ +/*----------------------------------------------------------------------*/ +#define flDOCHWriteFlexiFast(ioreq) bdCallDOCH(SDK_WRITE_FLEXI_FAST, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H W r i t e F l e x i N o r m a l */ +/* */ +/* Flexi-Flash Write Normal */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_FLEXI */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually written */ +/*----------------------------------------------------------------------*/ +#define flDOCHWriteFlexiNormal(ioreq) bdCallDOCH(SDK_WRITE_FLEXI_NORMAL, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e W r i t e N o r m a l */ +/* */ +/* Flexi-Flash Re-Write Normal */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually re-written */ +/*----------------------------------------------------------------------*/ +#define flDOCHReWriteFlexiNormal(ioreq) bdCallDOCH(SDK_REWRITE_FLEXI_NORMAL, &ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H M a n a g e A t o m i c W r i t e S e q */ +/* */ +/* Manage atomic write sequence per partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irCount : DOCH_START_ATOMIC_WRITE */ +/* DOCH_FINISH_ATOMIC_WRITE */ +/* DOCH_ABORT_ATOMIC_WRITE */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_ATOMIC_WRITE_SEQUENCE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHManageAtomicWriteSeq(ioreq) bdCallDOCH(SDK_ATOMIC_WRITE_SEQ, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H A c c e s s P a r t W i t h P w d */ +/* */ +/* Insert the protection key in order to remove the protection of the */ +/* specified partition or the entire media */ +/* Partition could be authenticated both by user and master password */ +/* the last successful authentication supersedes the previous one. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* 0xF - for authenticating the entire device */ +/* irFlags : Authentication Type */ +/* : DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* irData : pointer to an DOCH_PartitionAcessPassword struct */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_EN_ACCESS_WPWD */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHAccessPartWithPwd(ioreq) bdCallDOCH(SDK_ACCESS_PART_WITH_PWD, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H D i s a b l e P a r t A c c e s s */ +/* */ +/* Remove the protection key making the partition protected again */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* 0xF - for disabling access to the entire*/ +/* media */ +/* irFlags : Authentication to withdraw */ +/* DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_DISABLE_ACCESS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHDisablePartAccess(ioreq) bdCallDOCH(SDK_DISABLE_PART_ACCESS, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e n d H o s t P u b l i c K e y */ +/* */ +/* Host sends its public key for this partition & random challenge */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* 0xF - for disabling access to the entire */ +/* media */ +/* irFlags : DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* irData : Pointer to DOCH_HostPublicKey structure */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_TX_HOST_PUBLICKEY */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSendHostPublicKey(ioreq) bdCallDOCH(SDK_PKI_HOST, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e c e i v e D o c h P u b l i c K e y */ +/* */ +/* DOCH sends its public key, host's random challenge encrypted by DOCH */ +/* private key, and DOCH's random challenge to host */ +/* */ +/* Parameters: */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* 0xF - for disabling access to the entire */ +/* media */ +/* irFlags : DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_RX_DOCH_PUBLICKEY */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHReceiveDochPublicKey(ioreq) bdCallDOCH(SDK_PKI_DOCH, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H V e r i f y H o s t K e y */ +/* */ +/* Host sends DOCH's random challenge encrypted by host's private key */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irCount : DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_VERIFY_HOST_KEY */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHVerifyHostKey(ioreq) bdCallDOCH(SDK_PKI_VERIFY_HOST_KEY, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t P a r i t i o n P r o t e c t i o n */ +/* */ +/* Set partition properties (attributes/passkey) . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Pointer to DOCH_PartitionProtectionAPI */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SET_PARTITION_PROTECTION */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetParitionProtection(ioreq) bdCallDOCH(SDK_SET_PART_PROTECTION, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t P a r i t i o n U s e r A t t r i b u t e s */ +/* */ +/* Set partition user attributes . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Pointer to DOCH_PartitionUserAttr */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SET_PARTITION_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetParitionUserAttributes(ioreq) bdCallDOCH(SDK_SET_PART_USER_ATTR, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t P a r i t i o n U s e r A t t r i b u t e s */ +/* */ +/* Get partition user attributes . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Pointer to DOCH_PartitionUserAttr */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_GET_PARTITION_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHGetParitionUserAttributes(ioreq) bdCallDOCH(SDK_GET_PART_USER_ATTR, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t D i s k U s e r A t t r i b u t e s */ +/* */ +/* Set disk user attributes . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to 1 sector of data */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SET_DISK_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetDiskUserAttributes(ioreq) bdCallDOCH(SDK_SET_DISK_USER_ATTR, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t D i s k U s e r A t t r i b u t e s */ +/* */ +/* Get disk user attributes . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to 1 sector of data */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_GET_DISK_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHGetDiskUserAttributes(ioreq) bdCallDOCH(SDK_GET_DISK_USER_ATTR, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t C o n f i g u r a t i o n D a t a */ +/* */ +/* Read the device configuration data. No authentication is required */ +/* for calling this command, but the fields containing keys in the */ +/* configuration data will be masked by ETFFS using zeros. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to 1..3 sector(s) of data. */ +/* irCount : Sector offset in the configuration data to start */ +/* reading from. */ +/* irLength : Number of sectors of configuration data to read. */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_CONFIGURATION_DATA */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHGetConfigurationData(ioreq) bdCallDOCH(SDK_GET_CONFIG_DATA, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t C o n f i g u r a t i o n D a t a */ +/* */ +/* Save the device configuration data. Calling this command will */ +/* succeed only if there are no partitions present on the media */ +/* (including partition 0). */ +/* You should use this command in the process of duplicating DiskOnChip */ +/* device to make sure all configuration data of the original device */ +/* have been duplicated to the new device. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to 1..3 sector(s) of data. */ +/* irCount : Sector offset in the configuration data to start */ +/* reading from. */ +/* irLength : Number of sectors of configuration data to read. */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_CONFIGURATION_DATA */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetConfigurationData(ioreq) bdCallDOCH(SDK_SET_CONFIG_DATA, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H O p t i m i z e M e d i a */ +/* */ +/* Performs garbage collection. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* */ +/* irCount : DOCH_OPTIMIZE_SINGLE_PARTITION */ +/* DOCH_OPTIMIZE_WHOLE_MEDIA */ +/* */ +/* irLength : DOCH_OPTIMIZE_BY_PREPARE_FOR_WRITE */ +/* based on information collected during previous */ +/* PREPARE FOR WRITE commands */ +/* DOCH_OPTIMIZE_DEFAULT */ +/* performs default optimization of the whole */ +/* partition or media */ +/* irFlags : DOCH_NORMAL_OPERATION */ +/* DOCH_IMMEDIATE_OPERATION */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_OPTIMIZE_MEDIA */ +/* */ +/* Returns: */ +/* irLength : Actual number of sectors available for writes */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHOptimizeMedia(ioreq) bdCallDOCH(SDK_OPTIMIZE_MEDIA, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t C u s t o m P a r a m e t e r */ +/* */ +/* Returns 16-bit custom DOCH parameter */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irCount : Parameter# (see DOCH_CustomParams) */ +/* irFlags : DOCH_CUSTOM_PARAM_DEFAULT - default value */ +/* DOCH_CUSTOM_PARAM_TEMP - current (saved) value*/ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_CUSTOM_PARAM */ +/* */ +/* Returns: */ +/* irSectorNo : Custom parameter value (16-Bit) */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHGetCustomParameter(ioreq) bdCallDOCH(SDK_GET_CUSTOM_PARAM, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t C u s t o m P a r a m e t e r */ +/* */ +/* Sets 16-bit custom DOCH parameter */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : Custom Parameter Number (DOCH_CustomParams) */ +/* irSectorNo : Custom Parameter Value (16-Bit) */ +/* irFlags : DOCH_CUSTOM_PARAM_DEFAULT - default value */ +/* DOCH_CUSTOM_PARAM_TEMP - current (saved) value*/ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_CUSTOM_PARAM */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetCustomParameter(ioreq) bdCallDOCH(SDK_SET_CUSTOM_PARAM, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H A u t o H a s h C o n t r o l */ +/* */ +/* Enable/Disable Auto Hash Read/Write */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : AUTO_HASH_ENABLE */ +/* AUTO_HASH_DISABLE */ +/* irLength : AUTO_HASH_READ */ +/* AUTO_HASH_WRITE */ +/* irFlags : DOCH_HASH_NO_ENCRYPTION */ +/* DOCH_HASH_ENCRYPT_BY_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_AUTO_HASH_CONTROL */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHAutoHashControl(ioreq) bdCallDOCH(SDK_AUTO_HASH_CTRL, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e a d C a l c u l a t e d H a s h */ +/* */ +/* Command for Paged partitions */ +/* Transfers to host digest(s) calculated from data on the flash. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_READ_CALCULATED_HASH */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHReadCalculatedHash(ioreq) bdCallDOCH(SDK_READ_CALC_HASH, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H W r i t e C a l c u l a t e d H a s h */ +/* */ +/* Command for Paged partitions */ +/* No data is transfered. Digest(s) calculated from data in the flash */ +/* are stored to the dedicated area on flash. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_NO_ENCRYPTION */ +/* DOCH_HASH_ENCRYPT_BY_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_CALCULATED_HASH */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHWriteCalculatedHash(ioreq) bdCallDOCH(SDK_WRITE_CALC_HASH, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e a d O r i g i n a l H a s h */ +/* */ +/* Command for Paged partitions */ +/* Transfers to host digest(s) stored previously on dedicated area on */ +/* flash */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_NO_ENCRYPTION */ +/* DOCH_HASH_ENCRYPT_BY_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_READ_ORIGINAL_HASH */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHReadOriginalHash(ioreq) bdCallDOCH(SDK_READ_ORIG_HASH, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H W r i t e G i v e n H a s h */ +/* */ +/* Command for Paged partitions */ +/* Transfers from host digest(s) and stores them to the dedicated area */ +/* on flash */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_NO_ENCRYPTION */ +/* DOCH_HASH_ENCRYPT_BY_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_GIVEN_HASH */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHWriteGivenHash(ioreq) bdCallDOCH(SDK_WRITE_GIVEN_HASH, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e p o r t S u p p o r t e d A l g o r i t h m s */ +/* */ +/* Report supported algorithms */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_REPORT_SUPPORTED_ALGORITHMS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHReportSupportedAlgorithms(ioreq) bdCallDOCH(SDK_REPORT_SUPP_ALG, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t A l g o r i t h m C a p a b i l i t i e s */ +/* */ +/* Get algorithms capabilities */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_ALGORITHM_CAPABILITIES */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHGetAlgorithmCapabilities(ioreq) bdCallDOCH(SDK_REPORT_ALG_CAPAB, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t A l g o r i t h m M o d e */ +/* */ +/* Set algorithms mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : bits 0..7 - Algorithm Category */ +/* bits 8..15 - Algorithm # in category */ +/* bits 16..24 - Mode index */ +/* bits 24..31 - Key size index */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_ALGORITHM_MODE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetAlgorithmMode(ioreq) bdCallDOCH(SDK_SET_ALG_MODE, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S t a r t H a s h S t r e a m C a l c u l a t i o n */ +/* */ +/* Restart/Continue hash stream calculation */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : bits 0..7 - Algorithm Category */ +/* bits 8..15 - Algorithm # in category */ +/* irLength : HASH_REINITIALIZE */ +/* HASH_CONTINUE */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_START_HASH_STREAM_CALC */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHStartHashStreamCalculation(ioreq) bdCallDOCH(SDK_START_HASH_STREAM_CALC, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e a d S t o p H a s h S t r e a m C a l c */ +/* */ +/* Read/Stop hash stream calculation */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_CONTINUE_ACCUM */ +/* DOCH_HASH_STOP_ACCUM */ +/* irLength : DOCH_HASH_DONT_RETURN_DATA */ +/* DOCH_HASH_RETURN_ACCUM_DIGEST */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_READ_STOP_HASH_STREAM_CALC */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHReadStopHashStreamCalc(ioreq) bdCallDOCH(SDK_READ_HASH_STREAM_CALC, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e t u r n R a n d om N u m b e r s */ +/* */ +/* Return random numbers */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : bits 0..7 - Algorithm Category */ +/* bits 8..15 - Algorithm # in category */ +/* irLength : # of 32-Bit random numbers to generate */ +/* (max is 64, e.g full sector) */ +/* irData : Pointer to 1 sector of data which will hold */ +/* the number of requested random numbers */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_RETURN_RANDOM_NUMBERS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHReturnRandomNumbers(ioreq) bdCallDOCH(SDK_RETURN_RAND_NUMS, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t H a s h K e y */ +/* */ +/* Set hash key */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_DECRYPTION_KEY */ +/* DOCH_HASH_ENCRYPTION_KEY */ +/* irLength : DOCH_HASH_USE_DOCH_PUBLIC_KEY */ +/* DOCH_HASH_USE_HOST_PUBLIC_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_KEYS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetHashKey(ioreq) bdCallDOCH(SDK_SET_HASH_KEY, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t P o w e r M o d e */ +/* */ +/* Retrieve device power mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_POWER_MODE */ +/* */ +/* Returns: */ +/* irFlags : */ +/* DOCH_PM_WORK_MODE */ +/* DOCH_PM_INACTIVE_MODE */ +/* irCount : */ +/* Bits 0..1 : Work Mode */ +/* DOCH_WM_NORMAL */ +/* DOCH_WM_LOW_FREQ */ +/* DOCH_WM_NORMAL_AND_AUTO_STBY */ +/* DOCH_WM_LOW_FREQ_AND_AUTO_STBY */ +/* Bits 4..5 : Inactive Mode */ +/* DOCH_IM_IDLE */ +/* DOCH_IM_DPD */ +/* DOCH_IM_IDLE_2_DPD */ +/* irLength : Value of timeout for automatic transfer to */ +/* Inactive mode (0 = disabled) */ +/* Timer value is in milliseconds. */ +/* If Inactive mode is "Standby to DPD" timer */ +/* resolution is 100 ms. */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHGetPowerMode(ioreq) bdCallDOCH(SDK_GET_POWER_MODE, ioreq) + +/*----------------------------------------------------------------------*/ +/* D O C H S e t P o w e r M o d e */ +/* */ +/* Set device power mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irFlags : */ +/* Bits 0..1 - which mode(s) should be set */ +/* DOCH_PM_SET_WORK_MODE */ +/* DOCH_PM_SET_INACTIVE_MODE */ +/* DOCH_PM_SET_BOTH_MODES */ +/* DOCH_PM_SET_NONE */ +/* Bit 2 - which mode device should pass to after set */ +/* DOCH_PM_WORK_MODE */ +/* DOCH_PM_INACTIVE_MODE */ +/* Bit 4 */ +/* DOCH_PM_SAVE_DEFAULT */ +/* (Save new settings as default settings ) */ +/* irCount : */ +/* Bits 0..1 : Work Mode to be set */ +/* DOCH_WM_NORMAL */ +/* DOCH_WM_LOW_FREQ */ +/* DOCH_WM_NORMAL_AND_AUTO_STBY */ +/* DOCH_WM_LOW_FREQ_AND_AUTO_STBY */ +/* Bits 4..5 : Inactive Mode to be set */ +/* DOCH_IM_IDLE */ +/* DOCH_IM_DPD */ +/* DOCH_IM_IDLE_2_DPD */ +/* irLength : Value of timeout for automatic transfer to */ +/* Inactive mode (0 = disabled) */ +/* Timer value is in milliseconds. */ +/* If Inactive mode is "Standby to DPD" timer */ +/* resolution is 100 ms. */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_POWER_MODE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSetPowerMode(ioreq) bdCallDOCH(SDK_SET_POWER_MODE, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H C o n f i g H W */ +/* */ +/* Control HW registers */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irFlags : HW Configuration type */ +/* (See DOCH_HwConfigType for values) */ +/* irLength : HW configuration type dependant */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHConfigHW(ioreq) bdCallDOCH(SDK_HW_CONFIG, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e c o v e r F r o m P o w e r L o s s */ +/* */ +/* Set last known values of DOCH control registers back to device after */ +/* power loss was detected. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHRecoverFromPowerLoss(ioreq) bdCallDOCH(SDK_RECOVER_FROM_POWER_LOSS, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t E n v V a r */ +/* */ +/* Set environment variable. */ +/* Available environment variables are listed in DOCH_EnVars. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based, if relevant) */ +/* irFlags : Environment variable */ +/* */ +/* irLength : Value to set */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#ifdef __cplusplus +extern "C" { +#endif +DOCH_Error flDOCHSetEnvVar(IOreq* ioreq); +#ifdef __cplusplus +} +#endif + +/*----------------------------------------------------------------------*/ +/* f l D O C H C l e a r I R Q */ +/* */ +/* Clear the ATA interrupt. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHClearIRQ(ioreq) bdCallDOCH(SDK_CLEAR_ATA_INTERRUPT, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t P h y s i c a l A d d r e s s */ +/* */ +/* Retrieve physical address of the socket. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* irCount : Socket Physical Address */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHGetPhysicalAddress(ioreq) bdCallDOCH(SDK_GET_PHYSICAL_ADDRESS, ioreq) + +#ifndef flFormatFS +/*----------------------------------------------------------------------*/ +/* f l F o r m a t F S */ +/* */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* bits 11-8 - Logical partition in Flash partition (zero based)*/ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irSectorNo : First absolute sector of logical partition */ +/* (if bit 13 is set) */ +/* irSectorCount : Number of sectors in logical partition */ +/* (if bit 13 is set) */ +/* irData : Address of the FATFormatParams structure */ +/* irFlags : */ +/* bit 14 - FL_DO_NOT_UPDATE_MBR */ +/* bit 13 - FL_MEDIA_WITHOUT_MBR */ +/* bit 12 - FL_MOUNT_ON_GIVEN_RANGE */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flFormatFS(ioreq) formatCall(FL_FORMAT_FS,ioreq) +#endif /*flFormatFS*/ + +#ifndef flCreateLogicalPartitions +/*----------------------------------------------------------------------*/ +/* */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irCount : Number of LogicalPartitionParams structures */ +/* irData : Address of array of LogicalPartitionParams structures */ +/* irFlags : 0 - reserved */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flCreateLogicalPartitions(ioreq) formatCall(FL_CREATE_LOGICAL_PARTITIONS,ioreq) +#endif /*flCreateLogicalPartitions*/ + +#ifndef flFindLogicalPartition +/*----------------------------------------------------------------------*/ +/* */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* bits 11-8 - Logical partition in Flash */ +/* partition (zero based) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irFlags : 0 - reserved */ +/* irData : Address of the LogPartitionInfo structure */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flFindLogicalPartition(ioreq) formatCall(FL_FIND_LOGICAL_PARTITION,ioreq) +#endif /* flFindLogicalPartition */ +#ifdef FL_SLPP +/*SLPP Specific*/ +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P U n l o c k R a n g e */ +/* */ +/* Unlock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Address of the DOCH_SLPPRangeRequestSector */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SLPP_UNLOCK_RANGE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSLPPUnlockRange(ioreq) bdCallDOCH(SDK_SLPP_UNLOCK_RANGE, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P L o c k R a n g e */ +/* */ +/* Lock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Address of the DOCH_SLPPRangeRequestSector */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SLPP_LOCK_RANGE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSLPPLockRange(ioreq) bdCallDOCH(SDK_SLPP_LOCK_RANGE, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P U n l o c k E n t i r e P a r t i t i o n */ +/* */ +/* Unlock an entire Sector Protected Partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SLPP_UNLOCK_ENTIRE_PARTITION */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSLPPUnlockEntirePartition(ioreq) bdCallDOCH(SDK_SLPP_UNLOCK_ENTIRE_PARTITION, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P S t i c k y L o c k R a n g e */ +/* */ +/* Applies sticky lock to a range of sectors on a sector protected */ +/* partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Address of the DOCH_SLPPRangeRequestSector */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SLPP_STICKY_LOCK_RANGE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSLPPStickyLockRange(ioreq) bdCallDOCH(SDK_SLPP_STICKY_LOCK_RANGE, ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P R e p o r t R a n g e s */ +/* */ +/* Reports unlocked and sticky locked ranges of sector protected */ +/* partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Address of the DOCH_SLPPReport */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SLPP_REPORT_LOCKED_RANGES */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDOCHSLPPReportRanges(ioreq) bdCallDOCH(SDK_SLPP_REPORT_LOCKED_RANGES, ioreq) +#endif /*FL_SLPP*/ + +#ifdef __cplusplus +extern "C" { +#endif +/*Pass-Thru routine*/ +DOCH_Error DOCHAtaPassThrough(FLSNative socketNum, + FLSNative passThruOP, + DOCH_Registers *in_regs, + DOCH_Registers *out_regs, + FLNative secNum, + void* userBuff, + FLBoolean useInterrupt); + + +DOCH_Error DOCHIdentifyDiskOnChipDeviceSingleFloor(IOreq* ioreq); + +/*Flags for format operation*/ +#define DOCH_LEAVE_PARTITIONS 0x8 + + +#ifdef __cplusplus +} +#endif + +#endif /*_DOCHAPI*/ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_docsys.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_docsys.h new file mode 100755 index 00000000..0d977adb --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_docsys.h @@ -0,0 +1,205 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/************************************************************************ * + * I M P O R T A N T * + * * + * The file contains DiskOnChip memory access routines and macros * + * defintions. * + * * + * In order to use the complete set of TrueFFS memory access routine * + * that allows runtime configuration of each socket access type make * + * sure the FL_NO_USE_FUNC is not defined in FLCUSTOM.H: * + * * + * If you know the exact configuration of your application you can * + * uncomment the FL_NO_USE_FUNC definition and set the proper access * + * type using the macroe defintion bellow. * + * * + ************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/bddoc/src/_docsys.h-arc $ + * + * Rev 1.4 Oct 22 2007 11:34:46 einat.avidan + * update copyrights header + * + * Rev 1.3 Feb 28 2007 09:53:20 einat.avidan + * No change + * + * Rev 1.2.1.1 Sep 11 2006 13:45:10 yaniv.iarovici + * Legal header added + * + * Rev 1.2.1.0 Aug 08 2006 15:55:34 Polina.Marimont + * DOC Driver 1.0 initial + */ + + +#ifndef _DOCSYS_H +#define _DOCSYS_H + +#include "defs.h" + +#ifdef FL_NO_USE_FUNC + +/*--------------------------------------------------------------------------*/ + +/* Default access layer for 16 bit configuration */ + +#ifndef flDirectWrite8BitReg +#ifdef FL_BIG_ENDIAN +#define flDirectWrite8BitReg(flash,offset,val) \ + FLWRITE_IO_WORD((((FLWord)val)<<8),((volatile FLWord FAR0 *)((flash)->win)+((offset)>>1))) +#else +#define flDirectWrite8BitReg(flash,offset,val) \ + FLWRITE_IO_WORD(((FLWord)val),((volatile FLWord FAR0 *)((flash)->win)+((offset)>>1))) +#endif /* FL_BIG_ENDIAN */ +#endif /* flDirectWrite8BitReg */ + +#ifndef flDirectWrite16BitReg +#define flDirectWrite16BitReg(flash,offset,val) \ + FLWRITE_IO_WORD(val,((volatile FLByte FAR0 *)((flash)->win)+(offset))) +#endif /* flDirectWrite16BitReg */ + +#ifndef flDirectRead8BitReg +#ifdef FL_BIG_ENDIAN +#define flDirectRead8BitReg(flash,offset) \ + (Reg8bitType)(((offset & 0x1) == 0) ? \ + ((FLREAD_IO_WORD((volatile FLWord FAR0 *)((flash)->win)+((offset)>>1))) >> 8) : \ + ((FLREAD_IO_WORD((volatile FLWord FAR0 *)((flash)->win)+((offset)>>1))) ) ) +#else +#define flDirectRead8BitReg(flash,offset) \ + (Reg8bitType)(((offset & 0x1) != 0) ? \ + ((FLREAD_IO_WORD((volatile FLWord FAR0 *)((flash)->win)+((offset)>>1))) >> 8) : \ + ((FLREAD_IO_WORD((volatile FLWord FAR0 *)((flash)->win)+((offset)>>1))) ) ) +#endif /* FL_BIG_ENDIAN */ +#endif /* flDirectRead8BitReg */ + +#ifndef flDirectRead16BitReg +#define flDirectRead16BitReg(flash,offset) \ + FLREAD_IO_WORD((flash)->win+(offset)) +#endif + +#ifndef flReadEvenNumberOfBytes +#define flReadEvenNumberOfBytes(flash,offset,dest,count) \ + TFFSCPY_FROM_IO_16_BITS( dest,((flash)->win + (offset)), count) +#endif + +#ifndef flWriteEvenNumberOfBytes +#define flWriteEvenNumberOfBytes(flash,offset,src,count) \ + TFFSCPY_TO_IO_16_BITS(((flash)->win + (offset)),src,count) +#endif + +#ifndef flRead512Bytes +#define flRead512Bytes(flash,offset,dest) flReadEvenNumberOfBytes(flash,offset,dest,512) +#endif + +#ifndef flWrite512Bytes +#define flWrite512Bytes(flash,offset,src) flWriteEvenNumberOfBytes(flash,offset,src,512) +#endif + +#ifndef flDocWindow +#define flDocWindow(flash) (0x2000) +#endif + +/*--------------------------------------------------------------------------*/ + +#else /* FL_NO_USE_FUNC */ + +/*--------------------------------------------------------------------------*/ + +/* Redirect to runtime access layer */ + +#ifndef flDirectWrite8BitReg +#define flDirectWrite8BitReg(flash,offset,val) (flash)->memWrite8bit((flash)->win,offset,val) +#endif + +#ifndef flDirectWrite16BitReg +#define flDirectWrite16BitReg(flash,offset,val) (flash)->memWrite16bit((flash)->win,offset,val) +#endif + +#ifndef flDirectRead8BitReg +#define flDirectRead8BitReg(flash,offset) (flash)->memRead8bit((flash)->win,offset) +#endif + +#ifndef flDirectRead16BitReg +#define flDirectRead16BitReg(flash,offset) (flash)->memRead16bit((flash)->win,offset) +#endif + +#ifndef flReadEvenNumberOfBytes +#define flReadEvenNumberOfBytes(flash,offset,dest,count) (flash)->memRead((flash)->win,offset,dest,count) +#endif + +#ifndef flWriteEvenNumberOfBytes +#define flWriteEvenNumberOfBytes(flash,offset,src,count) (flash)->memWrite((flash)->win,offset,src,count) +#endif + +#ifndef flRead512Bytes +#define flRead512Bytes(flash,offset,dest) flReadEvenNumberOfBytes(flash,offset,dest,512) +#endif + +#ifndef flWrite512Bytes +#define flWrite512Bytes(flash,offset,src) flWriteEvenNumberOfBytes(flash,offset,src,512) +#endif + +#ifndef flDocWindow +#define flDocWindow(flash) (flash->memWindowSize()) +#endif + +/*--------------------------------------------------------------------------*/ + +/* (private) types of DiskOnChip access configurations */ + +#define FL_8BIT_DOC_ACCESS 0x00000000L /* Has 8 data bits */ +#define FL_16BIT_DOC_ACCESS 0x00000100L /* Has 16 data bits */ +#define FL_XX_DATA_BITS_MASK 0x00000300L /* Mask of the above */ +#define FL_8BIT_FLASH_ACCESS 0x00000400L /* 8 bits of flash per cycle */ +#define FL_16BIT_FLASH_ACCESS 0x00000800L /* 16 bits of flash per cycle */ +#define FL_XX_FLASH_ACCESS_MASK 0x00000C00L /* Mask of the above */ + +#define FL_ACCESS_USER_DEFINED 0x00001000L /* User defined routines */ + +/* DiskOnChip routines prototypes */ + +extern FLStatus FAR1 setBusTypeOfFlash(FLFlash * flash,FLDword access); + +#endif /* FL_NO_USE_FUNC */ +#endif /* DOCSYS_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_fltl.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_fltl.h new file mode 100755 index 00000000..81a9602a --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_fltl.h @@ -0,0 +1,172 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/_fltl.h-arc $ + * + * Rev 1.9 Oct 22 2007 11:34:46 einat.avidan + * update copyrights header + * + * Rev 1.8 Feb 28 2007 10:49:44 einat.avidan + * removed unnecessary decleration + * + * Rev 1.7 Oct 09 2006 14:03:52 yaniv.iarovici + * Removed legacy devices related code and definitions + * + * Rev 1.6 Sep 11 2006 13:45:10 yaniv.iarovici + * Legal header added + * + * Rev 1.5 Aug 09 2006 16:52:46 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#ifndef _FLTL_H +#define _FLTL_H + +typedef struct { + SectorNo sectorsInVolume; + FLDword bootAreaSize; + FLDword eraseCycles; + FLDword tlUnitBits; +} TLInfo; + + +/* Defragment modes types */ +#define FL_FAST_SPACE 0 +#define FL_NORMAL_SPACE 1 + + + +typedef struct tTLrec TLrec; /* Defined by translation layer */ + + +struct tTL { + TLrec *rec; + FLByte partitionNo; + FLByte socketNo; + + /* information is necessary for hard-disk TL implementation */ + FLWord cylinders; + FLWord heads; + FLWord sectorsPerTrack; + /* they should not be concealed in TL->rec field: when the media is formatted + it would be best if geometry written in BPB would match actual disk geometry */ + + /* information necessary to support fast+normal geometry */ + FLDword fastAreaSectors; + FLWord fastArea_SectorsInUnit_Bits; + FLWord normalArea_SectorsInUnit_Bits; + FLWord riskZoneSectors; /* largest of fast and normal risk zones */ + FLWord recommendedSectorsInCluster; /* or just call it sectorsInPage (also largest) */ + /* there is no need to hide these vars via "recommendedClusterInfo" : + they are not used by TL itself. BTW, getTLinfo is not necessary for same reason */ + + void FAR1* progressCallback; + +#ifndef FL_NEW_MAPSECTOR + const void FAR0 *(*mapSector)(TLrec *, SectorNo sectorNo, CardAddress *physAddr); +#else + FLStatus (*mapSector)(TLrec *, SectorNo sectorNo, void * *retBuffer); +#endif + + FLStatus (*writeSector)(TLrec *, SectorNo sectorNo, void FAR1 *fromAddress); + + FLStatus (*writeMultiSector)(TLrec *, SectorNo sectorNo, void FAR1 *fromAddress,SectorNo sectorCount); + FLStatus (*readSectors)(TLrec *, SectorNo sectorNo, void FAR1 *dest,SectorNo sectorCount); + + FLStatus (*deleteSector)(TLrec *, SectorNo sectorNo, SectorNo noOfSectors); + FLStatus (*tlSetBusy)(TLrec *, FLBoolean); + void (*dismount)(TLrec *); + FLStatus (*defragment)(TLrec *, FLSDword FAR2 *sectorsNeeded, FLDword normalSpace); + FLStatus (*checkVolume)(TLrec *); + SectorNo (*sectorsInVolume)(TLrec *); + FLStatus (*getTLInfo)(TLrec *, TLInfo *tlInfo); + void (*recommendedClusterInfo)(TLrec *, FLDword *sectorsPerCluster, FLDword *clusterAlignment); + + FLStatus (*readBBT)(TLrec *, CardAddress FAR1 * buf, FLSDword FAR2 * mediaSize, unsigned FAR2 * noOfBB); + + FLStatus (*notifyChange)(TLrec *, void FAR1 * reserved, FLEnvVars variableType , FLDword value); + FLStatus (*completeOperation)(TLrec *); + + FLDword (* getLastMappedSectorAddress)(TLrec *); /* use after mapSector */ + FLStatus (* ensureFreeSectorsInUnit)(TLrec *, FLWord wVirtualUnit, FLWord * wFreeSectorsRequired); + FLStatus (*secureDeleteSector)(TLrec *, SectorNo sectorNo, SectorNo noOfSectors, FLBoolean secureOperation); +}; + + + +/* The address of this, if returned from map, denotes a data error */ +#ifndef FL_NEW_MAPSECTOR +/* extern FLStatus dataErrorObject; +#define dataErrorToken ((void FAR0 *) &dataErrorObject) */ + +#define dataErrorToken ((void FAR0 *) 0xFFFFFFFF) +/* temporary - should not be necessary with new mapSector +old method (address of dataErrorObject) is not translatable across BD-FS split +or translatable with added code/complexity */ +#endif /* FL_NEW_MAPSECTOR */ + +#ifdef FLFLASH_H +/* Translation layer registration information */ + +extern int noOfTLs; /* No. of translation layers actually registered */ + +typedef struct { + FLStatus (*mountRoutine) (unsigned volNo, TL *tl, FLFlash *flash, FLFlash **volForCallback); + FLStatus (*formatRoutine) (unsigned volNo, TLFormatParams *deviceFormatParams, FLFlash *flash); + FLStatus (*preMountRoutine)(FLFunctionNo callType, IOreq FAR2* ioreq ,FLFlash* flash,FLStatus* status); +} TLentry; + +extern FLStatus noFormat (unsigned volNo, TLFormatParams *formatParams, FLFlash *flash); +extern FLStatus flMount(unsigned volNo, unsigned socketNo,TL *, FLBoolean useFilters , FLFlash *flash); +extern FLStatus flPreMount(FLFunctionNo callType, IOreq FAR2* ioreq , FLFlash *flash); +extern unsigned noOfDrives; + +#ifdef FL_FORMAT_VOLUME +extern FLStatus flFormat(unsigned volNo, TLFormatParams *formatParams, FLFlash * flash); +#endif /* FL_FORMAT_VOLUME */ + +#endif /* FLFLASH_H */ + +#endif /* FLTL_H */ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_tffsioct.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_tffsioct.h new file mode 100755 index 00000000..628ee5ad --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/_tffsioct.h @@ -0,0 +1,79 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + +#ifndef __TFFSIOCT_H +#define __TFFSIOCT_H + + +typedef struct +{ + unsigned long command; + unsigned long data; +}flInputLnxRecord; + + +typedef struct +{ + unsigned long status; + unsigned long data; +} flOutputLnxRecord; + + +/* replicas of structures in doch_api.h */ + +typedef struct { unsigned char bFeaturesError; + unsigned char bSectorCount; + unsigned char bSectorNumber; + unsigned char bCylLow; + unsigned char bCylHigh; + unsigned char bDriveHead; + unsigned char bCommandStatus; + unsigned char bContorlAltStatus; + } flDochRegisters; + +typedef struct { int socketNum; + int passThruOP; + flDochRegisters in_regs; + flDochRegisters out_regs; + unsigned int secNum; + void *userBuff; + unsigned long userBuffSize; + int status; + } flAtaPassthrough; + + +#endif /* __TFFSIOCT_H */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/bddefs.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/bddefs.h new file mode 100755 index 00000000..59ba4bd6 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/bddefs.h @@ -0,0 +1,108 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/bddoc/src/bddefs.h-arc $ + * + * Rev 1.7 Oct 22 2007 11:34:46 einat.avidan + * update copyrights header + * + * Rev 1.6 Feb 28 2007 09:58:42 einat.avidan + * No change + * + * Rev 1.5.1.2 Sep 11 2006 13:45:10 yaniv.iarovici + * Legal header added + * + * Rev 1.5.1.1 Aug 22 2006 13:22:06 Yaniv.Iarovici + * Add 'extern "c"' on vols[] external definition + * + * Rev 1.5.1.0 Aug 08 2006 15:55:34 Polina.Marimont + * DOC Driver 1.0 initial + */ + +#ifndef BDDEFS_H +#define BDDEFS_H + +#include "defs.h" +#include "fltl.h" +#include "flbuffer.h" +#include "docsys.h" + + +typedef struct { + FLSByte flags; /* See description in flreq.h */ + + FLDword sectorsInVolume; + unsigned mountCount; /* can be opened/closed several times */ + + FLMutex* volExecInProgress; + FLFlash FAR2* flash; /* flash structure for low level operations */ + TL tl; /* Translation layer methods */ + FLSocket *socket; /* Pointer to socket */ + + FLBoolean globalAttFlag; /* indication of global attention flag */ +} Volume; + +#define VOLUME_NOT_OCCUPIED 0 +#define VOLUME_LOW_LVL_MOUNTED 1 /* Volume is mounted for low level operations */ +#define VOLUME_MOUNTED 2 /* Volume is mounted */ +#define VOLUME_12BIT_FAT 4 /* Volume uses 12-bit FAT */ +#define VOLUME_ABS_MOUNTED 8 /* Volume is mounted for abs calls */ +#define VOLUME_OCCUPIED 32 /* Volume record in use */ +#define VOLUME_MOUNTED_NO_MBR 64 +#define VOLUME_MOUNTED_ON_RANGE 128 + + +#define execInProgress (pVol->volExecInProgress) + +#ifdef __cplusplus +extern "C" { +#endif +extern Volume vols[FL_VOLUMES]; +#ifdef __cplusplus +} +#endif + +FLStatus lockForIO(FLByte socket, FLByte partition, FLBoolean onOff); +void setTL(FLByte socket, FLByte partition, TL * fsVol); + +#endif diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/bdkemul.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/bdkemul.h new file mode 100755 index 00000000..224b31d0 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/bdkemul.h @@ -0,0 +1,135 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/bdkemul.h-arc $ + * + * Rev 1.15 Dec 11 2007 12:25:10 einat.avidan + * Add format start and format complete signatures in disk user attributes + * + * Rev 1.14 Oct 22 2007 11:34:48 einat.avidan + * update copyrights header + * + * Rev 1.13 Sep 11 2006 13:45:10 yaniv.iarovici + * Legal header added + * + * Rev 1.12 Aug 09 2006 17:34:14 Polina.Marimont + * initial for DOC Driver 1.0 + * + * Rev 1.11 May 28 2006 12:48:42 polina.marimont + * comments + * + * Rev 1.10 May 17 2006 12:51:04 polina.marimont + * 1. DOCH_DiskUserAttrWithBinary - changed to support floors + * 2. DOCH macros use instead of numerical constants + * + * Rev 1.9 Mar 22 2006 17:35:46 DoronC + * Bug fix - add signature to disk attributes in order to use only + * format made by TrueFFS 7.1 and not by host SDK. + * Other format will force reformating of the media. + * + * Rev 1.8 Feb 16 2006 11:32:36 DoronC + * Store binary partition flags in the attributes and return then + * when requested by extendedInfo for compatability with legacy + * devices. + * + * Rev 1.7 Feb 14 2006 10:50:04 DoronC + * Remove large variables from stack. use one global buffer for + * all large buffers needs. + */ +#ifndef BDKEMUL_H +#define BDKEMUL_H + +#include "part_inf.h" + +/*Unit size*/ +#define BDK_SECTORS_IN_UNIT 0x200 +#define BDK_UNIT_SIZE (BDK_SECTORS_IN_UNIT< Erasable Block Size + * flWriteFault - fail in buffer writing + * flNoSpaceInVolume - end of media was prematurely reached + *-------------------------------------------------------------------*/ +#define bdkWriteBlock(ioreq) bdCall(FL_BINARY_WRITE_BLOCK,ioreq) + + +/*------------------------------------------------------------------- + * bdkErase - erase given number of blockdsin the BDK area. + * + * Erase given number of blockds in the binary sub partition. + * + * Parameters: ioreq + * 'irHandle' - Drive number (0, 1, ...) + * bits 7-4 - Partition # (zero based) + * bits 3-0 - Socket # (zero based) + * 'irData' - bdkParams record + * startingBlock - unit number of the sub-partition to start erasing from + * length - number of blocks to erase + * oldSign - signature of the sub-partition + * + * Return: flOK - success + * flBadLength - buffer length > Erasable Block Size + * flWriteFault - fail in buffer writing + * flNoSpaceInVolume - end of media was prematurely reached + *-------------------------------------------------------------------*/ +#define bdkErase(ioreq) bdCall(FL_BINARY_ERASE,ioreq) + + + +/*------------------------------------------------------------------- + * bdkCreate - create new BDK partition . + * + * Init create operations on the DiskOnChip starting at 'startUnit', with + * a # of 'units' and 'signature'. + * + * Note : Blocks in the DiskOnChip are marked with a 4-character signature + * followed by a 4-digit hexadecimal number. + * + * Parameters: ioreq + * 'irHandle' - Drive number (0, 1, ...) + * bits 7-4 - Partition # (zero based) + * bits 3-0 - Socket # (zero based) + * 'irData' - bdkParams record + * length - number of blocks to create + * oldSign - signature of the sub-partition + * newSign - the replacing signature + * + * Return: flOK - success + * flBadLength - buffer length > Erasable Block Size + * flWriteFault - fail in buffer writing + * flNoSpaceInVolume - end of media was prematurely reached + *-------------------------------------------------------------------*/ +#define bdkCreate(ioreq) bdCall(FL_BINARY_CREATE,ioreq) + +/*----------------------------------------------------------------------*/ +/* b d k P a r t i t i o n I n f o */ +/* */ +/* Parameters: */ +/* irHandle : volume number */ +/* irData : pointer to structure that hold socket */ +/* parameters */ +/* irLength : Physical size of the binary volume */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed. */ +/*----------------------------------------------------------------------*/ +#define bdkPartitionInfo(ioreq) bdCall(FL_BINARY_PARTITION_INFO,ioreq) + + +/* DEEP_POWER_DOWN 1 defined in flflash.h */ + + +/*----------------------------------------------------------------------*/ +/* f l W r i t e I P L */ +/* */ +/* Place a user buffer to both copies of the IPL area */ +/* */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0,1,..) */ +/* 4 LSB - Socket number */ +/* irData : Pointer to user buffer */ +/* irLength : Size of the buffer */ +/* irFlags : See flags bellow */ +/* FL_IPL_MODE_NORMAL */ +/* FL_IPL_VIRTUAL_RAM_MODE */ +/* FL_DOC_IPL_PAGED_RAM_MODE */ +/* FL_IPL_128K_WINDOW_MODE */ +/* FL_IPL_SWAP_BYTES_MODE */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flWriteIPL(ioreq) bdCall(FL_WRITE_IPL,ioreq) + +/*----------------------------------------------------------------------*/ +/* r e a d I P L */ +/* */ +/* Read IPL to user buffer. */ +/* */ +/* Note : Read length must be a multiplication of 512 bytes */ +/* Note : Causes DiskOnChip Millennium Plus to download (i,e protection */ +/* key will be removed from all partitions. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0,1,..) */ +/* 4 LSB - Socket number */ +/* irData : Pointer to user buffer */ +/* irLength : Size of the buffer */ +/* irCount : Used IPL size on the media */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flReadIPL(ioreq) bdCall(FL_READ_IPL,ioreq) + + + + +/*----------------------------------------------------------------------*/ +/* f l I n i t */ +/* */ +/* Initializes the FLite system. */ +/* */ +/* Calling this function is optional. If it is not called, */ +/* initialization will be done automatically on the first FLite call. */ +/* This function is provided for those applications who want to */ +/* explicitly initialize the system and get an initialization status. */ +/* */ +/* Calling flInit after initialization was done has no effect. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ +TFFS_DLL_API FLStatus NAMING_CONVENTION flInit(void); +#ifdef __cplusplus +} +#endif /* __cplusplus */ + + +/*----------------------------------------------------------------------*/ +/* f l E x i t */ +/* */ +/* If the application ever exits, flExit should be called before exit. */ +/* flExit flushes all buffers, closes all open files, powers down the */ +/* sockets and removes the interval timer. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* Nothing */ +/*----------------------------------------------------------------------*/ +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ +TFFS_DLL_API void NAMING_CONVENTION flExit(void); +#ifdef __cplusplus +} +#endif /* __cplusplus */ + + +/*----------------------------------------------------------------------*/ +/* f l G e t P h y s i c a l I n f o */ +/* */ +/* Get physical information of the media. The information includes */ +/* JEDEC ID, unit size and media size. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0,1,..) */ +/* irData : Address of user buffer to read physical */ +/* information into. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irLength : Window base address. note mast be cast to */ +/* unsigned. */ +/*----------------------------------------------------------------------*/ +#define flGetPhysicalInfo(ioreq) bdCall(FL_GET_PHYSICAL_INFO, ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l E x t e n d e d G e t D i s k I n f o */ +/* */ +/* Returns general information about the Device and a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Must be set to 0 */ +/* bits 3-0 - Socket # (zero based) */ +/* irCount : Partition number */ +/* irFlags : Either FL_BDK_PARTITION or FL_DISK_PARTITION */ +/* irData : Address of FLExtendedDiskInfo structure */ +/* irLength : Floor number to access - FL_ALL_FLOORS */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flGetExtendedDiskInfo(ioreq) bdCall(FL_GET_EXTENDED_DISK_INFO,ioreq) + + + + + +/*----------------------------------------------------------------------*/ +/* f l I d e n t i f y P r o t e c t i o n */ +/* b d k I d e n t i f y P r o t e c t i o n */ +/* f l I p l I d e n t i f y P r o t e c t i o n */ +/* */ +/* Returns the specified partitions protection attributes */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irFlags CHANGEABLE_PROTECTION - changeable protection type */ +/* PROTECTABLE - partition can recieve protection */ +/* READ_PROTECTED - partition is read protected */ +/* WRITE_PROTECTED - partition is write protected */ +/* LOCK_ENABLED - HW lock signal is enabled */ +/* LOCK_ASSERTED - HW lock signal is asserted */ +/* KEY_INSERTED - key is inserted (not currently */ +/* protected. */ +/*----------------------------------------------------------------------*/ +#define flIdentifyProtection(ioreq) bdCall(FL_PROTECTION_GET_TYPE,ioreq) +#define bdkIdentifyProtection(ioreq) bdCall(FL_BINARY_PROTECTION_GET_TYPE,ioreq) +#define flIplIdentifyProtection(ioreq) bdCall(FL_IPL_PROTECTION_GET_TYPE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l I n s e r t P r o t e c t i o n K e y */ +/* b d k I n s e r t P r o t e c t i o n K e y */ +/* f l I p l I n s e r t P r o t e c t i o n K e y */ +/* */ +/* Insert the protection key in order to remove the protection of the */ +/* partititon specified by the drive handle */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : pointer to an 8 bytes key array */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flInsertProtectionKey(ioreq) bdCall(FL_PROTECTION_INSERT_KEY,ioreq) +#define bdkInsertProtectionKey(ioreq) bdCall(FL_BINARY_PROTECTION_INSERT_KEY,ioreq) +#define flIplInsertProtectionKey(ioreq) bdCall(FL_IPL_PROTECTION_INSERT_KEY,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l R e m o v e P r o t e c t i o n K e y */ +/* b d k R e m o v e P r o t e c t i o n K e y */ +/* f l I p l R e m o v e P r o t e c t i o n K e y */ +/* */ +/* Remove the protection key making the partition protected again */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flRemoveProtectionKey(ioreq) bdCall(FL_PROTECTION_REMOVE_KEY,ioreq) +#define bdkRemoveProtectionKey(ioreq) bdCall(FL_BINARY_PROTECTION_REMOVE_KEY,ioreq) +#define flIplRemoveProtectionKey(ioreq) bdCall(FL_IPL_PROTECTION_REMOVE_KEY,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l H a r d w a r e P r o t e c t i o n L o c k */ +/* b d k H a r d w a r e P r o t e c t i o n L o c k */ +/* */ +/* Enabled or disabled the affect of the hardware LOCK signal */ +/* The hardware lock signal disables the removal of protection through */ +/* the key therefore the partition will remain protected until the */ +/* hardware LOCK signal will be removed */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irFlags : LOCK_ENABLED locks the partition otherwise */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flHardwareProtectionLock(ioreq) bdCall(FL_PROTECTION_SET_LOCK,ioreq) +#define bdkHardwareProtectionLock(ioreq) bdCall(FL_BINARY_PROTECTION_CHANGE_LOCK,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l C h a n g e P r o t e c t i o n K e y */ +/* b d k C h a n g e P r o t e c t i o n K e y */ +/* f l I p l C h a n g e P r o t e c t i o n K e y */ +/* */ +/* Changes the current protection key with a new one. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to the new 8 bytes key array */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flChangeProtectionKey(ioreq) bdCall(FL_PROTECTION_CHANGE_KEY,ioreq) +#define bdkChangeProtectionKey(ioreq) bdCall(FL_BINARY_PROTECTION_CHANGE_KEY,ioreq) +#define flIplChangeProtectionKey(ioreq) bdCall(FL_IPL_PROTECTION_CHANGE_KEY,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l C h a n g e P r o t e c t i o n T y p e */ +/* b d k C h a n g e P r o t e c t i o n T y p e */ +/* f l I p l C h a n g e P r o t e c t i o n T y p e */ +/* */ +/* Changes the protection attributes of the partitions. */ +/* In order for a partition to change its protection type (without */ +/* reformating the media) it must have the CHANGEABLE_PRTOECTION */ +/* attribute. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flChangeProtectionType(ioreq) bdCall(FL_PROTECTION_CHANGE_TYPE,ioreq) +#define bdkChangeProtectionType(ioreq) bdCall(FL_BINARY_PROTECTION_SET_TYPE,ioreq) +#define flIplChangeProtectionType(ioreq) bdCall(FL_IPL_PROTECTION_CHANGE_TYPE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l A p p l y S t i c k y L o c k */ +/* */ +/* Enable the sticky lock mode to all relevant partitions */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Must be set to 0 */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flApplyStickyLock(ioreq) bdCall(FL_PROTECTION_STICKY_LOCK,ioreq) + +#ifdef FL_SLPP +/*SLPP Specific*/ +/*----------------------------------------------------------------------*/ +/* f l S L P P U n l o c k R a n g e */ +/* */ +/* Unlock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to unlock */ +/* irLength : Number of sectors to unlock */ +/* irData : Pointer to an 8 bytes passkey array */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flSLPPUnlockRange(ioreq) bdCall(FL_SLPP_UNLOCK_RANGE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l S L P P U n l o c k E n t i r e P a r t i t i o n */ +/* */ +/* Unlock all sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to an 8 bytes passkey array */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flSLPPUnlockEntirePartition(ioreq) bdCall(FL_SLPP_UNLOCK_ENTIRE_PARTITION,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l S L P P L o c k R a n g e */ +/* */ +/* Lock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to lock */ +/* irLength : Number of sectors to lock */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flSLPPLockRange(ioreq) bdCall(FL_SLPP_LOCK_RANGE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l S L P P S t i c k y L o c k R a n g e */ +/* */ +/* Sticky lock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to sticky lock */ +/* irLength : Number of sectors to sticky lock */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flSLPPStickyLockRange(ioreq) bdCall(FL_SLPP_STICKY_LOCK_RANGE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l S L P P R e p o r t L o c k e d R a n g e s */ +/* */ +/* Report currently defined unlocked/stick locked ranges on a sector */ +/* protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to DOCH_SLPPReport structure */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irCount : Number of currently defined ranges */ +/*----------------------------------------------------------------------*/ +#define flSLPPReportLockedRanges(ioreq) bdCall(FL_SLPP_REPORT_LOCKED_RANGES,ioreq) + +#endif /*FL_SLPP*/ + +/*----------------------------------------------------------------------*/ +/* f l O T P S i z e */ +/* */ +/* Get the OTP size and stated */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irLength : The size of the used OTP area in bytes */ +/* irCount : The size of the OTP ara in bytes */ +/* irFlags : LOCKED_OTP for a locked area otherwise unlocked */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flOTPSize(ioreq) bdCall(FL_OTP_SIZE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l O T P W r i t e A n d L o c k */ +/* */ +/* Write to the OTP area while locking it at the end. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to user buffer to write from */ +/* irLength : number of bytes to write */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flOTPWriteAndLock(ioreq) bdCall(FL_OTP_WRITE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l O T P R e a d */ +/* */ +/* Read from the OTP area */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to user buffer to read into */ +/* irLength : number of bytes to read */ +/* irCount : offset to read from (starting at the begining of */ +/* the OTP area */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flOTPRead(ioreq) bdCall(FL_OTP_READ,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l G e t U n i q u e I D */ +/* */ +/* Returns the 16 bytes device unique ID */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to a 16 bytes buffer to read into the */ +/* unique ID data */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irData : 16 bytes unique ID buffer */ +/*----------------------------------------------------------------------*/ +#define flGetUniqueID(ioreq) bdCall(FL_UNIQUE_ID,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l G e t C u s t o m e r I D */ +/* */ +/* Returns the 4 bytes customer ID */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to a 4 bytes buffer to read into the */ +/* customer ID */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irData : 4 bytes unique ID buffer */ +/*----------------------------------------------------------------------*/ +#define flGetCustomerID(ioreq) bdCall(FL_CUSTOMER_ID,ioreq) + + +/*----------------------------------------------------------------------*/ +/* f l D e e p P o w e r D o w n M o d e */ +/* */ +/* Forces the device into and out of the deep power down mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irFlags : DEEP_POWER_DOWN forces the low power consumption */ +/* mode. otherwise turning to the regular mode */ +/* */ +/* Returns: None */ +/*----------------------------------------------------------------------*/ +#define flDeepPowerDownMode(ioreq) bdCall(FL_DEEP_POWER_DOWN_MODE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l R e c o v e r F r o m P o w e r L o s s */ +/* */ +/* Recover from a power OFF without full TrueFFS initialization. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* */ +/* Returns: None */ +/*----------------------------------------------------------------------*/ +#define flRecoverFromPowerLoss(ioreq) bdCall(FL_RECOVER_FROM_POWER_LOSS,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l C l e a r Q u i c k M o u n t I n f o */ +/* */ +/* Clear all quick mount informtion. */ +/* */ +/* Must be called before calling mount volume routines. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* : Partition number ( 0,1,2... ) */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flClearQuickMountInfo(ioreq) bdCall(FL_CLEAR_QUICK_MOUNT_INFO,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l W r i t e Q u i c k M o u n t S t a t u s */ +/* */ +/* Get the status of the quick mount information. */ +/* */ +/* Can NOT be called before calling mount volume routines. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* : Partition number ( 0,1,2... ) */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flWriteQuickMountInfo(ioreq) bdCall(FL_WRITE_QUICK_MOUNT_INFO,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l G e t Q u i c k M o u n t S t a t u s */ +/* */ +/* Get the status of the quick mount information. */ +/* */ +/* Can be called before calling mount volume routines. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* : Partition number ( 0,1,2... ) */ +/* irFlags : return the quick mount info: */ +/* FL_ON if valid FL_OFF if not */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flGetQuickMountStatus(ioreq) bdCall(FL_GET_QUICK_MOUNT_STATUS,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l H w C o n f i g */ +/* */ +/* his routine enables to control DiskOnChip H/W features. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irFlags : Descrbing H/W configuration Type */ +/* irLength : New value to use - Different for each H/W */ +/* configuration type chosen. */ +/* */ +/* Returns: None */ +/*----------------------------------------------------------------------*/ +#define flHwConfig(ioreq) bdCall(FL_HW_CONFIG,ioreq) + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ +/*----------------------------------------------------------------------*/ +/* f l B u i l d G e o m e t r y */ +/* */ +/* Get C/H/S information of the disk according to number of sectors. */ +/* */ +/* Parameters: */ +/* capacity : Number of Sectors in Volume */ +/* cylinders : Pointer to Number of Cylinders */ +/* heads : Pointer to Number of Heads */ +/* sectors : Pointer to Number of Sectors per Track */ +/* oldFormat : True for one sector per culoster */ +/* wIrHandle : Disk partition handle to proccess */ +/* */ +/*----------------------------------------------------------------------*/ +TFFS_DLL_API void NAMING_CONVENTION flBuildGeometry(FLDword capacity, FLDword FAR2 *cylinders, + FLDword FAR2 *heads,FLDword FAR2 *sectors, FLBoolean oldFormat, FLWord wIrHandle); +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/*----------------------------------------------------------------------*/ +/* r e a d B B T */ +/* */ +/* Read Bad Blocks Table of device to user buffer */ +/* */ +/* Note: the buffer is not initialized by the function */ +/* */ +/* Parameters: */ +/* irData : User buffer. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irLength : returns the media size */ +/* irFlags : returns the actual number of badBlocks */ +/*----------------------------------------------------------------------*/ +#define flReadBBT(ioreq) bdCall(FL_READ_BBT,ioreq) + + + + +/*----------------------------------------------------------------------*/ +/* f l O T P S i z e */ +/* */ +/* Get the OTP size and stated */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irLength : The size of the used OTP area in bytes */ +/* irCount : The size of the OTP ara in bytes */ +/* irFlags : LOCKED_OTP for a locked area otherwise unlocked */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +#define flMCOTPSize(ioreq) bdCall(FL_MCOTP_SIZE,ioreq) +/* LOCKED_OTP 1 defined in flflash.h */ + +/*----------------------------------------------------------------------*/ +/* f l O T P R e a d */ +/* */ +/* Read from the OTP area */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to user buffer to read into */ +/* irLength : number of bytes to read */ +/* irCount : offset to read from (starting at the begining of */ +/* the OTP area */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +#define flMCOTPRead(ioreq) bdCall(FL_MCOTP_READ,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l O T P W r i t e A n d L o c k */ +/* */ +/* Write to the OTP area while locking it at the end. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to user buffer to write from */ +/* irLength : number of bytes to write */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +#define flMCOTPWriteAndLock(ioreq) bdCall(FL_MCOTP_WRITE,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l F o r m a t F S */ +/* */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* bits 11-8 - Logical partition in Flash partition (zero based)*/ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irSectorNo : First absolute sector of logical partition */ +/* (if bit 13 is set) */ +/* irSectorCount : Number of sectors in logical partition */ +/* (if bit 13 is set) */ +/* irData : Address of the FATFormatParams structure */ +/* irFlags : */ +/* bit 14 - FL_DO_NOT_UPDATE_MBR */ +/* bit 13 - FL_MEDIA_WITHOUT_MBR */ +/* bit 12 - FL_MOUNT_ON_GIVEN_RANGE */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flFormatFS(ioreq) formatCall(FL_FORMAT_FS,ioreq) + + +/*----------------------------------------------------------------------*/ +/* f o r m a t C a l l */ +/* */ +/* Common entry-point to all file-system format functions. Macros are */ +/* to call individual function, which are separately described below. */ +/* */ +/* Parameters: */ +/* function : file-system function code (listed below) */ +/* ioreq : IOreq structure */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ +TFFS_DLL_API FLStatus NAMING_CONVENTION formatCall(FLFunctionNo functionNo, IOreq FAR2 *ioreq); +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/*----------------------------------------------------------------------*/ +/* */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irCount : Number of LogicalPartitionParams structures */ +/* irData : Address of array of LogicalPartitionParams structures */ +/* irFlags : 0 - reserved */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flCreateLogicalPartitions(ioreq) formatCall(FL_CREATE_LOGICAL_PARTITIONS,ioreq) + +/*----------------------------------------------------------------------*/ +/* */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* bits 11-8 - Logical partition in Flash partition (zero based)*/ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irFlags : 0 - reserved */ +/* irData : Address of the LogPartitionInfo structure */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flFindLogicalPartition(ioreq) formatCall(FL_FIND_LOGICAL_PARTITION,ioreq) + +/*----------------------------------------------------------------------*/ +/* f l D o c h P a s s T h r o u g h */ +/* */ +/* Passes ATA command directly to the DOCH device. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to user buffer (for DATA IN and DATA out */ +/* commands) */ +/* irLength : number of sectors in buffer, pointed to by irData*/ +/* irCount : bits 0..1 - pass through operation flow, where */ +/* 0 - No Data(CTRL), 1 - Data IN, 2 - Data OUT */ +/* bit 2 - 1, when interrupt should be used, */ +/* 0 - otherwise */ +/* bits 4..7 - frame size exponent, should be set */ +/* to 0 for now - 1 sector */ +/* irPath : pointer to buffer from type DOCH_Registers* */ +/* IN - input registers, OUT - out registers */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +#define flDochPassThrough(ioreq) bdCall(FL_DOCH_PASS_THROUGH,ioreq) + +#endif /* BLOCKDEV_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/defs.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/defs.c new file mode 100755 index 00000000..1cdb671a --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/defs.c @@ -0,0 +1,341 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/DocDriver/TrueFFS BD/src/defs.c-arc $ + * + * Rev 1.8 Oct 22 2007 11:34:48 einat.avidan + * update copyrights header + * + * Rev 1.7 Oct 29 2006 11:27:26 Yaniv.Iarovici + * Removed unusable variable - 'readBackBuffer'. + * + * Rev 1.6 Oct 29 2006 10:59:40 Yaniv.Iarovici + * Removed unused variable - 'volBuffers'. + * + * Rev 1.5 Oct 09 2006 14:05:12 yaniv.iarovici + * Removed legacy devices related code and definitions + * + * Rev 1.4 Oct 05 2006 11:00:18 yaniv.iarovici + * Fixed compilation warnings. + * + * Rev 1.3 Sep 13 2006 10:43:00 yaniv.iarovici + * Fix compilation warnings + * + * Rev 1.2 Sep 11 2006 13:45:12 yaniv.iarovici + * Legal header added + * + * Rev 1.1 Aug 22 2006 13:22:20 Yaniv.Iarovici + * Remove decleration fo 'void flInitGlobalVars(void)' + * + * Rev 1.0 Aug 08 2006 15:47:24 Polina.Marimont + * Initial revision. + */ + + +#include "flcustom.h" +#include "flchkdef.h" +#include "flsystyp.h" +#include "blockdev.h" +#include "bddefs.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/*============================================================================*/ +/*==== from blockdev.c */ +/********************* Global variables Start **************************/ + +Volume vols[FL_VOLUMES]; +static FLBoolean initDone = FALSE; /* Initialization not done yet */ +static FLBoolean initGlobalVarsDone = FALSE; /* Initialization of environment */ + /* and access type variables not */ + /* done yet. */ +unsigned noOfDrives; +/* + * bus configuration + * DiskOnChip minimal bus width + */ +#ifndef FL_NO_USE_FUNC +FLDword flBusConfig[FL_SOCKETS]; +#endif /* FL_NO_USE_FUNC */ +/*----------------------------------------------------------------------*/ +/* f l I n i t */ +/* */ +/* Initializes the FLite system, sockets and timers. */ +/* */ +/* Calling this function is optional. If it is not called, */ +/* initialization will be done automatically . */ +/* This function is provided for those applications who want to */ +/* explicitly initialize the system and get an initialization status. */ +/* */ +/* Calling flInit after initialization was done has no effect. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +FLStatus _flInit(void) +{ + unsigned volNo; + Volume * pVol = vols; + + if (initDone) + return flOK; + + + flInitGlobalVars(); + +#ifdef FL_ENVIRONMENT_VARS + + /* Call users initialization routine + */ + flSetEnvVar(); + +#endif /* FL_ENVIRONMENT_VARS */ + + /* + * 1) Mark all the volumes as not used and free to be allocated. + * 2) Clear password in order to make it invalid. + */ + + tffsset(vols,0,sizeof(vols)); + + for (volNo = 0,pVol = vols; volNo < FL_VOLUMES; volNo++,pVol++) + { + /* The actual number of sockets is not yet known and will be retrieved by + * flRegisterComponents routine by the socket components. For now supply + * each of the possible sockets with its buffer and socket number. + */ + if ( volNo < FL_SOCKETS) + { + pVol->socket = flSocketOf(volNo); + pVol->flash = flFlashOf((FLByte)volNo); + tffsset(pVol->socket,0,sizeof(FLSocket)); + pVol->socket->volNo = volNo; + } + else + { + pVol->flash = NULL; + } + pVol->volExecInProgress = NULL; + } + + +#ifdef FL_BACKGROUND + flCreateBackground(); +#endif + noOfDrives = 0; + noOfSockets = 0; + return flOK; +}/*_flInit*/ + + +/*----------------------------------------------------------------------*/ +/* f l I n i t G l o b a l V a r s */ +/* */ +/* Initializes the FLite system, environment and access type variables. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* None */ +/*----------------------------------------------------------------------*/ + +void flInitGlobalVars(void) +{ + FLFlash * flash; + int i,j; + + if(initGlobalVarsDone == TRUE) + return; + + /* Do not initialize variables on next call */ + initGlobalVarsDone = TRUE; + initDone = FALSE; + + /* + * Set default values to per socket/volume variables + */ + + for(i=0; i< FL_SOCKETS; i++) + { + flash = flFlashOf((FLByte)i); + /* tffsset is not yet initialized */ + for(j=0;j<(int)sizeof(FLFlash);j++) + { + ((FLByte *)flash)[j] = 0; + } +#ifndef FL_NO_USE_FUNC + flBusConfig[i] = FL_DEFAULT_BUS_MODE(i); +#endif /* FL_NO_USE_FUNC */ + + } +}/*flInitGlobalVars*/ + +/*============================================================================*/ + +/*============================================================================*/ +/*==== from flflash.c */ +static FLFlash flashes[FL_SOCKETS]; + + +/************************************************************************/ +/************************************************************************/ +/*** ***/ +/*** E X P O R T E D R O U T I N E S ***/ +/*** ***/ +/************************************************************************/ +/************************************************************************/ + +/*----------------------------------------------------------------------*/ +/* f l F l a s h O f */ +/* */ +/* Gets the flash connected to a volume no. */ +/* */ +/* Parameters: */ +/* volNo : Volume no. for which to get flash */ +/* */ +/* Returns: */ +/* flash of volume no. */ +/*----------------------------------------------------------------------*/ +TFFS_DLL_API FLFlash * NAMING_CONVENTION flFlashOf(FLByte volNo) +{ + return &flashes[volNo]; +} + +/*============================================================================*/ +#ifdef __cplusplus +} +#endif + + + +/*============================================================================*/ +/*=== from bdstub.c */ +#include "dochstub.h" +/*----------------------------------------------------------------------*/ +/* Function name : lockForIO*/ +/* Description : */ +/* Return type : FLStatus */ +/* Argument : FLByte socket*/ +/* Argument : FLByte partition*/ +/* Argument : FLBoolean onOff*/ +/*----------------------------------------------------------------------*/ +FLStatus lockForIO(FLByte socket, FLByte partition, FLBoolean onOff) +{ + +#if (FS_SOCKETS < FL_SOCKETS) || (FS_MAX_TL_PARTITIONS < FL_MAX_TL_PARTITIONS) + /* then caller's check is not good enough */ + if ((socket >= FL_SOCKETS) || (partition >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; +#endif + + checkStatus(dochSetBusy(socket, onOff, partition)); /* take DOCH mutex */ + return flOK; +}/*lockForIO()*/ +/*============================================================================*/ + + +/*============================================================================*/ +/*=== from flsocket.c */ +FLByte noOfSockets; /* No. of drives actually registered */ + +static FLSocket sockets[FL_SOCKETS]; + + +/*----------------------------------------------------------------------*/ +/* f l S o c k e t O f */ +/* */ +/* Gets the socket connected to a volume no. */ +/* */ +/* Parameters: */ +/* volNo : Volume no. for which to get socket */ +/* */ +/* Returns: */ +/* socket of volume no. */ +/*----------------------------------------------------------------------*/ + +FLSocket *flSocketOf(unsigned volNo) +{ + return &sockets[volNo]; +} + +/*----------------------------------------------------------------------*/ +/* u d a t e S o c k e t P a r a m e t e r s */ +/* */ +/* Pass socket parameters to the socket interface layer. */ +/* This function should be called after the socket parameters (like */ +/* size and base) are known. If these parameters are known at */ +/* registration time then there is no need to use this function, and */ +/* the parameters can be passed to the registration routine. */ +/* The structure passed in irData is specific for each socket interface.*/ +/* */ +/* Note : When using DiskOnChip this routine returns the socekt */ +/* parameters instead of initializing them. */ +/* */ +/* Parameters: */ +/* vol : Pointer identifying drive */ +/* params : Record returning (or sending) the flsocket record */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success */ +/*----------------------------------------------------------------------*/ +FLStatus updateSocketParameters(FLSocket * pVol, void FAR1 *params) +{ + if (pVol->updateSocketParams) + pVol->updateSocketParams(pVol, params); + + return flOK; +} + +/*============================================================================*/ + +/*end of file*/ + + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/defs.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/defs.h new file mode 100755 index 00000000..6abfcbbc --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/defs.h @@ -0,0 +1,238 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/DocDriver/TrueFFS BD/src/defs.h-arc $ + * + * Rev 1.6 Oct 22 2007 11:34:48 einat.avidan + * update copyrights header + * + * Rev 1.5 Oct 11 2007 18:47:46 Einat.Avidan + * remove unused or duplicated definitions + * + * Rev 1.4 Jul 01 2007 13:47:28 einat.avidan + * bug fix: SCR 2964 compilation flag FL_VERIFY_WRITE should exclude \ include code for write verification + * + * Rev 1.3 Oct 09 2006 14:05:18 yaniv.iarovici + * Removed legacy devices related code and definitions + * + * Rev 1.2 Sep 11 2006 13:45:12 yaniv.iarovici + * Legal header added + * + * Rev 1.1 Aug 22 2006 13:22:40 Yaniv.Iarovici + * 1) Remove decleration fo 'void flInitGlobalVars(void)' + * 2) Add 'extern "c"' on: + * - flIdentifyFlash() external definition + * - flHandleConversionTable[] external definition + * - _flInit() definition + * + * Rev 1.0 Aug 08 2006 15:47:24 Polina.Marimont + * Initial revision. + */ + +#ifndef _DEFS_H +#define _DEFS_H + + +/*=============================================================*/ +/* from flsocket.h */ +#include "flbuffer.h" + +#define ATTRIBUTE_SPACE_MAPPED 0x8000 +#define UNDEFINED_MAPPING 0x7fff + + +typedef enum {PowerOff, PowerGoingOff, PowerOn} PowerState; + +extern FLByte noOfSockets; /* No. of drives actually registered */ + +typedef struct tSocket FLSocket; +/*=============================================================*/ + +/*=============================================================*/ +/* from _flsoc.h */ +struct tSocket { + unsigned volNo; /* Volume no. of socket */ + + PowerState DPDState; /* Actual DPD state */ + FLBoolean remapped; /* set to TRUE whenever the socket window is moved */ + + void (*powerOnCallback)(void *flash); /* Notification routine for Vcc on */ + void * flash; /* Flash object for callback */ + + struct { /* Window state */ + unsigned int baseAddress; /* Physical base as a 4K page */ + unsigned int currentPage; /* Our current window page mapping */ + void FAR0 * base; /* Pointer to window base */ + FLSDword size; /* Window size (must by power of 2) */ + unsigned speed; /* in nsec. */ + unsigned busWidth; /* 8 or 16 bits */ + } window; + FLBoolean (*cardDetected)(FLSocket * pVol); + void (*VccOn)(FLSocket * pVol); + void (*VccOff)(FLSocket * pVol); + FLStatus (*initSocket)(FLSocket * pVol); + void (*setWindow)(FLSocket * pVol); + void (*setMappingContext)(FLSocket * pVol, unsigned page); + FLBoolean (*getAndClearCardChangeIndicator)(FLSocket * pVol); + FLBoolean (*writeProtected)(FLSocket * pVol); + void (*updateSocketParams)(FLSocket * pVol, void FAR1 *params); +#ifdef FL_EXIT + void (*freeSocket)(FLSocket * pVol); +#endif +}; + + +/* See interface documentation of functions in socket.c */ + +extern FLStatus updateSocketParameters(FLSocket *, void FAR1 *); + + +extern FLSocket* flSocketOf(unsigned volNo); + + +/*=============================================================*/ + +/*=============================================================*/ +/* from flflash.h */ + +/* Some useful types for mapped Flash locations */ + +typedef volatile FLByte FAR0 * FlashPTR; +typedef volatile unsigned short int FAR0 * FlashWPTR; +typedef volatile FLDword FAR0 * FlashDPTR; +typedef FLWord FlashType; /* JEDEC id */ +typedef volatile FLByte FAR0* NDOC2window; + +typedef FLByte Reg8bitType; +typedef FLWord Reg16bitType; + + +/* Media types */ +#define H3_TYPE 15 + +/* protection specific defintions */ +#define PROTECTION_KEY_LENGTH 8 /* Size of protection key in bytes */ +#define DEFAULT_KEY "00000000" + + +/****************************/ +/* Special services API */ +/****************************/ + + +/* Flash array identification structure */ +typedef struct tFlash FLFlash; /* Forward definition */ + +/*=============================================================*/ + + +/*=============================================================*/ +/* from _flflash.h */ + +struct tFlash { + FLBoolean wasIdentified; + FlashType type; + FlashType subType; + FLByte mediaType; + FLDword busAccessType; + FLByte if_cfg; + FLByte bBusType; + FLWord flags; + void * mtdVars; + FLSocket * socket; + NDOC2window win; + void (*setPowerOnCallback)(FLFlash *); + FLStatus (*flashRead)(FLFlash *); + FLStatus (*setCallBack)(FLFlash *); + FLStatus (*dismount)(FLFlash *); + FLStatus (*prepareForPowerChanges) (FLFlash *,FLByte) ; + FLStatus (*clearCallBack)(FLFlash *); + FLStatus (*enterDeepPowerDownMode)(FLFlash *,FLWord state); + +#ifndef FL_NO_USE_FUNC + FLMemWindowSize FAR1* memWindowSize; /* Doc memory window size */ + FLMemRead FAR1* memRead; /* Doc memory read routine */ + FLMemWrite FAR1* memWrite; /* Doc memory write routine */ + FLMemSet FAR1* memSet; /* Doc memory set routine */ + FLMemRead8bit FAR1* memRead8bit; /* Doc memory 8 bit read routine */ + FLMemWrite8bit FAR1* memWrite8bit; /* Doc memory 8 bit write routine */ + FLMemRead16bit FAR1* memRead16bit; /* Doc memory 16 bit read routine */ + FLMemWrite16bit FAR1* memWrite16bit; /* Doc memory 16 bit write routine */ + FLMemSetGetMode FAR1* memSetGetMode; /* Interleave change event - */ + /* call back to plant new routines */ +#endif /* FL_NO_USE_FUNC */ +}; + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +extern TFFS_DLL_API FLFlash * NAMING_CONVENTION flFlashOf(FLByte volNo); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/*=============================================================*/ + + +/*=============================================================*/ +/*=== from nandefs.h */ + +/*=============================================================*/ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ +FLStatus _flInit(void); +void flInitGlobalVars(void); +#ifdef __cplusplus +} +#endif /* __cplusplus */ + + +#endif /*_DEFS_H*/ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docbdk.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docbdk.h new file mode 100755 index 00000000..9275d9a8 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docbdk.h @@ -0,0 +1,550 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/bddoc/src/docbdk.h-arc $ + * + * Rev 1.8 Oct 22 2007 11:34:48 einat.avidan + * update copyrights header + * + * Rev 1.7 Sep 11 2006 13:45:12 yaniv.iarovici + * Legal header added + * + * Rev 1.6 Aug 09 2006 16:52:46 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +/************************************************************************/ +/* Caution: The BDK_ACCESS compilation flag is for M-SYSTEMS internal */ +/* use ONLY. This flag is used by M-SYSTEMS drivers and */ +/* therfore it is SHOULD NOT be used by this package */ +/************************************************************************/ + +/***************************************************************************** +* File Header * +* ----------- * +* Name : docbdk.h * +* * +* Description : This file contains the binary partition defintions , data * +* structures and function prototypes. * +* * +* Note : The file exports 2 interfaces each under its own compilation flag: * +* * +* BDK package - Standalone package that exports routines for binary * +* partitions handling(MTD_STANDALONE compilation flag). * +* OSAK module - Separated module of the OSAK package that exports a * +* common entry point to the same routines. (BDK_ACCESS * +* compilation flag). * +* * +* Warning : Do not use this file with the BDK_ACCESS compilation flag unless * +* you own the full OSAK package. * +*****************************************************************************/ + +#ifndef DOCBDK_H +#define DOCBDK_H +/*---------------------------------------------------------------------*/ +/* Include the proper header files. */ +/*---------------------------------------------------------------------*/ + +#include "flcommon.h" + +#ifndef MTD_STANDALONE +#ifdef BDK_ACCESS +#include "flstruct.h" +#endif /* BDK_ACCESS */ +#endif /* MTD_STANDALONE */ + +/* Use the define bellow to set the size of the page buffer used by the BDK */ +#ifndef BDK_SECTORS_PER_PAGE +#define BDK_SECTORS_PER_PAGE (8L /* 2KB PAGE */) +#endif /* BDK_SECTORS_PER_PAGE */ + +#ifndef BDK_SECTORS_PER_WRITE +#define BDK_SECTORS_PER_WRITE (4L/*Planes*/*BDK_SECTORS_PER_PAGE/*Sectors per page*/*2/*MLC*/) +#endif /* BDK_SECTORS_PER_WRITE */ + + +/* BDK specific flag area */ +#define ERASE_BEFORE_WRITE 8 +#define BDK_SPARE_BLOCKS_SIGN "S4BB" /* Must be the same as BINARY_SPARE_BLOCKS_SIGN (FLFORMAT.H) */ + + +/*----------------------------------------------------------------------*/ +/* b d k F i n d D i s k O n C h i p */ +/* */ +/* Find and identify DiskOnChip device if installed in the system. The */ +/*search address are set by the flregisterDOCXXXSOC call in flcustom.c */ +/*file. */ +/* */ +/* */ +/* Parameters: */ +/* docAddress : Pointer to return value of DiskOnChip */ +/* address (if found). */ +/* docSize : Pointer to return value of DiskOnChip */ +/* address window size (if found). */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success (DiskOnChip found) */ +/* otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkFindDiskOnChip (CardAddress FAR2 *docAddress, + FLDword FAR2 *docSize ); +/*----------------------------------------------------------------------*/ +/* b d k I n i t */ +/* */ +/* Initialize the BDK SW package. This function is normaly called */ +/*automatically by the first call to the BDK package functions. */ +/* */ +/* Parameters: */ +/* None. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +void bdkInit( void ); + +#ifdef FL_EXIT +/*----------------------------------------------------------------------*/ +/* b d k E X i t */ +/* */ +/* Reset the BDK SW package. This function is normaly called as the last*/ +/*reference to the BDK package, providing clean exit and clearing all */ +/*allocated memory. */ +/* */ +/* Parameters: */ +/* None. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +void bdkExit (void); +#endif /* FL_EXIT */ + +/*----------------------------------------------------------------------*/ +/* b d k S e t B o o t P a r t i t i o n N o */ +/* */ +/* Set the current BDK partition in use. The default partition is */ +/*partition 0. For operation on other partitions, this routine should be*/ +/*called prior to actual command. The partition set is valid until the */ +/*next time this function is called. */ +/* */ +/* Parameters: */ +/* partitionNo : partition number to be access next. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkSetBootPartitionNo (FLByte partitionNo); + +/*----------------------------------------------------------------------*/ +/* b d k G e t B o o t P a r t i t i o n I n f o */ +/* */ +/* Get information regarding the actual size and used size of a binary */ +/*(sub) partition. */ +/* */ +/* Parameters: */ +/* startUnit : First block containing data (usually 0) */ +/* partitionSize : Pointer to output value of full */ +/* sub partition size. */ +/* realPartitionSize : Pointer to return value of used size. */ +/* unitSize : Pointer to return value of unit size. */ +/* signature : Signature of retrieved sub partition. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkGetBootPartitionInfo (FLWord startUnit, + FLDword FAR2 *partitionSize, + FLDword FAR2 *realPartitionSize, + FLDword FAR2 *unitSize, + FLByte FAR2 *signature); + +/*----------------------------------------------------------------------*/ +/* b d k C o p y B o o t A r e a */ +/* */ +/* Copy data from binary partition to RAM */ +/* */ +/* Parameters: */ +/* startAddressPtr : Pointer to start RAM address */ +/* wStartUnit : No' of first block in partition(usualy 0).*/ +/* dwAreaLen : Length of read area. */ +/* bCheckSumPtr : Pointer to output chksum calculation. */ +/* signPtr : Signature of retrieved sub partition. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkCopyBootArea (FLByte FAR1 *startAddressPtr, + FLWord wStartUnit, + FLDword dwAreaLen, + FLByte FAR2 *bCheckSumPtr, + FLByte FAR2 *signPtr); + +/*----------------------------------------------------------------------*/ +/* b d k C o p y B o o t A r e a I n i t */ +/* */ +/* Initialize read process from BDK area. This routine must be called */ +/*prior to any series of bdkCopyBootAreaBlock calls. The areaLen set by */ +/*this routine must be total len of all calls to following */ +/*bdkCopyBootAreaBlock calls. */ +/* */ +/* Parameters: */ +/* startUnit : first unit to read (must contain data). */ +/* areaLen : length of bdk are to be read. */ +/* signature : Signature of retrieved sub partition. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkCopyBootAreaInit (FLWord startUnit, + FLDword areaLen, + FLByte FAR2 *signature); + +/*----------------------------------------------------------------------*/ +/* b d k C o p y B o o t A r e a B l o c k */ +/* */ +/* read the next chunk of data from BDK area. This routine call must */ +/*follow a call to bdkCopyBootAreaInit and cannot be used without */ +/*proper init call. */ +/* */ +/* Parameters: */ +/* buf : Buffer where to read the data. */ +/* bufferLen : Length of current read buffer. */ +/* checkSum : Pointer for output ChkSum calculation of */ +/* read data. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkCopyBootAreaBlock (FLByte FAR1 *buf , + FLDword bufferLen, + FLByte FAR2 *checkSum); + +/*----------------------------------------------------------------------*/ +/* b d k U p d a t e B o o t A r e a I n i t */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkUpdateBootAreaInit (FLWord startUnit, + FLDword areaLen, + FLByte updateFlag, + FLByte FAR2 *signature ); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkUpdateBootAreaBlock (FLByte FAR1 *buf , + FLDword bufferLen ); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkGetProtectionType (FLWord * protectionType); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkInsertKey (FLByte FAR1* key); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkRemoveKey (void); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkStickyLock (void); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkLockEnable (FLByte enable); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkChangeKey (FLByte FAR1* key); +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkSetProtectionType (FLWord newType); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkCreateBootArea (FLWord noOfBlocks, + FLByte FAR2 * oldSign, + FLByte FAR2 * newSign); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkEraseBootArea (FLWord startUnit, + FLWord noOfBlocks, + FLByte FAR2 * signature); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkGetUniqueID(FLByte FAR1* buf); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkReadOtp(FLWord offset,FLByte FAR1 * buffer,FLWord length); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkWriteAndLockOtp(const FLByte FAR1 * buffer,FLWord length); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkGetOtpSize(FLDword FAR2* sectionSize, FLDword FAR2* usedSize, + FLWord FAR2* locked); + +/*----------------------------------------------------------------------*/ +/* x */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkWriteIPL (FLByte FAR1 * buf , FLDword bufLen , FLDword offset,FLDword flags); + +/*----------------------------------------------------------------------*/ +/* */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkCopyBootAreaFile ( FLSByte FAR2 *fname, + FLWord startUnit, + FLDword areaLen, + FLByte FAR2 *checkSum, + FLByte FAR2 *signature ); + +/*----------------------------------------------------------------------*/ +/* */ +/* */ +/* XXXX */ +/* XXXX */ +/* XXXX */ +/* */ +/* Parameters: */ +/* xx : xxxx */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success otherwise for failure */ +/*----------------------------------------------------------------------*/ +FLStatus bdkUpdateBootAreaFile(FLSByte FAR2 *fname, FLWord startUnit, + FLDword areaLen, FLByte FAR2 *signature); + +#endif /* DOCBDK_H */ + + + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docdrv.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docdrv.c new file mode 100755 index 00000000..8ccdc7f2 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docdrv.c @@ -0,0 +1,452 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/DocDriver/TrueFFS BD/src/docdrv.c-arc $ + * + * Rev 1.12 Oct 22 2007 11:34:48 einat.avidan + * update copyrights header + * + * Rev 1.11 Sep 04 2007 15:26:44 einat.avidan + * add printouts + * + * Rev 1.10 Jul 01 2007 13:47:28 einat.avidan + * bug fix: SCR 2964 compilation flag FL_VERIFY_WRITE should exclude \ include code for write verification + * + * Rev 1.9 Feb 28 2007 10:32:00 einat.avidan + * CX tools support + * + * Rev 1.8 Feb 15 2007 17:40:52 Einat.Avidan + * Add support in edge\level and polarity within FL_DMA_INIT compilation flag + * + * Rev 1.7 Nov 13 2006 15:13:48 Yaniv.Iarovici + * Added environment variable - 'FL_DISABLE_MEMCPY'. + * + * Rev 1.6 Oct 30 2006 15:50:16 yaniv.iarovici + * Add call to flDOCHIdentifyDiskOnChipDevice() after flInit() is completed + * for updating actual number of partitions. + * + * Rev 1.5 Sep 11 2006 13:45:14 yaniv.iarovici + * Legal header added + * + * Rev 1.4 Aug 22 2006 13:22:54 Yaniv.Iarovici + * Bug fix: 'FL_DMA_HW_ENABLED' was NOT treated as bit but as a value in flInit(). + * + * Rev 1.3 Aug 16 2006 08:43:26 Yaniv.Iarovici + * Add support for Environment Variable: 'FL_SET_TRANSFER_MODE' - Controls DRQ size + * + * Rev 1.2 Aug 10 2006 10:39:48 Polina.Marimont + * reinit fix + * + * Rev 1.1 Aug 10 2006 10:37:14 Polina.Marimont + * bug fix - avoid initializing twice + * + * Rev 1.0 Aug 08 2006 15:47:22 Polina.Marimont + * Initial revision. + */ +#include "flchkdef.h" +#include "flcommon.h" +#include "flstdcmp.h" +#include "blockdev.h" +#include "tffs_api.h" +#include "doch_api.h" +#include "doch_ata.h" +#include "bddefs.h" + + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +FLStatus bdSetBusy(Volume * pVol, FLBoolean state, FLByte partition); + +extern FLBoolean dochBdCallWasCalled; +#ifndef DOCH_USE_FUNC +FLFlash * DOCHFlash; +#endif /* DOCH_USE_FUNC */ + + +bdCallType bdCall = bdCallTFFSToDOCH; +static FLBoolean fDocDriverInitDone = FALSE; + + +extern FLBoolean flPreventMemcpy; + +#ifdef CX_ATA_SNIFFER + FILE * ataLogFile ; +#endif /*CX_ATA_SNIFFER*/ + +/***********************************************************************************/ +/* Function name : NAMING_CONVENTION flInit */ +/* Description : */ +/* Return type : TFFS_DLL_API FLStatus */ +/***********************************************************************************/ +TFFS_DLL_API FLStatus NAMING_CONVENTION flInit() +{ +#if (!defined(DOCH_USE_FUNC)) && (!defined (FL_NO_USE_FUNC)) + FLStatus flStatus; + FLDword dwBusConfig = flBusConfig[0]; +#endif /*!DOCH_USE_FUNC && !FL_NO_USE_FUNC*/ + DOCH_Error status_HDOC = DOCH_OK; + DOCH_DeviceInfo tempDOCDI; + IOreq ioreq; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, 0); + +#ifdef CX_ATA_SNIFFER + ataLogFile=fopen("atalog.bin","wb"); + if (! ataLogFile) + { + DBG_PRINT_FLOW(FLZONE_ABS, "\r\n*** Cannot Create atalog file in flInit() ***\r\n\n\n"); + return DOCH_ATA_ERROR_ABORT; + } +#endif /*CX_ATA_SNIFFER*/ + + if( fDocDriverInitDone == TRUE ) + return flOK; + + _flInit(); + + flSysfunInit(); + + DBG_PRINT_FLOW(FLZONE_ABS, "Searching for H3 device... \r\n"); + +#ifndef DOCH_USE_FUNC + /* Initialize DOCHFlash and redirect to regular MTD access layer */ + DOCHFlash = flFlashOf(0); +#ifndef FL_NO_USE_FUNC + dwBusConfig |= FL_16BIT_DOC_ACCESS ; + dwBusConfig |= FL_16BIT_FLASH_ACCESS ; + dwBusConfig |= FL_BUS_HAS_16BIT_ACCESS; + flStatus = setBusTypeOfFlash(DOCHFlash,dwBusConfig); + if(flStatus != flOK) + return flStatus; +#endif /* FL_NO_USE_FUNC */ +#endif /* DOCH_USE_FUNC */ + + status_HDOC = DochSDKInit(); + if(status_HDOC == DOCH_OK) /*DOCH Device*/ + { + DBG_PRINT_FLOW(FLZONE_ABS, "H3 Device found !!! \r\n\n"); + bdCall = bdCallTFFSToDOCH; +#ifdef FL_DMA_INIT + { + IOreq myIoreq; + FLDword ctrl; + FLByte bDmaInit = FL_DMA_INIT(0); + if( (bDmaInit & FL_DMA_HW_ENABLED) == FL_DMA_HW_ENABLED ) /*if DMA enabled by default -> set this to SA SDK*/ + { + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irFlags = DOCH_DMA_ENABLE; + myIoreq.irLength = TRUE; + status_HDOC = flDOCHConfigHW(&myIoreq); + if( status_HDOC!=DOCH_OK ) + { + DBG_PRINT_FLOW_PRM(FLZONE_ABS, (FLTXT("Fail to enable DMA with status %d \r\n"),status_HDOC)); + } + } + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irFlags = DOCH_DMA_CTRL; + ctrl = ((DOCH_DMA_PULSE_WIDTH)<<4) | DOCH_DMA_REQ_POL_LOW; + if (bDmaInit & FL_DMA_REQ_EDGE) + ctrl |= DOCH_DMA_REQ_EDGE; + if (bDmaInit & FL_NEGATED_0_ASSERTED_1) + ctrl &= ~DOCH_DMA_REQ_POL_LOW; + myIoreq.irLength = ctrl; + status_HDOC = flDOCHConfigHW(&myIoreq); + if( status_HDOC!=DOCH_OK ) + { + DBG_PRINT_FLOW_PRM(FLZONE_ABS, (FLTXT("Fail to set DMA control register with status %d \r\n"),status_HDOC)); + } + } +#endif /*FL_DMA_INIT*/ + + /* Update number of partitions*/ + tffsset(&ioreq, 0, sizeof(ioreq)); + ioreq.irData = &tempDOCDI; + status_HDOC = flDOCHIdentifyDiskOnChipDevice(&ioreq); + pdev->wTotalNumOfPartitions = tempDOCDI.wTotalNumOfPartitions; + + if( status_HDOC==DOCH_OK ) + fDocDriverInitDone = TRUE; + + return (status_HDOC==DOCH_OK)?flOK:((status_HDOC==DOCH_DiskNotFound)?flAdapterNotFound:flGeneralFailure); + } + + DBG_PRINT_ERR(FLZONE_ABS, "flInit(): failed to find mDoc! \r\n\n"); + DBG_PRINT_FLOW(FLZONE_ABS, "\r\n*** Exiting flInit() ***\r\n\n\n"); + + return flAdapterNotFound; +}/* flInit() */ + +#ifdef FL_EXIT + +/***********************************************************************************/ +/* Function name : NAMING_CONVENTION flExit*/ +/* Description : */ +/* Return type : TFFS_DLL_API void */ +/***********************************************************************************/ +TFFS_DLL_API void NAMING_CONVENTION flExit() +{ + tffsApiExit(); + dochBdCallWasCalled = FALSE; + fDocDriverInitDone = FALSE; +#ifdef CX_ATA_SNIFFER + fclose(ataLogFile); +#endif /*CX_ATA_SNIFFER*/ +}/*flExit()*/ +#endif /*FL_EXIT*/ + +#ifdef FL_ENVIRONMENT_VARS + +/***********************************************************************************/ +/* Function name : NAMING_CONVENTION flSetEnvVolume */ +/* Description : */ +/* Return type : TFFS_DLL_API FLStatus */ +/* Argument : FLEnvVars variableType */ +/* Argument : FLByte socket */ +/* Argument : FLByte volume */ +/* Argument : FLDword value */ +/* Argument : FLDword FAR2 *prevValue */ +/***********************************************************************************/ +TFFS_DLL_API FLStatus NAMING_CONVENTION flSetEnvVolume(FLEnvVars variableType, FLByte socket, FLByte volume, + FLDword value, FLDword FAR2 *prevValue) +{ + IOreq ioreq; + + ioreq.irHandle = socket + (volume << 4); + /*For utilities which uses env vars on legacy devices and not needed for H3*/ + if ((variableType == FL_DEBUG_MODES) || + (variableType == FL_SUSPEND_MODE) || + (variableType == FL_DIMAGE_CFG)) + return flOK; + + if(variableType == FL_SET_TRANSFER_MODE) + { + tffsset(&ioreq, 0, sizeof(ioreq)); + /*Fill ioreq structure according to flDOCHSetDataTransferMode API*/ + /*Single sector transfer mode*/ + if(value == 1) + { + ioreq.irCount = DOCH_DATA_XFER_MODE_SINGLE; + } + /*Multi-sector transfer mode*/ + else + { + ioreq.irCount = DOCH_DATA_XFER_MODE_MULT; + ioreq.irLength = value; + } + + /*Set requested Transfer Mode and Length*/ + if (flDOCHSetDataTransferMode(&ioreq) == DOCH_OK) + return flOK; + + /*If the operation failed*/ + return flFeatureNotSupported; + } + else if (variableType == FL_ENV_ATA_DEBUG) + ioreq.irFlags = DOCH_ENV_ATA_DEBUG; + else if(variableType == FL_DISABLE_MEMCPY) + flPreventMemcpy = value; + else + { + switch(variableType) + { +#ifdef FL_VERIFY_WRITE + case FL_VERIFY_WRITE_BDTL: + case FL_VERIFY_WRITE_BINARY: + case FL_VERIFY_WRITE_OTHER: + ioreq.irFlags = DOCH_ENV_VERIFY_WRITE; + break; +#endif /*FL_VERIFY_WRITE*/ +#if (!defined(FL_NO_USE_FUNC) || defined(FL_BD_AUTO_DPD_MODE)) + case FL_SET_AUTO_DPD_MODE: +#ifndef DOCH_AUTO_DPD_BY_HOST + case FL_SET_ACTIVE_DPD_MODE: + case FL_SET_INACTIVE_DPD_MODE: + case FL_SET_TIMEOUT_DPD: +#endif /*DOCH_AUTO_DPD_BY_HOST*/ + return tffsApiSetAutoDpd(variableType, (FLSDword)socket, value, prevValue); +#endif /*(!defined(FL_NO_USE_FUNC) || defined (FL_BD_AUTO_DPD_MODE))*/ + default: + ioreq.irFlags = 0; + }/*switch*/ + } + ioreq.irLength = value; + if (flDOCHSetEnvVar(&ioreq) == DOCH_OK) + return flOK; + return flFeatureNotSupported; +}/*flSetEnvVolume()*/ + + +/***********************************************************************************/ +/* Function name : NAMING_CONVENTION flSetEnvSocket*/ +/* Description : */ +/* Return type : TFFS_DLL_API FLStatus */ +/* Argument : FLEnvVars variableType*/ +/* Argument : FLByte socket*/ +/* Argument : LDword value*/ +/* Argument : FLDword FAR2 *prevValue*/ +/***********************************************************************************/ +TFFS_DLL_API FLStatus NAMING_CONVENTION flSetEnvSocket(FLEnvVars variableType, FLByte socket, + FLDword value, FLDword FAR2 *prevValue) +{ + return flSetEnvVolume(variableType, socket, 0, value, prevValue); +}/*flSetEnvSocket()*/ + + +/***********************************************************************************/ +/* Function name : NAMING_CONVENTION flSetEnvAll */ +/* Description : */ +/* Return type : TFFS_DLL_API FLStatus */ +/* Argument : FLEnvVars variableType */ +/* Argument : FLDword value */ +/* Argument : FLDword FAR2 *prevValue */ +/***********************************************************************************/ +TFFS_DLL_API FLStatus NAMING_CONVENTION flSetEnvAll( FLEnvVars variableType,FLDword value, + FLDword FAR2 *prevValue) +{ + return flSetEnvVolume(variableType, 0, 0, value, prevValue); +}/*flSetEnvAll*/ +#endif /*FL_ENVIRONMENT_VARS*/ + +#ifndef FL_NO_USE_FUNC + + +/***********************************************************************************/ +/* Function name : NAMING_CONVENTION flGetDocBusRoutine*/ +/* Description : */ +/* Return type : TFFS_DLL_API FLStatus */ +/* Argument : FLByte socket */ +/* Argument : FLAccessStruct FAR1 * structPtr */ +/***********************************************************************************/ +TFFS_DLL_API FLStatus NAMING_CONVENTION flGetDocBusRoutine(FLByte socket, FLAccessStruct FAR1 * structPtr) +{ + FLFlash* flash; + + /* Arg sanity check */ +#ifndef FL_SKIP_ARGS_CHECK + if (socket >= FL_SOCKETS) + { + DBG_PRINT_ERR(FLZONE_BLKDEV,"ERROR - Change FL_SOCKETS definition in flcustom.h to support that many sockets.\r\n"); + return flFeatureNotSupported; + } + if(structPtr == NULL) + { + DBG_PRINT_ERR(FLZONE_BLKDEV,"ERROR - structPtr argument is NULL.\r\n"); + return flBadParameter; + } +#endif /* FL_SKIP_ARGS_CHECK */ + + /* Make sure global variables are initialized to their default values */ + flInitGlobalVars(); + + flash = flFlashOf(socket); + + structPtr->memWindowSize = flash->memWindowSize; + structPtr->memRead = flash->memRead; + structPtr->memWrite = flash->memWrite; + structPtr->memSet = flash->memSet; + structPtr->memRead8bit = flash->memRead8bit; + structPtr->memRead16bit = flash->memRead16bit; + structPtr->memWrite8bit = flash->memWrite8bit; + structPtr->memWrite16bit = flash->memWrite16bit; + structPtr->memSetGetMode = flash->memSetGetMode; + structPtr->access = flBusConfig[socket]; + + return flOK; +}/*flGetDocBusRoutine()*/ + + +/***********************************************************************************/ +/* Function name : NAMING_CONVENTION flSetDocBusRoutine*/ +/* Description : */ +/* Return type : TFFS_DLL_API FLStatus */ +/* Argument : FLByte socket*/ +/* Argument : FLAccessStruct FAR1 * structPtr*/ +/***********************************************************************************/ +TFFS_DLL_API FLStatus NAMING_CONVENTION flSetDocBusRoutine(FLByte socket,FLAccessStruct FAR1 * structPtr) +{ + FLFlash* flash; + + /* Arg sanity check */ +#ifndef FL_SKIP_ARGS_CHECK + if (socket >= FL_SOCKETS) + { + DBG_PRINT_ERR(FLZONE_BLKDEV,"ERROR - Change FL_SOCKETS definition in flcustom.h to support that many sockets.\r\n"); + return flFeatureNotSupported; + } + if(structPtr == NULL) + { + DBG_PRINT_ERR(FLZONE_BLKDEV,"ERROR - structPtr argument is NULL.\r\n"); + return flBadParameter; + } +#endif /* FL_SKIP_ARGS_CHECK */ + + /* Make sure global variables are initialized to their default values */ + flInitGlobalVars(); + + flash = flFlashOf(socket); + + flash->memWindowSize = structPtr->memWindowSize; + flash->memRead = structPtr->memRead; + flash->memWrite = structPtr->memWrite; + flash->memSet = structPtr->memSet; + flash->memRead8bit = structPtr->memRead8bit; + flash->memRead16bit = structPtr->memRead16bit; + flash->memWrite8bit = structPtr->memWrite8bit; + flash->memWrite16bit = structPtr->memWrite16bit; + flash->memSetGetMode = structPtr->memSetGetMode; + flBusConfig[socket] = FL_ACCESS_USER_DEFINED; + return flOK; +}/*flSetDocBusRoutine*/ + +#endif /*FL_NO_USE_FUNC*/ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/* ----------------------------------------------------------------------------------- */ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch-firmware/Makefile b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch-firmware/Makefile new file mode 100755 index 00000000..86fbe11d --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch-firmware/Makefile @@ -0,0 +1,72 @@ +#================================================================================ +# +# Makefile for 'doch-firmware' (mDOC firmware upgrade) application. +# +#================================================================================ +# +# Copyright (C) 2006 msystems Ltd. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. Neither the name of msystems nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#=============================================================================== + + +# +# Specify path to usr/include as appropriate +# for your installation. +# +INCLUDE_DIR = /opt/ti/omap2420/rootfs-mvlcee31/usr/include + +# +# Specify compiler as appropriate for your installation. +# Default is ARM/GCC compiler. +# +CC = arm-unknown-linux-gnu-gcc + +# +# Specify compiler flags. +# +CFLAGS += -I$(INCLUDE_DIR) +CFLAGS += -I.. +CFLAGS += -Wall +# CFLAGS += -g + +# +# 'make all' rule +# +all : doch-firmware + +# +# make 'ioctl-example' demo application +# +doch-firmware : doch-firmware.c + $(CC) $(CFLAGS) -o $@ $< + +# +# 'make clean' rule +# +clean : + rm -f *.o doch-firmware + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch-firmware/doch-firmware.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch-firmware/doch-firmware.c new file mode 100755 index 00000000..06e41078 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch-firmware/doch-firmware.c @@ -0,0 +1,206 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2006, msystems Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of msystems nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/******************************************************************************/ + +/*********************************************************************************** + * * + * This utility program updates firmware in mDOC H3 devices. It takes two * + * parameters: name of mDOC's device file (for example /dev/tffsa), and name * + * of mDOC firmware file (for example, "image.enc-0050"). Here is an example: * + * * + * doch-firmware /dev/tffsa image.enc-0050 * + * * + ***********************************************************************************/ + + +/* + * $Log$ + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include "tffsioct.h" + + + + +#ifndef FL_SECTOR_SIZE +# define FL_SECTOR_SIZE 512 +#endif + + + +/* + * Calculate simple checksum on buffer 'buf' containing 'buf_size' bytes. + * We expect 'buf_size' to be multiple of 4. + */ +static +unsigned long chksum (unsigned long * buf, int buf_size) +{ + register unsigned long s = 0; + register int n; + + assert ((buf != NULL) && ((buf_size % sizeof(long)) == 0)); + + for (n = ((buf_size / sizeof(long)) - 1); n >= 0; n--) + s ^= buf[n]; + + return s; +} + + + + +/* + * Write firmware to DiskOnChip via IOCTL call to DiskOnChip driver. + * We expect 'buf_size' to be multiple of sector size. + */ +static +int write_firmware (int fd, void * buf, int buf_size) +{ + flIOctlRecord ioctl_record; + flInputLnxRecord in; + flOutputLnxRecord out; + flAtaPassthrough ata_passthrough; + int rc; + + assert (buf != NULL); + assert ((buf_size % FL_SECTOR_SIZE) == 0); /* must be multiple of sector size */ + assert ((buf_size / FL_SECTOR_SIZE) <= 256); /* max 256 sectors at once */ + + ioctl_record.inputRecord = ∈ + ioctl_record.outputRecord = &out; + + in.command = 5; /* ATA pass through command */ + in.data = (unsigned long) &ata_passthrough; + + out.data = (unsigned long) NULL; + + memset (&ata_passthrough, 0, sizeof(ata_passthrough)); + ata_passthrough.socketNum = 0; + ata_passthrough.userBuff = buf; + ata_passthrough.userBuffSize = buf_size; + ata_passthrough.secNum = (buf_size / FL_SECTOR_SIZE); + ata_passthrough.passThruOP = DOCH_PASSTHRU_DATA_OUT; + ata_passthrough.in_regs.bCommandStatus = DOCH_DOWNLOAD_MICROCODE; + ata_passthrough.in_regs.bFeaturesError = DOCH_DLMCODE_DOWNLOAD_AND_SAVE; + ata_passthrough.in_regs.bSectorCount = (unsigned char) (buf_size / FL_SECTOR_SIZE); + ata_passthrough.in_regs.bSectorNumber = (unsigned char)((buf_size / FL_SECTOR_SIZE) >> 8); + + rc = ioctl (fd, FL_IOCTL_LNX, &ioctl_record); + if ((rc != 0) || (ata_passthrough.status != 0)) + { + fprintf (stderr, "Error %d writing DiskOnChip firmware\n", (int)out.status); + rc = -1; + } + else + fprintf (stdout, "Success writing DiskOnChip firmware\n"); + + return rc; +} + + + + +/* + * Main + */ +int main ( int argc, char * argv[] ) +{ + int fd; + void * buf; + int buf_size; + int rc = -1; + + /* arg check */ + if ((argc != 3) || (argv[1] == NULL) || (strlen(argv[1]) == 0) || + (argv[2] == NULL) || (strlen(argv[2]) == 0)) + { + fprintf (stderr, "Usage: doch-firmware \n"); + fprintf (stderr, "Example: doch-firmware /dev/tffsa image.enc-0050\n"); + exit (-1); + } + + /* open firmware file */ + if((fd = open(argv[2], O_RDONLY)) == -1) + { perror ("Can't open firmware file"); exit (-1); } + + /* find out size of firmware file */ + if ((buf_size = lseek(fd, 0, SEEK_END)) == -1) + { perror ("Can't determine size of firmware file"); exit (-1); } + + /* set file pointer back to start of firmware file */ + if( lseek(fd, 0, SEEK_SET) != 0) + { perror ("Can't rewind firmware file"); exit (-1); } + + /* allocate buffer to hold firmware file's contents, and clear it */ + if ((buf = calloc(buf_size + FL_SECTOR_SIZE, sizeof(char))) == NULL) + { perror ("Can't allocate memory"); exit (-1); } + + /* read firmware file into the buffer */ + if( read(fd, buf, buf_size) != buf_size ) + { perror ("Can't read firmware file"); exit (-1); } + + /* close firmware file */ + close (fd); + + /* round up 'buf_size' to multiple of FL_SECTOR_SIZE */ + buf_size = (((buf_size - 1) / FL_SECTOR_SIZE) + 1) * FL_SECTOR_SIZE; + + if ((buf_size / FL_SECTOR_SIZE) > 256) + { perror ("Firmware file too large"); free (buf); exit (-1); } + + /* calculate checksum on the buffer */ + fprintf (stdout, "Firmware file checksum 0x%lx\n", chksum(buf, buf_size)); + + /* open device file */ + if((fd = open(argv[1], O_RDWR)) == -1) + { perror ("Can't open device"); free (buf); exit (-1); } + + /* issue IOCTL to device */ + rc = write_firmware (fd, buf, buf_size); + + /* close device file */ + close (fd); + + /* clear and free allocated buffer */ + memset (buf, 0, buf_size); + free (buf); + + fprintf (stdout, "Reset DiskOnChip to activate new firmware\n"); + + exit (rc); +} diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_api.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_api.c new file mode 100755 index 00000000..afedb796 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_api.c @@ -0,0 +1,9149 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/doch_api.c-arc $ + * + * Rev 1.82 Dec 26 2007 10:12:52 einat.avidan + * add flow printout for verify write + * dochATAReset() - update delay required + * doch_reset() does not include waiting before reset + * doch_reset() fixed bug (waiting for both floors to be ready after reset) + * + * Rev 1.81 Dec 16 2007 11:35:20 einat.avidan + * add debug printout + * + * Rev 1.80 Dec 11 2007 12:26:08 einat.avidan + * init sequence and DOCHConfigHW: change parameters of internal functions + * + * Rev 1.79 Dec 04 2007 17:54:20 einat.avidan + * Remove flDOCHWipeSectorsByWriting + * Change algorithm of DOCHWipeSectors and for AUTO_WIPE_SECTORS + * Bug fix: verify write on cascaded device. + * Bug fix: DochRecoverFromPowerLoss + * + * Rev 1.78 Oct 30 2007 16:13:54 einat.avidan + * add new function flDOCHWipeSectorsByWriting + * bug fix: DOCHDeletePartitions migth access second floor even + * if it does not exist. + * DOCHAddPartition: add support in fast area in cascaded configuration + * add new function DOCHWipeSectorsByWriting + * + * Rev 1.77 Oct 23 2007 15:32:10 einat.avidan + * fix compilation warnings + * + * Rev 1.76 Oct 23 2007 12:27:52 einat.avidan + * optimization: delay after setting head register only + * when switching floors + * + * Rev 1.75 Oct 22 2007 11:34:48 einat.avidan + * update copyrights header + * + * Rev 1.74 Oct 21 2007 10:27:32 Einat.Avidan + * bug fix: reported fast area on spanned partition + * set LBA bit on device head register + * fix compilation warnings + * + * Rev 1.73 Oct 11 2007 18:48:02 Einat.Avidan + * Replace global Boolean pattern with pattern in size of + * byte instead of dWord + * fix printouts + * add compilation flags for SOTP and SLPP + * support cascaded configuration: add delay after device switch + * Interrupts are enabeled\ disabeled in the ATA level instead of API level + * DOCHReadPartitionSectorsSingleFloor was added + * DOCHWritePartitionSectorsSingleFloor was added + * in every write to drive head register set LBA bit. + * + * Rev 1.72 Sep 04 2007 15:28:18 einat.avidan + * fix printouts + * avoid locking OTP when passed length (in sectors) is zero + * + * Rev 1.71 Jul 01 2007 13:47:28 einat.avidan + * bug fix: SCR 2964 compilation flag FL_VERIFY_WRITE should exclude \ include code for write verification + * + * Rev 1.70 Mar 22 2007 17:12:10 einat.avidan + * add SOTP + * + * Rev 1.69 Mar 13 2007 13:47:20 einat.avidan + * add support for SLPP + * + * Rev 1.68 Mar 11 2007 16:28:46 einat.avidan + * bug fix: update number of partitions when spanned partition that does not cover whole media was added + * bug fix: internal API flDOCHAtaReset may cause confusion in the XIP window identification. + * + * Rev 1.67 Feb 28 2007 10:32:28 einat.avidan + * bug fix: scr 2255 Compatibility on Big\Little Endian + * bug fix: during flInit device head register was changed to Slave, even if MAX_ATA_DEVICES is 1. + * may cause a bug during boot. + * bug fix: internal API flDOCHAtaReset may cause confusion in the XIP window identification. + * + * Rev 1.66 Feb 15 2007 17:42:06 Einat.Avidan + * add support for DOCH_USE_BURST_MODE_READ_ONLY_IN_DMA + * + * Rev 1.65 Dec 05 2006 14:59:28 Yaniv.Iarovici + * Fix bug in auto secure-wipe mechanism. + * + * Rev 1.64 Dec 03 2006 15:38:56 Yaniv.Iarovici + * Fixed compilation warning + * + * Rev 1.63 Dec 03 2006 13:31:24 Yaniv.Iarovici + * Encapsulate auto wipe-sector operation for Dev1 under '#ifndef DOCH_NO_AUTO_WIPE_SECTORS_DEV1' + * + * Rev 1.62 Nov 30 2006 10:23:36 Yaniv.Iarovici + * 1. Fixed compilation warnings. + * 2. Added SDK level secure-wipe power-failure immunity. + * 3. Fixed flDOCHAtaReset in case of cascaded configuration. + * + * Rev 1.61 Nov 21 2006 14:26:14 Yaniv.Iarovici + * 1. Fixed IRQ handling in case of cascaded configuration. + * 2. Fixed OTW setting of a partition residing on Dev1 (cascaded configuration). + * + * Rev 1.60 Nov 12 2006 09:46:42 Yaniv.Iarovici + * Modify parameter list of doch_reset(). + * + * Rev 1.59 Oct 31 2006 12:23:22 yaniv.iarovici + * Search for the current window after resetting Dev0 in flDOCHAtaReset(). + * + * Rev 1.58 Oct 30 2006 15:50:24 yaniv.iarovici + * Add call to DOCHAddPartition() after creating spanned partition + * for updating actual number of partitions. + * + * Rev 1.57 Oct 25 2006 09:10:26 Yaniv.Iarovici + * Fix for cascaded scenario in which last partition on dev0 is NOT spanned, and is RW protected. + * + * Rev 1.56 Oct 05 2006 11:00:28 yaniv.iarovici + * 1. Retrieve MAX DRQ supported by the device. + * 2. Check that requested DRQ size is supported by the device. + * 3. Remove verify write option from DOCHWriteIPLSingleFloor(). + * + * Rev 1.55 Sep 14 2006 09:56:30 yaniv.iarovici + * DOCHSetCustomParameterSingleFloor() to return DOCH_ProtectionFault in case of protection violation. + * + * Rev 1.54 Sep 13 2006 10:30:46 yaniv.iarovici + * Fix compilation warnings + * + * Rev 1.53 Sep 11 2006 13:45:14 yaniv.iarovici + * Legal header added + * + * Rev 1.52 Sep 10 2006 10:03:14 Yaniv.Iarovici + * 1. Bug Fix: Calculation of total number of partitions in DOCHIdentifyDiskOnChipDevice() in cascaded configuration, when last partition on Dev0 fills the first floor entirely. + * + * 2. Bug Fix: Support creation of Read protected partition which is spanned on both devices in cascaded configuration. + * + * 3. Bug Fix: Setting configuration register values to Dev1 in cascaded configuration (DOCHConfigHW()). + * + * Rev 1.51 Sep 03 2006 14:44:22 Yaniv.Iarovici + * 1. Fixed logic of setting bLastDev0PartSpanned in case last partition on Dev0 fills entire Dev0. (Cascaded configuration) + * 2. Preserve current OTW setting when changing protection type. (Can only be set by AddPartition) + * + * Rev 1.50 Aug 24 2006 11:40:46 Yaniv.Iarovici + * API Change to following protection related routines: + * - DOCHAccessPartWithPwdSingleFloor + * - DOCHDisablePartAccessSingleFloor + * - DOCHSendHostPublicKey + * - DOCHReceiveDochPublicKey + * - DOCHVerifyHostKey + * (The change differs DOCH_ACCESS_ALL_PARTITIONS flag from partition number field + * in ioreq) + * + * Rev 1.49 Aug 22 2006 13:23:36 Yaniv.Iarovici + * 1) Bug fix: 'pdev->bAtaDevNum' was not recovered correctly to 'origDevNum' (multiple places) + * 2) In DOCHWriteIPLSingleFloor(), set rc = DOCH_OK at decleration, to prevent compilation warning + * 3) Bug fix: flDOCHAddPartition - Cascaded configuration + * + * Rev 1.48 Aug 16 2006 08:44:18 Yaniv.Iarovici + * 1) Fix bdCallDOCH() Description + * 2) Check if ETFFS was identified on the device - if not, return 'DOCH_FeatureNotSupported' + * 2) Free MUTEX before returning error when (gDochAccessNanosec == 0) is detected + * 3) Check that Multi-sector transfer mode does not exceed max allowed in DOCHSetDataTransferModeSingleFloor() + * 4) Set pdev->device[devNum].ETFFS_Identified = TRUE adfter a SUCCESSFULL completion of DOCHIdentifyDiskOnChipDeviceSingleFloor() + * 5) Remove unneccesary code from DOCHGetResetStatus() + * 6) Reset pdev->bAtaDevNum to original value upon failure (various places in the code) + * 7) Check that pdev is valid in the various routines + * 8) Change description of DOCHGetPowerMode() and DOCHSetPowerMode() to fit SW Spec 0.84 + * + * Rev 1.47 Aug 09 2006 17:26:50 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +#include "flchkdef.h" +#include "flsystyp.h" +#include "flcommon.h" +#include "flsysfun.h" +#include "doch_func.h" +#include "doch_ata.h" +#include "flstdcmp.h" +#include "hib.h" +#include "part_inf.h" +#include "dochtl.h" +#ifdef FL_MIGRATION_VERSION +#include "docsys.h" +#endif /* FL_MIGRATION_VERSION */ + +#ifdef __cplusplus +extern "C" { +#endif + +/******************************************************************************/ +/* + * Global variables + */ +/******************************************************************************/ + +/* NOTE: Global variables with "boolean like" behavior are set to a unique pattern (DOCH_GLOBAL_BOOL_PATTERN) + to indicate them as "TRUE" */ +#ifdef FL_VERIFY_WRITE +FLByte gDochVerifyWrite[DOCH_MAX_SOCKETS]; /*Indicates to perform verify operation on every written sector to the specified socket*/ +#endif /*FL_VERIFY_WRITE*/ +FLByte gDochAtaDebug = 0; /*Indicates to retrieve ATA debug buffer upon completion of ATA command */ + +FLByte gSdkInitDone = 0; /*Indicates that DochSDKInit() was completed */ + +FLByte gSdkDOCAddressObtained = 0; /*Indicates that DOC address was obtained (used by DOCHConfigHW) */ + +FLDword gConfigHWDefaults[DOCH_NUM_OF_DCONFIGHW_ITEMS]; +FLByte gConfigHWInitDone = 0; /*Indicates that gConfigHWDefaults[] was set to defaults */ + +FLDword gIPLChunkOffsetInSectors = 0; /*Offset of current IPL chunk to write*/ + +FLByte gSDKUpdatesDiskAttributes = 0; /*Indication that first 0x40 bytes of disk user attributes should be written as well*/ + +FLByte gIsDMAEnabled = 0; /*DMA is Enabled/Disabled*/ + +FLByte gAutoDPDByHost = 0; /*Host enters device to DPD automatically after every command*/ + +FLBoolean gDochIrqEnabled[DOCH_MAX_SOCKETS]; /* holds TRUE, when interrupt enable for socket, FALSE otherwise */ + +extern FLDword gAccessLayerType; + +extern FLByte gATANoTimeout; + +#ifdef DOCH_DMA_CONFIG +extern FLByte gDMAChannelOpen; +#endif /*DOCH_DMA_CONFIG*/ + +extern DOCH_DpdSettings gDpdSettings; + +extern DOCH_Socket sockets [DOCH_MAX_SOCKETS]; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND +extern FLByte gDeviceTurnedOff; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + +extern FLDword gUseShortWaitOnBusy; + +#ifdef DEBUG_TIMEOUT +extern FLDword SysTimerFrequency; +extern void GetInternalSysTimer(FLDword * ticksHigh, FLDword * ticksLow); +#endif /*DEBUG_TIMEOUT*/ + +/******************************************************************************/ +/* + * Extern routines + */ +/******************************************************************************/ + +extern DOCH_Error io_input(DOCH_Socket *pdev, FLSNative devNum, DOCH_Registers* regs, void *buf, FLNative secNum); +extern DOCH_Error io_output(DOCH_Socket *pdev, FLSNative devNum, DOCH_Registers* regs, void *buf, FLNative secNum); +extern DOCH_Error get_out_registers(DOCH_Socket* pdev, FLSNative devNum, DOCH_Registers* out_regs); + +void DOCH_SetBits(FLDword* var, FLDword mask, FLByte offset, FLDword val) +{ + FLDword temp = *var; + + + temp &= ~(mask); + temp |= (val << offset); + + *var = temp; +} + +extern DOCH_Error dochSetMutex(FLByte socketNum, + FLBoolean state, + FLByte partition); + +/******************************************************************************/ +/* + * Static routines + */ +/******************************************************************************/ +static DOCH_Error performSectorsOperation(DOCH_Command cmd, + FLByte devHeadOptions, + DOCH_Socket* pdev, + IOreq* ioreq, + DOCH_Registers* out_regs, + FLSNative sectorsToPerfrom, + FLSNative * sectorNumber, + FLSNative * totalNumOfSectors, + FLSNative * sectorsPerformed, + FLSNative * buf_offset, + FLByte* buf_ptr); + + +#ifdef DOCH_BIG_ENDIAN +static FLWord be_FLWord (FLByte * v); +static FLDword be_FLDword (FLByte * v); +#endif /*DOCH_BIG_ENDIAN*/ + +DOCH_Error DOCHGetParitionUserAttributesSingleFloor(IOreq* ioreq); +DOCH_Error DOCHAccessPartWithPwdSingleFloor(IOreq* ioreq); +DOCH_Error DOCHSetParitionProtectionSingleFloor(IOreq* ioreq); + +/******************************************************************************/ +/* + * Static Buffers + */ +/******************************************************************************/ +static DOCH_PartitionFormatInfo partFormatInfo; +static DOCH_DeviceInfo diskOnChipDeviceInfo; +static DOCH_DeviceInfo diskOnChipDeviceInfo2; +static DOCH_DeviceUserAttr devUserAttr; +static DOCH_PartitionInfo partitionInfoTemp; +static DOCH_PartitionFormatInfoAPI partInfoTemp; +static DOCH_PartitionProtectionAPI protAPI; +static DOCH_PartitionAcessPassword partAccessTemp; +static FLByte currentAttributes[DOCH_SECTOR_SIZE]; +#ifdef FL_VERIFY_WRITE +static FLByte verifyBuf[DOCH_SECTOR_SIZE]; +#endif /*FL_VERIFY_WRITE*/ +static FLDword wipeSectorsDev[((2*DOCH_SECTOR_SIZE) / sizeof(FLDword))]; + +/******************************************************************************/ +/* + * Local MACROs + */ +/******************************************************************************/ +#ifdef DOCH_DMA_CONFIG +#define DOCH_OPEN_DMA_CHANNEL \ + { \ + DMA_Params_S dmaParams; \ + \ + if(pdev->bUseDMA && (gDMAChannelOpen == 0)) \ + { \ + dmaParams.bOpType = DOCH_DMA_OPEN_CHANNEL; \ + DOCH_DMA_CONFIG(&dmaParams); \ + if(dmaParams.fDmaStatus != 0) \ + { \ + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("DOCH_DMA_OPEN_CHANNEL Failed with dmaStatus: %d \r\n"),dmaParams.fDmaStatus)); \ + return DOCH_GeneralFailure; \ + } \ + \ + gDMAChannelOpen = DOCH_GLOBAL_BOOL_PATTERN; \ + \ + DBG_PRINT_FLOW(FLZONE_API, "\r\nDMA Channel opened\r\n"); \ + } \ + } +#endif /*DOCH_DMA_CONFIG*/ + +#define DOCH_SET_ATA_ADDRESS_VALUES(addr_vals, sectorNumber, deviceNum) \ + addr_vals.bSecNum = (FLByte) sectorNumber; \ + addr_vals.bCylLow = (FLByte) (sectorNumber >> 8); \ + addr_vals.bCylHi = (FLByte) (sectorNumber >> 16); \ + addr_vals.bDevHead = (FLByte) (((sectorNumber >> 24) & 0x0f) | DOCH_LBA | (deviceNum<<4)); + + +#define DOCH_PARTITION_ON_DEV0 \ + ((!pdev->sSpanData.secondFloorActive) || (partNum < pdev->sSpanData.bLastPartitionOnDev0) || \ + ((partNum == pdev->sSpanData.bLastPartitionOnDev0) && (!pdev->sSpanData.bLastDev0PartSpanned))) + +#define DOCH_PARTITION_ON_DEV1 \ + (((pdev->sSpanData.secondFloorActive) && (partNum > pdev->sSpanData.bLastPartitionOnDev0)) \ + && (pdev->wNumOfDevices > 1)) + +#define DOCH_PARTITION_IS_SPANNED \ + (((pdev->sSpanData.bLastDev0PartSpanned) && (partNum == pdev->sSpanData.numOfSpannedPartitionOnDev0)) \ + && (pdev->wNumOfDevices > 1)) + +/*----------------------------------------------------------------------*/ +/* p e r f o r m S e c t o r O p e r a t i o n */ +/* */ +/* Performs sector(s) operation */ +/* */ +/* Parameters: */ +/* cmd : ATA command to perform */ +/* pdev : Socket to perform on */ +/* ioreq : IOreq */ +/* totalNumOfSectors : Total num of sectors to perform */ +/* sectorsPerformed : Num of sectors actually performed */ +/* */ +/* Returns: */ +/* device head with proper bit */ +/*----------------------------------------------------------------------*/ +static +DOCH_Error performSectorsOperation(DOCH_Command cmd, + FLByte devHeadOptions, + DOCH_Socket* pdev, + IOreq* ioreq, + DOCH_Registers* out_regs, + FLSNative sectorsToPerfrom, + FLSNative * sectorNumber, + FLSNative * totalNumOfSectors, + FLSNative * sectorsPerformed, + FLSNative * buf_offset, + FLByte* buf_ptr) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + Addressing_Values_s addr_vals; + + /*Perform 1 operation cycle*/ + /*=========================*/ + + /*Set ATA addressing registers*/ + /*---------------------------*/ + DOCH_SET_ATA_ADDRESS_VALUES(addr_vals, (*sectorNumber), (pdev->bAtaDevNum)); + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + if(sectorsToPerfrom < DOCH_MAX_SECTORS) + in_regs.bSectorCount = sectorsToPerfrom; + else + in_regs.bSectorCount = 0; /*DOCH_MAX_SECTORS*/ + + in_regs.bSectorNumber = addr_vals.bSecNum; + in_regs.bCylLow = addr_vals.bCylLow; + in_regs.bCylHigh = addr_vals.bCylHi; + in_regs.bDriveHead = addr_vals.bDevHead | devHeadOptions; + in_regs.bCommandStatus = cmd; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + out_regs, + (void*)(&buf_ptr[*buf_offset]), + sectorsToPerfrom); + + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "performSectorsOperation(): ATA Error: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + DBG_PRINT_ERR(FLZONE_API, "\r\n"); + + return rc; + } + + /*Update feedback values*/ + /*----------------------*/ + *sectorsPerformed += out_regs->bSectorCount; + + /*For next possible cycle*/ + /*-----------------------*/ + *sectorNumber += sectorsToPerfrom; + *totalNumOfSectors -= sectorsToPerfrom; + *buf_offset += sectorsToPerfrom * DOCH_SECTOR_SIZE; + + return DOCH_OK; +} + +#ifdef DOCH_BIG_ENDIAN +/****************************************************************************** + * * + * be _ s h o r t * + * be _ l o n g * + * * + * Little-to-CPU-native integer conversion routines for big-endian CPUs. * + * * + * Parameters : * + * v : correctly aligned little endian value * + * Returns : * + * value in CPU native format * + * * + ******************************************************************************/ + +static +FLWord be_FLWord (FLByte * v) +{ + register FLWord x = *((FLWord *)v); + return ((x >> 8) | (x << 8)); +} + +static +FLDword be_FLDword (FLByte * v) +{ + register FLDword x = *((FLDword *)v); + return ((x >> 24) | ((x >> 8) & 0x0000ff00) | + ((x << 8) & 0x00ff0000) | (x << 24)); +} +#endif /*DOCH_BIG_ENDIAN*/ + +/******************************************************************************/ +/* + * DOCH SDK API Routines + */ +/******************************************************************************/ + +/*----------------------------------------------------------------------*/ +/* b d C a l l D O C H */ +/* */ +/* Performs needed general operations before calling actual function */ +/* Calls appropriate DOCH function */ +/* */ +/* Parameters: */ +/* functionNo : DOCH SDK function to run */ +/* ioreq : DOCH ioreq structure */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error bdCallDOCH(FLSNative functionNo, IOreq FAR2 *ioreq) +{ + DOCH_Error rc; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /* gDeviceTurnedOff will be updated by API routines*/ + gDeviceTurnedOff = FALSE; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + /*If ETFFS wasnt identified, prevent using bdCallDOCH()*/ + if(!sockets[DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)].device[0].ETFFS_Identified) + return DOCH_FeatureNotSupported; + + /* Take mutex for current device */ + rc = dochSetMutex(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + DOCH_ON, + DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "bdCallDOCH(): dochSetMutex failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + return rc; + } + + /*Check if requested operation is wither Read or Write which are performance critical + (All other operations are directed from within the switch case) + -------------------------------------------------------------*/ + if(functionNo == SDK_READ_PARTITION_SECTORS) + { + rc = DOCHReadPartitionSectors(ioreq); + } + else if (functionNo == SDK_WRITE_PARTITION_SECTORS) + { + rc = DOCHWritePartitionSectors(ioreq); + } + else + { + /*Branch to appropriate DOCH routine according to function#*/ + /*---------------------------------------------------------*/ + switch (functionNo) + { + /*Get Info*/ + case SDK_IDENTIFY_DISKONCHIP_DEVICE: + rc = DOCHIdentifyDiskOnChipDevice(ioreq); + break; + + case SDK_GET_RESET_STATUS: + rc = DOCHGetResetStatus(ioreq); + break; + + case SDK_NOTIFY_RESET: + rc = DOCHNotifyReset(ioreq); + break; + + case SDK_NOTIFY_PLATFORM_RESUMED: + rc = DOCHNotifyPlatformResumed(ioreq); + break; + + case SDK_GET_PARTITION_INFO: + rc = DOCHPartitionInfo(ioreq); + break; + + case SDK_SET_DISK_USER_ATTR: + rc = DOCHSetDiskUserAttributes(ioreq); + break; + + case SDK_GET_DISK_USER_ATTR: + rc = DOCHGetDiskUserAttributes(ioreq); + break; + + case SDK_GET_CONFIG_DATA: + rc = DOCHGetConfigurationData(ioreq); + break; + + case SDK_SET_CONFIG_DATA: + rc = DOCHSetConfigurationData(ioreq); + break; + + /*Media*/ + case SDK_SET_DEFAULT_PARTITION: + rc = DOCHSetDefaultPartition(ioreq); + break; + + case SDK_SET_DATA_XFER_MODE: + rc = DOCHSetDataTransferMode(ioreq); + break; + + case SDK_OPTIMIZE_MEDIA: + rc = DOCHOptimizeMedia(ioreq); + break; + + case SDK_DELETE_PARTITIONS: + rc = DOCHDeletePartitions(ioreq); + break; + + case SDK_ADD_PARTITION: + rc = DOCHAddPartition(ioreq); + break; + + case SDK_UNFORMAT_DEVICE: + rc = DOCHUnformatDevice(ioreq); + break; + + case SDK_WRITE_IPL: + rc = DOCHWriteIPL(ioreq); + break; + + case SDK_READ_IPL: + rc = DOCHReadIPL(ioreq); + break; + + /*IO*/ + case SDK_WRITE_AND_LOCK: + rc = DOCHWriteAndLock(ioreq); + break; + + case SDK_WIPE_SECTORS: + rc = DOCHWipeSectors(ioreq); + break; + + case SDK_FREE_SECTORS: + rc = DOCHFreeSectors(ioreq); + break; + + case SDK_PREPARE_FOR_WRITE: + rc = DOCHPrepareForWrite(ioreq); + break; + +#if 0 + /*Flexi-Flash*/ + case SDK_WRITE_FLEXI_FAST: + rc = DOCHWriteFlexiFast(ioreq); + break; + + case SDK_WRITE_FLEXI_NORMAL: + rc = DOCHWriteFlexiNormal(ioreq); + break; + + case SDK_REWRITE_FLEXI_NORMAL: + rc = DOCHReWriteFlexiNormal(ioreq); + break; +#endif /*0*/ + + /*Protection*/ + case SDK_ACCESS_PART_WITH_PWD: + rc = DOCHAccessPartWithPwd(ioreq); + break; + + case SDK_DISABLE_PART_ACCESS: + rc = DOCHDisablePartAccess(ioreq); + break; + + case SDK_SET_PART_PROTECTION: + rc = DOCHSetParitionProtection(ioreq); + break; + +#if 0 + /*PKI*/ + case SDK_PKI_HOST: + rc = DOCHSendHostPublicKey(ioreq); + break; + + case SDK_PKI_DOCH: + rc = DOCHReceiveDochPublicKey(ioreq); + break; + + case SDK_PKI_VERIFY_HOST_KEY: + rc = DOCHVerifyHostKey(ioreq); + break; +#endif /*0*/ + + /*Custom Parameters*/ + case SDK_GET_CUSTOM_PARAM: + rc = DOCHGetCustomParameter(ioreq); + break; + + case SDK_SET_CUSTOM_PARAM: + rc = DOCHSetCustomParameter(ioreq); + break; + +#if 0 + /*Atomic Read/Write Sequence*/ + case SDK_ATOMIC_WRITE_SEQ: + rc = DOCHManageAtomicWriteSeq(ioreq); + break; + + /*Algorithms*/ + case SDK_REPORT_SUPP_ALG: + rc = DOCHReportSupportedAlgorithms(ioreq); + break; + + case SDK_REPORT_ALG_CAPAB: + rc = DOCHGetAlgorithmCapabilities(ioreq); + break; + + case SDK_SET_ALG_MODE: + rc = DOCHSetAlgorithmMode(ioreq); + break; + + /*Hash*/ + case SDK_AUTO_HASH_CTRL: + rc = DOCHAutoHashControl(ioreq); + break; + + case SDK_READ_CALC_HASH: + rc = DOCHReadCalculatedHash(ioreq); + break; + + case SDK_WRITE_CALC_HASH: + rc = DOCHWriteCalculatedHash(ioreq); + break; + + case SDK_READ_ORIG_HASH: + rc = DOCHReadOriginalHash(ioreq); + break; + + case SDK_WRITE_GIVEN_HASH: + rc = DOCHWriteGivenHash(ioreq); + break; + + case SDK_START_HASH_STREAM_CALC: + rc = DOCHStartHashStreamCalculation(ioreq); + break; + + case SDK_READ_HASH_STREAM_CALC: + rc = DOCHReadStopHashStreamCalc(ioreq); + break; + + case SDK_RETURN_RAND_NUMS: + rc = DOCHReturnRandomNumbers(ioreq); + break; + + case SDK_SET_HASH_KEY: + rc = DOCHSetHashKey(ioreq); + break; + +#endif /*0*/ + + /*General*/ + case SDK_SET_PART_USER_ATTR: + rc = DOCHSetParitionUserAttributes(ioreq); + break; + + case SDK_GET_PART_USER_ATTR: + rc = DOCHGetParitionUserAttributes(ioreq); + break; + + case SDK_SET_POWER_MODE: + rc = DOCHSetPowerMode(ioreq); + break; + + case SDK_GET_POWER_MODE: + rc = DOCHGetPowerMode(ioreq); + break; + + case SDK_HW_CONFIG: + rc = DOCHConfigHW(ioreq); + break; + + case SDK_RECOVER_FROM_POWER_LOSS: + rc = DOCHRecoverFromPowerLoss(ioreq); + break; + + case SDK_CLEAR_ATA_INTERRUPT: + rc = DOCHClearIRQ(ioreq); + break; + + case SDK_GET_PHYSICAL_ADDRESS: + rc = DOCHGetPhysicalAddress(ioreq); + break; + +#ifdef FL_SLPP + case SDK_SLPP_UNLOCK_RANGE: + rc = DOCHSLPPUnlockRange(ioreq); + break; + + case SDK_SLPP_UNLOCK_ENTIRE_PARTITION: + rc = DOCHSLPPUnlockEntirePartition(ioreq); + break; + + case SDK_SLPP_LOCK_RANGE: + rc = DOCHSLPPLockRange(ioreq); + break; + + case SDK_SLPP_STICKY_LOCK_RANGE: + rc = DOCHSLPPStickyLockRange(ioreq); + break; + + case SDK_SLPP_REPORT_LOCKED_RANGES: + rc = DOCHSLPPReportLockedRanges(ioreq); + break; +#endif /*FL_SLPP*/ + + default: + rc = DOCH_FeatureNotSupported; + break; + } + } + +#ifdef DOCH_AUTO_DPD_BY_HOST + if(gAutoDPDByHost == DOCH_GLOBAL_BOOL_PATTERN) + { + FLDword tries; + DOCH_Socket* pdev; + FLDword i; + FLByte status; + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*Protect against access time set to 0*/ + if(gDochAccessNanosec == 0) + { + /* Free mutex for current device */ + dochSetMutex(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + DOCH_OFF, + DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq)); + + return DOCH_BadParameter; + } + tries = (DOCH_SHORT_WAIT * (1000000UL / gDochAccessNanosec)); + + /*Check if socket is registered*/ + if(pdev != NULL) + { + /*Enter dev0 to DPD mode*/ + /*----------------------*/ + /*Set device*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV0); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,0); + /*Set device to inactive mode*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, (DOCH_PM_SET_NONE | DOCH_PM_INACTIVE_MODE)); + + /*Invoke command*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, DOCH_SET_POWER_MODE); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, DOCH_VSCMD_EXT_DEVICE_CTRL); + + /*Wait for Dev0 to become ready*/ + for(i=0; ibRegBase, DOCH_STATUS_REG); + if((status & (DOCH_READY | DOCH_BUSY)) == DOCH_READY) + goto doch_Dev0_DPD_OK; + } + +doch_Dev0_DPD_OK: + + if(pdev->wNumOfDevices > 1) + { + /*Enter dev1 to DPD mode*/ + /*----------------------*/ + /*Set device*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV1); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,1); + /*Set device to inactive mode*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, (DOCH_PM_SET_NONE | DOCH_PM_INACTIVE_MODE)); + + /*Invoke command*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, DOCH_SET_POWER_MODE); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, DOCH_VSCMD_EXT_DEVICE_CTRL); + + /*Wait for Dev1 to become ready*/ + for(i=0; ibRegBase, DOCH_STATUS_REG); + if((status & (DOCH_READY | DOCH_BUSY)) == DOCH_READY) + goto doch_Dev1_DPD_OK; + } + +doch_Dev1_DPD_OK: + /*Do Nothing*/; + } + } + } +#endif /*DOCH_AUTO_DPD_BY_HOST*/ + + /* Free mutex for current device */ + dochSetMutex(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + DOCH_OFF, + DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq)); + + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /*In case Power Fail was detected, return DOCH_DeviceTurnedOff*/ + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + { + return DOCH_DeviceTurnedOff; + } +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* D O C H S e t D e f a u l t P a r t i t i o n */ +/* */ +/* Set default partition for Standard-ATA commands */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irCount : SET_DEFAULT_PARTITION_TEMP */ +/* SET_DEFAULT_PARTITION_PERM */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SET_DEFAULT_PARTITION */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetDefaultPartition(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + FLByte dev_head_opt; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + if(ioreq->irCount == SET_DEFAULT_PARTITION_PERM) + dev_head_opt = PERM_DEFAULT_PART_OP; + else + dev_head_opt = 0; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_DEFAULT_PARTITION; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = (DOCH_SELECT_DEV(pdev->bAtaDevNum) | (dev_head_opt)); + in_regs.bCommandStatus = DOCH_VSCMD_PARTITION_MANAGEMENT; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetDefaultPartition(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H S e t D a t a T r a n s f e r M o d e */ +/* */ +/* Set Data transfer mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : Requested data transfer mode: */ +/* DOCH_DATA_XFER_MODE_SINGLE */ +/* DOCH_DATA_XFER_MODE_MULT */ +/* irLength : In case of DOCH_DATA_XFER_MODE_MULT, */ +/* specifies DRQ block size */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_DATA_XFER_MODE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetDataTransferModeSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_TransferMode requstedXferMode = (DOCH_TransferMode)(ioreq->irCount); + FLByte requestedDrqSize = (FLByte)(ioreq->irLength); + FLSNative socketNum = DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq); + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, socketNum); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check that Multi-sector transfer mode does not exceed max allowed*/ + if((ioreq->irCount == DOCH_DATA_XFER_MODE_MULT) && + ((ioreq->irLength > DOCH_MAX_DRQ_SUPPORTED) || + (ioreq->irLength > (FLSDword)pdev->device[pdev->bAtaDevNum].dwMulti_MAX)) + ) + return DOCH_FeatureNotSupported; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_DATA_XFER_MODE; + in_regs.bSectorCount = (FLByte)(ioreq->irCount); + if(ioreq->irCount == DOCH_DATA_XFER_MODE_MULT) + in_regs.bSectorNumber = (FLByte)(ioreq->irLength); + else + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead =DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( socketNum, + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + { + /*If operation succeeded - update transfer mode in SDK as well*/ + /*------------------------------------------------------------*/ + rc = doch_setTransferMode(socketNum, pdev->bAtaDevNum, requstedXferMode, requestedDrqSize); + + return rc; + } + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetDataTransferModeSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc, pdev->bAtaDevNum)); + return DOCH_GeneralFailure; + } + +} + +DOCH_Error DOCHSetDataTransferMode(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + pdev->bAtaDevNum = 0; + rc = DOCHSetDataTransferModeSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + + if(pdev->wNumOfDevices > 1) + { + pdev->bAtaDevNum = 1; + rc = DOCHSetDataTransferModeSingleFloor(ioreq); + pdev->bAtaDevNum = 0; + } + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* D O C H I d e n t i f y D i s k O n C h i p D e v i c e */ +/* */ +/* Returns general information about the Device */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_IDENTIFY_FROM_FLASH */ +/* DOCH_IDENTIFY_EXISTANCE */ +/* irData : Address of DOCH_DeviceInfo struct */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_IDENTIFY_DISKONCHIP_DEVICE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHIdentifyDiskOnChipDeviceSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Socket* pdev; + DOCH_DeviceInfo* localDiskOnChipDeviceInfo = (DOCH_DeviceInfo*)(ioreq->irData); + FLSNative devNum; + + DOCH_Registers in_regs; + DOCH_Registers out_regs; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + devNum = pdev->bAtaDevNum; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_IDENTIFY_DISKONCHIP_DEVICE; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = (DOCH_SELECT_DEV(pdev->bAtaDevNum) | ((FLByte)ioreq->irCount)); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + devNum, + &in_regs, + &out_regs, + ioreq->irData, + sizeof(DOCH_DeviceInfo) / DOCH_SECTOR_SIZE); + + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + localDiskOnChipDeviceInfo->wVersion = be_FLWord((FLByte*)&localDiskOnChipDeviceInfo->wVersion); + + localDiskOnChipDeviceInfo->dwCommandFlagsOrStatuses = be_FLDword((FLByte*)&localDiskOnChipDeviceInfo->dwCommandFlagsOrStatuses); + localDiskOnChipDeviceInfo->dwDiskAttributes1 = be_FLDword((FLByte*)&localDiskOnChipDeviceInfo->dwDiskAttributes1); + localDiskOnChipDeviceInfo->dwRservedGateKeeperAttr = be_FLDword((FLByte*)&localDiskOnChipDeviceInfo->dwRservedGateKeeperAttr); + + localDiskOnChipDeviceInfo->wTotalNumOfPartitions = be_FLWord((FLByte*)&localDiskOnChipDeviceInfo->wTotalNumOfPartitions); + localDiskOnChipDeviceInfo->wDefaultPartitionNumber = be_FLWord((FLByte*)&localDiskOnChipDeviceInfo->wDefaultPartitionNumber); + + localDiskOnChipDeviceInfo->dwUnformattedCapacity = be_FLDword((FLByte*)&localDiskOnChipDeviceInfo->dwUnformattedCapacity); + + localDiskOnChipDeviceInfo->dwReservedConfigPartitionSize = be_FLDword((FLByte*)&localDiskOnChipDeviceInfo->dwReservedConfigPartitionSize); + localDiskOnChipDeviceInfo->dwUnitSize = be_FLDword((FLByte*)&localDiskOnChipDeviceInfo->dwUnitSize); + localDiskOnChipDeviceInfo->dwConfigurationPartitionExistsSign = be_FLDword((FLByte*)&localDiskOnChipDeviceInfo->dwConfigurationPartitionExistsSign); + #endif /*DOCH_BIG_ENDIAN*/ + + /*Update device structure*/ + /*=======================*/ + if(rc == DOCH_OK) + { + /*ETFFS detected*/ + pdev->device[devNum].ETFFS_Identified = TRUE; + + /*Extract MAX DRQ size from the Disk Attributes field*/ + pdev->device[devNum].dwMulti_MAX = (1 << + ((localDiskOnChipDeviceInfo->dwDiskAttributes1 & DOCH_DA1B_MAX_MULTI_SEC_XFER_SIZE) >> DOCH_DA1O_MAX_MULTI_SEC_XFER_SIZE)); + + if((localDiskOnChipDeviceInfo->dwUnformattedCapacity != 0) && + (localDiskOnChipDeviceInfo->wVersionCompatability == 0) +#ifndef DOCH_DONT_CHECK_EXISTANCE_SIGN + && (localDiskOnChipDeviceInfo->dwConfigurationPartitionExistsSign == DOCH_CONFIGURATION_EXISTS_SIGN) +#endif /*DOCH_DONT_CHECK_EXISTANCE_SIGN*/ + ) + { + rc = update_device_info(pdev, localDiskOnChipDeviceInfo, devNum); + + #ifdef CHECK_POWER_ON_EVERY_COMMAND + { + IOreq ioreq2; + + /*Make sure next calls to DOCHGetResetStatus() will reflect actual reset*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irHandle = ioreq->irHandle; + DOCHGetResetStatus(&ioreq2); + } + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + return DOCH_OK; + } + DBG_PRINT_ERR(FLZONE_API, "ERROR: DOCHIdentifyDiskOnChipDevice(): read incorrect data\r\n"); + } + if(devNum == 0) + { + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "ERROR: DOCHIdentifyDiskOnChipDevice(): failed "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("with status: 0x%x \r\n"), rc)); + } + } + else + { + /*Prevent invoking Dev1 if it was not detected!!!*/ + tffsset(&pdev->sSpanData, 0, sizeof(pdev->sSpanData)); + + DBG_PRINT_WRN(FLZONE_API, "DOCHIdentifyDiskOnChipDevice(): Dev1 not found\r\n"); + } + return DOCH_GeneralFailure; +} + +DOCH_Error DOCHIdentifyDiskOnChipDevice(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + DOCH_DeviceInfo* tempDiskOnChipDeviceInfo; + FLByte requestedDevice; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + requestedDevice = pdev->bAtaDevNum; + + /*Identify Dev0*/ + tempDiskOnChipDeviceInfo = (DOCH_DeviceInfo*)(ioreq->irData); + pdev->bAtaDevNum = 0; + + /*Identify command should have a short timeout*/ + gUseShortWaitOnBusy = DOCH_LONG_IDENTIFY_TIMEOUT; + rc = DOCHIdentifyDiskOnChipDeviceSingleFloor(ioreq); + gUseShortWaitOnBusy = 0; + + pdev->bAtaDevNum = requestedDevice; + if(rc != DOCH_OK) + return rc; + + /*If only 1 device is present, return*/ + if(pdev->wNumOfDevices > 1) + { + /*Identify Dev1*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irData = &diskOnChipDeviceInfo2; + + pdev->bAtaDevNum = 1; + /*Identify command should have a short timeout*/ + gUseShortWaitOnBusy = DOCH_LONG_IDENTIFY_TIMEOUT; + rc = DOCHIdentifyDiskOnChipDeviceSingleFloor(&ioreq2); + gUseShortWaitOnBusy = 0; + pdev->bAtaDevNum = requestedDevice; + if(rc != DOCH_OK) + return rc; + + /*Combine data*/ + tempDiskOnChipDeviceInfo->dwUnformattedCapacity += diskOnChipDeviceInfo2.dwUnformattedCapacity; + + tempDiskOnChipDeviceInfo->wTotalNumOfPartitions += diskOnChipDeviceInfo2.wTotalNumOfPartitions; + + if(diskOnChipDeviceInfo2.wTotalNumOfPartitions > 1) + { + if((pdev->sSpanData.bLastDev0PartSpanned)) + tempDiskOnChipDeviceInfo->wTotalNumOfPartitions -= 2; + else + tempDiskOnChipDeviceInfo->wTotalNumOfPartitions -= 1; + } + else if(diskOnChipDeviceInfo2.wTotalNumOfPartitions == 1) + tempDiskOnChipDeviceInfo->wTotalNumOfPartitions -= 1; + } + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H G e t R e s e t S t a t u s */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_RESET_STATUS */ +/* */ +/* Returns: */ +/* irCount : 0 = No reset since last query */ +/* 1 = The device has been reset since last*/ +/* query */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHGetResetStatus(IOreq* ioreq) +{ + DOCH_Error rc; + + DOCH_Registers in_regs; + DOCH_Registers out_regs; + + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + pdev->bUseInterrupt=FALSE; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_RESET_STATUS; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead =DOCH_SELECT_DEV (pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + /*Update device structure*/ + /*=======================*/ + if(rc == DOCH_OK) + { + /*Return reset status*/ + ioreq->irCount = out_regs.bSectorCount; + + return DOCH_OK; + } + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHGetResetStatus(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H N o t i f y R e s e t */ +/* */ +/* Notify the Device on an upcoming reset initiated by the Host. */ +/* Host should NOT perform actual reset before this command completes */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_NOTIFY_RESET */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHNotifyResetSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + + DOCH_Registers in_regs; + DOCH_Registers out_regs; + + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_NOTIFY_RESET; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + 0, + &in_regs, + &out_regs, + NULL, + 0); + + /*Update device structure*/ + /*=======================*/ + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHNotifyResetSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc, pdev->bAtaDevNum)); + + return DOCH_GeneralFailure; + } + + return DOCH_OK; +} + +DOCH_Error DOCHNotifyReset(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + FLByte origDevNum; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + origDevNum = pdev->bAtaDevNum; + + pdev->bAtaDevNum = 0; + rc = DOCHNotifyResetSingleFloor(ioreq); + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + + if(pdev->wNumOfDevices > 1) + { + pdev->bAtaDevNum = 1; + rc = DOCHNotifyResetSingleFloor(ioreq); + pdev->bAtaDevNum = origDevNum; + } + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* D O C H N o t i f y P l a t f o r m R e s u m e d */ +/* */ +/* Notify the Device that there was a reset, */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_NOTIFY_PLATFORM_RESUMED */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHNotifyPlatformResumedSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; + + DOCH_Registers in_regs; + DOCH_Registers out_regs; + + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_NOTIFY_PLATFORM_RESUMED; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + 0, + &in_regs, + &out_regs, + NULL, + 0); + + /*Update device structure*/ + /*=======================*/ + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHNotifyPlatformResumedSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc,pdev->bAtaDevNum)); + + return DOCH_GeneralFailure; + } + + /*Restore DPD settings */ + /*=====================*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + + ioreq2.irFlags = (DOCH_PM_SET_BOTH_MODES | DOCH_PM_WORK_MODE); + ioreq2.irCount = (gDpdSettings.activeMode | gDpdSettings.inActiveMode); + ioreq2.irLength = gDpdSettings.timeOut; + + rc = DOCHSetPowerMode(&ioreq2); + if(rc != DOCH_OK) + return rc; + + /*Restore transfer mode */ + /*======================*/ + tffsset(&ioreq2, 0, sizeof(ioreq)); + + ioreq2.irCount = pdev->device[pdev->bAtaDevNum].dataTransferMode; + ioreq2.irLength = pdev->device[pdev->bAtaDevNum].dwMulti_Current; + + rc = DOCHSetDataTransferModeSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + + + return DOCH_OK; +} + +DOCH_Error DOCHNotifyPlatformResumed(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + FLByte origDevNum; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + origDevNum = pdev->bAtaDevNum; + + pdev->bAtaDevNum = 0; + rc = DOCHNotifyPlatformResumedSingleFloor(ioreq); + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + + if(pdev->wNumOfDevices > 1) + { + pdev->bAtaDevNum = 1; + rc = DOCHNotifyPlatformResumedSingleFloor(ioreq); + pdev->bAtaDevNum = origDevNum; + } + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t D i s k U s e r A t t r i b u t e s */ +/* */ +/* Set disk user attributes . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to 1 sector of data */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_DISK_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetDiskUserAttributes(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + +#ifdef DOCH_BIG_ENDIAN + DOCH_DeviceUserAttr* devUserAttrOrig = (DOCH_DeviceUserAttr*)(ioreq->irData); + DOCH_PartitionSpanData* devSpanInfo= &devUserAttrOrig->sdkAttributes.sSpanInfo; + DOCH_SecureDeleteDev1* devSecureDelete= &devUserAttrOrig->sdkAttributes.sSecureDeleteDev1; +#endif /*DOCH_BIG_ENDIAN*/ + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + if(!gSDKUpdatesDiskAttributes) + { + /*First retrieve current attributes sector + (for protecting first 0x40 bytes that are SDK specific*/ + /*------------------------------------------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irData = currentAttributes; + DOCHGetDiskUserAttributes(&ioreq2); + + /*Use currentAttributes bytes 0x41..0x200 to set requested*/ + /*--------------------------------------------------------*/ + tffscpy(ioreq->irData, currentAttributes, DOCH_PART_INFO_SDK_RESERVED_BYTES); + } + +#ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + devSpanInfo->dwSpanSector = be_FLDword((FLByte*)&devSpanInfo->dwSpanSector); + devSpanInfo->dwSpanSizeOnDev0 = be_FLDword((FLByte*)&devSpanInfo->dwSpanSizeOnDev0); + devSecureDelete->dwSecureDeleteNumOfSectors = be_FLDword ((FLByte*)&devSecureDelete->dwSecureDeleteNumOfSectors); + devSecureDelete->dwSecureDeleteStartSector = be_FLDword ((FLByte*)&devSecureDelete->dwSecureDeleteStartSector); +#endif /*DOCH_BIG_ENDIAN*/ + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_DISK_USER_ATTR; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = (DOCH_SELECT_DEV(pdev->bAtaDevNum)); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (1)); + +#ifdef DOCH_BIG_ENDIAN + /*The spanInfo buffer is in use later on, therefore recover it*/ + devSpanInfo->dwSpanSector = be_FLDword((FLByte*)&devSpanInfo->dwSpanSector); + devSpanInfo->dwSpanSizeOnDev0 = be_FLDword((FLByte*)&devSpanInfo->dwSpanSizeOnDev0); + devSecureDelete->dwSecureDeleteNumOfSectors = be_FLDword ((FLByte*)&devSecureDelete->dwSecureDeleteNumOfSectors); + devSecureDelete->dwSecureDeleteStartSector = be_FLDword ((FLByte*)&devSecureDelete->dwSecureDeleteStartSector); +#endif /*DOCH_BIG_ENDIAN*/ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetDiskUserAttributes(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t D i s k U s e r A t t r i b u t e s */ +/* */ +/* Get disk user attributes . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to 1 sector of data */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_DISK_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHGetDiskUserAttributes(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + +#ifdef DOCH_BIG_ENDIAN + DOCH_DeviceUserAttr* devUserAttrOrig = (DOCH_DeviceUserAttr*)(ioreq->irData); + DOCH_PartitionSpanData* devSpanInfo= &devUserAttrOrig->sdkAttributes.sSpanInfo; + DOCH_SecureDeleteDev1* devSecureDelete= &devUserAttrOrig->sdkAttributes.sSecureDeleteDev1; +#endif /*DOCH_BIG_ENDIAN*/ + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_DISK_USER_ATTR; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = (DOCH_SELECT_DEV(pdev->bAtaDevNum)); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (1)); + + +#ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + devSpanInfo->dwSpanSector = be_FLDword((FLByte*)&devSpanInfo->dwSpanSector); + devSpanInfo->dwSpanSizeOnDev0 = be_FLDword((FLByte*)&devSpanInfo->dwSpanSizeOnDev0); + devSecureDelete->dwSecureDeleteNumOfSectors = be_FLDword ((FLByte*)&devSecureDelete->dwSecureDeleteNumOfSectors); + devSecureDelete->dwSecureDeleteStartSector = be_FLDword ((FLByte*)&devSecureDelete->dwSecureDeleteStartSector); +#endif /*DOCH_BIG_ENDIAN*/ + + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHGetDiskUserAttributes(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t C o n f i g u r a t i o n D a t a */ +/* */ +/* Read the device configuration data. No authentication is required */ +/* for calling this command, but the fields containing keys in the */ +/* configuration data will be masked by ETFFS using zeros. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to 1..3 sector(s) of data. */ +/* irCount : Sector offset in the configuration data to start */ +/* reading from. */ +/* irLength : Number of sectors of configuration data to read. */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_CONFIGURATION_DATA */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHGetConfigurationData(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_CONFIGURATION_DATA; + in_regs.bSectorCount = (FLByte)ioreq->irLength; + in_regs.bSectorNumber = (FLByte)ioreq->irCount; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = (DOCH_SELECT_DEV(pdev->bAtaDevNum)); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (ioreq->irLength)); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHGetConfigurationData(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t C o n f i g u r a t i o n D a t a */ +/* */ +/* Save the device configuration data. Calling this command will */ +/* succeed only if there are no partitions present on the media */ +/* (including partition 0). */ +/* You should use this command in the process of duplicating DiskOnChip */ +/* device to make sure all configuration data of the original device */ +/* have been duplicated to the new device. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to 1..3 sector(s) of data. */ +/* irCount : Sector offset in the configuration data to start */ +/* writing from. */ +/* irLength : Number of sectors of configuration data to write.*/ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_CONFIGURATION_DATA */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetConfigurationData(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_CONFIGURATION_DATA; + in_regs.bSectorCount = (FLByte)ioreq->irLength; + in_regs.bSectorNumber = (FLByte)ioreq->irCount; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = (DOCH_SELECT_DEV(pdev->bAtaDevNum)); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (ioreq->irLength)); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetConfigurationData(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H P a r t i t i o n I n f o */ +/* */ +/* Get information about a specific partition. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to read partition */ +/* information into. */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_GET_PARTITION_INFO */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHPartitionInfoSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Socket * pdev; + +#ifdef DOCH_BIG_ENDIAN + DOCH_PartitionInfo* partInfo = (DOCH_PartitionInfo*)(ioreq->irData); + DOCH_PartitionInfo* partInfoToBig = partInfo; +#endif /*DOCH_BIG_ENDIAN*/ + + DOCH_Registers in_regs; + DOCH_Registers out_regs; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_PARTITION_INFO; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_PARTITION_MANAGEMENT; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (sizeof(DOCH_PartitionInfo) / DOCH_SECTOR_SIZE)); + +#ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + partInfoToBig->dwCommandFlagsOrStatuses = be_FLDword((FLByte*)&partInfoToBig->dwCommandFlagsOrStatuses); + partInfoToBig->partitionAttributes1 = be_FLDword((FLByte*)&partInfoToBig->partitionAttributes1); + partInfoToBig->partitionAttributes2 = be_FLDword((FLByte*)&partInfoToBig->partitionAttributes2); + partInfoToBig->nPartitionSize = be_FLDword((FLByte*)&partInfoToBig->nPartitionSize); + partInfoToBig->nFastAreaSize = be_FLDword((FLByte*)&partInfoToBig->nFastAreaSize); + + partInfoToBig->wFastAreaFactor = be_FLWord((FLByte*)&partInfoToBig->wFastAreaFactor); + + partInfoToBig->wPartitionStartSector = be_FLWord((FLByte*)&partInfoToBig->wPartitionStartSector); + partInfoToBig->wCurrentSectorsPerTrack = be_FLWord((FLByte*)&partInfoToBig->wCurrentSectorsPerTrack); + partInfoToBig->wDefaultSectorsPerTrack = be_FLWord((FLByte*)&partInfoToBig->wDefaultSectorsPerTrack); + partInfoToBig->wCurrentCylinders = be_FLWord((FLByte*)&partInfoToBig->wCurrentCylinders); + partInfoToBig->wDefaultCylinders = be_FLWord((FLByte*)&partInfoToBig->wDefaultCylinders); + partInfoToBig->wCurrentHeads = be_FLWord((FLByte*)&partInfoToBig->wCurrentHeads); + partInfoToBig->wDefaultHeads = be_FLWord((FLByte*)&partInfoToBig->wDefaultHeads); + + partInfoToBig->wFastAreaSectorsInErasableUnit = be_FLWord((FLByte*)&partInfoToBig->wFastAreaSectorsInErasableUnit); + partInfoToBig->wNormalAreaSectorsInErasableUnit = be_FLWord((FLByte*)&partInfoToBig->wNormalAreaSectorsInErasableUnit); + partInfoToBig->wRecommendedSectorsPerCluster = be_FLWord((FLByte*)&partInfoToBig->wRecommendedSectorsPerCluster); + partInfoToBig->wFastMaxRelatedSectors = be_FLWord((FLByte*)&partInfoToBig->wFastMaxRelatedSectors); + partInfoToBig->wNormalMaxRelatedSectors = be_FLWord((FLByte*)&partInfoToBig->wNormalMaxRelatedSectors); +#endif /*DOCH_BIG_ENDIAN*/ + + /*Update pdev fields*/ +#if 0 + pdev->device[pdev->bAtaDevNum].dwMulti_Current = + ((partInfo->dwCommandFlagsOrStatuses & DOCH_DCFSB_CURRENT_MULTI_SECTOR) >> DOCH_DCFSO_CURRENT_MULTI_SECTOR); +#endif /* 0 */ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHPartitionInfoSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d \r\n"), rc, pdev->bAtaDevNum)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHPartitionInfo(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + DOCH_PartitionInfo* partInfo; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + FLByte origDevNum; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + origDevNum = pdev->bAtaDevNum; + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV0) + { + pdev->bAtaDevNum = 0; + rc = DOCHPartitionInfoSingleFloor(ioreq); + pdev->bAtaDevNum = origDevNum; + return rc; + } + + /*If partition resides ENTIRELY on Dev1 - return info*/ + /*===================================================*/ + if(DOCH_PARTITION_ON_DEV1) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHPartitionInfoSingleFloor(&ioreq2); + pdev->bAtaDevNum = origDevNum; + return rc; + } + + /*If partition is spanned - collect both infos and combine*/ + /*========================================================*/ + if(DOCH_PARTITION_IS_SPANNED) + { + /*Retrieve first chunk info*/ + /*-------------------------*/ + pdev->bAtaDevNum = 0; + partInfo = (DOCH_PartitionInfo*)(ioreq->irData); + rc = DOCHPartitionInfoSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + + /*Retrieve 2nd chunk info*/ + /*-----------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irData = &partitionInfoTemp; + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHPartitionInfoSingleFloor(&ioreq2); + pdev->bAtaDevNum = origDevNum; + if(rc != DOCH_OK) + return rc; + + /*Combine info*/ + /*------------*/ + partInfo->nPartitionSize += partitionInfoTemp.nPartitionSize; + partInfo->nFastAreaSize += partitionInfoTemp.nFastAreaSize; + } + + return DOCH_OK; +} + + +/*----------------------------------------------------------------------*/ +/* D O C H D e l e t e P a r t i t i o n s */ +/* */ +/* Delete range of partitions */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irFlags : DOCH_NORMAL_OPERATION */ +/* DOCH_IMMEDIATE_OPERATION */ +/* DOCH_FAST_PARTITOIN_DELETE */ +/* DOCH_COMPLETE_PARTITION_DELETE */ +/* irCount : First partition to delete */ +/* irLength : Last partition to delete */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_DELETE_PARTITIONS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHDeletePartitionsSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + FLByte action_type = 0; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + if((ioreq->irFlags & DOCH_IMMEDIATE_OPERATION) == DOCH_IMMEDIATE_OPERATION) + action_type |= ERASE_IMMEDIATE; + + if((ioreq->irFlags & DOCH_COMPLETE_PARTITION_DELETE) == DOCH_COMPLETE_PARTITION_DELETE) + action_type |= DELETE_PARTITIONS_COMPLETE; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_DELETE_PARTITIONS; + in_regs.bSectorCount = (FLByte)(ioreq->irCount); + in_regs.bSectorNumber = (FLByte)(ioreq->irLength); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 'D'; + in_regs.bDriveHead = (DOCH_SELECT_DEV(pdev->bAtaDevNum) | action_type); + in_regs.bCommandStatus = DOCH_VSCMD_PARTITION_MANAGEMENT; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + { + pdev->wTotalNumOfPartitions = 0; + tffsset(&ioreq2, 0, sizeof(ioreq2)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq2, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + ioreq2.irData = &diskOnChipDeviceInfo; + rc = DOCHIdentifyDiskOnChipDevice(&ioreq2); + if(rc != DOCH_OK) + return rc; + + pdev->wTotalNumOfPartitions = diskOnChipDeviceInfo.wTotalNumOfPartitions; + + return DOCH_OK; + } + else + { + + DBG_PRINT_ERR(FLZONE_API, "DOCHDeletePartitionsSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc, pdev->bAtaDevNum)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHDeletePartitions(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte origDevNum; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + origDevNum = pdev->bAtaDevNum; + + /*If partition resides ENTIRELY on Dev0 - return info*/ + /*===================================================*/ + if(!pdev->sSpanData.secondFloorActive || pdev->wNumOfDevices ==1) + { + pdev->bAtaDevNum = 0; + rc = DOCHDeletePartitionsSingleFloor(ioreq); + pdev->bAtaDevNum = origDevNum; + return rc; + } + else + { + /*Protect against illegal operation*/ + if(ioreq->irLength < (pdev->wTotalNumOfPartitions-1)) + { + pdev->bAtaDevNum = origDevNum; + return DOCH_GeneralFailure; + } + + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + /*Do not delete partitions from Dev0 if they do not reside on it!*/ + if(ioreq->irCount <= pdev->sSpanData.bLastPartitionOnDev0) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + /*If last partition to delete resides on Dev1, erase irCount and on on Dev0 as well*/ + if(ioreq->irLength >= pdev->sSpanData.bLastPartitionOnDev0) + ioreq2.irLength = 0xFF; + + pdev->bAtaDevNum = 0; + rc = DOCHDeletePartitionsSingleFloor(&ioreq2); + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + /*Preserve IPL on Dev1 if it was preserved on Dev0*/ + if(ioreq->irCount == 0) + ioreq2.irCount = 0; + else + ioreq2.irCount = 1; + + ioreq2.irLength = 0xFF; + + pdev->bAtaDevNum = 1; + rc = DOCHDeletePartitionsSingleFloor(&ioreq2); + pdev->bAtaDevNum = origDevNum; + + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + } + else + { + ioreq2.irCount = ((ioreq->irCount - pdev->sSpanData.bLastPartitionOnDev0) + 1); + if(ioreq->irLength != 0xFF) + ioreq2.irLength = ((ioreq->irLength - pdev->sSpanData.bLastPartitionOnDev0) + 1); + + pdev->bAtaDevNum = 1; + rc = DOCHDeletePartitionsSingleFloor(&ioreq2); + pdev->bAtaDevNum = origDevNum; + + if(rc != DOCH_OK) + return rc; + + /*Still spanned!*/ + return DOCH_OK; + } + } + + /*Update span info structure*/ + /*--------------------------*/ + pdev->bAtaDevNum = 0; + + /*Retrieve current attributes*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = &devUserAttr; + rc = DOCHGetDiskUserAttributes(&ioreq2); + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + + /*Set span info*/ + devUserAttr.sdkAttributes.sSpanInfo.bLastDev0PartSpanned = FALSE; + devUserAttr.sdkAttributes.sSpanInfo.secondFloorActive = FALSE; + devUserAttr.sdkAttributes.sSpanInfo.dwSpanSector = 0; + devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0 = + devUserAttr.sdkAttributes.sSpanInfo.numOfSpannedPartitionOnDev0 = 0; + + /*Set attributes back to the device*/ + gSDKUpdatesDiskAttributes = DOCH_GLOBAL_BOOL_PATTERN; + rc = DOCHSetDiskUserAttributes(&ioreq2); + gSDKUpdatesDiskAttributes = 0; + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + + /*Update pdev as well*/ + tffscpy(&pdev->sSpanData, &devUserAttr.sdkAttributes.sSpanInfo, sizeof(pdev->sSpanData)); + + pdev->bAtaDevNum = origDevNum; + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H A d d P a r t i t i o n */ +/* */ +/* Adds a partition */ +/* The new partition is created on existing un-formatted disk capacity */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to DOCH_PartitionFormatInfoAPI struct */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_ADD_PARTITION */ +/* */ +/* Returns: */ +/* irCount : Number of the created partition */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHAddPartitionSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_PartitionFormatInfoAPI* partInfo = (DOCH_PartitionFormatInfoAPI*)(ioreq->irData); + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /* Clear partFormatInfo */ + /*----------------------*/ + tffsset(&partFormatInfo, 0, sizeof(DOCH_PartitionFormatInfo)); + + /* Format DOCH_PartitionFormatInfoAPI to DOCH_PartitionFormatInfo */ + /*----------------------------------------------------------------*/ + DOCH_SetBits(&partFormatInfo.dwCommandFlagsOrStatuses, + DOCH_CFSB_FAST_AREA_SIZE_TYPE, + DOCH_CFSO_FAST_AREA_SIZE_TYPE, + partInfo->dwFastAreaSizeType); + + DOCH_SetBits(&partFormatInfo.partitionAttributes1, + DOCH_PA1B_PARTITION_TYPE, + DOCH_PA1O_PARTITION_TYPE, + partInfo->dwPartitionType); + DOCH_SetBits(&partFormatInfo.partitionAttributes1, + DOCH_PA1B_PERFORMANCE_CTRL, + DOCH_PA1O_PERFORMANCE_CTRL, + partInfo->dwPerformanceControl); + DOCH_SetBits(&partFormatInfo.partitionAttributes1, + DOCH_PA1B_PAGE_SIZE_EXP, + DOCH_PA1O_PAGE_SIZE_EXP, + partInfo->dwPageSizeExp); + DOCH_SetBits(&partFormatInfo.partitionAttributes1, + DOCH_PA1B_HASH_TYPE, + DOCH_PA1O_HASH_TYPE, + partInfo->dwHashType); + + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_PROTECTION_TYPE, + DOCH_PA2O_PROTECTION_TYPE, + partInfo->dwProtectionType); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_USER_MODE, + DOCH_PA2O_USER_MODE, + partInfo->dwUserAccessMode); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_GUEST_MODE, + DOCH_PA2O_GUEST_MODE, + partInfo->dwGuestAccessMode); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_MASTER_CTRL, + DOCH_PA2O_MASTER_CTRL, + partInfo->dwMasterControl); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_ENCRYPT_TYPE, + DOCH_PA2O_ENCRYPT_TYPE, + partInfo->dwEncryptionType); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_OTP_BIT, + DOCH_PA2O_OTP_BIT, + partInfo->dwOtpEnabled); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_LOCK_CTRL, + DOCH_PA2O_LOCK_CTRL, + partInfo->dwLockControl); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_MAX_AUTH_ATTEMPTS, + DOCH_PA2O_MAX_AUTH_ATTEMPTS, + partInfo->dwMaxNumOfAuthAttempts); + + partFormatInfo.nPartitionSize = partInfo->nPartitionSize; + partFormatInfo.nFastAreaSize = partInfo->nFastAreaSize; + partFormatInfo.wFastAreaFactor = partInfo->wFastAreaFactor; + tffscpy(partFormatInfo.bPasskey, &partInfo->bPasskey, sizeof(partFormatInfo.bPasskey)); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + partFormatInfo.dwCommandFlagsOrStatuses = be_FLDword((FLByte*)&partFormatInfo.dwCommandFlagsOrStatuses); + partFormatInfo.partitionAttributes1 = be_FLDword((FLByte*)&partFormatInfo.partitionAttributes1); + partFormatInfo.partitionAttributes2 = be_FLDword((FLByte*)&partFormatInfo.partitionAttributes2); + partFormatInfo.nPartitionSize = be_FLDword((FLByte*)&partFormatInfo.nPartitionSize); + partFormatInfo.nFastAreaSize = be_FLDword((FLByte*)&partFormatInfo.nFastAreaSize); + partFormatInfo.wFastAreaFactor = be_FLWord ((FLByte*)&partFormatInfo.wFastAreaFactor); + #endif /*DOCH_BIG_ENDIAN*/ + + /* Update ATA register values */ + /*----------------------------*/ + in_regs.bFeaturesError = DOCH_ADD_PARTITION; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_PARTITION_MANAGEMENT; + + /* Activate ATA command */ + /*----------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + &partFormatInfo, + sizeof(DOCH_PartitionFormatInfo) / DOCH_SECTOR_SIZE); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHAddPartitionSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc, pdev->bAtaDevNum)); + + return DOCH_GeneralFailure; + } + + pdev->wTotalNumOfPartitions = 0; + tffsset(&ioreq2, 0, sizeof(ioreq2)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq2, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + ioreq2.irData = &diskOnChipDeviceInfo; + rc = DOCHIdentifyDiskOnChipDevice(&ioreq2); + if(rc != DOCH_OK) + return rc; + + pdev->wTotalNumOfPartitions = diskOnChipDeviceInfo.wTotalNumOfPartitions; + + /* Output */ + /*--------*/ + ioreq->irCount = out_regs.bSectorCount; + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHAddPartitionSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d \r\n"), rc,pdev->bAtaDevNum)); + + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHAddPartition(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_PartitionFormatInfoAPI* partInfo = (DOCH_PartitionFormatInfoAPI*)(ioreq->irData); + DOCH_Socket* pdev; + FLDword reqSize = partInfo->nPartitionSize; + FLDword tempPartNum = 0; + FLBoolean dev0MightBeFull = FALSE; + FLByte tempLastPartOnDev0 = 0; + FLByte origDevNum; + FLByte partialDev0Part; + DOCH_DeviceInfo tempDOCDI; + + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + origDevNum = pdev->bAtaDevNum; + + /*If 2nd floor is already active - perform on device1*/ + /*===================================================*/ + if((pdev->sSpanData.secondFloorActive) && (pdev->wNumOfDevices > 1)) + { + pdev->bAtaDevNum = 1; + rc = DOCHAddPartitionSingleFloor(ioreq); + pdev->bAtaDevNum = origDevNum; + + /*Update returned partition number*/ + ioreq->irCount += (pdev->sSpanData.bLastPartitionOnDev0); + + if(pdev->sSpanData.bLastDev0PartSpanned) + ioreq->irCount -= 1; + + return rc; + } + + /*If requested size = 0, Add to both Dev0 and Dev1*/ + /*================================================*/ + /*Try adding to Dev0 with size=0*/ + + + if(reqSize == 0) + { + /*Dev0*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + /* if there are two floors and fast area was specified in percents + fast area requested might exceed first floor -must be translated to sectors*/ + if(((pdev->wNumOfDevices > 1)) + &&(partInfo->dwFastAreaSizeType==DOCH_FAST_AREA_TYPE_PERCENT) + && (partInfo->nFastAreaSize)&& (partInfo->nFastAreaSize < 100)) + { + /* Cannot add spanned partition with requested fast area specified in percents */ + DBG_PRINT_ERR(FLZONE_API, "DOCHAddPartition(): Cannot add spanned partition with requested fast area specified in percents\r\n"); + return DOCH_GeneralFailure; + + } + ioreq2.irData = ioreq->irData; + rc = DOCHAddPartitionSingleFloor(&ioreq2); + partialDev0Part = (FLByte)ioreq2.irCount; + if(rc != DOCH_OK) + { + /* If operation failed with insufficient space, + check the option of fast area problem*/ + if((pdev->wNumOfDevices > 1)&&(partInfo->nFastAreaSize) + &&(partInfo->dwFastAreaSizeType==DOCH_FAST_AREA_TYPE_SECTORS)) + { + /* add partition with 100 percents fast area to dev0*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffscpy(&partInfoTemp, ioreq->irData, sizeof(partInfoTemp)); + partInfoTemp.dwFastAreaSizeType =DOCH_FAST_AREA_TYPE_PERCENT; + partInfoTemp.nFastAreaSize = 100; + ioreq2.irData = &partInfoTemp; + rc = DOCHAddPartitionSingleFloor(&ioreq2); + partialDev0Part= (FLByte)ioreq2.irCount; + } + if(rc != DOCH_OK) + { + /* If operation failed with insufficient space, + it means last partition that was added filled Dev0 entirely*/ + dev0MightBeFull = TRUE; + tempLastPartOnDev0 = devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0; + } + + } + + /*Insert key (in case the partition was read protected)*/ + if(partInfo->dwGuestAccessMode == DOCH_DEVICE_ACCESS_MODE_NONE) + { + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffsset(&partAccessTemp, 0, sizeof(partAccessTemp)); + + tffscpy(partAccessTemp.bPassword, partInfo->bPasskey, 0x80); + + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (pdev->device[0].wNumOfPartitions-1)); + ioreq2.irData = &partAccessTemp; + + rc = DOCHAccessPartWithPwdSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + } + + if(!dev0MightBeFull) + { + /*If created partition was IPL:*/ + /*1. Delete all partition on dev1*/ + /*2. Create on Dev1 as well*/ + if((pdev->wNumOfDevices > 1) && (partialDev0Part == 0)) + { + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = ioreq->irData; + ioreq2.irLength = 0xFF; + pdev->bAtaDevNum = 1; + rc = DOCHDeletePartitionsSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = ioreq->irData; + pdev->bAtaDevNum = 1; + rc = DOCHAddPartitionSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + } + + /*Make sure returned partition number is correct*/ + devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0 = partialDev0Part; + ioreq->irCount = partialDev0Part; + } + + if(pdev->wNumOfDevices > 1) + { + if(!dev0MightBeFull) + { + /*Get actual size of the newly added partition*/ + tempPartNum = partialDev0Part; + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffsset(&partitionInfoTemp, 0, sizeof(partitionInfoTemp)); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, tempPartNum); + ioreq2.irData = &partitionInfoTemp; + rc = DOCHPartitionInfoSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + } + /*Add User partition to Dev1 with size = 0*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffscpy(&partInfoTemp, ioreq->irData, sizeof(partInfoTemp)); + /*if dwFastAreaSizeType was in percents than nFastAreaSize must be 100 + therefore no need to change partInfoTemp*/ + /*if dwFastAreaSizeType was in sectors - + check how many fast area sectors are needed*/ + if ((partInfo->nFastAreaSize) && (partInfo->dwFastAreaSizeType!=DOCH_FAST_AREA_TYPE_PERCENT)) + { + if (partInfo->nFastAreaSize >partitionInfoTemp.nFastAreaSize) + { + partInfoTemp.nFastAreaSize= partInfo->nFastAreaSize - partitionInfoTemp.nFastAreaSize; + } + else + { + partInfoTemp.nFastAreaSize =0; + } + } + ioreq2.irData = &partInfoTemp; + pdev->bAtaDevNum = 1; + rc = DOCHAddPartitionSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + + /*Update span info structure*/ + /*--------------------------*/ + /*Retrieve current attributes*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = &devUserAttr; + rc = DOCHGetDiskUserAttributes(&ioreq2); + if(rc != DOCH_OK) + return rc; + + /*Set span info*/ + devUserAttr.sdkAttributes.sSpanInfo.bLastDev0PartSpanned = (!dev0MightBeFull);/*TRUE;*/ + devUserAttr.sdkAttributes.sSpanInfo.secondFloorActive = TRUE; + + if(!dev0MightBeFull) + { + devUserAttr.sdkAttributes.sSpanInfo.dwSpanSector = partitionInfoTemp.nPartitionSize; + devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0 = + devUserAttr.sdkAttributes.sSpanInfo.numOfSpannedPartitionOnDev0 = (FLByte)(tempPartNum); + } + else + { + devUserAttr.sdkAttributes.sSpanInfo.dwSpanSector = 0; + devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0 = tempLastPartOnDev0; + } + + /*Set attributes back to the device*/ + gSDKUpdatesDiskAttributes = DOCH_GLOBAL_BOOL_PATTERN; + rc = DOCHSetDiskUserAttributes(&ioreq2); + gSDKUpdatesDiskAttributes = 0; + if(rc != DOCH_OK) + return rc; + + /*Update pdev as well*/ + tffscpy(&pdev->sSpanData, &devUserAttr.sdkAttributes.sSpanInfo, sizeof(pdev->sSpanData)); + + /* Finally - update number of partitions*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = &tempDOCDI; + rc = DOCHIdentifyDiskOnChipDevice(&ioreq2); + pdev->wTotalNumOfPartitions = tempDOCDI.wTotalNumOfPartitions; + if(rc != DOCH_OK) + return rc; + } + + return DOCH_OK; + } + + /*Try adding to Dev0*/ + /*==================*/ + rc = DOCHAddPartitionSingleFloor(ioreq); + if(rc == DOCH_OK) + { + devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0 = (FLByte)(ioreq->irCount); + + /*If created partition was IPL:*/ + /*1. Delete all partition on dev1*/ + /*2. Create on Dev1 as well*/ + if((pdev->wNumOfDevices > 1) && (ioreq->irCount == 0)) + { + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = ioreq->irData; + ioreq2.irLength = 0xFF; + pdev->bAtaDevNum = 1; + rc = DOCHDeletePartitionsSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = ioreq->irData; + pdev->bAtaDevNum = 1; + rc = DOCHAddPartitionSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + } + + return DOCH_OK; + } + else if(pdev->wNumOfDevices > 1) + { + FLDword secondChunkSize = 0; + FLDword dwSecondChunkFastAreaSize = 0; + FLDword dwSecondChunkFastAreaType = 0 ; + /*If Adding entire size on Dev0 failed*/ + /*====================================*/ + /*Try adding to Dev0 with size=0*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffscpy(&partInfoTemp, ioreq->irData, sizeof(partInfoTemp)); + partInfoTemp.nPartitionSize = 0; + if((partInfo->dwFastAreaSizeType==DOCH_FAST_AREA_TYPE_PERCENT) && (partInfo->nFastAreaSize < 100)) + { + partInfoTemp.dwFastAreaSizeType = DOCH_FAST_AREA_TYPE_SECTORS; + partInfoTemp.nFastAreaSize = ((partInfo->nPartitionSize/100) * partInfo->nFastAreaSize); + } + + ioreq2.irData = &partInfoTemp; + rc = DOCHAddPartitionSingleFloor(&ioreq2); + partialDev0Part = (FLByte)ioreq2.irCount; + if(rc != DOCH_OK) + { + /*Checking if Fast Area is too big for Dev#0*/ + /*Try adding to Dev0 with size=0 and Fast Area size 100 percent */ + if(partInfo->nFastAreaSize) + { + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffscpy(&partInfoTemp, ioreq->irData, sizeof(partInfoTemp)); + partInfoTemp.nPartitionSize = 0; + partInfoTemp.dwFastAreaSizeType = DOCH_FAST_AREA_TYPE_PERCENT; + partInfoTemp.nFastAreaSize = 100; + ioreq2.irData = &partInfoTemp; + rc = DOCHAddPartitionSingleFloor(&ioreq2); + partialDev0Part = (FLByte)ioreq2.irCount; + } + if(rc != DOCH_OK) + { + /* If operation failed with insufficient space or there is no Fast Area, + it means last partition that was added filled Dev0 entirely*/ + dev0MightBeFull = TRUE; + tempLastPartOnDev0 = devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0; + /*return rc;*/ + } + } + + if(!dev0MightBeFull) + { + /*Insert key (in case the partition was read protected)*/ + if(partInfoTemp.dwGuestAccessMode == DOCH_DEVICE_ACCESS_MODE_NONE) + { + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffsset(&partAccessTemp, 0, sizeof(partAccessTemp)); + + tffscpy(partAccessTemp.bPassword, partInfoTemp.bPasskey, 0x80); + + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (pdev->device[0].wNumOfPartitions-1)); + ioreq2.irData = &partAccessTemp; + + rc = DOCHAccessPartWithPwdSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + } + + /*Make sure returned partition number is correct*/ + ioreq->irCount = partialDev0Part; + + /*Get actual size of the newly added partition*/ + tempPartNum = partialDev0Part; + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffsset(&partitionInfoTemp, 0, sizeof(partitionInfoTemp)); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, tempPartNum); + ioreq2.irData = &partitionInfoTemp; + rc = DOCHPartitionInfoSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + /*checking remaining size of fast area for Dev#1*/ + if(partInfo->dwFastAreaSizeType != DOCH_FAST_AREA_TYPE_PERCENT) + { + if(partInfo->nFastAreaSize > partitionInfoTemp.nPartitionSize) + { + dwSecondChunkFastAreaSize = partInfo->nFastAreaSize - partitionInfoTemp.nPartitionSize; + } + else + { + dwSecondChunkFastAreaSize = 0; + } + dwSecondChunkFastAreaType = partInfo->dwFastAreaSizeType; + } + else + { + if(partInfo->nFastAreaSize == 100) + { + dwSecondChunkFastAreaSize = 100; + dwSecondChunkFastAreaType = DOCH_FAST_AREA_TYPE_PERCENT; + } + else + { + dwSecondChunkFastAreaSize = ((partInfo->nFastAreaSize * (partInfo->nPartitionSize/100)) - partitionInfoTemp.nFastAreaSize); + dwSecondChunkFastAreaType = DOCH_FAST_AREA_TYPE_SECTORS; + } + } + secondChunkSize = (reqSize - partitionInfoTemp.nPartitionSize); + } + else + {/*Partition is not spanned - will reside on second floor*/ + secondChunkSize = reqSize; + dwSecondChunkFastAreaSize = partInfo->nFastAreaSize; + dwSecondChunkFastAreaType = partInfo->dwFastAreaSizeType; + } + + /*Try adding to Dev1 with size=secondChunkSize*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + tffscpy(&partInfoTemp, ioreq->irData, sizeof(partInfoTemp)); + partInfoTemp.nPartitionSize = secondChunkSize; + partInfoTemp.nFastAreaSize = dwSecondChunkFastAreaSize; + partInfoTemp.dwFastAreaSizeType = dwSecondChunkFastAreaType; + ioreq2.irData = &partInfoTemp; + + pdev->bAtaDevNum = 1; + rc = DOCHAddPartitionSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + + /*Update span info structure*/ + /*--------------------------*/ + /*Retrieve current attributes*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = &devUserAttr; + rc = DOCHGetDiskUserAttributes(&ioreq2); + if(rc != DOCH_OK) + return rc; + + /*Set span info*/ + devUserAttr.sdkAttributes.sSpanInfo.secondFloorActive = TRUE; + + if(!dev0MightBeFull) + { + devUserAttr.sdkAttributes.sSpanInfo.dwSpanSector = partitionInfoTemp.nPartitionSize; + devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0 = + devUserAttr.sdkAttributes.sSpanInfo.numOfSpannedPartitionOnDev0 = (FLByte)(tempPartNum); + devUserAttr.sdkAttributes.sSpanInfo.bLastDev0PartSpanned = TRUE; + + } + else + { + devUserAttr.sdkAttributes.sSpanInfo.dwSpanSector = 0; + devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0 = tempLastPartOnDev0; + devUserAttr.sdkAttributes.sSpanInfo.bLastDev0PartSpanned = FALSE; + } + + /*Set attributes back to the device*/ + gSDKUpdatesDiskAttributes = DOCH_GLOBAL_BOOL_PATTERN; + rc = DOCHSetDiskUserAttributes(&ioreq2); + gSDKUpdatesDiskAttributes = 0; + if(rc != DOCH_OK) + return rc; + + /*Update pdev as well*/ + tffscpy(&pdev->sSpanData, &devUserAttr.sdkAttributes.sSpanInfo, sizeof(pdev->sSpanData)); + + /* Finally - update number of partitions*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = &tempDOCDI; + rc = DOCHIdentifyDiskOnChipDevice(&ioreq2); + pdev->wTotalNumOfPartitions = tempDOCDI.wTotalNumOfPartitions; + if(rc != DOCH_OK) + return rc; + } + else + { + return DOCH_GeneralFailure; + } + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H U n f o r m a t D e v i c e */ +/* */ +/* Unformats DOCH device. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_DELETE_PARTITIONS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHUnformatSingleDevice(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; + + /*1. Delete all partitions */ + /*=========================*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq2, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + ioreq2.irCount = 0; + ioreq2.irLength = 0xFF; + ioreq2.irFlags = DOCH_COMPLETE_PARTITION_DELETE; + + rc = DOCHDeletePartitions(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHUnformatDevice(): DOCHDeletePartitions() failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return rc; + } + + /*2. Delete Disk Attributes */ + /*==========================*/ + tffsset(¤tAttributes, 0, sizeof(currentAttributes)); + tffsset(&ioreq2, 0, sizeof(ioreq2)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq2, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + ioreq2.irData = currentAttributes; + + gSDKUpdatesDiskAttributes = DOCH_GLOBAL_BOOL_PATTERN; + rc = DOCHSetDiskUserAttributes(&ioreq2); + gSDKUpdatesDiskAttributes = 0; + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHUnformatDevice(): DOCHSetDiskUserAttributes() failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return rc; + } + + return DOCH_OK; +} + +DOCH_Error DOCHUnformatDevice(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte origDevNum; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + origDevNum = pdev->bAtaDevNum; + + pdev->bAtaDevNum = 0; + rc = DOCHUnformatSingleDevice(ioreq); + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + + if(pdev->wNumOfDevices > 1) + { + pdev->bAtaDevNum = 1; + rc = DOCHUnformatSingleDevice(ioreq); + pdev->bAtaDevNum = 0; + + if(rc != DOCH_OK) + return rc; + } + + /*Update span info structure*/ + /*--------------------------*/ + pdev->bAtaDevNum = 0; + + /*Retrieve current attributes*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = &devUserAttr; + rc = DOCHGetDiskUserAttributes(&ioreq2); + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + + /*Set span info*/ + devUserAttr.sdkAttributes.sSpanInfo.bLastDev0PartSpanned = FALSE; + devUserAttr.sdkAttributes.sSpanInfo.secondFloorActive = FALSE; + devUserAttr.sdkAttributes.sSpanInfo.dwSpanSector = 0; + devUserAttr.sdkAttributes.sSpanInfo.bLastPartitionOnDev0 = + devUserAttr.sdkAttributes.sSpanInfo.numOfSpannedPartitionOnDev0 = 0; + + /*Set attributes back to the device*/ + gSDKUpdatesDiskAttributes = DOCH_GLOBAL_BOOL_PATTERN; + rc = DOCHSetDiskUserAttributes(&ioreq2); + gSDKUpdatesDiskAttributes = 0; + if(rc != DOCH_OK) + { + pdev->bAtaDevNum = origDevNum; + return rc; + } + + /*Update pdev as well*/ + tffscpy(&pdev->sSpanData, &devUserAttr.sdkAttributes.sSpanInfo, sizeof(pdev->sSpanData)); + + pdev->bAtaDevNum = origDevNum; + + return DOCH_OK; +} + + +/*----------------------------------------------------------------------*/ +/* D O C H W r i t e I P L */ +/* */ +/* Writes IPL partition. */ +/* Sets IPL mode and size. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irFlags : DOCH_IPL_MODE_NORMAL_RAM */ +/* DOCH_IPL_MODE_PAGED_RAM */ +/* DOCH_IPL_MODE_VIRTUAL_RAM */ +/* DOCH_IPL_MODE_CS_DELAY */ +/* DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT */ +/* DOCH_IPL_MODE_ACTIVE_SWAP_BYTES */ +/* DOCH_IPL_MODE_8KB_WINDOW */ +/* DOCH_IPL_WRITE_FIRST_CHUNK */ +/* irCount : Max IPL size */ +/* Up to 32KB for Normal Mode */ +/* Up to 128KB for Virtual Mode */ +/* Up to 256KB for Paged Mode */ +/* irLength : Current chunk length (in sectors) */ +/* irData : Pointer to user buffer (length defined by */ +/* irLength) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* DOCH_SET_CUSTOM_PARAM */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHWriteIPLSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + FLBoolean firstChunk = ((ioreq->irFlags & DOCH_IPL_WRITE_FIRST_CHUNK) == DOCH_IPL_WRITE_FIRST_CHUNK); + DOCH_Socket* pdev; + + FLSDword total_num_of_sectors; + FLSDword sectorNumber; + FLSNative sectors_written_so_far; + FLByte* buf_ptr; + FLSNative buf_offset; + + FLByte deviceNum = 0; + + Addressing_Values_s addr_vals; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + + FLByte operationRetries = 0; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + if(firstChunk && (pdev->bAtaDevNum == 0)) + { + /*1. Set IPL BOOT Mode */ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irCount = DOCH_CP_BOOT_MODE; + ioreq2.irSectorNo = (FLWord)(ioreq->irFlags); + ioreq2.irFlags = DOCH_CUSTOM_PARAM_DEFAULT; + rc = DOCHSetCustomParameter(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteIPLSingleFloor(): DOCHSetCustomParameter(Boot Mode) failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return rc; + } + + /*2. Set IPL MAX Size */ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irCount = DOCH_CP_XIP_MAX_SIZE; + ioreq2.irSectorNo = ioreq->irCount; + ioreq2.irFlags = DOCH_CUSTOM_PARAM_DEFAULT; + rc = DOCHSetCustomParameter(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteIPLSingleFloor(): DOCHSetCustomParameter(XIP Size) failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return rc; + } + + gIPLChunkOffsetInSectors = 0; + } + + /*3. Write chunk of data */ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irData = ioreq->irData; + ioreq2.irSectorNo = gIPLChunkOffsetInSectors; + ioreq2.irSectorCount = ioreq->irLength; + + /*Sector arithmetic*/ + /*-----------------*/ + total_num_of_sectors = ioreq2.irSectorCount; + sectorNumber = ioreq2.irSectorNo; + sectors_written_so_far = 0; + + /*Buffer to write from*/ + /*--------------------*/ + buf_ptr = (FLByte*)ioreq2.irData; + buf_offset = 0; + + deviceNum = pdev->bAtaDevNum; + + /*Sanity Check*/ + /*------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(&ioreq2) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*Enable interrupts*/ + /*-----------------*/ + pdev->bUseInterrupt = TRUE; + + + /*Set DMA and Burst modes according to request*/ + /*--------------------------------------------*/ + pdev->bUseDMA = (((ioreq2.irFlags & DOCH_USE_DMA) == DOCH_USE_DMA) && + (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN) && + (DOCH_DMA_CHECK_BUFFER(buf_ptr, total_num_of_sectors))); + + pdev->bUseBurst = ((ioreq2.irFlags & DOCH_USE_BURST) == DOCH_USE_BURST); + + /*Perform write cycles in DOCH_MAX_SECTORS quantities*/ + /*---------------------------------------------------*/ + while(total_num_of_sectors > 0) + { + FLSNative sectors_this_cycle; + + if(total_num_of_sectors > DOCH_MAX_SECTORS) + sectors_this_cycle = DOCH_MAX_SECTORS; + else + sectors_this_cycle = total_num_of_sectors; + +dochWriteRetryPointDev1Only: + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc = dochCheckPFSymptom(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(&ioreq2), deviceNum, TRUE); + if(rc != DOCH_OK) + return rc; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + /*Perform 1 operation cycle*/ + /*=========================*/ + + /*Set ATA addressing registers*/ + /*---------------------------*/ + DOCH_SET_ATA_ADDRESS_VALUES(addr_vals, sectorNumber, deviceNum); + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(&ioreq2); + if(sectors_this_cycle < DOCH_MAX_SECTORS) + in_regs.bSectorCount = sectors_this_cycle; + else + in_regs.bSectorCount = 0; /*DOCH_MAX_SECTORS*/ + + in_regs.bSectorNumber = addr_vals.bSecNum; + in_regs.bCylLow = addr_vals.bCylLow; + in_regs.bCylHigh = addr_vals.bCylHi; + in_regs.bDriveHead = addr_vals.bDevHead; + in_regs.bCommandStatus = DOCH_VSCMD_WRITE_PARTITION; + + /*Activate ATA command*/ + /*--------------------*/ + #ifdef DOCH_DMA_CONFIG + DOCH_OPEN_DMA_CHANNEL + #endif /*DOCH_DMA_CONFIG*/ + + /*Perform ATA command*/ + rc = io_output (pdev, deviceNum, &in_regs, (void*)(&buf_ptr[buf_offset]), sectors_this_cycle); + + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteIPLSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device num: %d\r\n"), rc,pdev->bAtaDevNum)); + + rc= get_out_registers(pdev, deviceNum, &out_regs); + + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteIPLSingleFloor(): failed with status(retrieved from out register): "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d \r\n"), rc , deviceNum)); + + if( ((rc & DOCH_ATA_ERROR_ADDRESS_MARK_NOT_FOUND) == DOCH_ATA_ERROR_ADDRESS_MARK_NOT_FOUND) && + (operationRetries++ < 4) + ) + goto dochWriteRetryPointDev1Only; + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + /*Cancel DMA and Burst modes*/ + /*--------------------------*/ + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + + pdev->bAtaDevNum = 0; + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + } + + /*Update feedback values*/ + /*----------------------*/ + sectors_written_so_far += sectors_this_cycle; + + /*For next possible cycle*/ + /*-----------------------*/ + sectorNumber += sectors_this_cycle; + total_num_of_sectors -= sectors_this_cycle; + buf_offset += sectors_this_cycle * DOCH_SECTOR_SIZE; + + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc = dochCheckPFSymptom(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(&ioreq2), deviceNum, FALSE); + if(rc != DOCH_OK) + return rc; + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + } + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + /*Cancel DMA and Burst modes*/ + /*--------------------------*/ + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + + +#if 0 /*Cant verify IPL writing - IPL must be written continuosly, without read operations in between write operations*/ + + /*If verify was define, perform verify operation with same parameters*/ + /*-------------------------------------------------------------------*/ + if(gDochVerifyWrite[DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(&ioreq2)] == DOCH_GLOBAL_BOOL_PATTERN) + { + IOreq ioreq3; + FLByte* verBufOrig; + FLByte i; + + tffsset(&ioreq3, 0, sizeof(ioreq3)); + tffscpy(&ioreq3.irHandle, &ioreq2.irHandle, sizeof(ioreq3.irHandle)); + ioreq3.irData = verifyBuf; + verBufOrig = (FLByte*)(ioreq2.irData); + + for(i=0; ibAtaDevNum)); + + return rc; + } + + if((pdev->bAtaDevNum == 1) || (pdev->wNumOfDevices == 1)) + gIPLChunkOffsetInSectors += ioreq->irLength; + + return rc; +} + +DOCH_Error DOCHWriteIPL(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + pdev->bAtaDevNum = 0; + rc = DOCHWriteIPLSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + + if(pdev->wNumOfDevices > 1) + { + pdev->bAtaDevNum = 1; + rc = DOCHWriteIPLSingleFloor(ioreq); + pdev->bAtaDevNum = 0; + } + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H R e a d I P L */ +/* */ +/* Read specified sectors from IPL partition. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : First sector to read */ +/* irLength : Number of sectors to read */ +/* irData : Pointer to user buffer (length defined by */ +/* irLength) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* DOCH_SET_CUSTOM_PARAM */ +/* */ +/* Returns: */ +/* irFlags : DOCH_IPL_MODE_NORMAL_RAM */ +/* DOCH_IPL_MODE_PAGED_RAM */ +/* DOCH_IPL_MODE_VIRTUAL_RAM */ +/* DOCH_IPL_MODE_CS_DELAY */ +/* DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT */ +/* DOCH_IPL_MODE_ACTIVE_SWAP_BYTES */ +/* DOCH_IPL_MODE_8KB_WINDOW */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReadIPL(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; + + tffsset(&ioreq2, 0, sizeof(ioreq2)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq2, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + ioreq2.irData = ioreq->irData; + ioreq2.irSectorNo = ioreq->irCount; + ioreq2.irSectorCount = ioreq->irLength; + + /*1. Retrieve IPL data */ + rc = DOCHReadPartitionSectors(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadIPL(): DOCHReadPartitionSectors() failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return rc; + } + + /*2. Retrieve IPL Mode */ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irCount = DOCH_CP_BOOT_MODE; + ioreq2.irFlags = DOCH_CUSTOM_PARAM_DEFAULT; + rc = DOCHGetCustomParameter(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadIPL(): DOCHGetCustomParameter() failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return rc; + } + + ioreq->irFlags = ioreq2.irLength; + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/*D O C H R e a d P a r t i t i o n S e c t o r s S i n g l e F l o o r */ +/* */ +/* Reads sectors by sector no from a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to read into */ +/* irSectorNo : First sector no. to read. */ +/* irSectorCount : Number of consecutive sectors to read */ +/* irFlags : DOCH_USE_DMA */ +/* DOCH_USE_BURST */ +/* Note: 4 methods of data transfer are */ +/* available: */ +/* Normal transfer */ +/* DMA transfer */ +/* Burst transfer */ +/* DMA & Burst transfer */ +/* pdev->bAtaDevNum : Floor number */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_READ_PARTITION */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors NOT read (in case of an */ +/* error - this number may not be accurate) */ +/*----------------------------------------------------------------------*/ +static DOCH_Error DOCHReadPartitionSectorsSingleFloor(IOreq* ioreq) +{ + /*parameters*/ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + FLByte socketNum =DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq); + FLByte deviceNum = 0; + + /*loop and feedback variables*/ + FLSDword total_num_of_sectors; + FLSDword sectorNumber; + FLSNative sectors_read_so_far; + FLByte* buf_ptr; + FLSNative buf_offset; + + /*internal data structures*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + Addressing_Values_s addr_vals; + + DOCH_get_socket(pdev, socketNum); + + /* General sequence: + 1. Sector arithmetic + 2. Setting buffer + 3. Sanity Check + 4. handle DMA, Burst, Interrupts + 5. Read sectors in DOCH_MAX_SECTORS quantities + 5.1 Set ATA addressing registers + 5.2 Update ATA register values + 5.3 Activate ATA command + 5.4 Update feedback values + 5.5 Update loop variables for next possible cycle + Disable interrupts + 6. Disable DMA,Burst and interrupts + 7. Return actual number of read sectors + */ + + + /*1. Sector arithmetic*/ + /*--------------------*/ + total_num_of_sectors = ioreq->irSectorCount; + sectorNumber = ioreq->irSectorNo; + sectors_read_so_far = 0; + + /*2. Setting buffer*/ + /*-----------------*/ + buf_ptr = (FLByte*)ioreq->irData; + buf_offset = 0; + + deviceNum = pdev->bAtaDevNum; + + /*3. Sanity Check */ + /*----------------*/ + + /*Check if Partition exceeds number of existing partitions*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*If a negative number of sectors was requested - return error*/ + if(total_num_of_sectors < 0) + return DOCH_BadParameter; + + /* 4. handle DMA, Burst, Interrupts */ + /*------------------------------------*/ + /*Set DMA and Burst modes according to request*/ + pdev->bUseDMA = (((ioreq->irFlags & DOCH_USE_DMA) == DOCH_USE_DMA) && + (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN) && + (DOCH_DMA_CHECK_BUFFER(buf_ptr, total_num_of_sectors))); + + pdev->bUseBurst = ((ioreq->irFlags & DOCH_USE_BURST) == DOCH_USE_BURST); + +#ifdef DOCH_USE_BURST_MODE_READ_ONLY_IN_DMA + if (!pdev->bUseDMA) + { + pdev->bUseBurst= FALSE; + } +#endif /*DOCH_USE_BURST_MODE_READ_ONLY_IN_DMA*/ + + + /*Enable interrupts if DMA is enabled*/ + if(pdev->bUseDMA) + { + pdev->bUseInterrupt = TRUE; + + } + + /*5. Read sectors in DOCH_MAX_SECTORS quantities*/ + /*----------------------------------------------*/ + while(total_num_of_sectors > 0) + { + FLSNative sectors_this_cycle; + + if(total_num_of_sectors > DOCH_MAX_SECTORS) + sectors_this_cycle = DOCH_MAX_SECTORS; + else + sectors_this_cycle = total_num_of_sectors; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc = dochCheckPFSymptom(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), deviceNum, TRUE); + if(rc != DOCH_OK) + return rc; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + /*Perform 1 operation cycle*/ + /*=========================*/ + + /*5.1 Set ATA addressing registers*/ + /*--------------------------------*/ + DOCH_SET_ATA_ADDRESS_VALUES(addr_vals, sectorNumber, deviceNum); + + /*5.2 Update ATA register values*/ + /*------------------------------*/ + in_regs.bFeaturesError = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + if(sectors_this_cycle < DOCH_MAX_SECTORS) + in_regs.bSectorCount = sectors_this_cycle; + else + in_regs.bSectorCount = 0; /*DOCH_MAX_SECTORS*/ + + in_regs.bSectorNumber = addr_vals.bSecNum; + in_regs.bCylLow = addr_vals.bCylLow; + in_regs.bCylHigh = addr_vals.bCylHi; + in_regs.bDriveHead = addr_vals.bDevHead; + in_regs.bCommandStatus = DOCH_VSCMD_READ_PARTITION; + + /*5.3 Activate ATA command*/ + /*------------------------*/ + #ifdef DOCH_DMA_CONFIG + DOCH_OPEN_DMA_CHANNEL + #endif /*DOCH_DMA_CONFIG*/ + + /*Perform ATA command*/ + rc = io_input (pdev, deviceNum, &in_regs, (void*)(&buf_ptr[buf_offset]), sectors_this_cycle); + + if(rc != DOCH_OK) + { + DOCH_Error rc2; + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): io_input failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + /*Disable DMA,Burst, interrupts */ + /*-----------------------------*/ + pdev->bUseInterrupt = FALSE; + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc2 = dochCheckPFSymptom(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), deviceNum, FALSE); + if(rc2 != DOCH_OK) + return rc2; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + if(rc == DOCH_TimedOut) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): io_input returned DOCH_TimedOut! \r\n "); + return rc; + } + + rc2 = get_out_registers(pdev, deviceNum, &out_regs); + + if(rc2 != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc2)); + + if((rc2 & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc2 & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + + return rc; + } + + /*5.4 Update feedback values*/ + /*--------------------------*/ + sectors_read_so_far += sectors_this_cycle; + + /*5.5 Update loop variables for next possible cycle*/ + /*-------------------------------------------------*/ + sectorNumber += sectors_this_cycle; + total_num_of_sectors -= sectors_this_cycle; + buf_offset += sectors_this_cycle * DOCH_SECTOR_SIZE; + + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc = dochCheckPFSymptom(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), deviceNum, FALSE); + if(rc != DOCH_OK) + return rc; + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + } /* end of loop */ + + /*6. Disable DMA,Burst and interrupts*/ + /*-----------------------------------*/ + pdev->bUseInterrupt = FALSE; + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + + + /*7. Return actual number of read sectors*/ + /*---------------------------------------*/ + ioreq->irSectorCount = sectors_read_so_far; + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* D O C H R e a d P a r t i t i o n S e c t o r s */ +/* */ +/* Reads sectors by sector no from a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to read into */ +/* irSectorNo : First sector no. to read. */ +/* irSectorCount : Number of consecutive sectors to read */ +/* irFlags : DOCH_USE_DMA */ +/* DOCH_USE_BURST */ +/* Note: 4 methods of data transfer are */ +/* available: */ +/* Normal transfer */ +/* DMA transfer */ +/* Burst transfer */ +/* DMA & Burst transfer */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_READ_PARTITION */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors NOT read (in case of an */ +/* error - this number may not be accurate) */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReadPartitionSectors(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + if(pdev == NULL) + return DOCH_AdapterNotFound; + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV0) + { + pdev->bAtaDevNum=0; + rc= DOCHReadPartitionSectorsSingleFloor(ioreq); + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): DOCHReadPartitionSectorsSingleFloor returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): Failure on partition that resides ENTIRELY on Dev0 "); + } + return rc; + } + + /*If partition resides ENTIRELY on Dev1*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV1) + { + IOreq ioreq2; + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + + rc= DOCHReadPartitionSectorsSingleFloor(&ioreq2); + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): DOCHReadPartitionSectorsSingleFloor returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): Failure on partition that resides ENTIRELY on Dev1 "); + } + ioreq->irSectorCount =ioreq2.irSectorCount; + pdev->bAtaDevNum = 0; + return rc; + } + + /*If partition is spanned - collect both infos and combine*/ + /*========================================================*/ + if(DOCH_PARTITION_IS_SPANNED) + { + IOreq ioreq2; + FLDword sectorsToReadFromFirstChunk; + FLDword sectorsToReadFromSecondChunk; + + /*irLength => First sector to read*/ + /*irCount => Number of sectors to read*/ + if( ((FLDword)((ioreq->irLength + ioreq->irCount))) > pdev->sSpanData.dwSpanSector) + { + if(((FLDword)ioreq->irLength) >= pdev->sSpanData.dwSpanSector) + { + sectorsToReadFromFirstChunk = 0; + sectorsToReadFromSecondChunk = ioreq->irCount; + + } + else + { + sectorsToReadFromFirstChunk = (pdev->sSpanData.dwSpanSector - ioreq->irLength); + sectorsToReadFromSecondChunk = (ioreq->irCount - sectorsToReadFromFirstChunk); + } + } + else + { + sectorsToReadFromFirstChunk = ioreq->irCount; + sectorsToReadFromSecondChunk = 0; + } + + ioreq->irSectorCount =0; + + /*Read first chunk from Dev0*/ + /*--------------------------*/ + if(sectorsToReadFromFirstChunk > 0) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irCount = sectorsToReadFromFirstChunk; + pdev->bAtaDevNum = 0; + rc= DOCHReadPartitionSectorsSingleFloor(&ioreq2); + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): DOCHReadPartitionSectorsSingleFloor returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): Failure on spanned partition when reading chunk from Dev0 "); + return rc; + } + ioreq->irSectorCount =ioreq2.irSectorCount; + + } + + /*Read 2nd chunk from Dev1*/ + /*------------------------*/ + if(sectorsToReadFromSecondChunk > 0) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irCount = sectorsToReadFromSecondChunk; + + if(sectorsToReadFromFirstChunk > 0) + ioreq2.irLength = 0; + else + { + ioreq2.irLength = (ioreq->irLength - pdev->sSpanData.dwSpanSector); + } + ioreq2.irData = (FLByte*)ioreq->irData + (sectorsToReadFromFirstChunk<sSpanData.numOfSpannedPartitionOnDev0 + 1)); + + pdev->bAtaDevNum = 1; + + rc= DOCHReadPartitionSectorsSingleFloor(&ioreq2); + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): DOCHReadPartitionSectorsSingleFloor returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + DBG_PRINT_ERR(FLZONE_API, "DOCHReadPartitionSectors(): Failure on spanned partition when reading chunk from Dev1 "); + } + pdev->bAtaDevNum = 0; + ioreq->irSectorCount +=ioreq2.irSectorCount; + return rc; + } + } + + return DOCH_OK; +} + +/*-----------------------------------------------------------------------*/ +/*D O C H W r i t e P a r t i t i o n S e c t o r s S i n g l e F l o o r*/ +/* */ +/* Writes sectors by sector no to a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* irFlags : DOCH_USE_DMA */ +/* DOCH_USE_BURST */ +/* Note: 4 methods of data transfer are */ +/* available: */ +/* Normal transfer */ +/* DMA transfer */ +/* Burst transfer */ +/* DMA & Burst transfer */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors NOT read (in case of an */ +/* error - this number may not be accurate) */ +/*-----------------------------------------------------------------------*/ +DOCH_Error DOCHWritePartitionSectorsSingleFloor(IOreq* ioreq) +{ + /* parameters */ + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + FLByte socketNum=DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq); + DOCH_Error rc = DOCH_OK; + FLByte deviceNum = 0; + DOCH_Socket* pdev; + + /*loop and feedback variables*/ + FLSDword total_num_of_sectors; + FLSDword sectorNumber; + FLSNative sectors_written_so_far; + FLByte* buf_ptr; + FLSNative buf_offset; + FLByte operationRetries = 0; + + /*internal data structures*/ + Addressing_Values_s addr_vals; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + +#ifdef FL_VERIFY_WRITE + IOreq ioreq2; + FLByte* verBufOrig; + register int i; +#endif /*FL_VERIFY_WRITE*/ + + /* General sequence: + 1. Sector arithmetic + 2. Setting buffer + 3. Sanity Check + 4. handle DMA, Burst and Interrupts + 5. Perform write cycles in DOCH_MAX_SECTORS quantities + 5.1 Set ATA addressing registers + 5.2 Update ATA register values + 5.3 Activate ATA command + 5.4 Update feedback values + 5.5 Update loop variables for next possible cycle + 6. Disable DMA and Burst and Interrupts. + 7. If verify was define, perform verify operation with same parameters + 8. Return actual number of written sectors + */ + + DOCH_get_socket(pdev, socketNum); + deviceNum = pdev->bAtaDevNum; + + + /*1. Sector arithmetic*/ + /*-----------------*/ + total_num_of_sectors = ioreq->irSectorCount; + sectorNumber = ioreq->irSectorNo; + sectors_written_so_far = 0; + + /*2. Setting Buffer to write from*/ + /*-------------------------------*/ + buf_ptr = (FLByte*)ioreq->irData; + buf_offset = 0; + + + /*3. Sanity Check*/ + /*---------------*/ + if(partNum >= pdev->device[deviceNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*4. handle DMA, Burst and Interrupts*/ + /*-----------------------------------*/ + + /*Enable interrupts*/ + pdev->bUseInterrupt = TRUE; + + /*Set DMA and Burst modes according to request*/ + pdev->bUseDMA = (((ioreq->irFlags & DOCH_USE_DMA) == DOCH_USE_DMA) && + (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN) && + (DOCH_DMA_CHECK_BUFFER(buf_ptr, total_num_of_sectors))); + + pdev->bUseBurst = ((ioreq->irFlags & DOCH_USE_BURST) == DOCH_USE_BURST); + + /*5. Perform write cycles in DOCH_MAX_SECTORS quantities*/ + /*------------------------------------------------------*/ + while(total_num_of_sectors > 0) + { + FLSNative sectors_this_cycle; + + if(total_num_of_sectors > DOCH_MAX_SECTORS) + sectors_this_cycle = DOCH_MAX_SECTORS; + else + sectors_this_cycle = total_num_of_sectors; + +dochWriteRetryPoint: + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc = dochCheckPFSymptom(socketNum, deviceNum, TRUE); + if(rc != DOCH_OK) + return rc; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + /*Perform 1 operation cycle*/ + /*=========================*/ + + /*5.1 Set ATA addressing registers*/ + /*--------------------------------*/ + DOCH_SET_ATA_ADDRESS_VALUES(addr_vals, sectorNumber, deviceNum); + + /*5.2 Update ATA register values*/ + /*------------------------------*/ + in_regs.bFeaturesError = partNum; + if(sectors_this_cycle < DOCH_MAX_SECTORS) + in_regs.bSectorCount = sectors_this_cycle; + else + in_regs.bSectorCount = 0; /*DOCH_MAX_SECTORS*/ + + in_regs.bSectorNumber = addr_vals.bSecNum; + in_regs.bCylLow = addr_vals.bCylLow; + in_regs.bCylHigh = addr_vals.bCylHi; + in_regs.bDriveHead = addr_vals.bDevHead; + in_regs.bCommandStatus = DOCH_VSCMD_WRITE_PARTITION; + + /*5.3 Activate ATA command*/ + /*------------------------*/ + #ifdef DOCH_DMA_CONFIG + DOCH_OPEN_DMA_CHANNEL + #endif /*DOCH_DMA_CONFIG*/ + + /*Perform ATA command*/ + rc = io_output (pdev, deviceNum, &in_regs, (void*)(&buf_ptr[buf_offset]), sectors_this_cycle); + + if(rc != DOCH_OK) + { + DOCH_Error rc2 = DOCH_OK; + + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectorsSingleFloor(): io_output returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d \r\n"), rc,deviceNum)); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("parameters: irHandle:%d ,irSectorNo:%d, irSectorConut:%d \r\n"), ioreq->irHandle,ioreq->irSectorNo,ioreq->irSectorCount)); + + /* Disable DMA,BURST and interrupts */ + /************************************/ + pdev->bUseInterrupt = FALSE; + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc2 = dochCheckPFSymptom(socketNum, deviceNum, FALSE); + if(rc2 != DOCH_OK) + return rc2; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + if(rc == DOCH_TimedOut) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectorsSingleFloor(): io_output returned DOCH_TimedOut! \r\n "); + return rc; + } + + rc2 = get_out_registers(pdev, deviceNum, &out_regs); + + if(rc2 != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): failed with status (retrieved from register): "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc2)); + + if( ((rc2 & DOCH_ATA_ERROR_ADDRESS_MARK_NOT_FOUND) == DOCH_ATA_ERROR_ADDRESS_MARK_NOT_FOUND) && + (operationRetries++ < 4) + ) + goto dochWriteRetryPoint; + + /*pdev->bAtaDevNum = 0;*/ + + if((rc2 & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc2 & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + return rc; + } /*rc != DOCH_OK*/ + + /*5.4 Update feedback values*/ + /*--------------------------*/ + sectors_written_so_far += sectors_this_cycle; + + /*5.5 Update loop variables for next possible cycle*/ + /*-------------------------------------------------*/ + sectorNumber += sectors_this_cycle; + total_num_of_sectors -= sectors_this_cycle; + buf_offset += sectors_this_cycle * DOCH_SECTOR_SIZE; + + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc = dochCheckPFSymptom(socketNum, deviceNum, FALSE); + if(rc != DOCH_OK) + return rc; + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + } /* while(total_num_of_sectors > 0) */ + + /*6. Disable DMA and Burst and Interrupts*/ + /*---------------------------------------*/ + pdev->bUseInterrupt = FALSE; + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + +#ifdef FL_VERIFY_WRITE + /*7. If verify was define, perform verify operation with same parameters*/ + /*----------------------------------------------------------------------*/ + if(gDochVerifyWrite[socketNum] == DOCH_GLOBAL_BOOL_PATTERN) + { + DBG_PRINT_FLOW(FLZONE_API, "DOCHWritePartitionSectorsSingleFloor(): verify write\r\n"); + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffscpy(&ioreq2.irHandle, &ioreq->irHandle, sizeof(ioreq2.irHandle)); + ioreq2.irData = verifyBuf; + verBufOrig = (FLByte*)(ioreq->irData); + + for(i=0; iirSectorCount; i++) + { + ioreq2.irSectorCount = 1; + ioreq2.irSectorNo = (ioreq->irSectorNo + i); + rc = DOCHReadPartitionSectorsSingleFloor(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectorsSingleFloor(): DOCHReadPartitionSectors() failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc,deviceNum)); + + return rc; + } + + if(tffscmp(verifyBuf, verBufOrig, DOCH_SECTOR_SIZE)) + { + DBG_PRINT_ERR(FLZONE_API, "\r\nDOCHWritePartitionSectorsSingleFloor(): Sector "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("#%d device number:%d "), i,deviceNum)); + DBG_PRINT_ERR(FLZONE_API, "Verify failed ! \r\n"); + + return DOCH_WriteFault; + } + + verBufOrig += DOCH_SECTOR_SIZE; + } + } +#endif /*FL_VERIFY_WRITE*/ + /*8. Return actual number of written sectors*/ + /*------------------------------------------*/ + ioreq->irSectorCount = sectors_written_so_far; + + return rc; + +} + +/*----------------------------------------------------------------------*/ +/* D O C H W r i t e P a r t i t i o n S e c t o r s */ +/* */ +/* Writes sectors by sector no to a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* irFlags : DOCH_USE_DMA */ +/* DOCH_USE_BURST */ +/* Note: 4 methods of data transfer are */ +/* available: */ +/* Normal transfer */ +/* DMA transfer */ +/* Burst transfer */ +/* DMA & Burst transfer */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors NOT read (in case of an */ +/* error - this number may not be accurate) */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHWritePartitionSectors(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + if(pdev == NULL) + return DOCH_AdapterNotFound; + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV0) + { + pdev->bAtaDevNum=0; + rc= DOCHWritePartitionSectorsSingleFloor(ioreq); + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): DOCHWritePartitionSectorsSingleFloor returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): Failure on partition that resides ENTIRELY on Dev0 "); + } + return rc; + } + + /*If partition resides ENTIRELY on Dev1*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV1) + { + IOreq ioreq2; + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc= DOCHWritePartitionSectorsSingleFloor(&ioreq2); + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): DOCHWritePartitionSectorsSingleFloor returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): Failure on partition that resides ENTIRELY on Dev1 "); + } + ioreq->irSectorCount =ioreq2.irSectorCount; + pdev->bAtaDevNum = 0; + return rc; + } + + /*If partition is spanned - collect both infos and combine*/ + /*========================================================*/ + if(DOCH_PARTITION_IS_SPANNED) + { + IOreq ioreq2; + FLDword sectorsToWriteToFirstChunk; + FLDword sectorsToWriteToSecondChunk; + + /*irLength => First sector to read*/ + /*irCount => Number of sectors to read*/ + if( ((FLDword)((ioreq->irLength + ioreq->irCount))) > pdev->sSpanData.dwSpanSector) + { + if(((FLDword)ioreq->irLength) >= pdev->sSpanData.dwSpanSector) + { + sectorsToWriteToFirstChunk = 0; + sectorsToWriteToSecondChunk = ioreq->irCount; + + } + else + { + sectorsToWriteToFirstChunk = (pdev->sSpanData.dwSpanSector - ioreq->irLength); + sectorsToWriteToSecondChunk = (ioreq->irCount - sectorsToWriteToFirstChunk); + } + } + else + { + sectorsToWriteToFirstChunk = ioreq->irCount; + sectorsToWriteToSecondChunk = 0; + } + + ioreq->irSectorCount = 0; + /*Write first chunk to Dev0*/ + /*-------------------------*/ + if(sectorsToWriteToFirstChunk > 0) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irCount = sectorsToWriteToFirstChunk; + pdev->bAtaDevNum = 0; + rc= DOCHWritePartitionSectorsSingleFloor(&ioreq2); + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): DOCHWritePartitionSectorsSingleFloor returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): Failure on spanned partition when writing chunk to Dev0 "); + return rc; + } + ioreq->irSectorCount =ioreq2.irSectorCount; + + }/*end of Write first chunk to Dev0*/ + + /*Write 2nd chunk to Dev1*/ + /*-----------------------*/ + if(sectorsToWriteToSecondChunk > 0) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irCount = sectorsToWriteToSecondChunk; + + /*Fix first sector to read*/ + if(sectorsToWriteToFirstChunk > 0) + ioreq2.irLength = 0; + else + { + ioreq2.irLength = (ioreq->irLength - pdev->sSpanData.dwSpanSector); + } + + ioreq2.irData = (FLByte*)ioreq->irData + (sectorsToWriteToFirstChunk<sSpanData.numOfSpannedPartitionOnDev0 + 1)); + + pdev->bAtaDevNum = 1; + + rc= DOCHWritePartitionSectorsSingleFloor(&ioreq2); + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): DOCHWritePartitionSectorsSingleFloor returned status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + DBG_PRINT_ERR(FLZONE_API, "DOCHWritePartitionSectors(): Failure on spanned partition when writing chunk to Dev1 "); + } + pdev->bAtaDevNum = 0; + ioreq->irSectorCount +=ioreq2.irSectorCount; + return rc; + }/*end of Write 2nd chunk to Dev1*/ + + }/*DOCH_PARTITION_IS_SPANNED*/ + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H W r i t e A n d L o c k */ +/* */ +/* Writes sectors by sector no to a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* irFlags : DOCH_USE_DMA */ +/* DOCH_USE_BURST */ +/* Note: 4 methods of data transfer are */ +/* available: */ +/* Normal transfer */ +/* DMA transfer */ +/* Burst transfer */ +/* DMA & Burst transfer */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_PARTITION */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors NOT read (in case of an */ +/* error - this number may not be accurate) */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHWriteAndLockSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket * pdev; + IOreq ioreq2; + DOCH_Registers out_regs; + + /*Sector arithmetic*/ + /*-----------------*/ + FLSDword total_num_of_sectors = ioreq->irSectorCount; + FLSDword sectorNumber = ioreq->irSectorNo; + FLSNative sectors_written_so_far = 0; + + /*Buffer to write from*/ + /*--------------------*/ + FLByte* buf_ptr = (FLByte*)ioreq->irData; + FLSNative buf_offset = 0; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*If a negative number of sectors was requested - return error*/ + /*------------------------------------------------------------*/ + if(total_num_of_sectors < 0) + return DOCH_BadParameter; + + /*Enable interrupts*/ + /*-----------------*/ + pdev->bUseInterrupt = TRUE; + + + /*Set DMA and Burst modes according to request*/ + /*--------------------------------------------*/ + pdev->bUseDMA = (((ioreq->irFlags & DOCH_USE_DMA) == DOCH_USE_DMA) && + (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN) && + (DOCH_DMA_CHECK_BUFFER(buf_ptr, total_num_of_sectors))); + + pdev->bUseBurst = ((ioreq->irFlags & DOCH_USE_BURST) == DOCH_USE_BURST); + + /*Write sectors in DOCH_MAX_SECTORS quantities*/ + /*--------------------------------------------*/ + while(total_num_of_sectors > 0) + { + FLSNative sectors_this_cycle; + + if(total_num_of_sectors > DOCH_MAX_SECTORS) + sectors_this_cycle = DOCH_MAX_SECTORS; + else + sectors_this_cycle = total_num_of_sectors; + + rc = performSectorsOperation(DOCH_VSCMD_WRITE_PARTITION, + 0, + pdev, + ioreq, + &out_regs, + sectors_this_cycle, + (FLSNative*)§orNumber, + (FLSNative*)&total_num_of_sectors, + §ors_written_so_far, + &buf_offset, + buf_ptr); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteAndLockSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d \r\n"), rc,pdev->bAtaDevNum)); + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + /*Cancel DMA and Burst modes*/ + /*--------------------------*/ + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + } + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + /*Cancel DMA and Burst modes*/ + /*--------------------------*/ + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + + /* Now lock the partition as OTP */ + /*-------------------------------*/ + tffsset(&protAPI, 0, sizeof(DOCH_PartitionProtectionAPI)); + tffsset(&ioreq2, 0, sizeof(ioreq2)); + tffscpy(&ioreq2.irHandle, &ioreq->irHandle, sizeof(ioreq2.irHandle)); + ioreq2.irData = &protAPI; + ioreq2.irFlags = DOCH_LOCK_AS_OTP; + rc = DOCHSetParitionProtectionSingleFloor(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteAndLockSingleFloor(): DOCHSetParitionProtection failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d \r\n"), rc, pdev->bAtaDevNum)); + + return rc; + } + + /*Return actual number of written sectors*/ + /*---------------------------------------*/ + ioreq->irSectorCount = sectors_written_so_far; + + return DOCH_OK; +} + +DOCH_Error DOCHWriteAndLock(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + FLDword sectorsToWriteToFirstChunk; + FLDword sectorsToWriteToSecondChunk; + FLByte* buf; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + /*avoid locking OTP when passed length (in sectors) is zero*/ + if (ioreq->irCount==0) + return DOCH_BadParameter; + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV0) + { + rc = DOCHWriteAndLockSingleFloor(ioreq); + return rc; + } + + /*If partition resides ENTIRELY on Dev1*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV1) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHWriteAndLockSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + return rc; + } + + /*If partition is spanned - collect both infos and combine*/ + /*========================================================*/ + if(DOCH_PARTITION_IS_SPANNED) + { + /*irLength => First sector to read*/ + /*irCount => Number of sectors to read*/ + if( ((FLDword)((ioreq->irLength + ioreq->irCount))) > pdev->sSpanData.dwSpanSector) + { + if(((FLDword)ioreq->irLength) >= pdev->sSpanData.dwSpanSector) + { + sectorsToWriteToFirstChunk = 0; + sectorsToWriteToSecondChunk = ioreq->irCount; + + } + else + { + sectorsToWriteToFirstChunk = (pdev->sSpanData.dwSpanSector - ioreq->irLength); + sectorsToWriteToSecondChunk = (ioreq->irCount - sectorsToWriteToFirstChunk); + } + } + else + { + sectorsToWriteToFirstChunk = ioreq->irCount; + sectorsToWriteToSecondChunk = 0; + } + + /*Write first chunk to Dev0*/ + /*-------------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irCount = sectorsToWriteToFirstChunk; + rc = DOCHWriteAndLockSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + + /*Write 2nd chunk to Dev1*/ + /*-----------------------*/ + if(sectorsToWriteToSecondChunk > 0) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irCount = sectorsToWriteToSecondChunk; + ioreq2.irLength = 0; + buf = (FLByte*)ioreq->irData; + ioreq2.irData = buf + (sectorsToWriteToFirstChunk<sSpanData.numOfSpannedPartitionOnDev0 + 1)); + + pdev->bAtaDevNum = 1; + rc = DOCHWriteAndLockSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + } + } + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H F r e e S e c t o r s */ +/* */ +/* Marks absolute sectors by sector no. as free to be written */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irSectorNo : First sector no. to free */ +/* irSectorCount : Number of consecutive sectors to free */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ERASE_PARTITION_SECTORS */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually deleted */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHFreeSectorsSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket * pdev; + DOCH_Registers out_regs; + + /*Sectors arithmetic*/ + /*------------------*/ + FLSDword total_num_of_sectors = ioreq->irSectorCount; + FLSDword sectorNumber = ioreq->irSectorNo; + FLSNative sectors_freed_so_far = 0; + + /*Dummy buffer for use of performSectorsOperation()*/ + /*-------------------------------------------------*/ + FLByte* buf_ptr = NULL; + FLSNative buf_offset = 0; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*If a negative number of sectors was requested - return error*/ + /*------------------------------------------------------------*/ + if(total_num_of_sectors < 0) + return DOCH_BadParameter; + + /*Free sectors in DOCH_MAX_SECTORS quantities*/ + /*--------------------------------------------*/ + while(total_num_of_sectors > 0) + { + FLSNative sectors_this_cycle; + + if(total_num_of_sectors > DOCH_MAX_SECTORS) + sectors_this_cycle = DOCH_MAX_SECTORS; + else + sectors_this_cycle = total_num_of_sectors; + + rc = performSectorsOperation(DOCH_VSCMD_ERASE_PARTITION_SECTORS, + 0, + pdev, + ioreq, + &out_regs, + sectors_this_cycle, + (FLSNative*)§orNumber, + (FLSNative*)&total_num_of_sectors, + §ors_freed_so_far, + &buf_offset, + buf_ptr); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHFreeSectorsSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc,pdev->bAtaDevNum)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + } + + /*Return actual number of freed sectors*/ + /*-------------------------------------*/ + ioreq->irSectorCount = sectors_freed_so_far; + + return DOCH_OK; +} + +DOCH_Error DOCHFreeSectors(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + FLDword sectorsToDeleteFromFirstChunk; + FLDword sectorsToDeleteFromSecondChunk; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV0) + { + rc = DOCHFreeSectorsSingleFloor(ioreq); + return rc; + } + + /*If partition resides ENTIRELY on Dev1*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV1) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHFreeSectorsSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + return rc; + } + + /*If partition is spanned - collect both infos and combine*/ + /*========================================================*/ + if(DOCH_PARTITION_IS_SPANNED) + { + /*irLength => First sector to read*/ + /*irCount => Number of sectors to read*/ + if( ((FLDword)((ioreq->irLength + ioreq->irCount))) > pdev->sSpanData.dwSpanSector) + { + if(((FLDword)ioreq->irLength) >= pdev->sSpanData.dwSpanSector) + { + sectorsToDeleteFromFirstChunk = 0; + sectorsToDeleteFromSecondChunk = ioreq->irCount; + + } + else + { + sectorsToDeleteFromFirstChunk = (pdev->sSpanData.dwSpanSector - ioreq->irLength); + sectorsToDeleteFromSecondChunk = (ioreq->irCount - sectorsToDeleteFromFirstChunk); + } + } + else + { + sectorsToDeleteFromFirstChunk = ioreq->irCount; + sectorsToDeleteFromSecondChunk = 0; + } + + /*Free first chunk from Dev0*/ + /*--------------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irCount = sectorsToDeleteFromFirstChunk; + rc = DOCHFreeSectorsSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + + /*Free 2nd chunk from Dev1*/ + /*------------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irCount = sectorsToDeleteFromSecondChunk; + ioreq2.irLength = 0; + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.numOfSpannedPartitionOnDev0 + 1)); + + pdev->bAtaDevNum = 1; + rc = DOCHFreeSectorsSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + } + + return DOCH_OK; +} + + +/*----------------------------------------------------------------------*/ +/* D O C H W i p e S e c t o r s */ +/* */ +/* Securely erase data in sectors */ +/* */ +/* Parameters: */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irSectorCount : Number of sectors to wipe */ +/* irSectorNumber : Start sector to wipe */ +/* */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SECURE_ERASE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHWipeSectorsSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + FLDword dwStartSector=ioreq->irSectorNo; + FLDword dwSectorCount=0; + FLDword dwLastSector =(ioreq->irSectorCount + dwStartSector); + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(partNum >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + tffsset(wipeSectorsDev, 0, sizeof(wipeSectorsDev)); + + while (dwStartSector< dwLastSector) + { + if (!(dwStartSector%DOCH_MINIMAL_UNIT_SIZE)) + { + /*aligned to unit*/ + if (dwLastSector-dwStartSector>=DOCH_MINIMAL_UNIT_SIZE) + dwSectorCount= DOCH_MINIMAL_UNIT_SIZE; + else + dwSectorCount=TFFSMIN(DOCH_MINIMAL_PAGE_SIZE,(dwLastSector-dwStartSector)); + } else + { + /*not aligned to unit*/ + if (!(dwStartSector%DOCH_MINIMAL_PAGE_SIZE)) + { /*aligned to page*/ + dwSectorCount=TFFSMIN(DOCH_MINIMAL_PAGE_SIZE,(dwLastSector-dwStartSector)); + } + else + { /*not aligned to page*/ + dwSectorCount=TFFSMIN(DOCH_MINIMAL_PAGE_SIZE,(dwLastSector-dwStartSector)); + dwSectorCount=TFFSMIN((DOCH_MINIMAL_PAGE_SIZE-(dwStartSector%DOCH_MINIMAL_PAGE_SIZE)),dwSectorCount); + } + } + + /* sector to transfer: 1..2 sectors with following layout: */ + /* - 1st 8bytes - reserved as zeros */ + /* - (FLDWord) : First sector to delete */ + /* (FLDWord) : # of sectors to delete */ + /* - (FLDWord) : Second sector to delete */ + /* (FLDWord) : # of sectors to delete */ + /* - ... */ + /* - (FLDWord) : Nth sector to delete */ + /* (FLDWord) : # of sectors to delete */ + /* * Last transaction should have both start */ + /* and length fields set to 0. */ + + toLE4(wipeSectorsDev[2], dwStartSector); + toLE4(wipeSectorsDev[3], dwSectorCount); + + /* Update ATA register values */ + /*----------------------------*/ + in_regs.bFeaturesError = DOCH_SECURE_ERASE; + in_regs.bSectorCount = partNum; + in_regs.bSectorNumber = 1/*one sector to transfer*/; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_PARTITION_MANAGEMENT; + + /* Activate ATA command */ + /*----------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + wipeSectorsDev, + 1 /*one sector to transfer*/); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWipeSectorsSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d partition:%d \r\n") + ,rc, pdev->bAtaDevNum,partNum)); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("Parameters: startSector:%d sectorNo:%d \r\n") + ,ioreq->irSectorNo,ioreq->irSectorCount)); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("Failed at: startsector:%d sectorNo:%d \r\n") + ,dwStartSector,dwSectorCount)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + dwStartSector+=dwSectorCount; + }/*while loop*/ + + return DOCH_OK; +} + + + +/*----------------------------------------------------------------------*/ +/* D O C H W i p e S e c t o r s */ +/* */ +/* Securely erase data in sectors */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irSectorCount : Number of sectors to wipe */ +/* irSectorNumber : Start sector to wipe */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SECURE_ERASE */ +/* */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +DOCH_Error DOCHWipeSectors(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + DOCH_Socket* pdev; + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + +#ifndef DOCH_NO_AUTO_WIPE_SECTORS + /*Retrieve device user attributes*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq2, pdev->wSocketNo); + ioreq2.irData = &devUserAttr; + DOCHGetDiskUserAttributes(&ioreq2); + + /* Set secure delete info of both devices, for case of power failure during operation*/ + devUserAttr.sdkAttributes.sSecureDeleteDev1.bPart = partNum; + devUserAttr.sdkAttributes.sSecureDeleteDev1.dwSecureDeleteStartSector = ioreq->irSectorNo; + devUserAttr.sdkAttributes.sSecureDeleteDev1.dwSecureDeleteNumOfSectors = ioreq->irSectorCount; + devUserAttr.sdkAttributes.sSecureDeleteDev1.bOperationRequired = TRUE; + + /*Set attributes back to the device*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irData = &devUserAttr; + gSDKUpdatesDiskAttributes = DOCH_GLOBAL_BOOL_PATTERN; + rc = DOCHSetDiskUserAttributes(&ioreq2); + gSDKUpdatesDiskAttributes = 0; + if(rc != DOCH_OK) + return rc; +#endif /*DOCH_NO_AUTO_WIPE_SECTORS*/ + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if( (!pdev->sSpanData.secondFloorActive) || (partNum < pdev->sSpanData.bLastPartitionOnDev0) || + ((partNum == pdev->sSpanData.bLastPartitionOnDev0) && (!pdev->sSpanData.bLastDev0PartSpanned)) ) + { + rc = DOCHWipeSectorsSingleFloor(ioreq); + goto InsertCompleteIndication; + } + + /*If partition resides ENTIRELY on Dev1*/ + /*=====================================*/ + if(((pdev->sSpanData.secondFloorActive) && (partNum > pdev->sSpanData.bLastPartitionOnDev0)) + && (pdev->wNumOfDevices > 1)) + { + tffscpy(&ioreq2,ioreq, sizeof(ioreq2)); + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHWipeSectorsSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + goto InsertCompleteIndication; + } + + /*If partition is spanned */ + /*=======================*/ + if(((pdev->sSpanData.bLastDev0PartSpanned) && (partNum == pdev->sSpanData.numOfSpannedPartitionOnDev0)) + && (pdev->wNumOfDevices > 1)) + { + + FLDword dwDev1StartSector=0; + FLDword dwDev1SectorCount=0; + + tffsset(&ioreq2,0, sizeof(ioreq2)); /*will contain dev0 information*/ + + /*Split requested sectors to delete to Dev0/Dev1*/ + /*----------------------------------------------*/ + + if((FLDword)ioreq->irSectorNo > pdev->sSpanData.dwSpanSector) + { + /* all required sectors are in dev1*/ + dwDev1StartSector= (FLDword)(ioreq->irSectorNo - pdev->sSpanData.dwSpanSector); + dwDev1SectorCount= (FLDword)ioreq->irSectorCount; + } + else if ((FLDword)(ioreq->irSectorNo + ioreq->irSectorCount) > pdev->sSpanData.dwSpanSector) + { + /* part of the sectors is in dev1*/ + dwDev1SectorCount=(FLDword)(ioreq->irSectorCount - (pdev->sSpanData.dwSpanSector - ioreq->irSectorNo)); + ioreq2.irSectorCount= (FLDword)(pdev->sSpanData.dwSpanSector - ioreq->irSectorNo); + ioreq2.irSectorNo = (FLDword)ioreq->irSectorNo; + }else + { + /* all required sectors are in dev0*/ + ioreq2.irSectorNo = (FLDword)ioreq->irSectorNo; + ioreq2.irSectorCount= (FLDword)ioreq->irSectorCount; + } + + + /*Wipe sectors on Dev0*/ + /*--------------------*/ + if (ioreq2.irSectorCount) + { + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2,partNum); + rc = DOCHWipeSectorsSingleFloor(&ioreq2); + if(rc != DOCH_OK) + goto InsertCompleteIndication;; + } + + + /*Wipe Sectors on Dev1*/ + /*--------------------*/ + if (dwDev1SectorCount) + { + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.numOfSpannedPartitionOnDev0 + 1)); + ioreq2.irSectorNo = (FLDword)dwDev1StartSector; + ioreq2.irSectorCount= (FLDword)dwDev1SectorCount; + + pdev->bAtaDevNum = 1; + rc = DOCHWipeSectorsSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + } + } + +InsertCompleteIndication: + if (rc!=DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWipeSectors(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x partition:%d \r\n"),rc,partNum)); + /* we leave the indication in disk attributes only if + the failure is a result of power loss*/ + if (rc==DOCH_TimedOut || rc==DOCH_DeviceTurnedOff) + return rc; + /* On all other failures- we will not retry erasing */ + } + +#ifndef DOCH_NO_AUTO_WIPE_SECTORS + /* Zero secure delete info */ + devUserAttr.sdkAttributes.sSecureDeleteDev1.bOperationRequired = FALSE; + devUserAttr.sdkAttributes.sSecureDeleteDev1.bPart = 0; + devUserAttr.sdkAttributes.sSecureDeleteDev1.dwSecureDeleteStartSector = 0; + devUserAttr.sdkAttributes.sSecureDeleteDev1.dwSecureDeleteNumOfSectors = 0; + + /*Set attributes back to the device*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irData = &devUserAttr; + gSDKUpdatesDiskAttributes = DOCH_GLOBAL_BOOL_PATTERN; + rc = DOCHSetDiskUserAttributes(&ioreq2); + gSDKUpdatesDiskAttributes = 0; +#endif /*DOCH_NO_AUTO_WIPE_SECTORS*/ + + return rc; + +} + + + +/*----------------------------------------------------------------------*/ +/* D O C H P r e p a r e F o r W r i t e */ +/* */ +/* Signal to DOCH that these sectors are going to be over-written in */ +/* following write command */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_OPTIMIZE_PARTITION_SECTORS */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHPrepareForWrite(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket * pdev; + DOCH_Registers out_regs; + + /*Sectors arithmetic*/ + /*------------------*/ + FLSDword total_num_of_sectors = ioreq->irSectorCount; + FLSDword sectorNumber = ioreq->irSectorNo; + FLSNative sectorsPreparedSoFar = 0; + + /*Buffer to "write" from*/ + /*----------------------*/ + FLByte* buf_ptr = (FLByte*)ioreq->irData; + FLSNative buf_offset = 0; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*If a negative number of sectors was requested - return error*/ + /*------------------------------------------------------------*/ + if(total_num_of_sectors < 0) + return DOCH_BadParameter; + + rc = performSectorsOperation(DOCH_VSCMD_OPTIMIZE_PARTITION_SECTORS, + PREPARE_FOR_WRITE_OP, + pdev, + ioreq, + &out_regs, + ioreq->irSectorCount, + (FLSNative*)§orNumber, + (FLSNative*)&total_num_of_sectors, + §orsPreparedSoFar, + &buf_offset, + buf_ptr); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHPrepareForWrite(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + /*If not enough free space - defragment*/ + /*-------------------------------------*/ + if(ioreq->irSectorCount > out_regs.bSectorCount) + { + IOreq ioreq2; + ioreq2.irHandle = ioreq->irHandle; + rc = DOCHOptimizeMedia(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHPrepareForWrite(): DOCHOptimizeMedia failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return rc; + } + + } + + return DOCH_OK; +} + +#if 0 +/* Flexi-Flash */ + +/*----------------------------------------------------------------------*/ +/* D O C H W r i t e F l e x i F a s t */ +/* */ +/* Flexi-Flash Write Fast */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_FLEXI */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually written */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHWriteFlexiFast(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket * pdev; + DOCH_Registers out_regs; + FLByte operationRetries = 0; + + /*Sectors arithmetic*/ + /*------------------*/ + FLSDword total_num_of_sectors = ioreq->irSectorCount; + FLSDword sectorNumber = ioreq->irSectorNo; + FLSNative sectors_written_so_far = 0; + + /*Buffer to write from*/ + /*--------------------*/ + FLByte* buf_ptr = (FLByte*)ioreq->irData; + FLSNative buf_offset = 0; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*If a negative number of sectors was requested - return error*/ + /*------------------------------------------------------------*/ + if(total_num_of_sectors < 0) + return DOCH_BadParameter; + + /*Enable interrupts*/ + /*-----------------*/ + pdev->bUseInterrupt = TRUE; + + + /*Write sectors in DOCH_MAX_SECTORS quantities*/ + /*--------------------------------------------*/ + while(total_num_of_sectors > 0) + { + FLSNative sectors_this_cycle; + + if(total_num_of_sectors > DOCH_MAX_SECTORS) + sectors_this_cycle = DOCH_MAX_SECTORS; + else + sectors_this_cycle = total_num_of_sectors; + +dochWriteFlexiRetryPoint: + + rc = performSectorsOperation(DOCH_VSCMD_WRITE_FLEXI, + 0, + pdev, + ioreq, + &out_regs, + sectors_this_cycle, + (FLSNative*)§orNumber, + (FLSNative*)&total_num_of_sectors, + §ors_written_so_far, + &buf_offset, + buf_ptr); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteFlexiFast(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if( ((rc & DOCH_ATA_ERROR_ADDRESS_MARK_NOT_FOUND) == DOCH_ATA_ERROR_ADDRESS_MARK_NOT_FOUND) && + (operationRetries++ < 4) + ) + goto dochWriteFlexiRetryPoint; + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + } + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + /*Return actual number of written sectors*/ + /*---------------------------------------*/ + ioreq->irSectorCount = sectors_written_so_far; + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H W r i t e F l e x i N o r m a l */ +/* */ +/* Flexi-Flash Write Normal */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_FLEXI */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually written */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHWriteFlexiNormal(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket * pdev; + DOCH_Registers out_regs; + + /*Sectors arithmetic*/ + /*------------------*/ + FLSDword total_num_of_sectors = ioreq->irSectorCount; + FLSDword sectorNumber = ioreq->irSectorNo; + FLSNative sectors_written_so_far = 0; + + /*Buffer to write from*/ + /*--------------------*/ + FLByte* buf_ptr = (FLByte*)ioreq->irData; + FLSNative buf_offset = 0; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*If a negative number of sectors was requested - return error*/ + /*------------------------------------------------------------*/ + if(total_num_of_sectors < 0) + return DOCH_BadParameter; + + /*Enable interrupts*/ + /*-----------------*/ + pdev->bUseInterrupt = TRUE; + + + /*Write sectors in DOCH_MAX_SECTORS quantities*/ + /*--------------------------------------------*/ + while(total_num_of_sectors > 0) + { + FLSNative sectors_this_cycle; + + if(total_num_of_sectors > DOCH_MAX_SECTORS) + sectors_this_cycle = DOCH_MAX_SECTORS; + else + sectors_this_cycle = total_num_of_sectors; + + rc = performSectorsOperation(DOCH_VSCMD_WRITE_FLEXI, + WRITE_NORMAL_OP, + pdev, + ioreq, + &out_regs, + sectors_this_cycle, + (FLSNative*)§orNumber, + (FLSNative*)&total_num_of_sectors, + §ors_written_so_far, + &buf_offset, + buf_ptr); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteFlexiNormal(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + } + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + /*Return actual number of written sectors*/ + /*---------------------------------------*/ + ioreq->irSectorCount = sectors_written_so_far; + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H R e W r i t e F l e x i N o r m a l */ +/* */ +/* Flexi-Flash Re-Write Normal */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_OPTIMIZE_PARTITION_SECTORS */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually re-written */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReWriteFlexiNormal(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket * pdev; + DOCH_Registers out_regs; + + /*Sectors arithmetic*/ + /*------------------*/ + FLSDword total_num_of_sectors = ioreq->irSectorCount; + FLSDword sectorNumber = ioreq->irSectorNo; + FLSNative sectors_written_so_far = 0; + + /*Buffer to rewrite from*/ + /*----------------------*/ + FLByte* buf_ptr = (FLByte*)ioreq->irData; + FLSNative buf_offset = 0; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*If a negative number of sectors was requested - return error*/ + /*------------------------------------------------------------*/ + if(total_num_of_sectors < 0) + return DOCH_BadParameter; + + /*Enable interrupts*/ + /*-----------------*/ + pdev->bUseInterrupt = TRUE; + + + /*Write sectors in DOCH_MAX_SECTORS quantities*/ + /*--------------------------------------------*/ + while(total_num_of_sectors > 0) + { + FLSNative sectors_this_cycle; + + if(total_num_of_sectors > DOCH_MAX_SECTORS) + sectors_this_cycle = DOCH_MAX_SECTORS; + else + sectors_this_cycle = total_num_of_sectors; + + rc = performSectorsOperation(DOCH_VSCMD_OPTIMIZE_PARTITION_SECTORS, + REWRITE_NORMAL_OP, + pdev, + ioreq, + &out_regs, + sectors_this_cycle, + (FLSNative*)§orNumber, + (FLSNative*)&total_num_of_sectors, + §ors_written_so_far, + &buf_offset, + buf_ptr); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReWriteNormal(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else if((rc & DOCH_ATA_ERROR_ID_NOT_FOUND) == DOCH_ATA_ERROR_ID_NOT_FOUND) + return DOCH_PartitionLimitExceeded; + else + return DOCH_GeneralFailure; + } + } + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + /*Return actual number of written sectors*/ + /*---------------------------------------*/ + ioreq->irSectorCount = sectors_written_so_far; + + return DOCH_OK; +} + + +/*----------------------------------------------------------------------*/ +/* D O C H M a n a g e A t o m i c W r i t e S e q */ +/* */ +/* Manage atomic write sequence per partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irCount : DOCH_START_ATOMIC_WRITE */ +/* DOCH_FINISH_ATOMIC_WRITE */ +/* DOCH_ABORT_ATOMIC_WRITE */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_ATOMIC_WRITE_SEQUENCE */ +/* */ +/* Returns: */ +/* irLength : Maximal possible length */ +/* irFlags : Maximal possible length without performance */ +/* loss. */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHManageAtomicWriteSeq(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_ATOMIC_WRITE_SEQUENCE; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = (FLByte)(ioreq->irCount); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + /*Return values*/ + /*-------------*/ + ioreq->irLength = out_regs.bSectorCount + (out_regs.bSectorNumber << 8); + ioreq->irFlags = out_regs.bCylLow + (out_regs.bCylHigh << 8); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHManageAtomicWriteSeq(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } + +} + +#endif /*0*/ + + +/*----------------------------------------------------------------------*/ +/* D O C H A c c e s s P a r t W i t h P w d */ +/* */ +/* Insert the protection key in order to remove the protection of the */ +/* specified partition or the entire media */ +/* Partition could be authenticated both by user and master password */ +/* the last successful authentication supersedes the previous one. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irFlags : Authentication Type */ +/* : DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* irCount : Authenticate the entire device */ +/* DOCH_ACCESS_ALL_PARTITIONS */ +/* irData : Pointer to an DOCH_PartitionAcessPassword struct */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_EN_ACCESS_WPWD */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHAccessPartWithPwdSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; +#ifdef DOCH_BIG_ENDIAN + DOCH_PartitionAcessPassword* partPwdToBig = (DOCH_PartitionAcessPassword*)(ioreq->irData); +#endif /*DOCH_BIG_ENDIAN*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + FLByte sectorCountValue = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + if(ioreq->irCount == DOCH_ACCESS_ALL_PARTITIONS) + sectorCountValue = 0xFF; + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_EN_ACCESS_WPWD; + in_regs.bSectorCount = sectorCountValue; + in_regs.bSectorNumber = (FLByte)(ioreq->irFlags); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (sizeof(DOCH_PartitionAcessPassword) / DOCH_SECTOR_SIZE)); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHAccessPartWithPwdSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc,pdev->bAtaDevNum)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHAccessPartWithPwd(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV0) + { + rc = DOCHAccessPartWithPwdSingleFloor(ioreq); + return rc; + } + + /*If partition resides ENTIRELY on Dev1*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV1) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHAccessPartWithPwdSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + return rc; + } + + /*If partition is spanned - collect both infos and combine*/ + /*========================================================*/ + if(DOCH_PARTITION_IS_SPANNED) + { + /*Set to chunk on Dev0*/ + /*--------------------*/ + rc = DOCHAccessPartWithPwdSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + + /*Set to chunk on Dev0*/ + /*--------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.numOfSpannedPartitionOnDev0 + 1)); + + pdev->bAtaDevNum = 1; + rc = DOCHAccessPartWithPwdSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + } + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H D i s a b l e P a r t A c c e s s */ +/* */ +/* Remove the protection key making the partition protected again */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irCount : Disable access for the entire device */ +/* DOCH_ACCESS_ALL_PARTITIONS */ +/* irFlags : Authentication to withdraw */ +/* DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_DISABLE_ACCESS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHDisablePartAccessSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + FLByte sectorCountValue = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + if(ioreq->irCount == DOCH_ACCESS_ALL_PARTITIONS) + sectorCountValue = 0xFF; + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_DISABLE_ACCESS; + in_regs.bSectorCount = sectorCountValue; + in_regs.bSectorNumber = (FLByte)(ioreq->irFlags); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHDisablePartAccessSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc,pdev->bAtaDevNum)); + + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHDisablePartAccess(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV0) + { + rc = DOCHDisablePartAccessSingleFloor(ioreq); + return rc; + } + + /*If partition resides ENTIRELY on Dev1*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV1) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHDisablePartAccessSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + return rc; + } + + /*If partition is spanned - collect both infos and combine*/ + /*========================================================*/ + if(DOCH_PARTITION_IS_SPANNED) + { + /*Set to chunk on Dev0*/ + /*--------------------*/ + rc = DOCHDisablePartAccessSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + + /*Set to chunk on Dev0*/ + /*--------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.numOfSpannedPartitionOnDev0 + 1)); + + pdev->bAtaDevNum = 1; + rc = DOCHDisablePartAccessSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + } + + return DOCH_OK; +} + +#if 0 + +/*----------------------------------------------------------------------*/ +/* D O C HS e n d H o s t P K e y */ +/* */ +/* Host sends its public key for this partition & random challenge */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irFlags : DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* irCount : Send key for the entire device */ +/* DOCH_ACCESS_ALL_PARTITIONS */ +/* irData : Pointer to DOCH_HostPublicKey structure */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_TX_HOST_PUBLICKEY */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSendHostPublicKey(IOreq* ioreq) +{ + DOCH_Error rc; +#ifdef DOCH_BIG_ENDIAN + DOCH_HostPublicKey* hostPublicKeyToBig = (DOCH_HostPublicKey*)(ioreq->irData); +#endif /*DOCH_BIG_ENDIAN*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + FLByte sectorCountValue = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + if(ioreq->irCount == DOCH_ACCESS_ALL_PARTITIONS) + sectorCountValue = 0xFF; + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_TX_HOST_PUBLICKEY; + in_regs.bSectorCount = sectorCountValue; + in_regs.bSectorNumber = (FLByte)(ioreq->irFlags); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (sizeof(DOCH_HostPublicKey) / DOCH_SECTOR_SIZE)); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + hostPublicKeyToBig->wVersion = be_FLWord((FLByte*)&hostPublicKeyToBig->wVersion); + #endif /*DOCH_BIG_ENDIAN*/ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSendHostPublicKey(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C HR e c e i v e D o c h P u b l i c K e y */ +/* */ +/* DOCH sends its public key, host's random challenge encrypted by DOCH */ +/* private key, and DOCH's random challenge to host */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irFlags : DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* irCount : Receive key for the entire device */ +/* DOCH_ACCESS_ALL_PARTITIONS */ +/* irData : Pointer to DOCH_DochPublicKey structure */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_RX_DOCH_PUBLICKEY */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReceiveDochPublicKey(IOreq* ioreq) +{ + DOCH_Error rc; +#ifdef DOCH_BIG_ENDIAN + DOCH_DochPublicKey* dochPublicKeyToBig = (DOCH_DochPublicKey*)(ioreq->irData); +#endif /*DOCH_BIG_ENDIAN*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + FLByte sectorCountValue = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + if(ioreq->irCount == DOCH_ACCESS_ALL_PARTITIONS) + sectorCountValue = 0xFF; + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_RX_DOCH_PUBLICKEY; + in_regs.bSectorCount = sectorCountValue; + in_regs.bSectorNumber = (FLByte)(ioreq->irFlags); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (sizeof(DOCH_DochPublicKey) / DOCH_SECTOR_SIZE)); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + dochPublicKeyToBig->wVersion = be_FLWord((FLByte*)&dochPublicKeyToBig->wVersion); + #endif /*DOCH_BIG_ENDIAN*/ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReceiveDochPublicKey(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H V e r i f y H o s t K e y */ +/* */ +/* Host sends DOCH's random challenge encrypted by host's private key */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irFlags : DOCH_ACCESS_USER_PASSWORD */ +/* DOCH_ACCESS_MASTER_PASSWORD */ +/* DOCH_ACCESS_GATE_KEEPER */ +/* irCount : Verify key for the entire device */ +/* DOCH_ACCESS_ALL_PARTITIONS */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_VERIFY_HOST_KEY */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHVerifyHostKey(IOreq* ioreq) +{ + DOCH_Error rc; +#ifdef DOCH_BIG_ENDIAN + DOCH_VerifyHostKey* verifyHostKeyToBig = (DOCH_VerifyHostKey*)(ioreq->irData); +#endif /*DOCH_BIG_ENDIAN*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + FLByte sectorCountValue = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + if(ioreq->irCount == DOCH_ACCESS_ALL_PARTITIONS) + sectorCountValue = 0xFF; + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_VERIFY_HOST_KEY; + in_regs.bSectorCount = sectorCountValue; + in_regs.bSectorNumber = (FLByte)(ioreq->irFlags); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (sizeof(DOCH_VerifyHostKey) / DOCH_SECTOR_SIZE)); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + verifyHostKeyToBig->wVersion = be_FLWord((FLByte*)&verifyHostKeyToBig->wVersion); + #endif /*DOCH_BIG_ENDIAN*/ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHVerifyHostKey(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +#endif /*0*/ + +/*----------------------------------------------------------------------*/ +/* D O C H S e t P a r i t i o n P r o t e c t i o n */ +/* */ +/* Set partition properties (attributes/passkey) . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Pointer to DOCH_PartitionProtectionAPI */ +/* irFlags : DOCH_PASSKEY_VALID */ +/* DOCH_ATTRIBUTES_VALID */ +/* DOCH_LOCK_AS_OTP */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SET_PARTITION_PROTECTION */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetParitionProtectionSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_PartitionProtectionAPI* partProperties = (DOCH_PartitionProtectionAPI*)(ioreq->irData); + DOCH_Socket* pdev; + IOreq ioreq2; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + tffsset(&partFormatInfo, 0, sizeof(DOCH_PartitionFormatInfo)); + + /*Retrieve current partition info from DOCH*/ + /*-----------------------------------------*/ + tffsset(&ioreq2, 0, sizeof(IOreq)); + ioreq2.irHandle = ioreq->irHandle; + ioreq2.irData = &partitionInfoTemp; + rc = DOCHPartitionInfoSingleFloor(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetParitionProtectionSingleFloor(): DOCHPartitionInfoSingleFloor Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d"), rc,pdev->bAtaDevNum)); + return rc; + } + + if((ioreq->irFlags & DOCH_ATTRIBUTES_VALID) == DOCH_ATTRIBUTES_VALID) + { + /*Format DOCH_PartitionProtectionAPI structure to DOCH_PartitionFormatInfo*/ + /*------------------------------------------------------------------------*/ + + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_PROTECTION_TYPE, + DOCH_PA2O_PROTECTION_TYPE, + partProperties->dwProtectionType); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_USER_MODE, + DOCH_PA2O_USER_MODE, + partProperties->dwUserAccessMode); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_GUEST_MODE, + DOCH_PA2O_GUEST_MODE, + partProperties->dwGuestAccessMode); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_MASTER_CTRL, + DOCH_PA2O_MASTER_CTRL, + partProperties->dwMasterControl); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_ENCRYPT_TYPE, + DOCH_PA2O_ENCRYPT_TYPE, + partProperties->dwEncryptionType); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_LOCK_CTRL, + DOCH_PA2O_LOCK_CTRL, + partProperties->dwLockControl); + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_MAX_AUTH_ATTEMPTS, + DOCH_PA2O_MAX_AUTH_ATTEMPTS, + partProperties->dwMaxNumOfAuthAttempts); + + /*Preserve current OTW setting (Can only be set by AddPartition)*/ + DOCH_SetBits(&partFormatInfo.partitionAttributes2, + DOCH_PA2B_OTP_BIT, + DOCH_PA2O_OTP_BIT, + ((partitionInfoTemp.partitionAttributes2 & DOCH_PA2B_OTP_BIT) >> DOCH_PA2O_OTP_BIT)); + + } + else + partFormatInfo.partitionAttributes2 = 0; + + if((ioreq->irFlags & DOCH_PASSKEY_VALID) == DOCH_PASSKEY_VALID) + tffscpy(&partFormatInfo.bPasskey[0], &partProperties->bPasskey[0], sizeof(partFormatInfo.bPasskey)); + else + tffsset(&partFormatInfo.bPasskey[0], 0, sizeof(partFormatInfo.bPasskey)); + + partFormatInfo.dwValidity = (ioreq->irFlags & (DOCH_PASSKEY_VALID | DOCH_ATTRIBUTES_VALID | DOCH_LOCK_AS_OTP +#ifdef FL_SOTP + |DOCH_SEQUENTIAL_OTP +#endif /*FL_SOTP*/ + )); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + partFormatInfo.dwValidity = be_FLDword((FLByte*)&partFormatInfo.dwValidity); + partFormatInfo.dwCommandFlagsOrStatuses = be_FLDword((FLByte*)&partFormatInfo.dwCommandFlagsOrStatuses); + partFormatInfo.partitionAttributes1 = be_FLDword((FLByte*)&partFormatInfo.partitionAttributes1); + partFormatInfo.partitionAttributes2 = be_FLDword((FLByte*)&partFormatInfo.partitionAttributes2); + partFormatInfo.nPartitionSize = be_FLDword((FLByte*)&partFormatInfo.nPartitionSize); + partFormatInfo.nFastAreaSize = be_FLDword((FLByte*)&partFormatInfo.nFastAreaSize); + + partFormatInfo.wFastAreaFactor = be_FLWord((FLByte*)&partFormatInfo.wFastAreaFactor); + #endif /*DOCH_BIG_ENDIAN*/ + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_PARTITION_PROTECTION; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_PARTITION_MANAGEMENT; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + &partFormatInfo, + (sizeof(DOCH_PartitionFormatInfo) / DOCH_SECTOR_SIZE)); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetParitionProtectionSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d"), rc,pdev->bAtaDevNum)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHSetParitionProtection(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*If partition resides ENTIRELY on Dev0*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV0) + { + rc = DOCHSetParitionProtectionSingleFloor(ioreq); + return rc; + } + + /*If partition resides ENTIRELY on Dev1*/ + /*=====================================*/ + if(DOCH_PARTITION_ON_DEV1) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHSetParitionProtectionSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + return rc; + } + + /*If partition is spanned - collect both infos and combine*/ + /*========================================================*/ + if(DOCH_PARTITION_IS_SPANNED) + { + /*Set to chunk on Dev0*/ + /*--------------------*/ + rc = DOCHSetParitionProtectionSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + + /*Set to chunk on Dev0*/ + /*--------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.numOfSpannedPartitionOnDev0 + 1)); + + pdev->bAtaDevNum = 1; + rc = DOCHSetParitionProtectionSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + } + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H S e t P a r i t i o n U s e r A t t r i b u t e s */ +/* */ +/* Set partition user attributes . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Pointer to DOCH_PartitionUserAttr */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_SET_PARTITION_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetParitionUserAttributesSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; +#ifdef DOCH_BIG_ENDIAN + DOCH_PartitionUserAttr* partAttrToBig = (DOCH_PartitionUserAttr*)(ioreq->irData); +#endif /*DOCH_BIG_ENDIAN*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*First retrieve current attributes sector + (for protecting first 0x40 bytes that are SDK specific*/ + /*------------------------------------------------------*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + ioreq2.irData = currentAttributes; + DOCHGetParitionUserAttributesSingleFloor(&ioreq2); + + /*Use currentAttributes bytes 0x41..0x200 to set requested*/ + /*--------------------------------------------------------*/ + tffscpy(¤tAttributes[DOCH_PART_INFO_SDK_RESERVED_BYTES], + (((FLByte*)ioreq->irData) + DOCH_PART_INFO_SDK_RESERVED_BYTES), + (DOCH_SECTOR_SIZE - DOCH_PART_INFO_SDK_RESERVED_BYTES)); + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_PARTITION_USER_ATTR; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_PARTITION_MANAGEMENT; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + currentAttributes, + (sizeof(DOCH_PartitionUserAttr) / DOCH_SECTOR_SIZE)); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + #endif /*DOCH_BIG_ENDIAN*/ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetParitionUserAttributesSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc, pdev->bAtaDevNum)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHSetParitionUserAttributes(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Partition resides on Dev0*/ + /*-------------------------*/ + if((partNum <= pdev->sSpanData.bLastPartitionOnDev0) || + (!pdev->sSpanData.secondFloorActive)) + { + rc = DOCHSetParitionUserAttributesSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + } + /*Partition resides on Dev1*/ + /*-------------------------*/ + else if(partNum <= pdev->wTotalNumOfPartitions) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHSetParitionUserAttributesSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + if(rc != DOCH_OK) + return rc; + } + /*Partition not present*/ + /*---------------------*/ + else + return DOCH_PartitionNotFound; + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H G e t P a r i t i o n U s e r A t t r i b u t e s */ +/* */ +/* Get partition user attributes . */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irData : Pointer to DOCH_PartitionUserAttr */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_PARTITION_MANAGEMENT */ +/* ATA sub-command: */ +/* DOCH_GET_PARTITION_USER_ATTR */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHGetParitionUserAttributesSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; +#ifdef DOCH_BIG_ENDIAN + DOCH_PartitionUserAttr* partAttrToBig = (DOCH_PartitionUserAttr*)(ioreq->irData); +#endif /*DOCH_BIG_ENDIAN*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Check if Partition exceeds number of existing partitions*/ + /*--------------------------------------------------------*/ + if(DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq) >= pdev->device[pdev->bAtaDevNum].wNumOfPartitions) + return DOCH_PartitionNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_PARTITION_USER_ATTR; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = (pdev->bAtaDevNum * DOCH_DEVICE); + in_regs.bCommandStatus = DOCH_VSCMD_PARTITION_MANAGEMENT; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (sizeof(DOCH_PartitionUserAttr) / DOCH_SECTOR_SIZE)); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + #endif /*DOCH_BIG_ENDIAN*/ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHGetParitionUserAttributesSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc, pdev->bAtaDevNum)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHGetParitionUserAttributes(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + DOCH_Socket* pdev; + FLByte partNum = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Partition resides on Dev0*/ + /*-------------------------*/ + if((partNum <= pdev->sSpanData.bLastPartitionOnDev0) || + (!pdev->sSpanData.secondFloorActive)) + { + rc = DOCHGetParitionUserAttributesSingleFloor(ioreq); + } + /*Partition resides on Dev1*/ + /*-------------------------*/ + else if(partNum <= pdev->wTotalNumOfPartitions) + { + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + + if(pdev->sSpanData.bLastDev0PartSpanned) + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0 + 1)); + else + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, (partNum - pdev->sSpanData.bLastPartitionOnDev0)); + + pdev->bAtaDevNum = 1; + rc = DOCHGetParitionUserAttributesSingleFloor(&ioreq2); + pdev->bAtaDevNum = 0; + } + /*Partition not present*/ + /*---------------------*/ + else + return DOCH_PartitionNotFound; + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* D O C H O p t i m i z e M e d i a */ +/* */ +/* Performs garbage collection. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* */ +/* irLength : DOCH_OPTIMIZE_BY_PREPARE_FOR_WRITE */ +/* based on information collected during previous */ +/* PREPARE FOR WRITE commands */ +/* DOCH_OPTIMIZE_DEFAULT */ +/* performs default optimization of the whole */ +/* partition or media */ +/* irFlags : DOCH_NORMAL_OPERATION */ +/* DOCH_IMMEDIATE_OPERATION */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_OPTIMIZE_MEDIA */ +/* */ +/* Returns: */ +/* irLength : Actual number of sectors available for writes */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHOptimizeMedia(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + FLByte action_type; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + if(ioreq->irFlags == DOCH_IMMEDIATE_OPERATION) + action_type = ERASE_IMMEDIATE; + else + action_type = ERASE_NORMAL; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_OPTIMIZE_MEDIA; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = (FLByte)(ioreq->irLength); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = (action_type|DOCH_LBA); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + /*Actual number of sectors available for writes*/ + ioreq->irSectorCount = out_regs.bSectorNumber + + ((FLSDword)out_regs.bCylLow << 8) + + ((FLSDword)out_regs.bCylHigh << 16) + + ((FLSDword)out_regs.bDriveHead << 24) ; + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHOptimizeMedia(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H G e t C u s t o m P a r a m e t e r */ +/* */ +/* Returns 16-bit custom DOCH parameter */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irCount : Parameter# (see DOCH_CustomParams) */ +/* irFlags : DOCH_CUSTOM_PARAM_DEFAULT - default value */ +/* DOCH_CUSTOM_PARAM_TEMP - current (saved) value*/ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_CUSTOM_PARAM */ +/* */ +/* Returns: */ +/* irSectorNo : Custom parameter value (16-Bit) */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHGetCustomParameter(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + FLByte setType; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + if(ioreq->irFlags == DOCH_CUSTOM_PARAM_TEMP) + setType = CUSTOM_PARAM_TEMP; + else if(ioreq->irFlags == DOCH_CUSTOM_PARAM_DEFAULT) + setType = CUSTOM_PARAM_DEFAULT; + else + return DOCH_BadParameter; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_CUSTOM_PARAM; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = (FLByte)(ioreq->irCount & 0x00FF); + in_regs.bDriveHead = ((FLByte)(((ioreq->irCount & 0x0F00) >> 8)) | setType |DOCH_LBA); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + /*Return retrieved custom parameter value*/ + /*---------------------------------------*/ + ioreq->irSectorNo = (out_regs.bCylLow << 8) + out_regs.bSectorNumber; + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHGetCustomParameter(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H S e t C u s t o m P a r a m e t e r */ +/* */ +/* Sets 16-bit custom DOCH parameter */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : Custom Parameter Number (DOCH_CustomParams) */ +/* irSectorNo : Custom Parameter Value (16-Bit) */ +/* irFlags : DOCH_CUSTOM_PARAM_DEFAULT - default value */ +/* DOCH_CUSTOM_PARAM_TEMP - current (saved) value*/ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_CUSTOM_PARAM */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetCustomParameterSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + FLByte setType; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + if(ioreq->irFlags == DOCH_CUSTOM_PARAM_TEMP) + setType = CUSTOM_PARAM_TEMP; + else if(ioreq->irFlags == DOCH_CUSTOM_PARAM_DEFAULT) + setType = CUSTOM_PARAM_DEFAULT; + else + return DOCH_BadParameter; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_CUSTOM_PARAM; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = (FLByte)(ioreq->irSectorNo & 0x00FF); + in_regs.bCylLow = (FLByte)((ioreq->irSectorNo & 0xFF00) >> 8); + in_regs.bCylHigh = (FLByte)(ioreq->irCount & 0x00FF); + in_regs.bDriveHead = (((FLByte)(((ioreq->irCount & 0x0F00) >> 8)) | setType) | DOCH_SELECT_DEV(pdev->bAtaDevNum)); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetCustomParameterSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x device number:%d\r\n"), rc, pdev->bAtaDevNum)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) /*Protection violation - IPL is write protected*/ + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHSetCustomParameter(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + FLByte origDevNum; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + origDevNum = pdev->bAtaDevNum; + + pdev->bAtaDevNum = 0; + rc = DOCHSetCustomParameterSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + + if(pdev->wNumOfDevices > 1) + { + pdev->bAtaDevNum = 1; + rc = DOCHSetCustomParameterSingleFloor(ioreq); + pdev->bAtaDevNum = origDevNum; + } + + return rc; +} + +#if 0 +/*----------------------------------------------------------------------*/ +/* D O C H A u t o H a s h C o n t r o l */ +/* */ +/* Enable/Disable Auto Hash Read/Write */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : AUTO_HASH_ENABLE */ +/* AUTO_HASH_DISABLE */ +/* irLength : AUTO_HASH_READ */ +/* AUTO_HASH_WRITE */ +/* irFlags : DOCH_HASH_NO_ENCRYPTION */ +/* DOCH_HASH_ENCRYPT_BY_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_AUTO_HASH_CONTROL */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHAutoHashControl(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_AUTO_HASH_CONTROL; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = (FLByte)((ioreq->irCount) | (ioreq->irLength<<1) | (ioreq->irFlags<<2)); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_EXT_SECURITY_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHAutoHashControl(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H R e a d C a l c u l a t e d H a s h */ +/* */ +/* Command for Paged partitions */ +/* Transfers to host digest(s) calculated from data on the flash. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_READ_CALCULATED_HASH */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReadCalculatedHash(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = 0; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_READ_CALCULATED_HASH; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadCalculatedHash(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H W r i t e C a l c u l a t e d H a s h */ +/* */ +/* Command for Paged partitions */ +/* No data is transfered. Digest(s) calculated from data in the flash */ +/* are stored to the dedicated area on flash. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_NO_ENCRYPTION */ +/* DOCH_HASH_ENCRYPT_BY_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_CALCULATED_HASH */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHWriteCalculatedHash(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = 0; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + if(ioreq->irCount == DOCH_HASH_ENCRYPT_BY_KEY) + in_regs.bDriveHead |= HASH_BY_KEY; + else + in_regs.bDriveHead |= HASH_AS_IS; + in_regs.bCommandStatus = DOCH_VSCMD_WRITE_CALCULATED_HASH; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteCalculatedHash(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H R e a d O r i g i n a l H a s h */ +/* */ +/* Command for Paged partitions */ +/* Transfers to host digest(s) stored previously on dedicated area on */ +/* flash */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_NO_ENCRYPTION */ +/* DOCH_HASH_ENCRYPT_BY_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_READ_ORIGINAL_HASH */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReadOriginalHash(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Socket* pdev; + DOCH_Registers out_regs; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = 0; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + if(ioreq->irCount == DOCH_HASH_ENCRYPT_BY_KEY) + in_regs.bDriveHead |= HASH_BY_KEY; + else + in_regs.bDriveHead |= HASH_AS_IS; + in_regs.bCommandStatus = DOCH_VSCMD_READ_ORIGINAL_HASH; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadOriginalHash(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H W r i t e G i v e n H a s h */ +/* */ +/* Command for Paged partitions */ +/* Transfers from host digest(s) and stores them to the dedicated area */ +/* on flash */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_NO_ENCRYPTION */ +/* DOCH_HASH_ENCRYPT_BY_KEY */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_WRITE_GIVEN_HASH */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHWriteGivenHash(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = 0; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + if(ioreq->irCount == DOCH_HASH_ENCRYPT_BY_KEY) + in_regs.bDriveHead = HASH_BY_KEY; + else + in_regs.bDriveHead = HASH_AS_IS; + in_regs.bCommandStatus = DOCH_VSCMD_WRITE_GIVEN_HASH; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHWriteGivenHash(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H R e p o r t S u p p o r t e d A l g o r i t h m s */ +/* */ +/* Report supported algorithms */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irData : Pointer to DOCH_supportedAlgorithms structure */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_REPORT_SUPPORTED_ALGORITHMS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReportSupportedAlgorithms(IOreq* ioreq) +{ + DOCH_Error rc; +#ifdef DOCH_BIG_ENDIAN + DOCH_supportedAlgorithms* suppAlgToBig = (DOCH_supportedAlgorithms*)(ioreq->irData); +#endif /*DOCH_BIG_ENDIAN*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_REPORT_SUPPORTED_ALGORITHMS; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_EXT_SECURITY_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (sizeof(DOCH_supportedAlgorithms) / DOCH_SECTOR_SIZE)); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + suppAlgToBig->wVersion = be_FLWord((FLByte*)&suppAlgToBig->wVersion); + + suppAlgToBig->wSymmetricAlgorithmsSupported = be_FLDword((FLByte*)&suppAlgToBig->wSymmetricAlgorithmsSupported); + suppAlgToBig->wAsymmetricAlgorithmsSupported= be_FLDword((FLByte*)&suppAlgToBig->wAsymmetricAlgorithmsSupported); + suppAlgToBig->wHashSchemesSupported = be_FLDword((FLByte*)&suppAlgToBig->wHashSchemesSupported); + suppAlgToBig->wRNGSchemesSupported = be_FLDword((FLByte*)&suppAlgToBig->wRNGSchemesSupported); + suppAlgToBig->wDecompressionSchemesSupported= be_FLDword((FLByte*)&suppAlgToBig->wDecompressionSchemesSupported); + suppAlgToBig->wCompressionSchemesSupported = be_FLDword((FLByte*)&suppAlgToBig->wCompressionSchemesSupported); + #endif /*DOCH_BIG_ENDIAN*/ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReportSupportedAlgorithms(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H G e t A l g o r i t h m C a p a b i l i t i e s */ +/* */ +/* Get algorithms capabilities */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : Algorithm Category */ +/* irLength : Algorithm # in the Category */ +/* irData : Pointer to DOCH_AlgorithmCapabilities */ +/* structure */ +/* */ +/* */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_GET_ALGORITHM_CAPABILITIES */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHGetAlgorithmCapabilities(IOreq* ioreq) +{ + DOCH_Error rc; +#ifdef DOCH_BIG_ENDIAN + DOCH_AlgorithmCapabilities* algCapToBig = (DOCH_AlgorithmCapabilities*)(ioreq->irData); +#endif /*DOCH_BIG_ENDIAN*/ + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_ALGORITHM_CAPABILITIES; + in_regs.bSectorCount = (FLByte)(ioreq->irCount); + in_regs.bSectorNumber = (FLByte)(ioreq->irLength); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_EXT_SECURITY_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + (sizeof(DOCH_AlgorithmCapabilities) / DOCH_SECTOR_SIZE)); + + #ifdef DOCH_BIG_ENDIAN + /*In case of a BIG ENDIAN host CPU, reorder bytes in 16 and 32 Bit variables*/ + algCapToBig->wVersion = be_FLWord((FLByte*)&algCapToBig->wVersion); + algCapToBig->wNumOfKeySizesSupported = be_FLWord((FLByte*)&algCapToBig->wNumOfKeySizesSupported); + algCapToBig->wNumOfModesSupported = be_FLWord((FLByte*)&algCapToBig->wNumOfModesSupported); + + algCapToBig->keysAttributes->dwSize + = be_FLDword((FLByte*)&algCapToBig->keysAttributes->dwSize); + algCapToBig->keysAttributes->dwCalcTime + = be_FLDword((FLByte*)&algCapToBig->keysAttributes->dwCalcTime); + algCapToBig->modesAttributes->wKeySizes + = be_FLWord((FLByte*)&algCapToBig->modesAttributes->wKeySizes); + #endif /*DOCH_BIG_ENDIAN*/ + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHGetAlgorithmCapabilities(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H S e t A l g o r i t h m M o d e */ +/* */ +/* Set algorithms mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : bits 0..7 - Algorithm Category */ +/* bits 8..15 - Algorithm # in category */ +/* bits 16..24 - Mode index */ +/* bits 24..31 - Key size index */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_ALGORITHM_MODE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetAlgorithmMode(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_ALGORITHM_MODE; + in_regs.bSectorCount = (FLByte)(ioreq->irCount & 0x000F); + in_regs.bSectorNumber = (FLByte)((ioreq->irCount & 0x00F0) >> 8); + in_regs.bCylLow = (FLByte)((ioreq->irCount & 0x0F00) >> 16); + in_regs.bCylHigh = (FLByte)((ioreq->irCount & 0xF000) >> 24); + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_EXT_SECURITY_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetAlgorithmMode(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H S t a r t H a s h S t r e a m C a l c u l a t i o n */ +/* */ +/* Restart/Continue hash stream calculation */ +/* Several streams can be supported at the same time, but only one */ +/* should be active at any moment. */ +/* Host should issue Stop command to the current stream, before */ +/* starting or resuming a new stream. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : bits 0..7 - Algorithm Category (hash) */ +/* bits 8..15 - Algorithm # in category */ +/* bits 16..23 - Stream # */ +/* irLength : DOCH_HASH_REINITIALIZE */ +/* DOCH_HASH_CONTINUE */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_START_HASH_STREAM_CALC */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHStartHashStreamCalculation(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_START_HASH_STREAM_CALC; + in_regs.bSectorCount = (FLByte)(ioreq->irCount & 0x000F); + in_regs.bSectorNumber = (FLByte)((ioreq->irCount & 0x00F0) >> 8); + in_regs.bCylLow = (FLByte)((ioreq->irCount & 0x0F00) >> 16); + in_regs.bCylHigh = 0; + in_regs.bDriveHead = ((FLByte)(ioreq->irLength))|DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_EXT_SECURITY_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHStartHashStreamCalculation(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H R e a d S t o p H a s h S t r e a m C a l c */ +/* */ +/* Read/Stop hash stream calculation */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_CONTINUE_ACCUM */ +/* DOCH_HASH_STOP_ACCUM */ +/* irLength : DOCH_HASH_DONT_RETURN_DATA */ +/* DOCH_HASH_RETURN_ACCUM_DIGEST */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_READ_STOP_HASH_STREAM_CALC */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReadStopHashStreamCalc(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_READ_STOP_HASH_STREAM_CALC; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = ((FLByte)(ioreq->irCount) | (FLByte)(ioreq->irLength) |DOCH_LBA); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_SECURITY_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReadStopHashStreamCalc(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H R e t u r n R a n d om N u m b e r s */ +/* */ +/* Return random numbers */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : bits 0..7 - Algorithm Category */ +/* bits 8..15 - Algorithm # in category */ +/* irLength : # of 32-Bit random numbers to generate */ +/* (max is 64, e.g full sector) */ +/* irData : Pointer to 1 sector of data which will hold */ +/* the number of requested random numbers */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_RETURN_RANDOM_NUMBERS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHReturnRandomNumbers(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_RETURN_RANDOM_NUMBERS; + in_regs.bSectorCount = (FLByte)(ioreq->irCount & 0x000F); + in_regs.bSectorNumber = (FLByte)((ioreq->irCount & 0x00F0) >> 8); + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = ((FLByte)(ioreq->irLength))|DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_EXT_SECURITY_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + DOCH_SECTOR_SIZE); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHReturnRandomNumbers(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* D O C H S e t H a s h K e y */ +/* */ +/* Set hash key */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : DOCH_HASH_DECRYPTION_KEY */ +/* DOCH_HASH_ENCRYPTION_KEY */ +/* irLength : DOCH_HASH_USE_DOCH_PUBLIC_KEY */ +/* DOCH_HASH_USE_HOST_PUBLIC_KEY */ +/* DOCH_HASH_USE_PARTITION_PUBLIC_KEY */ +/* irFlags : DOCH_HASH_USE_DOCH_PRIVATE_KEY */ +/* DOCH_HASH_USE_HOST_PRIVATE_KEY */ +/* irData : 1 Sector of data in case of any "receive" */ +/* option. */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_SECURITY_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_KEYS */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetHashKey(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_KEYS; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + + in_regs.bDriveHead = ((FLByte)(ioreq->irCount) | + ((FLByte)(ioreq->irLength & 0x03) << 2) | + ((FLByte)(ioreq->irFlags & 0x03) << 4)) |DOCH_LBA; + + in_regs.bCommandStatus = DOCH_VSCMD_EXT_SECURITY_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetHashKey(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} + +#endif /*0*/ + + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t P o w e r M o d e */ +/* */ +/* Retrieve device power mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_POWER_MODE */ +/* */ +/* Returns: */ +/* irFlags : */ +/* DOCH_PM_WORK_MODE */ +/* DOCH_PM_INACTIVE_MODE */ +/* irCount : */ +/* Bits 0..1 : Work Mode */ +/* DOCH_WM_NORMAL */ +/* DOCH_WM_LOW_FREQ */ +/* DOCH_WM_NORMAL_AND_AUTO_STBY */ +/* DOCH_WM_LOW_FREQ_AND_AUTO_STBY */ +/* Bits 4..5 : Inactive Mode */ +/* DOCH_IM_IDLE */ +/* DOCH_IM_DPD */ +/* DOCH_IM_IDLE_2_DPD */ +/* irLength : Value of timeout for automatic transfer to */ +/* Inactive mode (0 = disabled) */ +/* Timer value is in milliseconds. */ +/* If Inactive mode is "Standby to DPD" timer */ +/* resolution is 100 ms. */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHGetPowerMode(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_POWER_MODE; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead =DOCH_SELECT_DEV (pdev->bAtaDevNum); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DOCHGetPowerMode(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } + + /*Set output values*/ + ioreq->irFlags = out_regs.bSectorCount; + ioreq->irCount = out_regs.bSectorNumber; + ioreq->irLength = (out_regs.bCylLow + (out_regs.bCylHigh<<8)); + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D O C H S e t P o w e r M o d e */ +/* */ +/* Set device power mode */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irFlags : */ +/* Bits 0..1 - which mode(s) should be set */ +/* DOCH_PM_SET_WORK_MODE */ +/* DOCH_PM_SET_INACTIVE_MODE */ +/* DOCH_PM_SET_BOTH_MODES */ +/* DOCH_PM_SET_NONE */ +/* Bit 2 - which mode device should pass to after set */ +/* DOCH_PM_WORK_MODE */ +/* DOCH_PM_INACTIVE_MODE */ +/* Bit 4 */ +/* DOCH_PM_SAVE_DEFAULT */ +/* (Save new settings as default settings ) */ +/* irCount : */ +/* Bits 0..1 : Work Mode to be set */ +/* DOCH_WM_NORMAL */ +/* DOCH_WM_LOW_FREQ */ +/* DOCH_WM_NORMAL_AND_AUTO_STBY */ +/* DOCH_WM_LOW_FREQ_AND_AUTO_STBY */ +/* Bits 4..5 : Inactive Mode to be set */ +/* DOCH_IM_IDLE */ +/* DOCH_IM_DPD */ +/* DOCH_IM_IDLE_2_DPD */ +/* irLength : Value of timeout for automatic transfer to */ +/* Inactive mode (0 = disabled) */ +/* Timer value is in milliseconds. */ +/* If Inactive mode is "Standby to DPD" timer */ +/* resolution is 100 ms. */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_SET_POWER_MODE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSetPowerModeSingleFloor(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + FLByte setType; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + if((ioreq->irFlags & DOCH_PM_SAVE_DEFAULT) == DOCH_PM_SAVE_DEFAULT) + setType = DRIVE_HEAD_OPT1; + else + setType = 0; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SET_POWER_MODE; + in_regs.bSectorCount = (FLByte)(ioreq->irFlags & 0x0000000F); + in_regs.bSectorNumber = (FLByte)ioreq->irCount; + in_regs.bCylLow = (FLByte)(ioreq->irLength & 0x000000FF); + in_regs.bCylHigh = (FLByte)((ioreq->irLength & 0x0000FF00) >> 8); + in_regs.bDriveHead = (DOCH_SELECT_DEV(pdev->bAtaDevNum) | setType); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + if(rc == DOCH_OK) + { + /*Update DPD settings*/ + if( (ioreq->irFlags&DOCH_PM_SET_WORK_MODE) || (ioreq->irFlags&DOCH_PM_SET_BOTH_MODES) ) + { + gDpdSettings.activeMode = (ioreq->irCount & 0x0000000F); + } + if( (ioreq->irFlags&DOCH_PM_SET_INACTIVE_MODE) || (ioreq->irFlags&DOCH_PM_SET_BOTH_MODES) ) + { + gDpdSettings.inActiveMode = (ioreq->irCount & 0x000000F0); + } + + gDpdSettings.timeOut = ioreq->irLength; + + /*If HAL is SPI, disable DPD*/ + if(gAccessLayerType == DOCH_AL_SPI) + gDpdSettings.activeMode = DOCH_WM_NORMAL; + + return DOCH_OK; + } + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSetPowerModeSingleFloor(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x deviceNum:\r\n"), rc,pdev->bAtaDevNum)); + + return DOCH_GeneralFailure; + } +} + +DOCH_Error DOCHSetPowerMode(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + pdev->bAtaDevNum = 0; + rc = DOCHSetPowerModeSingleFloor(ioreq); + if(rc != DOCH_OK) + return rc; + + if(pdev->wNumOfDevices > 1) + { + pdev->bAtaDevNum = 1; + rc = DOCHSetPowerModeSingleFloor(ioreq); + pdev->bAtaDevNum = 0; + } + + return rc; +} + +#if 0 /* save this api because the command defined in spec */ +/*----------------------------------------------------------------------*/ +/* D O C H C a l i b r a t e C l o c k */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irCount : Desired SYS ICMU clock, in MHZ */ +/* irLength : Desired FLASH ICMU clock, in MHZ */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_EXT_DEVICE_CTRL */ +/* ATA sub-command: */ +/* DOCH_CALIBRATE_CLOCK */ +/* */ +/* Returns: */ +/* irCount : SYS ICMU correction factor */ +/* irLength : FLASH ICMU correction factor */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHCalibrateClock(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_CALIBRATE_CLOCK; + in_regs.bSectorCount = (FLByte)ioreq->irCount; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = (FLByte)ioreq->irLength; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + NULL, + 0); + + /*Output*/ + /*------*/ + ioreq->irCount = out_regs.bSectorCount + (out_regs.bSectorNumber << 8); + ioreq->irLength= out_regs.bCylLow + (out_regs.bCylHigh << 8); + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHCalibrateClock(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_GeneralFailure; + } +} +#endif /*0*/ /* save this api because the command defined in spec */ + +/******************************************************************************/ +/* + * General (Control/Configuration) + */ +/******************************************************************************/ + +void setConfigHWDefaults(void) +{ + gConfigHWDefaults[DOCH_BURST_WRITE_MODE_CTRL] = DOCH_BURST_WRITE_MODE_DEFAULT; + + gConfigHWDefaults[DOCH_BURST_READ_MODE_CTRL] = DOCH_BURST_READ_MODE_DEFAULT; + + gConfigHWDefaults[DOCH_IPL_CTRL] = DOCH_IPL_CTRL_DEFAULT; + + gConfigHWDefaults[DOCH_WARM_BOOT_CTRL] = DOCH_WARM_BOOT_CTRL_DEFAULT; + + gConfigHWDefaults[DOCH_POWER_DOWN] = DOCH_POWER_DOWN_DEFAULT; + + gConfigHWDefaults[DOCH_DMA_CTRL] = DOCH_DMA_CTRL_DEFAULT; + + gConfigHWDefaults[DOCH_DMA_NEGATION_CTRL] = DOCH_DMA_NEGATION_CTRL_DEFAULT; + + gConfigHWDefaults[DOCH_SLOCK] = DOCH_SLOCK_DEFAULT; + + gConfigHWDefaults[DOCH_ENDIAN_CTRL] = DOCH_ENDIAN_CTRL_DEFAULT; + + gConfigHWDefaults[DOCH_OPERATION_MODE_CTRL] = DOCH_OPERATION_MODE_CTRL_DEFAULT; + + gConfigHWInitDone = DOCH_GLOBAL_BOOL_PATTERN; +} + +/*----------------------------------------------------------------------*/ +/* D O C H H w C o n f i g */ +/* */ +/* Control HW registers */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based) */ +/* irFlags : HW Configuration type */ +/* (See DOCH_HwConfigType for values) */ +/* irLength : HW configuration type dependant */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHConfigHW(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq2; + FLByte devNum = 0; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + if(pdev == NULL) + return DOCH_DiskNotFound; + + /* Set default values if not set yet (e.g. DochSDKInit() was not called yet!) */ + if(gConfigHWInitDone != DOCH_GLOBAL_BOOL_PATTERN) + setConfigHWDefaults(); + + gConfigHWDefaults[ioreq->irFlags] = ioreq->irLength; + + /*If init was not done yet, only keep requested value*/ + if(gSdkDOCAddressObtained != DOCH_GLOBAL_BOOL_PATTERN) + { + return DOCH_OK; + } + +setConfigItemToDevice: + + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV(devNum)); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,devNum); + + + switch((DOCH_HwConfigType)(ioreq->irFlags)) + { + case DOCH_BURST_WRITE_MODE_CTRL: + rc = doch_setConfigReg16 (pdev, + HIB_BURST_WRITE_MODE_CTRL_REG, + ioreq->irLength); + break; + + case DOCH_BURST_READ_MODE_CTRL: + rc = doch_setConfigReg16 (pdev, + HIB_BURST_READ_MODE_CTRL_REG, + ioreq->irLength); + break; + + case DOCH_IPL_CTRL: + if(ioreq->irLength & DOCH_IPL_WRITE_ENABLE) + { + FLWord wTmpConfigVal = doch_getConfigReg16(pdev, HIB_IPL_CONTROL_REG); + if((wTmpConfigVal & DOCH_IPL_WRITE_READY) != DOCH_IPL_WRITE_READY) + { + rc = DOCH_ATANotReady; + break; + } + } + rc = doch_setConfigReg16 (pdev, + HIB_IPL_CONTROL_REG, + ioreq->irLength); + break; + + case DOCH_WARM_BOOT_CTRL: + rc = doch_setConfigReg16 (pdev, + HIB_WARM_BOOT_REG, + ioreq->irLength); + break; + + case DOCH_POWER_DOWN: + rc = doch_setConfigReg16 (pdev, + HIB_POWER_DOWN_REG, + ioreq->irLength); + break; + + case DOCH_DMA_CTRL: + rc = doch_setConfigReg16 (pdev, + HIB_DMA_CTRL_REG, + ioreq->irLength); + break; + + case DOCH_DMA_ENABLE: + if(ioreq->irLength) + { +#ifdef DOCH_DMA_CONFIG + gIsDMAEnabled = DOCH_GLOBAL_BOOL_PATTERN; +#endif /*DOCH_DMA_CONFIG*/ + } + else + { + gIsDMAEnabled = 0; + } + break; + + case DOCH_DMA_NEGATION_CTRL: + rc = doch_setConfigReg16 (pdev, + HIB_DMA_NEGATION_REG, + ioreq->irLength); + break; + + case DOCH_SLOCK: + rc = doch_setConfigReg16(pdev, + HIB_SW_LOCK_REG, + ioreq->irLength); + if(rc != DOCH_OK) + break; + + /* If SLOCK was requested, set by ATA command also*/ + if(ioreq->irLength == TRUE) + { + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irCount = DOCH_CP_SLOCK_CTRL; + ioreq2.irSectorNo = ioreq->irLength; + ioreq2.irFlags = DOCH_CUSTOM_PARAM_TEMP; + rc = DOCHSetCustomParameter(&ioreq2); + if(rc != DOCH_OK) + break; + } + break; + + case DOCH_ENDIAN_CTRL: + rc = doch_setConfigReg16(pdev, + HIB_ENDIAN_CTRL_REG, + ioreq->irLength); + break; + + case DOCH_OPERATION_MODE_CTRL: + rc = doch_setConfigReg16(pdev, + HIB_OPERATION_MODE_REG, + ioreq->irLength); + break; + + case DOCH_POWER_MODE_CTRL: + rc = doch_setConfigReg16(pdev, + HIB_POWER_MODE_REG, + ioreq->irLength); + break; + + default: + return DOCH_FeatureNotSupported; + } + + /* If Dev1 exists, set config Item as well*/ + if ((devNum == 0) && (ATA_MAX_NUM_OF_DEVICES>1)) + { + devNum = 1; + goto setConfigItemToDevice; + } + + if (devNum == 1) + { + /*Set device back to Dev0*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV0); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,0); + } + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* D O C H R e c o v e r F r o m P o w e r L o s s */ +/* */ +/* Set last known values of DOCH control registers back to device after */ +/* power loss was detected. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* irFLags : DOCH_DO_NOT_REINIT_MASTER */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHRecoverFromPowerLoss(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket* pdev; + register FLByte i; + IOreq ioreq2; + FLByte bConfFloor = FALSE; + FLByte bFloorsNum; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*general initializations (not required if master was already configured)*/ + if (!(ioreq->irFlags & DOCH_DO_NOT_REINIT_MASTER)) + { + /* Re-set all control register values to device */ + rc = doch_configCommon(pdev); + if(rc != DOCH_OK) + return rc; + bConfFloor =TRUE; + } + + /* init both floors */ + rc = doch_init_floors(pdev,bConfFloor,&bFloorsNum); + if(rc != DOCH_OK) + return rc; + + for (i=0;iwNumOfDevices;i++) + { + pdev->bAtaDevNum = i; + + /*Restore DPD settings */ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irHandle = ioreq->irHandle; + ioreq2.irFlags = (DOCH_PM_SET_BOTH_MODES | DOCH_PM_WORK_MODE); + ioreq2.irCount = (gDpdSettings.activeMode | gDpdSettings.inActiveMode); + ioreq2.irLength = gDpdSettings.timeOut; + rc = DOCHSetPowerModeSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + + /*Restore transfer mode */ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irHandle =ioreq->irHandle; + ioreq2.irCount = pdev->device[i].dataTransferMode; + ioreq2.irLength = pdev->device[i].dwMulti_Current; + rc = DOCHSetDataTransferModeSingleFloor(&ioreq2); + if(rc != DOCH_OK) + return rc; + +#ifdef FL_REPORT_INTERNAL_ERRORS + /* Set DocH to report internal errors*/ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irCount = DOCH_CP_REPORT_ECC_MODE; + ioreq2.irSectorNo = (FLWord)(DOCH_ENABLE_REPORT_ECC_ERRORS); + ioreq2.irFlags = DOCH_CUSTOM_PARAM_TEMP; + ioreq2.irHandle =ioreq->irHandle; + rc = DOCHSetCustomParameterSingleFloor(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_WRN_PRM(FLZONE_ATA, (FLTXT("\r\nWARNING: Failed setting mDoc to report internal errors with status %d \r\n"), rc)); + rc=DOCH_OK; + /*return rc;*/ /*do not fail - backward compatibility*/ + } +#endif /*FL_REPORT_INTERNAL_ERRORS*/ + + } /*for each floor*/ + + pdev->bAtaDevNum =0; +#ifdef CHECK_POWER_ON_EVERY_COMMAND + { + IOreq ioreq2; + + /*Make sure next calls to DOCHGetResetStatus() will reflect actual reset*/ + tffscpy(&ioreq2, ioreq, sizeof(ioreq2)); + DOCHGetResetStatus(&ioreq2); + } +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H A t a R e s e t */ +/* */ +/* Perform ATA reset operation for a specific socket */ +/* Effects both Device0 and Device1 */ +/* */ +/* Parameters: */ +/* socketNum : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error flDOCHAtaReset(FLByte socketNum) +{ + DOCH_Error rc; + IOreq ioreq; + DOCH_Socket* pdev; + DOCH_InitSocket initSocket; + + DOCH_get_socket(pdev, socketNum); + + DBG_PRINT_ERR(FLZONE_API, "\r\n***********************************\r\n"); + DBG_PRINT_ERR(FLZONE_API, "\r\n* Performing flDOCHAtaReset() !!! *\r\n"); + DBG_PRINT_ERR(FLZONE_API, "\r\n***********************************\r\n"); + + /*Protect against access time set to 0*/ + if(gDochAccessNanosec == 0) + return DOCH_BadParameter; + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + + /*----------------------------------------------------------*/ + /* Reset the device(s) using "Set alert level" command */ + /* In case of cascaded configuration - both devices are */ + /* reset prior to checking status since in case of changing */ + /* window size (8/128KB) - Dev1 will not be reachable after */ + /* resetting Dev0 and reinitializing the SDK window */ + /*----------------------------------------------------------*/ + /*Send reset command to Dev1 (if exists)*/ + if(pdev->wNumOfDevices > 1) + { + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV1); /*Dev1*/ + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,1); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, 0x7F); /*Set Alert Level*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, 1); /*"And Reboot"*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_NO_REG, 0xFF); /*Invalid alert level*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, 0xFC); /*Extended Device Contrl*/ + } + /*Send reset command to Dev0*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV0); /*Dev0*/ + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,0); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, 0x7F); /*Set Alert Level*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, 1); /*"And Reboot"*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_NO_REG, 0xFF); /*Invalid alert level*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, 0xFC); /*Extended Device Contrl*/ + +#ifdef DEBUG_TIMEOUT + { + FLDword dwTimeAfterHigh,dwTimeAfterLow,dwTimeBeforeHigh,dwTimeBeforeLow; + FLDword diffHigh,diffLow,dwWaitingTime; + FLDword scaledFreq; + + GetInternalSysTimer(&dwTimeBeforeHigh,&dwTimeBeforeLow); +#endif /*DEBUG_TIMEOUT*/ + + DOCH_DELAY_MSEC(200); + +#ifdef DEBUG_TIMEOUT + GetInternalSysTimer(&dwTimeAfterHigh,&dwTimeAfterLow); + scaledFreq= SysTimerFrequency/1000; /*mSec*/ + diffHigh=(dwTimeAfterHigh-dwTimeBeforeHigh); + if(dwTimeAfterLow>=dwTimeBeforeLow) + { + diffLow= dwTimeAfterLow-dwTimeBeforeLow; + } + else + { + if (!diffHigh) + { + DBG_PRINT_ERR(FLZONE_ATA,"\nticks difference is negative\n"); + } + diffLow= 0xFFFFFFFFl- dwTimeBeforeLow + dwTimeAfterLow; + diffHigh --; + + } + dwWaitingTime = (FLSDword)( (((0xFFFFFFFFl)/(scaledFreq)))*(diffHigh))+ + (((0xFFFFFFFFl)%(scaledFreq))*(diffHigh+1) + (diffLow))/(scaledFreq); + + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nTicks when started:high %lu low %lu"),dwTimeBeforeHigh,dwTimeBeforeLow)); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nTicks when timeout:high %lu low %lu"),dwTimeAfterHigh,dwTimeAfterLow)); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nTicks diff: high %d low %d"),diffHigh,diffLow)); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nDetected frequency %lu"), SysTimerFrequency)); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nDelay time %d msec"), dwWaitingTime)); + + } +#endif /*DEBUG_TIMEOUT*/ + + /* Search for the current window*/ + initSocket.nDeviceAddress = pdev->dwPhysicalAddress; + rc=doch_init_window (socketNum, initSocket); + if(rc != DOCH_OK) + return rc; + + tffsset(&ioreq, 0, sizeof(ioreq)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, socketNum); + ioreq.irFlags= DOCH_DO_NOT_REINIT_MASTER; /* master was initialized in init_window*/ + rc = DOCHRecoverFromPowerLoss(&ioreq); + + return rc; +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H S e t E n v V a r */ +/* */ +/* Set environment variable. */ +/* Available environment variables are listed in DOCH_EnVars. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* Partition number (zero based, if relevant) */ +/* irFlags : Environment variable */ +/* */ +/* irLength : Value to set */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error flDOCHSetEnvVar(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq ioreq2; + + switch((DOCH_EnVars)(ioreq->irFlags)) + { +#ifdef FL_VERIFY_WRITE + case DOCH_ENV_VERIFY_WRITE: + if(ioreq->irLength != 0) + gDochVerifyWrite[DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)] = DOCH_GLOBAL_BOOL_PATTERN; + else + gDochVerifyWrite[DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)] = 0; + return DOCH_OK; +#endif /*FL_VERIFY_WRITE*/ + + case DOCH_ENV_ATA_DEBUG: + if(ioreq->irLength != 0) + gDochAtaDebug = DOCH_GLOBAL_BOOL_PATTERN; + else + gDochAtaDebug = 0; + return DOCH_OK; + + case DOCH_ENV_BLOCK_SPI: + if(gSdkInitDone != DOCH_GLOBAL_BOOL_PATTERN) + { + /* We do not have a window address yet - can be added in the future. */ + DBG_PRINT_ERR(FLZONE_API, "Can not set SPI BLOCKING mode before calling init routine.\r\n"); + return DOCH_ATANotReady; + } + /* Take mutex for current device */ + rc = dochSetMutex(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + DOCH_ON, + DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "bdCallDOCH(): dochSetMutex failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + return rc; + } + + /* SDK is already initialized */ + tffsset(&ioreq2, 0, sizeof(ioreq2)); + ioreq2.irCount = DOCH_CP_WORK_MODES; + ioreq2.irFlags = DOCH_CUSTOM_PARAM_TEMP; + + /*Retreive current value (retrieved in irSectorNo)*/ + rc = DOCHGetCustomParameter(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "flDOCHSetEnvVar(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + } + else + { + /*Modify value*/ + if(ioreq->irLength != 0) + { + ioreq2.irSectorNo |= DOCH_WORK_MODES_BLOCK_SPI; + } + else + { + ioreq2.irSectorNo &= ~(DOCH_WORK_MODES_BLOCK_SPI); + } + + /*Set modified value*/ + + rc = DOCHSetCustomParameter(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "flDOCHSetEnvVar(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + } + } + /* Free mutex for current device */ + dochSetMutex(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + DOCH_OFF, + DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq)); + + return rc; + + case DOCH_ENV_NO_ATA_TIMEOUT: + if(ioreq->irLength != 0) + { + gATANoTimeout = DOCH_GLOBAL_BOOL_PATTERN; + } + else + { + gATANoTimeout = 0; + } + + return DOCH_OK; + + case DOCH_ENV_AUTO_DPD_BY_HOST: + if(ioreq->irLength != 0) + gAutoDPDByHost = DOCH_GLOBAL_BOOL_PATTERN; + else + gAutoDPDByHost = 0; + + return DOCH_OK; + + default: + break; + } + + return DOCH_FeatureNotSupported; +} + +/*----------------------------------------------------------------------*/ +/* D O C H _ C l e a n I R Q _ I n t e r r u p t */ +/* */ +/* Clear the ATA interrupt. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHClearIRQ(IOreq* ioreq) +{ + DOCH_Error rc = clearATAInterrupt(DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + return rc; +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H G e t P h y s i c a l A d d r e s s */ +/* */ +/* Retrieve physical address of the socket. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (zero based) */ +/* */ +/* ATA command: */ +/* NONE */ +/* ATA sub-command: */ +/* NONE */ +/* */ +/* Returns: */ +/* irCount : Socket Physical Address */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHGetPhysicalAddress(IOreq* ioreq) +{ + DOCH_Socket* pdev; + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + ioreq->irCount = pdev->dwPhysicalAddress; + + return DOCH_OK; +} + +#ifdef FL_SLPP +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P U n l o c k R a n g e */ +/* */ +/* Unlock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to unlock */ +/* irLength : Number of sectors to unlock */ +/* irData : Pointer to an 8 bytes passkey array */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_SLPP_UNLOCK_RANGE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSLPPUnlockRange(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + DOCH_SLPPRangeRequestSector rangeReq; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + tffsset(&rangeReq, 0, sizeof(rangeReq)); + rangeReq.dwRangeStartSector = ioreq->irCount; + rangeReq.dwRangeSizeInSectors = ioreq->irLength; + tffscpy(&rangeReq.passkey, ioreq->irData, 8); + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SLPP_UNLOCK_RANGE; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + &rangeReq, + 1); + + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSLPPUnlockRange(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P U n l o c k E n t i r e P a r t i t i o n */ +/* */ +/* Unlock an entire Sector Protected Partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to an 8 bytes passkey array */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_SLPP_UNLOCK_ENTIRE_PARTITION */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSLPPUnlockEntirePartition(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + DOCH_SLPPRangeRequestSector rangeReq; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + tffsset(&rangeReq, 0, sizeof(rangeReq)); + tffscpy(&rangeReq.passkey, ioreq->irData, 8); + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SLPP_UNLOCK_ENTIRE_PARTITION; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + &rangeReq, + 1); + + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSLPPUnlockEntirePartition(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P L o c k R a n g e */ +/* */ +/* Lock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to lock */ +/* irLength : Number of sectors to lock */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_SLPP_LOCK_RANGE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSLPPLockRange(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + DOCH_SLPPRangeRequestSector rangeReq; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + tffsset(&rangeReq, 0, sizeof(rangeReq)); + rangeReq.dwRangeStartSector = ioreq->irCount; + rangeReq.dwRangeSizeInSectors = ioreq->irLength; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SLPP_LOCK_RANGE; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + &rangeReq, + 1); + + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSLPPLockRange(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P S t i c k y L o c k R a n g e */ +/* */ +/* Applies sticky lock to a range of sectors on a sector protected */ +/* partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to sticky lock */ +/* irLength : Number of sectors to sticky lock */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_SLPP_STICKY_LOCK_RANGE */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSLPPStickyLockRange(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + DOCH_SLPPRangeRequestSector rangeReq; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + tffsset(&rangeReq, 0, sizeof(rangeReq)); + rangeReq.dwRangeStartSector = ioreq->irCount; + rangeReq.dwRangeSizeInSectors = ioreq->irLength; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SLPP_STICKY_LOCK_RANGE; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + &rangeReq, + 1); + + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSLPPStickyLockRange(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} + +/*----------------------------------------------------------------------*/ +/* f l D O C H S L P P R e p o r t R a n g e s */ +/* */ +/* Reports unlocked and sticky locked ranges of sector protected */ +/* partition. */ +/* */ +/* Parameters: */ +/* irHandle : bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to DOCH_SLPPReport structure */ +/* */ +/* ATA command: */ +/* DOCH_VSCMD_ACCESS_CONTROL */ +/* ATA sub-command: */ +/* DOCH_SLPP_REPORT_LOCKED_RANGES */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHSLPPReportLockedRanges(IOreq* ioreq) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq)); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_SLPP_REPORT_LOCKED_RANGES; + in_regs.bSectorCount = DOCH_GET_PARTITION_FROM_IOREQ_HANDLE(ioreq); + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_LBA; + in_regs.bCommandStatus = DOCH_VSCMD_ACCESS_CONTROL; + + /*Activate ATA command*/ + /*--------------------*/ + rc = doch_command ( DOCH_GET_SOCKET_FROM_IOREQ_HANDLE(ioreq), + pdev->bAtaDevNum, + &in_regs, + &out_regs, + ioreq->irData, + 1); + + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHSLPPReportLockedRanges(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + if((rc & DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) + return DOCH_ProtectionFault; + else + return DOCH_GeneralFailure; + } +} +#endif /*FL_SLPP*/ +/******************************************************************************/ +/* + * Pass-through routine + */ +/******************************************************************************/ + +/*----------------------------------------------------------------------*/ +/* D O C H A t a P a s s T h r o u g h */ +/* */ +/* Parameters: */ +/* socketNum : Socket to perform operation on */ +/* passThruOP : "0" - No Data */ +/* "1" - Data IN */ +/* "2" - Data OUT */ +/* in_regs : ATA Input registers values */ +/* out_regs : ATA Output registers values */ +/* secNum : Number of sectors to perform */ +/* userBuff : Pointer to user buffer */ +/* (for data in/out commands) */ +/* useInterrupt : Use interrupt when waiting on ATA busy */ +/* */ +/* ATA command: */ +/* user defined (in_regs->bCommandStatus) */ +/* ATA sub-command: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +DOCH_Error DOCHAtaPassThrough(FLSNative socketNum, + FLSNative passThruOP, + DOCH_Registers *in_regs, + DOCH_Registers *out_regs, + FLNative secNum, + void* userBuff, + FLBoolean useInterrupt) +{ + DOCH_Error rc; + DOCH_PassThru_Op ptOP = (DOCH_PassThru_Op)passThruOP; + FLSNative devNum = ((in_regs->bDriveHead & DOCH_DEVICE) == DOCH_DEVICE); + DOCH_Socket* pdev; + + DOCH_get_socket(pdev, socketNum); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Enable interrupts*/ + /*-----------------*/ + pdev->bUseInterrupt = useInterrupt; + + + /*Perform ATA command with registers values set above*/ + /*---------------------------------------------------*/ + rc = doch_ata_passthru (socketNum, devNum, ptOP, in_regs, out_regs, userBuff, secNum); + + /*Disable interrupts*/ + /*------------------*/ + pdev->bUseInterrupt = FALSE; + + if(rc == DOCH_OK) + return DOCH_OK; + else + { + DBG_PRINT_ERR(FLZONE_API, "DOCHAtaPassThrough(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return rc; + } + +} + +/*----------------------------------------------------------------------*/ +/* D o c h S D K I n i t */ +/* */ +/* Initializes the DOCH system, sockets and timers. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +DOCH_Error DochSDKInit(void) +{ + DOCH_Error rc = DOCH_OK; + IOreq ioreq; + IOreq ioreq2; + + /*Set global variable values*/ +#ifdef FL_VERIFY_WRITE + tffsset(gDochVerifyWrite, 0, sizeof(gDochVerifyWrite)); +#endif /*FL_VERIFY_WRITE*/ + tffsset(gDochIrqEnabled, 0, sizeof(gDochIrqEnabled)); + gAccessLayerType = DOCH_AL_NONE; + gATANoTimeout = 0; + gAutoDPDByHost = 0; + gDochAccessNanosec = DOCH_ACCESS_NANOSEC; + + /*Protect against access time set to 0*/ + if(gDochAccessNanosec == 0) + return DOCH_BadParameter; + + /*Set DPD settings to defaults*/ + gDpdSettings.activeMode = DOCH_DPD_DEFAULT_ACTIVE_MODE; + gDpdSettings.inActiveMode = DOCH_DPD_DEFAULT_INACTIVE_MODE; + gDpdSettings.timeOut = DOCH_DPD_DEFAULT_DPD_TIMEOUT; + + /* Set ConfigHW items to defaults */ + if(gConfigHWInitDone != DOCH_GLOBAL_BOOL_PATTERN) + setConfigHWDefaults(); + +#ifdef DOCH_DMA_CONFIG + /* DMA channel was not opened yet... */ + gDMAChannelOpen = 0; +#endif /*DOCH_DMA_CONFIG*/ + + /* Init system related */ + DOCH_SYS_FUNC_INIT; + + /* Register DOCH components */ + rc = (DOCH_Error)flRegisterDochParams(); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "flRegisterDochParams(): failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + return rc; + } + + +#ifndef DOCH_NO_AUTO_WIPE_SECTORS + /* If Device User Attributes indicate that a secure wipe operation to Dev1 + was not issued (due to power failure) - complete the task before init is declared + as done */ + + /*Retrieve device user attributes*/ + tffsset(&ioreq, 0, sizeof(ioreq)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, 0); + ioreq.irData = &devUserAttr; + DOCHGetDiskUserAttributes(&ioreq); + if(devUserAttr.sdkAttributes.sSecureDeleteDev1.bOperationRequired) + { + DBG_PRINT_ERR(FLZONE_API, "DochSDKInit(): Completing wipe-sectors operation due to power failure...\r\n"); + + tffsset(&ioreq2, 0, sizeof(ioreq2)); + + + ioreq2.irSectorNo = devUserAttr.sdkAttributes.sSecureDeleteDev1.dwSecureDeleteStartSector; + ioreq2.irSectorCount = devUserAttr.sdkAttributes.sSecureDeleteDev1.dwSecureDeleteNumOfSectors; + + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq2, devUserAttr.sdkAttributes.sSecureDeleteDev1.bPart); + + rc = DOCHWipeSectors(&ioreq2); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DochSDKInit(): Wipe-sectors operation NOT completed! \r\n"); + return rc; + } + + DBG_PRINT_ERR(FLZONE_API, "DochSDKInit(): Wipe-sectors operation completed successfully \r\n"); + } +#endif /*DOCH_NO_AUTO_WIPE_SECTORS*/ + /*Set global variable*/ + gSdkInitDone = DOCH_GLOBAL_BOOL_PATTERN; + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* D o c h S D K E x i t */ +/* */ +/* If the application ever exits, DochSDKExit should be called before */ +/* exit. */ +/* DochSDKExit flushes all buffers, closes all open files, powers down */ +/* the sockets and removes the interval timer. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* Nothing */ +/*----------------------------------------------------------------------*/ +void DochSDKExit(void) +{ + #ifdef DOCH_DMA_CONFIG + DMA_Params_S dmaParams; + #endif /*DOCH_DMA_CONFIG*/ + + doch_release_socket(0); + + #ifdef DOCH_DMA_CONFIG + /*Free the DMA channel*/ + dmaParams.bOpType = DOCH_DMA_FREE_CHANNEL; + DOCH_DMA_CONFIG(&dmaParams); + if(dmaParams.fDmaStatus != 0) + { + DBG_PRINT_ERR(FLZONE_API, "DochSDKExit(): DOCH_DMA_FREE_CHANNEL Failed\r\n"); + } + #endif /*DOCH_DMA_CONFIG*/ + + DOCH_SYS_FUNC_RELEASE; + + gConfigHWInitDone = 0; + gSdkInitDone = 0; +} + +/*----------------------------------------------------------------------*/ +/* D o c h R e g i s t e r S o c k e t */ +/* */ +/* Register a DOCH socket */ +/* */ +/* Parameters: */ +/* dwAddress : Address were DOCH socket is located */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failure */ +/*----------------------------------------------------------------------*/ +DOCH_Error DochRegisterSocket(FLDword dwAddress) +{ + DOCH_Error rc; + DOCH_InitSocket initSocket; + tffsset(&initSocket, 0, sizeof(initSocket)); + initSocket.nDeviceAddress = dwAddress; + + rc = doch_init_socket(0,initSocket); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "DochSDKInit(): doch_init_socket Failed on socket #"); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("%d "), 0)); + DBG_PRINT_ERR(FLZONE_API, "with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \r\n"), rc)); + + return DOCH_AdapterNotFound; + } + + return DOCH_OK; +} + +#ifdef __cplusplus +} +#endif diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_api.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_api.h new file mode 100755 index 00000000..ea5625c0 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_api.h @@ -0,0 +1,130 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/***********************************************************************************/ +/* */ +/* Header file for doch_api module */ +/* */ +/***********************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/doch_api.h-arc $ + * + * Rev 1.32 Oct 22 2007 11:34:48 einat.avidan + * update copyrights header + * + * Rev 1.31 Sep 11 2006 13:45:14 yaniv.iarovici + * Legal header added + * + * Rev 1.30 Aug 09 2006 17:26:52 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +#ifndef _DOCH_API +#define _DOCH_API + +#include "flcommon.h" +#include "flchkdef.h" +#include "_dochapi.h" +#include "blockdev.h" + + +/************************/ +/* Exported routines */ +/************************/ + +#ifdef __cplusplus +extern "C" { +#endif + +extern FLBoolean gDochIrqEnabled[]; + +DOCH_Error bdCallDOCH(int functionNo, IOreq *ioreq); +extern DOCH_Error doch_init_socket (int socketNo, DOCH_InitSocket); +extern DOCH_Error doch_release_socket( int socketNo ); + +extern FLDword gDochAccessNanosec; + + +/*----------------------------------------------------------------------*/ +/* f l B u i l d G e o m e t r y */ +/* */ +/* Get C/H/S information of the disk according to number of sectors. */ +/* */ +/* Parameters: */ +/* capacity : Number of Sectors in Volume */ +/* cylinders : Pointer to Number of Cylinders */ +/* heads : Pointer to Number of Heads */ +/* sectors : Pointer to Number of Sectors per Track */ +/* oldFormat : True for one sector per culoster */ +/* wIrHandle : Handle of the disk partition to check */ +/* */ +/*----------------------------------------------------------------------*/ +TFFS_DLL_API void NAMING_CONVENTION flBuildGeometry(FLDword capacity, FLDword FAR2 *cylinders, + FLDword FAR2 *heads, FLDword FAR2 *sectors, FLBoolean oldFormat, FLWord wIrHandle); + +/* Management routines */ +DOCH_Error flDOCHAtaReset(FLByte socketNum); +DOCH_Error DochSDKInit(void); +void DochSDKExit(void); +DOCH_Error DochRegisterSocket(FLDword dwAddress); + +/* User define component registration routine */ +DOCH_Error flRegisterDochComponents(void); +/* Access layer registration routines */ +DOCH_Error hal_init_nor (FLSNative socketNo); +DOCH_Error hal_init_spi (FLSNative socketNo); +DOCH_Error hal_init_sim (FLSNative socketNo); +DOCH_Error hal_init_nor_noFunc (FLSNative socketNo); +DOCH_Error hal_init_spi_noFunc (FLSNative socketNo); +DOCH_Error hal_init_sim_noFunc (FLSNative socketNo); +DOCH_Error hal_init_user_routines(FLSNative socketNo, DOCH_BusAccess_routines accessPointerStruct); + +void DOCH_SetBits(FLDword* var, FLDword mask, FLByte offset, FLDword val); + +#ifdef __cplusplus +} +#endif + +#endif /*_DOCH_API*/ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_ata.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_ata.c new file mode 100755 index 00000000..bbc2c9fe --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_ata.c @@ -0,0 +1,3599 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/doch_ata.c-arc $ + * + * Rev 1.77 Dec 26 2007 10:13:16 einat.avidan + * io_input() - after data XFER - make sure DRQ is off. + * fixed sequences for init and recoverFromPowerLoss. + * removed DOCH_CHECK_CHIP_ID flag (always check chip ID) + * + * Rev 1.76 Dec 16 2007 11:36:02 einat.avidan + * add debug printout + * + * Rev 1.75 Dec 11 2007 12:28:34 einat.avidan + * init sequence and DOCHConfigHW: change parameters of internal functions + * remove obsolete code (function doch_status) + * + * Rev 1.74 Dec 04 2007 17:27:14 einat.avidan + * Add readiness check before io_x sequences. + * Avoid writing to the same register more than once in short time + * Bug fix: DOCHBLK_READ and DOCHBLK_WRITE do not return value. + * Wait for mount before reset during init sequence + * Bug fix: part of configuration registers should be set only after device selection + * def_dochDelayUsec - receives new parameter: access time. + * + * Rev 1.73 Nov 07 2007 19:18:56 einat.avidan + * fix compilation error in retrieveAndPrintAtaDebug + * + * Rev 1.72 Oct 30 2007 17:01:26 einat.avidan + * replace dochEnableATAInterrupt function with macros + * bug fix: after write DMA transactions-waiting for ready + * was too long. + * + * Rev 1.71 Oct 23 2007 15:35:18 einat.avidan + * failure in reset in 128K window caused failure in init + * + * Rev 1.70 Oct 23 2007 12:27:52 einat.avidan + * optimization: delay after setting head register only + * when switching floors + * + * Rev 1.69 Oct 22 2007 11:34:48 einat.avidan + * update copyrights header + * + * Rev 1.68 Oct 21 2007 16:57:08 einat.avidan + * fix compilation warnings + * + * + * Rev 1.67 Oct 21 2007 10:39:56 Einat.Avidan + * optimization: save address of each Hib area instead of + * saving offset and core address (spare repetitive add commands) + * check return value of DOCH_SET_WINDOW_OFFSET + * fix printout and comments + * optimization:spare allocation of unnecessary local variabeles + * bug fix: cascaded configuration support in doch_init_socket + * make several trials to select second floor and read it's chip ID + * fix compilation warning + * + * Rev 1.66 Oct 11 2007 18:48:22 Einat.Avidan + * Replace global Boolean pattern with pattern in size of + * byte instead of dWord + * caller responsibility to set device head register + * when calling to doch_check_chipID + * fix printouts + * Interrupts are enabeled\ disabeled in the ATA level instead of API level + * remove unrequired ready check in io_output io_input and io_ctrl + * add long wait in delete partition command + * doch_reset resets both floor (no need of devNum parameter) + * Add support for reporting internal errors + * caller responsible to set device head register + * when calling to dochEnableATAInterrupt + * upport cascaded configuration: add delay after device switch + * add compilation flags for SOTP and SLPP + * + * Rev 1.65 Sep 04 2007 15:37:58 einat.avidan + * fix printouts + * bug fix: in io_output(): add_partition and secure_erase should + * have longer waiting time + * bug fix: in doch_init_socket(): no need to call flDOCHSetPowerMode + * twice for each floor + * + * Rev 1.64 Apr 05 2007 15:44:54 einat.avidan + * compilation warning fix (SCR 2765) + * + * Rev 1.63 Mar 13 2007 13:47:20 einat.avidan + * add support for SLPP + * + * Rev 1.62 Mar 12 2007 14:49:36 einat.avidan + * add compilation flag for disable SW reset + * + * Rev 1.61 Mar 11 2007 16:30:48 einat.avidan + * bug fix: check NULL pointers before using it + * + * Rev 1.60 Feb 28 2007 10:32:50 einat.avidan + * CX tools support + * + * Rev 1.59 Feb 15 2007 17:50:28 Einat.Avidan + * Enable burst without DMA + * bug fix in burst with DMA: sent the ATA command before it entered the burst mode. + * bug fix in burst with DMA:Did not allow DMA with edge + * Enables reading status asynchronous or synchronous in burst + * + * + * Rev 1.57.2.5 Dec 04 2006 12:44:40 Yaniv.Iarovici + * Add ; to MACRO + * + * Rev 1.57.2.4 Nov 30 2006 10:23:46 Yaniv.Iarovici + * Added DOCH_WAIT_B4_DEV1_ID (anchor for setting a delay between Dev0 and Dev1 ID process). + * + * Rev 1.57.2.3 Nov 21 2006 14:26:22 Yaniv.Iarovici + * 1. Typo in comments + * 2. Check ChipID before applying ATA reset. + * + * Rev 1.57.2.2 Nov 12 2006 09:46:52 Yaniv.Iarovici + * 1. Fixed compilation warnings. + * 2. doch_reset(): + * - Added parameter 'FLBoolean waitOnBusy'. + * - Wait for BUSY signal in ATA status register de-assertion before sending SRST, if waitOnBusy is TRUE. + * + * Rev 1.57.2.1 Oct 31 2006 12:23:32 yaniv.iarovici + * Added doch_init_window(). + * + * Rev 1.57.2.0 Oct 29 2006 11:28:54 Yaniv.Iarovici + * Fixed compilation warning. + * + * Rev 1.57 Oct 05 2006 11:00:36 yaniv.iarovici + * 1. Removed dwMulti_Read, dwMulti_Write. + * 2. Added dwMulti_MAX. + * + * Rev 1.56 Sep 14 2006 09:56:38 yaniv.iarovici + * Fix compilation warnings + * + * Rev 1.55 Sep 11 2006 13:45:14 yaniv.iarovici + * Legal header added + * + * Rev 1.54 Sep 10 2006 10:03:28 Yaniv.Iarovici + * Bug Fix: DMA handling in io_input() and io_output() (Device Head Register). + * + * Rev 1.53 Sep 03 2006 14:44:34 Yaniv.Iarovici + * Fixed DMA handling handling when DRQ>1. + * + * Rev 1.52 Aug 16 2006 08:45:46 Yaniv.Iarovici + * 1) Remove comment regarding #define DOCH_CHECK_CHIP_ID + * 2) Add global var: 'gIgnoreErrorBit' - used by ready() to ignore error bit when checking status (used when identifying device using ATA standard IDENTIFY DEVICE command) + * 3) Remove commented function - doch_pause() + * 4) Add 2nd argument 'FLSNative devNum' to doch_check_chipID() + * 5) Update clear_socket() to support 'ETFFS_Identified' field + * 6) Move the call to retrieveAndPrintAtaDebug() to after command is completed in doch_ata_passthru() + * 7) Add support to check CHIP ID on specific device (not only Dev0) in doch_check_chipID() + * 8) Add dunction 'doch_ATAstd_IDENTIFY_DEVICE(FLSNative socketNo, FLSNative devNum)' to identify a device using ATA standard IDENTIFY DEIVCE command when ETFFS was not detected on the device + * 9) Modify doch_init_socket() to: + * - Identify a device using ATA standard IDENTIFY DEVICE command when no ETFFS detected. + * - Check CHIP ID on specific device to reduce the time needed to identify NON-existing device. + * - Set Power Mode only if ETFFS was detected on the device. + * + * Rev 1.51 Aug 10 2006 10:23:02 Polina.Marimont + * bug fix - identifying in 128K window failure + * + * Rev 1.50 Aug 09 2006 17:26:52 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +/* + * includes + */ + +#include "flcustom.h" +#include "flsystem.h" +#include "flchkdef.h" +#include "flsystyp.h" +#include "flcommon.h" +#include "flsysfun.h" +#include "doch_func.h" +#include "doch_ata.h" +#include "hib.h" + +#ifdef FL_MIGRATION_VERSION +#include "docsys.h" +#endif /*FL_MIGRATION_VERSION*/ + +FLWord gMemWindowType = 0; +FLDword gDochMemWinSize = 0; + +FLWord gHibContRegAreaAddress = 0; +FLWord gHibDataPortAreaAddress = 0; +FLWord gHibConfigRegAreaAddress = 0; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND +FLByte gDeviceTurnedOff = FALSE; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + +#ifdef DEBUG_TIMEOUT +extern FLDword SysTimerFrequency; +extern void GetInternalSysTimer(FLDword * ticksHigh, FLDword * ticksLow); +#endif /*DEBUG_TIMEOUT*/ + +/* + * types + */ + +/* + * Global Variables + */ + +#ifdef __cplusplus +extern "C" { +#endif + +FLDword gAccessLayerType = 0; + +FLByte gATANoTimeout = 0; + +FLDword gUseShortWaitOnBusy = 0; + +FLDword gIgnoreErrorBit = 0; + +FLDword gDochAccessNanosec = 0; + +#ifdef DOCH_DMA_CONFIG +FLByte gDMAChannelOpen = 0; +#endif /*DOCH_DMA_CONFIG*/ + +DOCH_DpdSettings gDpdSettings; + +/* all DOCH sockets */ +DOCH_Socket sockets [DOCH_MAX_SOCKETS]; + +#ifdef __cplusplus +} +#endif + +#define DISABLE_INTERRUPT(pdev) \ + pdev->device[pdev->bAtaDevNum].flags &= ~DOCH_FLAGSB_USE_INTERRUPT;\ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CONTROL_REG, DOCH_ATA_NIEN) + +#ifdef DOCH_FILE_SIMULATION +#define ENABLE_INTERRUPT(pdev) \ + if (gAccessLayerType != DOCH_AL_SIM)\ + {\ + pdev->device[pdev->bAtaDevNum].flags |= DOCH_FLAGSB_USE_INTERRUPT;\ + }\ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CONTROL_REG,0) +#else /*DOCH_FILE_SIMULATION*/ +#define ENABLE_INTERRUPT(pdev) \ + pdev->device[pdev->bAtaDevNum].flags |= DOCH_FLAGSB_USE_INTERRUPT;\ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CONTROL_REG,0) +#endif /*DOCH_FILE_SIMULATION*/ +/* + * static vars + */ +static DOCH_DeviceUserAttr devUserAttr; + +static DOCH_ConfigRegsValue configRegValue; +static DOCH_ConfigRegsSet configRegValueSet; + +static FLByte ataDBG[DOCH_SECTOR_SIZE]; + +static DOCH_DeviceInfo gDiskOnChipDeviceInfo; + + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * static routines + */ +static void clear_socket(DOCH_Socket * pdev); +static DOCH_Error ready(DOCH_Socket *pdev, FLSNative devNum, DOCH_Reg reg, FLByte mask, FLByte on_bits, FLDword millisec); +static DOCH_Error doch_find_base_address(FLSNative socketNo, FLDword Address); + +static DOCH_Error doch_check_chipID(FLSNative socketNo); + +/* + * Internal routines + */ +DOCH_Error io_input(DOCH_Socket *pdev, FLSNative devNum, DOCH_Registers* regs, void *buf, FLNative secNum); +DOCH_Error io_output(DOCH_Socket *pdev, FLSNative devNum, DOCH_Registers* regs, void *buf, FLNative secNum); +DOCH_Error io_ctrl(DOCH_Socket *pdev, FLSNative devNum, DOCH_Registers* regs); + +/* + * externals + */ + +DOCH_Error get_out_registers(DOCH_Socket* pdev, FLSNative devNum, DOCH_Registers* out_regs); + +extern DOCH_Error flUnRegisterDochParams(FLSNative socketNo); + +extern FLByte gSdkDOCAddressObtained; +extern FLDword gConfigHWDefaults[DOCH_NUM_OF_DCONFIGHW_ITEMS]; + +extern FLByte gDochAtaDebug; + +extern FLByte gSdkInitDone; + + +#ifdef CX_ATA_SNIFFER +typedef struct _AtaCmdRec_S +{ + FLSNative socketNo; + FLByte bAtaCmdType; + FLSNative dwDevNum; + DOCH_Registers regs; + FLSNative dwSecNum; + +}AtaCmdRec_S; + +typedef enum _AtaCmdType +{ + CX_ATATYPE_CTRL=0x0, + CX_ATATYPE_INPUT=0x1, + CX_ATATYPE_OUTPUT=0x2 +}AtaCmdType; + +static AtaCmdRec_S ataCmdRec; +#endif /*CX_ATA_SNIFFER*/ + + +/****************************************************************************** + * * + * c l e a r _ s o c k e t * + * * + * Clears socket structure * + * * + * Parameters : * + * pdev : device to act on * + * * + ******************************************************************************/ +static +void clear_socket ( DOCH_Socket * pdev ) +{ + register FLSNative i = 0; + + pdev->wSocketNo = 0; + pdev->wNumOfDevices = 0; + pdev->nTotalCapacity = 0; + pdev->wTotalNumOfPartitions = 0; + pdev->wLastPartitionSpanned = 0; + pdev->bUseDMA = 0; + pdev->bUseInterrupt = 0; + pdev->bUseBurst = 0; + pdev->bAtaDevNum = 0; + pdev->bRegBase = NULL; +#ifdef DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES + pdev->bLastDevNum = 0xFF; +#endif /*DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES*/ + + for(i = 0; idevice[i].wNumOfPartitions = 0; + + pdev->device[i].ETFFS_Identified = FALSE; + + /* we assume that multiple sector read/writes aren't supported */ + pdev->device[i].dwMulti_MAX = 0; + pdev->device[i].dataTransferMode = DOCH_DATA_MODE_SINGLE; + + pdev->device[i].dwSpare1 = 0; + + } +} + +#ifdef CHECK_POWER_ON_EVERY_COMMAND +/****************************************************************************** + * * + * d o c h C h e c k P F S y m p t o m * + * * + * Wait until particular bit pattern appears in specified DOCH register * + * * + * Parameters : * + * pdev : device to act on * + * reg : DOCH register offset from base address * + * mask : bits we are interested in * + * on_bits : bits we are waiting to become '1' * + * millisec : timeout value in milliseconds * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error dochCheckPFSymptom(FLSNative socketNo, FLByte devNum, FLBoolean beforeCommand /* Used for debug prints */) +{ + DOCH_Error rc; + DOCH_Socket* pdev = NULL; + DOCH_Registers in_regs; + FLByte resetOccured = 0; + + if(!gSdkInitDone) + return DOCH_OK; + + /* Sanity Check*/ + /*=============*/ + if(socketNo > DOCH_MAX_SOCKETS - 1) + return DOCH_BadParameter; + + pdev = &sockets[socketNo]; + + /*Set Device Head register to appropriate device*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV(devNum)); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,devNum); + + /*Check ChipID to detect power failure ("Device Off") */ + if(doch_check_chipID(socketNo) == DOCH_OK) /*caller responsibility to set device head register*/ + { + return DOCH_OK; + } + + /* Check reset status + Note: We DO NOT call DOCHGetResetStatus() to avoid recursion */ + + /*Update ATA register values*/ + /*--------------------------*/ + in_regs.bFeaturesError = DOCH_GET_RESET_STATUS; + in_regs.bSectorCount = 0; + in_regs.bSectorNumber = 0; + in_regs.bCylLow = 0; + in_regs.bCylHigh = 0; + in_regs.bDriveHead = DOCH_SELECT_DEV(devNum); + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + + gUseShortWaitOnBusy = DOCH_LONG_IDENTIFY_TIMEOUT; + rc = io_ctrl (pdev, devNum, &in_regs); + gUseShortWaitOnBusy = 0; + + resetOccured = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_SECTOR_CNT_REG); + + if(rc != DOCH_OK) + { + if(beforeCommand) + DBG_PRINT_ERR(FLZONE_ATA, "\r\ndochCheckPFSymptom(): io_ctrl DOCHGetResetStatus FAILED (Before Command)\r\n"); + else + DBG_PRINT_ERR(FLZONE_ATA, "\r\ndochCheckPFSymptom(): io_ctrl DOCHGetResetStatus FAILED (After Command)\r\n"); + + gDeviceTurnedOff = DOCH_GLOBAL_BOOL_PATTERN; + return DOCH_DeviceTurnedOff; + } + else if(resetOccured) + { + if(beforeCommand) + DBG_PRINT_ERR(FLZONE_ATA, "\r\ndochCheckPFSymptom(): Suspend mode detected (Before Command)\r\n"); + else + DBG_PRINT_ERR(FLZONE_ATA, "\r\ndochCheckPFSymptom(): Suspend mode detected (After Command)\r\n"); + + gDeviceTurnedOff = DOCH_GLOBAL_BOOL_PATTERN; + return DOCH_DeviceTurnedOff; + } + + else + { + if(beforeCommand) + DBG_PRINT_ERR(FLZONE_ATA, "\r\ndochCheckPFSymptom(): Suspend mode not detected but failed to read chip id (Before Command)\r\n"); + else + DBG_PRINT_ERR(FLZONE_ATA, "\r\ndochCheckPFSymptom(): Suspend mode not detected but failed to read chip id (After Command)\r\n"); + + gDeviceTurnedOff = DOCH_GLOBAL_BOOL_PATTERN; + return DOCH_DeviceTurnedOff; + } +} +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + +/****************************************************************************** + * * + * r e a d y * + * * + * Wait until particular bit pattern appears in specified DOCH register * + * * + * Parameters : * + * pdev : device to act on * + * reg : DOCH register offset from base address * + * mask : bits we are interested in * + * on_bits : bits we are waiting to become '1' * + * millisec : timeout value in milliseconds * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +static +DOCH_Error ready ( DOCH_Socket * pdev, + FLSNative devNum, + DOCH_Reg reg, + FLByte mask, + FLByte on_bits, + FLDword millisec ) +{ + DOCH_Error error = DOCH_OK; + register FLDword tries; + FLByte status = 0; + + FLDword use_interrupt = + ( ((pdev->device[devNum].flags & DOCH_FLAGSB_USE_INTERRUPT) == DOCH_FLAGSB_USE_INTERRUPT) && + (pdev->bUseInterrupt) ); + +#ifdef DEBUG_TIMEOUT + FLDword dwTimeAfterHigh,dwTimeAfterLow,dwTimeBeforeHigh,dwTimeBeforeLow; + GetInternalSysTimer(&dwTimeBeforeHigh,&dwTimeBeforeLow); +#endif /*DEBUG_TIMEOUT*/ + + + /*Special case: ignore error bit + (should be ignored when performing ATA standard IDENTIFY DEVICE command)*/ + if(gIgnoreErrorBit) + mask &= ~(DOCH_ERROR); + + /*Protect against access time set to 0*/ + if(gDochAccessNanosec == 0) + { + DBG_PRINT_ERR(FLZONE_ATA, "ready(): Bad Parameter "); + return DOCH_BadParameter; + } + tries = millisec * (1000000UL / gDochAccessNanosec); + + /*If popper environment variable was set - set timeout to max*/ + if(gATANoTimeout == DOCH_GLOBAL_BOOL_PATTERN) + { + tries = DOCH_ATA_MAX_TIMEOUT; + } + + /*If gUseShortWaitOnBusy is set, use its value*/ + if(gUseShortWaitOnBusy != 0) + { + tries = gUseShortWaitOnBusy; + } + + /*Protect tries from being set to "0" + (in conjunction with tries-- might cause a very long delay...)*/ + if(tries == 0) + tries = 1; + + /*Wait for BUSY bit to clear*/ + while (tries-- > 0) + { + if ((millisec >= DOCH_LONG_WAIT) && (use_interrupt)) + { + /* wait for device's interrupt */ + DOCH_SLEEP(pdev->wSocketNo, devNum, DOCH_DEFAULT_SLEEP_PERIOD); + } + + status = DOCHREAD_ATA_REG(pdev->bRegBase, reg); + if ((status & mask) == on_bits) + { + /* read status once again, just to be sure .. */ + /*if ((DOCHREAD_ATA_REG(pdev->device[devNum].bRegBase, reg) & mask) == on_bits)*/ + return DOCH_OK; + } + /*If an error was detected - return the error code*/ + else if( ((status & DOCH_ERROR) == DOCH_ERROR) && + ((status & DOCH_BUSY) != DOCH_BUSY)) + { + error = (DOCH_Error)DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_ERROR_REG); + + /*Special Case - Device returned "0" in the error register. + This DOES NOT mean that everything is OK, since the error bit was raised. + Hence, we will return "DOCH_ATA_ERROR_ABORT"*/ + if(error == DOCH_OK) + error = DOCH_ATA_ERROR_ABORT; + + if(pdev->bUseInterrupt && (millisec == DOCH_SHORT_WAIT)) + { + DOCH_UNSERVICED_INTERRUPT(pdev->wSocketNo, devNum); + } + + DBG_PRINT_ERR(FLZONE_ATA, "ready(): ATA Error: "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("0x%x status:0x%x device number:%d"),error,status,devNum)); + DBG_PRINT_ERR(FLZONE_ATA, "\r\n"); + + return error; + } + } + +#ifdef DEBUG_TIMEOUT + GetInternalSysTimer(&dwTimeAfterHigh,&dwTimeAfterLow); +#endif /*DEBUG_TIMEOUT*/ + + DBG_PRINT_ERR(FLZONE_ATA, "\r\nready(): Timed Out\r\n"); +#ifdef DEBUG_TIMEOUT + { + FLDword diffHigh,diffLow,dwWaitingTime; + FLDword scaledFreq= SysTimerFrequency/1000; /*mSec*/ + + diffHigh=(dwTimeAfterHigh-dwTimeBeforeHigh); + if(dwTimeAfterLow>=dwTimeBeforeLow) + { + diffLow= dwTimeAfterLow-dwTimeBeforeLow; + } + else + { + if (!diffHigh) + { + DBG_PRINT_ERR(FLZONE_ATA,"\nticks difference is negative\n"); + } + diffLow= 0xFFFFFFFFl- dwTimeBeforeLow + dwTimeAfterLow; + diffHigh --; + } + dwWaitingTime = (FLSDword)( (((0xFFFFFFFFl)/(scaledFreq)))*(diffHigh))+ + (((0xFFFFFFFFl)%(scaledFreq))*(diffHigh+1) + (diffLow))/(scaledFreq); + + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nTicks when started:high %lu low %lu"),dwTimeBeforeHigh,dwTimeBeforeLow)); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nTicks when timeout:high %lu low %lu"),dwTimeAfterHigh,dwTimeAfterLow)); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nTicks diff: high %d low %d"),diffHigh,diffLow)); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nDetected frequency %lu"), SysTimerFrequency)); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\nWaiting time %d msec"), dwWaitingTime)); + + } +#endif /*DEBUG_TIMEOUT*/ + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\r\ndevice number:%d status register: 0x%x, mask 0x%x, on_bits 0x%x\r\n"),devNum,status,mask,on_bits)); + + /*recalculate the number of tries for printout*/ + tries = millisec * (1000000UL / gDochAccessNanosec); + if(gATANoTimeout == DOCH_GLOBAL_BOOL_PATTERN) + { + tries = DOCH_ATA_MAX_TIMEOUT; + } + if(gUseShortWaitOnBusy != 0) + { + tries = gUseShortWaitOnBusy; + } + + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\r\ntries %d ,millisec: %d, gATANoTimeout %d, gUseShortWaitOnBusy %d \r\n"),tries,millisec,gATANoTimeout,gUseShortWaitOnBusy)); + + /* If timeout had occurred, and not whilst looking for a device, + reset ATA and poll for ready */ + if(gUseShortWaitOnBusy == 0) + { + DBG_PRINT_ERR(FLZONE_ATA, "ready(): Resetting device... "); + error = doch_reset(pdev);/*reset both floors*/ + if(error == DOCH_OK) + DBG_PRINT_ERR(FLZONE_ATA, "Passed! \r\n"); + else + { + DBG_PRINT_ERR(FLZONE_ATA, "Failed! \r\n"); + return error; + } + } + + return DOCH_TimedOut; +} + +/****************************************************************************** + * * + * i o _ i n p u t * + * * + * Read sectors from DOCH device. * + * * + * Parameters : * + * pdev : device to act on * + * regs : DOCH_Registers * + * buf : user buffer to read to * + * secNum : # of sectors to read * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error io_input ( DOCH_Socket * pdev, + FLSNative devNum, + DOCH_Registers * regs, + void * buf, + FLNative secNum) +{ + FLNative sectors_to_read; + DOCH_Error rc; + FLSNative status; + +#ifdef CX_ATA_SNIFFER + extern FILE * ataLogFile; + ataCmdRec.bAtaCmdType = CX_ATATYPE_INPUT; + ataCmdRec.dwDevNum=devNum; + ataCmdRec.regs=*regs; + ataCmdRec.dwSecNum=(secNum ? secNum : 256); + if (!fwrite(&ataCmdRec,sizeof(AtaCmdRec_S),1,ataLogFile)) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nError:io_input():Cannot write command rec to file \r\n"); + return DOCH_ATA_ERROR_ABORT; + } + if (fseek(ataLogFile,ataCmdRec.dwSecNum*DOCH_SECTOR_SIZE,SEEK_CUR )) + { DBG_PRINT_ERR(FLZONE_ATA, "\r\nError:io_input():Cannot fseek file error. \r\n"); + return DOCH_ATA_ERROR_ABORT; + } + fflush(ataLogFile); +#endif /*CX_ATA_SNIFFER*/ + + /*general sequence: + 1. set drive head register + 2. handle interrupts + 3. write ATA registers (if not DMA) + + 4. if BURST transfer:(Synchronous) + 4.1 set DOCH BURST READ Control Register + 4.2 if reading status sync - enter BURST mode on host + 4.3 initiate ATA Command + 4.4 for each buffer (in size of drqSize): + 4.4.1 Check DRQ ready and not BSY before data xfer + 4.4.2 if reading status async - enter BURST Mode on host + 4.4.3 Perform Read using burst + 4.4.4 if reading status async - exit BURST Mode on host + 4.5 if reading status sync - Exit BURST Mode on host + 4.6 Set DOCH BURST READ Control Register + + 5. else if DMA transfer: + 5.1 calculate number of blocks and start sector + 5.2 Set up the DMA transfer - Platfrom + 5.3 set device head register + 5.5 if burst mode required- Set DOCH BURST READ Control Register + 5.5 Set up the DMA transfer - Device (write DMA ctrl register) + 5.6 write ATA registers + 5.7 if burst mode required- enter BURST Mode + 5.8 Initiate ATA Command + 5.9 Wait for DMA transfer to complete + 5.10 if burst mode required-Exit BURST Mode + 5.11 Disable DMA + 5.12 Check status of DMA operation + 5.13 If DRQ>1 and some sectors are left to be transfered + perform another DMA transaction with altered frame/block sizes + + 6. else (PIO transfer): + 6.1 Initiate ATA Command + 6.2 Check DRQ ready and not BSY before data xfer + 6.3 for each buffer (in size of drqSize): + 6.3.1 read block + 6.3.2 Check DRQ ready (don`t perform after LAST sector was transfered) + + 7. wait until device is ready + 8. check operation's status + */ + + + /*Calculate how many sectors are to be read*/ + /*Note: "0" - 256 Sectors to read*/ + sectors_to_read = (secNum ? secNum : 256); + + /* 1. set drive head register*/ + /*****************************/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, regs->bDriveHead); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,((regs->bDriveHead & DOCH_DEVICE) == DOCH_DEVICE)); + + /* 2. handle interrupts*/ + /***********************/ + /*enable interrupt - caller responsibility to set floor*/ + if (pdev->bUseInterrupt && DOCH_IRQ_RB_INIT(pdev->wSocketNo)) + { + ENABLE_INTERRUPT(pdev); + } + + /*Wait for busy bit to clear*/ + status = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + if((status & (DOCH_BUSY|DOCH_DRQ|DOCH_READY))!= DOCH_READY) + { + if ((rc = ready(pdev, devNum, DOCH_ALT_STATUS_REG, (DOCH_BUSY|DOCH_DRQ|DOCH_READY), DOCH_READY, DOCH_SHORT_WAIT)) != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_input(): ATA not Ready (before command) \r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x \r\n"),rc)); + DISABLE_INTERRUPT(pdev); + return rc; + } + } + + /*3. write ATA registers (if not DMA)*/ + /*************************************/ + /*Write ATA registers, without ATA command register*/ + /*Note: if DMA was requested, registers will be written inside DMA context*/ + if(!pdev->bUseDMA) + { + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, regs->bSectorCount); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_NO_REG, regs->bSectorNumber); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_LOW_REG, regs->bCylLow); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_HIGH_REG, regs->bCylHigh); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, regs->bFeaturesError); + } + + /*******************BURST transfer was requested************************/ + /*4. if BURST transfer:(Synchronous) */ + /*************************************/ + #ifdef DOCH_USE_BURST_MODE_READ + if((pdev->bUseBurst) && (!pdev->bUseDMA)) + { + FLByte drqSize = 0; + FLByte i; + + if(pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_SINGLE) + { + drqSize = 1; + } + else if(pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_MULT) + { + drqSize = (FLByte)pdev->device[devNum].dwMulti_Current; + } + + /*4.1 set DOCH BURST READ Control Register*/ + /******************************************/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, + HIB_BURST_READ_MODE_CTRL_REG, + (DOCH_BURST_ENABLE | DOCH_BURST_HOLD | DOCH_BURST_LENGTH | (DOCH_BURST_LATENCY) | (DOCH_BURST_WAIT_STATE)) + ); + +#ifndef DOCH_READ_STATUS_ASYNC_IN_BURST + /*4.2 if reading status sync - enter BURST mode on host*/ + /******************************************************/ + DOCH_HOST_ENTER_READ_BURST_MODE; +#endif /*DOCH_READ_STATUS_ASYNC_IN_BURST*/ + + /*4.3 initiate ATA Command*/ + /**************************/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, regs->bCommandStatus); + + /*4.4 for each buffer (in size of drqSize):*/ + /*******************************************/ + for(i=0; ibRegBase, + DOCH_DATA_PORT_AREA_ADDRESS, + (FLByte*)buf + (i<bRegBase, HIB_BURST_READ_MODE_CTRL_REG , DOCH_BURST_DISABLE); + } + else + #endif /*DOCH_USE_BURST_MODE_READ*/ + + /******************* DMA transfer was requested ************************/ + /*5. else if DMA transfer:*/ + /**************************/ + #ifdef DOCH_DMA_CONFIG + if(pdev->bUseDMA) + { + DMA_Params_S dmaParams; + FLDword dmaFirstReqSector, + dmaFirstSectorToPerform, + dmaRemainderSectors, + dmaRemainderOffset, + dmaBlocks, + dmaFrameSize; + FLWord wDmaRegValue = DOCHREAD_CTRL_REG (pdev->bRegBase, HIB_DMA_CTRL_REG); + + /*5.1 calculate number of blocks and start sector*/ + /*************************************************/ + /*Initial Value*/ + dmaRemainderOffset = 0; + + /*Save the first sector position*/ + dmaFirstReqSector = (regs->bSectorNumber + + (regs->bCylLow<<8) + + (regs->bCylHigh<<16)+ + ((regs->bDriveHead & 0xF)<<24)); + + dmaFirstSectorToPerform = dmaFirstReqSector; + + if(pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_SINGLE) + { + dmaRemainderSectors = 0; + dmaFrameSize = 1; + dmaBlocks = sectors_to_read; + } + else if (pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_MULT) + { + dmaRemainderSectors = (sectors_to_read % pdev->device[devNum].dwMulti_Current); + + /*Set initial parameters (will be altered afterwards to transfer "remainder" sectors*/ + dmaBlocks = (sectors_to_read / pdev->device[devNum].dwMulti_Current); + dmaFrameSize = pdev->device[devNum].dwMulti_Current; + } + else + { + DBG_PRINT_ERR(FLZONE_ATA, "io_input(): DMA Transfer Mode "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("0x%x "), pdev->device[devNum].dataTransferMode)); + DBG_PRINT_ERR(FLZONE_ATA, "not supported\r\n"); + DISABLE_INTERRUPT(pdev); + return DOCH_FeatureNotSupported; + } /* End of if/else on pdev->device[devNum].dataTransferMode */ + +dochIoInputDmaSequence: + if(dmaBlocks > 0) + { + /*5.2 Set up the DMA transfer - Platfrom*/ + /****************************************/ + dmaParams.bOpType = DOCH_DMA_CONFIG_TRANSACTION_DEVICE_TO_HOST; + + dmaParams.bDiskOnChip_BasePtr = (FLByte*)pdev->bRegBase; + dmaParams.wDiskOnChip_Offset = (FLWord)DOCH_DATA_PORT_AREA; + dmaParams.bDestAddrPtr = (FLByte*)buf + dmaRemainderOffset; + + dmaParams.wFrameSize = (FLWord)(dmaFrameSize * DOCH_SECTOR_SIZE); + dmaParams.wFramesInBlock = (FLWord)(dmaBlocks); + + dmaParams.wFramesXferred = 0; + + DOCH_DMA_CONFIG(&dmaParams); + if(dmaParams.fDmaStatus != 0) + { + DBG_PRINT_ERR(FLZONE_API, "io_input(): DOCH_DMA_CONFIG_TRANSACTION_DEVICE_TO_HOST Failed\r\n"); + DISABLE_INTERRUPT(pdev); + return DOCH_GeneralFailure; + } + + /*5.3 set device head register if needed*/ + /****************************************/ + if (dmaFirstSectorToPerform != dmaFirstReqSector) + { /* no need to update device head on first time*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, ((regs->bDriveHead & 0xF0) | + ((FLByte)((dmaFirstSectorToPerform>>24) & 0x0F)))); + + } + + + #ifdef DOCH_USE_BURST_MODE_READ + /*5.4 if burst mode required- Set DOCH BURST READ Control Register*/ + /******************************************************************/ + if(pdev->bUseBurst) + { + /*Set DOCH BURST READ Control Register*/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, + HIB_BURST_READ_MODE_CTRL_REG, + (DOCH_BURST_ENABLE | DOCH_BURST_HOLD | DOCH_BURST_LENGTH | DOCH_BURST_LATENCY | DOCH_BURST_WAIT_STATE) ); + } + #endif /*DOCH_USE_BURST_MODE_READ*/ + + /*5.5 Set up the DMA transfer - Device (write DMA ctrl register)*/ + /****************************************************************/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, HIB_DMA_CTRL_REG, (wDmaRegValue | DOCH_DMA_REQ_ENABLE)); + + /*5.6 write ATA registers*/ + /*************************/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, (FLByte)(dmaFrameSize*dmaBlocks)); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_NO_REG, (FLByte)(dmaFirstSectorToPerform)); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_LOW_REG, (FLByte)(dmaFirstSectorToPerform>>8)); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_HIGH_REG, (FLByte)(dmaFirstSectorToPerform>>16)); + /*DOCH_DELAY_AFTER_DEVICE_SWITCH; Actually this delay is unnecessary */ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, regs->bFeaturesError); + + #ifdef DOCH_USE_BURST_MODE_READ + /*5.7 if burst mode required- enter BURST Mode*/ + /**********************************************/ + if(pdev->bUseBurst) + { + DOCH_HOST_ENTER_READ_BURST_MODE; + } + #endif /*DOCH_USE_BURST_MODE_READ*/ + + /*5.8 Initiate ATA Command*/ + /**************************/ + /*This will also start DMA transfer*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, regs->bCommandStatus); + + /*5.9 Wait for DMA transfer to complete*/ + /***************************************/ + dmaParams.bOpType = DOCH_DMA_WAIT_FOR_READ_TRANSACTION_END; + DOCH_DMA_CONFIG(&dmaParams); + + #ifdef DOCH_USE_BURST_MODE_READ + /*5.10 if burst mode required-Exit BURST Mode*/ + /********************************************/ + if(pdev->bUseBurst) + { + DOCH_HOST_EXIT_READ_BURST_MODE; + + /*Set DOCH BURST READ Control Register*/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, HIB_BURST_READ_MODE_CTRL_REG , DOCH_BURST_DISABLE); + } + #endif /*DOCH_USE_BURST_MODE_READ*/ + + /*5.11 Disable DMA*/ + /******************/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, HIB_DMA_CTRL_REG, (wDmaRegValue &= ~DOCH_DMA_REQ_ENABLE)); + + /*5.12 Check status of DMA operation*/ + /************************************/ + if(dmaParams.fDmaStatus != 0) + { + DISABLE_INTERRUPT(pdev); + DBG_PRINT_ERR(FLZONE_API, "io_input(): DOCH_DMA_WAIT_FOR_READ_TRANSACTION_END Failed\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("dma status:%d frames xFererred:%d:%d\r\n"), + dmaParams.fDmaStatus,dmaParams.wFramesXferred)); + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("dmaParams:OpType:%d IrHandle:%d \r\n"), + dmaParams.bOpType,dmaParams.bIrHandle)); + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("dmaParams:frame size:%d Frames in block:%d\r\n"), + dmaParams.wFrameSize,dmaParams.wFramesInBlock)); + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("dmaParams:mDoc base:0x%x mDoc offset:0x%x dest address:0x%x \r\n"), + dmaParams.bDiskOnChip_BasePtr,dmaParams.wDiskOnChip_Offset,dmaParams.bDestAddrPtr)); + + DBG_PRINT_ERR(FLZONE_ATA, "io_input(): Resetting device... "); + rc = doch_reset(pdev);/*reset both floors*/ + if(rc == DOCH_OK) + DBG_PRINT_ERR(FLZONE_ATA, "Passed! \r\n"); + else + { + DBG_PRINT_ERR(FLZONE_ATA, "Failed! \r\n"); + DISABLE_INTERRUPT(pdev); + return rc; + } + return DOCH_GeneralFailure; + } + + } + + /*5.13 If DRQ>1 and some sectors are left to be transfered + *perform another DMA transaction with altered frame/block sizes*/ + /****************************************************************/ + if(dmaRemainderSectors > 0) + { + dmaRemainderOffset = (dmaBlocks * dmaFrameSize * DOCH_SECTOR_SIZE); + dmaFirstSectorToPerform = (dmaFirstReqSector + (dmaBlocks * dmaFrameSize)); + + dmaBlocks = 1; + dmaFrameSize = dmaRemainderSectors; + + dmaRemainderSectors = 0; + + goto dochIoInputDmaSequence; + } + + } + else + #endif /*DOCH_DMA_CONFIG*/ + + /*******************PIO transfer was requested************************/ + /*6. else (PIO transfer):*/ + /*************************/ + { + FLNative secPerformed; + FLNative offset = 0; + /*6.1 Initiate ATA Command*/ + /**************************/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, regs->bCommandStatus); + + /*6.2 Check DRQ ready and not BSY before data xfer*/ + /**************************************************/ + (rc = ready(pdev, devNum, DOCH_STATUS_REG, (DOCH_READY | DOCH_DRQ | DOCH_BUSY | DOCH_ERROR), + DOCH_READY | DOCH_DRQ, DOCH_LONG_WAIT)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_input(): ATA not Ready (before data XFER) \r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x \r\n"),rc)); + DISABLE_INTERRUPT(pdev); + return rc; + } + + /*6.3 for each buffer (in size of drqSize):*/ + /*******************************************/ + if((pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_SINGLE) || /*Single Sector was requested*/ + (!(regs->bCommandStatus == DOCH_VSCMD_READ_PARTITION)) ) /*Command is OTHER than Read Partition*/ + { + for(secPerformed=1; secPerformed<=sectors_to_read; secPerformed++) + { + /*6.3.1 read block*/ + /******************/ + DOCHBLK_READ(pdev->bRegBase,((FLByte*)buf + offset),1); + + + /*6.3.2 Check DRQ ready and not BSY before next data xfer */ + /**********************************************************/ + /* (don`t perform after LAST sector was transfered) */ + if(secPerformed != sectors_to_read) + { + (rc = ready(pdev, devNum, DOCH_STATUS_REG, (DOCH_READY | DOCH_DRQ | DOCH_BUSY | DOCH_ERROR), + DOCH_READY | DOCH_DRQ, DOCH_LONG_WAIT)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_input(): ATA not Ready (after data XFER) \r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x , sector = %d \r\n"),rc,secPerformed)); + DISABLE_INTERRUPT(pdev); + return rc; + } + } + + offset += DOCH_SECTOR_SIZE; + } + + } + else if(pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_MULT) + { + FLByte multCount = (FLByte)pdev->device[devNum].dwMulti_Current; + FLByte multSecToRead = 0; + + for(secPerformed=0; secPerformed sectors_to_read) + multSecToRead = (sectors_to_read - secPerformed); + else + multSecToRead = multCount; + + /*Perform data xfer*/ + DOCHBLK_READ(pdev->bRegBase, (FLByte*)buf + offset,(multSecToRead)); + + /* Check DRQ ready and not BSY before next data xfer */ + /* (don`t perform after LAST sector was transfered) */ + if((secPerformed + multSecToRead) != sectors_to_read) + { + (rc = ready(pdev, devNum, DOCH_STATUS_REG, (DOCH_READY | DOCH_DRQ | DOCH_BUSY | DOCH_ERROR), + DOCH_READY | DOCH_DRQ, DOCH_LONG_WAIT)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_input(): ATA not Ready (after data XFER) \r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x, sector = %d \r\n"),rc, secPerformed)); + DISABLE_INTERRUPT(pdev); + return rc; + } + } + + /*Advance number of written sectors and update pointer to buffer*/ + secPerformed += multSecToRead; + offset += (multSecToRead * DOCH_SECTOR_SIZE); + } + } + else + { + DBG_PRINT_ERR(FLZONE_ATA, "io_input(): Transfer Mode "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("0x%x "), pdev->device[devNum].dataTransferMode)); + DBG_PRINT_ERR(FLZONE_ATA, "not supported\r\n"); + DISABLE_INTERRUPT(pdev); + return DOCH_FeatureNotSupported; + + } /* End of if/else on pdev->device[devNum].dataTransferMode */ + + } /* End of else on if(pdev->bUseDMA) */ + + /*******************end of different transfer modes ************************/ + + /* 7. wait until device is ready */ + /*********************************/ + rc = ready(pdev, devNum, DOCH_STATUS_REG, (DOCH_READY | DOCH_BUSY|DOCH_DRQ), + DOCH_READY, DOCH_SHORT_WAIT); + if (rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_input(): ATA not Ready (after completion)\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x \r\n"),rc)); + DISABLE_INTERRUPT(pdev); + return rc; + } + + /*8. check operation's status */ + /******************************/ + status = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + if((status & (DOCH_BUSY | DOCH_READY | DOCH_ERROR)) != DOCH_READY) + { + DISABLE_INTERRUPT(pdev); + DBG_PRINT_ERR(FLZONE_ATA, "io_input(): after completion status register indicates a problem: "); + DBG_PRINT_ERR_PRM(FLZONE_ATA,(FLTXT("reported status 0x%x\r\n"),status)); + if((status & DOCH_ERROR) == DOCH_ERROR) + { + return DOCH_ATAErrorDetected; + } + return DOCH_ATANotReady; + + } + + DISABLE_INTERRUPT(pdev); +#ifdef CX_ATA_SNIFFER +{ + FLSDword i=0; + if (fseek(ataLogFile,-ataCmdRec.dwSecNum*DOCH_SECTOR_SIZE,SEEK_CUR )) + { DBG_PRINT_ERR(FLZONE_ATA, "\r\nError:io_input():Cannot fseek file error. \r\n"); + return DOCH_ATA_ERROR_ABORT; + } + for (i=0;ibCommandStatus!= DOCH_VSCMD_PARTITION_MANAGEMENT)? DOCH_LONG_WAIT:\ + ((regs->bFeaturesError ==DOCH_ADD_PARTITION || regs->bFeaturesError ==DOCH_SECURE_ERASE)? DOCH_VERY_LONG_WAIT:DOCH_LONG_WAIT)); +#ifdef CX_ATA_SNIFFER + extern FILE * ataLogFile; + ataCmdRec.bAtaCmdType = CX_ATATYPE_OUTPUT; + ataCmdRec.dwDevNum=devNum; + ataCmdRec.regs=*regs; + ataCmdRec.dwSecNum=(secNum ? secNum : 256); + if (!fwrite(&ataCmdRec,sizeof(AtaCmdRec_S),1,ataLogFile)) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nError:io_output():Cannot write command rec to file \r\n"); + return DOCH_ATA_ERROR_ABORT; + } + + { + FLSDword i=0; + for (i=0;i1 and some sectors are left to be transfered + perform another DMA transaction with altered frame/block sizes + + 6. else (PIO transfer): + 6.1 Initiate ATA Command + 6.2 Check DRQ ready and not BSY before data xfer + 6.3 for each buffer (in size of drqSize): + 6.3.1 read block + 6.3.2 Check DRQ ready (don`t perform after LAST sector was transfered) + + 7. wait until device is ready + 8. check operation's status + */ + + + /*Calculate how many sectors are to be written*/ + /*Note: "0" - 256 Sectors to write*/ + sectors_to_write = (secNum ? secNum : 256); + + /* 1. set drive head register*/ + /*****************************/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, regs->bDriveHead); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,((regs->bDriveHead & DOCH_DEVICE) == DOCH_DEVICE)); + + /*2. handle interrupts*/ + /**********************/ + /*caller responsibility to set floor*/ + if (pdev->bUseInterrupt && DOCH_IRQ_RB_INIT(pdev->wSocketNo)) + { + ENABLE_INTERRUPT(pdev); + } + + /*Wait for BUSY bit to clear*/ + status = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + if((status & (DOCH_READY|DOCH_BUSY|DOCH_DRQ))!= DOCH_READY) + { + if ((rc = ready(pdev, devNum, DOCH_ALT_STATUS_REG, (DOCH_READY|DOCH_BUSY|DOCH_DRQ), DOCH_READY, DOCH_SHORT_WAIT)) != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_output(): ATA not Ready (before command)\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x \r\n"),rc)); + DISABLE_INTERRUPT(pdev); + return rc; + } + } + + /*3. write ATA registers (if not DMA)*/ + /*************************************/ + /*Write ATA registers, without ATA command register*/ + /*Note: if DMA was requested, registers will be written inside DMA context*/ + if(!pdev->bUseDMA) + { + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, regs->bSectorCount); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_NO_REG, regs->bSectorNumber); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_LOW_REG, regs->bCylLow); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_HIGH_REG, regs->bCylHigh); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, regs->bFeaturesError); + } + + /*******************BURST transfer was requested************************/ + /*4. if BURST transfer:(Synchronous) */ + /*************************************/ + #ifdef DOCH_USE_BURST_MODE_WRITE + if(pdev->bUseBurst) + { + FLByte drqSize = 0; + FLByte i; + + if(pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_SINGLE) + { + drqSize = 1; + } + else if(pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_MULT) + { + drqSize = (FLByte)pdev->device[devNum].dwMulti_Current; + } + + /*4.1 initiate ATA Command*/ + /**************************/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, regs->bCommandStatus); + + /*4.2 set DOCH BURST WRITE Control Register*/ + /******************************************/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, + HIB_BURST_WRITE_MODE_CTRL_REG, + (DOCH_BURST_ENABLE | DOCH_BURST_HOLD | DOCH_BURST_LENGTH | DOCH_BURST_LATENCY | DOCH_BURST_WAIT_STATE) + ); + /*4.3 if reading status sync - enter BURST mode on host*/ + /******************************************************/ + DOCH_HOST_ENTER_WRITE_BURST_MODE; + + /*4.4 for each buffer (in size of drqSize):*/ + /*******************************************/ + for(i=0; ibRegBase, + DOCH_DATA_PORT_AREA_ADDRESS, + (FLByte*)buf + (i<bRegBase, HIB_BURST_WRITE_MODE_CTRL_REG, DOCH_BURST_DISABLE); + + } + else + #endif /*DOCH_USE_BURST_MODE_WRITE*/ + /******************* DMA transfer was requested ************************/ + /*5. else if DMA transfer:*/ + /**************************/ + #ifdef DOCH_DMA_CONFIG + /*DMA transfer was requested*/ + if(pdev->bUseDMA) + { + DMA_Params_S dmaParams; + FLDword dmaFirstReqSector, + dmaFirstSectorToPerform, + dmaRemainderSectors, + dmaRemainderOffset, + dmaBlocks, + dmaFrameSize; + FLWord wDmaRegValue = DOCHREAD_CTRL_REG (pdev->bRegBase, HIB_DMA_CTRL_REG); + /*5.1 calculate number of blocks and start sector*/ + /*************************************************/ + /*Initial Value*/ + dmaRemainderOffset = 0; + + /*Save the first sector position*/ + dmaFirstReqSector = (regs->bSectorNumber + + (regs->bCylLow<<8) + + (regs->bCylHigh<<16)+ + ((regs->bDriveHead & 0xF)<<24)); + + dmaFirstSectorToPerform = dmaFirstReqSector; + + if(pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_SINGLE) + { + dmaRemainderSectors = 0; + dmaFrameSize = 1; + dmaBlocks = sectors_to_write; + } + else if (pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_MULT) + { + dmaRemainderSectors = (sectors_to_write % pdev->device[devNum].dwMulti_Current); + + /*Set initial parameters (will be altered afterwards to transfer "remainder" sectors*/ + dmaBlocks = (sectors_to_write / pdev->device[devNum].dwMulti_Current); + dmaFrameSize = pdev->device[devNum].dwMulti_Current; + } + else + { + DBG_PRINT_ERR(FLZONE_ATA, "io_output(): DMA Transfer Mode "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("0x%x "), pdev->device[devNum].dataTransferMode)); + DBG_PRINT_ERR(FLZONE_ATA, "not supported\r\n"); + DISABLE_INTERRUPT(pdev); + return DOCH_FeatureNotSupported; + } /* End of if/else on pdev->device[devNum].dataTransferMode */ + +dochIoOutputDmaSequence: + if(dmaBlocks > 0) + { + /*5.2 Set up the DMA transfer - Platform*/ + /****************************************/ + dmaParams.bOpType = DOCH_DMA_CONFIG_TRANSACTION_HOST_TO_DEVICE; + + dmaParams.bDiskOnChip_BasePtr = ((FLByte*)pdev->bRegBase); + dmaParams.wDiskOnChip_Offset = DOCH_DATA_PORT_AREA; + dmaParams.bDestAddrPtr = (FLByte*)buf + dmaRemainderOffset; + + dmaParams.wFrameSize = (FLWord)(dmaFrameSize * DOCH_SECTOR_SIZE); + dmaParams.wFramesInBlock = (FLWord)(dmaBlocks); + + dmaParams.wFramesXferred = 0; + + DOCH_DMA_CONFIG(&dmaParams); + if(dmaParams.fDmaStatus != 0) + { + DBG_PRINT_ERR(FLZONE_API, "io_output(): DOCH_DMA_CONFIG_TRANSACTION_HOST_TO_DEVICE Failed\r\n"); + DISABLE_INTERRUPT(pdev); + return DOCH_GeneralFailure; + } + + /*5.3 set device head register if needed*/ + /****************************************/ + if (dmaFirstSectorToPerform!= dmaFirstReqSector) + { /* no need to update device head on first time*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, ((regs->bDriveHead & 0xF0) | + ((FLByte)((dmaFirstSectorToPerform>>24) & 0x0F)))); + + } + + /*5.4 Set up the DMA transfer - Device (write DMA ctrl register)*/ + /****************************************************************/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, HIB_DMA_CTRL_REG, (wDmaRegValue | DOCH_DMA_REQ_ENABLE)); + + /*5.5 write ATA registers*/ + /*************************/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, (FLByte)(dmaFrameSize*dmaBlocks)); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_NO_REG, (FLByte)(dmaFirstSectorToPerform)); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_LOW_REG, (FLByte)(dmaFirstSectorToPerform>>8)); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_HIGH_REG, (FLByte)(dmaFirstSectorToPerform>>16)); + /*DOCH_DELAY_AFTER_DEVICE_SWITCH; Actually this delay is unnecessary */ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, regs->bFeaturesError); + + /*5.6 Initiate ATA Command*/ + /**************************/ + /*This will also start DMA transfer*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, regs->bCommandStatus); + + /*5.7 Wait for DMA transfer to complete*/ + /***************************************/ + dmaParams.bOpType = DOCH_DMA_WAIT_FOR_WRITE_TRANSACTION_END; + DOCH_DMA_CONFIG(&dmaParams); + + /*5.8 Disable DMA*/ + /*****************/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, HIB_DMA_CTRL_REG, (wDmaRegValue &= ~DOCH_DMA_REQ_ENABLE)); + + /*5.9 Check status of DMA operation*/ + /***********************************/ + if(dmaParams.fDmaStatus != 0) + { + DISABLE_INTERRUPT(pdev); + DBG_PRINT_ERR(FLZONE_API, "io_output(): DOCH_DMA_WAIT_FOR_WRITE_TRANSACTION_END Failed\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("dma status:%d frames xFererred:%d:%d\r\n"), + dmaParams.fDmaStatus,dmaParams.wFramesXferred)); + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("dmaParams:OpType:%d IrHandle:%d \r\n"), + dmaParams.bOpType,dmaParams.bIrHandle)); + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("dmaParams:frame size:%d Frames in block:%d\r\n"), + dmaParams.wFrameSize,dmaParams.wFramesInBlock)); + DBG_PRINT_ERR_PRM(FLZONE_API,(FLTXT("dmaParams:mDoc base:0x%x mDoc offset:0x%x dest address:0x%x \r\n"), + dmaParams.bDiskOnChip_BasePtr,dmaParams.wDiskOnChip_Offset,dmaParams.bDestAddrPtr)); + + DBG_PRINT_ERR(FLZONE_ATA, "io_outut(): Resetting device... "); + rc = doch_reset(pdev); + if(rc == DOCH_OK) + DBG_PRINT_ERR(FLZONE_ATA, "Passed! \r\n"); + else + { + DBG_PRINT_ERR(FLZONE_ATA, "Failed! \r\n"); + return rc; + } + + return DOCH_GeneralFailure; + } + + } + + /*5.10 If DRQ>1 and some sectors are left to be transfered + *perform another DMA transaction with altered frame/block sizes*/ + /****************************************************************/ + if(dmaRemainderSectors > 0) + { + dmaRemainderOffset = (dmaBlocks * dmaFrameSize * DOCH_SECTOR_SIZE); + dmaFirstSectorToPerform = (dmaFirstReqSector + (dmaBlocks * dmaFrameSize)); + + dmaBlocks = 1; + dmaFrameSize = dmaRemainderSectors; + + dmaRemainderSectors = 0; + + goto dochIoOutputDmaSequence; + } + + /*once DMA transation endded - device should be ready*/ + /* do not wait in that case long time*/ + dwLongWait = DOCH_SHORT_WAIT; + + } + else + #endif /*DOCH_DMA_CONFIG*/ + + /*******************PIO transfer was requested************************/ + /*6. else (PIO transfer):*/ + /*************************/ + { + /*6.1 Initiate ATA Command*/ + /**************************/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, regs->bCommandStatus); + + /*6.2 Check DRQ ready and not BSY before data xfer*/ + /**************************************************/ + (rc = ready(pdev, devNum, DOCH_STATUS_REG, (DOCH_READY | DOCH_DRQ | DOCH_BUSY | DOCH_ERROR), + DOCH_READY | DOCH_DRQ, DOCH_SHORT_WAIT)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_output(): ATA not Ready (before data Xfer)\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x \r\n"),rc)); + DISABLE_INTERRUPT(pdev); + return rc; + } + + /*6.3 for each buffer (in size of drqSize):*/ + /*******************************************/ + if((pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_SINGLE) || /*Single Sector was requested*/ + (!(regs->bCommandStatus == DOCH_VSCMD_WRITE_PARTITION)) ) /*Command is OTHER than Write Partition*/ + { + for(secPerformed=1; secPerformed<=sectors_to_write; secPerformed++) + { + /*6.3.1 write block*/ + /******************/ + DOCHBLK_WRITE(pdev->bRegBase, (FLByte*)buf + offset,1); + + + /*6.3.2 Check DRQ ready and not BSY before next data xfer */ + /**********************************************************/ + /* (don`t perform after LAST sector was transfered) */ + if(secPerformed != sectors_to_write) + { + (rc = ready(pdev, devNum, DOCH_STATUS_REG, (DOCH_READY | DOCH_DRQ | DOCH_BUSY | DOCH_ERROR), + DOCH_READY | DOCH_DRQ, DOCH_LONG_WAIT)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_output(): ATA not Ready (after data Xfer)\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x , sector = %d \r\n"),rc,secPerformed)); + DISABLE_INTERRUPT(pdev); + return rc; + } + } + + offset += DOCH_SECTOR_SIZE; + } + } + else if (pdev->device[devNum].dataTransferMode == DOCH_DATA_MODE_MULT) + { + multCount = (FLByte)pdev->device[devNum].dwMulti_Current; + + for(secPerformed=0; secPerformed sectors_to_write) + multSecToWrite = (sectors_to_write - secPerformed); + else + multSecToWrite = multCount; + + /*Perform data xfer*/ + DOCHBLK_WRITE(pdev->bRegBase, (FLByte*)buf + offset,(multSecToWrite)); + + /* Check DRQ ready and not BSY before next data xfer */ + /* (don`t perform after LAST sector was transfered) */ + if((secPerformed + multSecToWrite) != sectors_to_write) + { + (rc = ready(pdev, devNum, DOCH_STATUS_REG, (DOCH_READY | DOCH_DRQ | DOCH_BUSY | DOCH_ERROR), + DOCH_READY | DOCH_DRQ, DOCH_LONG_WAIT)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_output(): ATA not Ready (after data Xfer)\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x , sector = %d\r\n"),rc,secPerformed)); + DISABLE_INTERRUPT(pdev); + return rc; + } + } + + /*Advance number of written sectors and update pointer to buffer*/ + secPerformed += multSecToWrite; + offset += (multSecToWrite * DOCH_SECTOR_SIZE); + } + } + else + { + DBG_PRINT_ERR(FLZONE_ATA, "io_output(): Transfer Mode "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("0x%x "), pdev->device[devNum].dataTransferMode)); + DBG_PRINT_ERR(FLZONE_ATA, "not supported\r\n"); + DISABLE_INTERRUPT(pdev); + return DOCH_FeatureNotSupported; + } /* End of if/else on pdev->device[devNum].dataTransferMode */ + + } /* End of else on if(pdev->bUseDMA) */ + /*******************end of different transfer modes ************************/ + + /*7. wait until device is ready */ + /*********************************/ + /* This might involve yielding the CPU and waiting for device interrupt, + * so we use DOCH_LONG_WAIT or DOCH_VERY_LONG_WAIT according to the operation + */ + rc = ready(pdev, devNum, DOCH_ALT_STATUS_REG, (DOCH_READY | DOCH_BUSY | DOCH_DRQ), + DOCH_READY, dwLongWait); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_output(): ATA not Ready (after all data completed)\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x \r\n"),rc)); + } + + /*8. check operation's status */ + /******************************/ + /* this also clear IRQ */ + status = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + if((status & (DOCH_BUSY | DOCH_READY | DOCH_ERROR)) != DOCH_READY) + { + DISABLE_INTERRUPT(pdev); + DBG_PRINT_ERR(FLZONE_ATA, "io_output(): after completion status register indicates a problem: "); + DBG_PRINT_ERR_PRM(FLZONE_ATA,(FLTXT("reported status 0x%x\r\n"),status)); + if((status & DOCH_ERROR) == DOCH_ERROR) + { + return DOCH_ATAErrorDetected; + } + return DOCH_ATANotReady; + } + DISABLE_INTERRUPT(pdev); + return rc; +} + +/****************************************************************************** + * * + * i o _ c t r l * + * * + * Pass command 'cmd' to DOCH device. * + * * + * Parameters : * + * pdev : device to act on * + * regs : DOCH_Registers * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error io_ctrl ( DOCH_Socket * pdev, + FLSNative devNum, + DOCH_Registers * regs) +{ + DOCH_Error rc; + FLSNative status; + FLDword dwLongWait= ((regs->bCommandStatus!= DOCH_VSCMD_PARTITION_MANAGEMENT)? DOCH_LONG_WAIT:\ + ((regs->bFeaturesError ==DOCH_DELETE_PARTITIONS)? DOCH_VERY_LONG_WAIT:DOCH_LONG_WAIT)); + + +#ifdef CX_ATA_SNIFFER + extern FILE * ataLogFile; + + ataCmdRec.bAtaCmdType = CX_ATATYPE_CTRL; + ataCmdRec.dwDevNum=devNum; + ataCmdRec.regs=*regs; + if (!fwrite(&ataCmdRec,sizeof(AtaCmdRec_S),1,ataLogFile)) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nError:io_ctrl():Cannot write command rec to file \r\n"); + return DOCH_ATA_ERROR_ABORT; + } + fflush(ataLogFile); +#endif /*CX_ATA_SNIFFER*/ + + /* First we write the device head register to ensure we are communicating + with the right device...*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, (regs->bDriveHead|DOCH_LBA)); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,((regs->bDriveHead & DOCH_DEVICE) == DOCH_DEVICE)); + + /*Wait for DOCH BUSY flag to clear*/ + if ((rc = ready(pdev, devNum, DOCH_ALT_STATUS_REG, (DOCH_READY|DOCH_BUSY|DOCH_DRQ),DOCH_READY, DOCH_SHORT_WAIT)) != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_ctrl(): ATA not Ready (before command)\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x \r\n"),rc)); + return rc; + } + + + /*Write ATA registers*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_FEATURES_REG, regs->bFeaturesError); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_CNT_REG, regs->bSectorCount); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_SECTOR_NO_REG, regs->bSectorNumber); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_LOW_REG, regs->bCylLow); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CYLINDER_HIGH_REG, regs->bCylHigh); + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_COMMAND_REG, regs->bCommandStatus); + + /* wait until device is ready */ + rc = ready(pdev, devNum, DOCH_STATUS_REG, (DOCH_READY | DOCH_BUSY), + DOCH_READY, dwLongWait); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nio_ctrl(): ATA not Ready (after command)\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("rc = 0x%x \r\n"),rc)); + return rc; + } + + /* check operation's status; this also clear IRQ */ + status = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + if((status & (DOCH_BUSY | DOCH_READY | DOCH_ERROR)) != DOCH_READY) + { + DBG_PRINT_ERR(FLZONE_ATA, "io_ctrl(): after completion status register indicates a problem: "); + DBG_PRINT_ERR_PRM(FLZONE_ATA,(FLTXT("reported status 0x%x\r\n"),status)); + if((status & DOCH_ERROR) == DOCH_ERROR) + { + return DOCH_ATAErrorDetected; + } + return DOCH_ATANotReady; + } + + + return rc; +} + +DOCH_Error retrieveAndPrintAtaDebug(DOCH_Socket* pdev) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + /*FLWord numOfDataBytes;*/ + FLWord currentINTEnabled, currentDMAEnabled, currentBurstEnabled; + + tffsset(&in_regs, 0, sizeof(in_regs)); + in_regs.bFeaturesError = DOCH_RETRIEVE_DBG_MSG; + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + in_regs.bSectorCount = 1; + in_regs.bDriveHead = DOCH_SELECT_DEV(pdev->bAtaDevNum); + + /* Disable interrupts */ + /* Disable DMA/Burst */ + /* (retain original values)*/ + currentINTEnabled = pdev->bUseInterrupt; + currentDMAEnabled = pdev->bUseDMA; + currentBurstEnabled = pdev->bUseBurst; + pdev->bUseInterrupt = FALSE; + pdev->bUseDMA = FALSE; + pdev->bUseBurst = FALSE; + + + /*Perform debug ocommand*/ + rc = io_input(pdev, 0, &in_regs, ataDBG, 1); + + /*Revert interrupts/DMA/Burst to original state*/ + pdev->bUseInterrupt = currentINTEnabled; + pdev->bUseDMA = currentDMAEnabled; + pdev->bUseBurst = currentBurstEnabled; + + + /*Retrieve ATA out registers*/ + rc = get_out_registers(pdev, 0, &out_regs); + if(rc != DOCH_OK) + return rc; + + /*numOfDataBytes = (out_regs.bSectorNumber + (out_regs.bCylLow<<8));*/ + + if(ataDBG[0] != '\0') + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\n~~~~~~~~~~~~~~~~~~~~~~~~~"); + DBG_PRINT_ERR(FLZONE_ATA, "\r\n*** ETFFS Debug string: "); + DBG_PRINT_ATA(FLZONE_ATA,(FLTXT_VAR(ataDBG))); + DBG_PRINT_ERR(FLZONE_ATA, " ***"); + DBG_PRINT_ERR(FLZONE_ATA, "\r\n~~~~~~~~~~~~~~~~~~~~~~~~~\r\n"); + } + + return rc; +} + +/****************************************************************************** + * * + * d o c h _ c o m m a n d * + * * + * Sends 'cmd' command to DOCH device. * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * in_regs : DOCH input registers values * + * out_regs : DOCH output registers values * + * buf : user buffer * + * secNum : # of sectors (for data transfer commands) * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ + +DOCH_Error doch_command ( FLSNative socketNo, + FLSNative devNum, + DOCH_Registers* in_regs, + DOCH_Registers* out_regs, + void * buf, + FLNative secNum) +{ + DOCH_Socket* pdev; + DOCH_Error rc; + DOCH_Error rc2; + +#ifdef CX_ATA_SNIFFER + ataCmdRec.socketNo=socketNo; +#endif /*CX_ATA_SNIFFER*/ + + /* Sanity Check*/ + /*=============*/ + if(socketNo > DOCH_MAX_SOCKETS - 1) + return DOCH_BadParameter; + + pdev = &sockets[socketNo]; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc = dochCheckPFSymptom(socketNo, pdev->bAtaDevNum, TRUE); + if(rc != DOCH_OK) + return rc; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + +#ifdef DOCH_DMA_CONFIG + { + DMA_Params_S dmaParams; + + if(pdev->bUseDMA && (gDMAChannelOpen == 0)) + { + dmaParams.bOpType = DOCH_DMA_OPEN_CHANNEL; + DOCH_DMA_CONFIG(&dmaParams); + if(dmaParams.fDmaStatus != 0) + { + DBG_PRINT_ERR(FLZONE_API, "doch_command(): DOCH_DMA_OPEN_CHANNEL Failed\r\n"); + return DOCH_GeneralFailure; + } + + gDMAChannelOpen = DOCH_GLOBAL_BOOL_PATTERN; + + DBG_PRINT_FLOW(FLZONE_ATA, "\r\nDMA Channel opened\r\n"); + } + + } +#endif /*DOCH_DMA_CONFIG*/ + + /*Branch to proper IO routine according to ATA command*/ + switch ((DOCH_Command)(in_regs->bCommandStatus)) + { + /* Vendor-Specific ATA commands */ + + case DOCH_VSCMD_READ_PARTITION: + case DOCH_VSCMD_READ_CALCULATED_HASH: + case DOCH_VSCMD_READ_ORIGINAL_HASH: + rc = io_input (pdev, devNum, in_regs, buf, secNum); + break; + + case DOCH_VSCMD_WRITE_PARTITION: + case DOCH_VSCMD_WRITE_FLEXI: + case DOCH_VSCMD_WRITE_GIVEN_HASH: + rc = io_output (pdev, devNum, in_regs, buf, secNum); + break; + + case DOCH_VSCMD_OPTIMIZE_PARTITION_SECTORS: + case DOCH_VSCMD_ERASE_PARTITION_SECTORS: + case DOCH_VSCMD_WRITE_CALCULATED_HASH: + rc = io_ctrl (pdev, devNum, in_regs); + break; + + case DOCH_VSCMD_PARTITION_MANAGEMENT: + switch((DOCH_DeviceCtrlOp)(in_regs->bFeaturesError)) + { + + case DOCH_SET_DEFAULT_PARTITION: + case DOCH_DELETE_PARTITIONS: + rc = io_ctrl (pdev, devNum, in_regs); + break; + + case DOCH_GET_PARTITION_INFO: + case DOCH_GET_PARTITION_USER_ATTR: + rc = io_input (pdev, devNum, in_regs, buf, secNum); + break; + + case DOCH_SET_PARTITION_PROTECTION: + case DOCH_SET_PARTITION_USER_ATTR: + case DOCH_ADD_PARTITION: + case DOCH_SECURE_ERASE: + rc = io_output (pdev, devNum, in_regs, buf, secNum); + break; + + default: + return DOCH_UnknownCmd; + } + break; + + case DOCH_VSCMD_ACCESS_CONTROL: + switch((DOCH_SecurityCtrlOp)(in_regs->bFeaturesError)) + { + case DOCH_DISABLE_ACCESS: + rc = io_ctrl (pdev, devNum, in_regs); + break; + + case DOCH_RX_DOCH_PUBLICKEY: + case DOCH_VERIFY_HOST_KEY: +#ifdef FL_SLPP + case DOCH_SLPP_REPORT_LOCKED_RANGES: +#endif /*FL_SLPP*/ + rc = io_input (pdev, devNum, in_regs, buf, secNum); + break; + + case DOCH_EN_ACCESS_WPWD: + case DOCH_TX_HOST_PUBLICKEY: +#ifdef FL_SLPP + case DOCH_SLPP_UNLOCK_RANGE: + case DOCH_SLPP_UNLOCK_ENTIRE_PARTITION: + case DOCH_SLPP_LOCK_RANGE: + case DOCH_SLPP_STICKY_LOCK_RANGE: +#endif /*FL_SLPP*/ + rc = io_output (pdev, devNum, in_regs, buf, secNum); + break; + + default: + return DOCH_UnknownCmd; + } + break; + + case DOCH_VSCMD_EXT_DEVICE_CTRL: + switch((DOCH_DeviceCtrlOp)(in_regs->bFeaturesError)) + { + + case DOCH_SET_DATA_XFER_MODE: + case DOCH_ATOMIC_WRITE_SEQUENCE: + case DOCH_OPTIMIZE_MEDIA: + case DOCH_GET_RESET_STATUS: + case DOCH_NOTIFY_RESET: + case DOCH_NOTIFY_PLATFORM_RESUMED: + case DOCH_GET_CUSTOM_PARAM: + case DOCH_SET_CUSTOM_PARAM: + case DOCH_SET_POWER_MODE: + case DOCH_GET_POWER_MODE: + case DOCH_ACTIVATE_DEBUG_MODE: + case DOCH_SET_ALERT_LEVEL: + rc = io_ctrl (pdev, devNum, in_regs); + break; + + case DOCH_IDENTIFY_DISKONCHIP_DEVICE: + case DOCH_GET_EXTENDED_DEVICE_INFO: + case DOCH_GET_DISK_USER_ATTR: + case DOCH_GET_CONFIGURATION_DATA: + rc = io_input (pdev, devNum, in_regs, buf, secNum); + break; + + case DOCH_SET_DISK_USER_ATTR: + case DOCH_SET_CONFIGURATION_DATA: + rc = io_output (pdev, devNum, in_regs, buf, secNum); + break; + + default: + return DOCH_UnknownCmd; + } + break; + + case DOCH_VSCMD_EXT_SECURITY_CTRL: + switch((DOCH_SecurityCtrlOp)(in_regs->bFeaturesError)) + { + + case DOCH_SET_ALGORITHM_MODE: + case DOCH_AUTO_HASH_CONTROL: + case DOCH_SET_KEYS: + case DOCH_START_HASH_STREAM_CALC: + case DOCH_READ_STOP_HASH_STREAM_CALC: + rc = io_ctrl (pdev, devNum, in_regs); + break; + + case DOCH_REPORT_SUPPORTED_ALGORITHMS: + case DOCH_GET_ALGORITHM_CAPABILITIES: + case DOCH_RETURN_RANDOM_NUMBERS: + rc = io_input (pdev, devNum, in_regs, buf, secNum); + break; + + default: + return DOCH_UnknownCmd; + } + break; + + default: + return DOCH_UnknownCmd; + } + + /*If IO operation succeeded, retrieve device response from ATA registers + (calling routine might need some data back from the device) + Common IO Read/Write routines are excluded */ + switch( rc ) + { + case DOCH_OK: + if((in_regs->bCommandStatus != DOCH_VSCMD_READ_PARTITION) && + (in_regs->bCommandStatus != DOCH_VSCMD_WRITE_PARTITION) && + (in_regs->bCommandStatus != DOCH_VSCMD_WRITE_FLEXI)) + rc = get_out_registers(pdev, devNum, out_regs); + break; + + case DOCH_ATAErrorDetected: + rc = get_out_registers(pdev, devNum, out_regs); + break; + default: + break; + } + +#ifdef CHECK_POWER_ON_EVERY_COMMAND + /* Check if device was reset */ + rc2 = dochCheckPFSymptom(socketNo, pdev->bAtaDevNum, FALSE); + if(rc2 != DOCH_OK) + return rc2; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + /* If ATA debug was requested - retrieve and print buffer from Device */ + if(gDochAtaDebug == DOCH_GLOBAL_BOOL_PATTERN) + { + rc2 = retrieveAndPrintAtaDebug(pdev); + if(rc2 != DOCH_OK) + return rc2; + } + + return rc; +} + +/****************************************************************************** + * * + * d o c h _ a t a _ p a s s t h r u * + * * + * Pass-thru routine for ATA commands * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * ptOP : Data transfer type (In/Out/No) * + * in_regs : DOCH input registers values * + * out_regs : DOCH output registers values * + * buf : user buffer * + * secNum : Number of sectors (in case of data transfer) * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ + +DOCH_Error doch_ata_passthru ( FLSNative socketNo, + FLSNative devNum, + DOCH_PassThru_Op ptOP, + DOCH_Registers * in_regs, + DOCH_Registers * out_regs, + void * buf, + FLNative secNum) +{ + DOCH_Socket* pdev; + DOCH_Error rc = DOCH_OK; + DOCH_Error rc2; + + /* Sanity Check*/ + /*=============*/ + if(socketNo > DOCH_MAX_SOCKETS - 1) + return DOCH_BadParameter; + + pdev = &sockets[socketNo]; + + switch(ptOP) + { + case DOCH_PASSTHRU_NO_DATA: + rc = io_ctrl (pdev, devNum, in_regs); + break; + + case DOCH_PASSTHRU_DATA_IN: + rc = io_input (pdev, devNum, in_regs, buf, secNum); + break; + + case DOCH_PASSTHRU_DATA_OUT: + rc = io_output (pdev, devNum, in_regs, buf, secNum); + break; + + default: + return DOCH_UnknownCmd; + } + + /*If IO operation succeeded, retrieve device response from ATA registers + (calling routine might need some data back from the device)*/ + if(rc == DOCH_OK) + rc = get_out_registers(pdev, devNum, out_regs); + else + return rc; + + /* If ATA debug was requested - retrieve and print buffer from Device */ + if(gDochAtaDebug == DOCH_GLOBAL_BOOL_PATTERN) + { + rc2 = retrieveAndPrintAtaDebug(pdev); + if(rc2 != DOCH_OK) + return rc2; + } + + return rc; + +} + +/****************************************************************************** + * * + * c l e a r A T A I n t e r r u p t * + * * + * Clear ATA interrupt by simply reading the ATA status register * + * * + * Parameters : * + * pdev : device to perform operation on * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error clearATAInterrupt(FLSNative socketNo) +{ +#ifdef DOCH_USE_FUNC + DOCH_Socket* pdev; + + if(socketNo > DOCH_MAX_SOCKETS - 1) + return DOCH_BadParameter; + + pdev = &sockets[socketNo]; + + DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + +#else /*DOCH_USE_FUNC*/ + + DOCHREAD_ATA_REG((&sockets[socketNo])->bRegBase, DOCH_STATUS_REG); + +#endif /*DOCH_USE_FUNC*/ + + return DOCH_OK; +} + + +/****************************************************************************** + * * + * g e t _ o u t _ r e g i s t e r s * + * * + * Retrieve ATA output registers values * + * * + * Parameters : * + * pdev : device to perform operation on * + * out_regs : DOCH output registers values * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error get_out_registers(DOCH_Socket* pdev, FLSNative devNum, DOCH_Registers* out_regs) +{ + DOCH_Error error = DOCH_OK; + + out_regs->bFeaturesError = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_ERROR_REG); + out_regs->bSectorCount = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_SECTOR_CNT_REG); + out_regs->bSectorNumber = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_SECTOR_NO_REG); + out_regs->bCylLow = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_CYLINDER_LOW_REG); + out_regs->bCylHigh = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_CYLINDER_HIGH_REG); + out_regs->bDriveHead = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_DRIVE_HEAD_REG); + out_regs->bCommandStatus = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + out_regs->bContorlAltStatus = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_ALT_STATUS_REG); + + /*If an error was detected - return the error code*/ + if((out_regs->bCommandStatus & DOCH_ERROR) == DOCH_ERROR) + { + error = (DOCH_Error)out_regs->bFeaturesError; + + DBG_PRINT_ERR(FLZONE_ATA, "\r\nget_out_registers(): ATA Error\r\n"); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("error = 0x%x \r\n"),error)); + } + + return (error); +} + +/****************************************************************************** + * * + * d o c h _ g e t _ f l a g s * + * * + * Returns all device's flags (DOCH_USE_XXX) . * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * flags : device's flags will be stored there * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ + +DOCH_Error doch_get_flags (FLSNative socketNo, FLSNative devNum, FLDword * flags) +{ + /* Sanity check */ + if ((socketNo < 0) || (socketNo >= DOCH_MAX_SOCKETS) || (flags == NULL)) + return DOCH_BadParameter; + + *flags = sockets[socketNo].device[devNum].flags; + + return DOCH_OK; +} + + +/****************************************************************************** + * * + * d o c h _ s e t _ f l a g s * + * * + * Add various DOCH_USE_... flags to existing device's flags. * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * flags : collection of DOCH_USE_... flags to add * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ + +DOCH_Error doch_set_flags (FLSNative socketNo, FLSNative devNum, FLDword flags) +{ + /* args sanity check */ + if ((socketNo < 0) || (socketNo >= DOCH_MAX_SOCKETS)) + return DOCH_BadParameter; + + sockets[socketNo].device[devNum].flags = flags; + + return DOCH_OK; +} + + + +/****************************************************************************** + * * + * d o c h _ r e s e t * + * * + * Reset ATA Protocol . * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ + +DOCH_Error doch_reset (DOCH_Socket* pdev) +{ +#ifndef DOCH_DISABLE_RESET + FLDword tries; + FLDword i = 0; + FLByte status; + + DBG_PRINT_FLOW(FLZONE_ATA, "doch_reset() - enter\r\n"); + /*Protect against access time set to 0*/ + if(gDochAccessNanosec == 0) + { + DBG_PRINT_ERR(FLZONE_ATA,"doch_reset(): Failed with bad parameter access time set to 0 \r\n"); + return DOCH_BadParameter; + } + + /* reset DOCH */ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CONTROL_REG, DOCH_ATA_SRST); + + /* need to add delay before writing twice in short time to the control register*/ + DOCH_DELAY_BEFORE_ACCESSING_SAME_REGISTER; + + /* cancel DOCH reset */ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CONTROL_REG, 0); + + + /*Master is selected*/ + /* Wait for: + READY bit asserted + BUSY bit de-asserted + DRQ bit de-asserted + */ + tries = (DOCH_SHORT_WAIT* (1000000UL / gDochAccessNanosec)); + for(i=0; ibRegBase, DOCH_STATUS_REG); + if( (status & (DOCH_READY | DOCH_BUSY | DOCH_DRQ)) == DOCH_READY) + break; + } + if (!tries) + { + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\r\ndoch_reset(): Device#0 not ready (after reset): #0x%x \r\n"), status)); + return DOCH_TimedOut; + } + +#if (ATA_MAX_NUM_OF_DEVICES==2) + /*select slave and make sure slave is ready*/ + if (pdev->wNumOfDevices >1) + { + DOCH_Error rc; +#ifdef DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES + pdev->bLastDevNum=0;/*Master was the last one that was selected*/ +#endif /*DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES*/ + /* 3 accesses in each iteration */ + tries = (DOCH_SHORT_WAIT* (1000000UL / (gDochAccessNanosec*3))); + while (tries) + { + /*Set active ATA device*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV1); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,1); + + /* Before trying to identify Dev1, check its CHIP_ID*/ + rc = doch_check_chipID(pdev->wSocketNo); /*caller responsibility to set device head register*/ + status = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + if (rc == DOCH_OK) + { /*found chip ID - check readiness*/ + if((status & (DOCH_READY | DOCH_BUSY)) == DOCH_READY) + { + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("Socket #%d dev1"), pdev->wSocketNo)); + DBG_PRINT_FLOW(FLZONE_ATA, " - Found ChipID !\r\n"); + break; + } + } + DOCH_DELAY_BEFORE_ACCESSING_SAME_REGISTER; + tries--; + } + + if (!tries) + { + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\r\ndoch_reset(): Device#1 not ready (after reset): #0x%x \r\n"), status)); + return DOCH_TimedOut; + } + DOCH_DELAY_BEFORE_ACCESSING_SAME_REGISTER; + /*Set original ATA device*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV(pdev->bAtaDevNum)); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,pdev->bAtaDevNum); + DOCH_DELAY_BEFORE_ACCESSING_SAME_REGISTER; + } +#endif /*(ATA_MAX_NUM_OF_DEVICES==2)*/ + DBG_PRINT_FLOW(FLZONE_ATA, "doch_reset() - exit (OK) \r\n"); +#endif /*DOCH_DISABLE_RESET*/ + return DOCH_OK; +} + +/****************************************************************************** + * * + * u p d a t e _ d e v i c e _ i n f o * + * * + * Update device structure based on diskOnChip device info structure * + * * + * Parameters : * + * pdev : DOCH_Socket * + * diskOnChipDeviceInfo : DOCH_DeviceInfo * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error update_device_info(DOCH_Socket* pdev, + DOCH_DeviceInfo* diskOnChipDeviceInfo, + FLSNative devNum) +{ + IOreq ioreq; + + /*TBD - BYTE???*/ + FLByte drqSize ; + + if((pdev == NULL) || (diskOnChipDeviceInfo == NULL)) + return DOCH_BadParameter; + drqSize = 1<<((FLByte)((diskOnChipDeviceInfo->dwCommandFlagsOrStatuses & DOCH_DCFSB_CURRENT_MULTI_SECTOR) >> DOCH_DCFSO_CURRENT_MULTI_SECTOR)); + + /*Update device structure*/ + /*=======================*/ + pdev->device[devNum].wNumOfPartitions = diskOnChipDeviceInfo->wTotalNumOfPartitions; + + pdev->device[devNum].dataTransferMode = + (DOCH_TransferMode)((diskOnChipDeviceInfo->dwCommandFlagsOrStatuses & DOCH_DCFSB_CURRENT_XFER_MODE) >> DOCH_DCFSO_CURRENT_XFER_MODE); + + /*Set XFER mode*/ + /*-------------*/ + doch_setTransferMode(pdev->wSocketNo, devNum, pdev->device[devNum].dataTransferMode, drqSize); + + if(pdev->wNumOfDevices == 0) + { + /*Retrieve device user attributes*/ + tffsset(&ioreq, 0, sizeof(ioreq)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, pdev->wSocketNo); + ioreq.irData = &devUserAttr; + DOCHGetDiskUserAttributes(&ioreq); + + /*Extract span information from device attributes*/ + tffscpy(&pdev->sSpanData, &devUserAttr.sdkAttributes.sSpanInfo, sizeof(pdev->sSpanData)); + } + + return DOCH_OK; +} + +/*----------------------------------------------------------------------*/ +/* d o c h S e t M u t e x */ +/* */ +/* Notifies the start and end of a file-system operation. */ +/* */ +/* Parameters: */ +/* socketNum : Socket number */ +/* state : DOCH_ON (1) = operation entry */ +/* DOCH_OFF(0) = operation exit */ +/* partition : Partition number of the drive */ +/* */ +/*----------------------------------------------------------------------*/ +DOCH_Error dochSetMutex(FLByte socketNum, FLBoolean state, FLByte partition) +{ + DOCH_Socket* pdev; + + if(socketNum > DOCH_MAX_SOCKETS - 1) + return DOCH_BadParameter; + + pdev = &sockets[socketNum]; + + if (state == DOCH_ON) /* Set busy to ON */ + { + if (!flTakeMutex(&pdev->mutex)) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\ndochSetMutex Failed to set mutex\r\n"); + return DOCH_DriveNotAvailable; + } + } + else /* Set busy to OFF */ + { + flFreeMutex(&pdev->mutex); + } + + return DOCH_OK; +} + +/****************************************************************************** + * * + * d o c h _ f i n d _ b a s e _ a d d r e s s * + * * + * Calculate base address, try getting CHIP_ID from the device * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * dwAddress : Device address * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +static +DOCH_Error doch_find_base_address(FLSNative socketNo, + FLDword dwAddress) +{ + void* win; + + /*Retreive socket pointer from devices array*/ + DOCH_Socket* pdev; + + if(socketNo > DOCH_MAX_SOCKETS - 1) + return DOCH_BadParameter; + + pdev = &sockets[socketNo]; + + /* Save the physical address */ + pdev->dwPhysicalAddress = dwAddress; + + /* Get pointer to base of DOCH register set */ + win = (void*)(dwAddress); + + pdev->bRegBase = (volatile FLByte FAR0*)physicalToPointer((FLDword)win,DOCH_MEM_WIN_SIZE,0); + + return DOCH_OK; +} + +/****************************************************************************** + * * + * d o c h _ f i n d _ b a s e _ a d d r e s s * + * * + * Calculate base address, try getting CHIP_ID from the device * + * caller responsibility to set device head register * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +static +DOCH_Error doch_check_chipID(FLSNative socketNo) +{ + FLWord chipID1 = 0; + FLWord chipID2 = 0; + + /*Retreive socket pointer from devices array*/ + DOCH_Socket* pdev; + + if(socketNo > DOCH_MAX_SOCKETS - 1) + return DOCH_BadParameter; + + pdev = &sockets[socketNo]; + +/* no need to set device head register here- caller responsibility*/ + + /*Check ChipID*/ + /*============*/ + /*Read Chip ID #1*/ + chipID1 = doch_getConfigReg16(pdev, HIB_CHIPID1_REG); + /*Read Chip ID #2*/ + chipID2 = doch_getConfigReg16(pdev, HIB_CHIPID2_REG); + + + /*Check that Chip IDs match*/ + if((chipID1 + chipID2) == 0xFFFF) + { + if((chipID1 != DOCH_CHIP_ID_H3) && (chipID1 != DOCH_CHIP_ID_H4) && (chipID1 != DOCH_CHIP_ID_H5)) + { + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("\r\nUnknown ChipID: #%d \r\n"), chipID1)); + } +/* else + { + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("\r\nSocket #%d - ChipID OK"), socketNo)); + DBG_PRINT_FLOW(FLZONE_ATA, "\r\nDevice Found: "); + if(chipID1 == DOCH_CHIP_ID_H3) + DBG_PRINT_FLOW(FLZONE_ATA, "H3"); + if(chipID1 == DOCH_CHIP_ID_H4) + DBG_PRINT_FLOW(FLZONE_ATA, "H4"); + if(chipID1 == DOCH_CHIP_ID_H5) + DBG_PRINT_FLOW(FLZONE_ATA, "H5"); + } +*/ + return DOCH_OK; + } + else + { + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("\r\nSocket #%d - ChipID Not Found -"), socketNo)); + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT(" ChipID#1 0x%x , ChipID#2 0x%x\r\n"), chipID1, chipID2 )); + } + + return DOCH_AdapterNotFound; +} + +DOCH_Error setConfigHWItem(DOCH_HwConfigType configHWItem) +{ + DOCH_Error rc; + IOreq ioreq; + + tffsset(&ioreq, 0, sizeof(ioreq)); + + ioreq.irFlags = configHWItem; + ioreq.irLength = gConfigHWDefaults[configHWItem]; + rc = DOCHConfigHW(&ioreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "\r\nsetConfigHWItem(): Failed setting config Item "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("#%d "),configHWItem)); + DBG_PRINT_ERR(FLZONE_ATA, "\r\nwith status: "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("0x%x \r\n"),rc)); + + return rc; + } + + return DOCH_OK; +} +/****************************************************************************** + * * + * d o c h _ c o n f i g C o m m o n * + * * + * initializes config registers common to both floors * + * * + * Parameters : * + * pdev : device descriptor * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error doch_configCommon(DOCH_Socket* pdev) +{ + + /*Dummy write to exit virtual mode*/ + /*(Don't worry about the value it is later updated by calling setConfigHWItem(DOCH_IPL_CTRL))*/ + DOCHWRITE_CTRL_REG (pdev->bRegBase, HIB_CHIPID2_REG, 0); + + /*The following registers effect both floors - no need to select each floor*/ + if (gSdkInitDone != DOCH_GLOBAL_BOOL_PATTERN) + { /*initialize - set defaults*/ + /*Set Endian Control Register */ + doch_setConfigReg16 (pdev,HIB_ENDIAN_CTRL_REG,gConfigHWDefaults[DOCH_ENDIAN_CTRL]); + + /*Set Power down register */ + doch_setConfigReg16 (pdev,HIB_POWER_DOWN_REG,gConfigHWDefaults[DOCH_POWER_DOWN]); + + /*Set S/W Lock Control register + (This will perform SW lock as needed) */ + doch_setConfigReg16 (pdev,HIB_SW_LOCK_REG,gConfigHWDefaults[DOCH_SLOCK]); + + /*Set Operation Mode Register */ + doch_setConfigReg16 (pdev,HIB_OPERATION_MODE_REG,gConfigHWDefaults[DOCH_OPERATION_MODE_CTRL]); + }else + { /*recover last values*/ + if(configRegValueSet.wEndianCtrlSet) + { + doch_setConfigReg16 (pdev,HIB_ENDIAN_CTRL_REG,configRegValue.wEndianCtrl); + } + if(configRegValueSet.wPowerDownSet) + { + doch_setConfigReg16 (pdev,HIB_POWER_DOWN_REG,configRegValue.wPowerDown); + } + if (configRegValueSet.wSWLockSet) + { + doch_setConfigReg16 (pdev,HIB_SW_LOCK_REG,configRegValue.wSWLock); + } + if (configRegValueSet.wOperationModeSet) + { + doch_setConfigReg16 (pdev,HIB_OPERATION_MODE_REG,configRegValue.wOperationMode); + } + } + + +#ifdef DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES + /* clear lastDevNum before initializing floors*/ + pdev->bLastDevNum = 0xFF; +#endif /*DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES*/ + + + return DOCH_OK; + +} +/****************************************************************************** + * * + * d o c h _ c o n f i g F l o o r * + * * + * initializes config registers of specific floor * + * NOTE: caller responsibility to select floor * + * * + * Parameters : * + * pdev : device descriptor * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error doch_configFloor(DOCH_Socket* pdev) +{ + /*The following registers should be set only after device was successfully selected*/ + + if (gSdkInitDone!= DOCH_GLOBAL_BOOL_PATTERN) + { /*initialize - set defaults*/ + /*Set IPL control register */ + doch_setConfigReg16 (pdev,HIB_IPL_CONTROL_REG,gConfigHWDefaults[DOCH_IPL_CTRL]); + + /*Set DMA Control register */ + doch_setConfigReg16 (pdev,HIB_DMA_CTRL_REG,gConfigHWDefaults[DOCH_DMA_CTRL]); + + /*Set DMA Negation register */ + doch_setConfigReg16 (pdev,HIB_DMA_NEGATION_REG,gConfigHWDefaults[DOCH_DMA_NEGATION_CTRL]); + + }else + { /*recover last values*/ + if(configRegValueSet.wIPLCtrlSet) + { + doch_setConfigReg16(pdev, HIB_IPL_CONTROL_REG, configRegValue.wIPLCtrl); + } + + if(configRegValueSet.wDMACtrlSet) + { + doch_setConfigReg16(pdev, HIB_DMA_CTRL_REG, configRegValue.wDMACtrl); + } + + if(configRegValueSet.wEndianNegationSet) + { + doch_setConfigReg16(pdev, HIB_DMA_NEGATION_REG, configRegValue.wEndianNegation); + } + } + + return DOCH_OK; + +} + +/****************************************************************************** + * * + * d o c h _ c o n f i g A n d I D * + * * + * Try finding a DOCH device on the requested address * + * initializes config registers that are common to both floors * + * reads chipID of floor 0 * + * initializes config registers of floor 0 * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * DOCH_InitSocket : runtime socket init data * + * pDev : device to act on * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +static DOCH_Error doch_configAndID(DOCH_Socket* pdev, FLSNative socketNo, DOCH_InitSocket initSocket) +{ + DOCH_Error rc; + + /*Try finding a DOCH device on the requested address*/ + /*==================================================*/ + gSdkDOCAddressObtained = 0; + + rc = doch_find_base_address(socketNo, initSocket.nDeviceAddress); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "Socket "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("#%d "), socketNo)); + DBG_PRINT_ERR(FLZONE_ATA, "NOT found !\r\n"); + + return rc; + } + + /* Global indication that the DOC address was obtained */ + gSdkDOCAddressObtained = DOCH_GLOBAL_BOOL_PATTERN; + + /*Set PCI/PortaDoc window offset register*/ + /*=======================================*/ + if(gAccessLayerType == DOCH_AL_NOR) + { + if(gMemWindowType == MEM_WIN_8KB) + { + + if (!DOCH_SET_WINDOW_OFFSET(TRUE, pdev->bRegBase)) + { + return DOCH_GeneralFailure; + } + + } + else + { + if (!DOCH_SET_WINDOW_OFFSET(FALSE, pdev->bRegBase)) + { + return DOCH_GeneralFailure; + } + } + } + + /* Set HW Config Items */ + /*=====================*/ + /*The following registers effect both floors - no need to select each floor*/ + doch_configCommon(pdev); + + /*Set device to master before checking CHIP ID*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV0); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,0); + + /*initialize config registers of floor 0*/ + doch_configFloor(pdev); + + + /*Check ChipID*/ + /*============*/ + rc = doch_check_chipID(socketNo);/*caller responsibility to set device head register*/ + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_ATA, "Socket "); + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("#%d device#0"), socketNo)); + DBG_PRINT_ERR(FLZONE_ATA, " - ChipID FAILED !\r\n"); + + return rc; + } + + return DOCH_OK; + +} + +static DOCH_Error doch_init_8kb(DOCH_Socket* pdev, FLSNative socketNo, DOCH_InitSocket initSocket) +{ + DOCH_Error rc; + + /*Set mem window type and size*/ + gMemWindowType = MEM_WIN_8KB; + gDochMemWinSize = DOCH_MEM_WIN_SIZE_8KB; + + /*Set addresses*/ + gHibContRegAreaAddress = HIB_CORE_ADDRESS_8KB+DOCH_CONT_REG_AREA_8KB_OFFSET; + gHibDataPortAreaAddress = HIB_CORE_ADDRESS_8KB+DOCH_DATA_PORT_AREA_8KB_OFFSET; + gHibConfigRegAreaAddress = HIB_CORE_ADDRESS_8KB+DOCH_CONFIG_REG_AREA_8KB_OFFSET; + + DBG_PRINT_FLOW(FLZONE_ATA, "Try 8KB window...\r\n"); + + /*Config HW and check ChipID*/ + rc = doch_configAndID(pdev, socketNo, initSocket); + + if(rc == DOCH_OK) + DBG_PRINT_FLOW(FLZONE_ATA, "Memory window is 8KB\r\n"); + + return rc; +} + +static DOCH_Error doch_init_128kb(DOCH_Socket* pdev, FLSNative socketNo, DOCH_InitSocket initSocket) +{ + DOCH_Error rc; + + /*Set mem window type*/ + gMemWindowType = MEM_WIN_128KB; + gDochMemWinSize = DOCH_MEM_WIN_SIZE_128KB; + + /*Set addresses*/ + gHibContRegAreaAddress = HIB_CORE_ADDRESS_128KB+DOCH_CONT_REG_AREA_128KB_OFFSET; + gHibDataPortAreaAddress = HIB_CORE_ADDRESS_128KB+DOCH_DATA_PORT_AREA_128KB_OFFSET; + gHibConfigRegAreaAddress = HIB_CORE_ADDRESS_128KB+DOCH_CONFIG_REG_AREA_128KB_OFFSET; + + DBG_PRINT_FLOW(FLZONE_ATA, "Try 128KB window...\r\n"); + + /*Config HW and check ChipID*/ + rc = doch_configAndID(pdev, socketNo, initSocket); + + if(rc == DOCH_OK) + DBG_PRINT_FLOW(FLZONE_ATA, "Memory window is 128KB\r\n"); + + return rc; +} + +/****************************************************************************** + * * + * d o c h _ A T A s t d _ I D E N T I F Y _ D E V I C E * + * * + * Identify Device by using ATA standard IDENTIFY DEVICE command. * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * DOCH_InitSocket : runtime socket init data * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +static DOCH_Error doch_ATAstd_IDENTIFY_DEVICE(FLSNative socketNo, FLSNative devNum) +{ + DOCH_Error rc; + DOCH_Registers in_regs; + DOCH_Registers out_regs; + + tffsset(&in_regs, 0, sizeof(in_regs)); + in_regs.bDriveHead = DOCH_SELECT_DEV(devNum); + in_regs.bCommandStatus = DOCH_CMD_IDENTIFY_DEV; + + gIgnoreErrorBit = 1; + + rc = doch_ata_passthru ( socketNo, + devNum, + DOCH_PASSTHRU_DATA_IN, + &in_regs, + &out_regs, + &sockets[socketNo].device[devNum].driveParameters, + 1); + + gIgnoreErrorBit = 0; + + if(rc != DOCH_OK) + return DOCH_DiskNotFound; + + return DOCH_OK; +} + +/****************************************************************************** + * * + * d o c h _ i n i t _ w i n d o w * + * * + * Initialize DOCH socket (only first floor is initialized) * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * DOCH_InitSocket : runtime socket init data * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error doch_init_window (FLSNative socketNo, DOCH_InitSocket initSocket) +{ + DOCH_Error rc; + DOCH_Socket* pdev; + FLByte j; + + /* args sanity check */ + if ((socketNo < 0) || (socketNo >= DOCH_MAX_SOCKETS)) + return DOCH_BadParameter; + + /*Retreive socket pointer from devices array*/ + pdev = &sockets[socketNo]; + + for(j=0; j < 2 ; j++) + { + /*Try identifying device on both 8KB and 128KB memory windows*/ + /*===========================================================*/ + + #ifdef DOCH_ASSUME_128KB_WINDOW + /*If 128KB window is assumed, skip checking 8KB window*/ + j = 1; + #endif /*DOCH_ASSUME_128KB_WINDOW*/ + + #ifdef DOCH_ASSUME_8KB_WINDOW + /*If 8KB window is assumed, do not continue checking 128KB window*/ + if(j == 1) + return DOCH_AdapterNotFound; + #endif /*DOCH_ASSUME_8KB_WINDOW*/ + + if(j==0) /*Try 8KB window*/ + { + rc = doch_init_8kb(pdev, socketNo, initSocket); + if(rc == DOCH_OK) + return DOCH_OK; + } + else /*Try 128KB window*/ + { + rc = doch_init_128kb(pdev, socketNo, initSocket); + if(rc != DOCH_OK) + return rc; + } + + } + + return DOCH_OK; +} + +/****************************************************************************** + * * + * d o c h _ i n i t _ f l o o r * + * * + * initialization sequence for each floor (MASTER \SLAVE) * + * makes sure floor is ready * + * in case of ATA_MAX_NUM_OF_DEVICES == 2 both floors should be initialized * + * * + * Parameters : * + * pdev : device to act on * + * bFloor : 0-MASTER , 1-SLAVE * + * bConfFloor : TRUE - config floor * + * FALSE - do not config floor * + * (Master might be already set during window search) * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error doch_init_floors (DOCH_Socket* pdev,FLByte bConfFloor,FLByte * bFloorsNum) +{ + DOCH_Error rc =DOCH_OK; + FLDword dwTimes=0,i; + FLWord status; + + (*bFloorsNum) =0; + /* MASTER*/ + if (bConfFloor) + { + /* when function call is not from init sequence- */ + /* device head was not set yet and floor was not configured*/ + /*Set active ATA device*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV0); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,0); + doch_configFloor(pdev); + } + /* during init - no need to rewrite device head register */ + /* it was set inside doch_init_xxkb */ + /* chip ID for device#0 was already checked */ + + /*Disable interrupts (will be enabled later per API decision)*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CONTROL_REG, DOCH_ATA_NIEN); + + dwTimes = (DOCH_MOUNT_WAIT* (1000000UL / gDochAccessNanosec)); + for(i=0; ibRegBase, DOCH_STATUS_REG); + if((status & (DOCH_READY | DOCH_BUSY)) == DOCH_READY) + break; + } + + if (i==dwTimes) + { + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("\r\nDoch_init_floors(): Device#0 not ready - status: 0x%x \r\n"),status)); + rc = DOCH_DiskNotFound; + } + else + { + (*bFloorsNum)++; + } + +#if (ATA_MAX_NUM_OF_DEVICES==2) + + if (rc==DOCH_OK) + { /* SLAVE*/ + FLSNative socketNo =pdev->wSocketNo; + dwTimes=0; + rc=DOCH_GeneralFailure; + /* SLAVE device cannot be selected until it becomes ready*/ + /* no way for checking slave readiness without selecting it first...*/ + /* Therefore make several trials to select it and read it's chip ID */ + while ((dwTimes < DOCH_CHIP_ID_TRIALS_FOR_SLAVE)) + { + /*Set active ATA device*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_DRIVE_HEAD_REG, DOCH_SELECT_DEV1); + DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,1); + + /* Before trying to identify Dev1, check its CHIP_ID*/ + rc = doch_check_chipID(socketNo); /*caller responsibility to set device head register*/ + + if (rc != DOCH_OK) + { + DOCH_DELAY_BETWEEN_CHIP_ID_TRIALS_FOR_SLAVE; + }else + { + /*found chip ID - check readiness*/ + status = DOCHREAD_ATA_REG(pdev->bRegBase, DOCH_STATUS_REG); + if((status & (DOCH_READY | DOCH_BUSY)) == DOCH_READY) + break; + } + + dwTimes++; + } + + if(dwTimes == DOCH_CHIP_ID_TRIALS_FOR_SLAVE) /* no more trials..*/ + { /*SLAVE Failed*/ + DBG_PRINT_ERR_PRM(FLZONE_ATA, (FLTXT("Socket #%d dev1"), socketNo)); + DBG_PRINT_ERR(FLZONE_ATA, " - ChipID FAILED !\r\n"); + rc = DOCH_DiskNotFound; + } + else + { /*SLAVE Succeed*/ + (*bFloorsNum)++; + + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("Socket #%d dev1"), socketNo)); + DBG_PRINT_FLOW(FLZONE_ATA, " - Found ChipID !\r\n"); + /* initialize config registers of floor 1*/ + doch_configFloor(pdev); + + /*Disable interrupts (will be enabled later per API decision)*/ + DOCHWRITE_ATA_REG (pdev->bRegBase, DOCH_CONTROL_REG, DOCH_ATA_NIEN); + } + + } /*SLAVE*/ +#endif /*(ATA_MAX_NUM_OF_DEVICES==2)*/ + + if ((*bFloorsNum)>0 && rc!=DOCH_OK) + { + /* one floor succeed */ + rc = DOCH_OK; + } + /*Reset ATA protocol to ensure device is ready for the next ATA command*/ + /*Waiting to mount to complete before reset protocol*/ + /* need to add delay before reset (another access to DOCH_CONTROL_REG) */ + DOCH_DELAY_BEFORE_ACCESSING_SAME_REGISTER; + + if (pdev->wNumOfDevices == 0) + { + /* during init sequence */ + pdev->wNumOfDevices = (*bFloorsNum); /* needed for reset routine*/ + doch_reset(pdev);/*reset both floors*/ + pdev->wNumOfDevices = 0; /* will be actually updated in init sequence*/ + + }else + { + /* during recover from power loss sequence*/ + if (pdev->wNumOfDevices != *bFloorsNum) + { + /*different number of floors was found*/ + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("originally number of floors was %d and found %d\r\n"), + pdev->wNumOfDevices,*bFloorsNum)); + return DOCH_GeneralFailure; + } + doch_reset(pdev);/*reset both floors*/ + } + return rc; +} +/****************************************************************************** + * * + * d o c h _ i n i t _ s o c k e t * + * * + * Initialize DOCH socket. * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * DOCH_InitSocket : runtime socket init data * + * * + * Returns : * + * DOCH_OK in success, otherwise respective error code. * + * * + ******************************************************************************/ +DOCH_Error doch_init_socket (FLSNative socketNo, DOCH_InitSocket initSocket) +{ + DOCH_Error rc = DOCH_OK; + DOCH_Socket * pdev; + IOreq ioreq; + register FLSByte i; + FLByte bFloorsNum=0; + + /* args sanity check */ + if ((socketNo < 0) || (socketNo >= DOCH_MAX_SOCKETS)) + return DOCH_BadParameter; + + /*Clear "Ignore Error Bit" indication*/ + gIgnoreErrorBit = 0; + + /*Retreive socket pointer from devices array*/ + pdev = &sockets[socketNo]; + + /*Create a MUTEX for the socket*/ + flCreateMutex(&pdev->mutex); + + /*Clear socket structure*/ + clear_socket(pdev); + + /*Set socket number*/ + pdev->wSocketNo = socketNo; + + /*If no devices found - return failure + If 2 devices - check last partition of device #0 for partition span indication + ============================================================================*/ + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("\nSearching devices on socket #%d...\r\n\n"), socketNo)); + + pdev->wTotalNumOfPartitions = 0; + pdev->nTotalCapacity = 0; + + /*Try identifying device on both 8KB and 128KB memory windows*/ + /*===========================================================*/ + rc = doch_init_window(socketNo,initSocket); + if(rc != DOCH_OK) + { + return rc; + } + + rc = doch_init_floors(pdev,FALSE,&bFloorsNum); + if(rc != DOCH_OK) + { + return rc; + } + + for(i=0; ibAtaDevNum = i; + + tffsset(&ioreq, 0, sizeof(ioreq)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, socketNo); + ioreq.irData = &gDiskOnChipDeviceInfo; + /*Identify command with very short timeout, and "option1" on" + (just check if the device responds, not all fields are valid!)*/ + ioreq.irCount = DOCH_IDENTIFY_EXISTANCE; + gUseShortWaitOnBusy = DOCH_SHORT_IDENTIFY_TIMEOUT; + rc = DOCHIdentifyDiskOnChipDeviceSingleFloor(&ioreq); + gUseShortWaitOnBusy = 0; + + /*If the device was NOT identified (e.g. not existing) - + try using ATA standard IDENTIFY DEVICE command*/ + if(rc != DOCH_OK) + { + /*Try Identifying using Standard ATA IDENTIFY DEVICE command*/ + gUseShortWaitOnBusy = DOCH_SHORT_IDENTIFY_TIMEOUT; + rc = doch_ATAstd_IDENTIFY_DEVICE(socketNo, i); + gUseShortWaitOnBusy = 0; + + /*Identifying using Standard ATA IDENTIFY DEVICE command - FAILED*/ + if(rc != DOCH_OK) + { + return DOCH_DiskNotFound; + } + + /*Identifying using Standard ATA IDENTIFY DEVICE command - SUCCEEDED*/ + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("\r\nDev%d identifid WITHOUT ETFFS...\r\n\n"), i)); + } + else + { + /*If the device was WAS identified (e.g. exists) - perform full retrieval of device info data + without "option1" and with a longer timeout*/ + ioreq.irCount = DOCH_IDENTIFY_FROM_FLASH; + gUseShortWaitOnBusy = DOCH_LONG_IDENTIFY_TIMEOUT; + rc = DOCHIdentifyDiskOnChipDeviceSingleFloor(&ioreq); + gUseShortWaitOnBusy = 0; + } + if(rc == DOCH_OK) + pdev->wNumOfDevices ++; +#endif /*CX_TOOLS_SUPPORT*/ + } /* End loop search for number of floors */ + + if(rc != DOCH_OK) + { + return DOCH_DiskNotFound; + } + + pdev->wTotalNumOfPartitions += pdev->device[i].wNumOfPartitions; + pdev->nTotalCapacity += gDiskOnChipDeviceInfo.dwUnformattedCapacity; + + /*Set ATA Device Number back to 0...*/ + pdev->bAtaDevNum = 0; + + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("\r\nFound #%d device(s)...\r\n\n"), pdev->wNumOfDevices)); + + /*Set DPD mode as requested*/ + /*=========================*/ + tffsset(&ioreq, 0, sizeof(ioreq)); + + /*If registered HAL is SPI, disable DPD*/ + if(gAccessLayerType == DOCH_AL_SPI) + { + gDpdSettings.activeMode = DOCH_WM_NORMAL; + gDpdSettings.inActiveMode = DOCH_IM_IDLE; + } + + if(pdev->device[0].ETFFS_Identified) + { + /*1. Set both modes + 2. If DOCH_IM_IDLE_2_DPD configured as Inactive mode, force ETFFS + to enter Inactive mode after the command completes*/ + ioreq.irFlags = DOCH_PM_SET_BOTH_MODES; + if(gDpdSettings.inActiveMode == DOCH_IM_IDLE_2_DPD) + ioreq.irFlags |= DOCH_PM_INACTIVE_MODE; + + /*3. Set Active/Inactive modes*/ + ioreq.irCount = (gDpdSettings.activeMode | gDpdSettings.inActiveMode); + /*4. Set Timeout*/ + ioreq.irLength = gDpdSettings.timeOut; + + /*5. Set Power Modes to device(s) that ETFFS was identified on*/ + /* no need to call flDOCHSetPowerMode twice for each floor - this is done inside flDOCHSetPowerMode*/ + + rc = flDOCHSetPowerMode(&ioreq); + if(rc != DOCH_OK) + return rc; + +#ifdef FL_REPORT_INTERNAL_ERRORS + /* Set DocH to report internal errors*/ + tffsset(&ioreq, 0, sizeof(ioreq)); + ioreq.irCount = DOCH_CP_REPORT_ECC_MODE; + ioreq.irSectorNo = (FLWord)(DOCH_ENABLE_REPORT_ECC_ERRORS); + ioreq.irFlags = DOCH_CUSTOM_PARAM_TEMP; + rc = DOCHSetCustomParameter(&ioreq); + if(rc != DOCH_OK) + { + DBG_PRINT_WRN_PRM(FLZONE_ATA, (FLTXT("\r\nWARNING: Failed setting mDoc to report internal errors with status %d \r\n"), rc)); + /*return rc;*/ /*do not fail - backward compatibility*/ + } +#endif /*FL_REPORT_INTERNAL_ERRORS*/ + + } + + return DOCH_OK; +} + + + +/*********************************************************/ +/* Function name : doch_release_socket*/ +/* Description : calls to appropriated function */ +/* to release all allocated memory / devices etc */ +/* Return type : DOCH_Error */ +/* Argument : int socketNo*/ +/*********************************************************/ +DOCH_Error doch_release_socket( int socketNo ) +{ +#ifdef DOCH_USE_FUNC + DOCH_Error status; + DOCH_Socket* pdev; + + if(socketNo > DOCH_MAX_SOCKETS - 1) + return DOCH_BadParameter; + + pdev = &sockets[socketNo]; + + /* Un-register the socket */ + status = (DOCH_Error)(pdev->halRoutines.hal_doch_release(socketNo)); + + /*Delete the mutex*/ + flDeleteMutex(&pdev->mutex); + + if(status != DOCH_OK) + return DOCH_GeneralFailure; +#endif /*DOCH_USE_FUNC*/ + + return DOCH_OK; +}/*doch_release_socket()*/ + + + + +/****************************************************************************** + * * + * d o c h _ g e t _ d i s k * + * * + * Return pointer to device, by device number. * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * devNum : Device # (0,1) * + * * + * Returns : * + * Pointer to DOCH structure. * + * * + ******************************************************************************/ +DOCH* DOCH_get_disk(FLSNative socketNo, FLSNative devNum) +{ + if(socketNo > (DOCH_MAX_SOCKETS-1)) + return NULL; + else + return &sockets[socketNo].device[devNum]; +} + +/****************************************************************************** + * * + * d o c h _ s e t T r a n s f e r M o d e * + * * + * Sets data transfer mode * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * devNum : ATA Device [0..1] * + * tm : required data transfer mode: * + * DOCH_DATA_MODE_SINGLE * + * DOCH_DATA_MODE_MULT * + * * + * Returns : * + * Pointer to DOCH structure. * + * * + ******************************************************************************/ +DOCH_Error doch_setTransferMode (FLSNative socketNo, FLSNative devNum, DOCH_TransferMode tm, FLDword drqSize) +{ + if(socketNo > (DOCH_MAX_SOCKETS-1)) + return DOCH_BadParameter; + else + { + sockets[socketNo].device[devNum].dataTransferMode = tm; + sockets[socketNo].device[devNum].dwMulti_Current = drqSize; + + } + + return DOCH_OK; +} + +/****************************************************************************** + * * + * d o c h _ g e t T r a n s f e r M o d e * + * * + * Returns data transfer mode * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * * + * Returns : * + * Pointer to DOCH structure. * + * * + ******************************************************************************/ +DOCH_TransferMode doch_getTransferMode (FLSNative socketNo, FLSNative devNum) +{ + return sockets[socketNo].device[devNum].dataTransferMode; +} + +/****************************************************************************** + * * + * d o c h _ s e t C o n f i g R e g 1 6 * + * * + * Set DOCH 16Bit configuration register * + * Register values are maintained by a global structure of type * + * DOCH_ConfigRegsValue in order to allow recovery after power loss. * + * * + * Parameters : * + * pdev : device descriptor * + * registerOffset: Register offset * + * registerValue : Register Value * + * * + * Returns : * + * Pointer to DOCH structure. * + * * + ******************************************************************************/ +DOCH_Error doch_setConfigReg16(DOCH_Socket* pdev, FLDword registerOffset, FLNative registerValue) +{ + + if(registerOffset == (FLDword)HIB_BURST_WRITE_MODE_CTRL_REG) + { + configRegValue.wBurstWriteModeCtrl |= registerValue; + configRegValueSet.wBurstWriteModeCtrlSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_BURST_READ_MODE_CTRL_REG) + { + configRegValue.wBurstReadModeCtrl |= registerValue; + configRegValueSet.wBurstReadModeCtrlSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_IPL_CONTROL_REG) + { + configRegValue.wIPLCtrl |= (registerValue | DOCH_IPL_WRITE_READY); + configRegValueSet.wIPLCtrlSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_POWER_DOWN_REG) + { + configRegValue.wPowerDown |= registerValue; + configRegValueSet.wPowerDownSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_DMA_CTRL_REG) + { + configRegValue.wDMACtrl |= registerValue; + configRegValueSet.wDMACtrlSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_SW_LOCK_REG) + { + configRegValue.wSWLock |= registerValue; + configRegValueSet.wSWLockSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_ENDIAN_CTRL_REG) + { + configRegValue.wEndianCtrl |= registerValue; + configRegValueSet.wEndianCtrlSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_DMA_NEGATION_REG) + { + configRegValue.wEndianNegation |= registerValue; + configRegValueSet.wEndianNegationSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_OPERATION_MODE_REG) + { + configRegValue.wOperationMode |= registerValue; + configRegValueSet.wOperationModeSet = TRUE; + } + else if(registerOffset == (FLDword)HIB_POWER_MODE_REG) + { + /*Do nothing*/ + } + else + { + return DOCH_BadParameter; + } + + DOCHWRITE_CTRL_REG (pdev->bRegBase, registerOffset, registerValue); + + return DOCH_OK; +} + +/****************************************************************************** + * * + * d o c h _ g e t C o n f i g R e g 1 6 * + * * + * Returns DOCH 16Bit configuration register value * + * * + * Parameters : * + * pdev : device descriptor * + * registerOffset: Register offset * + * * + * Returns : * + * Pointer to DOCH structure. * + * * + ******************************************************************************/ +FLWord doch_getConfigReg16(DOCH_Socket* pdev, FLSNative registerOffset) +{ + /*Read 16Bit register*/ + return DOCHREAD_CTRL_REG(pdev->bRegBase, registerOffset); +} + + + +/****************************************************************************** + * * + * d e f _ d o c h D e l a y U s e c * + * * + * default implementation of delay according to access time * + * * + * Parameters : * + * FLDword usec: time to wait in uSec * + * dwAccessTime: access time in nano sec * + * * + * Returns : * + * 0 on success, otherwise error number. * + * * + ******************************************************************************/ +DOCH_Error def_dochDelayUsec(FLDword usec,FLDword dwAccessTime) +{ + volatile FLWord val; + FLDword dwCount = usec * (1000UL / dwAccessTime); +#ifdef DOCH_USE_FUNC + DOCH_Socket * pdev =&sockets[0]; +#endif /*DOCH_USE_FUNC*/ + + if (dwCount==0) + dwCount=1; + + /* read any register dwCount times; each time consumes gDochAccessNanosec*/ + while (dwCount-- > 0) + { + +#ifdef DOCH_USE_FUNC + val = DOCHREAD_CTRL_REG(pdev->bRegBase, HIB_CHIPID1_REG); +#else /*DOCH_USE_FUNC*/ + val = DOCHREAD_CTRL_REG(sockets[0].bRegBase, HIB_CHIPID1_REG); +#endif /*DOCH_USE_FUNC*/ + + } + + return DOCH_OK; + +} + + +#ifdef __cplusplus +} + +#endif diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_ata.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_ata.h new file mode 100755 index 00000000..bc9cfe43 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_ata.h @@ -0,0 +1,731 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/***********************************************************************************/ +/* */ +/* Header file for doch_ata module */ +/* */ +/***********************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/doch_ata.h-arc $ + * + * Rev 1.44 Dec 26 2007 10:13:36 einat.avidan + * doch_reset and doch_init_floors - changed parameters. + * + * Rev 1.43 Dec 11 2007 12:29:14 einat.avidan + * init sequence and DOCHConfigHW: change parameters of internal functions + * + * Rev 1.42 Dec 04 2007 17:32:42 einat.avidan + * Define max mount time + * def_dochDelayUsec - receives new parameter: access time. + * New functions declaration: doch_init_floor and doch_configCommon + * + * Rev 1.41 Oct 30 2007 17:01:42 einat.avidan + * replace dochEnableATAInterrupt function with macros + * + * Rev 1.40 Oct 23 2007 15:37:44 einat.avidan + * before reset wait for the longest operation to complete. + * + * Rev 1.39 Oct 23 2007 12:27:54 einat.avidan + * optimization: delay after setting head register only + * when switching floors + * + * Rev 1.38 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.37 Oct 21 2007 15:29:34 einat.avidan + * fix compilation warnings + * + * Rev 1.36 Oct 11 2007 18:48:42 Einat.Avidan + * update DOCH_VERY_LONG_WAIT + * in every write to drive head register set LBA bit. + * doch_reset resets both floor (no need of devNum parameter) + * caller responsible to set device head register + * when calling to dochEnableATAInterrupt (no need of devNum parameter) + * new function def_dochDelayUsec + * add compilation flags for SOTP and SLPP + * + * Rev 1.35 Sep 04 2007 15:40:28 einat.avidan + * bug fix: DOCH_VERY_LONG_WAIT definition was added + * (add_partition and secure_erase should have long waiting time) + * + * Rev 1.34 Mar 13 2007 13:47:20 einat.avidan + * add support for SLPP + * + * Rev 1.33 Feb 28 2007 09:58:42 einat.avidan + * No change + * + * Rev 1.32.1.1 Nov 12 2006 09:47:02 Yaniv.Iarovici + * 1. Added parameter 'FLBoolean waitOnBusy' to doch_reset(). + * 2. Added 'DOCH_SRST_WAIT' + * + * Rev 1.32.1.0 Oct 31 2006 12:23:36 yaniv.iarovici + * Added doch_init_window(). + * + * Rev 1.32 Oct 05 2006 11:00:42 yaniv.iarovici + * 1. Removed dwMulti_Read, dwMulti_Write. + * 2. Added dwMulti_MAX. + * 3. Removed DOCH_multReadOp structure. + * + * Rev 1.31 Sep 11 2006 13:45:16 yaniv.iarovici + * Legal header added + * + * Rev 1.30 Aug 22 2006 13:23:54 Yaniv.Iarovici + * Add 'extern "c"' on flExit() definition + * - extern DOCH_Socket sockets [DOCH_MAX_SOCKETS] + * - DOCH_get_socket MACRO definition + * + * Rev 1.29 Aug 16 2006 08:46:10 Yaniv.Iarovici + * structure DOCH: + * - Remove wOtpToParition[] + * - Add ETFFS_Identified instead + * + * Rev 1.28 Aug 09 2006 17:26:54 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +#ifndef DOCH_ATA_H +#define DOCH_ATA_H + +#include "doch_sys.h" +#include "doch_api.h" + +#include "part_inf.h" + +/* + * macros + * (also customizable for internal purpose) + * + */ + +/* 'long' DOCH operations can take up to DOCH_LONG_WAIT milliseconds */ +#ifndef DOCH_LONG_WAIT + #define DOCH_LONG_WAIT 500 +#endif /*DOCH_LONG_WAIT*/ + +/* 'short' DOCH operations can take up to DOCH_SHORT_WAIT milliseconds */ +#ifndef DOCH_SHORT_WAIT + #define DOCH_SHORT_WAIT 450 +#endif /*DOCH_SHORT_WAIT*/ + +/* 'very long' DOCH operations can take up to DOCH_VERY_LONG_WAIT milliseconds */ +#ifndef DOCH_VERY_LONG_WAIT + #define DOCH_VERY_LONG_WAIT 180000 +#endif /*DOCH_VERY_LONG_WAIT*/ + +/* Wait for busy bit to clear before sending SRST to the device (milliseconds) */ +#ifndef DOCH_SRST_WAIT + #define DOCH_SRST_WAIT DOCH_SHORT_WAIT +#endif /*DOCH_SRST_WAIT*/ + +/* Wait for busy bit to clear during init sequence(milliseconds) */ +#ifndef DOCH_MOUNT_WAIT + #define DOCH_MOUNT_WAIT 3000 +#endif /*DOCH_SRST_WAIT*/ + +/* "Very short wait" used for identifying device = 50ms */ +#ifndef DOCH_SHORT_IDENTIFY_TIMEOUT + #define DOCH_SHORT_IDENTIFY_TIMEOUT (10L*1000000L/gDochAccessNanosec) +#endif /*DOCH_SHORT_IDENTIFY_TIMEOUT*/ + +/* "Longer" wait used for identifying device = 500ms */ +#ifndef DOCH_LONG_IDENTIFY_TIMEOUT + #define DOCH_LONG_IDENTIFY_TIMEOUT (500L*1000000L/gDochAccessNanosec) +#endif /*DOCH_LONG_IDENTIFY_TIMEOUT*/ + +#ifndef DOCH_DEFAULT_SLEEP_PERIOD + #define DOCH_DEFAULT_SLEEP_PERIOD 3000 +#endif /* DOCH_DEFAULT_SLEEP_PERIOD */ + +/*#define ONE_SEC_IN_NANO_SEC (1000000000 / gDochAccessNanosec)*/ + +/* maximum number of sectors which could be read from / written to DOCH at once */ +#define DOCH_MAX_SECTORS 256 + +/*ATA device definitions*/ +#define DOCH_ATA_MASTER_DEV 0 /* master device only */ +#define DOCH_ATA_SLAVE_DEV 1 /* slave device only */ +#define DOCH_ATA_ALL_DEVS 0xff /* all devices */ + +#define ATA_NO_ERR 0 /* no error on ATA command */ + +#define DOCH_ATA_MAX_TIMEOUT 0xFFFFFFFF + +/* Access Layer Types */ +typedef enum { + DOCH_AL_NONE = 0xCAF0, + DOCH_AL_NOR = 0xCAF1, + DOCH_AL_SPI = 0xCAF2, + DOCH_AL_USER = 0xCAF3, + DOCH_AL_SIM = 0xCAF4 +} DOCH_AccessLayerType; + +/* Optional bits in DOCH_DRIVE_HEAD_REG */ +#define DRIVE_HEAD_OPT1 0x80 +#define DRIVE_HEAD_OPT2 0x20 + +/* Pattern to add to DOCH_DRIVE_HEAD_REG to */ +/*Option1*/ +#define CUSTOM_PARAM_TEMP DRIVE_HEAD_OPT1 /*Temporary value*/ +#define CUSTOM_PARAM_DEFAULT 0 /*DEFAULT value*/ +#define PERM_DEFAULT_PART_OP DRIVE_HEAD_OPT1 /*Permanently set default partition number*/ +#define PREPARE_FOR_WRITE_OP 0 +#define REWRITE_NORMAL_OP DRIVE_HEAD_OPT1 +#define WRITE_NORMAL_OP DRIVE_HEAD_OPT1 +#define HASH_AS_IS 0 +#define HASH_BY_KEY DRIVE_HEAD_OPT1 +#define DELETE_PARTITIONS_FAST 0 +#define DELETE_PARTITIONS_COMPLETE DRIVE_HEAD_OPT1 +/*Option2*/ +#define ERASE_NORMAL 0 +#define ERASE_IMMEDIATE DRIVE_HEAD_OPT2 + + +typedef enum { DOCH_4BITS = 0, /*TBD*/ + DOCH_ATA_NIEN = 2, + DOCH_ATA_SRST = 4 +} DOCH_control_reg; + +/* Data transfer modes */ +typedef enum { DOCH_DATA_MODE_SINGLE = 0x00, + DOCH_DATA_MODE_MULT = 0x01 +} DOCH_TransferMode; + +/* Atomic write sequence control */ +typedef enum { DOCH_START_ATOMIC_WRITE = 0x00, + DOCH_FINISH_ATOMIC_WRITE = 0x01, + DOCH_ABORT_ATOMIC_WRITE = 0x02 +} DOCH_AtomicSeqCtrl; + +/* set of DOCH Vendor-Specific ATA Commands */ +typedef enum { + /*I/O*/ + DOCH_VSCMD_READ_PARTITION = 0x82, + DOCH_VSCMD_WRITE_PARTITION = 0x83, + DOCH_VSCMD_WRITE_FLEXI = 0x84, + + /*Sectors Operations*/ + DOCH_VSCMD_OPTIMIZE_PARTITION_SECTORS = 0x86, + DOCH_VSCMD_ERASE_PARTITION_SECTORS = 0x88, + + /*Hash*/ + DOCH_VSCMD_READ_CALCULATED_HASH = 0x8A, + DOCH_VSCMD_WRITE_CALCULATED_HASH = 0x8B, + DOCH_VSCMD_READ_ORIGINAL_HASH = 0x8C, + DOCH_VSCMD_WRITE_GIVEN_HASH = 0x8D, + + /*Sub-commanded commands*/ + DOCH_VSCMD_PARTITION_MANAGEMENT = 0xFA, + DOCH_VSCMD_ACCESS_CONTROL = 0xFB, + DOCH_VSCMD_EXT_DEVICE_CTRL = 0xFC, + DOCH_VSCMD_EXT_SECURITY_CTRL = 0xFD, + + /*Supported standard ATA commands*/ + DOCH_CMD_IDENTIFY_DEV = 0xEC, + DOCH_DOWNLOAD_MICROCODE = 0x92 + +} DOCH_Command; + +/* set of operation codes for DOCH_VSCMD_PARTITION_MANAGEMENT command */ +typedef enum { + DOCH_GET_PARTITION_INFO = 0x00, + DOCH_SET_DEFAULT_PARTITION = 0x11, + DOCH_SET_PARTITION_PROTECTION = 0x18, + DOCH_GET_PARTITION_USER_ATTR = 0x70, + DOCH_SET_PARTITION_USER_ATTR = 0x71, + DOCH_DELETE_PARTITIONS = 0xB0, + DOCH_ADD_PARTITION = 0xB4, + DOCH_SECURE_ERASE = 0xB8 +} DOCH_PartitionManageOp; + +/* set of operation codes for DOCH_VSCMD_ACCESS_CONTROL command */ +typedef enum { + DOCH_EN_ACCESS_WPWD = 0x30, + DOCH_DISABLE_ACCESS = 0x31, + + /*Enable access with challange/response protocol*/ + DOCH_TX_HOST_PUBLICKEY = 0x32, + DOCH_RX_DOCH_PUBLICKEY = 0x33, +#ifndef FL_SLPP + DOCH_VERIFY_HOST_KEY = 0x34 +#else/* FL_SLPP */ + DOCH_VERIFY_HOST_KEY = 0x34, + /*SLPP Specific*/ + DOCH_SLPP_UNLOCK_RANGE = 0x40, + DOCH_SLPP_UNLOCK_ENTIRE_PARTITION = 0x41, + DOCH_SLPP_LOCK_RANGE = 0x42, + DOCH_SLPP_STICKY_LOCK_RANGE = 0x43, + DOCH_SLPP_REPORT_LOCKED_RANGES = 0x44 +#endif /*FL_SLPP*/ +} DOCH_AccessCtrlOp; + +/* set of operation codes for DOCH_VSCMD_EXT_DEVICE_CTRL command */ +typedef enum { + DOCH_IDENTIFY_DISKONCHIP_DEVICE = 0x00, + DOCH_GET_EXTENDED_DEVICE_INFO = 0x01, + DOCH_SET_DATA_XFER_MODE = 0x10, + DOCH_ATOMIC_WRITE_SEQUENCE = 0x20, + DOCH_OPTIMIZE_MEDIA = 0x30, + DOCH_GET_CUSTOM_PARAM = 0x40, + DOCH_SET_CUSTOM_PARAM = 0x41, + DOCH_CALIBRATE_CLOCK = 0x50, + DOCH_GET_POWER_MODE = 0x60, + DOCH_SET_POWER_MODE = 0x61, + DOCH_GET_DISK_USER_ATTR = 0x70, + DOCH_SET_DISK_USER_ATTR = 0x71, + DOCH_GET_CONFIGURATION_DATA = 0x72, + DOCH_SET_CONFIGURATION_DATA = 0x73, + DOCH_ACTIVATE_DEBUG_MODE = 0x7C, + DOCH_RETRIEVE_DBG_MSG = 0x7E, + DOCH_SET_ALERT_LEVEL = 0x7F, + DOCH_GET_RESET_STATUS = 0x80, + DOCH_NOTIFY_PLATFORM_RESUMED = 0x8E, + DOCH_NOTIFY_RESET = 0x8F +} DOCH_DeviceCtrlOp; + +/* set of operation codes for DOCH_VSCMD_EXT_SECURITY_CTRL command */ +typedef enum { + DOCH_REPORT_SUPPORTED_ALGORITHMS = 0x00, + DOCH_GET_ALGORITHM_CAPABILITIES = 0x01, + DOCH_SET_ALGORITHM_MODE = 0x02, + DOCH_RETURN_RANDOM_NUMBERS = 0x10, + DOCH_AUTO_HASH_CONTROL = 0x40, + DOCH_SET_KEYS = 0x48, + DOCH_START_HASH_STREAM_CALC = 0x50, + DOCH_READ_STOP_HASH_STREAM_CALC = 0x51 +} DOCH_SecurityCtrlOp; + +/* set of operation codes for DOCH_VSCMD_CRYPTO_CONTROL command */ +typedef enum { DOCH_HASH_NO_ENCRYPTION = 0x00, + DOCH_HASH_ENCRYPT_BY_KEY = 0x01 +} DOCH_HashEncrypt_Op; + +/* bits in DOCH_STATUS_REG and DOCH_ALT_STATUS_REG registers */ +#define DOCH_ERROR 0x01 +#define DOCH_DRQ 0x08 +#define DOCH_DSC 0x10 +#define DOCH_READY 0x40 +#define DOCH_BUSY 0x80 + +/* bits in DOCH_STATUS_REG and DOCH_ALT_STATUS_REG registers */ +#define DOCH_ERR_REG_BIT0 0x01; +#define DOCH_ERR_REG_BIT1 0x02; +#define DOCH_ERR_REG_ABRT 0x04; +#define DOCH_ERR_REG_BIT3 0x08; +#define DOCH_ERR_REG_BIT4 0x10; +#define DOCH_ERR_REG_BIT5 0x20; +#define DOCH_ERR_REG_BIT6 0x40; +#define DOCH_ERR_REG_BIT7 0x80; + +/* bits for DOCH_DRIVE_HEAD_REG register */ +#define DOCH_DEVICE 0x10 +#define DOCH_LBA 0x40 +#define DOCH_DRIVE_HEAD 0xA0 + +#define DOCH_SELECT_DEV0 DOCH_LBA +#define DOCH_SELECT_DEV1 (DOCH_DEVICE|DOCH_LBA) +#define DOCH_SELECT_DEV(devNum) ((devNum*DOCH_DEVICE)|DOCH_LBA) + +/* DOCH configuration bits (IDENTIFY_DEVICE Word#0) */ +#define DOCH_ATAPI 0x8000 +#define DOCH_REMOVABLE 0x0080 +#define DOCH_FIXED 0x0040 + +/* IDENTIFY DEVICE data */ +/*==========================*/ +typedef struct { + FLWord wGeneralConfiguration; + FLWord wDefaultNumberOfCylinders; /*1*/ + FLWord wSpecificConfiguration; /*ATA-5*/ + FLWord wDefaultNumberOfHeads; /*3*/ + FLDword dwReserved2; + FLWord wDefaultSectorsPerTrack; /*6*/ + FLWord wReserved1[3]; + FLByte bSerialNumber[20]; /*10*/ + FLWord wReserved4[2]; + FLWord wVsFLBytesInReadWriteLONG; /*obsolete in ata-5*/ + FLByte bFirmwareRevision[8]; /*23*/ + FLByte bModelNumber[40]; /*27*/ + + FLByte bReserved3; /*47 ata-4+ : must be 0x80*/ + FLByte bMaxSectorsPerMulti; + + FLWord wReserved5; + FLWord wCapabilities; /*49*/ + FLWord wCapabilities2; /*ata-4*/ + + FLByte bPIOTransferTiming; /*51 obsolete in ATA-5*/ + FLByte bReserved6a; + + FLWord wReserved7; /*was (single-word?) DMA Timing in ATA-2*/ + FLWord wWordSupported; /*53*/ + FLWord wCurrentNumberOfCylinders; /*54*/ + FLWord wCurrentNumberOfHeads; /*55*/ + FLWord wCurrentSectorPerTrack; /*56*/ + + FLWord wCurrentCapacityInSectorsLow; /*57*/ + FLWord wCurrentCapacityInSectorsHigh; /*58*/ + + FLByte bMultipleSectorSettingValid; /*59*/ + FLByte bMultipleSectorCurrentNumber; + + FLWord wTotalNumberOfSectorsLow; /*60*/ + FLWord wTotalNumberOfSectorsHigh; /*61*/ + + FLWord wReserved8; /*was singlewordDMASelect+Support in ATA-2*/ + + FLByte bMultiwordDMASelected; /*63*/ + FLByte bMultiwordDMASupported; + + FLByte bReserved9; /*64*/ + FLByte bAdvancedPIOsupported; + + FLWord wMinDMACycleTimePerWord; + FLWord wRecommndedMinDMACycleTimePerWord; + FLWord wMinPIOCycleTimeWithoutFlowControl; + FLWord wMinPIOCycleTimeWithIORDY; + FLWord wReserved10[6]; + + FLWord wQueueDepth; /*75 ata-4*/ + FLWord wReserved11[4]; + + FLWord wMajorVersionNumber; /*80*/ + FLWord wMinorVersionNumber; + FLWord wCommandSetsupported1; /*82*/ + FLWord wCommandSetsupported2; + + FLWord wCommandSetFeatureExtension; /*84 ata-4*/ + FLWord wCommandSetFeatureEnabled1; /*ata-4*/ + FLWord wCommandSetFeatureEnabled2; /*86 ata-4*/ + FLWord wCommandSetFeatureDefault; /*ata-4*/ + + FLByte bUltraDMASelected; /*88 ata-4*/ + FLByte bUltraDMASupported; + + FLWord wTimeForSecurityEraseCompletion; /*ata-4*/ + FLWord wTimeForEnhancedSecurityEraseCompletion; /*90 ata-4*/ + + FLWord wCurrentAdvancedPowerManagementValue; /*ata-4*/ + + FLWord wMasterPasswordRevision; /*92 ata-5*/ + FLWord wHardwareResetResult; /*ata-5*/ + + FLWord wReserved12[33]; + + FLWord wRemovableMediaNotificationSupport; /*127 ata-4*/ + + FLWord wSecurityStatus; /*128, i.e. 127 words left*/ + FLWord wVendorSpecific[31]; /*129-159*/ + FLWord wCFApowermode1; + FLWord wCFAreserved[15]; + FLWord wCurrentMediaSerialNumber[30]; + + FLWord wReserved13[49]; + + FLWord wIntegrityWord; +} DOCH_DriveParameters; + +typedef struct { + FLSDword activeMode; + FLSDword inActiveMode; + FLSDword timeOut; +} DOCH_DpdSettings; + + +/*IDENTIFY DEVICE information bits*/ +/*================================*/ + +/*for generalConfiguration*/ +#define GENERAL_CONFIG_ATAPI 0x8000 /*otherwise ATA*/ +#define GENERAL_CONFIG_REMOVABLE_MEDIA 0x80 /*otherwise not*/ +#define GENERAL_CONFIG_NON_REMOVABLE_DRIVE 0x40 /*and/or device*/ +#define GENERAL_CONFIG_RESPONSE_INCOMPLETE 0x04 /*ATA-5*/ + +/*for specificConfiguration*/ +#define DEVICE_REQUIRES_SET_FEATURES_ID_INCOMPLETE 0x37C8 +#define DEVICE_REQUIRES_SET_FEATURES_ID_COMPLETE 0x738C +#define DEVICE_NOT_REQUIRE_SET_FEATURES_ID_INCOMPLETE 0x8C73 +#define DEVICE_NOT_REQUIRE_SET_FEATURES_ID_COMPLETE 0xC837 + +/*for capabilities*/ +#define CAPABILITY_STANDBY_TIMER_AS_IN_STANDARD 0x2000 /*1<<13*/ +#define CAPABILITY_IORDY_SUPPORTED 0x0800 /*1<<11*/ +#define CAPABILITY_IORDY_CAN_BE_DISABLED 0x0400 /*1<<10*/ +#define CAPABILITY_MUST 0x0300 /*just must be*/ + +/*for capabilities2*/ +#define CAPABILITY2_MUST 0x4000 +#define CAPABILITY2_DEVICE_HAS_STANDBY_TIMER_MINIMUM 0x0001 + +/*for wordSupported*/ +#define FIELDS54_58_VALID 1 /*geometry*/ +#define FIELDS64_70_VALID 2 /*timing*/ +#define FIELD88_VALID 4 /*ATA-4: Ultra-DMA modes*/ + +/*for multipleSectorSetting*/ +/*#define MULTI_SECTOR_SETTING_CORRECT 0x100*/ + +/*for multiwordDma*/ +#define MULTI_WORD_DMA_0 1 +#define MULTI_WORD_DMA_1 2 +#define MULTI_WORD_DMA_2 4 /*ATA-4*/ +/*dma 'selected' - one bit*/ +/*dma 'supported' - also one bit, but with ATA-4/5 it MUST support*/ +/*all modes below. AND must have their bits in 1 too.*/ + +/*for advancedPIOsupported; 1 for pio3 3 for pio4*/ +#define ADVANCED_PIO_3_SUPPORTED 1 +#define ADVANCED_PIO_4_SUPPORTED 2 + + +/*for majorVersionNumber*/ +#define SUPPORTS_ATA_1 2 +#define SUPPORTS_ATA_2 4 +#define SUPPORTS_ATA_3 8 +#define SUPPORTS_ATA_4 0x10 +#define SUPPORTS_ATA_5 0x20 + +/*for minorVersionNumber*/ +#define ATA3_PUBLISHED 0x0A +#define ATA_ATAPI4_PUBLISHED 0x12 +#define ATA_ATAPI5_PUBLISHED 0x18 +/*#error download last draft & find out!*/ + +/*for commandSetsupported1, commandSetFeatureEnabled1*/ +#define SUPPORTS1_SMART 0x01 +#define SUPPORTS1_SECURITY 0x02 +#define SUPPORTS1_REMOVABLE 0x04 +#define SUPPORTS1_POWER_MANAGEMENT 0x08 +#define SUPPORTS1_PACKET_COMMAND 0x10 /*ATA-4. ATA-5: must be zero*/ +#define SUPPORTS1_WRITE_CACHE 0x20 /*ATA-4*/ +#define SUPPORTS1_LOOK_AHEAD 0x40 /*ATA-4*/ +#define SUPPORTS1_RELEASE_INTERRUPT 0x80 /*ATA-4*/ +#define SUPPORTS1_SERVICE_INTERRUPT 0x100 /*ATA-4*/ +#define SUPPORTS1_DEVICE_RESET_CMD 0x200 /*ATA-4*/ +#define SUPPORTS1_HOST_PROTECTED_AREA_FEATURE 0x400 /*ATA-4*/ +#define SUPPORTS1_WRITE_BUFFER 0x1000 /*ATA-4*/ +#define SUPPORTS1_READ_BUFFER 0x2000 /*ATA-4*/ +#define SUPPORTS1_NOP 0x4000 /*ATA-4*/ +/*1<<11 obsolete*/ +/*1<<15 obsolete*/ + +/*for commandSetsupported2, commandSetFeatureEnabled2*/ +#define SUPPORTS2_MUST 0x4000 +#define SUPPORTS2_DOWNLOAD_MICROCODE 0x01 /*ATA-4*/ +#define SUPPORTS2_READ_WRITE_DMA_QUEUED 0x02 /*ATA-4*/ +#define SUPPORTS2_CFA_FEATURE 0x04 /*ATA-4*/ +#define SUPPORTS2_ADVANCED_POWER_MANAGEMENT 0x08 /*ATA-4*/ +#define SUPPORTS2_REMOVABLE_MEDIA_NOTIFICATION 0x10 /*ATA-4*/ +#define SUPPORTS2_POWERUP_IN_STANDBY 0x20 /*ATA-5*/ +#define SUPPORTS2_NEEDS_SET_FEATURES_TO_SPIN 0x40 /*ATA-5*/ +#define SUPPORTS2_ADDRESS_OFFSET_RESERVED_BOOT 0x80 /*ATA-5*/ +#define SUPPORTS2_SET_MAX_SECURITY_EXTENSION 0x100 /*ATA-5*/ + +/*for commandSetFeatureExtension, commandSetFeatureDefault*/ +#define CMDSET_EXTENSION_MUST 0x4000 + +/*for ultraDma*/ +#define ULTRA_DMA_0 1 +#define ULTRA_DMA_1 2 +#define ULTRA_DMA_2 4 +#define ULTRA_DMA_3 8 /*ATA-5*/ +#define ULTRA_DMA_4 0x10 /*ATA-5*/ +/*selected: one, supported: one and below*/ + +/*for hardwareResetResult (ATA-5)*/ +#define HARDRESET_RESULT_MUST 0x4101 + +#define HARDRESET_CBLID_ABOVE_VIH 0x2000 + +#define HARDRESET_DEVICE_0_JUMPER 0x02 +#define HARDRESET_DEVICE_0_CSEL 0x04 +#define HARDRESET_DEVICE_0_OTHER 0x06 + +#define HARDRESET_DEVICE_0_PASSED_DIAGNOSTICS 0x08 +#define HARDRESET_DEVICE_0_DETECTED_PDIAG 0x10 +#define HARDRESET_DEVICE_0_DETECTED_DASP 0x20 +#define HARDRESET_DEVICE_0_RESPONDS_FOR_1 0x40 + +#define HARDRESET_DEVICE_1_JUMPER 0x200 +#define HARDRESET_DEVICE_1_CSEL 0x400 +#define HARDRESET_DEVICE_1_OTHER 0x600 + +#define HARDRESET_DEVICE_1_ASSERTED_PDIAG 0x800 + +/*for removableMediaNotificationSupport*/ +#define REMOVABLE_MEDIA_STATUS_NOTIFICATION_SUPPORTED 1 + +/*for securityStatus*/ +#define SECURITY_MAXIMUM 0x100 /*otherwise HIGH*/ +#define SECURITY_ENCHANCED_ERASE_SUPPORTED 0x20 /*ATA-4*/ +#define SECURITY_COUNT_EXPIRED 0x10 +#define SECURITY_FROZEN 0x08 +#define SECURITY_LOCKED 0x04 +#define SECURITY_ENABLED 0x02 +#define SECURITY_SUPPORTED 0x01 + +typedef struct { + FLByte bReserved[0x200]; +} DOCH_DeviceAttributes; + +/* long-word-aligned buffer */ +typedef union { unsigned char cbuf [DOCH_SECTOR_SIZE]; + unsigned short sbuf [DOCH_SECTOR_SIZE / sizeof(short)]; + unsigned long lbuf [DOCH_SECTOR_SIZE / sizeof(long)]; +} DOCH_Buf; + +#define DOCH_CHIP_ID_H3 0x4833 +#define DOCH_CHIP_ID_H4 0x4834 +#define DOCH_CHIP_ID_H5 0x4835 + +/* Runtime configuration flags*/ +/*DOCH Flags Offsets*/ +#define DOCH_FLAGSO_USE_CHS 0 +#define DOCH_FLAGSO_USE_DMA_READ 1 +#define DOCH_FLAGSO_USE_DMA_WRITE 2 +#define DOCH_FLAGSO_USE_INTERRUPT 3 + +/*DOCH Flags Bits*/ +#define DOCH_FLAGSB_USE_CHS 0x00000001 /* use Cyl/Head/Sector block addressing */ +#define DOCH_FLAGSB_USE_DMA_READ 0x00000002 /* use h/w DMA when reading sectors */ +#define DOCH_FLAGSB_USE_DMA_WRITE 0x00000004 /* use h/w DMA when writing sectors */ +#define DOCH_FLAGSB_USE_INTERRUPT 0x00000008 /* use DOCH interrupt */ + +/* single DOCH device */ +typedef struct { + DOCH_DriveParameters driveParameters; /* ATA::IDENTIFY DEVICE data */ + FLWord wNumOfPartitions; + FLWord ETFFS_Identified; /*ETFFS exists on device*/ + FLDword flags; + FLDword dwMulti_MAX; + FLDword dwSpare1; + FLDword dwMulti_Current; + DOCH_TransferMode dataTransferMode; +} DOCH; + +typedef struct { + volatile FLByte * bRegBase; + FLByte bAtaDevNum; /* Indicates which ATA device to send command to (0..1)*/ +#ifdef DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES + FLByte bLastDevNum; /* Indicates which ATA device was recently accessed */ +#endif /*DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES*/ + FLDword dwPhysicalAddress; /* NOT USED, returned by the SDK by a specific API */ + FLWord wSocketNo; /* [0.. DOCH_MAX_SOCKETS-1] */ + FLMutex mutex; /* Mutex for the socket*/ + FLBoolean bUseInterrupt; /* Wait on interrupt */ + FLBoolean bUseDMA; /* Use DMA for current data xfer */ + FLBoolean bUseBurst; /* Use Burst for current data xfer */ + FLWord wNumOfDevices; /* 2 if device #1 exists */ + FLNative nTotalCapacity; + FLWord wTotalNumOfPartitions; /* In both devices */ + DOCH_PartitionAttr partitionAttr[DOCH_MAX_PARTITIONS]; /* Partitions attributes */ + FLWord wLastPartitionSpanned; /* Last partition of device #0 spans to device #1 */ + DOCH device[ATA_MAX_NUM_OF_DEVICES]; /* ATA device #0, #1 */ + DOCH_HALRoutnies halRoutines; /* HAL routines structure*/ + DOCH_PartitionSpanData sSpanData; /*Span data as retrieved from Device User Attributes sector*/ +} DOCH_Socket; + +/* structure that holds addressing data (CHS/LBA) */ +typedef struct { + FLByte bSecNum; + FLByte bCylLow; + FLByte bCylHi; + FLByte bDevHead; +} Addressing_Values_s; + + +#ifdef __cplusplus +extern "C" { +#endif +extern DOCH_Socket sockets [DOCH_MAX_SOCKETS]; + +#define DOCH_get_socket(pdev, socketNo) \ + if(socketNo > (DOCH_MAX_SOCKETS-1)) \ + pdev = NULL; \ + else \ + pdev = &sockets[socketNo]; + + +/* API routines */ +extern DOCH* DOCH_get_disk(FLSNative socketNo, FLSNative devNum); +extern DOCH_Error doch_init_window (FLSNative socketNo, DOCH_InitSocket initSocket); +extern DOCH_Error doch_init_floors (DOCH_Socket* pdev,FLByte bConfFloor,FLByte * bFloorsNum); +extern DOCH_Error doch_init_socket (FLSNative socketNo, DOCH_InitSocket); +extern DOCH_Error doch_get_flags (FLSNative socketNo, FLSNative devNum, FLDword* flags); +extern DOCH_Error doch_set_flags (FLSNative socketNo, FLSNative devNum, FLDword flags); +extern DOCH_Error doch_command (FLSNative socketNo, FLSNative devNum, DOCH_Registers* in_regs, DOCH_Registers* out_regs, void* buf, FLNative secNum); +extern DOCH_Error doch_reset (DOCH_Socket* pdev); +extern DOCH_Error doch_setTransferMode (FLSNative socketNo, FLSNative devNum, DOCH_TransferMode tm, FLDword drqSize); +extern DOCH_TransferMode doch_getTransferMode (FLSNative socketNo, FLSNative devNum); +extern DOCH_Error doch_setConfigReg16(DOCH_Socket* pdev, FLDword registerOffset, FLNative registerValue); +extern FLWord doch_getConfigReg16(DOCH_Socket* pdev, FLSNative registerOffset); +extern DOCH_Error doch_configCommon(DOCH_Socket* pdev); +extern DOCH_Error clearATAInterrupt(FLSNative socketNo); + + +extern DOCH_Error doch_ata_passthru ( FLSNative socketNo, + FLSNative devNum, + DOCH_PassThru_Op ptOP, + DOCH_Registers * in_regs, + DOCH_Registers * out_regs, + void * buf, + FLNative secNum + ); + +extern DOCH_Error update_device_info(DOCH_Socket* pdev, + DOCH_DeviceInfo* diskOnChipDeviceInfo, + int devNum); + +DOCH_Error dochCheckPFSymptom(FLSNative socketNo, FLByte devNum, FLBoolean beforOrAfterCommand /* Used for debug prints */); + +DOCH_Error def_dochDelayUsec(FLDword usec,FLDword dwAccessTime); + +#define WAIT_FOR_UPLOAD_MAX_CYCLES 100 +#define DOCH_MINIMAL_PAGE_SIZE 0x4 /*2KB in sectors*/ +#define DOCH_MINIMAL_UNIT_SIZE 0x800 /*1MB in sectors*/ +#ifdef __cplusplus +} +#endif + +#endif /* DOCH_ATA_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_func.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_func.h new file mode 100755 index 00000000..672225c6 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_func.h @@ -0,0 +1,171 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/doch_func.h-arc $ + * + * Rev 1.24 Dec 04 2007 17:33:22 einat.avidan + * Remove flDOCHWipeSectorsByWriting + * + * Rev 1.23 Oct 30 2007 17:02:56 einat.avidan + * add new function DOCHWipeSectorsByWriting + * + * Rev 1.22 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.21 Oct 11 2007 18:48:58 Einat.Avidan + * Replace global Boolean pattern with pattern in size of + * byte instead of dWord + * + * Rev 1.20 Mar 13 2007 13:47:20 einat.avidan + * add support for SLPP + * + * Rev 1.19 Sep 11 2006 13:45:16 yaniv.iarovici + * Legal header added + * + * Rev 1.18 Aug 09 2006 17:26:54 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +#ifndef DOCH_FUNC_H +#define DOCH_FUNC_H + +#include "flcommon.h" +#include "doch_api.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/*Get Info*/ +DOCH_Error DOCHIdentifyDiskOnChipDevice(IOreq* ioreq); +DOCH_Error DOCHGetResetStatus(IOreq* ioreq); +DOCH_Error DOCHNotifyReset(IOreq* ioreq); +DOCH_Error DOCHNotifyPlatformResumed(IOreq* ioreq); +DOCH_Error DOCHPartitionInfo(IOreq* ioreq); +DOCH_Error DOCHSetDiskUserAttributes(IOreq* ioreq); +DOCH_Error DOCHGetDiskUserAttributes(IOreq* ioreq); +DOCH_Error DOCHGetConfigurationData(IOreq* ioreq); +DOCH_Error DOCHSetConfigurationData(IOreq* ioreq); + +/*Media*/ +DOCH_Error DOCHSetDefaultPartition(IOreq* ioreq); +DOCH_Error DOCHSetDataTransferMode(IOreq* ioreq); +DOCH_Error DOCHOptimizeMedia(IOreq* ioreq); +DOCH_Error DOCHDeletePartitions(IOreq* ioreq); +DOCH_Error DOCHAddPartition(IOreq* ioreq); +DOCH_Error DOCHUnformatDevice(IOreq* ioreq); +DOCH_Error DOCHWriteIPL(IOreq* ioreq); +DOCH_Error DOCHReadIPL(IOreq* ioreq); + +/*IO*/ +DOCH_Error DOCHReadPartitionSectors(IOreq* ioreq); +DOCH_Error DOCHWritePartitionSectors(IOreq* ioreq); +DOCH_Error DOCHWriteAndLock(IOreq* ioreq); +DOCH_Error DOCHWipeSectors(IOreq* ioreq); +DOCH_Error DOCHFreeSectors(IOreq* ioreq); +DOCH_Error DOCHPrepareForWrite(IOreq* ioreq); + + +/*Flexi-Flash*/ +DOCH_Error DOCHWriteFlexiFast(IOreq* ioreq); +DOCH_Error DOCHWriteFlexiNormal(IOreq* ioreq); +DOCH_Error DOCHReWriteFlexiNormal(IOreq* ioreq); + +/*Protection*/ +DOCH_Error DOCHAccessPartWithPwd(IOreq* ioreq); +DOCH_Error DOCHDisablePartAccess(IOreq* ioreq); +DOCH_Error DOCHSetParitionProtection(IOreq* ioreq); + +/*PKI*/ +DOCH_Error DOCHSendHostPublicKey(IOreq* ioreq); +DOCH_Error DOCHReceiveDochPublicKey(IOreq* ioreq); +DOCH_Error DOCHVerifyHostKey(IOreq* ioreq); + +/*Custom Parameters*/ +DOCH_Error DOCHGetCustomParameter(IOreq* ioreq); +DOCH_Error DOCHSetCustomParameter(IOreq* ioreq); + +/*Atomic Read/Write Sequence*/ +DOCH_Error DOCHManageAtomicWriteSeq(IOreq* ioreq); + +/*Algorithms*/ +DOCH_Error DOCHReportSupportedAlgorithms(IOreq* ioreq); +DOCH_Error DOCHGetAlgorithmCapabilities(IOreq* ioreq); +DOCH_Error DOCHSetAlgorithmMode(IOreq* ioreq); + +/*Hash*/ +DOCH_Error DOCHAutoHashControl(IOreq* ioreq); +DOCH_Error DOCHReadCalculatedHash(IOreq* ioreq); +DOCH_Error DOCHWriteCalculatedHash(IOreq* ioreq); +DOCH_Error DOCHReadOriginalHash(IOreq* ioreq); +DOCH_Error DOCHWriteGivenHash(IOreq* ioreq); +DOCH_Error DOCHStartHashStreamCalculation(IOreq* ioreq); +DOCH_Error DOCHReadStopHashStreamCalc(IOreq* ioreq); +DOCH_Error DOCHReturnRandomNumbers(IOreq* ioreq); +DOCH_Error DOCHSetHashKey(IOreq* ioreq); + +/*General*/ +DOCH_Error DOCHSetParitionUserAttributes(IOreq* ioreq); +DOCH_Error DOCHGetParitionUserAttributes(IOreq* ioreq); +DOCH_Error DOCHSetPowerMode(IOreq* ioreq); +DOCH_Error DOCHGetPowerMode(IOreq* ioreq); +DOCH_Error DOCHConfigHW(IOreq* ioreq); +DOCH_Error DOCHRecoverFromPowerLoss(IOreq* ioreq); +DOCH_Error DOCHClearIRQ(IOreq* ioreq); +DOCH_Error DOCHGetPhysicalAddress(IOreq* ioreq); + +#ifdef FL_SLPP +/*SLPP Specific*/ +DOCH_Error DOCHSLPPUnlockRange(IOreq* ioreq); +DOCH_Error DOCHSLPPUnlockEntirePartition(IOreq* ioreq); +DOCH_Error DOCHSLPPLockRange(IOreq* ioreq); +DOCH_Error DOCHSLPPStickyLockRange(IOreq* ioreq); +DOCH_Error DOCHSLPPReportLockedRanges(IOreq* ioreq); +#endif /*FL_SLPP*/ +#ifdef __cplusplus +} +#endif + +#endif /*DOCH_FUNC_H*/ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_sys.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_sys.h new file mode 100755 index 00000000..0b47786b --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/doch_sys.h @@ -0,0 +1,120 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/***********************************************************************************/ +/* */ +/* Header file for doch_sys module */ +/* */ +/***********************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/doch_sys.h-arc $ + * + * Rev 1.17 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.16 Feb 28 2007 09:58:42 einat.avidan + * No change + * + * Rev 1.15.1.0 Oct 31 2006 12:23:42 yaniv.iarovici + * Fix compilation warnings. + * + * Rev 1.15 Sep 11 2006 13:45:16 yaniv.iarovici + * Legal header added + * + * Rev 1.14 Aug 09 2006 17:26:54 Polina.Marimont + * initial for DOC Driver 1.0 + * + * Rev 1.13.1.0 Aug 08 2006 15:55:26 Polina.Marimont + * DOC Driver 1.0 initial + * + * Rev 1.13 May 18 2006 14:41:20 polina.marimont + * v1.40Fin1, PVCS log inside + */ + +#ifndef DOCH_SYS_H +#define DOCH_SYS_H + +#include "flcustom.h" + + +/* + * Access Layer API + */ + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct { + unsigned char (*hal_get_ata_reg) (volatile unsigned char *base, int reg); + void (*hal_set_ata_reg) (volatile unsigned char *base, int reg, unsigned int val); + unsigned short (*hal_get_ctrl_reg) (volatile unsigned char *base, int reg); + void (*hal_set_ctrl_reg) (volatile unsigned char *base, int reg, unsigned int val); + int (*hal_blk_read) (volatile unsigned char *base, unsigned char *buf, int sectors); + int (*hal_blk_write) (volatile unsigned char *base, unsigned char *buf, int sectors); + int (*hal_doch_release) (int socketNo); +} DOCH_HALRoutnies; + +#ifdef __cplusplus +} +#endif +#ifdef FL_MIGRATION_VERSION + +#ifndef DOCH_USE_FUNC +#include "defs.h" +#ifdef __cplusplus +extern "C" { +#endif +extern FLFlash * DOCHFlash; +#ifdef __cplusplus +} +#endif +#endif /* DOCH_USE_FUNC */ + +#endif /*FL_MIGRATION_VERSION*/ + +#endif /* DOCH_SYS_H */ + + + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochstub.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochstub.c new file mode 100755 index 00000000..6aff137e --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochstub.c @@ -0,0 +1,121 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/*This file holds necessary routines for integrating sureFS over DOCH SDK*/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/version 7.0/TrueFFS FS/src/h3/dochstub.c-arc $ + * + * Rev 1.12 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.11 Sep 11 2006 13:45:16 yaniv.iarovici + * Legal header added + * + * Rev 1.10 Aug 09 2006 17:26:54 Polina.Marimont + * initial for DOC Driver 1.0 + * + * Rev 1.9.1.0 Aug 08 2006 15:55:26 Polina.Marimont + * DOC Driver 1.0 initial + */ + +#include "flbase.h" +#include "flstruct.h" +#ifdef FL_MIGRATION_VERSION +#include "bddefs.h" +#else /*FL_MIGRATION_VERSION*/ +#include "fsdefs.h" +#endif /*FL_MIGRATION_VERSION*/ +#include "dochtl.h" +#include "doch_sys.h" +#include "doch_api.h" + + +FLMutex busy[DOCH_MAX_SOCKETS]; +FLBoolean dochStubInitialized = 0; +/*===========================*/ + +FLStatus dochSetBusy(FLByte socket, FLBoolean state, FLByte partition) +{ + FLStatus status = flOK; + + if (state == FL_ON) /* Set busy to ON */ + { + if (!flTakeMutex(&busy[socket])) + { + DBG_PRINT_FLOW_PRM(FLZONE_ATA, (FLTXT("\r\ndochSetMutex Failed to set mutex\r\n"))); + return flDriveNotAvailable; + } + } + else /* Set busy to OFF */ + { + flFreeMutex(&busy[socket]); + } + + return status; +} + +void setTL(FLByte socket, FLByte partition, TL * tl) +{ + FLNative i; + if (dochStubInitialized != TRUE) + { + dochStubInitialized = TRUE; + for (i = 0; i < DOCH_MAX_SOCKETS ; i ++) + flCreateMutex(&busy[i]); + } + getDochTL(tl, partition); +} + +#ifndef FL_MIGRATION_VERSION + +/* ----------------------------------------------------------------------------------- */ +FLStatus lockForIO(FLByte socket, FLByte partition, FLBoolean onOff) { + +checkStatus(dochSetBusy(socket, onOff, partition)); /* take BD mutex */ + +return flOK; +} +#endif /*FL_MIGRATION_VERSION*/ +/* ----------------------------------------------------------------------------------- */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochstub.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochstub.h new file mode 100755 index 00000000..e156cf7e --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochstub.h @@ -0,0 +1,72 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/version 7.0/TrueFFS FS/src/h3/dochstub.h-arc $ + * + * Rev 1.9 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.8 Sep 11 2006 13:45:16 yaniv.iarovici + * Legal header added + * + * Rev 1.7 Aug 09 2006 17:26:54 Polina.Marimont + * initial for DOC Driver 1.0 + * + * Rev 1.6.1.0 Aug 08 2006 15:55:28 Polina.Marimont + * DOC Driver 1.0 initial + */ + +#ifndef DOCHSTUB +#define DOCHSTUB + +#ifndef FL_MIGRATION_VERSION +void setTL(FLByte socket, FLByte partition, TL * tl) ; +#else /*FL_MIGRATION_VERSION */ +void DOCH_setTL(FLByte socket, FLByte partition, TL* tl); +FLStatus dochSetBusy(FLByte socket, FLBoolean state, FLByte partition); +#endif /*FL_MIGRATION_VERSION*/ + +FLStatus DOCH_lockForIO(FLByte socket, FLByte partition, FLBoolean onOff); + +#endif /*DOCHSTUB*/ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochtl.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochtl.c new file mode 100755 index 00000000..af0ec2b2 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochtl.c @@ -0,0 +1,642 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/dochtl.c-arc $ + * + * Rev 1.30 Dec 25 2007 11:18:24 einat.avidan + * bug fix: multiple mount on the same partition caused memory leak. + * + * Rev 1.29 Dec 04 2007 17:35:20 einat.avidan + * bug fix: gDeviceTurnedOff defined as byte and not as boolean + * + * Rev 1.28 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.27 Oct 11 2007 18:53:30 Einat.Avidan + * Replace global Boolean pattern with pattern in size of + * byte instead of dWord + * + * Rev 1.26 Jun 20 2007 12:04:52 einat.avidan + * Enable burst without DMA when dochTl is used + * + * Rev 1.25 Jan 07 2007 17:53:56 Einat.Avidan + * adjustment for a change in mDoc H3: + * flGetPartitionInfo now returns flOK when partition is both read and write protected. therefore need to check protection attributes of the partition during absMount. + * + * Rev 1.23.1.0 Oct 22 2006 14:53:42 yaniv.iarovici + * Fixed compilation warnings. + * + * Rev 1.23 Sep 11 2006 13:45:16 yaniv.iarovici + * Legal header added + * + * Rev 1.22 Sep 10 2006 10:03:42 Yaniv.Iarovici + * Fix compilation warning: Initialize tlRecTable[] and tlTable[] upon first entry to dochMountTL(). + * + * Rev 1.21 Aug 24 2006 11:39:46 Yaniv.Iarovici + * Change error returned by dochMountTL() in case DOCHPartitionInfo() failed to: + * - flHWProtection if the operation failed due to protection error + * - flGeneralFailure otherwise + * + * Rev 1.20 Aug 17 2006 15:20:36 Yaniv.Iarovici + * Zerioze partition info structure. + * + * Rev 1.18 Aug 09 2006 17:26:56 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +#include "dochtl.h" +#include "doch_ata.h" +#include "doch_func.h" + +#ifdef FL_MIGRATION_VERSION +#include "tffs_api.h" +#endif /*FL_MIGRATION_VERSION*/ + +static DocTLRec tlRecTable[DOCH_MAX_PARTITIONS]; +static TL tlTable[DOCH_MAX_PARTITIONS]; + + +extern FLByte gIsDMAEnabled; /*DMA is Enabled/Disabled*/ + +#ifdef CHECK_POWER_ON_EVERY_COMMAND +extern FLByte gDeviceTurnedOff; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif + +#ifndef FL_MIGRATION_VERSION +bdCallType bdCall = bdCallSureFS; +#endif /*FL_MIGRATION_VERSION*/ + +static FLStatus dochMapSector(TLrec * tlRec, SectorNo sectorNo, void * *retBuffer) +{ + DOCH_Error rc; + IOreq ioreq; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, tlRec->socketNo); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return flAdapterNotFound; + + tffsset(&ioreq, 0, sizeof(ioreq)); + + pdev->bAtaDevNum = 0; + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, tlRec->socketNo); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq, tlRec->partitionNo); + ioreq.irSectorNo = sectorNo; + ioreq.irSectorCount = 1; + ioreq.irData = tlRec->mappedSector; + + rc = flDOCHReadPartitionSectors(&ioreq); + + *retBuffer = tlRec->mappedSector; + + if(rc != DOCH_OK) + { + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /*In case Power Fail was detected, return DOCH_DeviceTurnedOff*/ + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + { + gDeviceTurnedOff = FALSE; + +#ifdef FL_MIGRATION_VERSION + return flSuspendModeDetected; +#else /*FL_MIGRATION_VERSION*/ + return DOCH_DeviceTurnedOff; +#endif /*FL_MIGRATION_VERSION*/ + } + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + return flBadFunction; + } + else + return flOK; +} + +static FLStatus dochWriteSector(TLrec *tlRec, SectorNo sectorNo, void FAR1 *fromAddress) +{ + DOCH_Error rc; + IOreq ioreq; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, tlRec->socketNo); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return flAdapterNotFound; + + tffsset(&ioreq, 0, sizeof(ioreq)); + + pdev->bAtaDevNum = 0; + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, tlRec->socketNo); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq, tlRec->partitionNo); + ioreq.irSectorNo = sectorNo; + ioreq.irSectorCount = 1; + ioreq.irData = fromAddress; + + rc = flDOCHWritePartitionSectors(&ioreq); + + if(rc != DOCH_OK) + { + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /*In case Power Fail was detected, return DOCH_DeviceTurnedOff*/ + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + { + gDeviceTurnedOff = FALSE; + +#ifdef FL_MIGRATION_VERSION + return flSuspendModeDetected; +#else /*FL_MIGRATION_VERSION*/ + return DOCH_DeviceTurnedOff; +#endif /*FL_MIGRATION_VERSION*/ + } + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + if( (rc == DOCH_ATA_ERROR_TRACK_0_NOT_FOUND) || (rc == DOCH_ProtectionFault)) + return flHWProtection; + + return flBadFunction; + } + else + return flOK; +} + +static FLStatus dochWriteMultiSector(TLrec *tlRec, SectorNo sectorNo, void FAR1 *fromAddress,SectorNo sectorCount) +{ + DOCH_Error rc; + IOreq ioreq; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, tlRec->socketNo); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return flAdapterNotFound; + + tffsset(&ioreq, 0, sizeof(ioreq)); + + pdev->bAtaDevNum = 0; + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, tlRec->socketNo); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq, tlRec->partitionNo); + ioreq.irSectorNo = sectorNo; + ioreq.irSectorCount = sectorCount; + ioreq.irData = fromAddress; + +#ifdef FL_MIGRATION_VERSION + #ifdef FL_USE_DMA_ON_WRITE +#endif /*FL_MIGRATION_VERSION*/ + +#ifdef DOCH_DMA_CONFIG + /*Check if to enable DMA*/ + if((((FLDword)fromAddress & 0x3) == 0) && (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN)) + ioreq.irFlags |= DOCH_USE_DMA; +#endif /*DOCH_DMA_CONFIG*/ + +#ifdef FL_MIGRATION_VERSION + #endif /*FL_USE_DMA_ON_WRITE*/ +#endif /*FL_MIGRATION_VERSION*/ + +#ifdef DOCH_USE_BURST_MODE_WRITE + ioreq.irFlags |= DOCH_USE_BURST; +#endif /*DOCH_USE_BURST_MODE_WRITE*/ + + rc = flDOCHWritePartitionSectors(&ioreq); + + if(rc != DOCH_OK) + { + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /*In case Power Fail was detected, return DOCH_DeviceTurnedOff*/ + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + { + gDeviceTurnedOff = FALSE; + +#ifdef FL_MIGRATION_VERSION + return flSuspendModeDetected; +#else /*FL_MIGRATION_VERSION*/ + return DOCH_DeviceTurnedOff; +#endif /*FL_MIGRATION_VERSION*/ + } + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + return flBadFunction; + } + else + return flOK; +} + +static FLStatus dochReadSectors(TLrec *tlRec, SectorNo sectorNo, void FAR1 *dest,SectorNo sectorCount) +{ + DOCH_Error rc; + IOreq ioreq; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, tlRec->socketNo); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return flAdapterNotFound; + + tffsset(&ioreq, 0, sizeof(ioreq)); + + pdev->bAtaDevNum = 0; + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, tlRec->socketNo); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq, tlRec->partitionNo); + ioreq.irSectorNo = sectorNo; + ioreq.irSectorCount = sectorCount; + ioreq.irData = dest; + +#ifdef DOCH_DMA_CONFIG + /*Check if to enable DMA*/ + if((((FLDword)dest & 0x3) == 0) && (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN)) + { + ioreq.irFlags |= DOCH_USE_DMA; + } +#endif /*DOCH_DMA_CONFIG*/ + +#ifdef FL_USE_BURST_MODE_READ + if( ((FLDword)ioreq.irData & 3) == 0 ) + { + ioreq.irFlags |= DOCH_USE_BURST; + } +#endif /* FL_USE_BURST_MODE_READ */ + + rc = flDOCHReadPartitionSectors(&ioreq); + if(rc != DOCH_OK) + { + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /*In case Power Fail was detected, return DOCH_DeviceTurnedOff*/ + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + { + gDeviceTurnedOff = FALSE; + +#ifdef FL_MIGRATION_VERSION + return flSuspendModeDetected; +#else /*FL_MIGRATION_VERSION*/ + return DOCH_DeviceTurnedOff; +#endif /*FL_MIGRATION_VERSION*/ + } + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + return flBadFunction; + } + else + return flOK; +} + +static FLStatus dochDeleteSector(TLrec *tlRec, SectorNo sectorNo, SectorNo noOfSectors) +{ + DOCH_Error rc; + IOreq ioreq; + DOCH_Socket* pdev; + DOCH_get_socket(pdev, tlRec->socketNo); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return flAdapterNotFound; + + tffsset(&ioreq, 0, sizeof(ioreq)); + + pdev->bAtaDevNum = 0; + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, tlRec->socketNo); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq, tlRec->partitionNo); + ioreq.irSectorNo = sectorNo; + ioreq.irSectorCount = noOfSectors; + + rc = flDOCHFreeSectors(&ioreq); + + if(rc != DOCH_OK) + { + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /*In case Power Fail was detected, return DOCH_DeviceTurnedOff*/ + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + { + gDeviceTurnedOff = FALSE; + +#ifdef FL_MIGRATION_VERSION + return flSuspendModeDetected; +#else /*FL_MIGRATION_VERSION*/ + return DOCH_DeviceTurnedOff; +#endif /*FL_MIGRATION_VERSION*/ + } + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + return flBadFunction; + } + else + return flOK; +} + +static FLStatus dochTlSetBusy(TLrec *tlRec, FLBoolean state) +{ + return flOK; +} + +static void dochDismount(TLrec *tlRec) +{ + FL_FREE(tlRec->mappedSector); +} + +static FLStatus dochDefragment(TLrec *tlRec, FLSDword FAR2 *sectorsNeeded, FLDword normalSpace) +{ + /*optimize*/ + return flOK; +} + +static FLStatus dochCheckVolume(TLrec *tlRec) +{ + return flOK; +} + +static SectorNo dochSectorsInVolume(TLrec *tlRec) +{ + SectorNo secNo = tlRec->virtualSectors; + + return secNo; +} + +static FLStatus dochGetTLInfo(TLrec *tlRec, TLInfo *tlInfo) +{ + return flOK; +} + +static void dochRecommendedClusterInfo(TLrec *tlRec, FLDword *sectorsPerCluster, FLDword *clusterAlignment) +{ + *sectorsPerCluster = tlRec->maxRelatedSectors; + *clusterAlignment = ((FLDword)tlRec->sectorsInUnit<socketNo); +#endif /*FL_MIGRATION_VERSION*/ + + tffscpy(tl, &tlTable[partition], sizeof(TL)); + + return flOK; +} + +FLStatus dochMountTL(FLNative partition, FLNative socket) +{ + static FLBoolean bStaticArraysInit = FALSE; + + IOreq ioreq; + DOCH_PartitionInfo partInfo; + DOCH_Error rc; + TL* tl; + DOCH_Socket* pdev; + FLByte protectionType,guestAccessMode,authenticated; + + /*Initialize static arrays*/ + if(!bStaticArraysInit) + { + tffsset(tlRecTable, 0, sizeof(tlRecTable)); + tffsset(tlTable, 0, sizeof(tlTable)); + bStaticArraysInit = TRUE; + } + + DOCH_get_socket(pdev, socket); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return flAdapterNotFound; + + /*Retrieve partition info*/ + tffsset(&partInfo, 0, sizeof(partInfo)); + tffsset(&ioreq, 0, sizeof(ioreq)); + DOCH_SET_SOCKET_TO_IOREQ_HANDLE(&ioreq, socket); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&ioreq, partition); + pdev->bAtaDevNum = 0; + ioreq.irData = &partInfo; + rc = DOCHPartitionInfo(&ioreq); + if(rc != DOCH_OK) + { + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /*In case Power Fail was detected, return DOCH_DeviceTurnedOff*/ + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + { + gDeviceTurnedOff = FALSE; + +#ifdef FL_MIGRATION_VERSION + return flSuspendModeDetected; +#else /*FL_MIGRATION_VERSION*/ + return DOCH_DeviceTurnedOff; +#endif /*FL_MIGRATION_VERSION*/ + } + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + if(rc == DOCH_ProtectionFault) + return flHWProtection; + + return flGeneralFailure; + } + protectionType = (FLByte)(partInfo.partitionAttributes2 & DOCH_PA2B_PROTECTION_TYPE); + guestAccessMode = (FLByte)((partInfo.partitionAttributes2 & DOCH_PA2B_GUEST_MODE) >> DOCH_PA2O_GUEST_MODE); + authenticated = (FLByte)((partInfo.dwCommandFlagsOrStatuses & DOCH_CFSB_USER_AUTHENTICATED) >> DOCH_CFSO_USER_AUTHENTICATED); + + if ((protectionType != DOCH_PARTITION_NOT_PROTECTED) && (guestAccessMode == DOCH_PART_ACCESS_MODE_NONE)) + { + /* partition is READ_PROTECTED and WRITE_PROTECTED*/ + if (!(authenticated && protectionType != DOCH_PARTITION_NOT_PROTECTED)) + { + /*key is not inserted*/ + return flHWProtection; + } + + } + tl = &tlTable[partition]; + + /*Set tlRec*/ + /*=========*/ + tlRecTable[partition].partitionNo = partition; + tlRecTable[partition].socketNo = socket; + tlRecTable[partition].virtualSectors = partInfo.nPartitionSize; + tl->rec = &tlRecTable[partition]; + + /*Allocate 1 sector for mapping*/ + /*=============================*/ + /* allocate mappedSector only if not already allocated*/ + if (tl->rec->mappedSector==NULL) + tl->rec->mappedSector = FL_MALLOC(DOCH_SECTOR_SIZE); + + /*Fill TL parameters*/ + /*==================*/ + tl->cylinders = 0; + tl->heads = 0; + tl->sectorsPerTrack = 0; + tl->recommendedSectorsInCluster = partInfo.wRecommendedSectorsPerCluster; + tl->normalArea_SectorsInUnit_Bits = partInfo.wNormalAreaSectorsInErasableUnit; + tl->riskZoneSectors = 8; + + /*Fill TL routines*/ + /*================*/ + tl->mapSector = dochMapSector; + tl->writeSector = dochWriteSector; + tl->writeMultiSector = dochWriteMultiSector; + tl->readSectors = dochReadSectors; + tl->deleteSector = dochDeleteSector; + tl->tlSetBusy = dochTlSetBusy; + tl->dismount = dochDismount; + tl->defragment = dochDefragment; + tl->checkVolume = dochCheckVolume; + tl->sectorsInVolume = dochSectorsInVolume; + tl->getTLInfo = dochGetTLInfo; + tl->recommendedClusterInfo = dochRecommendedClusterInfo; + tl->readBBT = dochReadBBT; + tl->notifyChange = dochNotifyChange; + tl->completeOperation = dochCompleteOperation; + tl->getLastMappedSectorAddress = dochGetLastMappedSectorAddress; + tl->ensureFreeSectorsInUnit = dochEnsureFreeSectorsInUnit; + + return flOK; +} + + +#ifndef FL_MIGRATION_VERSION +TFFS_DLL_API FLStatus bdCallSureFS(FLFunctionNo functionNo, IOreq FAR2 *ioreq) +{ + switch(functionNo) + { + case FL_ABS_MOUNT: + return dochMountTL(FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq), FL_GET_SOCKET_FROM_HANDLE(ioreq)); + + case FL_DISMOUNT_VOLUME: + return flOK; + + default: + return flFeatureNotSupported; + } + +} + +TFFS_DLL_API FLStatus NAMING_CONVENTION flInit(void) +{ + DOCH_Error rc; + + rc = DochSDKInit(); + if(rc != DOCH_OK) + { + #ifdef CHECK_POWER_ON_EVERY_COMMAND + /*In case Power Fail was detected, return DOCH_DeviceTurnedOff*/ + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + { + gDeviceTurnedOff = FALSE; + +#ifdef FL_MIGRATION_VERSION + return flSuspendModeDetected; +#else /*FL_MIGRATION_VERSION*/ + return DOCH_DeviceTurnedOff; +#endif /*FL_MIGRATION_VERSION*/ + } + #endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + + return flBadFunction; + } + + return flOK; +} + +TFFS_DLL_API void NAMING_CONVENTION flExit(void) +{ + doch_release_socket(0); +} + +#else /* FL_MIGRATION_VERSION not defined */ + +/******************************************/ +/* Function name : dochDismountTL */ +/* Description : */ +/* Return type : FLStatus */ +/* Argument : FLNative partition */ +/******************************************/ +FLStatus dochDismountTL(FLNative partition) +{ + TL* tl; + + tl = &tlTable[partition]; + + if( tl->rec->mappedSector != NULL ) + { + FL_FREE(tl->rec->mappedSector); + tl->rec->mappedSector = NULL; + } + + return flOK; +}/* dochDismountTL() */ + +#endif /*FL_MIGRATION_VERSION*/ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochtl.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochtl.h new file mode 100755 index 00000000..e277a78e --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dochtl.h @@ -0,0 +1,84 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/dochtl.h-arc $ + * + * Rev 1.15 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.14 Sep 11 2006 13:45:16 yaniv.iarovici + * Legal header added + * + * Rev 1.13 Aug 09 2006 17:26:56 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +#ifndef DOCHTL_H +#define DOCHTL_H + +#include "fltl.h" + + +struct tTLrec{ + FLByte socketNo; /* Socket number of the volume */ + FLByte partitionNo; /* Partition number of the volume */ + FLDword virtualSectors; /* No of sectors exported by the TL */ + FLByte maxRelatedSectors; /* Max number of sectors that might be written together */ + FLWord sectorsInUnit; /* No of sectors in a logical unit */ + + void FAR0 * mappedSector; +}; + +typedef TLrec DocTLRec; + +FLStatus getDochTL(TL* tl, FLByte partition); +FLStatus dochMountTL(FLNative partition, FLNative socket); + +#ifndef FL_MIGRATION_VERSION +TFFS_DLL_API FLStatus bdCallSureFS(FLFunctionNo functionNo, IOreq FAR2 *ioreq); +#else /*FL_MIGRATION_VERSION*/ +FLStatus dochDismountTL(FLNative partition); +#endif /*FL_MIGRATION_VERSION*/ +#endif /*DOCHTL_H*/ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docsys.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docsys.c new file mode 100755 index 00000000..02104c2f --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docsys.c @@ -0,0 +1,1304 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/bddoc/src/docsys.c-arc $ + * + * Rev 1.9 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.8 Mar 11 2007 16:37:30 einat.avidan + * bug fix: working on x86 requires read buffer not to be paged out + * replace the former solution (access to the begining and the end of the buffer) + * with full solution: usage of a buffer that is locked on RAM + * + * Rev 1.7 Feb 28 2007 09:53:44 einat.avidan + * No change + * + * Rev 1.6.1.0 Nov 13 2006 15:13:50 Yaniv.Iarovici + * Added environment variable - 'FL_DISABLE_MEMCPY'. + * + * Rev 1.6 Oct 05 2006 11:00:48 yaniv.iarovici + * Removed support for flUse8Bit. + * + * Rev 1.5 Sep 11 2006 13:45:18 yaniv.iarovici + * Legal header added + * + * Rev 1.4 Aug 09 2006 16:52:44 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#include "docsys.h" +#ifdef FL_PARALLEL_MTD_SUPPORT +#include "pacclayr.h" +#endif /* FL_PARALLEL_MTD_SUPPORT */ + +FLBoolean flPreventMemcpy = 0; + +#ifndef FL_NO_USE_FUNC + +/*********************************************************/ +/* Report DiskOnChip Memory size */ +/*********************************************************/ + +/*---------------------------------------------------------------------- + f l D o c M e m W i n S i z e N o S h i f t + + This routine is called from MTD to quary the size of the DiskOnChip + memory window for none shifted DiskOnChip. +------------------------------------------------------------------------*/ + +FLDword FAR1 flDocMemWinSizeNoShift(void) +{ + return 0x2000; +} + +/*---------------------------------------------------------------------- + f l D o c M e m W i n S i z e S i n g l e S h i f t + + This routine is called from MTD to quary the size of the DiskOnChip + memory window for DiskOnChip connected with a single addres shift. +------------------------------------------------------------------------*/ + +FLDword FAR1 flDocMemWinSizeSingleShift(void) +{ + return 0x4000; +} + +/*---------------------------------------------------------------------- + f l D o c M e m W i n S i z e D o u b l e S h i f t + + This routine is called from MTD to quary the size of the DiskOnChip + memory window for DiskOnChip connected with a double addres shift. +------------------------------------------------------------------------*/ + +FLDword FAR1 flDocMemWinSizeDoubleShift(void) +{ + return 0x8000; +} + +/*********************************************************/ +/* Write 16 bits to DiskOnChip memory window */ +/*********************************************************/ + + +/*---------------------------------------------------------------------- + f l W r i t e 16 b i t U s i n g 8 b i t s N o S h i f t + + Write 16-bits Using 8-bits operands and 8 bit data + With no address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite16bitUsing8bitsNoShift(volatile FLByte FAR0 * win, FLWord offset,FLWord val) +{ +#ifndef FL_BIG_ENDIAN + FLWRITE_IO_BYTE((FLByte)val,(win + offset)); + FLWRITE_IO_BYTE((FLByte)(val>>0x8),(win + offset+1)); +#else + FLWRITE_IO_BYTE((FLByte)(val>>0x8),(win + offset)); + FLWRITE_IO_BYTE((FLByte)val,(win + offset + 1)); +#endif /* FL_BIG_ENDIAN */ +} + +/*---------------------------------------------------------------------- + f l W r i t e 1 6 b i t U s i n g 1 6 b i t s N o S h i f t + + Note : offset must be 16-bits aligned. + + Note2 : Used for if_cfg = 16 when using address shift. + + Write 16-bit Using 16-bits operands and 16-bits of data + with no address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite16bitUsing16bitsNoShift(volatile FLByte FAR0 * win, FLWord offset,Reg16bitType val) +{ + FLWRITE_IO_WORD(val,((volatile FLWord FAR0 *)win + (offset>>1))); +} + +/*---------------------------------------------------------------------- + f l W r i t e 1 6 b i t U s i n g 3 2 b i t s S i n g l e S h i f t + + Note : offset must be 16-bits aligned. + + Write 16-bit Using 32-bits operands and 16-bits of data + With a single address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite16bitUsing32bitsSingleShift(volatile FLByte FAR0 * win, FLWord offset,Reg16bitType val) +{ +#ifdef FL_BIG_ENDIAN + FLWRITE_IO_DWORD((FLDword)(((FLDword)val)<<16),(((volatile FLDword FAR0 *)win)+(offset>>1))); +#else + FLWRITE_IO_DWORD((FLDword)val,(((volatile FLDword FAR0 *)win)+(offset>>1))); +#endif /* FL_BIG_ENDIAN */ +} + +/*---------------------------------------------------------------------- + f l W r i t e 1 6 b i t U s i n g 1 6 b i t s S i n g l e S h i f t + + Note : offset must be 16-bits aligned. + + Note2 : Used for if_cfg = 8 when using address shift. + + Write 16-bit Using 16-bits operands and 8-bits of data + with a single address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite16bitUsing16bitsSingleShift(volatile FLByte FAR0 * win, FLWord offset,Reg16bitType val) +{ +#ifdef FL_BIG_ENDIAN + FLWRITE_IO_WORD((FLWord)(val>>8),(((volatile FLWord FAR0 *)win) + offset)); + FLWRITE_IO_WORD((FLWord)(val),(((volatile FLWord FAR0 *)win) + (offset+1))); +#else + FLWRITE_IO_WORD(val,(((volatile FLWord FAR0 *)win) + offset)); + FLWRITE_IO_WORD((FLWord)(val>>8),(((volatile FLWord FAR0 *)win) + (offset + 1))); +#endif /* FL_BIG_ENDIAN */ +} + +/*---------------------------------------------------------------------- + f l W r i t e 1 6 b i t U s i n g 3 2 b i t s D o u b l e S h i f t + + Note : offset must be 16-bits aligned. + + Note2 : Used for if_cfg = 8 when using address shift. + + Write 16-bit Using 32-bits operands and 8-bits of data + with a single address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite16bitUsing32bitsDoubleShift(volatile FLByte FAR0 * win, FLWord offset,Reg16bitType val) +{ +#ifdef FL_BIG_ENDIAN + FLWRITE_IO_DWORD(((FLDword)(val>>8)),(((volatile FLDword FAR0 *)win) + offset)); + FLWRITE_IO_DWORD(((FLDword)((FLByte)val)),(((volatile FLDword FAR0 *)win) + (offset + 1))); +#else + FLWRITE_IO_DWORD(((FLDword)((FLByte)val)),(((volatile FLDword FAR0 *)win) + offset)); + FLWRITE_IO_DWORD(((FLDword)(val>>8)),(((volatile FLDword FAR0 *)win) + (offset + 1))); +#endif /* FL_BIG_ENDIAN */ +} + +/*********************************************************/ +/* Read 16 bits from DiskOnChip memory window */ +/*********************************************************/ + + +/*---------------------------------------------------------------------- + f l R e a d 16 b i t U s i n g 8 b i t s N o S h i f t + + Read 16-bits Using 8-bits operands and 8-bits of data + With no address shifted. +------------------------------------------------------------------------*/ + +FLWord FAR1 flRead16bitUsing8bitsNoShift(volatile FLByte FAR0 * win,FLWord offset) +{ +#ifndef FL_BIG_ENDIAN + register FLWord val = (FLWord)FLREAD_IO_BYTE((win+offset)); + return val | (((FLWord)FLREAD_IO_BYTE((win+offset+1)))<<8); +#else + register FLWord val = ((FLWord)FLREAD_IO_BYTE(win+offset))<<8; + return val | ((FLWord)FLREAD_IO_BYTE(win+offset+1)); +#endif /* FL_BIG_ENDIAN */ +} + +/*---------------------------------------------------------------------- + f l R e a d 1 6 b i t U s i n g 1 6 b i t s N o S h i f t + + Note : offset must be 16-bits aligned. + + Read 16-bit Using 16-bits operands and 16-bits of data + With no address shifted. +------------------------------------------------------------------------*/ + +Reg16bitType FAR1 flRead16bitUsing16bitsNoShift(volatile FLByte FAR0 * win,FLWord offset) +{ + return( FLREAD_IO_WORD(((volatile FLWord FAR0 *)win + (offset>>1))) ); +} + +/*---------------------------------------------------------------------- + f l R e a d 1 6 b i t U s i n g 3 2 b i t s S i n g l e S h i f t + + Note : offset must be 16-bits aligned. + + Note2 : Used for if_cfg = 16 when using address shift. + + Read 16-bit Using 32-bits operands and 16-bits of data + With single address shifted. +------------------------------------------------------------------------*/ + +Reg16bitType FAR1 flRead16bitUsing32bitsSingleShift(volatile FLByte FAR0 * win,FLWord offset) +{ +#ifdef FL_BIG_ENDIAN + return (Reg16bitType) (FLREAD_IO_DWORD(((volatile FLDword FAR0*)win)+(offset>>1))>>16); +#else + return((Reg16bitType)FLREAD_IO_DWORD(((volatile FLDword FAR0 *)win)+(offset>>1))); +#endif /* FL_BIG_ENDIAN */ +} + +/*---------------------------------------------------------------------- + f l R e a d 1 6 b i t U s i n g 1 6 b i t s S i n g l e S h i f t + + Note : offset must be 16-bits aligned. + + Note2 : Used for if_cfg = 8 when using address shift. + + Read 16-bit Using 16-bits operands and 8-bits of data + With single address shifted. +------------------------------------------------------------------------*/ + +Reg16bitType FAR1 flRead16bitUsing16bitsSingleShift(volatile FLByte FAR0 * win,FLWord offset) +{ + FLByte val[2]; + + val[0] = ((Reg8bitType)(FLREAD_IO_WORD(((volatile FLWord FAR0 *)win)+offset))); + val[1] = ((Reg8bitType)(FLREAD_IO_WORD(((volatile FLWord FAR0 *)win)+(offset+1)))); + + return *((Reg16bitType *)val); +} + +/*---------------------------------------------------------------------- + f l R e a d 1 6 b i t U s i n g 3 2 b i t s D o u b l e S h i f t + + Note : offset must be 16-bits aligned. + + Note2 : Used for if_cfg = 8 when using address shift. + + Read 16-bit Using 32-bits operands and 8-bits of data + With double address shifted. +------------------------------------------------------------------------*/ + +Reg16bitType FAR1 flRead16bitUsing32bitsDoubleShift(volatile FLByte FAR0 * win,FLWord offset) +{ + FLByte val[2]; + + val[0] = ((Reg8bitType)(FLREAD_IO_DWORD(((volatile FLDword FAR0 *)win)+offset))); + val[1] = ((Reg8bitType)(FLREAD_IO_DWORD(((volatile FLDword FAR0 *)win)+(offset+1)))); + + return *((Reg16bitType *)val); +} + + +/*********************************************************/ +/* Write 8 bits to DiskOnChip memory window */ +/*********************************************************/ + +/*---------------------------------------------------------------------- + f l W r i t e 8 b i t U s i n g 8 b i t s N o S h i f t + + Write 8-bits Using 8-bits operands with no address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite8bitUsing8bitsNoShift(volatile FLByte FAR0 * win, FLWord offset,Reg8bitType val) +{ + FLWRITE_IO_BYTE(val,win + offset); +} + + +/*---------------------------------------------------------------------- + f l W r i t e 8 b i t U s i n g 16 b i t s N o S h i f t + + Note : DiskOnChip is connected with 16-bit data bus. + Note : Data is written only to lower memory addresses. + + Write 8-bits Using 16-bits operands with no address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite8bitUsing16bitsNoShift(volatile FLByte FAR0 * win, FLWord offset,Reg8bitType val) +{ +#ifdef FL_BIG_ENDIAN + FLWRITE_IO_WORD(((FLWord)val)<<8,((volatile FLWord FAR0 *)win)+(offset>>1)); +#else + FLWRITE_IO_WORD((FLWord)val,(((volatile FLWord FAR0 *)win)+(offset>>1))); +#endif /* FL_BIG_ENDIAN */ +} + +/*---------------------------------------------------------------------- + f l W r i t e 8 b i t U s i n g 16 b i t s S i n g l e S h i f t + + Note : Data is written only to 8-LSB. + + Write 8-bits Using 16-bits operands with Single address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite8bitUsing16bitsSingleShift(volatile FLByte FAR0 * win, FLWord offset,Reg8bitType val) +{ + FLWRITE_IO_WORD((FLWord)val,(((volatile FLWord FAR0 *)win)+offset)); +} + +/*---------------------------------------------------------------------- + f l W r i t e 8 b i t U s i n g 32 b i t s S i n g l e S h i f t + + Note : DiskOnChip is connected with 16-bit data bus. + Note : Data is written to both data bus 8-bits + + Write 8-bits Using 32-bits operands with single address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite8bitUsing32bitsSingleShift(volatile FLByte FAR0 * win, FLWord offset,Reg8bitType val) +{ +#ifdef FL_BIG_ENDIAN + FLWRITE_IO_DWORD(((FLDword)((FLDword)val*0x01010101L)),(((volatile FLDword FAR0 *)win)+(offset>>1))); +#else + FLWRITE_IO_DWORD((FLDword)val,(((volatile FLDword FAR0 *)win)+(offset>>1))); +#endif /* FL_BIG_ENDIAN */ +} + +/*---------------------------------------------------------------------- + f l W r i t e 8 b i t U s i n g 32 b i t s D o u b l e S h i f t + + Note : Data is written only to 8-LSB. + + Write 8-bits Using 32-bits operands with Double address shifted. +------------------------------------------------------------------------*/ + +void FAR1 flWrite8bitUsing32bitsDoubleShift(volatile FLByte FAR0 * win, FLWord offset,Reg8bitType val) +{ + FLWRITE_IO_DWORD((FLDword)val,(((volatile FLDword FAR0 *)win)+offset)); +} + +/*********************************************************/ +/* Read 8 bits to DiskOnChip memory window */ +/*********************************************************/ + +/*---------------------------------------------------------------------- + f l R e a d 8 b i t U s i n g 8 b i t s N o S h i f t + + Read 8-bits Using 8-bits operands with no address shifted. +------------------------------------------------------------------------*/ + +Reg8bitType FAR1 flRead8bitUsing8bitsNoShift(volatile FLByte FAR0 * win,FLWord offset) +{ + return FLREAD_IO_BYTE(((volatile void FAR0 *)(win + offset))); +} + + +/*---------------------------------------------------------------------- + f l R e a d 8 b i t U s i n g 16 b i t s N o S h i f t + + Note : DiskOnChip is connected with 16-bit data bus. + + Read 8-bits Using 16-bits operands with no address shifted. +------------------------------------------------------------------------*/ + +Reg8bitType FAR1 flRead8bitUsing16bitsNoShift(volatile FLByte FAR0 * win,FLWord offset) +{ +#ifdef FL_BIG_ENDIAN + return (((offset & 0x1) == 0) ? +#else + return (( offset & 0x1 ) ? +#endif /* FL_BIG_ENDIAN */ + (Reg8bitType)(FLREAD_IO_WORD(((volatile FLWord FAR0 *)win + (offset>>1))) >> 8) : + (Reg8bitType)(FLREAD_IO_WORD(((volatile FLWord FAR0 *)win + (offset>>1)))) ); + +} + +/*---------------------------------------------------------------------- + f l R e a d 8 b i t U s i n g 16 b i t s S i n g l e S h i f t + + Note : Assume data is found in 8-LSB of DiskOnChip + + Read 8-bits Using 16-bits operands with Single address shifted. +------------------------------------------------------------------------*/ + +Reg8bitType FAR1 flRead8bitUsing16bitsSingleShift(volatile FLByte FAR0 * win,FLWord offset) +{ + return( (Reg8bitType)FLREAD_IO_WORD((((volatile FLWord FAR0 *)win)+offset)) ); +} + +/*---------------------------------------------------------------------- + f l R e a d 8 b i t U s i n g 32 b i t s S i n g l e S h i f t + + Note : DiskOnChip is connected with 16-bit data bus. + + Read 8-bits Using 16-bits operands with Single address shifted. +------------------------------------------------------------------------*/ + +Reg8bitType FAR1 flRead8bitUsing32bitsSingleShift(volatile FLByte FAR0 * win,FLWord offset) +{ +#ifdef FL_BIG_ENDIAN + return (((offset & 0x1) == 0) ? + (Reg8bitType)(FLREAD_IO_DWORD(((volatile FLDword FAR0 *)win)+(offset>>1))>>24) : + (Reg8bitType)(FLREAD_IO_DWORD(((volatile FLDword FAR0 *)win)+(offset>>1))>>16)); +#else + return (( offset & 0x1 ) ? + (Reg8bitType)(FLREAD_IO_DWORD(((volatile FLDword FAR0 *)win)+(offset>>1))>>8) : + (Reg8bitType)(FLREAD_IO_DWORD(((volatile FLDword FAR0 *)win)+(offset>>1))) ); +#endif /* FL_BIG_ENDIAN */ +} + +/*---------------------------------------------------------------------- + f l R e a d 8 b i t U s i n g 32 b i t s D o u b l e S h i f t + + Note : Assume data is found in 8-LSB of DiskOnChip + + Read 8-bits Using 16-bits operands with Single address shifted. +------------------------------------------------------------------------*/ + +Reg8bitType FAR1 flRead8bitUsing32bitsDoubleShift(volatile FLByte FAR0 * win,FLWord offset) +{ + return((Reg8bitType)FLREAD_IO_DWORD(((volatile FLDword FAR0 *)win)+offset)); +} + +/*********************************************************/ +/*********************************************************/ +/*** Operation on several bytes (read/write/set) ***/ +/*********************************************************/ +/*********************************************************/ + +/*************************************************/ +/* 8-Bit DiskOnChip - No Shift */ +/*************************************************/ + +/*---------------------------------------------------------------------- + f l 8 b i t D o c R e a d N o S h i f t + + Read 'count' bytes, from a none shifted address bus using tffscpy. +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocReadNoShift(volatile FLByte FAR0 * win,FLWord offset,FLByte FAR1* dest,FLWord count) +{ +#ifdef FL_ENVIRONMENT_VARS + if(flPreventMemcpy == 1) + { + register int i ; + + for(i = 0 ; i < count ; i++) + dest[i] = FLREAD_IO_BYTE(win + offset + i); + } + else +#endif /* FL_ENVIRONMENT_VARS */ + TFFSCPY_FROM_IO_8_BITS(dest,win+offset,count); +} + +/*---------------------------------------------------------------------- + f l 8 b i t D o c W r i t e N o S h i f t + + Write 'count' bytes, from a none shifted address bus using tffscpy. +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocWriteNoShift(volatile FLByte FAR0 * win,FLWord offset,FLByte FAR1* src,FLWord count) +{ +#ifdef FL_ENVIRONMENT_VARS + if(flPreventMemcpy == 1) + { + register int i ; + + for(i = 0 ; i < count ; i++) + FLWRITE_IO_BYTE(src[i],win + offset + i); + } + else +#endif /* FL_ENVIRONMENT_VARS */ + TFFSCPY_TO_IO_8_BITS(win+offset,src,count); +} + +/*---------------------------------------------------------------------- + f l 8 b i t D o c S e t N o S h i f t + + Set 'count' bytes, from a none shifted address bus using tffsset. +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocSetNoShift(volatile FLByte FAR0 * win,FLWord offset,FLWord count, FLByte val) +{ +#ifdef FL_ENVIRONMENT_VARS + if(flPreventMemcpy == 1) + { + register int i ; + for(i = 0 ; i < count ; i++) + FLWRITE_IO_BYTE(val,win + offset + i); + } + else +#endif /* FL_ENVIRONMENT_VARS */ + TFFSSET_IO_8_BITS(win+offset,val,count); +} + +/*************************************************/ +/* 8-Bit DiskOnChip - Single Shift */ +/*************************************************/ + +/*---------------------------------------------------------------------- + f l 8 b i t D o c R e a d S i n g l e S h i f t + + Note : Assume data is found in 8-LSB of DiskOnChip + + Read 'count' bytes, from data bus's LSB lane with 1 address shifted +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocReadSingleShift(volatile FLByte FAR0 * win,FLWord offset,FLByte FAR1* dest,FLWord count) +{ + volatile FLWord FAR0 * doc = ((volatile FLWord FAR0 *)win) + offset; + register int i; + + + for(i=0;( i < count );i++) + dest[i] = (Reg8bitType)FLREAD_IO_WORD(doc+i); +} + +/*---------------------------------------------------------------------- + f l 8 b i t D o c W r i t e S i n g l e S h i f t + + Note : Assume data is found in 8-LSB of DiskOnChip + + Write 'count' bytes, to data bus's LSB lane with 1 address shifted. +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocWriteSingleShift(volatile FLByte FAR0 * win,FLWord offset,FLByte FAR1* src,FLWord count) +{ + volatile FLWord FAR0 * doc = ((volatile FLWord FAR0 *)win) + offset; + register int i; + + for(i=0;( i < count );i++) + FLWRITE_IO_WORD((FLWord)(src[i]),doc+i); +} + +/*---------------------------------------------------------------------- + f l 8 b i t D o c S e t S i n g l e S h i f t + + Note : Assume data is found in 8-LSB of DiskOnChip + + Set 'count' bytes, of data bus's LSB lane with 1 address shifted. +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocSetSingleShift(volatile FLByte FAR0 * win,FLWord offset,FLWord count, FLByte val) +{ + volatile FLWord FAR0 * doc = ((volatile FLWord FAR0 *)win) + offset; + register int i; + + for(i=0;( i < count );i++) + FLWRITE_IO_WORD((FLWord)val,doc+i); +} + +/*************************************************/ +/* 8-Bit DiskOnChip - Double Shift */ +/*************************************************/ + +/*---------------------------------------------------------------------- + f l 8 b i t D o c R e a d D o u b l e S h i f t + + Note : Assume data is found in 8-LSB of DiskOnChip + + Read 'count' bytes, from data bus's LSB lane with 2 address shifted. +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocReadDoubleShift(volatile FLByte FAR0 * win,FLWord offset,FLByte FAR1* dest,FLWord count) +{ + volatile FLDword FAR0 *doc = ((volatile FLDword FAR0 *)win) + offset; + register int i; + + + for(i=0;( i < count );i++) + dest[i] = (Reg8bitType)FLREAD_IO_DWORD(doc+i); +} + +/*---------------------------------------------------------------------- + f l 8 b i t D o c W r i t e D o u b l e S h i f t + + Note : Assume data is found in 8-LSB of DiskOnChip + + Write 'count' bytes, to data bus's LSB lane with 2 address shifted. +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocWriteDoubleShift(volatile FLByte FAR0 * win,FLWord offset,FLByte FAR1* src,FLWord count) +{ + volatile FLDword FAR0 * doc = ((volatile FLDword FAR0 *)win) + offset; + register int i; + + for(i=0;( i < count );i++) + FLWRITE_IO_DWORD((FLDword)(src[i]),doc+i); +} + +/*---------------------------------------------------------------------- + f l 8 b i t D o c S e t D o u b l e S h i f t + + Note : Assume data is found in 8-LSB of DiskOnChip + + Set 'count' bytes, of data bus's LSB lane with 2 address shifted. +------------------------------------------------------------------------*/ + +void FAR1 fl8bitDocSetDoubleShift(volatile FLByte FAR0 * win,FLWord offset,FLWord count, FLByte val) +{ + volatile FLDword FAR0 * doc = ((volatile FLDword FAR0 *)win)+offset; + register int i; + + for(i=0;( i < count );i++) + FLWRITE_IO_DWORD((FLDword)val,doc+i); +} + +/*************************************************/ +/* 16-Bit DiskOnChip - No Shift */ +/*************************************************/ + +/*---------------------------------------------------------------------- + f l 1 6 b i t D o c R e a d N o S h i f t + + Note - this routine can read only even number of bytes + + Read 'count' bytes from M+ DiskOnChip with none shifted address bus. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocReadNoShift (volatile FLByte FAR0 * win, FLWord offset, FLByte FAR1 * dest, FLWord count ) +{ + volatile FLWord FAR0 * swin = (volatile FLWord FAR0 *)( win + offset); + register int i; + register FLWord tmp; + + + if( (FLDword)dest & 0x1 ) + { + /* rare case: unaligned target buffer */ + for (i = 0; i < (int)count; ) + { + tmp = FLREAD_IO_WORD(swin); +#ifdef FL_BIG_ENDIAN + dest[i++] = (FLByte)(tmp>>8); + dest[i++] = (FLByte)tmp; +#else + dest[i++] = (FLByte)tmp; + dest[i++] = (FLByte)(tmp>>8); +#endif /* FL_BIG_ENDIAN */ + } + } + else + { /* mainstream case */ +#ifdef FL_ENVIRONMENT_VARS + /* Some memcpy implementations from none 4 bytes aligned destination + * buffer may use a for loop of single byte calls to the first 2 + * bytes. This implementation may be good for RAM, but will be + * problematic to 16bit DiskOnChip that does not have a BHE signal. + * so if the buffer is not dword aligned we would not perform memcpy */ + + if ((flPreventMemcpy == 0) && (((FLDword)dest&0x3)==0) ) + { + TFFSCPY_FROM_IO_16_BITS( dest,win + offset, count); + } + else +#endif /* FL_ENVIRONMENT_VARS */ + { /* read in short words */ + for (i = 0, count = count >> 1; i < (int)count; i++) +#ifndef FL_XSCALE_BOOT_MODE + /* while incrementing DiskOnChip offset */ + ((FLWord FAR1 *)dest)[i] = FLREAD_IO_WORD(swin+i); +#else + /* but do not increment DiskOnChip offset */ + ((FLWord FAR1 *)dest)[i] = FLREAD_IO_WORD(swin); +#endif /* FL_XSCALE_BOOT_MODE */ + } + } +} + +/*---------------------------------------------------------------------- + f l 1 6 b i t D o c W r i t e N o S h i f t + + Note - this routine can write only even number of bytes + + Write 'count' bytes to M+ DiskOnChip with none shifted address bus. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocWriteNoShift ( volatile FLByte FAR0 * win , FLWord offset , + FLByte FAR1 * src, FLWord count ) +{ + volatile FLWord FAR0 * swin = (volatile FLWord FAR0 *)( win + offset); + register int i; + register FLWord tmp; + + if( (FLDword)src & 0x1 ) /* rare case: unaligned source buffer */ + { + for (i = 0; i < (int)count; i+=2) + { + /* tmp variable is just a precation from compiler optimizations */ +#ifdef FL_BIG_ENDIAN + tmp = ((FLWord)src[i]<<8) + (FLWord)src[i+1]; +#else + tmp = (FLWord)src[i] + ((FLWord)src[i+1]<<8); +#endif /* FL_BIG_ENDIAN */ + FLWRITE_IO_WORD(tmp,swin); + } + } + else /* mainstream case */ + { +#ifdef FL_ENVIRONMENT_VARS + if ((flPreventMemcpy == 0) && (((FLDword)src&0x3)==0)) + { + TFFSCPY_TO_IO_16_BITS(win + offset,src,count); + } + else +#endif /* FL_ENVIRONMENT_VARS */ + { + /* write in short words */ + for (i = 0, count = count >> 1; i < (int)count; i++) + /* while incrementing DiskOnChip offset */ + /* but do not increament DiskOnChip offset */ + FLWRITE_IO_WORD(((FLWord FAR1 *)src)[i],swin); + } + } +} + +/*---------------------------------------------------------------------- + f l 1 6 b i t D o c S e t N o S h i f t + + Note - this routine can write only even number of bytes + + Set 'count' bytes of M+ DiskOnChip with none shifted address bus +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocSetNoShift ( volatile FLByte FAR0 * win , FLWord offset , + FLWord count , FLByte val) +{ + volatile FLWord FAR0 * swin = (volatile FLWord FAR0 *)( win + offset); + register int i; + register FLWord tmpVal = (FLWord)val * 0x0101; + +#ifdef FL_ENVIRONMENT_VARS + if (flPreventMemcpy == 0) + { + TFFSSET_IO_16_BITS(win + offset, val, count ); + } + else +#endif /* FL_ENVIRONMENT_VARS */ + { /* write in short words */ + for (i = 0; i < (int)count; i+=2) + FLWRITE_IO_WORD(tmpVal,swin); + } +} + +/*************************************************************/ +/* 16-Bit DiskOnChip - No Shift - Only 8 bits are valid */ +/*************************************************************/ + +/*---------------------------------------------------------------------- + f l 1 6 b i t D o c R e a d N o S h i f t I g n o r e H i g h e r 8 B i t s + + Note : offset must be 16-bits aligned. + + Read 'count' bytes from M+ DiskOnChip connected with all 16 data bits, but + in interleave-1 mode , therefore only one of the 8 bits contains actual data. + The DiskOnChip is connected without an address shift. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocReadNoShiftIgnoreHigher8bits(volatile FLByte FAR0 * win, FLWord offset, FLByte FAR1 * dest, FLWord count ) +{ + volatile FLWord FAR0 * swin = (volatile FLWord FAR0 *)( win + offset); + register int i; + + + for (i = 0; i < (int)count; i++) + { +#ifndef FL_XSCALE_BOOT_MODE + /* Read while incrementing DiskOnChip window offset */ +#ifdef FL_BIG_ENDIAN + dest[i] = (FLByte)(FLREAD_IO_WORD((volatile void FAR0 *)(swin+i))>>8); +#else + dest[i] = (FLByte)FLREAD_IO_WORD((volatile void FAR0 *)(swin+i)); +#endif /* FL_BIG_ENDIAN */ +#else + /* Read while not incrementing DiskOnChip window offset */ +#ifdef FL_BIG_ENDIAN + dest[i] = (FLByte)(FLREAD_IO_WORD(swin)>>8); +#else + dest[i] = (FLByte)(FLREAD_IO_WORD(swin)); +#endif /* FL_BIG_ENDIAN */ +#endif /* FL_XSCALE_BOOT_MODE */ + } +} + +/*---------------------------------------------------------------------- + f l 1 6 D o c W r i t e N o S h i f t I g n o r e H i g h e r 8 b i t s + + Note : offset must be 16-bits aligned. + + Write 'count' bytes to M+ DiskOnChip connected with all 16 data bits, but + in interleave-1 mode , therefore only one of the 8bits contains actual data. + The DiskOnChip is connected without an address shift. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocWriteNoShiftIgnoreHigher8bits ( volatile FLByte FAR0 * win , FLWord offset , + FLByte FAR1 * src, FLWord count ) +{ + volatile FLWord FAR0 * swin = (volatile FLWord FAR0 *)( win + offset); + register int i; + + for (i = 0; i < (int)count; i++) + { + /* Write while not incrementing DiskOnChip window offset */ +#ifdef FL_BIG_ENDIAN + FLWRITE_IO_WORD((((FLWord)src[i])<<8),swin); +#else + FLWRITE_IO_WORD((FLWord)src[i],swin); +#endif /* FL_BIG_ENDIAN */ + } +} + +/*---------------------------------------------------------------------- + f l 1 6 D o c S e t N o S h i f t I g n o r e H i g h e r 8 b i t s + + Note : offset must be 16-bits aligned. + + Set 'count' bytes to M+ DiskOnChip connected with all 16 data bits, but + in interleave-1 mode , therefore only one of the 8bits contains actual data. + The DiskOnChip is connected without an address shift. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocSetNoShiftIgnoreHigher8bits ( volatile FLByte FAR0 * win , FLWord offset , + FLWord count , FLByte val) +{ + volatile FLWord FAR0 * swin = (volatile FLWord FAR0 *)( win + offset ); + register int i; + register FLWord tmpVal = val * 0x0101; + + for (i = 0; i < (int)count; i++) + FLWRITE_IO_WORD(tmpVal,swin); +} + +/****************************************/ +/* 16-Bit DiskOnChip - Single Shift */ +/****************************************/ + +/*---------------------------------------------------------------------- + f l 1 6 b i t D o c R e a d S i n g l e S h i f t + + Read 'count' bytes from M+ DiskOnChip with none shifted address bus. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocReadSingleShift (volatile FLByte FAR0 * win, FLWord offset, FLByte FAR1 * dest, FLWord count ) +{ + volatile FLDword FAR0 * swin = ((volatile FLDword FAR0 *)win) + (offset>>1); + register int i; + register FLDword tmp; + + + if( (FLDword)dest & 0x1 ) + { + /* rare case: unaligned target buffer */ + for (i = 0; i < (int)count; ) + { + tmp = FLREAD_IO_DWORD(swin); +#ifdef FL_BIG_ENDIAN + dest[i++] = (FLByte)(tmp>>24); + dest[i++] = (FLByte)(tmp>>16); +#else + dest[i++] = (FLByte)tmp; + dest[i++] = (FLByte)(tmp>>8); +#endif /* FL_BIG_ENDIAN */ + } + } + else + { /* mainstream case */ + for (i = 0, count = count >> 1; i < (int)count; i++) + { +#ifdef FL_BIG_ENDIAN + ((FLWord FAR1 *)dest)[i]=(FLWord)(FLREAD_IO_DWORD(swin+i)>>16); +#else + ((FLWord FAR1 *)dest)[i] = (FLWord)FLREAD_IO_DWORD(swin+i); +#endif /* FL_BIG_ENDIAN */ + } + } +} + +/*---------------------------------------------------------------------- + f l 1 6 b i t D o c W r i t e S i n g l e S h i f t + + Write 'count' bytes to M+ DiskOnChip with none shifted address bus. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocWriteSingleShift ( volatile FLByte FAR0 * win , FLWord offset , + FLByte FAR1 * src, FLWord count ) +{ + volatile FLDword FAR0 * swin = ((volatile FLDword FAR0 *)win)+ (offset>>1); + register int i; + register FLDword tmp; + + if( (FLDword)src & 0x1 ) /* rare case: unaligned source buffer */ + { + for (i = 0; i < (int)count; i+=2) + { +#ifdef FL_BIG_ENDIAN + tmp = (((FLDword)src[i])<<24) + (((FLDword)src[i+1])<<16); +#else + tmp = (FLDword)src[i] + (((FLDword)src[i+1])<<8); +#endif /* FL_BIG_ENDIAN */ + FLWRITE_IO_DWORD(tmp,swin); + } + } + else /* mainstream case */ + { + for (i = 0, count = count >> 1; i < (int)count; i++) +#ifdef FL_BIG_ENDIAN + FLWRITE_IO_DWORD(((FLDword)((FLWord FAR1 *)src)[i])<<16,swin); +#else + FLWRITE_IO_DWORD(((FLDword)((FLWord FAR1 *)src)[i]),swin); +#endif /* FL_BIG_ENDIAN */ + } +} + +/*---------------------------------------------------------------------- + f l 1 6 b i t D o c S e t S i n g l e S h i f t + + Set 'count' bytes of M+ DiskOnChip with none shifted address bus +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocSetSingleShift ( volatile FLByte FAR0 * win , FLWord offset , + FLWord count , FLByte val) +{ + volatile FLDword FAR0 * swin = ((volatile FLDword FAR0 *)win)+ (offset>>1); + register int i; + register FLDword tmpVal = (FLDword)val * 0x01010101L; + + for (i = 0; i < (int)count; i+=2) + FLWRITE_IO_DWORD(tmpVal,swin); +} + + +/**************************************************************/ +/* 16-Bit DiskOnChip - Single Shift - Only 8 bits are valid */ +/**************************************************************/ + +/*---------------------------------------------------------------------- + f l 1 6 b i t D o c R e a d S i n g l e S h i f t I g n o r e H i g h e r 8 B i t s + + Note : offset must be 16-bits aligned. + + Read 'count' bytes from M+ DiskOnChip connected with all 16 data bits, but + in interleave-1 mode , therefore only one of the 8 bits contains actual data. + The DiskOnChip is connected without an address shift. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocReadSingleShiftIgnoreHigher8bits(volatile FLByte FAR0 * win, FLWord offset, FLByte FAR1 * dest, FLWord count ) +{ + volatile FLDword FAR0* swin = ((volatile FLDword FAR0 *)win)+ (offset>>1); + register int i; + + + for (i = 0; i < (int)count; i++) + { +#ifdef FL_BIG_ENDIAN + dest[i] = (FLByte)(FLREAD_IO_DWORD(swin+i)>>24); +#else + dest[i] = (FLByte)FLREAD_IO_DWORD(swin+i); +#endif /* FL_BIG_ENDIAN */ + } +} + +/*---------------------------------------------------------------------- + f l 1 6 D o c W r i t e S i n g l e S h i f t I g n o r e H i g h e r 8 b i t s + + Note : offset must be 16-bits aligned. + + Write 'count' bytes to M+ DiskOnChip connected with all 16 data bits, but + in interleave-1 mode , therefore only one of the 8bits contains actual data. + The DiskOnChip is connected without an address shift. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocWriteSingleShiftIgnoreHigher8bits ( volatile FLByte FAR0 * win , FLWord offset , + FLByte FAR1 * src, FLWord count ) +{ + volatile FLDword FAR0 * swin = ((volatile FLDword FAR0 *)win)+ (offset>>1); + register int i; + + for (i = 0; i < (int)count; i++) + { +#ifdef FL_BIG_ENDIAN + FLWRITE_IO_DWORD(((FLDword)src[i]<<24),swin); +#else + FLWRITE_IO_DWORD(((FLDword)src[i]),swin); +#endif /* FL_BIG_ENDIAN */ + } +} + +/*---------------------------------------------------------------------- + f l 1 6 D o c S e t S i n g l e S h i f t I g n o r e H i g h e r 8 b i t s + + Note : offset must be 16-bits aligned. + + Set 'count' bytes to M+ DiskOnChip connected with all 16 data bits, but + in interleave-1 mode , therefore only one of the 8bits contains actual data. + The DiskOnChip is connected without an address shift. +------------------------------------------------------------------------*/ + +void FAR1 fl16bitDocSetSingleShiftIgnoreHigher8bits ( volatile FLByte FAR0 * win , FLWord offset , + FLWord count , FLByte val) +{ + volatile FLDword FAR0 * swin = ((volatile FLDword FAR0 *)win) + (offset>>1); + register int i; + register FLDword tmpVal = (FLDword)val * 0x01010101L; + + for (i = 0; i < (int)count; i++) + FLWRITE_IO_DWORD(tmpVal,swin); +} + + +/**********************************************************/ +/* Set proper access type routines into the proper record */ +/**********************************************************/ + +/*----------------------------------------------------------------------*/ +/* s e t B u s T y p e O f F l a s h */ +/* */ +/* Set DiskOnChip socket / flash memory access routine. */ +/* This routine must be called by the MTD prior to any access to the */ +/* DiskOnChip */ +/* */ +/* Parameters: */ +/* flflash : Pointer to sockets flash record. */ +/* access : Type of memory access routines to install */ +/* */ +/* Note: The possible type of memory access routine are comprised of: */ +/* */ +/* Address shift: */ +/* FL_NO_ADDR_SHIFT - No address shift */ +/* FL_SINGLE_ADDR_SHIFT - Single address shift */ +/* FL_DOUBLE_ADDR_SHIFT - Double address shift */ +/* */ +/* Platform bus capabilities (access width): */ +/* FL_BUS_HAS_8BIT_ACCESS - Bus can access 8-bit */ +/* FL_BUS_HAS_16BIT_ACCESS - Bus can access 16-bit */ +/* FL_BUS_HAS_32BIT_ACCESS - Bus can access 32-bit */ +/* */ +/* Number of data bits connected to the DiskOnChip (if_cfg): */ +/* FL_8BIT_DOC_ACCESS - DiskOnChip has 8 data bits */ +/* FL_16BIT_DOC_ACCESS - DiskOnChip has 16 data bits */ +/* */ +/* Flash data bits that can be accessed in a bus cycle (interleave): */ +/* FL_8BIT_FLASH_ACCESS - 8 bits of flash per cycle */ +/* FL_16BIT_FLASH_ACCESS - 16 bits of flash per cycle */ +/* */ +/* Ignore all of the above and use user defined access routines: */ +/* FL_ACCESS_USER_DEFINED - Do not install any routine since */ +/* user already installed customer made*/ +/* routines */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +FLStatus FAR1 setBusTypeOfFlash(FLFlash * flash,FLDword access) +{ + /* sanity checks here if needed */ + if(flash==NULL) + { + DBG_PRINT_ERR(FLZONE_MTD,"ERROR in setBusTypeOfFlash: Flash record passed to setBusTypeOfFlash is NULL.\r\n"); + return flBadParameter; + } + + /* check if user already defined the memory access routines */ + if ((access & FL_ACCESS_USER_DEFINED) != 0) + return flOK; + + /************************************/ + /* install requested access methods */ + /************************************/ + + switch(access & FL_XX_ADDR_SHIFT_MASK) + { + case FL_NO_ADDR_SHIFT: + + flash->memWindowSize = flDocMemWinSizeNoShift; + switch(access & FL_XX_DATA_BITS_MASK) + { + case FL_8BIT_DOC_ACCESS: /* if_cfg set to 8-bits */ + + /* Make sure bus supports 8 bit access */ + if((access & FL_BUS_HAS_8BIT_ACCESS) == 0) + { + DBG_PRINT_WRN(FLZONE_MTD,"Warning: TrueFFS requires 8-bit access to DiskOnChip memory window\r\n"); + DBG_PRINT_WRN(FLZONE_MTD," for 8-bit DiskOnChip connected with no address shift.\r\n"); + return flBadParameter; + } + + flash->memWrite8bit = flWrite8bitUsing8bitsNoShift; + flash->memRead8bit = flRead8bitUsing8bitsNoShift; + flash->memRead16bit = flRead16bitUsing8bitsNoShift; + flash->memWrite16bit = flWrite16bitUsing8bitsNoShift; + flash->memRead = fl8bitDocReadNoShift; + flash->memWrite = fl8bitDocWriteNoShift; + flash->memSet = fl8bitDocSetNoShift; + break; + + case FL_16BIT_DOC_ACCESS: /* if_cfg set to 16-bits (Plus family) */ + + /* Make sure bus supports 16 bit access */ + if((access & FL_BUS_HAS_16BIT_ACCESS) == 0) + { + DBG_PRINT_WRN(FLZONE_MTD,"Warning: TrueFFS requires 16-bit access to DiskOnChip memory window\r\n"); + DBG_PRINT_WRN(FLZONE_MTD," for 16-bit DiskOnChip connected with no address shift.\r\n"); + return flBadParameter; + } + + flash->memWrite8bit = flWrite8bitUsing16bitsNoShift; + flash->memRead8bit = flRead8bitUsing16bitsNoShift; + flash->memRead16bit = flRead16bitUsing16bitsNoShift; + flash->memWrite16bit = flWrite16bitUsing16bitsNoShift; + + switch(access & FL_XX_FLASH_ACCESS_MASK) /* Interleave */ + { + case FL_8BIT_FLASH_ACCESS: /* Interleave - 1 */ + flash->memRead = fl16bitDocReadNoShiftIgnoreHigher8bits; + flash->memWrite = fl16bitDocWriteNoShiftIgnoreHigher8bits; + flash->memSet = fl16bitDocSetNoShiftIgnoreHigher8bits; + break; + case FL_16BIT_FLASH_ACCESS: /* Interleave - 2 */ + flash->memRead = fl16bitDocReadNoShift; + flash->memWrite = fl16bitDocWriteNoShift; + flash->memSet = fl16bitDocSetNoShift; + break; + default: + DBG_PRINT_ERR(FLZONE_MTD,"ERROR in setBusTypeOfFlash: TrueFFS does not support this flash access type (setBusTypeOfFlash).\r\n"); + return flBadParameter; + } + break; + + default: + DBG_PRINT_ERR(FLZONE_MTD,"ERROR in setBusTypeOfFlash: TrueFFS does not support this number of DiskOnChip data bits (setBusTypeOfFlash).\r\n"); + return flBadParameter; + } + break; + + case FL_SINGLE_ADDR_SHIFT: + + /* Install memory window size routine */ + flash->memWindowSize = flDocMemWinSizeSingleShift; + switch(access & FL_XX_DATA_BITS_MASK) + { + case FL_8BIT_DOC_ACCESS: /* if_cfg set to 8bits (or none plus family) */ + + /* Make sure bus supports 16 bit access */ + if((access & FL_BUS_HAS_16BIT_ACCESS) == 0) + { + DBG_PRINT_WRN(FLZONE_MTD,"Warning: TrueFFS requires 16-bit access to DiskOnChip memory window\r\n"); + DBG_PRINT_WRN(FLZONE_MTD," for 8-bit DiskOnChip connected with a single address shift.\r\n"); + return flBadParameter; + } + + flash->memWrite8bit = flWrite8bitUsing16bitsSingleShift; + flash->memRead8bit = flRead8bitUsing16bitsSingleShift; + flash->memWrite16bit = flWrite16bitUsing16bitsSingleShift; + flash->memRead16bit = flRead16bitUsing16bitsSingleShift; + flash->memRead = fl8bitDocReadSingleShift; + flash->memWrite = fl8bitDocWriteSingleShift; + flash->memSet = fl8bitDocSetSingleShift; + break; + + case FL_16BIT_DOC_ACCESS: /* if_cfg set to 16bits */ + + /* Make sure bus supports 32 bit access */ + if((access & FL_BUS_HAS_32BIT_ACCESS) == 0) + { + DBG_PRINT_WRN(FLZONE_MTD,"Warning: TrueFFS requires 32-bit access to DiskOnChip memory window\r\n"); + DBG_PRINT_WRN(FLZONE_MTD," for 16-bit DiskOnChip connected with a single address shift.\r\n"); + return flBadParameter; + } + + flash->memWrite8bit = flWrite8bitUsing32bitsSingleShift; + flash->memRead8bit = flRead8bitUsing32bitsSingleShift; + flash->memRead16bit = flRead16bitUsing32bitsSingleShift; + flash->memWrite16bit = flWrite16bitUsing32bitsSingleShift; + + switch(access & FL_XX_FLASH_ACCESS_MASK) /* Interleave */ + { + case FL_8BIT_FLASH_ACCESS: /* Interleave - 1 */ + flash->memRead = fl16bitDocReadSingleShiftIgnoreHigher8bits; + flash->memWrite = fl16bitDocWriteSingleShiftIgnoreHigher8bits; + flash->memSet = fl16bitDocSetSingleShiftIgnoreHigher8bits; + break; + case FL_16BIT_FLASH_ACCESS: /* Interleave - 2 */ + flash->memRead = fl16bitDocReadSingleShift; + flash->memWrite = fl16bitDocWriteSingleShift; + flash->memSet = fl16bitDocSetSingleShift; + break; + default: + DBG_PRINT_ERR(FLZONE_MTD,"ERROR in setBusTypeOfFlash: TrueFFS does not support this flash access type (setBusTypeOfFlash).\r\n"); + return flBadParameter; + } + break; + + default: + DBG_PRINT_ERR(FLZONE_MTD,"ERROR in setBusTypeOfFlash: TrueFFS does not support this number of DiskOnChip data bits (setBusTypeOfFlash).\r\n"); + return flBadParameter; + } + break; + + case FL_DOUBLE_ADDR_SHIFT: + + /* Install memory window size routine */ + flash->memWindowSize = flDocMemWinSizeDoubleShift; + switch(access & FL_XX_DATA_BITS_MASK) + { + case FL_8BIT_DOC_ACCESS: /* if_cfg set to 8bits or none plus family */ + + /* Make sure bus supports 32 bit access */ + if((access & FL_BUS_HAS_32BIT_ACCESS) == 0) + { + DBG_PRINT_WRN(FLZONE_MTD,"Warning: TrueFFS requires 32-bit access to DiskOnChip memory window\r\n"); + DBG_PRINT_WRN(FLZONE_MTD," for 8-bit DiskOnChip connected with a double address shift.\r\n"); + return flBadParameter; + } + + flash->memWrite8bit = flWrite8bitUsing32bitsDoubleShift; + flash->memRead8bit = flRead8bitUsing32bitsDoubleShift; + flash->memWrite16bit = flWrite16bitUsing32bitsDoubleShift; + flash->memRead16bit = flRead16bitUsing32bitsDoubleShift; + flash->memRead = fl8bitDocReadDoubleShift; + flash->memWrite = fl8bitDocWriteDoubleShift; + flash->memSet = fl8bitDocSetDoubleShift; + break; + + default: + DBG_PRINT_ERR(FLZONE_MTD,"ERROR in setBusTypeOfFlash: TrueFFS does not support this number of DiskOnChip data bits\r\n"); + DBG_PRINT_ERR(FLZONE_MTD," when connected with a double address shift (setBusTypeOfFlash).\r\n"); + return flBadParameter; + } + break; + + default: + DBG_PRINT_ERR(FLZONE_MTD,"ERROR in setBusTypeOfFlash: TrueFFS does not support this kind of address shifting (setBusTypeOfFlash).\r\n"); + return flBadParameter; + } + + /* Store access type in flash record */ + flash->busAccessType = access; + return flOK; +} + +#endif /* FL_NO_USE_FUNC */ + + + + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docsys.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docsys.h new file mode 100755 index 00000000..00f46100 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/docsys.h @@ -0,0 +1,88 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/bddoc/src/docsys.h-arc $ + * + * Rev 1.5 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.4 Sep 11 2006 13:45:18 yaniv.iarovici + * Legal header added + * + * Rev 1.3 Aug 09 2006 16:52:46 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +/************************************************************************/ +/* I M P O R T A N T */ +/* */ +/* The file contains DiskOnChip memory access routines and macros */ +/* defintions. */ +/* */ +/* In order to use the complete set of TrueFFS memory access routine */ +/* that allows runtime configuration of each socket access type make */ +/* sure the FL_NO_USE_FUNC is not defined in FLCUSTOM.H. */ +/* */ +/* If you know the exact configuration of your application you can */ +/* uncomment the FL_NO_USE_FUNC definition and set the proper access */ +/* type using the macroe defintion bellow. */ +/************************************************************************/ + +#ifndef DOCSYS_H +#define DOCSYS_H + + +#ifndef FL_NO_USE_FUNC + +/* (public) types of DiskOnChip access configurations */ + +#define FL_BUS_HAS_XX_ACCESS_MASK 0x0000000FL /* Bus can access mask */ + +#define FL_XX_ADDR_SHIFT_MASK 0x000000F0L /* Address shift mask */ + +#endif /* FL_NO_USE_FUNC */ + +#include "_docsys.h" + +#endif /* DOCSYS_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dosformt.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dosformt.h new file mode 100755 index 00000000..0bc1aea9 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/dosformt.h @@ -0,0 +1,443 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/dosformt.h-arc $ + * + * Rev 1.12 Oct 22 2007 11:34:50 einat.avidan + * update copyrights header + * + * Rev 1.11 Feb 28 2007 09:53:46 einat.avidan + * No change + * + * Rev 1.10.1.0 Nov 12 2006 09:47:10 Yaniv.Iarovici + * Added FAT 32 support. + * + * Rev 1.10 Sep 11 2006 13:45:18 yaniv.iarovici + * Legal header added + * + * Rev 1.9 Aug 09 2006 16:52:48 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#ifndef DOSFORMT_H +#define DOSFORMT_H + +#include "flbase.h" +#include "fltl.h" + + +#define DRIVE_NUMBER 0x80 +#define EXTENDED_BOOT_SIGNATURE 0x29 +#define BACKUP_OF_BOOT_SECTOR 6 +#define FSI_LEADING_SIGNATURE 0x41615252 +#define FSI_STRUCTURE_SIGNATURE 0x61417272 + +#ifndef FL_ROOT_DIR_ENTRIES +#define FL_ROOT_DIR_ENTRIES 512 +#endif /* FL_ROOT_DIR_ENTRIES */ + + +/* The BIOS parameter block (a part of the boot sector) */ +/* Note that this is NOT the customary definition of the BPB */ +/* (customary is to start it on 'bytesPerSector'). To avoid the */ +/* nuisance of a structure that starts at an odd offset, we add */ +/* the first 11 bytes of the boot sector here. */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + +#ifdef FL_WINDOWS_PACKING +#pragma pack(push, 1) +#endif /* FL_WINDOWS_PACKING */ + + +#else /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +#endif /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +typedef struct +{ + FLDword size; + FLByte clusterSize; +}DiskParamsTable; + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + +typedef FL_PACKED_STRUCTURES_BEFORE struct FL_PACKED_STRUCTURES_AFTER { + BPB bpb; + FLByte physicalDriveNo; + FLSByte reserved0; + FLSByte extendedBootSignature; + FLSByte volumeId[4]; + FLSByte volumeLabel[11]; + FLSByte systemId[8]; + FLSByte bootstrap[448]; + LEushort signature; +} DOSBootSector; +typedef FL_PACKED_STRUCTURES_BEFORE struct FL_PACKED_STRUCTURES_AFTER { + BPB bpb; + LEulong FAT32Size; + LEushort extFlags; + LEushort FSVer; + LEulong RootClus; + LEushort FSInfo; + LEushort bckUpBootSect; + FLByte reserved[12]; + FLByte physicalDriveNo; + FLSByte reserved0; + FLSByte extendedBootSignature; + FLSByte volumeId[4]; + FLSByte volumeLabel[11]; + FLSByte systemId[8]; + FLSByte bootstrap[420]; + LEushort signature; +} FAT32BootSector; + +typedef FL_PACKED_STRUCTURES_BEFORE struct FL_PACKED_STRUCTURES_AFTER { + LEulong FSI_LeadSig; + FLByte FSI_Reserved1[480]; + LEulong FSI_StructSig; + LEulong FSI_Free_Count; + LEulong FSI_Nxt_Free; + FLByte FSI_Reserved2[14]; + LEushort signature; +}FAT32FSInfo; +#else /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +#define FL_DOSBOOTSECTOR_BPB_OFFSET 0 /* size 36 */ +#define FL_DOSBOOTSECTOR_PHYSICAL_DRIVE_NO_OFFSET 36 /* size 1 */ +#define FL_DOSBOOTSECTOR_RESERVED0_OFFSET 37 /* size 1 */ +#define FL_DOSBOOTSECTOR_EXTENDED_BOOT_SIGNATURE_OFFSET 38 /* size 1 */ +#define FL_DOSBOOTSECTOR_VOLUME_ID_OFFSET 39 /* size 4, array */ +#define FL_DOSBOOTSECTOR_VOLUME_LABEL_OFFSET 43 /* size 11, array */ +#define FL_DOSBOOTSECTOR_SYSTEM_ID_OFFSET 54 /* size 8, array */ +#define FL_DOSBOOTSECTOR_BOOTSTRAP_OFFSET 62 /* size 448, array */ +#define FL_DOSBOOTSECTOR_SIGNATURE_OFFSET 510 /* size 2 */ +#define FL_DOSBOOTSECTOR_SIZE 512 + +#define FL_FAT32BOOTSECTOR_BPB_OFFSET 0 /* size 36 */ +#define FL_FAT32BOOTSECTOR_FAT32SIZE_OFFSET 36 /* size 4 */ +#define FL_FAT32BOOTSECTOR_EXTFLAGS_OFFSET 40 /* size 2 */ +#define FL_FAT32BOOTSECTOR_FSVER_OFFSET 42 /* size 2 */ +#define FL_FAT32BOOTSECTOR_ROOTCLUSTER_OFFSET 44 /* size 4 */ +#define FL_FAT32BOOTSECTOR_FSINFO_OFFSET 48 /* size 2 */ +#define FL_FAT32BOOTSECTOR_BCKUPBOOTSECT_OFFSET 50 /* size 2*/ +#define FL_FAT32BOOTSECTOR_RESERVED_OFFSET 52 /* size 12, array */ +#define FL_FAT32BOOTSECTOR_PHYDRIVENO_OFFSET 64 /* size 1 */ +#define FL_FAT32BOOTSECTOR_RESERVED0_OFFSET 65 /* size 1*/ +#define FL_FAT32BOOTSECTOR_EXTSIGNATURE_OFFSET 66 /* size 1 */ +#define FL_FAT32BOOTSECTOR_VOLUMEID_OFFSET 67 /* size 4, array */ +#define FL_FAT32BOOTSECTOR_VOLUMELABEL_OFFSET 71 /* size 11, array */ +#define FL_FAT32BOOTSECTOR_SYSTEMID_OFFSET 82 /* size 8 */ +#define FL_FAT32BOOTSECTOR_BOOTSTRAP_OFFSET 90 /* size 420, array */ +#define FL_FAT32BOOTSECTOR_SIGNATURE_OFFSET 510 /* size 2 */ +#define FL_FAT32BOOTSECTOR_SIZE 512 + + + +#define FL_FAT32_FSINFO_LEADSIGNATURE_OFFSET 0 /* size 4*/ +#define FL_FAT32_FSINFO_RESERVED1_OFFSET 4 /* size 480, array*/ +#define FL_FAT32_FSINFO_STRUCTSIGNATURE_OFFSET 484 /* size 4*/ +#define FL_FAT32_FSINFO_FREECOUNT_OFFSET 488 /* size 4*/ +#define FL_FAT32_FSINFO_NEXTFREE_OFFSET 492 /* size 4*/ +#define FL_FAT32_FSINFO_RESERVED2_OFFSET 496 /* size 4*/ +#define FL_FAT32_FSINFO_SIGNATURE_OFFSET 510 /* size 14, array*/ +#define FL_FAT32_FSINFO_SIZE 512 + +typedef FLByte DOSBootSector[FL_DOSBOOTSECTOR_SIZE]; +typedef FLByte FAT32BootSector[FL_FAT32BOOTSECTOR_SIZE]; +typedef FLByte FAT32FSInfo[FL_FAT32_FSINFO_SIZE]; +#endif /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + + + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + +typedef FL_PACKED_STRUCTURES_BEFORE struct FL_PACKED_STRUCTURES_AFTER { + FLByte orderNum; /* 6 significant bits of LFN order number */ + Unaligned name1[5]; /* part 1 of scattered name */ + FLByte attributes; /* file attributes, must be RO, System, Hidden, Volume */ + FLByte reserved; /* must be 0 */ + FLByte checksum; /* checksum created from short form name */ + LEushort name2[6]; /* part 2 of scattered name */ + LEushort startingCluster; /* must be 0 */ + LEushort name3[2]; /* part 3 of scattered name */ +} LfnDirectoryEntry; +#else /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +#define FL_LFN_DIRECTORY_ENTRY_ORDER_NUM_OFFSET 0 /* size 1 */ +#define FL_LFN_DIRECTORY_ENTRY_NAME1_OFFSET 1 /* size 10, unaligned array of 2 */ +#define FL_LFN_DIRECTORY_ENTRY_ATTRIBUTES_OFFSET 11 /* size 1 */ +#define FL_LFN_DIRECTORY_ENTRY_RESERVED_OFFSET 12 /* size 1 */ +#define FL_LFN_DIRECTORY_ENTRY_CHECKSUM_OFFSET 13 /* size 1 */ +#define FL_LFN_DIRECTORY_ENTRY_NAME2_OFFSET 14 /* size 12, array of 2 */ +#define FL_LFN_DIRECTORY_ENTRY_STARTING_CLUSTER_OFFSET 26 /* size 2 */ +#define FL_LFN_DIRECTORY_ENTRY_NAME3_OFFSET 28 /* size 4, array of 2 */ +#define FL_LFN_DIRECTORY_ENTRY_SIZE 32 + +typedef FLByte LfnDirectoryEntry[FL_LFN_DIRECTORY_ENTRY_SIZE]; +#endif /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +/* Directory entry attribute bits */ + + + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + +typedef FL_PACKED_STRUCTURES_BEFORE struct FL_PACKED_STRUCTURES_AFTER { + /* First partition entry starts here. We do not map it as a */ + /* separate structure because it is not longword aligned */ + FLByte activeFlag; /* 80h = bootable */ + FLByte startingHead; + LEushort startingCylinderSector; + FLSByte type; + FLByte endingHead; + LEushort endingCylinderSector; + Unaligned4 startingSectorOfPartition; + Unaligned4 sectorsInPartition; + /* Partition entries 2,3 and 4 are structured as the 1st partition */ +} Partition; +#else /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +#define FL_PARTITION_ACTIVE_FLAG_OFFSET 0 /* size 1 */ +#define FL_PARTITION_STARTING_HEAD_OFFSET 1 /* size 1 */ +#define FL_PARTITION_STARTING_CYLINDER_SECTOR_OFFSET 2 /* size 2 */ +#define FL_PARTITION_TYPE_OFFSET 4 /* size 1 */ +#define FL_PARTITION_ENDING_HEAD_OFFSET 5 /* size 1 */ +#define FL_PARTITION_ENDING_CYLINDER_SECTOR_OFFSET 6 /* size 2 */ +#define FL_PARTITION_STARTING_SECTOR_OF_PARTITION_OFFSET 8 /* size 4 */ +#define FL_PARTITION_SECTORS_IN_PARTITION_OFFSET 12 /* size 4 */ +#define FL_PARTITION_SIZE 16 + +typedef FLByte Partition[FL_PARTITION_SIZE]; +#endif /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + +typedef FL_PACKED_STRUCTURES_BEFORE struct FL_PACKED_STRUCTURES_AFTER { + FLSByte reserved1[0x1A6]; + Unaligned4 passwordInfo[3]; /* M-Systems proprietary */ + FLSByte reserved2[0xC]; /* NT4 or NT5 signature place */ + + /* First partition entry starts here. We do not map it as a */ + /* separate structure because it is not longword aligned */ + Partition ptEntry[4]; + LEushort signature; /* = PARTITION_SIGNATURE */ +} PartitionTable; +#else /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +#define FL_PARTITION_TABLE_RESERVED1_OFFSET 0 /* size 0x1A6 */ +#define FL_PARTITION_TABLE_PASSWORD_INFO_OFFSET 422 /* size 12, unaligned array of 4 */ +#define FL_PARTITION_TABLE_RESERVED2_OFFSET 434 /* size 12, array */ +#define FL_PARTITION_TABLE_PT_ENTRY_OFFSET 446 /* size 4x16, array of partition entries */ +#define FL_PARTITION_TABLE_SIGNATURE_OFFSET 510 /* size 2 */ +#define FL_PARTITION_TABLE_SIZE 512 + +typedef FLByte PartitionTable[FL_PARTITION_TABLE_SIZE]; +#endif /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + +#ifdef FL_WINDOWS_PACKING +#pragma pack(pop) +#endif /* FL_WINDOWS_PACKING */ + +#endif /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + +#define PARTITION_ENTRIES 4 + + +/** Values of irFlags for flOpenFile: */ + +#define ACCESS_MODE_MASK 3 /* Mask for access mode bits */ + +/* Individual flags */ + +#define FL_ACCESS_CREATE 2 /* Create new file */ + +/* commands to flGetSetFileInfo (in addition to above) */ +#define FL_GET_DATETIME -1 /* Get date/time */ +#define FL_GET_ATTRIBUTES -2 /* Get attributes */ +#define FL_GET_CREATE_DATETIME -8 /* Get creation date/time */ + + +#ifndef LFN_NAME_MAX_CHARACTERS +#define LFN_NAME_MAX_CHARACTERS 255 +#endif /* LFN_NAME_MAX_CHARACTERS */ + +#ifndef PATH_SEGMENTS_MAX_NUM +#define PATH_SEGMENTS_MAX_NUM 10 +#endif /* PATH_SEGMENTS_MAX_NUM */ + +#ifndef PATH_CHARACTERS_MAX_NUM +#define PATH_CHARACTERS_MAX_NUM LFN_NAME_MAX_CHARACTERS +#endif /* PATH_CHARACTERS_MAX_NUM */ + +#ifndef FL_MAX_TREE_LEVELS +#define FL_MAX_TREE_LEVELS ( PATH_CHARACTERS_MAX_NUM / 2 + 1 ) +#endif /* FL_MAX_TREE_LEVELS */ + +#ifndef FL_ROOT_DIR_ENTRIES +#define FL_ROOT_DIR_ENTRIES(socket,partition) 512 +#endif /* FL_ROOT_DIR_ENTRIES */ + +#define UNICODE_CHAR_PER_LFN_ENTRY 13 + +#define SHORT_NAME_MAX_LENGTH 8 +#define EXTENSION_MAX_LENGTH 3 +#define NAME_8_3_MAX_LENGTH 12 /* "tttttttt.xxx" */ + +/* Directory entry attribute bits for internal use */ +#define ATTR_SUREFS_GEN_ATTENTION_FLAG 0x40 +#define ATTR_SUREFS_REN_ATTENTION_FLAG 0x80 +#define ATTR_SUREFS_ATTENTION_FLAG_MASK (ATTR_SUREFS_GEN_ATTENTION_FLAG | \ + ATTR_SUREFS_REN_ATTENTION_FLAG) + +#define ATTR_MASK ((unsigned char)(FL_ATTR_READ_ONLY | FL_ATTR_HIDDEN | FL_ATTR_SYSTEM | \ + FL_ATTR_VOL_LABEL | FL_ATTR_DIRECTORY | FL_ATTR_ARCHIVE)) +#define LFN_ATTRIBUTES ((unsigned char)(FL_ATTR_READ_ONLY | FL_ATTR_HIDDEN | \ + FL_ATTR_SYSTEM | FL_ATTR_VOL_LABEL)) + +#define DIRECTORY_ENTRY_SIZE 32 + +#define DIRECTORY_ENTRIES_PER_SECTOR (FL_SECTOR_SIZE / DIRECTORY_ENTRY_SIZE) +#define MAX_ROOT_DIR_SECTORS ((0x10000/DIRECTORY_ENTRIES_PER_SECTOR) - 1) + +#ifdef FS_EXP_FAT32 +/* setting this to 0xffffffff may improve performance * + * setting this to 0x0fffffff improves compatibility */ +#define FAT32_ENTRY_BITS_COMP 0x0fffffff +#endif /*FS_EXP_FAT32*/ + +#define SET_GLOBAL_ATTENTION_FLAG 0 +#ifdef FS_EXP_FAT32 +#define RESET_GLOBAL_ATTENTION_FLAG 0x0fffffff +#else /*FS_EXP_FAT32*/ +#define RESET_GLOBAL_ATTENTION_FLAG 0xffff +#endif /*FS_EXP_FAT32*/ +#define GLOBAL_ATT_FLAG_FAT_ENTRY 1 + +#define NEVER_USED_DIR_ENTRY 0 + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED +#define DELETED_DIR_ENTRY ((FLSByte) 0xe5) +#else /*FL_NO_PACKED_STRUCTS_SUPPORTED*/ +#define DELETED_DIR_ENTRY ((FLByte) 0xe5) +#endif /*FL_NO_PACKED_STRUCTS_SUPPORTED*/ + +/* FAT definitions */ + +#define FAT_FREE 0 +#define FAT_BAD_CLUSTER 0xfff7 +#ifdef FS_EXP_FAT32 +#define FAT_LAST_CLUSTER 0x0fffffff /* FAT16 values are converted */ +#else /*FS_EXP_FAT32*/ +#define FAT_LAST_CLUSTER 0xffff /* actually any of 0xfff8-0xffff */ +#endif /*FS_EXP_FAT32*/ + +/* Partition table definitions */ + +#define PARTITION_SIGNATURE 0xaa55 + +#define CYLINDER_SECTOR(cylinder,sector) ((sector) + ((cylinder & 0xff) << 8) + ((cylinder & 0x300) >> 2)) + + +#ifndef FL_MAX_PARTITION_DEPTH +#define FL_MAX_PARTITION_DEPTH 0x08 +#endif /* FL_MAX_PARTITION_DEPTH */ + +#define LFN_SHORT_NAME 0 /* for 8.3 short file name */ +#define LFN_LONG_NAME 1 /* for long file name */ +#define LFN_INVALID_SET 2 /* found invalid file name characters */ +#define SFN_LOWERCASE_NAME8 0x08 /* these 2 bit-flags are to support */ +#define SFN_LOWERCASE_EXT3 0x10 /* NT VFAT lowercase bits */ + +/*------------------------------------------------------------------------------------------- +* F L P a t h S e g m e n t +* The structure is used when analyzing path string. +* Parameters: name - address of first character of the path segment (unicode null terminated +* string. For example, for first segment of /first/second/third.ext it +* will point on "first". +* length - number of characters of the path segment +* buffSize - in case of retrieving file name this field contains size of supplied buffer +* in characters. +* get - if TRUE, this structure is used to retrieve found file name +* (getFirstFileName()). If FALSE, this structure contains file name to +* be opened/created/found (findFileName()). +*------------------------------------------------------------------------------------------*/ +typedef struct { + FLWchar FAR1 *name; + short length; + short buffSize; + FLBoolean get; + FLBoolean reserved; +} FLPathSegment; + +/*-------------------------------------------------------------------------- +* F L L f n S e a r c h +* The FLLfnSearch structer is used when searching directory by specified +* file name. +* Parameters: +* neverUsed - indicates that found at least one directory entry in sector +* that was never used. +* verifiedChars - Number of characters that successfully compared with +* file name or found in free entries in previous sector +* checksum - LFN checksum found in previous sector +* lastNum - LFN order number of last LFN entry found in previous sector +* idx - directory entry index of found entry +* status - LFN_SHORT_NAME, LFN_LONG_NAME, LFN_UPPERCASE_FOR_SHORT, +* LFN_INVALID_SET +*---------------------------------------------------------------------------*/ +typedef struct { + unsigned verifiedChars; + unsigned lastNum; + unsigned idx; + int status; + unsigned char checksum; + FLBoolean neverUsed; +} FLLfnSearch; + + + +#endif /* DOSFORMT_H */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/extfiltr.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/extfiltr.c new file mode 100755 index 00000000..e87d5f1d --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/extfiltr.c @@ -0,0 +1,717 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.4 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.4. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + +#include "tffsdrv.h" + + +#ifndef TFFS_DEBUG_EXTFILTER +# undef TFFS_DEBUG_DRIVER +#endif + +/* min: 0x40000 == sect>>9 == 256 blocks/group * 1024 bytes/block +typical: 0x800000 == sect>>15 == 8192 blocks/group * 1024 bytes/block +default: 0x100000 == sect>>12 == 1M */ +# define TFFS_EXTF_CACHE_STEP 12 + +#define EXTF_CACHE_MASK ((1<= 256, <= 8*blocksize */ +/* all offsets of SB/GD are including first empty block, block bitmap doesn't */ + +#ifdef TFFS_USE_RAM +# include "tffsram.h" +#else +# include "blockdev.h" +#endif + +static unsigned char pTmp[512]; + +#ifdef TFFS_DEBUG_DRIVER +static unsigned long dwSearches=0,dwSteps=0; +#endif + +unsigned char ExtReadSector(DeviceInfo*pDevice,unsigned long dwSector,unsigned char*p); +unsigned char ExtDelSector(DeviceInfo*pDevice,unsigned long dwSector,unsigned char bSectors); + +void AddSect(DeviceInfo*pDevice,SectInfo*pSect); +SectInfo*DelSect(DeviceInfo*pDevice,SectInfo*pSect); + +void CacheSect(DeviceInfo*pDevice,SectInfo*pSect); +void UncacheSect(DeviceInfo*pDevice,SectInfo*pSect); + +#define PTChanged(pSect,pData) 1 +void AddPT(DeviceInfo*pDevice,SectInfo*pSect,unsigned char*pBuff); +void DelPT(DeviceInfo*pDevice,SectInfo*pPT); + +#ifdef TFFS_DEBUG_DRIVER +unsigned char SBChanged(SectInfo*pSect,struct ext2_super_block*pSB) +{ + if(le32_to_cpu(pSB->s_log_block_size) != pSect->bSect2BlockShift-1) + { + PrintkDebug("SBChanged: s_log_block_size different: %d -> %d",(int)pSect->bSect2BlockShift-1,(int)pSB->s_log_block_size); + return 1; + } + if(le32_to_cpu(pSB->s_blocks_per_group) != pSect->dwBlocksPerBitmap) + { + PrintkDebug("SBChanged: s_blocks_per_group different: %d -> %d",(int)pSect->dwBlocksPerBitmap,(int)pSB->s_blocks_per_group); + return 1; + } + if(pSB->s_feature_compat != pSect->dwExt3Flags) + { + PrintkDebug("SBChanged: s_feature_compat different: %d -> %d",(int)pSect->dwExt3Flags,(int)pSB->s_feature_compat); + return 1; + } + PrintkDebug("SBChanged: not changed"); + return 0; +} +#else +# define SBChanged(pSect,pSB) ( ( le32_to_cpu((pSB)->s_log_block_size) != (pSect)->bSect2BlockShift-1 ) || ( le32_to_cpu((pSB)->s_blocks_per_group) != (pSect)->dwBlocksPerBitmap ) || ((pSB)->s_feature_compat!=(pSect)->dwExt3Flags)) +#endif + +void AddSB(DeviceInfo*pDevice,SectInfo*pSect,struct ext2_super_block*pSB); +void DelSB(DeviceInfo*pDevice,SectInfo*pPart); + +void AddGD(DeviceInfo*pDevice,SectInfo*pSect,struct ext2_group_desc*pGD,unsigned char bOffset); +void ProcessBB(DeviceInfo*pDevice,SectInfo*pSect,unsigned char*pOld,unsigned char*pNew,unsigned char bOffset); + +#ifdef TFFS_DEBUG_DRIVER + +void PrintSect(SectInfo*pSect,char*p) +{ + char*str; + switch(pSect->bFlag) + { + case EXTF_PT: + str="PT empty"; + break; + case EXTF_HAS_PT: + str="PT"; + break; + case EXTF_SB: + str="SB empty"; + break; + case EXTF_HAS_SB: + str="SB"; + break; + case EXTF_HAS_GD: + str="SB&GD"; + break; + case EXTF_BB: + str="BB not adjusted"; + break; + case EXTF_HAS_BB: + str="BB"; + break; + case 0: + str="last sect"; + break; + default: + str="BAD FLAG"; + } + PrintkDebug("%s: %s part %d sect %lu len %u flag %d",p,str,pSect->no,pSect->dwSector,pSect->bSectors,pSect->bFlag); +} + +void PrintAllSect(DeviceInfo*pDevice) +{ + SectInfo*pSect=&pDevice->sect[0]; + do{ + PrintSect(pSect,"LIST"); + pSect=pSect->pNext; + }while(pSect!=&pDevice->sect[0]); +} + +void Printp(unsigned char*p) +{ + int i,k; + for(i=0;i<32;i++) + { + for(k=0;k<16;k++) + printk("%2x ",*(p+((i<<4)+k))); + printk("\n"); + } +} + +#else +# define PrintAllSect(pDevice) +# define PrintSect(pSect,p) +# define Printp(p) +#endif + +void ExtFilter(DeviceInfo*pDevice,unsigned char*pBuff,unsigned long dwSector,unsigned long dwSectors) +{ + SectInfo*pSect=pDevice->pCache[dwSector>>TFFS_EXTF_CACHE_STEP]; + unsigned long dwSect=dwSector; + + PrintkDebug("ExtFilter: dev %d sec 0x%lx + 0x%lx",pDevice->diskNo,dwSector,dwSectors); + + while(dwSect=pSect->dwSector+pSect->bSectors) + pSect=pSect->pNext; + + if(dwSect>=pSect->dwSector+pSect->bSectors || dwSect+dwSectors<=pSect->dwSector) + return; + + if(dwSectdwSector) + dwSect=pSect->dwSector; + + PrintkDebug("ExtFilter: sec 0x%lx",dwSect); + +/* PrintkDebug("ExtFilter sec %lu + %lu: found %lu of %lu + %d",dwSector,dwSectors,dwSect,pSect->dwSector,pSect->bSectors); */ +/* PrintSect(pSect,"ExtFilter: found"); */ + + pData=pBuff+((dwSect-dwSector)<<9); + + switch(pSect->bFlag) + { + case EXTF_PT: + PrintkDebug("ExtFilter: EXTF_PT"); + AddPT(pDevice,pSect,pData); + dwSect=pSect->pNext->dwSector; + break; + case EXTF_HAS_PT: + PrintkDebug("ExtFilter: EXTF_HAS_PT"); + if(PTChanged(pSect,pData)) + { + DelPT(pDevice,pSect); + AddPT(pDevice,pSect,pData); + } + dwSect=pSect->pNext->dwSector; + break; + case EXTF_SB: + PrintkDebug("ExtFilter: EXTF_SB"); + AddSB(pDevice,pSect,(struct ext2_super_block*)pData); + dwSect++; + break; + case EXTF_HAS_SB: + PrintkDebug("ExtFilter: EXTF_HAS_SB"); + if(dwSect==pSect->dwSector) /* SB changed */ + { + if(SBChanged(pSect,(struct ext2_super_block*)pData)) + AddSB(pDevice,pSect,(struct ext2_super_block*)pData); + dwSect+=2; + } + else + { + if(dwSect>=pSect->dwSector+(pSect->bSect2BlockShift==3?6:2)) /* GD added */ + { + AddGD(pDevice,pSect,(struct ext2_group_desc*)pData,dwSect-(pSect->dwSector+(pSect->bSect2BlockShift==3?6:2))); + } + dwSect++; + } + break; + case EXTF_HAS_GD: /* ignore GD changes */ + PrintkDebug("ExtFilter: EXTF_HAS_GD"); + if(SBChanged(pSect,(struct ext2_super_block*)pData)) + { + DelSB(pDevice,pSect); + AddSB(pDevice,pSect,(struct ext2_super_block*)pData); + } + dwSect=pSect->pNext->dwSector; + break; + case EXTF_BB: + PrintkDebug("ExtFilter: EXTF_BB"); + /* do nothing */ + dwSect=pSect->pNext->dwSector; + break; + return; + case EXTF_HAS_BB: + PrintkDebug("ExtFilter: EXTF_HAS_BB"); + if(ExtReadSector(pDevice,dwSect,pTmp)) + ProcessBB(pDevice,pSect,pTmp,pData,dwSect-pSect->dwSector); + dwSect++; + break; +#ifdef TFFS_DEBUG_DRIVER + default: + PrintkDebug("ExtFilter: wrong case %d",pSect->bFlag); + dwSect++; +#endif + } + } + PrintkDebug("ExtFilter:exit"); +} + +void ExtFilterInit(DeviceInfo*pDevice) +{ + unsigned short wCache,wCacheSize; + + PrintkDebug("ExtFilterInit"); + + /* init first and last sectors */ + pDevice->sect[0].dwSector=0; + pDevice->sect[0].bSectors=1; + pDevice->sect[0].pParent=NULL; + pDevice->sect[0].pPrev=pDevice->sect[0].pNext=&pDevice->sect[1]; + pDevice->sect[0].bFlag=EXTF_PT; + pDevice->sect[0].dwOffset=0; + pDevice->sect[1].dwSector=0xffffffff; + pDevice->sect[1].bSectors=0; + pDevice->sect[1].pParent=NULL; + pDevice->sect[1].pPrev=pDevice->sect[1].pNext=&pDevice->sect[0]; + pDevice->sect[1].bFlag=0; + pDevice->sect[1].dwOffset=0; +#ifdef TFFS_DEBUG_DRIVER + pDevice->sect[0].no=0; + pDevice->sect[1].no=0; +#endif + + /* init hash */ + wCacheSize=(pDevice->dwSize >> TFFS_EXTF_CACHE_STEP) + 1; + PrintkDebug("ExtFilterInit: cache len %u",wCacheSize); + pDevice->pCache=KMalloc(sizeof(SectInfo*)*wCacheSize); + if(pDevice->pCache==NULL) + return; + pDevice->pCache[0]=&pDevice->sect[0]; + for(wCache=1;wCachepCache[wCache]=&pDevice->sect[1]; + + ExtReadSector(pDevice,0,pTmp); + AddPT(pDevice,&pDevice->sect[0],pTmp); + + PrintAllSect(pDevice); +} + +void ExtFilterRelease(DeviceInfo*pDevice) +{ + PrintkDebug("ExtFilterRelease: %lu times, %lu steps, average %lu",dwSearches,dwSteps,(dwSearches!=0)?dwSteps/dwSearches:0); + PrintAllSect(pDevice); + DelPT(pDevice,&pDevice->sect[0]); + if(pDevice->pCache!=NULL) + { + kfree(pDevice->pCache); + pDevice->pCache=NULL; + } +} + +void AddPT(DeviceInfo*pDevice,SectInfo*pSect,unsigned char*pBuff) +{ + SectInfo*pPT=pSect; + unsigned char*pPTData,*pPartData; + + pPTData=KMalloc(1024); + if(pPTData==NULL) + return; + memcpy(pPTData,pBuff,512); + pPartData=pPTData+512; + + while(pPT!=NULL) + { + unsigned char bPart; + SectInfo*pNextPT=NULL; + + PrintkDebug("AddPT %d",pPT->no); + + if(pPTData[510]!=0x55 || pPTData[511]!=0xaa) + { + PrintkDebug("AddPT %d: no signature",pPT->no); + pPT->bFlag=EXTF_PT; + return; + } + PrintkDebug("AddPT %d: signature found",pPT->no); + pPT->bFlag=EXTF_HAS_PT; + + for(bPart=0;bPart<4;bPart++) + { + SectInfo*pPart; + unsigned char*pData=pPTData+(446+bPart*16); + + if(*(pData+4)==0) + { + PrintkDebug("AddPT %d: empty partition %d",pPT->no,bPart); + continue; + } + + pPart=KMalloc(sizeof(SectInfo)); + if(pPart==NULL) + return; + memset(pPart,0,sizeof(SectInfo)); + + pPart->pParent=pPT; + + pPart->dwSector=*(pData+11); + pPart->dwSector<<=8; + pPart->dwSector+=*(pData+10); + pPart->dwSector<<=8; + pPart->dwSector+=*(pData+9); + pPart->dwSector<<=8; + pPart->dwSector+=*(pData+8); + + #ifdef TFFS_DEBUG_DRIVER + if(pPT->no==0) + pPart->no=bPart+1; + else + if(pPT->no<4) + pPart->no=5; + else + pPart->no=pPT->no+1; + #endif + + switch(*(pData+4)) + { + case 5: + case 0xf: + case 0x85: + /* extended partition */ + pPart->dwSector+=pPart->pParent->dwOffset; + pNextPT=pPart; /* save next extended partition */ + pPart->bSectors=1; /* partition table */ + pPart->bFlag=EXTF_PT; + pPart->dwOffset=pPT->dwOffset; + if(pPart->dwOffset==0) + pPart->dwOffset=pPart->dwSector; + AddSect(pDevice,pPart); + break; + default: + /* data partition */ + pPart->dwSector+=pPart->pParent->dwSector+2; /* offset from PT + superblock */ + pPart->bSectors=1; /* only first sector of superblock */ + pPart->bFlag=EXTF_SB; + AddSect(pDevice,pPart); + + /* add superblock */ + PrintkDebug("AddPT %d: read sector %lu for SB",pPart->no,pPart->dwSector); + ExtReadSector(pDevice,pPart->dwSector,pPartData); + AddSB(pDevice,pPart,(struct ext2_super_block*)pPartData); + + /* add group descriptors */ + if(pPart->bFlag&EXTF_HAS_SB) + { + unsigned short wGroup; + for(wGroup=0;wGroupwGroups;wGroup+=16) + { + PrintkDebug("AddPT %d: read sector %lu for GD",pPT->no,pPart->dwSector+2+(wGroup>>4)); + ExtReadSector(pDevice,pPart->dwSector+(pPart->bSect2BlockShift==3?6:2)+(wGroup>>4),pPartData); + AddGD(pDevice,pPart,(struct ext2_group_desc*)pPartData,(wGroup>>4)); + } + } + } + + PrintkDebug("AddPT: part %d added, %lu",pPart->no,pPart->dwSector); + } + pPT=pNextPT; + if(pPT!=NULL) + { + PrintkDebug("AddPT %d: read sector %lu for next PT",pPT->no,pPT->dwSector); + ExtReadSector(pDevice,pPT->dwSector,pPTData); + } + } + + kfree(pPTData); +} + +void DelPT(DeviceInfo*pDevice,SectInfo*pPT) +{ + SectInfo*pCurPT=pPT; + + while(pCurPT!=NULL) + { + SectInfo*pCurSect=pCurPT->pNext,*pNextPT=NULL;; + PrintkDebug("DelPT: part %d",pCurPT->no); + while(pCurSect!=pCurPT) + { + if(pCurSect->pParent==pCurPT) + { + PrintkDebug("DelPT: part %d flag %d",pCurSect->no,pCurSect->bFlag); + switch(pCurSect->bFlag) + { + case EXTF_PT: + case EXTF_SB: + pCurSect=DelSect(pDevice,pCurSect); + break; + case EXTF_HAS_PT: + pNextPT=pCurSect; /* save next PT */ + pCurSect=pCurSect->pNext; + break; + case EXTF_HAS_SB: + case EXTF_HAS_GD: + DelSB(pDevice,pCurSect); + pCurSect=DelSect(pDevice,pCurSect); + break; +#ifdef TFFS_DEBUG_DRIVER + default: + PrintkDebug("DelPT: wrong case"); +#endif + } + } + else + pCurSect=pCurSect->pNext; + } + if(pCurPT!=pPT) + DelSect(pDevice,pCurPT); + pCurPT=pNextPT; + } + pPT->bFlag=EXTF_PT; +} + +void AddSB(DeviceInfo*pDevice,SectInfo*pSect,struct ext2_super_block*pSB) +{ + unsigned short wGroup; + SectInfo*pBBSect; + + PrintkDebug("AddSB %d: sector %lu",pSect->no,pSect->dwSector); + /* check that is superblock */ + if( (le16_to_cpu(pSB->s_magic)!=0xef53) || (le32_to_cpu(pSB->s_creator_os)!=0) || (le32_to_cpu(pSB->s_rev_level)!=0 && le32_to_cpu(pSB->s_rev_level)!=1) ) + { + PrintkDebug("AddSB: no superblock: magic 0x%x os %d, rev %d",le16_to_cpu(pSB->s_magic),le32_to_cpu(pSB->s_creator_os),le32_to_cpu(pSB->s_rev_level)); + pSect->bFlag=EXTF_SB; + return; + } + pSect->bFlag=EXTF_HAS_SB; + + pSect->dwExt3Flags=pSB->s_feature_compat; + pSect->bSect2BlockShift=le32_to_cpu(pSB->s_log_block_size)+1; + pSect->dwBlocksPerBitmap=le32_to_cpu(pSB->s_blocks_per_group); + + /* calc no of groups */ + pSect->wGroups=(le32_to_cpu(pSB->s_blocks_count)-le32_to_cpu(pSB->s_first_data_block))/le32_to_cpu(pSB->s_blocks_per_group); + if(pSect->wGroups*le32_to_cpu(pSB->s_blocks_per_group) < le32_to_cpu(pSB->s_blocks_count)-le32_to_cpu(pSB->s_first_data_block)) + pSect->wGroups++; + PrintkDebug("AddSB %d: %u groups",pSect->no,pSect->wGroups); + + pSect->bSectors=pSect->wGroups>>4; + if(((unsigned short)pSect->bSectors)<<4 < pSect->wGroups) + pSect->bSectors++; + pSect->bSectors+=pSect->bSect2BlockShift==3?6:2; /* group descriptors sectors + 2 or 6 sect. of superblock */ + + pBBSect=KMalloc(pSect->wGroups*sizeof(SectInfo)); + if(pBBSect==NULL) + { + PrintkDebug("AddSB: kmalloc failed"); + return; + } + memset(pBBSect,0,pSect->wGroups*sizeof(SectInfo)); + pSect->bFlag=EXTF_HAS_SB; + for(wGroup=0;wGroupwGroups;wGroup++,pBBSect++) + { + pBBSect->pParent=pSect; + pBBSect->bFlag=EXTF_BB; + pBBSect->dwSector=pSect->dwSector+wGroup*((le32_to_cpu(pSB->s_blocks_per_group))<bSect2BlockShift)+1; /* the value shoul be updated in AddGD */ +#ifdef TFFS_DEBUG_DRIVER + pBBSect->no=pSect->no; +#endif + + if(wGroupwGroups-1) + { + pBBSect->dwBlocksPerBitmap=le32_to_cpu(pSB->s_blocks_per_group); + } + else /* last group */ + { + pBBSect->dwBlocksPerBitmap=le32_to_cpu(pSB->s_blocks_count)-le32_to_cpu(pSB->s_first_data_block)-le32_to_cpu(pSB->s_blocks_per_group)*(pSect->wGroups-1); + } + pBBSect->bSectors=pBBSect->dwBlocksPerBitmap>>12; + if( ((pBBSect->dwBlocksPerBitmap>>12)<<12) != pBBSect->dwBlocksPerBitmap) + pBBSect->bSectors++; + + pBBSect->dwFirstSectorOfBitmap=pSect->dwSector-2+((le32_to_cpu(pSB->s_first_data_block)+le32_to_cpu(pSB->s_blocks_per_group)*wGroup)<bSect2BlockShift); + + AddSect(pDevice,pBBSect); + } + PrintkDebug("SB %d added: sector %lu sectors %u",pSect->no,pSect->dwSector,pSect->bSectors); +} + +void DelSB(DeviceInfo*pDevice,SectInfo*pPart) +{ + SectInfo*pTmp=pPart->pNext; + + PrintkDebug("DelSB part %d",pPart->no); + + while(pTmp->bFlag&EXTF_HAS_BB || pTmp->bFlag&EXTF_BB) + { + UncacheSect(pDevice,pTmp); + pTmp=pTmp->pNext; + } + kfree(pPart->pNext); + pPart->pNext=pTmp; + pPart->bFlag=EXTF_SB; +} + + +void AddGD(DeviceInfo*pDevice,SectInfo*pSect,struct ext2_group_desc*pGD,unsigned char bOffset) +{ + unsigned short wGroup,wGroups; + SectInfo*pCurSect=pSect->pNext; + + PrintkDebug("AddGD: part %d offset %u",pSect->no,bOffset); + + wGroups=(((unsigned short)bOffset)<<4); + while(wGroups) + { + pCurSect=pCurSect->pNext; + wGroups--; + } + wGroups=pSect->wGroups-(((unsigned short)bOffset)<<4); + if(wGroups>16) + wGroups=16; + + for(wGroup=0;wGrouppNext) + { + UncacheSect(pDevice,pCurSect); + pCurSect->dwSector=((unsigned long)le32_to_cpu(pGD[wGroup].bg_block_bitmap)<bSect2BlockShift)+pSect->dwSector-2; + CacheSect(pDevice,pCurSect); + pCurSect->bFlag=EXTF_HAS_BB; + PrintkDebug("AddGD: added group %d (%d) sect %lu",wGroup,wGroup+(bOffset<<4),pCurSect->dwSector); + PrintkDebug("AddGD: 0x%lx 0x%x 0x%lx",(unsigned long)le32_to_cpu(pGD[wGroup].bg_block_bitmap),pSect->bSect2BlockShift,pSect->dwSector); + } + + /* set EXTF_HAS_GD flag to the parent sector, if it's last GD sector */ + if(((bOffset+1)<<4)>=pSect->wGroups) + { + PrintkDebug("AddGD: end group descriptors"); + pSect->bFlag=EXTF_HAS_GD; + pSect->bSectors=1; + } +} + +void ProcessBB(DeviceInfo*pDevice,SectInfo*pSect,unsigned char*pOld,unsigned char*pNew,unsigned char bOffset) +{ + unsigned long dwSectorShift=pSect->dwFirstSectorOfBitmap+(((unsigned long)bOffset)<<(pSect->pParent->bSect2BlockShift+12)); + unsigned short wBlock; + unsigned short wLastBlockInSector=pSect->dwBlocksPerBitmap-(((unsigned short)bOffset)<<12); + + /* PrintkDebug("ProcessBB %d: %lu",pSect->no,pSect->dwSector); */ + + for(wBlock=0;wBlock>5],n=((unsigned long*)pNew)[wBlock>>5]; + if(o!=n) + { + unsigned char b; + + for(b=0;b<32 && wBlock+b (n&(1L<pParent->bSect2BlockShift)+dwSectorShift,1<pParent->bSect2BlockShift); + } + } + } +} + +unsigned char ExtReadSector(DeviceInfo*pDevice,unsigned long dwSector,unsigned char*p) +{ + IOreq ioreq; + + ioreq.irHandle=pDevice->bHandle; + ioreq.irData=p; + ioreq.irLength=dwSector; + ioreq.irCount=1; + + if(flAbsRead(&ioreq)==flOK) + return 1; + else + { + PrintkDebug("ExtReadSector->flAbsRead error"); + return 0; + } +} + +unsigned char ExtDelSector(DeviceInfo*pDevice,unsigned long dwSector,unsigned char bSectors) +{ + IOreq ioreq; + + PrintkDebug("ExtDelSector: del %lu %u",dwSector,bSectors); + + ioreq.irHandle=pDevice->bHandle; + ioreq.irLength=dwSector; + ioreq.irCount=bSectors; +#ifdef DRIVER_DEBUG + if(dwSector>=pDevice->dwSize) + PrintkDebug("ExtDelSector: achtung: wrong sector 0x%lx of 0x%lx",dwSector,pDevice->dwSize); +#endif + if(flAbsDelete(&ioreq)!=flOK) + { + PrintkDebug("ExtDelSector:flAbsDelete fails"); + return 0; + } + return 1; +} + +void AddSect(DeviceInfo*pDevice,SectInfo*pSect) +{ + SectInfo*pCurSect=&pDevice->sect[1]; + +/* PrintSect(pSect,"AddSect"); */ + + while(pCurSect->pNext!=&pDevice->sect[1] && pCurSect->pNext->dwSectordwSector) + pCurSect=pCurSect->pNext; + pSect->pNext=pCurSect->pNext; + pSect->pPrev=pCurSect; + pCurSect->pNext->pPrev=pSect; + pCurSect->pNext=pSect; + CacheSect(pDevice,pSect); +} + +SectInfo*DelSect(DeviceInfo*pDevice,SectInfo*pSect) +{ + SectInfo*p=pSect->pNext; + + PrintkDebug("DelSect: %lu flag 0x%x",pSect->dwSector,pSect->bFlag); + + UncacheSect(pDevice,pSect); + pSect->pPrev->pNext=pSect->pNext; + pSect->pNext->pPrev=pSect->pPrev; + kfree(pSect); + return p; +} + +void CacheSect(DeviceInfo*pDevice,SectInfo*pSect) +{ + unsigned short wCache=pSect->dwSector>>TFFS_EXTF_CACHE_STEP; + +/* PrintkDebug("CacheSect %lu to %lu",pSect->dwSector,pSect->dwSector>>TFFS_EXTF_CACHE_STEP); */ + + while(pDevice->pCache[wCache]==pSect->pNext) + { +/* PrintkDebug("CacheSect: pCache[%u]=%lu",wCache,pSect->dwSector); */ + pDevice->pCache[wCache]=pSect; + wCache--; + } +} + +void UncacheSect(DeviceInfo*pDevice,SectInfo*pSect) +{ + unsigned short wCache=pSect->dwSector>>TFFS_EXTF_CACHE_STEP; + +/* PrintkDebug("UncacheSect %lu to %lu",pSect->dwSector,pSect->dwSector>>TFFS_EXTF_CACHE_STEP); */ + + while(pDevice->pCache[wCache]==pSect) + { +/* PrintkDebug("UncacheSect: pCache[%u]=%lu",wCache,pSect->pNext->dwSector); */ + pDevice->pCache[wCache]=pSect->pNext; + wCache--; + } +} + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/extfiltr.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/extfiltr.h new file mode 100755 index 00000000..3dd6182d --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/extfiltr.h @@ -0,0 +1,43 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.4 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.4. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + +#ifndef __EXTFILTR__H__ +#define __EXTFILTR__H__ + +void ExtFilterInit(DeviceInfo*pDevice); +void ExtFilterRelease(DeviceInfo*pDevice); +void ExtFilter(DeviceInfo*pDevice,unsigned char*pBuff,unsigned long dwSector,unsigned long dwSectors); + +#endif /* __EXTFILTR__H__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fatfilt.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fatfilt.c new file mode 100755 index 00000000..e3958683 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fatfilt.c @@ -0,0 +1,1949 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/bddoc/src/fatfilt.c-arc $ + * + * Rev 1.10 Oct 22 2007 11:34:52 einat.avidan + * update copyrights header + * + * Rev 1.9 Feb 28 2007 09:53:46 einat.avidan + * No change + * + * Rev 1.8.1.1 Sep 11 2006 13:45:20 yaniv.iarovici + * Legal header added + * + * Rev 1.8.1.0 Aug 08 2006 15:55:28 Polina.Marimont + * DOC Driver 1.0 initial + */ + +/******************************************************************************* + * * + * * + * Module: FATFILT * + * * + * This module implements installable FAT12/16 filters. It supports up to * + * SOCKETS sockets, with up to FL_MAX_TL_PARTITIONS disks per socket. * + * Each disk can contain up to FL_MAX_PARTS_PER_DISK partitions on it, with * + * maximum depth of partition nesting in extended partitions equal to * + * MAX_PARTITION_DEPTH. * + * * + * In order for this module to work, disks must be abs.mounted rather then * + * mounted. In latter case, this module won't detect any of disk's * + * partitions, and won't install FAT filters. * + * * + * This module uses more then 512 bytes of stack space in case if MALLOC is * + * not enabled. * + * * + *******************************************************************************/ + +/* + * Includes + */ + +#include "fatfilt.h" +#include "blockdev.h" +#include "defs.h" + + +#if defined(FL_ABS_READ_WRITE) && !defined(FL_READ_ONLY) + + + +/* + * Module configuration + */ + +#define FL_INCLUDE_FAT_MONITOR /* undefine it to remove FAT filter code */ +#undef FL_INCLUDE_FAT32 /* define after support for FAT32 is added */ +#define FL_DEL_SECTOR_SETS /* undefine to delete single cluster at a time */ +#undef FL_DEL_SECTOR_STATS /* gather sector deletion statistics */ + + + +/* + * Defines + */ + +/* extract pointer to user's buffer from IOreq */ + +#ifdef SCATTER_GATHER +#define FLBUF(ioreq,i) (*((FLSByte FAR1 **)((ioreq)->irData) + (int)(i))) +#else +#define FLBUF(ioreq,i) ((FLSByte FAR1 *)(ioreq->irData) + (FL_SECTOR_SIZE * ((int)(i)))) +#endif + +/* extract socket# and disk# from TFFS handle */ + +#define H2S(handle) (((int)(handle)) & 0xf) +#define H2D(handle) ((((int)(handle)) >> 4) & 0xf) + +/* construct TFFS handle from socket# and disk# */ + +#define SD2H(socNo,diskNo) ((int)((((diskNo) & 0xf) << 4) | ((socNo) & 0xf))) + +/* unformatted ("raw") disk partition */ + +#define FL_RAW_PART (-1) + + + +/* + * Global vars + */ + +#ifdef FL_DEL_SECTOR_SETS +FLBoolean del_sect_sets = TRUE; /* try to delete sectors in larger sets */ +#endif + + + + +/* + * Local routines + */ + +static FLStatus reset (void); +static FLStatus discardDisk (int handle); +static FLStatus newDisk (int handle); +static FLStatus parseDisk (int handle); +static FLStatus discardDiskParts (FLffDisk *pd); +static FLStatus addDiskPart (FLffDisk *pd, int partNo); +static FLStatus addNewDiskPart (FLffDisk *pd); +static FLBoolean isPartTableWrite (FLffDisk *pd, IOreq FAR2 *ioreq); +static FLStatus isExtPartPresent (FLSByte FAR1 *buf, SectorNo *nextExtPartSec); +static FLBoolean isBPBchanged (FLffVol *pv, FLSByte FAR1 *buf); + + +#ifdef FL_INCLUDE_FAT_MONITOR + +static FLStatus partEnableFF (FLffVol* pv); +static FLStatus partFreeDelClusters (FLffVol *pv, SectorNo secNo, + FLSByte FAR1 *newFAT, IOreq *ioreq_delete); + +#endif + + + + +/* + * Local data + */ + +/* module reset flag */ + +static FLBoolean resetDone = FALSE; + +/* disks (BDTL partitions in OSAK terminology) */ + +static FLffDisk* ffDisk[FL_SOCKETS][FL_MAX_TL_PARTITIONS] = { { NULL } }; + + +#ifndef FL_MALLOC + +/* + * WARNING: Large static arrays ! + * + * sizeof(ffAllDisks[x][y]) is 64 bytes. + * sizeof(ffAllParts[x][y][z]) is 40 bytes. + * + */ + +static FLffDisk ffAllDisks[FL_SOCKETS][FL_MAX_TL_PARTITIONS]; +static FLffVol ffAllParts[FL_SOCKETS][FL_MAX_TL_PARTITIONS][FL_MAX_PARTS_PER_DISK]; + +#endif /* FL_MALLOC */ + +static const FLSByte zeroes[FL_SECTOR_SIZE] = {0}; + +#if (defined(FL_DEL_SECTOR_SETS) && defined(FL_DEL_SECTOR_STATS)) +static FLDword del_sect_stats[16] = {0}; /* sector deletion statistics */ +#endif + + + + +/* --------------------------------------------------------------------------- * + * * + * d i s c a r d D i s k P a r t s * + * * + * Discard all the partition info (if any) associated with particular disk. * + * * + * Parameters: * + * pd : disk (BDTL volume) * + * * + * Returns: * + * Always flOK. * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus discardDiskParts ( FLffDisk * pd ) +{ + register int i; + + if (pd != NULL) { + + for (i = 0; i < FL_MAX_PARTS_PER_DISK; i++) { + +#ifdef FL_MALLOC + + if (pd->part[i] != NULL) { + + FL_FREE(pd->part[i]); + } +#endif + + pd->part[i] = NULL; + } + + pd->parts = 0; + } + + return flOK; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * a d d D i s k P a r t * + * * + * If there is partition record #partNo associated with the disk, discard * + * this info. Attach new partition record #partNo. * + * * + * Parameters: * + * pd : disk (BDTL volume) * + * partNo : partition (0 ... FL_MAX_PARTS_PER_DISK-1) * + * * + * Returns: * + * flOK if success, otherwise respective error code * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus addDiskPart ( FLffDisk * pd, + int partNo ) +{ + FLffVol * pv; + FLStatus status; + int socNo, diskNo; + + /* arg. sanity check */ + + if ((pd == NULL) || (partNo >= FL_MAX_PARTS_PER_DISK)) + return flBadDriveHandle; + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(pd->handle); + diskNo = H2D(pd->handle); + + if ((socNo >= FL_SOCKETS) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; + + status = flNotEnoughMemory; + +#ifdef FL_MALLOC + pv = (FLffVol *)FL_MALLOC( sizeof(FLffVol) ); +#else + pv = &ffAllParts[socNo][diskNo][partNo]; +#endif + + if (pv != NULL) { + + /* initialize fields in struct FLffDisk to safe values */ + + pv->handle = pd->handle; + pv->type = FL_RAW_PART; + pv->flags = 0; + pv->ffEnabled = FALSE; /* turn off FAT minitor */ + pv->sectors = (SectorNo) 0; + pv->firstFATsecNo = (SectorNo) -1; /* none */ + pv->lastFATsecNo = pv->firstFATsecNo; /* none */ + pv->firstDataSecNo = (SectorNo) 0; + pv->clusterSize = (unsigned) 0; + +#ifdef FL_MALLOC + if( pd->part[partNo] != NULL ) { + + FL_FREE(pd->part[partNo]); + pd->part[partNo] = NULL; + } +#endif + pd->part[partNo] = pv; + + status = flOK; + } + + return status; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * a d d N e w D i s k P a r t * + * * + * Add one more partition record to the disk. * + * * + * Parameters: * + * pd : disk (BDTL volume) * + * * + * Returns: * + * flOK if success, otherwise respective error code * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus addNewDiskPart ( FLffDisk * pd ) +{ + if (pd->parts < FL_MAX_PARTS_PER_DISK) { + + checkStatus( addDiskPart (pd, pd->parts) ); + pd->parts++; + } + + return flOK; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * d i s c a r d D i s k * + * * + * Remove disk record (with all the associated partition records). * + * * + * Parameters: * + * handle : TFFS handle * + * * + * Returns: * + * flOK if success, otherwise respective error code * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus discardDisk ( int handle ) +{ + int socNo, diskNo; + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(handle); + diskNo = H2D(handle); + + if ((socNo >= FL_SOCKETS) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; + + if( ffDisk[socNo][diskNo] != NULL ) { + + /* discard associated partition info */ + + (void) discardDiskParts( ffDisk[socNo][diskNo] ); + +#ifdef FL_MALLOC + + /* release disk's scratch buffer */ + + if( (ffDisk[socNo][diskNo])->buf != NULL) { + + FL_FREE( (ffDisk[socNo][diskNo])->buf ); + (ffDisk[socNo][diskNo])->buf = NULL; + } + + FL_FREE( ffDisk[socNo][diskNo] ); +#endif + + ffDisk[socNo][diskNo] = NULL; + } + + return flOK; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * n e w D i s k * + * * + * Discard existing disk record (if any), and create new one. * + * * + * Parameters: * + * handle : TFFS handle * + * * + * Returns: * + * flOK if success, otherwise respective error code * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus newDisk ( int handle ) +{ + int socNo, diskNo; + int i; + FLffDisk * pd; + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(handle); + diskNo = H2D(handle); + + if ((socNo >= FL_SOCKETS) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; + + /* discard current disk and associated partition info (if any) */ + + checkStatus( discardDisk(handle) ); + +#ifdef FL_MALLOC + + pd = (FLffDisk *) FL_MALLOC( sizeof(FLffDisk) ); + + if (pd == NULL) + return flNotEnoughMemory; + + /* allocate and attach disk's scratch buffer */ + + pd->buf = (FLSByte *)FL_MALLOC( FL_SECTOR_SIZE ); + + if (pd->buf == NULL) { + + FL_FREE (pd); + pd = NULL; + return flNotEnoughMemory; + } + +#else /* !FL_MALLOC */ + + pd = &ffAllDisks[socNo][diskNo]; + +#endif /* FL_MALLOC */ + + + pd->handle = handle; + pd->ffstate = flStateNotInitialized; + + /* don't know partition layout yet */ + + pd->parts = 0; + for (i = 0; i < FL_MAX_PARTS_PER_DISK; i++) + pd->part[i] = NULL; + + /* watch Master Boot Record for update */ + + pd->secToWatch = (SectorNo) 0; + + ffDisk[socNo][diskNo] = pd; + + return flOK; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * i s P a r t T a b l e W r i t e * + * * + * Check if any of the sectors specified by 'ioreq' points to Master Boot * + * Record or next extended partition in the extended partitions list. * + * * + * Parameters: * + * pd : pointer to disk structure * + * ioreq : standard I/O request * + * * + * Returns: * + * TRUE if write to MBR or extended partition list is detected, otherwise * + * FALSE * + * * + * --------------------------------------------------------------------------- */ + +static FLBoolean isPartTableWrite ( FLffDisk * pd, + IOreq FAR2 * ioreq ) +{ + register FLSDword i; + + if (pd != NULL) { + + for (i = (FLSDword)0; i < ioreq->irSectorCount; i++) { + + if( (ioreq->irSectorNo + i) == (FLSDword)pd->secToWatch ) + return TRUE; + } + } + + return FALSE; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * i s E x t P a r t P r e s e n t * + * * + * Check if extended partition persent in the partition table. If it is, * + * calculate the sector # where next partition table will be written to. * + * * + * Parameters: * + * buf : partition table * + * nextExtPartSec : sector where next partition table will be written to * + * * + * Returns: * + * flOK on success, otherwise error code * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus isExtPartPresent ( FLSByte FAR1 * buf, + SectorNo * nextExtPartSec ) +{ + Partition FAR1 * p; + register int i; + + /* does it look like partition table ? */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + if (LE2(((PartitionTable FAR1 *) buf)->signature) != PARTITION_SIGNATURE) +#else + if (FL_GET_LE2(buf, FL_PARTITION_TABLE_SIGNATURE_OFFSET) != PARTITION_SIGNATURE) +#endif + return flBadFormat; + + /* if extended. part. present, get sector# that will contain next part. in list */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + p = &( ((PartitionTable FAR1 *) buf)->ptEntry[0] ); +#else + p = (Partition *) &FL_REF_1(buf, FL_PARTITION_TABLE_PT_ENTRY_OFFSET ); +#endif + + for (i = 0; i < FL_PART_TBL_ENTRIES; i++) { + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + if (p->type == EX_PARTIT) { + *nextExtPartSec = (SectorNo) UNAL4( p[i].startingSectorOfPartition ); +#else + if (FL_REF_1(p, FL_PARTITION_TYPE_OFFSET) == EX_PARTIT) { + *nextExtPartSec = (SectorNo) FL_GET_UNAL4(p, i* FL_PARTITION_SIZE + FL_PARTITION_STARTING_SECTOR_OF_PARTITION_OFFSET ); +#endif + return flOK; + } + } + + /* no extended partition found */ + + return flFileNotFound; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * i s B P B c h a n g e d * + * * + * Check if critical fields in partition's boot sector have been changed. * + * * + * Parameters: * + * pv : disk partition (filesystem volume) * + * buf : new contents of partition's boot sector * + * * + * Returns: * + * TRUE if critical fields in BPB have been changed, otherwise FALSE * + * * + * --------------------------------------------------------------------------- */ + +static FLBoolean isBPBchanged ( FLffVol * pv, FLSByte FAR1 * buf ) +{ + BPB FAR1 * bpb; + SectorNo sectors; + SectorNo firstFATsecNo; + SectorNo lastFATsecNo; + SectorNo rootDirSecNo; + SectorNo rootDirSectors; + SectorNo sectorsPerFAT; + SectorNo firstDataSecNo; + + /* if FAT monitor already inactive on this partition, do nothing and return */ + + if (pv->ffEnabled == FALSE) + return FALSE; + + /* we only handle 512-byte sectors */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + bpb = &( ((DOSBootSector FAR1 *) buf)->bpb ); + + if( UNAL2(bpb->bytesPerSector) != FL_SECTOR_SIZE ) + return TRUE; + + /* check if 'number of sectors in partition' has been changed */ + + sectors = UNAL2( bpb->totalSectorsInVolumeDOS3 ); + + if (sectors == (SectorNo)0) + sectors = (SectorNo) LE4( bpb->totalSectorsInVolume ); +#else + bpb = (BPB FAR1 *) buf; + + if( FL_GET_UNAL2(bpb, FL_BPB_BYTES_PER_SECTOR_OFFSET) != FL_SECTOR_SIZE ) + return TRUE; + + /* check if 'number of sectors in partition' has been changed */ + + sectors = FL_GET_UNAL2(bpb, FL_BPB_TOTAL_SECTORS_IN_VOL_DOS3_OFFSET ); + + if (sectors == (SectorNo)0) + sectors = (SectorNo) FL_GET_LE4(bpb, FL_BPB_TOTAL_SECTORS_IN_VOL_OFFSET ); +#endif + + if (sectors != pv->sectors) + return TRUE; + + /* check if 'FAT's starting sector #' has been changed */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + firstFATsecNo = pv->startSecNo + (SectorNo)( LE2(bpb->reservedSectors) ); +#else + firstFATsecNo = pv->startSecNo + (SectorNo)( FL_GET_LE2(bpb, FL_BPB_RESERVED_SECTORS_OFFSET) ); +#endif + + if (firstFATsecNo != pv->firstFATsecNo) + return TRUE; + + /* check if 'FAT's ending sector #' has been changed */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + sectorsPerFAT = (SectorNo) LE2( bpb->sectorsPerFAT ); +#else + sectorsPerFAT = (SectorNo) FL_GET_LE2(bpb, FL_BPB_SECTORS_PER_FAT_OFFSET ); +#endif + + lastFATsecNo = firstFATsecNo + sectorsPerFAT - (SectorNo)1; + + if (lastFATsecNo != pv->lastFATsecNo) + return TRUE; + + /* check if 'first data sector #' has been changed */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + rootDirSecNo = firstFATsecNo + (sectorsPerFAT * bpb->noOfFATS); + + rootDirSectors = (SectorNo)1 + (SectorNo) + (((UNAL2(bpb->rootDirectoryEntries) * DIRECTORY_ENTRY_SIZE) - 1) / FL_SECTOR_SIZE); +#else + rootDirSecNo = firstFATsecNo + (sectorsPerFAT * FL_REF_1(bpb, FL_BPB_NO_OF_FATS_OFFSET)); + + rootDirSectors = (SectorNo)1 + (SectorNo) + (((FL_GET_UNAL2(bpb, FL_BPB_ROOT_DIR_ENTRIES_OFFSET) * DIRECTORY_ENTRY_SIZE) - 1) / FL_SECTOR_SIZE); +#endif + + firstDataSecNo = rootDirSecNo + rootDirSectors; + + if (firstDataSecNo != pv->firstDataSecNo) + return TRUE; + + /* check if cluster size has been changed */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + if (pv->clusterSize != bpb->sectorsPerCluster) +#else + if (pv->clusterSize != FL_REF_1(bpb, FL_BPB_SECTORS_PER_CLUSTER_OFFSET)) +#endif + return TRUE; + + return FALSE; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * r e s e t * + * * + * Resets this software module to it's initial state upon boot. * + * * + * Parameters: * + * none * + * * + * Returns: * + * flOK in case of success, otherwise respective error code * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus reset (void) +{ + int iSoc, iDisk; + + for (iSoc = 0; iSoc < FL_SOCKETS; iSoc++) { + + /* discard existing disk structures for that socket */ + + for (iDisk = 0; iDisk < FL_MAX_TL_PARTITIONS; iDisk++) + (void) discardDisk( SD2H(iSoc, iDisk) ); + + /* pre-allocate disk structure for first disk of every socket */ + + checkStatus( newDisk(SD2H(iSoc, 0)) ); + } + + resetDone = TRUE; + + return flOK; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * p a r s e D i s k * + * * + * Read partition table(s), install and enable FAT filters on all FAT12/16 * + * partitions. * + * * + * Parameters: * + * handle : TFFS handle * + * * + * Returns: * + * flOK on success, otherwise error code * + * * + * NOTE: This routine uses disk's scratch buffer. * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus parseDisk ( int handle ) +{ + int socNo, diskNo; + SectorNo extPartStartSec, sec; + int i, depth; + int type; + FLffDisk * pd; + FLffVol * pv; + Partition * pp; + IOreq ioreq; + +#ifdef FL_MALLOC + FLSByte * buf; +#else + FLSByte buf[FL_SECTOR_SIZE]; +#endif + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(handle); + diskNo = H2D(handle); + + if ((socNo >= ((int) noOfSockets)) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; + + /* if disk structure hasn't been allocated yet, do it now */ + + if (ffDisk[socNo][diskNo] == NULL) + checkStatus( newDisk(handle) ); + + pd = ffDisk[socNo][diskNo]; + +#ifdef FL_MALLOC + + /* make sure scratch buffer is available */ + + if (pd->buf == NULL) + return flBufferingError; + + buf = pd->buf; + +#endif /* FL_MALLOC */ + + /* discard obsolete disk's partition info */ + + (void) discardDiskParts (pd); + + /* read Master Boot Record */ + + ioreq.irHandle = handle; + ioreq.irSectorNo = (SectorNo) 0; + ioreq.irSectorCount = (SectorNo) 1; + ioreq.irData = (void FAR1 *) buf; + checkStatus( flAbsRead(&ioreq) ); + + /* is it MBR indeed ? */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + if (LE2(((PartitionTable *) buf)->signature) != PARTITION_SIGNATURE) +#else + if (FL_GET_LE2(buf, FL_PARTITION_TABLE_SIGNATURE_OFFSET) != PARTITION_SIGNATURE) +#endif + return flPartitionNotFound; + + /* do primary partitions only (we will do extended partitions later) */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + pp = &( ((PartitionTable *) buf)->ptEntry[0] ); +#else + pp = (Partition *) &FL_REF_1(buf, FL_PARTITION_TABLE_PT_ENTRY_OFFSET ); +#endif + + for (i = 0; i < FL_PART_TBL_ENTRIES; i++, pp++) { +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + FLByte ppType = pp->type; +#else + FLByte ppType = FL_REF_1(pp, FL_PARTITION_TYPE_OFFSET); +#endif + + if( ppType == ((FLSByte)0) ) /* skip empty slot */ + continue; + + if( ppType == ((FLSByte)EX_PARTIT) ) /* skip extended partition */ + continue; + + /* primary partition found (not necessarily FAT12/16) */ + + if( addNewDiskPart(pd) != flOK ) + break; + + pv = pd->part[pd->parts - 1]; + + /* remember partition's type, and where it starts */ + + pv->type = (int) ppType; + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + pv->startSecNo = (SectorNo) UNAL4( pp->startingSectorOfPartition ); +#else + pv->startSecNo = (SectorNo) FL_GET_UNAL4(pp, FL_PARTITION_STARTING_SECTOR_OF_PARTITION_OFFSET ); +#endif + } + + /* do extended partitions in depth */ + + for (i = 0; i < FL_PART_TBL_ENTRIES; i++) { + + /* re-read Master Boot Record */ + + ioreq.irHandle = handle; + ioreq.irSectorNo = (SectorNo) 0; + ioreq.irSectorCount = (SectorNo) 1; + ioreq.irData = (void FAR1 *) buf; + checkStatus( flAbsRead(&ioreq) ); + + /* is it MBR indeed ? */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + if (LE2(((PartitionTable *) buf)->signature) != PARTITION_SIGNATURE) +#else + if (FL_GET_LE2(buf, FL_PARTITION_TABLE_SIGNATURE_OFFSET) != PARTITION_SIGNATURE) +#endif + return flOK; + + /* pick up next extended partition in MBR */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + pp = &( ((PartitionTable *) buf)->ptEntry[i] ); + + if( pp->type == ((FLSByte)EX_PARTIT) ) { + + /* remember where extended partition starts */ + + extPartStartSec = (SectorNo) UNAL4( pp->startingSectorOfPartition ); +#else + pp = (Partition *)&FL_REF_1(buf, FL_PARTITION_TABLE_PT_ENTRY_OFFSET + FL_PARTITION_SIZE*i); + + if( FL_REF_1(pp, FL_PARTITION_TYPE_OFFSET) == ((FLSByte)EX_PARTIT) ) { + + /* remember where extended partition starts */ + + extPartStartSec = (SectorNo) FL_GET_UNAL4(pp, FL_PARTITION_STARTING_SECTOR_OF_PARTITION_OFFSET ); +#endif + + /* follow the list of partition tables */ + + sec = extPartStartSec; + + for (depth = 0; depth < FL_MAX_PARTITION_DEPTH; depth++) { + + /* read next partition table in the list */ + + ioreq.irHandle = handle; + ioreq.irSectorNo = sec; + ioreq.irSectorCount = (SectorNo) 1; + ioreq.irData = (void FAR1 *) buf; + checkStatus( flAbsRead(&ioreq) ); + + /* is it valid partition table ? */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + if (LE2(((PartitionTable *) buf)->signature) != PARTITION_SIGNATURE) +#else + if (FL_GET_LE2(buf, FL_PARTITION_TABLE_SIGNATURE_OFFSET) != PARTITION_SIGNATURE) +#endif + break; + + /* if 1st entry is zero, it's the end of part. table list */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + pp = &( ((PartitionTable *) buf)->ptEntry[0] ); + if( pp->type == ((FLSByte)0) ) +#else + pp = (Partition *) &FL_REF_1(buf, FL_PARTITION_TABLE_PT_ENTRY_OFFSET ); + if( FL_REF_1(pp, FL_PARTITION_TYPE_OFFSET) == ((FLSByte)0) ) +#endif + break; + + /* Take this partition. Remember it's type, and where it starts */ + + if( addNewDiskPart(pd) != flOK ) + break; + + pv = pd->part[pd->parts - 1]; + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + pv->type = (int) pp->type; + pv->startSecNo = + (SectorNo) UNAL4( pp->startingSectorOfPartition) + sec; +#else + pv->type = (int) FL_REF_1(pp, FL_PARTITION_TYPE_OFFSET); + pv->startSecNo = + (SectorNo) FL_GET_UNAL4(pp, FL_PARTITION_STARTING_SECTOR_OF_PARTITION_OFFSET) + sec; +#endif + + /* 2nd entry must be extended partition */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + pp = &( ((PartitionTable *) buf)->ptEntry[1] ); + if( pp->type != ((FLSByte)EX_PARTIT) ) +#else + pp = (Partition *) &FL_REF_1(buf, FL_PARTITION_TABLE_PT_ENTRY_OFFSET + FL_PARTITION_SIZE ); + if( FL_REF_1(pp, FL_PARTITION_TYPE_OFFSET) != ((FLSByte)EX_PARTIT) ) +#endif + break; + + /* sector where next part. table in the list resides */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + sec = extPartStartSec + + (SectorNo) UNAL4( pp->startingSectorOfPartition ); +#else + sec = extPartStartSec + + (SectorNo) FL_GET_UNAL4(pp, FL_PARTITION_STARTING_SECTOR_OF_PARTITION_OFFSET ); +#endif + + } /* for(depth) */ + } + } /* for(i) */ + +#ifdef FL_INCLUDE_FAT_MONITOR + + /* turn on FAT filters on FAT12/16 partition(s) */ + + if (pd->parts > 0) { + + for (i = 0; i < pd->parts; i++) { + + pv = pd->part[i]; + type = pv->type; + + /* + * WARNING : Routine partEnableFF() uses disk's scratch buffer ! + */ + + if((type == FAT12_PARTIT) || (type == FAT16_PARTIT) || (type == DOS4_PARTIT)) + partEnableFF (pv); + } + } + +#endif /* FL_INCLUDE_FAT_MONITOR */ + + /* watch for MBR (sector #0) update */ + + pd->secToWatch = (SectorNo) 0; + + pd->ffstate = flStateInitialized; + + return flOK; +} + + + + +#ifdef FL_INCLUDE_FAT_MONITOR + +/* --------------------------------------------------------------------------- * + * * + * p a r t E n a b l e F F * + * * + * Installs and enables FAT filter on partition. * + * * + * Parameters: * + * pv : disk partition (filesystem volume) * + * * + * Returns: * + * flOK on success, otherwise error code * + * * + * NOTE: This routine uses disk's scratch buffer. * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus partEnableFF ( FLffVol * pv ) +{ + int socNo, diskNo; + FLffDisk * pd; + BPB * bpb; + SectorNo sectors; + SectorNo reservedSectors; + SectorNo rootDirSecNo; + SectorNo rootDirSectors; + SectorNo sectorsPerFAT; + SectorNo rootDirEntries; + unsigned maxCluster; + int partNo; + IOreq ioreq; + +#ifdef FL_MALLOC + FLSByte * buf; +#else + FLSByte buf[FL_SECTOR_SIZE]; +#endif + + DBG_PRINT_FLOW(FLZONE_FS,"Debug: (partEnableFF) checking FAT type.\r\n"); + + /* arg. sanity check */ + + if (pv == NULL) + return flBadDriveHandle; + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(pv->handle); + diskNo = H2D(pv->handle); + + if ((socNo >= ((int) noOfSockets)) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; + + /* check if 'pv' belongs to this disk */ + + pd = ffDisk[socNo][diskNo]; + + if (pd == NULL) + return flBadDriveHandle; + + for (partNo = 0; partNo < pd->parts; partNo++) { + + if (pd->part[partNo] == pv) + break; + } + + if (partNo >= pd->parts) + return flBadDriveHandle; + +#ifdef FL_MALLOC + + /* make sure scratch buffer is available */ + + if (pd->buf == NULL) + return flBufferingError; + + buf = pd->buf; + +#endif /* FL_MALLOC */ + + /* make sure FAT filter is off on this partition */ + + pv->ffEnabled = FALSE; + + pv->firstFATsecNo = (SectorNo) -1; + pv->lastFATsecNo = pv->firstFATsecNo; + pv->clusterSize = (unsigned) 0; + + /* read BPB */ + + ioreq.irHandle = pv->handle; + ioreq.irSectorNo = pv->startSecNo; + ioreq.irSectorCount = (SectorNo) 1; + ioreq.irData = (void FAR1 *) buf; + checkStatus( flAbsRead(&ioreq) ); + + /* Does it look like DOS bootsector ? */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + + bpb = &( ((DOSBootSector *) buf)->bpb ); + + if( !((bpb->jumpInstruction[0] == 0xe9) + || + ((bpb->jumpInstruction[0] == 0xeb) && (bpb->jumpInstruction[2] == 0x90)))) { +#else + + bpb = (BPB *) buf; + + if( !((FL_REF_1(bpb, FL_BPB_JUMP_INSTRUCTION_OFFSET) == 0xe9) + || + ((FL_REF_1(bpb, FL_BPB_JUMP_INSTRUCTION_OFFSET) == 0xeb) && (FL_REF_1(bpb, FL_BPB_JUMP_INSTRUCTION_OFFSET + 2) == 0x90)))) { +#endif + return flNonFATformat; + } + + /* Do we handle this sector size ? */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + if (UNAL2(bpb->bytesPerSector) != FL_SECTOR_SIZE) +#else + if (FL_GET_UNAL2(bpb, FL_BPB_BYTES_PER_SECTOR_OFFSET) != FL_SECTOR_SIZE) +#endif + return flFormatNotSupported; + + /* + * Is it a bogus BPB (leftover from previous disk partitioning) ? + * Check that there is no overlap with next partition (if one exists). + */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + sectors = UNAL2(bpb->totalSectorsInVolumeDOS3); + + if (sectors == (SectorNo)0) + sectors = (SectorNo) LE4(bpb->totalSectorsInVolume); +#else + sectors = FL_GET_UNAL2(bpb, FL_BPB_TOTAL_SECTORS_IN_VOL_DOS3_OFFSET); + + if (sectors == (SectorNo)0) + sectors = (SectorNo) FL_GET_LE4(bpb, FL_BPB_TOTAL_SECTORS_IN_VOL_OFFSET); +#endif + + if ((partNo+1 < pd->parts) && (pd->part[partNo+1] != NULL)) { + + if( sectors > (pd->part[partNo+1])->startSecNo - pv->startSecNo ) + return flNonFATformat; + } + + /* number of sectors in partition as reported by BPB */ + + pv->sectors = sectors; + + /* get number of reserved sectors from BPB, and check it's sanity */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + reservedSectors = (SectorNo) LE2(bpb->reservedSectors); +#else + reservedSectors = (SectorNo) FL_GET_LE2(bpb, FL_BPB_RESERVED_SECTORS_OFFSET); +#endif + + switch( (int)reservedSectors ) { + + case 32: /* always the case with FAT 32 */ + +#ifndef FL_INCLUDE_FAT32 + + DBG_PRINT_FLOW(FLZONE_FS,"Debug: (partEnableFF) FAT32 detected.\r\n"); + return flFormatNotSupported; +#endif + + case 1: /* must always be the case for FAT 12 and FAT16 */ + default: + + break; + } + + /* get location and size of the first FAT copy */ + + pv->firstFATsecNo = pv->startSecNo + reservedSectors; + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + sectorsPerFAT = (SectorNo) LE2(bpb->sectorsPerFAT); +#else + sectorsPerFAT = (SectorNo) FL_GET_LE2(bpb, FL_BPB_SECTORS_PER_FAT_OFFSET); +#endif + +#ifndef FL_INCLUDE_FAT32 + + if (sectorsPerFAT == 0) { /* always the case with FAT32 */ + + DBG_PRINT_FLOW(FLZONE_FS,"Debug: (partEnableFF) FAT32 detected.\r\n"); + return flFormatNotSupported; + } + +#endif + + pv->lastFATsecNo = pv->firstFATsecNo + sectorsPerFAT - (SectorNo)1; + + /* get location and size of root directory */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + rootDirSecNo = pv->firstFATsecNo + (sectorsPerFAT * bpb->noOfFATS); + + rootDirEntries = (SectorNo) UNAL2(bpb->rootDirectoryEntries); +#else + rootDirSecNo = pv->firstFATsecNo + (sectorsPerFAT * (FL_REF_1(bpb, FL_BPB_NO_OF_FATS_OFFSET))); + + rootDirEntries = (SectorNo) FL_GET_UNAL2(bpb, FL_BPB_ROOT_DIR_ENTRIES_OFFSET); +#endif + + switch (rootDirEntries) { + +#ifndef FL_INCLUDE_FAT32 + + case 0: /* always the case with FAT32 */ + + DBG_PRINT_FLOW(FLZONE_FS,"Debug: (partEnableFF) FAT32 detected.\r\n"); + return flFormatNotSupported; +#endif + + default: + + if( ((rootDirEntries * DIRECTORY_ENTRY_SIZE) % FL_SECTOR_SIZE) != 0 ) + return flNonFATformat; + break; + } + + rootDirSectors = (SectorNo)(((rootDirEntries * DIRECTORY_ENTRY_SIZE) - 1) / FL_SECTOR_SIZE) + + (SectorNo)1; + + /* get location of data area */ + + pv->firstDataSecNo = rootDirSecNo + rootDirSectors; + + /* get size of FAT cluster in sectors, and check it's sanity */ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED + pv->clusterSize = bpb->sectorsPerCluster; +#else + pv->clusterSize = FL_REF_1(bpb, FL_BPB_SECTORS_PER_CLUSTER_OFFSET); +#endif + + switch( (int)pv->clusterSize ) { + + case 1: case 2: case 4: case 8: case 16: case 32: case 64: case 128: + break; + + default: + return flNonFATformat; + } + + if ((pv->clusterSize << FL_SECTOR_SIZE_BITS) > (32768 /*(32 * 1024)*/)) + return flFormatNotSupported; + + /* sanity check */ + + if( (pv->lastFATsecNo < pv->firstFATsecNo) || + (pv->firstDataSecNo <= pv->lastFATsecNo) || + (pv->sectors < pv->firstDataSecNo) ) + return flNonFATformat; + + + /* decide which type of FAT is it */ + + maxCluster = (unsigned)1 + (unsigned) + ((pv->sectors - (pv->firstDataSecNo - pv->startSecNo)) / pv->clusterSize); + + if (maxCluster < 4085) { + + pv->flags |= VOLUME_12BIT_FAT; /* 12-bit FAT */ + +#ifndef FS_FAT_12BIT + + DBG_PRINT_ERR(FLZONE_FS,"ERROR - FS_FAT_12BIT must be defined.\r\n"); + return flFormatNotSupported; + +#else + + DBG_PRINT_FLOW(FLZONE_FS,"Debug: (partEnableFF) FAT12 detected.\r\n"); + +#endif /* FS_FAT_12BIT */ + } + else { + + DBG_PRINT_FLOW(FLZONE_FS,"Debug: (partEnableFF) FAT16 detected.\r\n"); + } + + /* turn on FAT filter on this partition */ + + pv->ffEnabled = TRUE; + + return flOK; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * p a r t F r e e D e l C l u s t e r s * + * * + * Compare the new contents of the specified FAT sector against the old * + * one on the disk. If any freed clusters are found, issue 'sector delete' * + * calls for all sectors that are occupied by these freed clusters. * + * * + * Parameters: * + * pv : disk partition (filesystem volume) * + * secNo : abs. sector # of the FAT sector * + * newFAT : new contents of this FAT sector * + * * + * Returns: * + * flOK on success, otherwise error code * + * * + * NOTE: This routine uses disk's scratch buffer. * + * * + * --------------------------------------------------------------------------- */ + +static FLStatus partFreeDelClusters ( FLffVol * pv, + SectorNo secNo, + FLSByte FAR1 * newFAT, + IOreq * ioreq_delete ) +{ + FLffDisk * pd; + int socNo, diskNo; + FLWord oldFATentry, newFATentry; + SectorNo iSec; + unsigned firstCluster; + IOreq ioreq; + int offset; + int iPart; + +#ifdef FS_FAT_12BIT + int halfBytes; +#endif + +#ifdef FL_MALLOC + FLSByte * oldFAT; +#else + FLSByte oldFAT[FL_SECTOR_SIZE]; +#endif + + /* arg. sanity check */ + + if (pv == NULL) + return flBadDriveHandle; + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(pv->handle); + diskNo = H2D(pv->handle); + + if ((socNo >= ((int) noOfSockets)) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; + + /* check if 'pv' belongs to this disk */ + + pd = ffDisk[socNo][diskNo]; + + if (pd == NULL) + return flBadDriveHandle; + + for (iPart = 0; iPart < pd->parts; iPart++) { + + if (pd->part[iPart] == pv) + break; + } + + if (iPart >= pd->parts) + return flBadDriveHandle; + +#ifdef FL_MALLOC + + /* make sure scratch buffer is available */ + + if (pd->buf == NULL) + return flBufferingError; + + oldFAT = pd->buf; + +#endif /* FL_MALLOC */ + + /* read in the FAT sector from the disk */ + + ioreq.irHandle = pv->handle; + ioreq.irSectorNo = secNo; + ioreq.irSectorCount = 1; + ioreq.irData = (void FAR1 *) oldFAT; + checkStatus( flAbsRead(&ioreq) ); + +#ifdef FS_FAT_12BIT + + /* size of FAT entry in half-bytes */ + + halfBytes = ((pv->flags & VOLUME_12BIT_FAT) ? 3 : 4); + + /* starting cluster */ + + if (halfBytes == 3) { + + firstCluster = + ((((unsigned)(secNo - pv->firstFATsecNo)) * (2 * FL_SECTOR_SIZE)) + 2) / 3; + } + else { + + firstCluster = ((unsigned)(secNo - pv->firstFATsecNo)) * (FL_SECTOR_SIZE / 2); + } + + /* starting data sector */ + + iSec = (((SectorNo)firstCluster - 2) * pv->clusterSize) + pv->firstDataSecNo; + + offset = (firstCluster * ((unsigned) halfBytes)) & ((2 * FL_SECTOR_SIZE) - 1); + + /* + * Find if any clusters were logically deleted, and if so, delete them. + * + * NOTE: We are skipping over 12-bit FAT entries which span more than + * one sector. + */ + + for (; offset < ((2 * FL_SECTOR_SIZE) - 2); + offset += halfBytes, iSec += pv->clusterSize) { + + oldFATentry = UNAL2( *(Unaligned FAR0 *)(oldFAT + (offset / 2)) ); + newFATentry = UNAL2( *(Unaligned FAR1 *)(newFAT + (offset / 2)) ); + + if (offset & 1) { + oldFATentry >>= 4; + newFATentry >>= 4; + } + else { + if (halfBytes == 3) { + oldFATentry &= 0xfff; + newFATentry &= 0xfff; + } + } + +#else /* !FS_FAT_12BIT */ + + firstCluster = ((unsigned) (secNo - pv->firstFATsecNo) * (FL_SECTOR_SIZE / 2)); + iSec = pv->firstDataSecNo + + (((SectorNo)(firstCluster - (unsigned)2)) * pv->clusterSize); + + /* Find if any clusters were logically deleted, and if so, delete them */ + + for (offset = 0; offset < FL_SECTOR_SIZE; offset += 2, iSec += pv->clusterSize) { + + oldFATentry = LE2( *(LEushort FAR0 *)(oldFAT + offset) ); + newFATentry = LE2( *(LEushort FAR1 *)(newFAT + offset) ); + +#endif /* FS_FAT_12BIT */ + + if ((oldFATentry != FAT_FREE) && (newFATentry == FAT_FREE)) { + +#ifdef FL_DEL_SECTOR_SETS + + if (del_sect_sets == TRUE) { + + /* Rather then deleting this cluster's sectors immediately, we try to + * accumulate as many consecutive clusters as only possible before + * calling flAbsDelete(). The hope here is that the underlaying + * TL will be able to handle deletion of larger sets of + * consecutive sectors more efficiently. + */ + + if ((SectorNo)(ioreq_delete->irSectorNo + ioreq_delete->irSectorCount) == iSec) { + + ioreq_delete->irSectorCount += pv->clusterSize; + } + else { + + if (ioreq_delete->irSectorNo != (SectorNo)(-1)) { + +#ifdef FL_DEL_SECTOR_STATS + { register int x = -1, S = (int)(ioreq_delete->irSectorCount); + while (S != 0) { x++; S >>= 1; } + if ((x >= 0) && (x < (sizeof(del_sect_stats)/sizeof(del_sect_stats[0])))) { del_sect_stats[x]++; } + } +#endif + flAbsDelete (ioreq_delete); + } + + ioreq_delete->irSectorNo = iSec; + ioreq_delete->irSectorCount = pv->clusterSize; + } + } + else + +#endif /* FL_DEL_SECTOR_SETS */ + + { /* delete one FAT cluster at a time */ + + ioreq_delete->irHandle = pv->handle; + ioreq_delete->irSectorNo = iSec; + ioreq_delete->irSectorCount = pv->clusterSize; + flAbsDelete (ioreq_delete); + } + } + } + + return flOK; +} + +#endif /* FL_INCLUDE_FAT_MONITOR */ + + + + +/* --------------------------------------------------------------------------- * + * * + * f f C h e c k B e f o r e W r i t e * + * * + * Catch all the FAT updates. Detect disk partitioning operation, track it * + * to completion, re-read partition tables, and re-install FAT filters on * + * all FAT12/16 partitions. * + * * + * Parameters: * + * ioreq : standard I/O request to be checked * + * * + * Returns: * + * flOK on success, otherwise error code * + * * + * --------------------------------------------------------------------------- */ + +FLStatus ffCheckBeforeWrite ( IOreq FAR2 * ioreq ) +{ + int socNo, diskNo; + FLffDisk * pd; + FLffVol * pv; + FLSDword iSec; + int iPart; + IOreq ioreq2; + FLSByte FAR1 * usrBuf; + + /* if module hasn't been reset yet, do it now */ + + if (resetDone == FALSE) + (void) reset(); + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(ioreq->irHandle); + diskNo = H2D(ioreq->irHandle); + + if ((socNo >= ((int) noOfSockets)) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; + + /* if disk structure hasn't been allocated yet, do it now */ + + if (ffDisk[socNo][diskNo] == NULL) + checkStatus( newDisk((int)ioreq->irHandle) ); + + pd = ffDisk[socNo][diskNo]; + + /* read partition table(s) and install FAT filters is needed */ + + if (pd->ffstate == flStateNotInitialized) + checkStatus( parseDisk((int)ioreq->irHandle) ); + + /* catch writes to MBR, and track the whole disk partitioning operations */ + + while( isPartTableWrite(pd, ioreq) == TRUE ) { + + /* disk re-partitioning is in progress */ + + if( pd->secToWatch == (SectorNo)0 ) { + + /* it's write to MBR, so trash BPBs in all disk's partitions */ + + if (pd->parts > 0) { + + for (iPart = 0; iPart < pd->parts; iPart++) { + + ioreq2.irHandle = ioreq->irHandle; + ioreq2.irSectorNo = (pd->part[iPart])->startSecNo; + ioreq2.irSectorCount = (SectorNo) 1; + ioreq2.irData = (void FAR1 *) zeroes; + (void) flAbsWrite(&ioreq2); + } + } + } + + /* keep FAT filters disabled while disk partitioning is in progress */ + + pd->ffstate = flStateInitInProgress; + + /* partition table which is about to be written to disk */ + + usrBuf = FLBUF( ioreq, (pd->secToWatch - ioreq->irSectorNo) ); + + switch( isExtPartPresent(usrBuf, &(pd->secToWatch)) ) { + + case flOK: + + /* + * Found valid partition table with extended partition. + * The pd->secToWatch has been updated to point to the + * sector where next partition table will be written to. + */ + continue; + + case flFileNotFound: + + /* + * Valid partition table, but no extended partition in it. + * Partitioning has been completed. Set pd->ffstate to + * 'flStateNotInitialized' to initiate parsing of partition + * table(s) and FAT filter installation next time this routine + * is called. + */ + + pd->ffstate = flStateNotInitialized; + break; + + case flBadFormat: + default: + + /* No valid partition table. */ + + break; + } + + return flOK; + } + +#ifdef FL_INCLUDE_FAT_MONITOR + + /* check for FAT update */ + + if (pd->ffstate == flStateInitialized) { + +#ifdef FL_DEL_SECTOR_SETS + + if (del_sect_sets == TRUE) { + + ioreq2.irHandle = ioreq->irHandle; + ioreq2.irSectorNo = (FLSDword)(-1); + ioreq2.irSectorCount = 0; + } +#endif + + /* NOTE: We can handle 'write' request that spans disk partition boundaries */ + + for (iSec = ioreq->irSectorNo; + iSec < (ioreq->irSectorNo + ioreq->irSectorCount); iSec++) { + + for (iPart = 0; iPart < pd->parts; iPart++) { + + pv = pd->part[iPart]; + + /* we monitor only FAT12/16 partitions */ + + if ((pv->type != FAT12_PARTIT) && (pv->type != FAT16_PARTIT) && + (pv->type != DOS4_PARTIT)) + continue; + + /* FAT filters can be disabled on individual partitions */ + + if (pv->ffEnabled != TRUE) + continue; + + if (iSec == (FLSDword)pv->startSecNo) { + + /* partition's boot sector is being updated */ + + usrBuf = FLBUF( ioreq, (iSec - ioreq->irSectorNo) ); + + if( isBPBchanged(pv, usrBuf) == TRUE ) { + + /* + * Critical fields in partition's boot sector have been changed. + * Turn off FAT monitor on this partition. + */ + + pv->ffEnabled = FALSE; + + DBG_PRINT_FLOW(FLZONE_FS,"Debug: (ffCheckBeforeWrite) BPB update detected.\r\n"); + continue; + } + } + + if ((iSec >= (FLSDword)pv->firstFATsecNo) && (iSec <= (FLSDword)pv->lastFATsecNo)) { + + /* + * Compare new and old contents of FAT sectors(s). If freed + * sectors are detected, add then to ioreq2. + */ + + usrBuf = FLBUF( ioreq, (iSec - ioreq->irSectorNo) ); + + checkStatus( partFreeDelClusters(pv, iSec, usrBuf, &ioreq2) ); + } + } /* for(iPart) */ + } /* for(iSec) */ + +#ifdef FL_DEL_SECTOR_SETS + + if ((del_sect_sets == TRUE) && (ioreq2.irSectorNo != (SectorNo)(-1))) { + +#ifdef FL_DEL_SECTOR_STATS + { register int x = -1, S = (int)(ioreq2.irSectorCount); + while (S != 0) { x++; S >>= 1; } + if ((x >= 0) && (x < (sizeof(del_sect_stats)/sizeof(del_sect_stats[0])))) { del_sect_stats[x]++; } + } +#endif + flAbsDelete (&ioreq2); + } + +#endif /* FL_DEL_SECTOR_SETS */ + } + +#endif /* FL_INCLUDE_FAT_MONITOR */ + + return flOK; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * f l f f C o n t r o l * + * * + * Enable/disable/install FAT filters. See comments inside the routine for * + * the list of supported operations. * + * * + * Parameters: * + * handle : TFFS handle * + * partNo : partition # (0 .. FL_MAX_PARTS_PER_DISK) * + * state : see list of supported operations below * + * * + * Returns: * + * flOK on success, otherwise error code * + * * + * --------------------------------------------------------------------------- * + * * + * The following FAT monitor control requests are supported: * + * * + * state : flStateNotInitialized * + * partNo : [0 ... pd->parts-1] * + * action : turn off FAT monitor on specified partition * + * * + * state : flStateNotInitialized * + * partNo : < 0 * + * action : turn off FAT monitor on all partitions * + * * + * state : flStateInitialized * + * partNo : [0 ... pd->parts-1] * + * action : if FAT monitor has been installed on specified partition, * + * turn it on * + * * + * state : flStateInitInProgress * + * partNo : ignored * + * action : re-read partition table(s), and install FAT filters on all * + * partitions * + * * + * --------------------------------------------------------------------------- */ + +FLStatus flffControl ( int handle, + int partNo, + FLState state ) +{ + int socNo, diskNo; + FLffDisk * pd; + int i; + FLStatus status; + + /* if module hasn't been reset yet, do it now */ + + if (resetDone == FALSE) + (void) reset(); + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(handle); + diskNo = H2D(handle); + + if ((socNo >= ((int) noOfSockets)) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return flBadDriveHandle; + + /* if disk structure hasn't been allocated yet, do it now */ + + if (ffDisk[socNo][diskNo] == NULL) + checkStatus( newDisk(handle) ); + + pd = ffDisk[socNo][diskNo]; + + /* abort if disk re-partitioning is in progress */ + + if (pd->ffstate == flStateInitInProgress) + return flDriveNotReady; + + /* read partition table(s) and install FAT filters is needed */ + + if (pd->ffstate == flStateNotInitialized) { + + if (state == flStateNotInitialized) + return flOK; + + checkStatus( parseDisk(handle) ); + } + + /* check 'partNo' arguement for sanity */ + + if ((partNo >= pd->parts) || (partNo >= FL_MAX_PARTS_PER_DISK)) + return flBadDriveHandle; + + /* do requested operation */ + + status = flBadParameter; + + switch (state) { + + case flStateInitInProgress: + + /* read partition table(s), install FAT filters on all partitions */ + + pd->ffstate = flStateNotInitialized; + status = parseDisk(handle); + break; + + case flStateNotInitialized: + + /* turn off FAT monitor */ + + if (partNo < 0) { /* all partitions */ + + for (i = 0; i < FL_MAX_PARTS_PER_DISK; i++) { + + if (pd->part[i] != NULL) + (pd->part[i])->ffEnabled = FALSE; + } + } + else { /* specified partition */ + + if (pd->part[partNo] != NULL) + (pd->part[partNo])->ffEnabled = FALSE; + } + status = flOK; + break; + +#ifdef FL_INCLUDE_FAT_MONITOR + + case flStateInitialized: + + /* turn on FAT monitor */ + + if ((pd->ffstate == flStateInitialized) && (partNo >= 0)) { + + if (pd->part[partNo] != NULL) { + + switch( (pd->part[partNo])->type ) { + + case FAT12_PARTIT: + case FAT16_PARTIT: + case DOS4_PARTIT: + (pd->part[partNo])->ffEnabled = TRUE; + status = flOK; + break; + + case FL_RAW_PART: + DBG_PRINT_ERR(FLZONE_FS,"ERROR - can't ctrl non-existent partition.\r\n"); + break; + + default: + DBG_PRINT_ERR(FLZONE_FS,"ERROR - can't ctrl non-FAT12/16 partition.\r\n"); + break; + } + } + } + break; + +#endif /* FL_INCLUDE_FAT_MONITOR */ + + } /* switch(state) */ + + return status; +} + + + + +/* --------------------------------------------------------------------------- * + * * + * f l f f I n f o * + * * + * Obtain complete partition info for specified disk. * + * * + * Parameters: * + * handle : TFFS handle * + * * + * Returns: * + * NULL if error, otherwise pointer to partitioning info * + * * + * --------------------------------------------------------------------------- */ + +FLffDisk * flffInfo ( int handle ) +{ + int socNo, diskNo; + FLffDisk * pd; + + /* if module hasn't been reset yet, do it now */ + + if (resetDone == FALSE) + (void) reset(); + + /* break TFFS handle into socket# and disk#, and do sanity check */ + + socNo = H2S(handle); + diskNo = H2D(handle); + + if ((socNo >= ((int) noOfSockets)) || (diskNo >= FL_MAX_TL_PARTITIONS)) + return NULL; + + /* if disk structure hasn't been allocated yet, do it now */ + + if (ffDisk[socNo][diskNo] == NULL) { + + if( newDisk(handle) != flOK ) + return NULL; + } + + pd = ffDisk[socNo][diskNo]; + + /* read partition table(s) and install FAT filters is needed */ + + if (pd->ffstate == flStateNotInitialized) { + + if( parseDisk(handle) != flOK ) + return NULL; + } + + return pd; +} + + + +#endif /* FL_ABS_READ_WRITE && FL_READ_ONLY */ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fatfilt.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fatfilt.h new file mode 100755 index 00000000..a5713934 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fatfilt.h @@ -0,0 +1,185 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/bddoc/src/fatfilt.h-arc $ + * + * Rev 1.5 Oct 22 2007 11:34:52 einat.avidan + * update copyrights header + * + * Rev 1.4 Sep 11 2006 13:45:20 yaniv.iarovici + * Legal header added + * + * Rev 1.3 Aug 09 2006 16:52:48 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +/******************************************************************************* + * * + * Module: FATFILT * + * * + * This module implements installable FAT12/16 filters. It supports up to * + * SOCKETS sockets, with up to FL_MAX_DISKS_PER_SOCKET disks per socket. * + * Each disk can contain up to FL_MAX_PARTS_PER_DISK partitions on it, with * + * maximum depth of partition nesting in extended partitions equal to * + * MAX_PARTITION_DEPTH. * + * * + * In order for this module to work, disks must be abs.mounted rather then * + * mounted. In latter case, this module won't detect any of disk's * + * partitions, and won't install FAT filters. * + * * + * This module uses more then 512 bytes of stack space in case if MALLOC is * + * not enabled. * + * * + *******************************************************************************/ + + +#ifndef FLFF_H +#define FLFF_H + + + +#include "dosformt.h" + + + +/* number of entries in disk's partition table */ + +#define FL_PART_TBL_ENTRIES 4 + +/* max number of partitions (filesystem volumes) per disk */ + +#define FL_MAX_PARTS_PER_DISK (FL_PART_TBL_ENTRIES + FL_MAX_PARTITION_DEPTH) + + + + +/* + * Generic 'initialization status' type + */ + +typedef enum { + + flStateNotInitialized = 0, + flStateInitInProgress = 1, + flStateInitialized = 2 + + } FLState; + + +/* + * Disk partition (filesystem volume). Multiple partitions are allowed + * on the disk. + */ + +typedef struct { + + int handle; /* disk's TFFS handle */ + int type; /* FAT16_PARTIT */ + int flags; /* VOLUME_12BIT_FAT etc. */ + FLBoolean ffEnabled; /* FAT filter is enabled on that part. */ + SectorNo startSecNo; /* sectorNo where partition starts */ + SectorNo sectors; /* (info) total sectors in partition */ + SectorNo firstFATsecNo; /* sectorNo of 1st sector of 1st FAT */ + SectorNo lastFATsecNo; /* sectorNo of last sector of 1st FAT */ + SectorNo firstDataSecNo; + unsigned clusterSize; /* Cluster size in sectors */ + +} FLffVol; + + +/* + * Disk with multiple partitions. Multiple disks are allowed on socket. + */ + +typedef struct { + + int handle; /* disk's TFFS handle */ + FLState ffstate; /* FAT filter init. state */ + int parts; /* total FAT12/16 partitions found */ + FLffVol * part[FL_MAX_PARTS_PER_DISK]; + SectorNo secToWatch; /* used to track disk partitioning */ + FLSByte * buf; /* scratch buffer */ + +} FLffDisk; + + +/* + * Master Boot Record/Extended Boot Record of the disk + */ + +typedef struct { + + FLSByte reserved[0x1be]; + + struct { + FLByte activeFlag; /* 80h = bootable */ + FLByte startingHead; + LEushort startingCylinderSector; + FLSByte type; + FLByte endingHead; + LEushort endingCylinderSector; + Unaligned4 startingSectorOfPartition; + Unaligned4 sectorsInPartition; + } parts [FL_PART_TBL_ENTRIES]; + + LEushort signature; /* = PARTITION_SIGNATURE */ + +} flMBR; + + + + +/* + * FAT Filter API + */ + +#if defined(FL_ABS_READ_WRITE) && !defined(FL_READ_ONLY) + + extern FLStatus ffCheckBeforeWrite (IOreq FAR2 *ioreq); + extern FLStatus flffControl (int devNo, int partNo, FLState state); + extern FLffDisk* flffInfo (int devNo); + +#endif + +#endif /* FLFF_H */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbase.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbase.c new file mode 100755 index 00000000..d7d4e9fd --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbase.c @@ -0,0 +1,89 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/flbase.c-arc $ + * + * Rev 1.4 Oct 22 2007 11:34:52 einat.avidan + * update copyrights header + * + * Rev 1.3 Sep 11 2006 13:45:20 yaniv.iarovici + * Legal header added + * + * Rev 1.2 Aug 09 2006 16:52:48 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#include "flbase.h" + + +void toUNAL(FLByte FAR0 *unal, FLWord n) +{ + unal[0] = FL2BYTE(n); + unal[1] = FL2BYTE(n >> 8); +} + + +FLWord fromUNAL(FLByte const FAR0 *unal) +{ + return ((FLWord)unal[1] << 8) + unal[0]; +} + + +/* calling another routines looks nice, but it is slower */ + +void toUNALLONG(FLByte FAR0 *le, FLDword n) +{ + le[0] = FL2BYTE(n); + le[1] = FL2BYTE(n >> 8); + le[2] = FL2BYTE(n >> 16); + le[3] = FL2BYTE(n >> 24); +} + +FLDword fromUNALLONG(FLByte const FAR0 *le) +{ + return ((FLDword)le[3] << 24) + + ((FLDword)le[2] << 16) + + ((FLDword)le[1] << 8) + + le[0]; +} + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbase.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbase.h new file mode 100755 index 00000000..3f7a7695 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbase.h @@ -0,0 +1,267 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/flbase.h-arc $ + * + * Rev 1.21 Oct 22 2007 11:34:52 einat.avidan + * update copyrights header + */ + +#ifndef FLBASE_H +#define FLBASE_H + +#include "flcustom.h" +#include "flsystem.h" +#include "flsystyp.h" +#include "flchkdef.h" +#include "flcommon.h" + +#ifndef MTD_STANDALONE +#include "flsysfun.h" +#endif /* MTD_STANDALONE */ + + /* Number of floors supported by the S/W + * + * Define Maximum Number of floors in a physical device + * + * The actual number of floors depends on the physical device placed + * on the socket. + */ + +#define FL_MAX_NO_OF_FLOORS 4 + + + +/* General purpose macros */ + +#define BYTE_ADD_FAR(x,y) ((FLByte FAR1 *)addToFarPointer((FLByte FAR1 *)x,y)) +#define WORD_ADD_FAR(x,y) ((FLWord FAR1 *)addToFarPointer((FLByte FAR1 *)x,y)) +#define DWORD_ADD_FAR(x,y) ((FLDword FAR1 *)addToFarPointer((FLByte FAR1 *)x,y)) +#define SBYTE_ADD_FAR(x,y) ((FLSByte FAR1 *)addToFarPointer((FLByte FAR1 *)x,y)) +#define SWORD_ADD_FAR(x,y) ((FLSWord FAR1 *)addToFarPointer((FLByte FAR1 *)x,y)) +#define SDWORD_ADD_FAR(x,y) ((FLSDword FAR1 *)addToFarPointer((FLByte FAR1 *)x,y)) + +/* Drive handle masks */ + +#define FL_GET_LOGICAL_PARTITION_FROM_HANDLE(ioreq) (FLByte)(((ioreq)->irHandle & 0xf00) >> 8) +#define FL_GET_DISK_HANDLE_FROM_S_P_LP(s,p, lp) ((s) | ((p) << 4) | ((FLHandle)(lp) << 8)) + +#define FL_SOCKET_AND_FLASH_PARTITION_BITS 0xFF + +#define FL_DO_NOT_UPDATE_MBR (1 << 14) /* used by formatFS only */ + +#define INVALID_VOLUME_NUMBER 0xff +#define TL_SIGNATURE 6 + +#define FL_SECTOR_MASK (FL_SECTOR_SIZE - 1) +#define BITS_PER_BITE 8 + + +/* General purpose macros adjusted according to the above customization files. */ + + +/* Call a procedure returning status and fail if it fails. This works only in */ +/* routines that return Status: */ +#define checkStatus(exp) { FLStatus fl__status = (exp);if (fl__status != flOK) return fl__status; } +#define updateStatus(cur__stat, exp) { FLStatus fl__status = (exp);if (cur__stat == flOK) cur__stat = fl__status; } + +#define TFFSMIN(a,b) (((a)>(b)) ? (b):(a)) +#define TFFSMAX(a,b) (((a)<(b)) ? (b):(a)) + +/***************************************************************************/ +/* Big \ Little endien architecture conversion macros. */ +/***************************************************************************/ + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED +#define COPY2(to,arg) *((FLWord *)(&to)) = *((FLWord *)(&arg)) +#define COPY4(to,arg) *((FLDword *)(&to)) = *((FLDword *)(&arg)) +#else +#define COPY2(to, offs, arg) FL_REF_2(to, offs) = FL_REF_2(arg, offs) +#define COPY4(to, offs, arg) FL_REF_4(to, offs) = FL_REF_4(arg, offs) +#endif /* FL_NO_PACKED_STRUCTS_SUPPORTED */ + + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + + +#define UNAL2(arg) fromUNAL(arg) +#define toUNAL2(to,arg) toUNAL(to,arg) + +#define UNAL4(arg) fromUNALLONG((FLByte const FAR0 *)(arg)) +#define toUNAL4(to,arg) toUNALLONG((FLByte FAR0 *)to,arg) + +/* for both LE and BE */ + +#define FL_GET_UNAL2(arg, offs) fromUNAL(((FLByte *)(arg)) + (offs)) +#define FL_SET_UNAL2(to, offs, arg) toUNAL(((FLByte *)(to)) + (offs), (arg)) +#define FL_GET_UNAL4(arg, offs) fromUNALLONG(((FLByte *)(arg)) + (offs)) +#define FL_SET_UNAL4(to, offs, arg) toUNALLONG(((FLByte *)(to)) + (offs), (arg)) + + +typedef LEulong LEmin; + +/*************************************************/ +/* Use routines instead of 'c' standard librarys */ +/*************************************************/ + +/**********************************************/ +/* Declare the TrueFFS environment variables */ +/**********************************************/ + +#ifdef FL_NO_USE_FUNC +/* The code bellow allows you to customize your own routine for multi bytes */ +/* transfers. Once FL_NO_USE_FUNC is defined, you can define the multi byte */ +/* macros to these routines, and code them yourself in flsystem.c */ +extern void FAR1 fl16bitDocReadNoShift (volatile FLByte FAR0 * win, FLWord offset, FLByte FAR1 * dest, FLWord count ); +extern void FAR1 fl16bitDocWriteNoShift ( volatile FLByte FAR0 * win , FLWord offset , FLByte FAR1 * src, FLWord count ); +#endif /* FL_NO_USE_FUNC */ + +#ifdef FL_ENVIRONMENT_VARS + +extern void flSetEnvVar(void); + +/**********************************************/ +/* Declare the TrueFFS environment variables */ +/**********************************************/ + +extern FLByte flDimageCfg; + +#ifndef MTD_STANDALONE + +extern FLByte flUseMultiDoc; +extern FLByte flMTLdefragMode; +extern FLByte flMaxUnitChain; +#ifdef FL_TFFS_OLD_ENV_VARS +extern FLByte flMarkDeleteOnFlash; +extern FLByte flPolicy[FL_SOCKETS][FL_MAX_TL_PARTITIONS]; +#endif /* FL_TFFS_OLD_ENV_VARS */ +extern FLWord flCacheSize[FL_SOCKETS][FL_MAX_TL_PARTITIONS]; +extern FLByte flSkipStaticFilesWearLeveling[FL_SOCKETS][FL_MAX_TL_PARTITIONS]; +extern FLByte flSuspendMode[FL_SOCKETS]; +extern FLDword flTFFSBDDebugMode[FL_SOCKETS][FL_MAX_TL_PARTITIONS]; +#ifdef FL_BD_AUTO_DPD_MODE +extern FLDword flBDAutoDPDMode[FL_SOCKETS]; +#endif /* FL_BD_AUTO_DPD_MODE */ + +#endif /* MTD_STANDALONE */ + +/* Policies definitions (FL_SET_POLICY) */ +#define FL_DEFAULT_POLICY 0 +#define FL_COMPLETE_ASAP 1 +#define FL_SECURED_DELETE 2 +/* Mtl policies definitions (FL_MTL_POLICY) */ +#define FL_MTL_DEFRAGMENT_ALL_DEVICES 0 +#define FL_MTL_DEFRAGMENT_SEQUANTIAL 1 +/* Suspend mode other then FL_OFF */ +#define FL_SUSPEND_WRITE 1 +#define FL_SUSPEND_IO 3 +#define FL_IGNORE_WRITE 4 +#define FL_IGNORE_ERASE 8 +#define FL_PREVENT_IO (FL_IGNORE_ERASE | FL_IGNORE_WRITE | FL_SUSPEND_IO | FL_SUSPEND_WRITE) +/* Runtime replacement for compilation flags */ +#define FL_DIMAGE 0x01 +#define FL_PUTIMAGE 0x02 +#define FL_PUTIMAGE_PARALLEL 0x04 +#define FL_DIMAGE_ALL (FL_DIMAGE | FL_PUTIMAGE | FL_PUTIMAGE_PARALLEL) +/* Cache full media */ +#define FL_MAX_ALLOWED_TL_CACHE_SIZE 0xFFF + + +#ifndef FL_DEFAULT_POLICY_MODE +#define FL_DEFAULT_POLICY_MODE(socket,partition) FL_OFF +#endif /* FL_DEFAULT_POLICY_MODE */ +#ifndef FL_DEFAULT_BD_DPD_MODE +#define FL_DEFAULT_BD_DPD_MODE(socket) FL_OFF +#endif /* FL_DEFAULT_BD_DPD_MODE */ +#ifndef FL_DEFAULT_BD_SUSPEND_MODE +#define FL_DEFAULT_BD_SUSPEND_MODE(socket) FL_OFF +#endif /* FL_DEFAULT_BD_SUSPEND_MODE */ +#ifndef FL_DEFAULT_BD_DEBUG_MODE +#define FL_DEFAULT_BD_DEBUG_MODE(socket,partition) FL_OFF +#endif /* FL_DEFAULT_BD_DEBUG_MODE */ +/* Either per partition or for all (backward compatible) */ +#ifndef FL_DEFAULT_CACHE_SIZE_FOR_MINIMAL_CACHE +#define FL_DEFAULT_CACHE_SIZE_FOR_MINIMAL_CACHE 0x40 +#endif /* FL_DEFAULT_CACHE_SIZE_FOR_MINIMAL_CACHE */ +#ifndef FL_DEFAULT_TL_CACHE_SIZE +#define FL_DEFAULT_TL_CACHE_SIZE(socket,partition) FL_DEFAULT_CACHE_SIZE_FOR_MINIMAL_CACHE +#endif /* FL_DEFAULT_TL_CACHE_SIZE */ +#ifndef FL_DEFAULT_WEARLEVELING_MODE +#define FL_DEFAULT_WEARLEVELING_MODE(socket,partition) FL_OFF +#endif /* FL_DEFAULT_WEARLEVELING_MODE */ +#ifndef FL_DEFAULT_VERIFY_WRITE_MODE +#define FL_DEFAULT_VERIFY_WRITE_MODE(socket,partition) FL_OFF +#endif /* FL_DEFAULT_VERIFY_WRITE_MODE */ +#ifndef FL_DEFAULT_TOOLS_MODE +#define FL_DEFAULT_TOOLS_MODE FL_OFF +#endif /* FL_DEFAULT_TOOLS_MODE */ + +#endif /* FL_ENVIRONMENT_VARS */ + +/* Set default to bus configuration (unless specified differently in flsystem.h */ +#ifndef FL_DEFAULT_BUS_CONFIGURATION +#if (!defined(CHARSIZE) || (CHARSIZE != 16)) +#define FL_DEFAULT_BUS_CONFIGURATION (FL_NO_ADDR_SHIFT | FL_BUS_HAS_8BIT_ACCESS | \ + FL_BUS_HAS_16BIT_ACCESS | FL_BUS_HAS_32BIT_ACCESS) +#else +#define FL_DEFAULT_BUS_CONFIGURATION (FL_NO_ADDR_SHIFT | FL_BUS_HAS_16BIT_ACCESS) +#endif /* CHARSIZE */ +#endif /* FL_DEFAULT_BUS_CONFIGURATION */ + +#ifndef FL_DEFAULT_BUS_MODE +#define FL_DEFAULT_BUS_MODE(socket) FL_DEFAULT_BUS_CONFIGURATION +#endif /* FL_DEFAULT_BUS_MODE */ + + +#endif /* FLBASE_H */ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbuffer.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbuffer.h new file mode 100755 index 00000000..a34afb5f --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flbuffer.h @@ -0,0 +1,76 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/flbuffer.h-arc $ + * + * Rev 1.7 Oct 22 2007 11:34:52 einat.avidan + * update copyrights header + * + * Rev 1.6 Sep 11 2006 13:45:20 yaniv.iarovici + * Legal header added + * + * Rev 1.5 Sep 05 2006 17:21:34 rafib + * Fix slow mount problem in H1 512 hynix + * + * Rev 1.4 Aug 09 2006 16:52:50 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#ifndef FLBUFFER_H +#define FLBUFFER_H + +#include "flbase.h" + +#define READ_BACK_BUFFER_SIZE 1024 /* Size of read back buffer + Must be multiplication of 512 */ +typedef struct { + FLByte flData[FL_SECTOR_SIZE]; /* sector buffer */ + FLByte flData2[FL_SECTOR_SIZE]; /* sector buffer */ + SectorNo sectorNo; /* current sector in buffer */ + void *owner; /* owner of buffer */ + FLBoolean dirty; /* sector in buffer was changed */ + FLBoolean checkPoint; /* sector in buffer must be flushed */ +} FLBuffer; + +#endif diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flchkdef.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flchkdef.h new file mode 100755 index 00000000..0a48c02c --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flchkdef.h @@ -0,0 +1,1512 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/flchkdef.h-arc $ + * + * Rev 1.99 Dec 26 2007 11:58:02 einat.avidan + * update version + * + * Rev 1.98 Dec 04 2007 17:38:06 einat.avidan + * Define delay for accessing same register twice + * Inc version + * + * Rev 1.97 Dec 03 2007 18:04:02 einat.avidan + * update EQA number + * + * Rev 1.96 Nov 07 2007 19:20:42 einat.avidan + * add defenition for FLTXT_VAR + * update EQA number + * + * Rev 1.95 Nov 05 2007 17:53:14 einat.avidan + * EQA5 + * + * Rev 1.94 Oct 30 2007 17:06:30 einat.avidan + * update version number + * Exported DMA flags receive the values of internal flags + * + * Rev 1.93 Oct 23 2007 12:27:54 einat.avidan + * optimization: delay after setting head register only + * when switching floors + * + * Rev 1.92 Oct 22 2007 11:34:52 einat.avidan + * update copyrights header + * + * Rev 1.91 Oct 21 2007 16:59:48 einat.avidan + * fix compilation warnings + * + * Rev 1.90 Oct 21 2007 10:44:06 Einat.Avidan + * add definition for delay after each trial of reading chip ID from SLAVE + * add definition for number of trials of reading chip ID + * default definition of DOCH_SET_WINDOW_OFFSET should return value + * update version number + * + * Rev 1.89 Oct 11 2007 19:04:00 Einat.Avidan + * update version number + * add definition for delay after device switch + * + * + * Rev 1.88 Jul 01 2007 13:47:28 einat.avidan + * bug fix: SCR 2964 compilation flag FL_VERIFY_WRITE should exclude \ include code for write verification + * + * Rev 1.87 Jun 20 2007 12:23:36 einat.avidan + * update verion DD 1.1 EQA1 (internal R&D) + * + * Rev 1.86 Mar 22 2007 16:57:54 einat.avidan + * set version 1.1 EQA0 + * + * Rev 1.85 Mar 11 2007 16:39:46 einat.avidan + * bug fix: working on x86 requires read buffer not to be paged out + * replace the former solution (access to the begining and the end of the buffer under NO_INIT_MMU_PAGES compilation flag) + * with full solution: usage of a buffer that is locked on RAM + * + * Rev 1.84 Feb 28 2007 10:50:46 einat.avidan + * bug fix: scr 2831 removed unnecessary definitions: FL_MTDS, FL_TLS, MTD_READ_BBT. + * + * Rev 1.83 Feb 28 2007 10:33:20 einat.avidan + * inc EQA version + * bug fix: “;” at the end of macros definition in flcheckdef may cause compilation errors + * + * Rev 1.82 Feb 15 2007 17:52:18 Einat.Avidan + * New compilation flags: + * DOCH_READ_STATUS_ASYNC_IN_BURST + * DOCH_USE_BURST_MODE_READ_ONLY_IN_DMA + * + * Rev 1.81 Jan 01 2007 15:35:12 einat.avidan + * updated to EQA21 + * bug fix: scr2811, boot shceme failed when only one device exists and the reset/warm reset pins of the MDOC are NOT connected to the CPU reset. + * the fix - changed default number of ATA_MAX_NUM_OF_DEVICES to 1. + * + * Rev 1.78.2.16.1.3 Dec 10 2006 17:02:56 Yaniv.Iarovici + * Update EQA 20 + * + * Rev 1.78.2.16.1.2 Dec 05 2006 14:59:14 Yaniv.Iarovici + * Change EQA to 19. + * + * Rev 1.78.2.16.1.1 Dec 04 2006 12:44:48 Yaniv.Iarovici + * Change EQA to 18. + * + * Rev 1.78.2.16.1.0 Dec 03 2006 13:43:14 Yaniv.Iarovici + * Header update + * + * Rev 1.78.2.17 Dec 03 2006 13:32:26 Yaniv.Iarovici + * 1. Change EQA to 17. + * 2. Removed DOCH_FLOORS. + * Encapsulate auto wipe-sector operation for Dev1 under '#ifndef DOCH_NO_AUTO_WIPE_SECTORS_DEV1' + * + * Rev 1.78.2.16 Nov 30 2006 10:24:02 Yaniv.Iarovici + * 1. Change EQA to 16. + * 2. Add default customization for DOCH_WAIT_B4_DEV1_ID. + * + * Rev 1.78.2.15 Nov 21 2006 14:27:06 Yaniv.Iarovici + * Update EQA to 15. + * + * Rev 1.78.2.14 Nov 13 2006 15:14:04 Yaniv.Iarovici + * Change EQA to 14. + * + * Rev 1.78.2.13 Nov 12 2006 09:47:42 Yaniv.Iarovici + * 1. Changed version to EQA12 RC2. + * 2. Added default values for + * - FL_IPL_DELAY_CELL_CONFIG_READ + * - FL_IPL_DELAY_CELL_CONFIG_WRITE + * + * Rev 1.78.2.12 Nov 01 2006 08:56:04 Yaniv.Iarovici + * Change version to EQA12. + * + * Rev 1.78.2.11 Oct 31 2006 12:23:52 yaniv.iarovici + * Change version to EQA11. + * + * Rev 1.78.2.10 Oct 30 2006 15:50:32 yaniv.iarovici + * Change version to EQA10. + * + * Rev 1.78.2.9 Oct 29 2006 14:24:12 Yaniv.Iarovici + * Change version to EQA9. + * + * Rev 1.78.2.8 Oct 29 2006 10:59:50 Yaniv.Iarovici + * Change version to EQA8. + * + * Rev 1.78.2.7 Oct 25 2006 09:10:34 Yaniv.Iarovici + * Change version to EQA7 + * + * Rev 1.78.2.6 Oct 23 2006 11:29:20 yaniv.iarovici + * Change EQA to 6 + * + * Rev 1.78.2.5 Oct 09 2006 14:05:24 yaniv.iarovici + * Removed legacy devices related code and definitions + * + * Rev 1.78.2.4 Oct 05 2006 11:48:12 yaniv.iarovici + * Change version to 'DOC Driver 1.0, EQA4, RC1' + * + * Rev 1.78.2.3 Sep 13 2006 10:44:22 yaniv.iarovici + * Update version to EQA3 Alpha2 + * + * Rev 1.78.1.6 Sep 11 2006 13:45:20 yaniv.iarovici + * Legal header added + * + * Rev 1.78.1.5 Sep 10 2006 10:04:00 Yaniv.Iarovici + * Update version number - DOC Driver 1.0 EQA1 Alpha2. + * + * Rev 1.78.1.4 Sep 03 2006 14:44:50 Yaniv.Iarovici + * 1. Define flReadEvenNumberOfBytes() instead of flRead512Bytes() to support DRQ>1 + * 2. Define flWriteEvenNumberOfBytes() instead of flWrite512Bytes() to support DRQ>1 + * + * Rev 1.78.1.3 Aug 22 2006 13:24:40 Yaniv.Iarovici + * Change FL_MAX_TL_PARTITIONS default to '14' + * + * Rev 1.78.1.2 Aug 16 2006 08:46:36 Yaniv.Iarovici + * 1) Change 7.0.0.0 to 1.0.0.0 + * 2) Change TrueFFSVersion value to "1020" + * 3) If FL_DOC_ADDRESS is NOT defined and FL_LOW_DOC_ADDRESS defined, set '#define FL_DOC_ADDRESS FL_LOW_DOC_ADDRESS'. + * + * Rev 1.78.1.0 Aug 08 2006 15:55:30 Polina.Marimont + * DOC Driver 1.0 initial + */ + +/************************/ +/* TrueFFS source files */ +/* -------------------- */ +/************************/ + +/***************************************************************************** +* File Header * +* ----------- * +* Name : flchkdef.h * +* * +* Description : Sanity check for flcustom.h files. * +* * +*****************************************************************************/ + +#ifndef _FL_CHK_DEFS_H_ +#define _FL_CHK_DEFS_H_ + +#include "flcustom.h" +#include "flsystem.h" + +#define FL_MIGRATION_VERSION + +#define FL_NEW_MAPSECTOR + +#ifndef MTD_STANDALONE + +/* TrueFFS version + * + * Number written on the flash by INFTL format specifying the TrueFFS version + * The media was formated with. the number bellow specifies version + * 1.1.0.0 + */ + +#define TrueFFSVersion "1100" + +/* Tracking number for TrueFFS configuration managment + * + * Number for configuration management of special purpose versions + */ + +#define TrueFFS_EQA_Version 9 +#define TrueFFS_RC_Version 0 +#define TrueFFS_PATCH_Version 0 +#define TrueFFS_Alpha_Version 0 +#define TrueFFS_Beta_Version 1 + + +/* Programmer type version + * + * This string is placed in the media header indicating the programmer + * Name and version used to format the media + */ + +#ifndef FL_PROGRAMMER_NAME +#define FL_PROGRAMMER_NAME "CORE" +#endif /* FL_PROGRAMMER_NAME */ + +#ifndef FL_PROGRAMMER_VERSION +#define FL_PROGRAMMER_VERSION "0000" +#endif /* FL_PROGRAMMER_VERSION */ + +/********************************************************************/ +/* Device base address (Use previous versions definition if exits */ +/* and FL_DOC_ADDRESS does not exist. */ +/********************************************************************/ +#if !defined(FL_DOC_ADDRESS) && defined(FL_LOW_DOC_ADDRESS) +#define FL_DOC_ADDRESS FL_LOW_DOC_ADDRESS +#endif + +/*******************************************/ +/* Validity check and overlapping defines */ +/*******************************************/ + +#if !defined(FL_READ_ONLY) && !defined(FS_READ_ONLY) && defined(READ_ONLY) +#define FL_READ_ONLY +#define FS_READ_ONLY +#endif + +/* The format option needs some internal defintions */ +#if !defined(FL_FORMAT_VOLUME) && defined(FORMAT_VOLUME) +#define FL_FORMAT_VOLUME +#endif + +#if (defined(FL_FORMAT_VOLUME) && defined(FL_READ_ONLY)) +#error "You can not define FL_READ_ONLY and FL_FORMAT_VOLUME at the same time" +#endif /* (defined(FL_FORMAT_VOLUME) && defined(FL_READ_ONLY)) */ + +#if (defined(FS_FORMAT_VOLUME) && defined(FS_READ_ONLY)) +#error "You can not define FS_READ_ONLY and FS_FORMAT_VOLUME at the same time" +#endif /* (defined(FS_FORMAT_VOLUME) && defined(FS_READ_ONLY)) */ + +#if (defined(FS_CREATE_LOGICAL_PARTITIONS) && defined(FS_READ_ONLY)) +#error "You can not define FS_READ_ONLY and FS_CREATE_LOGICAL_PARTITIONS" +#endif + +/* In case FL_READ_ONLY is defined FS_READ_ONLY needs to be defined as well */ +#ifdef FL_READ_ONLY +#ifndef FS_READ_ONLY +#define FS_RED_ONLY +#endif /* FS_READ_ONLY */ +#endif /* FL_READ_ONLY */ + +/* Validity check for system files MACROES */ +#ifndef FL_FOPEN +#define FL_FOPEN +#endif /* FL_FOPEN */ +#ifndef FL_FCLOSE +#define FL_FCLOSE +#endif /* FL_FCLOSE */ +#ifndef FL_FPRINTF +#define FL_FPRINTF +#endif /* FL_FPRINTF */ + + +/* Number of file system - logical partitions + * + * Defines Maximum Number of logical partitons on a BDTL partition + * + * The actual number of partitions depends on the format placed on each device. + */ + +#ifndef FS_MAX_LOGICAL_PARTITIONS +#define FS_MAX_LOGICAL_PARTITIONS 4 /* per TL partition. There is no hard limit */ +#endif /* FS_MAX_LOGICAL_PARTITIONS */ + + +/* Validity check of FL_VOLUMES and FL_SOCKETS parameters. */ + +#if !defined(FL_VOLUMES) && defined(VOLUMES) +#define FL_VOLUMES VOLUMES +#endif + +#if !defined(FS_VOLUMES) && defined(FL_VOLUMES) +#define FS_VOLUMES FL_VOLUMES +#endif + +#if !defined(FL_SOCKETS) && defined(SOCKETS) +#define FL_SOCKETS SOCKETS +#endif + +#if !defined(FS_SOCKETS) && defined(FL_SOCKETS) +#define FS_SOCKETS FL_SOCKETS +#endif + + +#if !defined(FL_VOLUMES) && defined(FL_SOCKETS) +#define FL_VOLUMES FL_SOCKETS +#endif /* SOCKETS && ! VOLUMES */ + +#if !defined(FS_VOLUMES) && defined(FS_SOCKETS) +#define FS_VOLUMES FS_SOCKETS +#endif /* SOCKETS && ! VOLUMES */ + +#if !defined(FL_SOCKETS) && defined(FL_VOLUMES) +#define FL_SOCKETS FL_VOLUMES +#endif /* ! SOCKETS && VOLUMES */ + +#if !defined(FS_SOCKETS) && defined(FS_VOLUMES) +#define FS_SOCKETS FS_VOLUMES +#endif /* ! SOCKETS && VOLUMES */ + +#if (FL_SOCKETS > FL_VOLUMES) || (FS_SOCKETS > FS_VOLUMES) +#error "SOCKETS should not be bigger then VOLUMES" +#endif /* SOCKETS > VOLUMES */ + +/* The POLLING_INTERVAL definition is not really relevant to DiskOnChip + * Starting from TrueFFS 6.1 it was removed from flcustom.h, but TrueFFS + * still support this functionality. + */ +#ifndef POLLING_INTERVAL +#define POLLING_INTERVAL 0 +#endif /* POLLING_INTERVAL */ + +/* TrueFFS 5.2 used the FL_QUICK_MOUNT_INFO_EXIST defintion. TrueFFS 6.1 + * uses simple FL_ON and FL_OFF instead. + */ + +#define FL_QUICK_MOUNT_INFO_EXIST FL_ON + +/* Starting from TrueFFS 6.1 this flag does not reduce code and therfore was + * added as a default. + * + */ + +#define FL_LOW_LEVEL + +/* Some S/W modules like boot SDK do not need the read bad blocks tables routine. + * However for TrueFFS these defintion is vital + */ + +/* 12-bit FAT support + * + * Comment the following line if you do not need support for DOS media with + * 12-bit FAT (typically media of 8 MBytes or less). + */ + +#define FS_FAT_12BIT + + + +#ifndef FL_SOCKETS +#define FL_SOCKETS 1 /* The only available number */ +#endif +#define FIXED_MEDIA +#define DO_NOT_YIELD_CPU + +#endif /* MTD_STANDALONE */ + + +/* Number of translation layer partitions + * + * Defines Maximum Number of Translation layer partitions on a physical device + * + * The actual number of partitions depends on the format placed on each device. + */ + +#ifndef FL_MAX_TL_PARTITIONS +#define FL_MAX_TL_PARTITIONS 14 +#endif /* FL_MAX_TL_PARTITIONS */ + +/* The Maximum number of partitions is limited to 8 due to SAFTL buffers */ + +#if (FL_MAX_TL_PARTITIONS > 14) +#error "Can not define more then 14 partitions\r\n" +#endif /* (FL_MAX_TL_PARTITIONS > 8) */ + + +/* Max Number of binary partitions */ +#ifndef MAX_BINARY_PARTITIONS_PER_DRIVE +#define MAX_BINARY_PARTITIONS_PER_DRIVE 3 +#endif /* MAX_BINARY_PARTITIONS_PER_DRIVE */ + +/* There can not be more binary partition, then total supported partitions */ +#if (MAX_BINARY_PARTITIONS_PER_DRIVE >= FL_MAX_TL_PARTITIONS) +#error "MAX_BINARY_PARTITIONS_PER_DRIVE must be smaller then FL_MAX_TL_PARTITIONS\r\n" +#endif /* (MAX_BINARY_PARTITIONS_PER_DRIVE >= FL_MAX_TL_PARTITIONS) */ + +/* Default file system TL partitions */ +#if !defined(FS_MAX_TL_PARTITIONS) && defined(FL_MAX_TL_PARTITIONS) +#define FS_MAX_TL_PARTITIONS FL_MAX_TL_PARTITIONS +#endif + + +/* Make sure that the CHARSIZE is well defined */ +#ifndef CHARSIZE +#define CHARSIZE 8 /*The default char size is 8*/ +#endif + +/* Make sure flPack and flspread are well defined */ +#if (CHARSIZE == 8) +#ifndef flspread +#define flspread(source,length) +#endif /* flspread */ + +#ifndef flpack +#define flpack(source,length) +#endif /* flpack */ +#endif /* (CHARSIZE == 8) */ + +/* Make sure FL2BYTE is well defined */ +#ifndef FL2BYTE +#if (CHARSIZE == 8) +#define FL2BYTE(var) ((FLByte)(var)) +#else +#define FL2BYTE(var) ((FLByte)((var) & 0x00FF)) +#endif /* (CHARSIZE == 8) */ +#endif /* FL2BYTE */ + + +#ifndef FL_PACKED_STRUCTURES_BEFORE +#define FL_PACKED_STRUCTURES_BEFORE +#endif /* FL_PACKED_STRUCTURES_BEFORE */ + +#ifndef FL_PACKED_STRUCTURES_AFTER +#ifdef FL_PACKED_STRUCTURES +#define FL_PACKED_STRUCTURES_AFTER FL_PACKED_STRUCTURES +#else +#define FL_PACKED_STRUCTURES_AFTER +#endif /* FL_PACKED_STRUCTURES */ +#endif /* FL_PACKED_STRUCTURES_AFTER */ + +/* Starting from TrueFFS version 6.x the ASSUMED_NFTL_UNIT_SIZE was changed to + * FL_ASSUMED_MIN_UNIT_SIZE. + */ + +#ifndef FL_ASSUMED_MIN_UNIT_SIZE +#define FL_ASSUMED_MIN_UNIT_SIZE ASSUMED_NFTL_UNIT_SIZE +#endif /* FL_ASSUMED_MIN_UNIT_SIZE */ + +/* Starting from TrueFFS version 6.x the MAX_VOLUME_MBYTES was changed to + * FL_ASSUMED_MAX_VOLUME_MBYTES. + */ + +#ifndef FL_ASSUMED_MAX_VOLUME_MBYTES +#ifdef MAX_VOLUME_MBYTES +#define FL_ASSUMED_MAX_VOLUME_MBYTES MAX_VOLUME_MBYTES +#else + +/* TrueFFS sets the sector size according to this definitions. As a result customers + that do not customize this definition will be limited to a very small media (32MB) + without even knowing it. + */ + +#define FL_ASSUMED_MAX_VOLUME_MBYTES 64 +#endif /* MAX_VOLUME_MBYTES */ +#endif /* FL_ASSUMED_MAX_VOLUME_MBYTES */ + +/* When using static allocation , SAFTL may requires the number of sectors + * in a logical unit. This value can normally be deduced from the unit size. + * However if you need to support several DiskOnChip devices with different + * unit sizes, you may need to define the smallest unit size, while defining + * the largest number of logical sectors in a logical unit + */ + +#ifndef FL_ASSUMED_MAX_SECTORS_PER_UNIT +#define FL_ASSUMED_MAX_SECTORS_PER_UNIT (FL_ASSUMED_MIN_UNIT_SIZE>>FL_SECTOR_SIZE_BITS) +#endif /* FL_ASSUMED_MAX_SECTORS_PER_UNIT */ + +/* Validity check for FL_LOW_LEVEL compilation flag. + * + * Starting from TrueFFS 5.1 the LOW_LEVEL was changed to FL_LOW_LEVEL + * The reason was that it clashed with Windows NT LOW_LEVEL macro. + */ + +#ifndef FL_LOW_LEVEL +#ifdef LOW_LEVEL +#define FL_LOW_LEVEL +#endif /* LOW_LEVEL */ +#endif /* FL_LOW_LEVEL */ + + +#if !defined(FL_ABS_READ_WRITE) && !defined(FS_ABS_READ_WRITE) && defined(ABS_READ_WRITE) +#define FL_ABS_READ_WRITE +#define FS_ABS_READ_WRITE +#endif + +/* Validity check for FL_SYS_FUNC_RELEASE + * + * Starting from TrueFFS 6.0 the flExit routine calls this macro in + * order to inform the OS/FS that it is about to leave. + */ + +#ifndef FL_SYS_FUNC_RELEASE +#define FL_SYS_FUNC_RELEASE +#endif /* FL_SYS_FUNC_RELEASE */ + +#if !defined(FL_EXIT) && !defined(FS_EXIT) && defined(EXIT) +#define FL_EXIT +#define FS_EXIT +#endif + +/* Validity check for FL_LOWER_PRIORITY_THREAD and FL_RAISE_PRIORITY_THREAD + * + * Starting from TrueFFS 6.0-6.2.2 the MTD waitForReady routine calls the + * FL_LowerPriorityThread and FL_RaisePriorityThread macros allowing the OS + * to lower the driver's priority during the long wait. + * + * After 6.2.2 the name of the macros was changed to all upper case. + */ + +#ifndef FL_LOWER_PRIORITY_THREAD +#ifdef FL_LowerPriorityThread +/*** Add support for older flsystem that use FL_Raise/LowerPriorityThread macros ***/ +#define FL_LOWER_PRIORITY_THREAD FL_LowerPriorityThread +#else +#define FL_LOWER_PRIORITY_THREAD(myFlash) +#endif /* FL_LowerPriorityThread */ +#endif /* FL_LOWER_PRIORITY_THREAD */ + +#ifndef FL_RAISE_PRIORITY_THREAD +#ifdef FL_RaisePriorityThread +/*** Add support for older flsystem that use FL_Raise/LowerPriorityThread macros ***/ +#define FL_RAISE_PRIORITY_THREAD FL_RaisePriorityThread +#else +#define FL_RAISE_PRIORITY_THREAD(myFlash) +#endif /* FL_RaisePriorityThread */ +#endif /* FL_RAISE_PRIORITY_THREAD */ + +#ifndef FL_LowerPriorityThread +#define FL_LowerPriorityThread(myFlash) +#endif /* FL_LowerPriorityThread */ + +#ifndef FL_RaisePriorityThread +#define FL_RaisePriorityThread(myFlash) +#endif /* FL_RaisePriorityThread */ + + +/* Validity check for FL_TFFS_SLEEP + * + * Note that this routine used to be called flsleep, but it's name was + * greater resolution was required. + */ + +#ifndef FL_TFFS_SLEEP +#define FL_TFFS_SLEEP(flash,microseconds) +#endif /* FL_TFFS_SLEEP */ + + +/* Validity check for FL_READ_ONLY + * + * When Block device does not support write operations, also file system + * cannot write. Therefore, if BD read only is set - also FS read only must be set. + */ +#ifdef FL_READ_ONLY +#define FS_READ_ONLY +#endif /*FS_READ_ONLY*/ + +/* Validity check for FL_MALLOC and FL_FREE macros + * + * Starting from TrueFFS 5.0 the FREE and MALLOC macroes were + * changed to FL_MALLOC and FL_FREE in order to avoid name clashes. + * In order to keep backwards compatibility with previous flsystem.h + * files the following new defintions checks were added. + * if your system uses the FREE and MALLOC defintion simply comment + * them out and customized the FL_MALLOC and FL_FREE macroes in your + * flsystem.h file. + */ + +#if (defined(MALLOC) && !defined(FL_MALLOC)) +#define FL_MALLOC MALLOC +#endif /* MALLOC && ! FL_MALLOC */ +#if (defined(FREE) && !defined(FL_FREE)) +#define FL_FREE FREE +#endif /* FREE && ! FL_FREE */ + + +/* Validity check for "subFromFarPointer" and "distanceBetweenFarPointers" + * + * Starting from TrueFFS 6.3.0 2 new memory manipulation macro's were + * introduced for none flat memory architecture. They should be used when + * memory pointers are being subtracted or a difference between 2 pointers + * is needed + */ + +#ifndef subFromFarPointer +#define subFromFarPointer(base,increment) \ + addToFarPointer(base,(-(FLSDword)(increment))) +#endif /* subFromFarPointer */ + +#ifndef distanceBetweenFarPointers +#define distanceBetweenFarPointers(ptr1, ptr2) \ + (((FLDword)(ptr1)) - ((FLDword)(ptr2))) +#endif /* distanceBetweenFarPointers */ + + +/* Validity check for FL_FAR_MALLOC and FL_FAR_FREE + * + * Due to the BIOS driver memory limitations a dedicated routine + * is used for allocating the large ram arrays. + */ + +#if (defined(FL_MALLOC) && !defined(FL_FAR_MALLOC)) +#define FL_FAR_MALLOC FL_MALLOC +#endif /* FL_MALLOC && ! FL_FAR_MALLOC */ + +#if (defined(FL_FREE) && !defined(FL_FAR_FREE)) +#define FL_FAR_FREE FL_FREE +#endif /* FL_MALLOC && ! FL_FAR_MALLOC */ + + +#ifndef FL_MALLOC_DMA_BUFFER +#define FL_MALLOC_DMA_BUFFER FL_FAR_MALLOC +#endif + +#ifndef FL_FREE_DMA_BUFFER +#define FL_FREE_DMA_BUFFER FL_FAR_FREE +#endif + + +/* Validity check for debug printing + * + * Starting from TrueFFS 6.0 there are 6 types of debug print + * In case they were not customized in flsystem.h they are defined here + * as NULL. + */ + +#ifndef DBG_PRINT_FLOW +#define DBG_PRINT_FLOW(zone,str) /* if (zone & (ACTIVE_DEBUG_ZONE)) printf (str) */ +#endif +#ifndef DBG_PRINT_ERR +#define DBG_PRINT_ERR(zone,str) /* if (zone & (ACTIVE_DEBUG_ZONE)) printf (str) */ +#endif +#ifndef DBG_PRINT_WRN +#define DBG_PRINT_WRN(zone,str) /* if (zone & (ACTIVE_DEBUG_ZONE)) printf (str) */ +#endif +#ifndef DBG_PRINT_FLOW_PRM +#define DBG_PRINT_FLOW_PRM(zone,str) /* if (zone & (ACTIVE_DEBUG_ZONE)) printf str */ +#endif +#ifndef DBG_PRINT_ERR_PRM +#define DBG_PRINT_ERR_PRM(zone,str) /* if (zone & (ACTIVE_DEBUG_ZONE)) printf str */ +#endif +#ifndef DBG_PRINT_WRN_PRM +#define DBG_PRINT_WRN_PRM(zone,str) /* if (zone & (ACTIVE_DEBUG_ZONE)) printf str */ +#endif + +#ifndef DBG_PRINT_ATA + #define DBG_PRINT_ATA DBG_PRINT_ERR_PRM +#endif /*DBG_PRINT_ATA*/ + + +#ifndef DFORMAT_PRINT +#define DFORMAT_PRINT(a) DBG_PRINT_WRN_PRM(FLZONE_FORMAT,a) +#endif +#ifndef DEBUG_PRINT +#define DEBUG_PRINT(a) DBG_PRINT_WRN(FLZONE_FULL,a) +#endif + + + +/* For backwards compatibility we make sure tffsxxx is defined as flxxx + * + * Versions prior to 6.1 (when ENVIRONMENT_VARS was defined) the user was + * required to customize 2 sets of DiskOnChip memory access routines. + * (flxxx and flmemxxx). One set was for fast memory access and one + * implemented a simple for loop for maximum platform portability. Newer + * versions automatically implement the simple for loop allowing easier + * customization. The new customization model allows the user to customize + * only the tffsxxx routines regardless of the compilation flag + */ + +#if !defined(FL_ENVIRONMENT_VARS) && defined(ENVIRONMENT_VARS) +#define FL_ENVIRONMENT_VARS +#endif + +#ifdef FL_ENVIRONMENT_VARS +#ifndef tffscpy +#define tffscpy flcpy +#endif /* tffscpy */ +#ifndef tffscmp +#define tffscmp flcmp +#endif /* tffscmp */ +#ifndef tffsset +#define tffsset flset +#endif /* tffsset */ +#endif /* FL_ENVIRONMENT_VARS */ + +/* Macro for converting text to string */ +#ifndef FLTXT +#define FLTXT +#endif /* FLTXT */ + +#ifndef FLTXT_VAR +#define FLTXT_VAR +#endif /* FLTXT */ + +/*****************************/ +/* M-Systems forced defaults */ +/*****************************/ + +/* define IO memory access macros - must be defined in flsystem.h */ +#ifndef FLWRITE_IO_BYTE +#define FLWRITE_IO_BYTE(val,address) *((volatile FLByte FAR0*)(address))=(FLByte)(val) +#endif +#ifndef FLWRITE_IO_WORD +#define FLWRITE_IO_WORD(val,address) *((volatile FLWord FAR0*)(address))=(FLWord)(val) +#endif +#ifndef FLWRITE_IO_DWORD +#define FLWRITE_IO_DWORD(val,address) *((volatile FLDword FAR0*)(address))=(FLDword)(val) +#endif +#ifndef TFFSCPY_FROM_IO_8_BITS +#ifdef TFFSCPY_FROM_IO +#define TFFSCPY_FROM_IO_8_BITS TFFSCPY_FROM_IO +#else +#define TFFSCPY_FROM_IO_8_BITS(dest,src,count) tffscpy(dest,(void FAR0*)(src),count) +#endif +#endif /* TFFSCPY_FROM_IO_8_BITS */ + +#ifndef TFFSCPY_FROM_IO_16_BITS +#ifdef TFFSCPY_FROM_IO +#define TFFSCPY_FROM_IO_16_BITS TFFSCPY_FROM_IO +#else +#define TFFSCPY_FROM_IO_16_BITS(dest,src,count) tffscpy(dest,(void FAR0*)(src),count) +#endif +#endif /* TFFSCPY_FROM_IO_16_BITS */ + +#ifndef FLREAD_IO_BYTE +#define FLREAD_IO_BYTE(address) (*((volatile FLByte FAR0*)(address))) +#endif +#ifndef FLREAD_IO_WORD +#define FLREAD_IO_WORD(address) (*((volatile FLWord FAR0*)(address))) +#endif +#ifndef FLREAD_IO_DWORD +#define FLREAD_IO_DWORD(address) (*((volatile FLDword FAR0*)(address))) +#endif + +#ifndef TFFSCPY_TO_IO_8_BITS +#ifdef TFFSCPY_TO_IO +#define TFFSCPY_TO_IO_8_BITS TFFSCPY_TO_IO +#else +#define TFFSCPY_TO_IO_8_BITS(dest,src,count) tffscpy((void FAR0*)(dest),src,count) +#endif +#endif /* TFFSCPY_TO_IO_8_BITS */ + +#ifndef TFFSCPY_TO_IO_16_BITS +#ifdef TFFSCPY_TO_IO +#define TFFSCPY_TO_IO_16_BITS TFFSCPY_TO_IO +#else +#define TFFSCPY_TO_IO_16_BITS(dest,src,count) tffscpy((void FAR0*)(dest),src,count) +#endif +#endif /* TFFSCPY_TO_IO_16_BITS */ + +#ifndef TFFSSET_IO_8_BITS +#ifdef TFFSSET_IO +#define TFFSSET_IO_8_BITS TFFSSET_IO +#else +#define TFFSSET_IO_8_BITS(dest,val,count) tffsset((void FAR0*)(dest),val,count) +#endif +#endif /* TFFSSET_IO_8_BITS */ + +#ifndef TFFSSET_IO_16_BITS +#ifdef TFFSSET_IO +#define TFFSSET_IO_16_BITS TFFSSET_IO +#else +#define TFFSSET_IO_16_BITS(dest,val,count) tffsset((void FAR0*)(dest),val,count) +#endif +#endif /* TFFSSET_IO_16_BITS */ + +/* The FAT-LITE/SURE-FS API definitions were added the FL_ prefix. + * + * Starting from TrueFFS 6.2 + */ + + +#ifndef FS_FILES +#ifdef FILES +#define FS_FILES FILES +#endif /* FILES */ +#ifdef FL_FILES +#define FS_FILES FL_FILES +#endif /* FL_FILES */ +#endif /* FS_FILES */ + +#if defined(FS_FILES) && (FS_FILES <= 0) +#undef FS_FILES +#endif + +#if defined(FS_MAX_FSOS) && ((FS_MAX_FSOS <= 0) || !defined(FS_FILES)) +#undef FS_MAX_FSOS +#endif + +#if defined(FS_SUPPORT_FILE_CACHE) && !defined(FS_MAX_FSOS) +#undef FS_SUPPORT_FILE_CACHE +/* you need FSOs to define the cache size per file type */ +#endif + +#if defined(FS_SUPPORT_FILE_CACHE) && !defined(FL_EXTENDED_SECTOR_CACHE) +#define FL_EXTENDED_SECTOR_CACHE +#endif + +#if defined(FS_MAX_FSOS) && !defined(FS_MM_PERFORMANCE_TUNEUPS) +#define FS_MM_PERFORMANCE_TUNEUPS +#endif + +#if defined(FS_MAX_FSOS) && !defined(STATIC_FS_DB) +#if FS_MAX_FSOS >= 2 +#define STATIC_FS_DB = { DEFAULT_FILE(0, 0), DEFINE_FSO(NULL, NULL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) } +#else +#define STATIC_FS_DB = { DEFAULT_FILE(0, 0) } +#endif +#endif + +#if defined(SUB_DIRECTORY) && !defined(FS_SUB_DIRECTORY) +#define FS_SUB_DIRECTORY +#endif + +#if defined(RENAME_FILE) && !defined(FS_RENAME_FILE) +#define FS_RENAME_FILE +#endif + +#ifndef FILE_IS_ROOT_DIR +#define FILE_IS_ROOT_DIR FL_FILE_IS_ROOT_DIR +#endif + +#ifndef FILE_MODIFIED +#define FILE_MODIFIED FL_FILE_MODIFIED +#endif + +#ifndef FILE_IS_OPEN +#define FILE_IS_OPEN FL_FILE_IS_OPEN +#endif + +#ifndef FILE_IS_DIRECTORY +#define FILE_IS_DIRECTORY FL_FILE_IS_DIRECTORY +#endif + +#ifndef FILE_READ_ONLY +#define FILE_READ_ONLY FL_FILE_READ_ONLY +#endif + +#ifndef FILE_MUST_OPEN +#define FILE_MUST_OPEN FL_FILE_MUST_OPEN +#endif + + +#if defined(FL_TRANSLATE_FROM_UNICODE) && defined(FL_TRANSLATE_TO_UNICODE) +#define FILENAMES_INTERNAL_UNICODE_CONVERSION /* user-defined functions */ + +#elif defined(FL_LONG_FILENAMES_ASCII_SUPPORT) +#define FL_TRANSLATE_FROM_UNICODE unicodeToAscii +#define FL_TRANSLATE_TO_UNICODE asciiToUnicode + +#define FILENAMES_INTERNAL_UNICODE_CONVERSION + +#elif defined(FL_LONG_FILENAMES_UTF8_SUPPORT) +#define FL_TRANSLATE_FROM_UNICODE unicodeToUTF8 +#define FL_TRANSLATE_TO_UNICODE UTF8ToUnicode + +#define FILENAMES_INTERNAL_UNICODE_CONVERSION + +#endif + +#if defined(FL_EXTENDED_SECTOR_CACHE) && (!defined(FS_FILES) || (FS_FILES == 0)) +#undef FL_EXTENDED_SECTOR_CACHE +#endif + +#if defined(FL_EXTENDED_SECTOR_CACHE) && !defined(FS_DATA_CACHE_SIZE) +#define FS_DATA_CACHE_SIZE(socket, partition, logPartition) 200 +#endif + +#if defined(FAT_12BIT) && !defined(FS_FAT_12BIT) +#define FS_FAT_12BIT +#endif + +/******************************** MTD Macros ********************************************/ + +#ifndef FL_CHANGE_READ_ACCESS_TIME +#define FL_CHANGE_READ_ACCESS_TIME(wTimeNanoSec,socket) +#endif /* FL_CHANGE_READ_ACCESS_TIME */ + +/****************************************************************************************/ +/******************************* M I G R A T I O N M A C R O S ***********************/ +/****************************************************************************************/ + +/* Maximum number of supported DOCHs */ +/*===================================*/ +#ifndef DOCH_MAX_SOCKETS + #ifdef FL_SOCKETS + #define DOCH_MAX_SOCKETS FL_SOCKETS + #else /*FL_SOCKETS*/ + #define DOCH_MAX_SOCKETS 1 + #endif /*FL_SOCKETS*/ +#endif /*DOCH_MAX_SOCKETS*/ + +/* + * Length of DOCH register 'read' cycle in nanoseconds (default value should + * do for most systems). + */ +#ifndef DOCH_ACCESS_NANOSEC + #define DOCH_ACCESS_NANOSEC 15 +#endif /*DOCH_ACCESS_NANOSEC*/ + +#ifndef DOCH_SPI_ACCESS_NANOSEC + #define DOCH_SPI_ACCESS_NANOSEC 150000 +#endif /*DOCH_SPI_ACCESS_NANOSEC*/ + +/* Host CPU ENDIANESS */ +/*====================*/ +#ifndef DOCH_BIG_ENDIAN + #ifdef FL_BIG_ENDIAN + #define DOCH_BIG_ENDIAN + #endif /*FL_BIG_ENDIAN*/ +#endif /*DOCH_BIG_ENDIAN*/ + + +/*DOCH specific power mode defaults */ +/*================================= */ +/* by default DPD configured to: + active mode is NORMAL, + after command execution, device passes immediatly to + IDLE mode and after timeout (100msec) to DPD mode*/ +#ifndef DOCH_DPD_DEFAULT_ACTIVE_MODE + #define DOCH_DPD_DEFAULT_ACTIVE_MODE DOCH_WM_NORMAL_AND_AUTO_STBY /*DOCH_WorkMode*/ +#endif /*DOCH_DPD_DEFAULT_ACTIVE_MODE*/ + +#ifndef DOCH_DPD_DEFAULT_INACTIVE_MODE + #define DOCH_DPD_DEFAULT_INACTIVE_MODE DOCH_IM_IDLE_2_DPD /*DOCH_InactiveMode*/ +#endif /*DOCH_DPD_DEFAULT_INACTIVE_MODE*/ + +#ifndef DOCH_DPD_DEFAULT_DPD_TIMEOUT + #define DOCH_DPD_DEFAULT_DPD_TIMEOUT 1 +#endif /*DOCH_DPD_DEFAULT_DPD_TIMEOUT*/ +/*================================= */ +/* end of DOCH power mode settings */ + + +/* Memory allocation */ +/*===================*/ +#ifndef DOCH_MALLOC + #ifdef FL_MALLOC + #define DOCH_MALLOC FL_MALLOC + #endif /*FL_MALLOC*/ +#endif /*DOCH_MALLOC*/ + +#ifndef DOCH_FREE + #ifdef FL_FREE + #define DOCH_FREE FL_FREE + #endif /*FL_FREE*/ +#endif /*DOCH_FREE*/ + +/* System init/release functions */ +/*===============================*/ +#ifndef DOCH_SYS_FUNC_INIT +#define DOCH_SYS_FUNC_INIT +#endif /* DOCH_SYS_FUNC_INIT */ + +#ifndef DOCH_SYS_FUNC_RELEASE + #ifdef FL_SYS_FUNC_RELEASE + #define DOCH_SYS_FUNC_RELEASE FL_SYS_FUNC_RELEASE + #else /*FL_SYS_FUNC_RELEASE*/ + #define DOCH_SYS_FUNC_RELEASE() + #endif /*FL_SYS_FUNC_RELEASE*/ +#endif /*DOCH_SYS_FUNC_RELEASE*/ + +/* DMA transfer */ +/*==============*/ +#ifndef DOCH_DMA_CONFIG + #ifdef FL_DMA_CONFIG + #define DOCH_DMA_CONFIG FL_DMA_CONFIG + #endif /*FL_DMA_CONFIG*/ +#endif + + +/* DMA type flags - FL_DMA_CONFIG */ +/*===================================*/ +/* Note: DMA_Params_S is defined in flsystyp.h */ +#define DOCH_DMA_OPEN_CHANNEL 0 +#define DOCH_DMA_CONFIG_TRANSACTION_DEVICE_TO_HOST 1 +#define DOCH_DMA_FREE_CHANNEL 2 +#define DOCH_DMA_WAIT_FOR_READ_TRANSACTION_END 3 +#define DOCH_DMA_WAIT_FOR_WRITE_TRANSACTION_END 4 +#define DOCH_DMA_CONFIG_TRANSACTION_HOST_TO_DEVICE 5 + +#define DMA_OPEN_CHANNEL DOCH_DMA_OPEN_CHANNEL +#define DMA_CONFIG_TRANSACTION DOCH_DMA_CONFIG_TRANSACTION_DEVICE_TO_HOST +#define DMA_FREE_CHANNEL DOCH_DMA_FREE_CHANNEL +#define DMA_WAIT_FOR_TRANSACTION_END DOCH_DMA_WAIT_FOR_READ_TRANSACTION_END +#define DMA_CONFIG_WRITE_TRANSACTION DOCH_DMA_CONFIG_TRANSACTION_HOST_TO_DEVICE +#define DMA_WAIT_FOR_WRITE_TRANSACTION_END DOCH_DMA_WAIT_FOR_WRITE_TRANSACTION_END + +#ifndef DOCH_DMA_PULSE_WIDTH + #define DOCH_DMA_PULSE_WIDTH 0x001F +#endif /*DOCH_DMA_PULSE_WIDTH*/ + +/* DOCH_DMA_CHECK_BUFFER checks if buffer is suitable for DMA transfer*/ +#ifndef DOCH_DMA_CHECK_BUFFER + #define DOCH_DMA_CHECK_BUFFER(bufAddress, sectors) (((FLDword)bufAddress & 0x3) == 0) +#endif /*DOCH_DMA_CHECK_BUFFER*/ + +/* Burst Mode */ +/*============*/ + +#ifndef DOCH_USE_BURST_MODE_READ + #ifdef FL_USE_BURST_MODE_READ + #define DOCH_USE_BURST_MODE_READ + #endif /*FL_USE_BURST_MODE_READ*/ +#endif /*DOCH_USE_BURST_MODE_READ*/ + +#ifdef DOCH_USE_BURST_MODE_READ + + #ifndef DOCH_USE_BURST_MODE_READ_ONLY_IN_DMA + #ifdef FL_USE_BURST_MODE_READ_ONLY_IN_DMA + #define DOCH_USE_BURST_MODE_READ_ONLY_IN_DMA + #endif /*FL_USE_BURST_MODE_READ*/ + #endif /*DOCH_USE_BURST_MODE_READ*/ + + #ifndef DOCH_HOST_ENTER_READ_BURST_MODE + #ifdef FL_HOST_ENTER_BURST_MODE + #define DOCH_HOST_ENTER_READ_BURST_MODE FL_HOST_ENTER_BURST_MODE + #else /*FL_HOST_ENTER_BURST_MODE*/ + #define DOCH_HOST_ENTER_READ_BURST_MODE + #endif /*FL_HOST_ENTER_BURST_MODE*/ + #endif /*DOCH_HOST_ENTER_READ_BURST_MODE*/ + + #ifndef DOCH_HOST_EXIT_READ_BURST_MODE + #ifdef FL_HOST_EXIT_BURST_MODE + #define DOCH_HOST_EXIT_READ_BURST_MODE FL_HOST_EXIT_BURST_MODE + #else /*FL_HOST_EXIT_BURST_MODE*/ + #define DOCH_HOST_EXIT_READ_BURST_MODE + #endif /*FL_HOST_EXIT_BURST_MODE*/ + #endif /*DOCH_HOST_EXIT_READ_BURST_MODE*/ + + #ifndef DOCH_READ_STATUS_ASYNC_IN_BURST + #ifdef FL_READ_STATUS_ASYNC_IN_BURST + #define DOCH_READ_STATUS_ASYNC_IN_BURST + #endif /*FL_READ_STATUS_ASYNC_IN_BURST*/ + #endif /*DOCH_READ_STATUS_ASYNC_IN_BURST*/ + +#endif /*DOCH_USE_BURST_MODE_READ*/ + +#ifdef DOCH_USE_BURST_MODE_WRITE + + #ifndef DOCH_HOST_ENTER_WRITE_BURST_MODE + #define DOCH_HOST_ENTER_WRITE_BURST_MODE + #endif /*DOCH_HOST_ENTER_WRITE_BURST_MODE*/ + + #ifndef DOCH_HOST_EXIT_WRITE_BURST_MODE + #define DOCH_HOST_EXIT_WRITE_BURST_MODE + #endif /*DOCH_HOST_EXIT_WRITE_BURST_MODE*/ + +#endif /*DOCH_USE_BURST_MODE_WRITE*/ + +#ifndef DOCH_BURST_LENGTH + #ifdef BURST_LENGTH + #define DOCH_BURST_LENGTH ( (((BURST_LENGTH)-2)& 0x03 ) <<11) + #else + #ifdef FL_USE_BURST_MODE_READ + #ifdef FL_MIGRATION_VERSION + #error BURST_LENGTH must be defined, when FL_USE_BURST_MODE_READ defined + #else + #error DOCH_BURST_LENGTH must be defined, when DOCH_USE_BURST_MODE_READ defined + #endif /* migration*/ + #endif /*FL_USE_BURST_MODE_READ*/ + #endif /* BURST_LENGTH */ +#endif /*DOCH_BURST_LENGTH*/ + +#ifndef DOCH_BURST_LATENCY + #ifdef BURST_LATENCY + #define DOCH_BURST_LATENCY ( ((BURST_LATENCY)& 0x07 )<<8) + #else + #ifdef FL_USE_BURST_MODE_READ + #ifdef FL_MIGRATION_VERSION + #error BURST_LATENCY must be defined, when FL_USE_BURST_MODE_READ defined + #else + #error DOCH_BURST_LATENCY must be defined, when DOCH_USE_BURST_MODE_READ defined + #endif /* migration*/ + #endif /*FL_USE_BURST_MODE_READ*/ + #endif /* BURST_LENGTH */ +#endif /*DOCH_BURST_LATENCY*/ + +#ifndef DOCH_BURST_HOLD + #ifdef BURST_HOLD + #define DOCH_BURST_HOLD ((BURST_HOLD)<<13) + #else + #ifdef FL_USE_BURST_MODE_READ + #ifdef FL_MIGRATION_VERSION + #error BURST_HOLD must be defined, when FL_USE_BURST_MODE_READ defined + #else + #error DOCH_BURST_HOLD must be defined, when DOCH_USE_BURST_MODE_READ defined + #endif /* migration*/ + #endif /*FL_USE_BURST_MODE_READ*/ + #endif /* BURST_HOLD */ +#endif /*DOCH_BURST_HOLD*/ + +#ifndef DOCH_BURST_WAIT_STATE + #ifdef BURST_WAIT_STATE + #define DOCH_BURST_WAIT_STATE ( ((BURST_WAIT_STATE)&0x03 )<<4) + #else + #ifdef FL_USE_BURST_MODE_READ + #ifdef FL_MIGRATION_VERSION + #error BURST_WAIT_STATE must be defined, when FL_USE_BURST_MODE_READ defined + #else + #error DOCH_BURST_WAIT_STATE must be defined, when DOCH_USE_BURST_MODE_READ defined + #endif /* migration*/ + #endif /*FL_USE_BURST_MODE_READ*/ + #endif +#endif /*DOCH_BURST_WAIT_STATE*/ + +/* end of BURST definitions for H3 */ +/*=================================*/ + + + +/* Interrupt enabling */ +/*====================*/ + +#define DOCH_INT_RB_DISABLED 0x00 +#define DOCH_INT_RB_ENABLED 0x01 + +#ifndef DOCH_IRQ_RB_INIT + #ifdef FL_IRQ_RB_INIT + #define DOCH_IRQ_RB_INIT(wSockeNo) FL_IRQ_RB_INIT((wSockeNo)) + #else /*FL_IRQ_RB_INIT*/ + #define DOCH_IRQ_RB_INIT(wSockeNo) gDochIrqEnabled[(wSockeNo)] + #endif /*FL_IRQ_RB_INIT*/ +#endif /*DOCH_IRQ_RB_INIT*/ + +/* MACRO for "Wait on Interrupt" */ +/*===============================*/ +#ifndef DOCH_SLEEP + #ifdef FL_TFFS_SLEEP + #define DOCH_SLEEP(socket, device, microseconds) FL_TFFS_SLEEP(socket, microseconds) + #else + #define DOCH_SLEEP(socket, device, microseconds) + #endif /*FL_TFFS_SLEEP*/ +#endif /*DOCH_SLEEP*/ + +/* MACRO for notifying application that an interrupt had occurred + and was NOT yet serviced */ +/*==========================*/ +#ifndef DOCH_UNSERVICED_INTERRUPT + #define DOCH_UNSERVICED_INTERRUPT(socket, device) DOCH_SLEEP(socket, device, 0) +#endif /*DOCH_UNSERVICED_INTERRUPT*/ + + +/* DOCH HW Configuration defaults */ +/*================================*/ + +#ifndef DOCH_BURST_WRITE_MODE_DEFAULT + #define DOCH_BURST_WRITE_MODE_DEFAULT (DOCH_BURST_DISABLE | DOCH_BURST_HOLD_1_CLK | DOCH_BURST_LEN_4_CYC) +#endif /*DOCH_BURST_WRITE_MODE_DEFAULT*/ + +#ifndef DOCH_BURST_READ_MODE_DEFAULT + #define DOCH_BURST_READ_MODE_DEFAULT (DOCH_BURST_DISABLE | DOCH_BURST_HOLD_1_CLK | DOCH_BURST_LEN_4_CYC) +#endif /*DOCH_BURST_READ_MODE_DEFAULT*/ + +#ifndef DOCH_IPL_CTRL_DEFAULT + #define DOCH_IPL_CTRL_DEFAULT (DOCH_IPL_WRITE_DISABLE | DOCH_IPL_ALL_CS_ENABLED) +#endif /*DOCH_IPL_CTRL_DEFAULT*/ + +#ifndef DOCH_WARM_BOOT_CTRL_DEFAULT + #define DOCH_WARM_BOOT_CTRL_DEFAULT (DOCH_WARM_RST_POLARITY_HIGH | DOCH_WARM_RST_BURST_ON) +#endif /*DOCH_WARM_BOOT_CTRL_DEFAULT*/ + +#ifndef DOCH_POWER_DOWN_DEFAULT + #define DOCH_POWER_DOWN_DEFAULT (DOCH_DPD_PIN_POL_HIGH | DOCH_DPD_PIN_ENABLED | DOCH_DPD_WAKEUP_HOST_CE) +#endif /*DOCH_POWER_DOWN_DEFAULT*/ + +#ifndef DOCH_DMA_CTRL_DEFAULT + #define DOCH_DMA_CTRL_DEFAULT (DOCH_DMA_REQ_POL_LOW | DOCH_DMA_REQ_EDGE | ((DOCH_DMA_PULSE_WIDTH)<<4)) +#endif /*DOCH_DMA_CTRL_DEFAULT*/ + +#ifndef DOCH_DMA_NEGATION_CTRL_DEFAULT + #define DOCH_DMA_NEGATION_CTRL_DEFAULT 1 +#endif /*DOCH_DMA_NEGATION_CTRL_DEFAULT*/ + +#ifndef DOCH_SLOCK_DEFAULT + #define DOCH_SLOCK_DEFAULT DOCH_SLOCK_OFF +#endif /*DOCH_SLOCK_DEFAULT*/ + +#ifndef DOCH_ENDIAN_CTRL_DEFAULT + #ifdef FL_SWAP_BYTES + #define DOCH_ENDIAN_CTRL_DEFAULT (HIB_END_SWAP_ON) + #else /*FL_SWAP_BYTES*/ + #define DOCH_ENDIAN_CTRL_DEFAULT (HIB_END_SWAP_OFF) + #endif /*FL_SWAP_BYTES*/ +#endif /*DOCH_ENDIAN_CTRL_DEFAULT*/ + +#ifndef DOCH_OPERATION_MODE_CTRL_DEFAULT + #define DOCH_OPERATION_MODE_CTRL_DEFAULT (HIB_ADDR_SHIFT | HIB_NON_PIPE_ACCESS) +#endif /*DOCH_OPERATION_MODE_CTRL_DEFAULT*/ + + +/*Max number of devices per ATA socket (defined by ATA standard)*/ +#ifndef ATA_MAX_NUM_OF_DEVICES /* for mDOC H3 devices only */ + #define ATA_MAX_NUM_OF_DEVICES 1 /* should be 1 or 2 */ +#endif /* ATA_MAX_NUM_OF_DEVICES */ + +/*If a wait is needed between identifying Dev0 and Dev1, customize DOCH_WAIT_B4_DEV1_ID*/ +#ifndef DOCH_WAIT_B4_DEV1_ID + #define DOCH_WAIT_B4_DEV1_ID +#endif /*DOCH_WAIT_B4_DEV1_ID*/ + +/*If a wait is needed after switching between Dev0 and Dev1, customize DOCH_DELAY_USEC*/ +#ifndef DOCH_DELAY_USEC +#ifdef FL_DELAY_USEC + #define DOCH_DELAY_USEC(usec) FL_DELAY_USEC(usec) +#else + #define DOCH_DELAY_USEC(usec) def_dochDelayUsec(usec,gDochAccessNanosec) +#endif /*FL_DELAY_USEC*/ +#endif /*DOCH_DELAY_USEC*/ + +#ifndef DOCH_DELAY_MSEC +#ifdef FL_DELAY_MSEC + #define DOCH_DELAY_MSEC(msec) FL_DELAY_MSEC(msec) +#else + #define DOCH_DELAY_MSEC(msec) def_dochDelayUsec(1000*msec,gDochAccessNanosec) +#endif /*FL_DELAY_MSEC*/ +#endif /*DOCH_DELAY_MSEC*/ + +/*Accessing same register twice requires delay*/ +#ifndef FL_DELAY_BEFORE_ACCESSING_SAME_REGISTER + #define DOCH_DELAY_BEFORE_ACCESSING_SAME_REGISTER \ + def_dochDelayUsec(4,25) +#else + #define DOCH_DELAY_BEFORE_ACCESSING_SAME_REGISTER \ + FL_DELAY_BEFORE_ACCESSING_SAME_REGISTER +#endif /*FL_DELAY_BEFORE_ACCESSING_SAME_REGISTER*/ + +#if (ATA_MAX_NUM_OF_DEVICES == 2) + + #ifndef FL_SUPPORT_PARALLEL_SDK_INSTANCES + #define DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES + #endif /*FL_SUPPORT_PARALLEL_SDK_INSTANCES*/ + + /*cascaded configuration requires delay after switching between Dev0 and Dev1*/ + #ifndef DOCH_DELAY_AFTER_DEVICE_SWITCH + #ifdef DOCH_NO_SUPPORT_PARALLEL_SDK_INSTANCES + /* delay only when switching floors */ + #define DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,floorNo)\ + if ((pdev)->bLastDevNum ^ (floorNo))\ + { \ + DOCH_DELAY_USEC(4); \ + (pdev)->bLastDevNum = (floorNo);\ + } + #else /*DOCH_SUPPORT_PARALLEL_SDK_INSTANCES*/ + /* always delay after setting device head register */ + #define DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,floorNo)\ + DOCH_DELAY_USEC(4) /* 4 uSec delay */ + #endif /*DOCH_SUPPORT_PARALLEL_SDK_INSTANCES*/ + #endif /*DOCH_DELAY_AFTER_DEVICE_SWITCH*/ + + /*cascaded configuration requires delay after each trial of reading chip ID from SLAVE*/ + #ifndef DOCH_DELAY_BETWEEN_CHIP_ID_TRIALS_FOR_SLAVE + #define DOCH_DELAY_BETWEEN_CHIP_ID_TRIALS_FOR_SLAVE DOCH_DELAY_MSEC(1) /* 1 mSec delay*/ + #endif /*DOCH_DELAY_BETWEEN_CHIP_ID_TRIALS_FOR_SLAVE*/ + + /*cascaded configuration requires several trials of reading chip ID*/ + /* 2 seconds timeout for finding SLAVE ~ 2000 trials * 1mSec delay */ + #ifndef DOCH_CHIP_ID_TRIALS_FOR_SLAVE + #define DOCH_CHIP_ID_TRIALS_FOR_SLAVE 2000 + #endif /*DOCH_CHIP_ID_TRIALS_FOR_SLAVE*/ + +#else /*if (ATA_MAX_NUM_OF_DEVICES == 2)*/ + /* single floor does not require any delays*/ + + #ifndef DOCH_DELAY_AFTER_DEVICE_SWITCH + #define DOCH_DELAY_AFTER_DEVICE_SWITCH(pdev,floorNo) /*no delay is needed*/ + #endif /*DOCH_DELAY_AFTER_DEVICE_SWITCH*/ + + #ifndef DOCH_DELAY_BETWEEN_CHIP_ID_TRIALS_FOR_SLAVE + #define DOCH_DELAY_BETWEEN_CHIP_ID_TRIALS_FOR_SLAVE /*no delay is needed*/ + #endif /*DOCH_DELAY_BETWEEN_CHIP_ID_TRIALS_FOR_SLAVE*/ + + #ifndef DOCH_CHIP_ID_TRIALS_FOR_SLAVE + #define DOCH_CHIP_ID_TRIALS_FOR_SLAVE 0 /* no trials for reading second floor*/ + #endif /*DOCH_CHIP_ID_TRIALS_FOR_SLAVE*/ + +#endif /*if (ATA_MAX_NUM_OF_DEVICES == 2)*/ + +/* Delay cell configuration*/ +/* +0000: No Delay +0001: 1x delay. +0011: 2x delay. +0111: 3x delay. +*/ + +#ifndef FL_IPL_DELAY_CELL_CONFIG_READ + #define FL_IPL_DELAY_CELL_CONFIG_READ 0 +#endif /*FL_IPL_DELAY_CELL_CONFIG_READ*/ + +#ifndef FL_IPL_DELAY_CELL_CONFIG_WRITE + #define FL_IPL_DELAY_CELL_CONFIG_WRITE 0 +#endif /*FL_IPL_DELAY_CELL_CONFIG_READ*/ + + +/*===========================*/ +/* Access Layer Customization*/ +/* --------------------------*/ +/* 2 Sections: */ +/* - Run-Time */ +/* - Compile Time */ +/*===========================*/ +#ifdef DOCH_BIG_ENDIAN +#define C_16_8(a) ((FLByte)((a)>>8)) +#define C_8_16(a) (((FLWord)(a))<<8) +#define C_16_16(a) ((FLWord)((a)<<8) | ((a)>>8)) +#else +#define C_16_8(a) ((FLByte)(a)) +#define C_8_16(a) ((FLWord)(a)) +#define C_16_16(a) ((FLWord)(a)) +#endif /* DOCH_BIG_ENDIAN */ + +#ifdef DOCH_USE_FUNC /*Run-time*/ + +/* DOCH Access Layer macros */ +/*==========================*/ +#ifndef DOCHREAD_ATA_REG +#define DOCHREAD_ATA_REG(base, regNum) C_16_8(pdev->halRoutines.hal_get_ata_reg(base, regNum)) +#endif /*DOCHREAD_ATA_REG*/ +#ifndef DOCHWRITE_ATA_REG +#define DOCHWRITE_ATA_REG(base, regNum, val) (pdev->halRoutines.hal_set_ata_reg(base, regNum, C_8_16(val))) +#endif /*DOCHWRITE_ATA_REG*/ +#ifndef DOCHREAD_CTRL_REG +#define DOCHREAD_CTRL_REG(base, regNum) C_16_16(pdev->halRoutines.hal_get_ctrl_reg(base, regNum)) +#endif /*DOCHREAD_CTRL_REG*/ +#ifndef DOCHWRITE_CTRL_REG +#define DOCHWRITE_CTRL_REG(base, regNum, val) (pdev->halRoutines.hal_set_ctrl_reg(base, regNum, C_16_16(val))) +#endif /*DOCHWRITE_CTRL_REG*/ +#ifndef DOCHBLK_READ +#define DOCHBLK_READ(address, buf, sectors) (pdev->halRoutines.hal_blk_read(address, buf, sectors)) +#endif /*DOCHBLK_READ*/ +#ifndef DOCHBLK_WRITE +#define DOCHBLK_WRITE(address, buf, sectors) (pdev->halRoutines.hal_blk_write(address, buf, sectors)) +#endif /*DOCHBLK_WRITE*/ + +#ifndef DOCHREAD_BURST + #define DOCHREAD_BURST(base, offset, dest, sectors) +#endif /*DOCHREAD_BURST*/ + +#ifndef DOCHWRITE_BURST + #define DOCHWRITE_BURST(base, offset, dest, sectors) +#endif /*DOCHWRITE_BURST*/ + + /* DOCH IO Access macros */ + /*=======================*/ + #ifndef DOCHREAD_IO_WORD + #define DOCHREAD_IO_WORD(address) (FLREAD_IO_WORD(address)) + #endif /*DOCHREAD_IO_WORD*/ + + #ifndef DOCHWRITE_IO_WORD + #define DOCHWRITE_IO_WORD(val, address) (FLWRITE_IO_WORD(val, address)) + #endif /*DOCHWRITE_IO_WORD*/ + + #ifndef DOCHCPY_TO_IO_16_BITS + #define DOCHCPY_TO_IO_16_BITS(win,buf,sectors) (blk_write_using_data_reg(win, buf, sectors)) + #endif /*DOCHCPY_TO_IO_16_BITS*/ + + #ifndef DOCHCPY_FROM_IO_16_BITS + #define DOCHCPY_FROM_IO_16_BITS(win,buf,sectors) (blk_read_using_data_reg(win, buf, sectors)) + #endif /*DOCHCPY_FROM_IO_16_BITS*/ + +#else /*DOCH_USE_FUNC*/ /*Compile-Time*/ +#ifdef FL_MIGRATION_VERSION +/* DOCH Access Layer macros */ +/*==========================*/ +#ifndef DOCHREAD_ATA_REG +#define DOCHREAD_ATA_REG(base, regNum) C_16_8(flDirectRead16BitReg((DOCHFlash),(FLWord)(((regNum)<<1) + DOCH_CONT_REG_AREA))) +#endif /*DOCHREAD_ATA_REG*/ +#ifndef DOCHWRITE_ATA_REG +#define DOCHWRITE_ATA_REG(base, regNum, val) flDirectWrite16BitReg((DOCHFlash),(FLWord)(((regNum)<<1) + DOCH_CONT_REG_AREA),(FLWord)(C_8_16(val))) +#endif /*DOCHWRITE_ATA_REG*/ +#ifndef DOCHREAD_CTRL_REG +#define DOCHREAD_CTRL_REG(base, regNum) C_16_16(flDirectRead16BitReg((DOCHFlash),(FLWord)(regNum))) +#endif /*DOCHREAD_CTRL_REG*/ +#ifndef DOCHWRITE_CTRL_REG +#define DOCHWRITE_CTRL_REG(base, regNum, val) flDirectWrite16BitReg((DOCHFlash),(FLWord)(regNum),(FLWord)(C_16_16(val))) +#endif /*DOCHWRITE_CTRL_REG*/ +#ifndef DOCHBLK_READ +#define DOCHBLK_READ(address, buf, sectors) (flReadEvenNumberOfBytes((DOCHFlash),(FLWord)DOCH_DATA_PORT_AREA,(buf),((FLWord)(512*sectors))),0) +#endif /*DOCHBLK_READ*/ +#ifndef DOCHBLK_WRITE +#define DOCHBLK_WRITE(address, buf, sectors) (flWriteEvenNumberOfBytes((DOCHFlash),(FLWord)DOCH_DATA_PORT_AREA,(buf),((FLWord)(512*sectors))),0) +#endif /*DOCHBLK_WRITE*/ + +#ifndef DOCHREAD_BURST +#define DOCHREAD_BURST(base, offset, dest, sectors) DOCHBLK_READ( (base)+(offset), dest, sectors) +#endif /*DOCHREAD_BURST*/ + +#ifndef DOCHWRITE_BURST +#define DOCHWRITE_BURST(base, offset, dest, sectors) DOCHBLK_WRITE( (base)+(offset), dest, sectors) +#endif /*DOCHWRITE_BURST*/ + + +/* DOCH IO Access macros */ +/*=======================*/ +/* Not defined as we use legacy code */ + +#else /* FL_MIGRATION_VERSION */ + + #ifndef DOCHREAD_ATA_REG + #define DOCHREAD_ATA_REG(base, regNum) \ + (FLByte)(DOCHREAD_IO_WORD((((volatile FLWord FAR0 *)base)+regNum + (DOCH_CONT_REG_AREA/2)))) + #endif /*DOCHREAD_ATA_REG*/ + + #ifndef DOCHWRITE_ATA_REG + #define DOCHWRITE_ATA_REG(base, regNum, val) \ + DOCHWRITE_IO_WORD((FLWord)val,(((volatile FLWord FAR0 *)base)+regNum + (DOCH_CONT_REG_AREA/2))) + #endif /*DOCHWRITE_ATA_REG*/ + + #ifndef DOCHREAD_CTRL_REG + #define DOCHREAD_CTRL_REG(base, regNum) \ + DOCHREAD_IO_WORD(base + regNum) + #endif /*DOCHREAD_CTRL_REG*/ + + #ifndef DOCHWRITE_CTRL_REG + #define DOCHWRITE_CTRL_REG(base, regNum, val) \ + DOCHWRITE_IO_WORD((FLWord)val, (base + regNum)) + + #endif /*DOCHWRITE_CTRL_REG*/ + + #ifndef DOCHBLK_READ + #define DOCHBLK_READ(address, buf, sectors) \ + DOCHCPY_FROM_IO_16_BITS(address, buf, sectors) + #endif /*DOCHBLK_READ*/ + + #ifndef DOCHBLK_WRITE + #define DOCHBLK_WRITE(address, buf, sectors) \ + DOCHCPY_TO_IO_16_BITS(address, buf, sectors) + #endif /*DOCHBLK_WRITE*/ + + /* DOCH IO Access macros */ + /*=======================*/ + #ifndef DOCHREAD_IO_WORD + #define DOCHREAD_IO_WORD(address) (FLREAD_IO_WORD(address)) + #endif /*DOCHREAD_IO_WORD*/ + + #ifndef DOCHWRITE_IO_WORD + #define DOCHWRITE_IO_WORD(val, address) (FLWRITE_IO_WORD(val, address)) + #endif /*DOCHWRITE_IO_WORD*/ + + #ifndef DOCHCPY_TO_IO_16_BITS + #define DOCHCPY_TO_IO_16_BITS(win,buf,sectors) TFFSCPY_TO_IO_16_BITS(win,buf,(sectors<dwVirtAddr) != flOK ) + { + PrintkDebug ("mDOC not found"); + return flAdapterNotFound; + } + + PrintkInfo ("mDOC found"); + psoc->fFound = 1; + + return flOK; +} + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flcustom.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flcustom.h new file mode 100755 index 00000000..f0635ab6 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flcustom.h @@ -0,0 +1,386 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + + +#ifndef FLCUSTOM_H +#define FLCUSTOM_H + + +/* Driver & TrueFFS Version numbers (Previously named OSAK) + * + * The string must not be greater than 10 characters. + * + * Note: Other then being returned by the the flVolumeInfo() routine this + * value has no actual affect on the TrueFFS software. + */ +#define driverVersion "1.1.0" +#define OSAKVersion "1.1.0" + + +#define TFFS_SUPPORTED_DEVICE "H3" + + +/* + * debug/diagnostic messages + */ +#define TFFS_DEBUG_DRIVER + +#ifdef TFFS_DEBUG_DRIVER + +/* EXT filter debug messages */ +# define TFFS_DEBUG_EXTFILTER + +/* enable TFFS debug messages and fl_debug insmod argument */ +# define TFFS_MESSAGES_ENABLED + +/* default for fl_debug parameter: 0 - no messages, 1 - errors, 2 - warnings, 4 - flow */ +# define FL_DEBUG_DEF 2 + +/* #define TFFS_COUNT_REQ_SECTORS */ + +#endif /* TFFS_DEBUG_DRIVER */ + + +/* + * Collect various driver statistics + */ +#define TFFS_STATISTIC + + +/* + * comment out this macro if you want to get "MTD-style" + */ +#define TFFS_PARTITIONABLE + + +/* + * Scatter/gather of read/write requests in tffsdrv.c + */ +#define TFFS_REQ_CACHE_SIZE (4096 * 16) + + +#define DEV2PART_SHIFT 4 /* at most 15 file system partitions per disk */ +#define TFFS_DEVICE_NAME "tffs" +#define TFFS_MAXHW_SECTOR_SIZE_BITS 0 + + +/* + * allow using of unformatted DiskOnChip devices + */ +#define TFFS_ALLOW_UNFORMATTED + + +/* + * allow yielding CPU during flash write/erase operations + */ +#define TFFS_USE_SLEEP + + +/* Number of sockets + * + * Defines the maximum number of supported physical DiskOnChip devices. + * + * The actual number of sockets depends on which socket controllers are + * actually registered and the number of physical devices in the system. + */ +#define FL_SOCKETS 1 + + +/* Number of volumes + * + * Defines the maximum number of supported Disk (BDTL) partitions. + * + * The actual number of drives depends on which socket controllers are + * actually registered, the amount of devices in the system and the + * flash format placed on each device. + */ +#define FL_VOLUMES (14 * FL_SOCKETS) + + +/* Environment Variables + * + * Enable environment variables control of the TrueFFS features. + * + */ +#define FL_ENVIRONMENT_VARS + + +/* #define DOCH_ACCESS_LAYER_NOR */ +/* #define DOCH_ACCESS_LAYER_SPI */ + + +/* If you are using two cascaded DiskOnChip H3 devices, uncomment + * line below; otherwise keep it commented out. + */ +/* #define ATA_MAX_NUM_OF_DEVICES 2 */ /* only when using casacded devices */ + + +/* Forces the device into the deep power down mode after every driver operation */ +/* Compile the auto DPD code + * + * TrueFFS supports a mode, where TrueFFS automatically enters and exit DPD + * after every operation. + * + * The compilation bellow compiles that code. Note that it's operation is + * also under the affect of the dedicated environment variable. + */ +#define FL_BD_AUTO_DPD_MODE +#define FL_DEFAULT_BD_DPD_MODE(socket) tffs_auto_dpd +extern int tffs_auto_dpd; + + +/* Upon completion of every read/write access, DiskOnChip H3 devices + * immediately switch from the normal mode into the idle mode, and stay + * in the idle mode for 'DOCH_DPD_DEFAULT_DPD_TIMEOUT' milliseconds before + * switching into deep-power-down mode. + */ +#define DOCH_DPD_DEFAULT_DPD_TIMEOUT tffs_dpd_timeout +extern int tffs_dpd_timeout; + + +/* + * Remove all flash write functionalities from the code. + * + * When this option is selected, only API functions that do not involve write + * operations to the media can be called. + * + * This option can be used to create read-only applications with low RAM/ROM + * requirements. + */ +/* #define TFFS_RO */ +#ifdef TFFS_RO +# define FL_READ_ONLY +#endif + +/* IO Controll Interface + * + * Support standard IOCTL interface. + * + */ +#define FL_IOCTL_INTERFACE + + +#ifdef FL_IOCTL_INTERFACE + +/* Low level operations + * + * Uncomment the following line if you want to do low level operations + * (i.e. read from a physical address, write to a physical address, + * erase a unit according to its physical unit number, OTP and unique ID + * operations. + */ +# define FL_LOW_LEVEL + +/* Flash Formatting (Block device format) + * + * Uncomment the following line if you need to prepare a virgin DiskOnChip + * for work or in case you want to re-partition your existing device. + * + * This routine compiles the following 3 API routines: + * flFlashFormat(), flEraseBD() and flUnformat() + */ + +# ifndef TFFS_RO +# define FL_FORMAT_VOLUME +# endif + +/* H/W OTP + * + * Enable H/W One Time Programing capability including unique ID + * + */ +# define HW_OTP + +#endif /* FL_IOCTL_INTERFACE */ + + +/* Application exit + * + * If the FLite application ever exits, it needs to call flEXit before + * exiting. Uncomment the following line to enable this. + */ +#define FL_EXIT + + +/* H/W Protection + * + * Enable H/W protection of the device. + * + */ +#define HW_PROTECTION + + +/* Compile the code for reading after write + * + * Compiles the code and buffers for reading after every write operation + * This mode is used for debugging when you are still debugging the platform's + * H/W. + */ +#define FL_VERIFY_WRITE + + +/* Verify entire volume + * + * Compile the flVerifyVolume() routine - this routine scans the entire disk + * partition for power failures symptoms and correct them while initializing + * the TL cache. + * + */ +/* #define VERIFY_VOLUME */ + + +#ifdef FL_IOCTL_INTERFACE + +/* Binary Partition + * + * Enables access to the Binary partition. + * + */ +# define BDK_ACCESS + +#endif + + +#ifdef BDK_ACCESS + +/* Number of Binary partitions on the DiskOnChip. + * + * Defines Maximum Number of Binary partitions on the DiskOnChip. + * The actual number of partitions depends on the format placed + * on each device. + */ +# define FL_BINARY_PARTITIONS (3 * FL_SOCKETS) + +#endif /* BDK_ACCESS */ + + +/* Remove runtime controll over memory access routines + * + * If defined memory access routines will be set at compile time using + * dedicated defintions in flsystem.h + * Note : when compile time customization is chosen, you must sepcify + * the bus width even when working with DiskOnChip Millennium Plus. + * Refer to Trueffs manual for more infromation. + */ +/* #define FL_NO_USE_FUNC */ + + +/* + * Removes the code used for writing and reading the IPL code. + * + */ +#ifndef FL_IOCTL_INTERFACE +# define NO_IPL_CODE +#endif + + +/* Little-endian/big-endian + * + * FAT and translation layer structures use the little-endian (Intel) + * format for integers. + * If your machine uses the big-endian (Motorola) format, uncomment the + * following line. + * Note that even on big-endian machines you may omit the BIG_ENDIAN + * definition for smaller code size and better performance, but your media + * will not be compatible with standard FAT and FTL. + */ +/* #define FL_BIG_ENDIAN */ + + +/* #define FL_NO_INIT_MMU_PAGES */ + + +/* Compile the extended Disk information routine + * + * TrueFFS 6.0 and up provide an extended information routine for internal + * M-Systems utilities named flGetExtendedDiskInfo(). + * To compile its code define + */ +#define FL_EXTENDED_DISK_INFO + + +/* #define FL_NO_QUICK_MOUNT_FEATURE */ + + +/* Disable the automatic argument check + * + * You can remove code and even slightly improve the overall performance by + * allowing TrueFFS to skip its internal argument check by defining + * + */ +/* #define FL_SKIP_ARGS_CHECK */ + + +/* Absolute read & write + * + * Uncomment the following line if you want to be able to read & write + * sectors by absolute sector number (i.e. without regard to files and + * directories). + */ +#define FL_ABS_READ_WRITE + + +/* + * Include code related to DiskOnChip H3 burst mode + */ +#define DOCH_USE_BURST_MODE_READ +/* #define DOCH_USE_BURST_MODE_WRITE */ + +# if defined(DOCH_USE_BURST_MODE_READ) || defined(DOCH_USE_BURST_MODE_WRITE) + +# define BURST_LENGTH tffs_burst_length +# define BURST_LATENCY tffs_burst_latency +# define BURST_HOLD tffs_burst_hold +# define BURST_WAIT_STATE tffs_burst_ws + +# ifdef DOCH_USE_BURST_MODE_READ +# define FL_USE_BURST_MODE_READ +# endif + +# ifdef DOCH_USE_BURST_MODE_WRITE +# define FL_USE_BURST_MODE_WRITE +# endif + + extern int tffs_burst_length, tffs_burst_latency, tffs_burst_hold, tffs_burst_ws; + extern int tffs_burst_enabled; + +# endif /* DOCH_USE_BURST_MODE_READ || DOCH_USE_BURST_MODE_WRITE */ + + +extern unsigned int profiling[]; + + +#endif /* FLCUSTOM_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flioctl.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flioctl.c new file mode 100755 index 00000000..f7e61d2e --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flioctl.c @@ -0,0 +1,612 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/bddoc/src/flioctl.c-arc $ + * + * Rev 1.12 Oct 22 2007 11:34:52 einat.avidan + * update copyrights header + * + * Rev 1.11 Feb 28 2007 09:58:42 einat.avidan + * No change + * + * Rev 1.10.1.1 Oct 29 2006 14:23:46 Yaniv.Iarovici + * Update 'FL_IOCTL_PASS_THROUGH' structures. + * + * Rev 1.10.1.0 Oct 22 2006 14:53:52 yaniv.iarovici + * Changed protectionType from FLByte to FLWord in flProtectionOutput stucture. + * + * Rev 1.10 Oct 09 2006 14:05:34 yaniv.iarovici + * Removed #ifndef FL_DO_NOT_SUPPORT_H3 + * + * Rev 1.9 Oct 05 2006 11:00:56 yaniv.iarovici + * Fixed support for FL_IOCTL_PASS_THROUGH. + * + * Rev 1.8 Sep 11 2006 13:45:22 yaniv.iarovici + * Legal header added + * + * Rev 1.7 Aug 15 2006 09:32:32 Polina.Marimont + * IPL protection inside + * + * Rev 1.6 Aug 09 2006 16:52:50 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#include "flbase.h" +#include "blockdev.h" +#include "flioctl.h" +#ifdef BDK_ACCESS +#endif + +#ifdef FL_IOCTL_INTERFACE + +/*----------------------------------------------------------------------*/ +/* f l I O c t l */ +/* */ +/* The entry point for all TrueFFS extended functions. */ +/* */ +/* Note: This interface is common to all TrueFFS based drivers. However */ +/* since you can access TrueFFS diretly (without the driver) you */ +/* can also call the extended routines explicitly. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to flIOctlRecord record see flioclt.h */ +/* irFlags : Opcode of the specific extended function. */ +/* See flioctl.h for the complete opcode list. */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ + +TFFS_DLL_API FLStatus NAMING_CONVENTION bdIOctl(IOreq FAR2 *ioreq1) +{ + IOreq ioreq2; + void FAR1 *inputRecord; + void FAR1 *outputRecord; + + inputRecord = ((flIOctlRecord FAR1 *)(ioreq1->irData))->inputRecord; + outputRecord = ((flIOctlRecord FAR1 *)(ioreq1->irData))->outputRecord; + ioreq2.irHandle = ioreq1->irHandle; + + switch (ioreq1->irFlags) { + case FL_IOCTL_GET_INFO: + { + flDiskInfoOutput FAR1 *outputRec = (flDiskInfoOutput FAR1 *)outputRecord; + + ioreq2.irData = &(outputRec->info); + outputRec->status = flVolumeInfo(&ioreq2); + return outputRec->status; + } +#ifndef FL_READ_ONLY + + case FL_IOCTL_DEFRAGMENT: + { + flDefragInput FAR1 *inputRec = (flDefragInput FAR1 *)inputRecord; + flDefragOutput FAR1 *outputRec = (flDefragOutput FAR1 *)outputRecord; + + ioreq2.irLength = inputRec->requiredNoOfSectors; + outputRec->status = flDefragmentVolume(&ioreq2); + outputRec->actualNoOfSectors = ioreq2.irLength; + return outputRec->status; + } + +#ifdef FL_FORMAT_VOLUME + + case FL_IOCTL_FLASH_FORMAT: + { + flFlashFormatInput FAR1 *inputRec = (flFlashFormatInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + ioreq2.irLength = inputRec->sdwNoOfKeeps; + ioreq2.irFlags = inputRec->dwFormatFlags; + ioreq2.irData = (void FAR1 *)inputRec->fpPtr; + outputRec->status = flFlashFormat(&ioreq2); + return outputRec->status; + } + case FL_IOCTL_ERASE_BD: + { + flEraseBDInput FAR1 *inputRec = (flEraseBDInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + ioreq2.irPath = NULL; /* Progress callback */ + ioreq2.irFlags = inputRec->dwFlags; + outputRec->status = flEraseBD(&ioreq2); + return outputRec->status; + } + case FL_IOCTL_FLASH_UNFORMAT: + { + flFlashUnformatInput FAR1 *inputRec = (flFlashUnformatInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + ioreq2.irPath = NULL; /* Progress callback */ + ioreq2.irFlags = inputRec->dwFlags; + outputRec->status = flUnformat(&ioreq2); + return outputRec->status; + } + +#endif /* FL_FORMAT_VOLUME */ +#endif /* FL_READ_ONLY */ + + case FL_IOCTL_MOUNT_VOLUME: + { + flMountInput FAR1 *inputRec = (flMountInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + if (inputRec->type == FL_DISMOUNT) + outputRec->status = flDismountVolume(&ioreq2); + else + outputRec->status = flAbsMountVolume(&ioreq2); + return outputRec->status; + } +#ifdef BDK_ACCESS + case FL_IOCTL_BDK_OPERATION: + { + flBDKOperationInput FAR1 *inputRec = (flBDKOperationInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + ioreq2.irData = &(inputRec->bdkStruct); + switch(inputRec->type) { + case BDK_INIT_READ: + outputRec->status = bdkReadInit(&ioreq2); + break; + case BDK_READ: + outputRec->status = bdkReadBlock(&ioreq2); + break; + case BDK_GET_INFO: + outputRec->status = bdkPartitionInfo(&ioreq2); + break; +#ifndef FL_READ_ONLY + case BDK_INIT_WRITE: + outputRec->status = bdkWriteInit(&ioreq2); + break; + case BDK_WRITE: + outputRec->status = bdkWriteBlock(&ioreq2); + break; + case BDK_ERASE: + outputRec->status = bdkErase(&ioreq2); + break; + case BDK_CREATE: + outputRec->status = bdkCreate(&ioreq2); + break; +#endif /* FL_READ_ONLY */ + default: + outputRec->status = flBadParameter; + break; + } + return outputRec->status; + } +#endif /* BDK_ACCESS */ +#ifdef HW_PROTECTION +#ifdef BDK_ACCESS + case FL_IOCTL_BINARY_HW_PROTECTION: + { + flProtectionInput FAR1 *inputRec = (flProtectionInput FAR1 *)inputRecord; + flProtectionOutput FAR1 *outputRec = (flProtectionOutput FAR1 *)outputRecord; + + switch(inputRec->type) + { + case PROTECTION_INSERT_KEY: + ioreq2.irData = inputRec->key; + outputRec->status = bdkInsertProtectionKey(&ioreq2); + break; + case PROTECTION_REMOVE_KEY: + outputRec->status = bdkRemoveProtectionKey(&ioreq2); + break; + case PROTECTION_GET_TYPE: + outputRec->status = bdkIdentifyProtection(&ioreq2); + outputRec->protectionType = (FLWord)ioreq2.irFlags; + break; + case PROTECTION_DISABLE_LOCK: + ioreq2.irFlags = 0; + outputRec->status = bdkHardwareProtectionLock(&ioreq2); + break; + case PROTECTION_ENABLE_LOCK: + ioreq2.irFlags = LOCK_ENABLED; + outputRec->status = bdkHardwareProtectionLock(&ioreq2); + break; + case PROTECTION_CHANGE_KEY: + ioreq2.irData = inputRec->key; + outputRec->status = bdkChangeProtectionKey(&ioreq2); + break; + case PROTECTION_CHANGE_TYPE: + ioreq2.irFlags = inputRec->protectionType; + outputRec->status = bdkChangeProtectionType(&ioreq2); + break; + default: + outputRec->status = flBadParameter; + break; + } + return outputRec->status; + } +#endif /* BDK_ACCESS */ + case FL_IOCTL_BDTL_HW_PROTECTION: + { + flProtectionInput FAR1 *inputRec = (flProtectionInput FAR1 *)inputRecord; + flProtectionOutput FAR1 *outputRec = (flProtectionOutput FAR1 *)outputRecord; + + switch(inputRec->type) + { + case PROTECTION_INSERT_KEY: + ioreq2.irData = inputRec->key; + outputRec->status = flInsertProtectionKey(&ioreq2); + break; + case PROTECTION_REMOVE_KEY: + outputRec->status = flRemoveProtectionKey(&ioreq2); + break; + case PROTECTION_GET_TYPE: + outputRec->status = flIdentifyProtection(&ioreq2); + outputRec->protectionType = (FLWord)ioreq2.irFlags; + break; + case PROTECTION_DISABLE_LOCK: + ioreq2.irFlags = 0; + outputRec->status = flHardwareProtectionLock(&ioreq2); + break; + case PROTECTION_ENABLE_LOCK: + ioreq2.irFlags = LOCK_ENABLED; + outputRec->status = flHardwareProtectionLock(&ioreq2); + break; + case PROTECTION_CHANGE_KEY: + ioreq2.irData = inputRec->key; + outputRec->status = flChangeProtectionKey(&ioreq2); + break; + case PROTECTION_CHANGE_TYPE: + ioreq2.irFlags = inputRec->protectionType; + outputRec->status = flChangeProtectionType(&ioreq2); + break; + case PROTECTION_APPLY_STICKY: + outputRec->status = flApplyStickyLock(&ioreq2); + break; + default: + outputRec->status = flBadParameter; + break; + } + return outputRec->status; + } + case FL_IOCTL_IPL_HW_PROTECTION: + { + flProtectionInput FAR1 *inputRec = (flProtectionInput FAR1 *)inputRecord; + flProtectionOutput FAR1 *outputRec = (flProtectionOutput FAR1 *)outputRecord; + + switch(inputRec->type) + { + case PROTECTION_INSERT_KEY: + ioreq2.irData = inputRec->key; + outputRec->status = flIplInsertProtectionKey(&ioreq2); + break; + case PROTECTION_REMOVE_KEY: + outputRec->status = flIplRemoveProtectionKey(&ioreq2); + break; + case PROTECTION_GET_TYPE: + outputRec->status = flIplIdentifyProtection(&ioreq2); + outputRec->protectionType = (FLWord)ioreq2.irFlags; + break; + case PROTECTION_CHANGE_KEY: + ioreq2.irData = inputRec->key; + outputRec->status = flIplChangeProtectionKey(&ioreq2); + break; + case PROTECTION_CHANGE_TYPE: + ioreq2.irFlags = inputRec->protectionType; + outputRec->status = flIplChangeProtectionType(&ioreq2); + break; + default: + outputRec->status = flBadParameter; + break; + } + return outputRec->status; + } +#endif /* HW_PROTECTION */ +#ifdef HW_OTP + case FL_IOCTL_OTP: + { + flOtpInput FAR1 *inputRec = (flOtpInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + switch(inputRec->type) + { + case OTP_SIZE: + outputRec->status = flOTPSize(&ioreq2); + inputRec->lockedFlag = (FLByte)ioreq2.irFlags; + inputRec->length = ioreq2.irCount ; + inputRec->usedSize = ioreq2.irLength ; + break; + case OTP_READ: + ioreq2.irData = inputRec->buffer; /* user buffer */ + ioreq2.irCount = inputRec->usedSize; /* offset */ + ioreq2.irLength = inputRec->length; /* size to read */ + outputRec->status = flOTPRead(&ioreq2); + break; + case OTP_WRITE_LOCK: + ioreq2.irData = inputRec->buffer; /* user buffer */ + ioreq2.irLength = inputRec->length; /* size to read */ + outputRec->status = flOTPWriteAndLock(&ioreq2); + break; + default: + outputRec->status = flBadParameter; + break; + } + return outputRec->status; + } + + case FL_IOCTL_MCOTP: + { + flMCOtpInput FAR1 *inputRec = (flMCOtpInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + switch(inputRec->type) + { + case MCOTP_SIZE: + outputRec->status = flMCOTPSize(&ioreq2); + inputRec->lockedFlag = (FLByte)ioreq2.irFlags; + inputRec->length = ioreq2.irCount ; + inputRec->usedSize = ioreq2.irLength ; + break; + case MCOTP_READ: + ioreq2.irData = inputRec->buffer; /* user buffer */ + ioreq2.irCount = inputRec->wPageNo; /* offset */ + outputRec->status = flMCOTPRead(&ioreq2); + break; + case MCOTP_WRITE_LOCK: + ioreq2.irData = inputRec->buffer; /* user buffer */ + ioreq2.irCount = inputRec->wPageNo; /* offset */ + outputRec->status = flMCOTPWriteAndLock(&ioreq2); + break; + default: + outputRec->status = flBadParameter; + break; + } + return outputRec->status; + } + + case FL_IOCTL_CUSTOMER_ID: + { + flCustomerIdOutput FAR1 *outputRec = (flCustomerIdOutput FAR1 *)outputRecord; + + ioreq2.irData = outputRec->id; + outputRec->status = flGetCustomerID(&ioreq2); + return outputRec->status; + } + + case FL_IOCTL_UNIQUE_ID: + { + flUniqueIdOutput FAR1 *outputRec = (flUniqueIdOutput FAR1 *)outputRecord; + + ioreq2.irData = outputRec->id; + outputRec->status = flGetUniqueID(&ioreq2); + return outputRec->status; + } +#endif /* HW_OTP */ + + case FL_IOCTL_NUMBER_OF_PARTITIONS: + { + flCountPartitionsOutput FAR1 *outputRec = (flCountPartitionsOutput FAR1 *)outputRecord; + + outputRec->status = flCountVolumes(&ioreq2); + outputRec->noOfPartitions = (FLByte) ioreq2.irFlags; + return outputRec->status; + } + +#ifdef FL_LOW_LEVEL + + case FL_IOCTL_DEEP_POWER_DOWN_MODE: + { + flPowerDownInput FAR1 *inputRec = (flPowerDownInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + ioreq2.irFlags = inputRec->state; + outputRec->status = flDeepPowerDownMode(&ioreq2); + return outputRec->status; + } + +#endif /* FL_LOW_LEVEL */ +#ifdef FL_ABS_READ_WRITE +#ifndef FL_READ_ONLY + case FL_IOCTL_DELETE_SECTORS: + { + flDeleteSectorsInput FAR1 *inputRec = (flDeleteSectorsInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + ioreq2.irSectorNo = inputRec->firstSector; + ioreq2.irSectorCount = inputRec->numberOfSectors; + outputRec->status = flAbsDelete(&ioreq2); + return outputRec->status; + } +#endif /* FL_READ_ONLY */ + + case FL_IOCTL_READ_SECTORS: + { + flReadWriteInput FAR1 *inputRec = (flReadWriteInput FAR1 *)inputRecord; + flReadWriteOutput FAR1 *outputRec = (flReadWriteOutput FAR1 *)outputRecord; + + ioreq2.irSectorNo = inputRec->firstSector; + ioreq2.irSectorCount = inputRec->numberOfSectors; + ioreq2.irData = inputRec->buf; + outputRec->status = flAbsRead(&ioreq2); + outputRec->numberOfSectors = ioreq2.irSectorCount; + return outputRec->status; + } +#ifndef FL_READ_ONLY + + case FL_IOCTL_WRITE_SECTORS: + { + flReadWriteInput FAR1 *inputRec = (flReadWriteInput FAR1 *)inputRecord; + flReadWriteOutput FAR1 *outputRec = (flReadWriteOutput FAR1 *)outputRecord; + + ioreq2.irSectorNo = inputRec->firstSector; + ioreq2.irSectorCount = inputRec->numberOfSectors; + ioreq2.irData = inputRec->buf; + outputRec->status = flAbsWrite(&ioreq2); + outputRec->numberOfSectors = ioreq2.irSectorCount; + return outputRec->status; + } +#endif /* FL_READ_ONLY */ +#endif /* FL_ABS_READ_WRITE */ + +#ifdef FL_ENVIRONMENT_VARS + case FL_IOCTL_EXTENDED_ENVIRONMENT_VARIABLES: + { + flExtendedEnvVarsInput FAR1 *inputRec = (flExtendedEnvVarsInput FAR1 *)inputRecord; + flExtendedEnvVarsOutput FAR1 *outputRec = (flExtendedEnvVarsOutput FAR1 *)outputRecord; + + switch(inputRec->flags) + { + case FL_APPLY_TO_ALL: + outputRec->status = flSetEnvAll(inputRec->varName, + inputRec->varValue,&(outputRec->prevValue)); + break; + case FL_APPLY_TO_SOCKET: + outputRec->status = flSetEnvSocket(inputRec->varName, + FL_GET_SOCKET_FROM_HANDLE((&ioreq2)), + inputRec->varValue,&(outputRec->prevValue)); + break; + case FL_APPLY_TO_VOLUME: + outputRec->status = flSetEnvVolume(inputRec->varName, + FL_GET_SOCKET_FROM_HANDLE((&ioreq2)), + FL_GET_FLASH_PARTITION_FROM_HANDLE((&ioreq2)), + inputRec->varValue,&(outputRec->prevValue)); + break; + default: + DBG_PRINT_ERR(FLZONE_IOCTL,"ERROR - Unrecognized environment variable function flag.\r\n"); + outputRec->status = flFeatureNotSupported; + } + return outputRec->status; + } +#endif /* FL_ENVIRONMENT_VARS */ + +#ifndef FL_NO_USE_FUNC + case FL_IOCTL_SET_ACCESS_ROUTINE: + { + flSetMemoryAccessInput FAR1 *inputRec = (flSetMemoryAccessInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + + outputRec->status = flSetDocBusRoutine(FL_GET_SOCKET_FROM_HANDLE((&ioreq2)), + inputRec->structPtr); + return outputRec->status; + } + case FL_IOCTL_GET_ACCESS_ROUTINE: + { + flGetMemoryAccessOutput FAR1 *outputRec = (flGetMemoryAccessOutput FAR1 *)outputRecord; + + outputRec->status = flGetDocBusRoutine(FL_GET_SOCKET_FROM_HANDLE((&ioreq2)), + outputRec->structPtr); + return outputRec->status; + } +#endif /* FL_NO_USE_FUNC */ + +#ifdef VERIFY_VOLUME + case FL_IOCTL_VERIFY_VOLUME: + { + flVerifyVolumeInput FAR1 *inputRec = (flVerifyVolumeInput FAR1 *)inputRecord; + flVerifyVolumeOutput FAR1 *outputRec = (flVerifyVolumeOutput FAR1 *)outputRecord; + + ioreq2.irLength = (FLSDword)inputRec->flags; + ioreq2.irData = outputRec->callBack; + outputRec->status = flVerifyVolume(&ioreq2); + return outputRec->status; + } +#endif /* VERIFY_VOLUME */ + +#ifndef NO_IPL_CODE + case FL_IOCTL_WRITE_IPL: + { + flIPLInput FAR1 *inputRec = (flIPLInput FAR1 *)inputRecord; + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + ioreq2.irData = inputRec->bBufPtr; + ioreq2.irLength = inputRec->sdwLength; + ioreq2.irCount = inputRec->sdwOffset; + ioreq2.irFlags = inputRec->dwFlags; + outputRec->status = flWriteIPL(&ioreq2); + return outputRec->status; + } +#endif /* NO_IPL_CODE */ + +#ifndef FL_NO_QUICK_MOUNT_FEATURE + case FL_IOCTL_IS_QUICK_MOUNT_VALID: + { + flGetQuickMountOutput FAR1 *outputRec = (flGetQuickMountOutput FAR1 *)outputRecord; + outputRec->status = flGetQuickMountStatus(&ioreq2); + outputRec->mode = (FLByte)ioreq2.irFlags; + return outputRec->status; + } +#ifndef FL_READ_ONLY + case FL_IOCTL_WRITE_QUICK_MOUNT_INFO: + { + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + outputRec->status = flWriteQuickMountInfo(&ioreq2); + return outputRec->status; + } + + case FL_IOCTL_CLEAR_QUICK_MOUNT_INFO: + { + flOutputStatusRecord FAR1 *outputRec = (flOutputStatusRecord FAR1 *)outputRecord; + outputRec->status = flClearQuickMountInfo(&ioreq2); + return outputRec->status; + } +#endif /* FL_READ_ONLY */ +#endif /* FL_NO_QUICK_MOUNT_FEATURE */ + + case FL_IOCTL_PASS_THROUGH: + { + flAtaPassthroughInput* ptIN = (flAtaPassthroughInput*)inputRecord; + flAtaPassthroughOutput* ptOUT = (flAtaPassthroughOutput*)outputRecord; + + ioreq2.irData = ptIN->userBuff; + ioreq2.irLength = ptIN->secNum; + ioreq2.irCount = ( + (ptIN->passThruOP) | + (ptIN->useInterrupt<<2) | + (ptIN->multSectorFrame<<4) ); + ioreq2.irPath = ptIN->in_regs; + + ptOUT->status = flDochPassThrough(&ioreq2); + + tffscpy(ptOUT->out_regs, ptIN->in_regs, sizeof(DOCH_Registers)); + return ptOUT->status; + } + + default: + return flBadParameter; + } +} + +#endif /* FL_IOCTL_INTERFACE */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flioctl.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flioctl.h new file mode 100755 index 00000000..6dbbbb33 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flioctl.h @@ -0,0 +1,490 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/flioctl.h-arc $ + * + * Rev 1.17 Oct 22 2007 11:34:52 einat.avidan + * update copyrights header + * + * Rev 1.16 Jul 02 2007 11:43:46 einat.avidan + * bug fix: SCR2966 : removed flags which are not in use + * FL_IPL_DOWNLOAD + * FL_IPL_ALERNATE_MAP + * FL_USING_BUFFERS + * FL_IPL_NO_ADDRESS_SHIFT_MODE + * + * Rev 1.15 Feb 28 2007 09:53:48 einat.avidan + * No change + * + * Rev 1.14.1.1 Oct 29 2006 14:23:46 Yaniv.Iarovici + * Update 'FL_IOCTL_PASS_THROUGH' structures. + * + * Rev 1.14.1.0 Oct 22 2006 14:53:58 yaniv.iarovici + * Changed protectionType from FLByte to FLWord in flProtectionOutput stucture. + * + * Rev 1.14 Oct 09 2006 14:05:38 yaniv.iarovici + * Removed #ifndef FL_DO_NOT_SUPPORT_H3 + * + * Rev 1.13 Oct 05 2006 11:01:06 yaniv.iarovici + * Fixed support for FL_IOCTL_PASS_THROUGH. + * + * Rev 1.12 Sep 11 2006 13:45:22 yaniv.iarovici + * Legal header added + * + * Rev 1.11 Aug 16 2006 08:47:20 Yaniv.Iarovici + * Encapsulate BDK related defines under '#ifdef BDK_ACCESS'. + * + * Rev 1.9 Aug 09 2006 16:52:50 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#ifndef FLIOCTL_H +#define FLIOCTL_H + +#include "flsystem.h" +#include "flstruct.h" +#include "_dochapi.h" + + +/* In every call to flIOctl function, the irFlags field in the structure +IOreq should hold one of the following: */ +typedef enum{FL_IOCTL_GET_INFO = FL_IOCTL_START, + FL_IOCTL_DEFRAGMENT, + FL_IOCTL_NO_LONGER_SUPPORTED_0, /* FL_IOCTL_WRITE_PROTECT */ + FL_IOCTL_MOUNT_VOLUME, + FL_IOCTL_NO_LONGER_SUPPORTED_1, /* FL_IOCTL_FORMAT_VOLUME */ +#ifdef BDK_ACCESS + FL_IOCTL_BDK_OPERATION, +#else /*BDK_ACCESS*/ + FL_IOCTL_RESERVED1, +#endif /*BDK_ACCESS*/ + FL_IOCTL_DELETE_SECTORS, + FL_IOCTL_READ_SECTORS, + FL_IOCTL_WRITE_SECTORS, + FL_IOCTL_NO_LONGER_SUPPORTED_2, /* FL_IOCTL_FORMAT_PHYSICAL_DRIVE */ + FL_IOCTL_NO_LONGER_SUPPORTED_3, /* FL_IOCTL_FORMAT_LOGICAL_DRIVE */ + FL_IOCTL_BDTL_HW_PROTECTION, +#ifdef BDK_ACCESS + FL_IOCTL_BINARY_HW_PROTECTION, +#else /*BDK_ACCESS*/ + FL_IOCTL_RESERVED2, +#endif /*BDK_ACCESS*/ + FL_IOCTL_OTP, + FL_IOCTL_CUSTOMER_ID, + FL_IOCTL_UNIQUE_ID, + FL_IOCTL_NUMBER_OF_PARTITIONS, + FL_IOCTL_NO_LONGER_SUPPORTED_4, /* FL_IOCTL_INQUIRE_CAPABILITIES */ + FL_IOCTL_NO_LONGER_SUPPORTED_5, /* FL_IOCTL_SET_ENVIRONMENT_VARIABLES */ + FL_IOCTL_NO_LONGER_SUPPORTED_6, /* FL_IOCTL_PLACE_EXB_BY_BUFFER */ + FL_IOCTL_NO_LONGER_SUPPORTED_7, /* FL_IOCTL_WRITE_IPL */ + FL_IOCTL_DEEP_POWER_DOWN_MODE, + FL_IOCTL_EXTENDED_ENVIRONMENT_VARIABLES, + FL_IOCTL_VERIFY_VOLUME, + FL_IOCTL_SET_ACCESS_ROUTINE, + FL_IOCTL_GET_ACCESS_ROUTINE, + FL_IOCTL_NO_LONGER_SUPPORTED_8, /* FL_IOCTL_EXTENDED_WRITE_IPL */ + FL_IOCTL_NO_LONGER_SUPPORTED_9, /* FL_IOCTL_OPEN_TRANSACTION */ + FL_IOCTL_NO_LONGER_SUPPORTED_10, /* FL_IOCTL_COMMIT_TRANSACTION */ + FL_IOCTL_NO_LONGER_SUPPORTED_11, /* FL_IOCTL_IS_VOLUME_RUGGEDIZED */ + FL_IOCTL_IS_QUICK_MOUNT_VALID, + FL_IOCTL_WRITE_QUICK_MOUNT_INFO, + FL_IOCTL_CLEAR_QUICK_MOUNT_INFO, + FL_IOCTL_NO_LONGER_SUPPORTED_12, /* FL_IOCTL_COMPLETE_OPERATION */ + FL_IOCTL_FLASH_FORMAT, /* Replacing FL_IOCTL_FORMAT_PHYSICAL_DRIVE */ + FL_IOCTL_ERASE_BD, /* Added in TrueFFS 6.3.0 */ + FL_IOCTL_FLASH_UNFORMAT, /* Added in TrueFFS 6.3.0 */ + FL_IOCTL_WRITE_IPL, /* Changed in TrueFFS 6.3.0 */ + FL_IOCTL_MCOTP, + FL_IOCTL_PASS_THROUGH, + FL_IOCTL_IPL_HW_PROTECTION +} flIOctlFunctionNo; + + +/* In every call to flIOctl function, the irData field in the structure +IOreq should point to the structure defined below. The fields +inputRecord and outputRecord should point to structures which are +specific to each IOctl function as defined in this file. */ +typedef struct { + void FAR1 *inputRecord; + void FAR1 *outputRecord; +} flIOctlRecord; + + +/* General output record that returns only status. */ +typedef struct { + FLStatus status; +} flOutputStatusRecord; + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +TFFS_DLL_API FLStatus NAMING_CONVENTION bdIOctl(IOreq FAR2 *); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#ifndef flIOctl +#define flIOctl bdIOctl +#endif + + +/* Input and output records for the different IOCTL functions: */ +/* =========================================================== */ + + +/*************************************************************************/ +/* Get disk information (FL_IOCTL_GET_INFO) */ +/* Input record: NULL */ +/* Output record: */ +typedef struct +{ + VolumeInfoRecord info; + FLStatus status; +} flDiskInfoOutput; +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* Defragment volume (FL_IOCTL_DEFRAGMENT) */ +/* Input record: */ +typedef struct { + FLSDword requiredNoOfSectors; /* Minimum number of sectors to make */ + /* available. */ +} flDefragInput; +/* Outout record: */ +typedef struct { + FLSDword actualNoOfSectors; /* Actual number of sectors available */ + FLStatus status; +} flDefragOutput; + +/*************************************************************************/ +/* Mount volume (FL_IOCTL_MOUNT_VOLUME) */ +/* Input record: */ +typedef struct { + FLByte type; /* type of operation: FL_MOUNT\FL_DISMOUNT */ +} flMountInput; +#define FL_MOUNT 0 +#define FL_DISMOUNT 1 +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* Delete logical sectors (FL_IOCTL_DELETE_SECTORS) */ +/* Input record: */ +typedef struct { + FLSDword firstSector; /* First logical sector to delete */ + FLSDword numberOfSectors; /* Number of sectors to delete */ +} flDeleteSectorsInput; +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* Format flash device (FL_IOCTL_FLASH_FORMAT) */ +/* Input record: */ +typedef struct { + FLDword dwFormatFlags; /* type of format as defined in blockdev.h */ + FLSDword sdwNoOfKeeps; + FormatParams3 * fpPtr; /* Format parameters structure (defined in flformat.h) */ +} flFlashFormatInput; +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* Erase existing disk partition (FL_IOCTL_ERASE_BD) */ +/* Input record: */ +typedef struct { + FLDword dwFlags; /* Reserved - Must be set to 0 */ +} flEraseBDInput; +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* Format flash device (FL_IOCTL_FLASH_UNFORMAT) */ +/* Input record: */ +typedef struct { + FLDword dwFlags; /* Reserved - Must be set to 0 */ +} flFlashUnformatInput; +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* BDK and BDTL protection operations: (FL_IOCTL_BINARY_HW_PROTECTION) */ +/* (FL_IOCTL_BDTL_HW_PROTECTION) */ +/* insert key \ remove key \ identify \ change key \ */ +/* change protection type \ change lock status */ +/* Input record: */ +typedef struct { + FLByte protectionType; /* Protection attributes. The following */ + /*attributes can be ored: PROTECTABLE, */ + /*READ_PROTECTED, WRITE_PROTECTED, LOCK_ENABLED*/ + /*CHANGEABLE_PROTECTION, OTW_PROTECTED, */ + FLByte key[8]; /* The new key to the change Key call */ + FLByte type; /* Operation type. available values are: */ + /*PROTECTION_INSERT_KEY, PROTECTION_REMOVE_KEY,*/ + /*PROTECTION_GET_TYPE, PROTECTION_DISABLE_LOCK,*/ + /*PROTECTION_ENABLE_LOCK, PROTECTION_CHANGE_KEY,*/ + /*PROTECTION_CHANGE_TYPE */ +} flProtectionInput; +#define PROTECTION_INSERT_KEY 0 +#define PROTECTION_REMOVE_KEY 1 +#define PROTECTION_GET_TYPE 2 +#define PROTECTION_DISABLE_LOCK 3 +#define PROTECTION_ENABLE_LOCK 4 +#define PROTECTION_CHANGE_KEY 5 +#define PROTECTION_CHANGE_TYPE 6 +#define PROTECTION_APPLY_STICKY 7 +/* Output record: */ +typedef struct { + FLWord protectionType; /* Protection attributes. The following */ + /*attributes can be ored: PROTECTABLE, */ + /*READ_PROTECTED, WRITE_PROTECTED, LOCK_ENABLED*/ + /*LOCK_ASSERTED, KEY_INSERTED, */ + /*CHANGEABLE_PROTECTION, OTW_PROTECTED, */ + /*STICKY_LOCK_ASSERTED */ + + FLStatus status; +} flProtectionOutput; + +/*************************************************************************/ +/* One Time Programing operations: (FL_IOCTL_OTP */ +/* OTP size \ OTP read \ OTP write and lock */ +/* Input record: */ +typedef struct { + FLDword length; /* Length to read\write\size */ + FLDword usedSize; /* The written size of the area \ Area offset */ + FLByte lockedFlag; /* The area condition LOCKED_OTP (flflash.h) */ + FLByte FAR1* buffer; /* pointer to user buffer */ + FLWord type; /* defined bellow */ +} flOtpInput; +#define OTP_SIZE 1 +#define OTP_READ 2 +#define OTP_WRITE_LOCK 3 +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* One Time Programing operations: (FL_IOCTL_MCOTP */ +/* OTP size \ OTP read \ OTP write and lock */ +/* Input record: */ +typedef struct { + FLWord wPageNo ; /* Page to write */ + FLDword length; /* Length to read\write\size */ + FLDword usedSize; /* The written size of the area \ Area offset */ + FLByte lockedFlag; /* The area condition LOCKED_OTP (flflash.h) */ + FLByte FAR1* buffer; /* pointer to user buffer */ + FLWord type; /* defined bellow */ +} flMCOtpInput; + +#define MCOTP_SIZE 1 +#define MCOTP_READ 2 +#define MCOTP_WRITE_LOCK 3 +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* Read customer ID (FL_IOCTL_CUSTOMER_ID) */ +/* Input record: NULL */ +/* Output record: */ +typedef struct { + FLByte id[4]; + FLStatus status; +} flCustomerIdOutput; + +/*************************************************************************/ +/* Read unique ID (FL_IOCTL_UNIQUE_ID) */ +/* Input record: NULL */ +/* Output record: */ +typedef struct { + FLByte id[16]; + FLStatus status; +} flUniqueIdOutput; + +/*************************************************************************/ +/* Read unique ID (FL_IOCTL_NUMBER_OF_PARTITIONS) */ +/* Input record: NULL */ +/* Output record: */ +typedef struct { + FLByte noOfPartitions; + FLStatus status; +} flCountPartitionsOutput; + +/*************************************************************************/ +/* Place the device into and out of the power down mode (FL_IOCTL_DEEP_POWER_DOWN_MODE) */ + +/* Input record: */ +typedef struct { + FLByte state; /* DEEP_POWER_DOWN - low power consumption */ + /* EXIT_DEEP_POWER_DOWN - regular power consumption */ +} flPowerDownInput; +/* Output record: flOutputStatusRecord */ + +#ifdef BDK_ACCESS +/*************************************************************************/ +/* BDK operations read\write\erase\create (FL_IOCTL_BDK_OPERATION) */ +/* Input record: */ +typedef struct { + FLByte type; /* type of operation. Available are: */ + /*BDK_INIT_READ, BDK_READ, BDK_INIT_WRITE, */ + /*BDK_WRITE, BDK_ERASE, BDK_CREATE, */ + /* BDK_GET_INFO */ + BDKStruct bdkStruct; /* parameters for BDK operations */ +} flBDKOperationInput; +#define BDK_INIT_READ 0 +#define BDK_READ 1 +#define BDK_INIT_WRITE 2 +#define BDK_WRITE 3 +#define BDK_ERASE 4 +#define BDK_CREATE 5 +#define BDK_GET_INFO 6 +/* Output record: flOutputStatusRecord */ +#endif /*BDK_ACCESS*/ + +/******************************************************************************/ +/* Set environment variables values (FL_IOCTL_EXTENDED_ENVIRONMENT_VARIABLES) */ +/* Input record: */ +typedef struct { + FLEnvVars varName; /* Enum describing the variable */ + FLDword varValue; /* New variable value */ + FLDword flags; /* FL_APPLY_TO_ALL - All socket and partitions */ + /* FL_APPLY_TO_SOCKET - All socket and partitions */ + /* FL_APPLY_TO_VOLUME - All socket and partitions */ +} flExtendedEnvVarsInput; +#define FL_APPLY_TO_ALL 1 +#define FL_APPLY_TO_SOCKET 2 +#define FL_APPLY_TO_VOLUME 3 +/* Output record: */ +typedef struct { + FLDword prevValue; /* The previous value of the variable */ + FLStatus status; +} flExtendedEnvVarsOutput; + +/******************************************************************************/ +/* Write IPL area for docPlus family (FL_IOCTL_WRITE_IPL) */ +/* Input record: */ +typedef struct { + FLByte FAR1* bBufPtr; /* IPL data buffer */ + FLDword dwFlags; /* IPL flags. Available are: FL_IPL_MODE_NORMAL, */ + /* FL_DOC_IPL_PAGED_RAM_MODE,FL_IPL_VIRTUAL_RAM_MODE*/ + /* FL_IPL_128K_WINDOW_MODE, FL_IPL_SWAP_BYTES_MODE*/ + FLSDword sdwLength; /* IPL length */ + FLSDword sdwOffset; /* IPL offset */ +} flIPLInput; +/* Output record: flOutputStatusRecord */ + +/******************************************************************************/ +/* Check quick mount validity (FL_IOCTL_IS_QUICK_MOUNT_VALID) */ +/* Input record: NULL */ +/* Output record: */ +typedef struct { + FLByte mode; /* Either FL_ON for valid and FL_OFF for not */ + FLStatus status; +} flGetQuickMountOutput; + +/******************************************************************************/ +/* Write quick mount data (FL_IOCTL_WRITE_QUICK_MOUNT_INFO) */ +/* Input record: NULL */ +/* Output record: flOutputStatusRecord */ + +/******************************************************************************/ +/* Clear quick mount data (FL_IOCTL_CLEAR_QUICK_MOUNT_INFO) */ +/* Input record: NULL */ +/* Output record: flOutputStatusRecord */ + +/*************************************************************************/ +/* read & write logical sectors (FL_IOCTL_READ_SECTORS & FL_IOCTL_WRITE_SECTORS) */ +/* Input record: */ +typedef struct { + FLSDword firstSector; /* first logical sector */ + FLSDword numberOfSectors; /* Number of sectors to read\write */ + FLByte FAR1 *buf; /* Data to read\write */ +} flReadWriteInput; +/* Output record: */ +typedef struct { + FLSDword numberOfSectors; /* Actual Number of sectors read\written */ + FLStatus status; +} flReadWriteOutput; + +/******************************************************************************/ +/* Check partition for power failures symptoms (FL_IOCTL_VERIFY_VOLUME) */ +/* Input record: NULL */ +typedef struct { + FLDword flags; /* Must be set to 0 */ +} flVerifyVolumeInput; +/* Output record: */ +typedef struct { + void FAR1* callBack; /* Must be set to null */ + FLStatus status; +} flVerifyVolumeOutput; + +/******************************************************************************/ +/* Plant user defined memory access routines (FL_IOCTL_SET_ACCESS_ROUTINE) */ +/* Input record: */ +typedef struct { + FLAccessStruct FAR1 * structPtr; /* Pointer memory access routine struct */ +} flSetMemoryAccessInput; +/* Output record: flOutputStatusRecord */ + +/******************************************************************************/ +/* Plant user defined memory access routines (FL_IOCTL_GET_ACCESS_ROUTINE) */ +/* Input record: NULL */ +/* Output record: */ +typedef struct { + FLAccessStruct FAR1 * structPtr; /* Pointer memory access routine struct */ + FLStatus status; +} flGetMemoryAccessOutput; + +/******************************************************************************/ +/* Perform ATA command using the pass-through mechanism (FL_IOCTL_PASS_THROUGH) */ +/* Input record: */ +typedef struct { + DOCH_PassThru_Op passThruOP; /*0 - No Data(CTRL), 1 - Data IN, 2 - Data OUT*/ + DOCH_PassThru_Int useInterrupt; /*0 - Do NOT use interrupt, 1- USE interrupt*/ + FLSDword multSectorFrame;/*DRQ size exponent (power of 2)*/ + DOCH_Registers* in_regs; /*ATA input registers*/ + FLSDword secNum; /*Number of sectors in user buffer*/ + void* userBuff; /* User buffer (for read\write) */ +} flAtaPassthroughInput; +/* Output record: */ +typedef struct { + DOCH_Registers* out_regs; /*ATA input registers*/ + FLStatus status; +} flAtaPassthroughOutput; + + +#endif /* FLIOCTL_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flstdcmp.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flstdcmp.h new file mode 100755 index 00000000..85e3a405 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flstdcmp.h @@ -0,0 +1,95 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/version 6.3-up/TrueFFS/src/flstdcmp.h-arc $ + * + * Rev 1.25 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.24 Feb 28 2007 09:53:48 einat.avidan + * No change + * + * Rev 1.23.1.0 Oct 22 2006 14:54:06 yaniv.iarovici + * Changed flRegisterDOCH3SOC()return type to FLStatus. + * + * Rev 1.23 Oct 09 2006 14:05:48 yaniv.iarovici + * 1. Removed #ifndef FL_DO_NOT_SUPPORT_H3 + * 2. Removed legacy devices related code and definitions + * + * Rev 1.22 Sep 13 2006 10:30:46 yaniv.iarovici + * Fix compilation warnings + * + * Rev 1.21 Sep 11 2006 13:45:22 yaniv.iarovici + * Legal header added + * + * Rev 1.20 Aug 09 2006 16:52:50 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#ifndef FLSTDCOMP_H +#define FLSTDCOMP_H + +#include "doch_api.h" + +/************************************************************************/ +/* Registration routines for socket I/F supplied with TrueFFS */ +/************************************************************************/ + +FLStatus flRegisterDOCH3SOC(FLDword dwAddress); /* see TFFS_API.C */ + +/* DiskOnChip H3 Register Routine */ +FLStatus flRegisterDochParams(void); + +/* DiskOnChip H3 Access layer routine - not used in 7.x version */ +#ifdef DOCH_USE_FUNC +#define flRegisterDOCH_Hal_SPI() ((hal_init_spi(0) == 0) ? DOCH_OK : DOCH_GeneralFailure) +#define flRegisterDOCH_Hal_SIM() ((hal_init_sim(0) == 0) ? DOCH_OK : DOCH_GeneralFailure) +#define flRegisterDOCH_Hal_NOR() ((hal_init_nor(0) == 0) ? DOCH_OK : DOCH_GeneralFailure) +#else /*DOCH_USE_FUNC*/ +#define flRegisterDOCH_Hal_SPI() ((hal_init_spi_noFunc(0) == 0) ? DOCH_OK : DOCH_GeneralFailure) +#define flRegisterDOCH_Hal_SIM() ((hal_init_sim_noFunc(0) == 0) ? DOCH_OK : DOCH_GeneralFailure) +#define flRegisterDOCH_Hal_NOR() ((hal_init_nor_noFunc(0) == 0) ? DOCH_OK : DOCH_GeneralFailure) +#endif /*DOCH_USE_FUNC*/ + +#endif /* FLSTDCOMP_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flstruct.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flstruct.h new file mode 100755 index 00000000..a5b976d6 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flstruct.h @@ -0,0 +1,847 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/common/flstruct.h-arc $ + * + * Rev 1.13 Oct 30 2007 17:08:54 einat.avidan + * new fast area type - FL_LENGTH_ALL + * + * Rev 1.12 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.11 Oct 11 2007 18:50:24 Einat.Avidan + * add compilation flags for SOTP and SLPP + * + * Rev 1.10 Mar 13 2007 13:47:18 einat.avidan + * add support for SLPP + * + * Rev 1.9 Feb 28 2007 09:53:48 einat.avidan + * No change + * + * Rev 1.7.1.3 Sep 11 2006 13:45:24 yaniv.iarovici + * Legal header added + * + * Rev 1.7.1.2 Sep 03 2006 14:45:12 Yaniv.Iarovici + * 1. Added '#define FL_EXT_INFO_NO_SPEC_PART 0xFF'. + * (Indicates SDK not to retrieve specific partition info in certain APIs) + * 2. Encapsulate '#define TL_LEAVE_BINARY_AREA' and '#define TL_LEAVE_SOME_BINARY_AREA' + * under '#ifdef BDK_ACCESS'. + * 3. Define 'TL_LEAVE_SOME_PARTITIONS' with value of 0x9. + * + * Rev 1.7.1.1 Aug 16 2006 08:47:42 Yaniv.Iarovici + * 1) Add '#define TL_LEAVE_SOME_PARTITIONS TL_LEAVE_SOME_BINARY_AREA' + * 2) Encapsulate BDK related defines under '#ifdef BDK_ACCESS'. + * + * Rev 1.7.1.0 Aug 08 2006 15:55:30 Polina.Marimont + * DOC Driver 1.0 initial + */ + +#ifndef FLSTRUCT_H +#define FLSTRUCT_H + +#include "flcommon.h" + + +/**************************************************************************/ +/* Function opcode definitions: */ +/* All TrueFFS functions has a uniques opcodes. The following enum */ +/* defines all the function calls used by the TrueFFS SDK API. */ +/* Note: */ +/* The order of the enum bellow should be strictly kept since the bdcall */ +/* function utilizes the index values to simplify the function search */ +/**************************************************************************/ +typedef enum { +/* The following routines are files related routines */ + + /*********/ + /* FILES */ + /*********/ + + FL_READ_FILE = 0, + FL_WRITE_FILE, + FL_SPLIT_FILE, + FL_JOIN_FILE, + FL_SEEK_FILE, + FL_FIND_NEXT_FILE, + FL_FIND_FILE, + FL_TRUNCATE_FILE, + INDEX_WRITE_FILE_START = 100, + FL_CLOSE_FILE, + FL_FLUSH_FILE, + INDEX_OPENFILES_END = 200, + FL_OPEN_FILE, + FL_DELETE_FILE, + FL_FIND_FIRST_FILE, + FL_GET_DISK_INFO, + FL_RENAME_FILE, + FL_MAKE_DIR, + FL_REMOVE_DIR, + FL_FLUSH_BUFFER, + FL_CLOSE_ALL_FILES, + FL_FLUSH_ALL_FILES, + FL_OPEN_DIRECTORY, + FL_OPEN_MM_FILE, + FL_LAST_FAT_FUNCTION = 300, + + /* The following routines will not perform valid partition check */ + /**********/ + /* BINARY */ + /**********/ + INDEX_BINARY_START = 400, + FL_BINARY_WRITE_INIT, + FL_BINARY_WRITE_BLOCK, + FL_BINARY_CREATE, + FL_BINARY_ERASE, + FL_BINARY_PROTECTION_CHANGE_KEY, + FL_BINARY_PROTECTION_CHANGE_LOCK, + FL_BINARY_PROTECTION_SET_TYPE, + INDEX_BINARY_WRITE_END = 500, + FL_BINARY_READ_INIT, + FL_BINARY_READ_BLOCK, + FL_BINARY_PARTITION_INFO, + FL_BINARY_PROTECTION_GET_TYPE, + FL_BINARY_PROTECTION_INSERT_KEY, + FL_BINARY_PROTECTION_REMOVE_KEY, + INDEX_BINARY_END = 600, + +/* The following routines must be called with partition number 0 */ + INDEX_NEED_PARTITION_0_START = 700, + /* OTP */ + FL_OTP_SIZE, + FL_OTP_READ, + FL_OTP_WRITE, + FL_WRITE_IPL, + FL_READ_IPL, + /* PHYSICAL */ + FL_DEEP_POWER_DOWN_MODE, + FL_GET_PHYSICAL_INFO, + FL_PHYSICAL_READ, + FL_PHYSICAL_WRITE, + FL_PHYSICAL_ERASE, + FL_UPDATE_SOCKET_PARAMS, + FL_UNIQUE_ID, + FL_CUSTOMER_ID, + BD_FORMAT_VOLUME, + BD_FORMAT_PHYSICAL_DRIVE, + FL_PLACE_EXB, + FL_READ_BBT, + FL_WRITE_BBT, + FL_GET_EXTENDED_DISK_INFO, + FL_PROTECTION_STICKY_LOCK, + BD_FLASH_FORMAT, + BD_UNFORMAT, + FL_HW_CONFIG, + FL_RECOVER_FROM_POWER_LOSS, + FL_IPL_PROTECTION_GET_TYPE, + FL_IPL_PROTECTION_REMOVE_KEY, + FL_IPL_PROTECTION_INSERT_KEY, + FL_IPL_PROTECTION_CHANGE_KEY, + FL_IPL_PROTECTION_CHANGE_TYPE, + + INDEX_NEED_PARTITION_0_END = 800, +/* The following routines will go through the volume validity check */ + /* PROTECTION */ + FL_PROTECTION_GET_TYPE, + FL_PROTECTION_REMOVE_KEY, + FL_PROTECTION_INSERT_KEY, + FL_PROTECTION_SET_LOCK, + FL_PROTECTION_CHANGE_KEY, + FL_PROTECTION_CHANGE_TYPE, + FL_COUNT_VOLUMES, + FL_INQUIRE_CAPABILITIES, + /* BDTL */ + FL_MOUNT_VOLUME, + FL_ABS_MOUNT, + BD_FORMAT_LOGICAL_DRIVE, + FL_WRITE_PROTECTION, + FL_DISMOUNT_VOLUME, + FL_CHECK_VOLUME, + FL_DEFRAGMENT_VOLUME, + FL_ABS_WRITE, + FL_ABS_DELETE, + FL_ABS_READ, + FL_ABS_ADDRESS, + FL_GET_BPB, + FL_SECTORS_IN_VOLUME, + FL_VOLUME_INFO, + FL_VERIFY_VOLUME, + FL_CLEAR_QUICK_MOUNT_INFO, + FL_RUGGEDIZE_OPERATION, /* not used */ + FL_ABS_WRITE_UNCOMMITED, /* not used */ + FL_ABS_DELETE_UNCOMMITED, /* not used */ + FL_ABS_READ_RUGGEDIZED, /* not used */ + FL_GET_QUICK_MOUNT_STATUS, + FL_WRITE_QUICK_MOUNT_INFO, + FL_LOAD_VOLUMES_CACHE, + FL_COMPLETE_OPERATION, + FL_FIND_LOGICAL_PARTITION, + FL_CREATE_LOGICAL_PARTITIONS, + FL_FORMAT_FS, + FL_GET_BD_VERSION, + FL_GET_FS_VERSION, + BD_ERASE_BD, + FL_ABS_SECURE_DELETE, + FL_MCOTP_SIZE,/* not used - must gone */ + FL_MCOTP_READ,/* not used - must gone */ + FL_MCOTP_WRITE,/* not used - must gone */ +#ifdef FL_SLPP + FL_SLPP_UNLOCK_RANGE, + FL_SLPP_LOCK_RANGE, + FL_SLPP_UNLOCK_ENTIRE_PARTITION, + FL_SLPP_STICKY_LOCK_RANGE, + FL_SLPP_REPORT_LOCKED_RANGES, +#endif /*FL_SLPP*/ + FL_DOCH_PASS_THROUGH /* DOCH only */ +} FLFunctionNo; + + + +/**************************************************************************/ +/* Structures and defines for GetInfo routines: */ +/* GetInfo routines are used by several TrueFFS packages. */ +/* The output structures and values are defined below */ +/**************************************************************************/ + +/*---------------------------------------------------------*/ +/* V o l u m e I n f o R e c o r d */ +/* */ +/* A structure that holds general information about the */ +/* media. The information includes Physical Info (see */ +/* flGetPhysicalInfo), Logical partition (number of sectors*/ +/* and CHS), boot area size, S/W versions Media life-time */ +/* etc. */ +/* A pointer to this structure is passed to the function */ +/* flVolumeInfo where it receives the relevant data. */ +/*---------------------------------------------------------*/ + +typedef struct { + FLDword logicalSectors; /* number of logical sectors */ + FLDword bootAreaSize; /* boot area size */ + FLDword baseAddress; /* physical base address */ + FLWord flashType; /* JEDEC id of the flash */ + FLDword dwPhysicalSize; /* physical size of the media */ + FLDword dwPhysicalUnitSize;/* Erasable block size */ + FLByte DOCType; /* DiskOnChip type (MDoc/Doc2000) */ + FLSByte lifeTime; /* Life time indicator for the media (1-10) */ + /* 1 - the media is fresh, */ + /* 10 - the media is close to its end of life */ + FLSByte driverVer[10]; /* driver version (NULL terminated string) */ + FLSByte OSAKVer[10]; /* TrueFFS version that driver is based on */ + /* (NULL terminated string) */ + FLDword cylinders; /* Media..... */ + FLDword heads; /* geometry...... */ + FLDword sectors; /* parameters. */ +} VolumeInfoRecord; + + +/*---------------------------------------------------------*/ +/* P h y s i c a l I n f o */ +/* */ +/* A structure that holds physical information about the */ +/* media. The information includes JEDEC ID, unit size and */ +/* media size. Pointer to this structure is passed to the */ +/* function flGetPhysicalInfo where it receives the */ +/* relevant data. */ +/*---------------------------------------------------------*/ + +typedef struct { + FLWord type; /* Flash device type (JEDEC id) */ + FLByte mediaType; /* type of media see below */ + FLDword dwUnitSize; /* Smallest physically erasable size in sectors */ + FLDword dwMediaSize; /* media size in sectors */ + FLDword dwChipSize; /* individual chip size in sectors */ + FLDword interleaving; /* device interleaving */ +} PhysicalInfo; + + + +/*---------------------------------------------------------*/ +/* f l E x t e n d e d D i s k I n f o */ +/* */ +/* This structure supplies very low-level information on */ +/* the device */ +/* */ +/* Note: This structure is used for M-Systems low level */ +/* utilities. It is subject to chages from one TrueFFS*/ +/* version to the other. */ +/* */ +/*---------------------------------------------------------*/ + +typedef struct { + + /******************************************/ + /* Fields that belong to the entire media */ + /******************************************/ + FLDword dwStructSize; /* INPUT - Size of the given structure */ + FLDword dwTLType; /* See definitions in flflash.h */ + FLDword dwFormatFlags; /* Format attributes for the entire media */ + FLDword dwTrueFFSVersion; /* Version of OSAK used to format the media */ + FLDword dwFlashTechnology; /* Flash technology supported properties */ + + FLDword dwType; /* Flash type */ + FLDword dwSubType; /* Sub Flash type */ + FLByte bMediaType; /* Controller family */ + FLByte bNoOfFloors; /* Number of floors in the device */ + FLByte bNoOfPlanes; /* Number of flash planes */ + FLByte bNoOfBanks; /* Number of flash banks */ + FLByte bDataBusWidth; /* Value of the IF_CFG (either 8 or 16 bits)*/ + FLByte bSectorsPerPage; /* Number of sectors in a flash page */ + FLByte bSharedSectors; /* The minimal number of logical sectors */ + /* that might be affected by one another */ + /* write operation. */ + FLByte bFastAreaSharedSectors; /* Minimal number of sectors that can affect */ + /* one another when written in fast mode. */ + FLByte bMaxRelatedSectors; /* Max number of sectors that might share */ + /* the same write operation or might be */ + /* affected by each other write operation. */ + FLDword dwIPLSize; /* Number of bytes of SRAM in the device */ + FLByte bChangeableProtectedAreas; /* Number of protection areas capable */ + /* of changing. */ + FLByte btotalProtectedAreas; /* Total number of protection areas */ + FLDword dwUnitsInFirstFloor; /* Number of units in the first floor */ + FLDword dwUnitSize; /* Size of logical erasable unit */ + FLDword dwMaxBadPercentage; /* Flash guaranteed worst bad blocks percentage */ + FLByte bNoOfBinaryPartitions; /* Number of binary partition on the media */ + FLByte bNoOfDiskPartitions; /* Number of disk partition on the media */ + FLByte bBlockMultiplierBits; /* no of bits used to represent the time a */ + /* flash logical unit fits inside in a TL */ + /* erasable unit. */ + FLByte dwPercentUsed; /* Percent of the media to be exported */ + FLByte bHeaderUnits; /* Number of units reserved in the begining */ + /* of each floor for the media header */ + FLWord wHeaderLocation; /* Unit number where the header of the */ + /* current floor resides. In case all floors*/ + /* are requested, the value should indicate */ + /* the location of the header in the first */ + /* floor. */ + + FLByte bProgrammerNamePtr[4]; /* Programmer name */ + FLByte bProgrammerVersionPtr[4]; /* Programmer version */ + + /************************************************/ + /* Fields that belong to the specific partition */ + /************************************************/ + + FLDword dwVirtualUnits; /* Virtual size exported by the translation layer */ + /* Note some units are smaller then others */ + FLDword dwFastUnits; /* Number of virtual units that are fast units */ + FLDword dwFirstQuickMountUnit; /* First unit used for the quick mount data */ + FLDword dwFirstUnit; /* First unit of the partition */ + FLDword dwLastUnit; /* Last unit of the partition */ + FLDword dwSpareUnits; /* Number of spare units requested by the user */ + FLDword dwTransferUnits; /* Number of transfer units used for chaining */ + FLDword dwPartitionFlags;/* See list above "Partition flags" */ + FLDword dwNormalAreaUnitSize; /* Logical size of a TL normal unit */ + FLDword dwFastAreaLogicalUnitSize; /* Logical size of a TL fast unit */ + FLDword dwFastAreaVirtualFactor; /* Virtual unit factor between fast */ + /* and normal area (power of 2) */ + + FLByte bMinSectorsForFolding; /* Number of sectors to be copied */ + /* together in a folding operation */ + FLByte bMinSectorsForNextWrite; /* For performance reasons the TL */ + /* decide to reduce the above value */ + FLByte bfastAreaMinSectorsForNextWrite; /* For performance reasons the TL */ + /* decide to reduce the above value */ + + /******************************************/ + /* Fields that are valid only after mount */ + /******************************************/ + + FLDword dwUsedUnits; /* Number of used virtual chains */ + FLDword dwFreeUnits; /* Number of currently free units */ + FLByte bNeededFreeUnits; /* Minimal number of free units */ + /* before folding */ + FLDword dwUMDBBTSector; /* Location of latest UMDBBT sector */ +} FLExtendedDiskInfo; + +/* media types */ +#define FL_NOT_DOC 0 +#define FL_DOC 1 +#define FL_MDOC 2 +#define FL_DOC2000TSOP 3 +#define FL_MDOCP_16 4 +#define FL_MDOCP 5 +#define FL_DOC_H1 6 +#define FL_MDOC512_G3 7 +#define FL_MDOC256_P3 8 +#define FL_MDOC256_G3 9 +#define FL_MDOC128_P3 10 +#define FL_AMD_NOR 11 +#define FL_SEIJA 12 +#define FL_MDOC_G4 13 +#define FL_MDOC_P4 14 +#define FL_H3 15 + +/*Defines for flExtendedDiskInfo*/ +#define SAFTL_ADVANCED_MATCHING 0x00100000L +#define SAFTL_QUICK_MOUNT 0x10000000L + +#define FL_BDK_PARTITION 1 +#define FL_DISK_PARTITION 0 +#define FL_ALL_FLOORS 0xff +#define BINARY_SPARE_BLOCKS_SIGN "S4BB" /* Must be the same as BINARY_SPARE_BLOCKS_SIGN (FLFORMAT.H) */ + +#define FL_EXT_INFO_NO_SPEC_PART 0xFF /*Indicates SDK not to retrieve specific partition info*/ + + +/**************************************************************************/ +/* Structures and defines for Format routines: */ +/**************************************************************************/ + +typedef FLStatus (*FLProgressCallback)(FLWord totalUnitsToFormat, FLWord totalUnitsFormattedSoFar); + +/*----------------------------------------------*/ +/* User BDTL Partition Format Parameters record */ +/*----------------------------------------------*/ + +typedef struct { +FLDword length; + /* The size in bytes of the usable storage space. The size + rounded upwards to a multiplication of a block size. + The size of the last partition will calculated automatically, + but if the requested size is greater then the remaining space + an error code will be returned,. Requesting zero size for any + partition but the last will generate an flBadParameters status. */ +FLDword fastAreaLength; +FLWord lengthType; +FLWord fastAreaLengthType; +FLWord fastAreaVirtualFactor; /* Should be set to FL_NORMAL_SPACING */ +FLWord noOfSpareUnits; + /* BDTL needs at least one spare erase unit in order to function + as a read/write media. It is possible to specify more than one + spare unit, which takes more media space. The advantage of + specifying more than one spare unit is that if one of the flash + erase units becomes bad and un-erasable in the future, then one + of the spare units can replace it. In that case, a second spare + unit enables TrueFFS to continue its read/write functionality, + whereas if no second spare unit is available the media goes into + read-only mode. The standard value used is 3 */ + +FLDword BDTLFP_0_RFU_0; /* Reserved 0 */ +FLDword BDTLFP_1_RFU_0; /* Reserved 0 */ +FLDword BDTLFP_2_RFU_0; /* Reserved 0 */ +FLDword BDTLFP_3_RFU_0; /* Reserved 0 */ + +FLByte protectionKey[8]; /* The key for the protection*/ +FLByte protectionType; + /* PROTECTABLE - Can receive protection */ + /* READ_PROTECTED - Protect against read operations */ + /* WRITE_PROTECTED - Protect against write operations */ + /* LOCK_ENABLED - Enables the hardware lock signal */ + /* PROTECTABLE - This partition can be protected */ + /* CHANGEABLE_PROTECTION - protection type can be changed */ + /* The ratio between the real media size and the virtual size + reported to the file system when compression is active. */ +} BDTLPartitionFormatParams3; + +/*------------------------------------------------*/ +/* User binary Partition Format Parameters record */ +/*------------------------------------------------*/ + +typedef struct { +FLDword length; /* Required number of usable bytes (rounded to units) */ + /* in the partition. */ + +FLWord lengthType; /* Must be FL_LENGTH_IN_BYTES */ + +FLByte sign[4]; /* signature of the binary partition to format. + The signature 0xFFFF FFFF is not a valid signature */ + +FLDword flags; /* TL_NORMAL_FORMAT / TL_SPL_FORMAT */ + +FLWord spareBlocks; /* Spare blocks for DBB support */ + +FLDword BDKFP_0_RFU_0; /* Reserved 0 */ +FLDword BDKFP_1_RFU_0; /* Reserved 0 */ +FLDword BDKFP_2_RFU_0; /* Reserved 0 */ +FLDword BDKFP_3_RFU_0; /* Reserved 0 */ + +/* TL_NORMAL_FORMAT / TL_SPL_FORMAT */ + +FLByte protectionKey[8]; /* The key for the protection*/ +FLByte protectionType; + /* PROTECTABLE - Can receive protection */ + /* READ_PROTECTED - Protect against read operations */ + /* WRITE_PROTECTED - Protect against write operations */ + /* LOCK_ENABLED - Enables the hardware lock signal */ + /* PROTECTABLE - This partition can be protected */ + /* CHANGEABLE_PROTECTION - protection type can be changed */ +} BinaryPartitionFormatParams3; + + +/*---------------------------------------------------------*/ +/* User Format Parameters record for flFlashFormat routine */ +/*---------------------------------------------------------*/ + + +typedef struct { + +/*****************************/ +/* Device formatting section */ +/*****************************/ + +FLByte percentUse; + /* NAND flash inherently contains some bad blocks. TrueFFS handles + * those blocks by managing a pool of spare blocks also called transfer + * units. This format parameter specifies the percentage of the media + * to use. + * + * Starting from TrueFFS 6.3.0 alpha 4 this field is no longer a + * configurable formatting argument. You must set this field to + * TL_DEFAULT_PERCENTAGE, letting TrueFFS to choose this value for you. + */ + +FLByte noOfBDTLPartitions; + /* Indicates the number of Disk partition (1 to 4). */ + +FLByte noOfBinaryPartitions; + /* Indicates the number of binary partitions (up to 3). 0 will + * cause formatting with no binary partition. This value is ignored + * if TL_LEAVE_BINARY_AREA flag is set in the irFlags field the ioreq + */ + +BDTLPartitionFormatParams3 FAR2* BDTLPartitionInfo; + /* BDTL partition information array */ + +BinaryPartitionFormatParams3 FAR2* binaryPartitionInfo; + /* Binary partition information array*/ + +/***********************************/ +/* Special format features section */ +/***********************************/ + +FLByte cascadedDeviceNo; /* Not used */ + +FLByte noOfCascadedDevices; /* Not used */ + +FLProgressCallback progressCallback; + /* Progress callback routine, will be called if not NULL. + The callback routine is called after erasing each unit, + and its parameters are the total number of erase units + to format and the number erased so far. + The callback routine returns a Status value. A value of + OK (0) allows formatting to continue. Any other value + will abort the formatting with the returned status code. */ + /* In case the FL_REPORT_MOUNT_PROGRESS compilation flag is set the + routine will also report the mount progress of the mount routine + for each of the Disk partitions. A 0,0 return values will report + the end of a format status and of a mount operation */ + +FLDword FP_0_RFU_0; /* Reserved 0 */ + +FLDword FP_1_RFU_0; /* Reserved 0 */ + +/* Note the following section is not used by for DiskOnChips */ +/*************************************************************/ + +FLSDword bootImageLen; /* Reserved 0 */ + +FLDword vmAddressingLimit; /* Reserved 0 */ + +FLWord embeddedCISlength; /* Reserved 0 */ + +FLByte FAR1 * embeddedCIS; /* Reserved NULL */ +} FormatParams3; + +/*--------------------------------------------------*/ +/* Flags for format routine (non partition related) */ +/*--------------------------------------------------*/ +#ifdef BDK_ACCESS +#define TL_LEAVE_BINARY_AREA 0x8 /* Is assumed to be a single bit */ +#define TL_LEAVE_SOME_BINARY_AREA 0x9 /* Must include TL_LEAVE_BINARY_AREA bits */ +#endif /*BDK_ACCESS*/ + +#define TL_SINGLE_FLOOR 0x10 /* Format only a selection of the floors */ +#define TL_DO_NOT_PERFORM_DOWNLOAD 0x20 /* Do not issue a download operation at */ + /* end of the format routine. */ +#define TL_FAIL_ON_UNMARKED_BB 0x80 /* Fail in case an unmarked bad block is */ + /* Found. */ + +#define TL_LEAVE_SOME_PARTITIONS 0x9 + +/*--------------------------------------------------*/ +/* Formatting parameter structure definition */ +/*--------------------------------------------------*/ +#define FL_LENGTH_IN_BYTES 0 +#define FL_LENGTH_IN_SECTORS 1 +#define FL_LENGTH_IN_UNITS 2 +#define FL_LENGTH_IN_PERCENTS 3 +#define FL_LENGTH_IN_CYLINDERS 10 +#define FL_LENGTH_ALL 20 + +/*--------------------------------------------------*/ +/* Internal Partition flags - N O T F O R U S E */ +/*--------------------------------------------------*/ +#define TL_SIMPLE_MATCHING 0x10 /* Use simple matching for partition */ +#define TL_FORCE_REL 0x20 /* Use RELIABLE mode */ +#define TL_FAST_MODE 0x40 /* Use FAST mode */ +#define TL_NO_PLANES 0x80 /* Do not match blocks for planes */ + +/*--------------------------------------------------*/ +/* External Disk Partition Flags (TL_NORMAL_FORMAT):*/ +/*--------------------------------------------------*/ +#define TL_NORMAL_FORMAT 0 + +#ifdef BDK_ACCESS +/*--------------------------------------------------*/ +/* External Binary Partition Flags */ +/* (TL_NORMAL_FORMAT / TL_SPL_FORMAT) */ +/*--------------------------------------------------*/ +#define TL_SPL_FORMAT (TL_SIMPLE_MATCHING | TL_NO_PLANES | TL_FORCE_REL) /* SPL partition */ +#endif /*BDK_ACCESS*/ + +/*--------------------------------------------------*/ +/* External spacing factors - only 1 value */ +/*--------------------------------------------------*/ +#define FL_NORMAL_SPACING 1 + +/*--------------------------------------------------*/ +/* Standard initializer for */ +/* BDTLPartitionFormatParams3 structure */ +/*--------------------------------------------------*/ + +#define TL_DEFAULT_PERCENTAGE 0 /* Use default percentage of the media */ +#define TL_NO_BOOST 0 /* Do not use any performance boost */ +#define TL_BASIC_BOOST 1 /* Use basic 1% performance boost */ +#define TL_ENHANCED_PERFORMANCE 100 /* Define as enhanced performance partition */ + +#define TL_BDTL_STD_SPACE_FACTOR FL_NORMAL_SPACING +#define TL_BDTL_STD_SPARE_UNITS_NO 3 +#define STD_BDTL_PARAMS3 {0, /* Total Length */ \ + 0, /* Fast Length */ \ + FL_LENGTH_IN_BYTES, /* Total Length type */ \ + FL_LENGTH_IN_SECTORS, /* Fast Length type */ \ + TL_BDTL_STD_SPACE_FACTOR,/* Spaced Factor */ \ + TL_BDTL_STD_SPARE_UNITS_NO,/* No of spare units */ \ + 0,0,0,0, /* Reserved 0 */ \ + {0,0,0,0,0,0,0,0},0} /* No H/W protection */ + +/*--------------------------------------------------*/ +/* Standard initializer for */ +/* BinaryPartitionFormatParams3 structure */ +/*--------------------------------------------------*/ +#define TL_BDK_STD_SPARE_BLOCKS_NO 1 +#define STD_BINARY_PARAMS3 {0, /* Partition length */ \ + FL_LENGTH_IN_BYTES, /* Partition length type */ \ + {'B','I','P','O'}, /* Signature */ \ + 0, /* 0 -normal partition , TL_SPL_FORMAT for SPL Partition */ \ + TL_BDK_STD_SPARE_BLOCKS_NO,/* Number of spare blocks */ \ + 0,0,0,0, /* Reserved 0 */ \ + {0,0,0,0,0,0,0,0}, /* Protection key */ \ + 0} /* Protection type */ \ + +/*--------------------------------------------------*/ +/* Standard initializer for FormatParams3 structure */ +/*--------------------------------------------------*/ +#define STD_FORMAT_PARAMS3 {TL_DEFAULT_PERCENTAGE, /* Percent used */ \ + 1, /* No of Disk Partitions */ \ + 0, /* No of Binary Partitions */ \ + NULL, /* Disk partition structure */ \ + NULL, /* Binary partition structure */ \ + 0, /* This cascaded device */ \ + 0, /* Total cascaded devices */ \ + NULL, /* Progress call back */ \ + 0, 0, /* Reserved 0 */ \ + 0, 0, 0, NULL} /* Reserved 0 */ + + + +#ifdef BDK_ACCESS +/**************************************************************************/ +/* Structures and defines for BDK routines: */ +/**************************************************************************/ +#define BDK_SIGNATURE_NAME 4 + +typedef struct { + FLByte oldSign[BDK_SIGNATURE_NAME]; + FLByte newSign[BDK_SIGNATURE_NAME]; + FLByte signOffset; + FLDword startingBlock; + FLDword length; + FLByte flags; + FLByte FAR1 *bdkBuffer; +} BDKStruct; + +#define ERASE_BEFORE_WRITE 8 + +#endif /*BDK_ACCESS*/ + + +/**************************************************************************/ +/* Defines for Defrag routines: */ +/**************************************************************************/ +#define FL_MINIMAL_DEFRAGMENTATION -1 +#define FL_MAXIMUM_DEFRAGMENTATION -20 +#define FL_STATIC_WEAR_LEVELING_DELAYED -2 +#define FL_STATIC_WEAR_LEVELING_NOW -3 +#define FL_STATIC_WEAR_LEVELING_ON -4 +#define FL_STATIC_WEAR_LEVELING_OFF -5 + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED +typedef struct { + FLByte jumpInstruction[3]; + FLSByte OEMname[8]; + Unaligned bytesPerSector; + FLByte sectorsPerCluster; + LEushort reservedSectors; + FLByte noOfFATS; + Unaligned rootDirectoryEntries; + Unaligned totalSectorsInVolumeDOS3; + FLByte mediaDescriptor; + LEushort sectorsPerFAT; + LEushort sectorsPerTrack; + LEushort noOfHeads; + LEulong noOfHiddenSectors; + LEulong totalSectorsInVolume; +} BPB; +#else /*FL_NO_PACKED_STRUCTS_SUPPORTED*/ +#define FL_BPB_JUMP_INSTRUCTION_OFFSET 0 /* size 3, array */ +#define FL_BPB_OEM_NAME_OFFSET 3 /* size 8, array */ +#define FL_BPB_BYTES_PER_SECTOR_OFFSET 11 /* size 2, unaligned */ +#define FL_BPB_SECTORS_PER_CLUSTER_OFFSET 13 /* size 1 */ +#define FL_BPB_RESERVED_SECTORS_OFFSET 14 /* size 2 */ +#define FL_BPB_NO_OF_FATS_OFFSET 16 /* size 1 */ +#define FL_BPB_ROOT_DIR_ENTRIES_OFFSET 17 /* size 2, unaligned */ +#define FL_BPB_TOTAL_SECTORS_IN_VOL_DOS3_OFFSET 19 /* size 2, unaligned */ +#define FL_BPB_MEDIA_DESCRIPTOR_OFFSET 21 /* size 1 */ +#define FL_BPB_SECTORS_PER_FAT_OFFSET 22 /* size 2 */ +#define FL_BPB_SECTORS_PER_TRACK_OFFSET 24 /* size 2 */ +#define FL_BPB_NO_OF_HEADS_OFFSET 26 /* size 2 */ +#define FL_BPB_NO_OF_HIDDEN_SECTORS_OFFSET 28 /* size 4 */ +#define FL_BPB_TOTAL_SECTORS_IN_VOL_OFFSET 32 /* size 4 */ +#define FL_BPB_SIZE 36 +typedef FLByte BPB[FL_BPB_SIZE]; +#endif /*FL_NO_PACKED_STRUCTS_SUPPORTED*/ +typedef struct { +FLDword length; +FLWord lengthType; +FLByte pType; +FLByte flags; +}LogicalPartitionParams; + +#define STD_LOG_PARTITION_PARAMS {0, /* Partition length */ \ + FL_LENGTH_IN_BYTES, /* Bytes, Sectors ... */ \ + DOS4_PARTIT, /* Partition type */ \ + FL_MARK_PARTITION_BOOTABLE}/* Either bootable or not */ \ + +typedef struct { +SectorNo bootSectorNo; +SectorNo sectorsInVolume; +SectorNo MBR; +int MBRslot; +} LogPartitionInfo; + +#ifndef FL_NO_PACKED_STRUCTS_SUPPORTED +typedef struct { + FLSByte name[11]; + FLByte attributes; /* mapped below */ + FLByte lowerCaseFlags; + FLByte createTimeMilisec; + LEushort createTimeHourMin; + LEushort createDate; + LEushort lastAccessedDate; + LEushort reserved1; + LEushort updateTime; + /* The date field is encoded as follows: */ + /* bit 0-4: Day of month (1-31) */ + /* bit 5-8: Month (1-12) */ + /* bit 9-15: Year relative to 1980 */ + LEushort updateDate; + /* The DOS time field is encoded as follows: */ + /* bit 0-4: seconds divided by 2 (0-29) */ + /* bit 5-10: minutes (0-59) */ + /* bit 11-15: hours (0-23) */ + LEushort startingCluster; + LEulong fileSize; +} DirectoryEntry; +#else /*FL_NO_PACKED_STRUCTS_SUPPORTED*/ +#define FL_DIRECTORY_ENTRY_NAME_OFFSET 0 /* size 11, array */ +#define FL_DIRECTORY_ENTRY_ATTRIBUTES_OFFSET 11 /* size 1 */ +#define FL_DIRECTORY_ENTRY_LOWERCASE_FLAGS_OFFSET 12 /* size 1 */ +#define FL_DIRECTORY_ENTRY_CREATE_TIME_MILLISEC_OFFSET 13 /* size 1 */ +#define FL_DIRECTORY_ENTRY_CREATE_TIME_HOURMIN_OFFSET 14 /* size 2 */ +#define FL_DIRECTORY_ENTRY_CREATE_DATE_OFFSET 16 /* size 2 */ +#define FL_DIRECTORY_ENTRY_LAST_ACCESS_DATE_OFFSET 18 /* size 2 */ +#define FL_DIRECTORY_ENTRY_RESERVED1_OFFSET 20 /* size 2 */ +#define FL_DIRECTORY_ENTRY_UPDATE_TIME_OFFSET 22 /* size 2 */ +#define FL_DIRECTORY_ENTRY_UPDATE_DATE_OFFSET 24 /* size 2 */ +#define FL_DIRECTORY_ENTRY_STARTING_CLUSTER_OFFSET 26 /* size 2 */ +#define FL_DIRECTORY_ENTRY_FILESIZE_OFFSET 28 /* size 4 */ +#define FL_DIRECTORY_ENTRY_SIZE 32 +typedef FLByte DirectoryEntry[FL_DIRECTORY_ENTRY_SIZE]; +#endif /*FL_NO_PACKED_STRUCTS_SUPPORTED*/ +/* FAT Format Parameters record - given to flFormatFS */ + +typedef struct { +FLWord noOfRootEntries; +FLWord noOfSectorsPerCluster; +FLByte noOfFATs; +FLByte pType; +FLByte reserved1; +FLByte flags; +FLByte volumeId[4]; /* FAT partition identification number */ +FLByte* volumeLabel; /* FAT partition label string. If NULL, no label */ +} FATFormatParams; + + +#define FAT12_PARTIT 0x01 +#define FAT16_PARTIT 0x04 +#define EX_PARTIT 0x05 +#define DOS4_PARTIT 0x06 +#define FAT32_PARTIT 0x0b + +#define FL_TFAT_MODE 0x1 + +#define FS_USE_DEFAULT_CLUSTER_SIZE 0 + +#define STD_FAT_FORMAT_PARAMS {512, /* No of entries in the rood directory */ \ + FS_USE_DEFAULT_CLUSTER_SIZE, /* No of sectors per cluster */ \ + 1, /* No of FAT copies */ \ + 0, /* Partition type */ \ + 0, 0, /* Reseved 0 */ \ + {0, 0, 0, 0}, /* FAT Volume ID */ \ + NULL} /* FAT Lable */ + + +#endif /* FLSTRUCT_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsysfun.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsysfun.h new file mode 100755 index 00000000..905eace1 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsysfun.h @@ -0,0 +1,239 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/flsysfun.h-arc $ + * + * Rev 1.8 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.7 Sep 11 2006 13:45:24 yaniv.iarovici + * Legal header added + * + * Rev 1.6 Aug 09 2006 16:52:52 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#ifndef FLSYSFUN_H +#define FLSYSFUN_H + + +/*----------------------------------------------------------------------*/ +/* f l S y s f u n I n i t */ +/* */ +/* Do any necessary initialization for routines in this module. */ +/* */ +/* Called from fatlite.c (flInit) */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/*----------------------------------------------------------------------*/ + +extern void flSysfunInit(void); + + +/*----------------------------------------------------------------------*/ +/* f l R a n d B y t e */ +/* */ +/* Returns a random number between 0 and 255 */ +/* */ +/* Called from FTLLITE.C */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* A random number between 0 and 255 */ +/*----------------------------------------------------------------------*/ + +extern unsigned flRandByte(void); + + +/*----------------------------------------------------------------------*/ +/* f l I n s t a l l T i m e r */ +/* */ +/* Installs an interval timer. */ +/* The implementation of this routine usually means hooking a clock */ +/* interrupt. The polling interval is specified as a parameter. If the */ +/* clock frequency is faster, the interval timer should count several */ +/* clock ticks before calling the interval routine. */ +/* */ +/* This routine is necessary if POLLING_INTERVAL (custom.h) is greater */ +/* than 0. In this case this routine will be called from socket.c */ +/* (init). It will be called to install 'socketIntervalRoutine' with a */ +/* period specified by POLLING_INTERVAL. */ +/* */ +/* Parameters: */ +/* routine : Routine to call at each interval */ +/* interval : Milliseconds per polling interval */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failure */ +/*----------------------------------------------------------------------*/ + +extern FLStatus flInstallTimer(void (*routine)(void), unsigned interval); + + +#ifdef FL_EXIT + +/*----------------------------------------------------------------------*/ +/* f l R e m o v e T i m e r */ +/* */ +/* Removes the active interval timer. */ +/* This routine removes the active interval timer set by 'removeTimer'. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/*----------------------------------------------------------------------*/ + +extern void flRemoveTimer(void); + +#endif + + +/*----------------------------------------------------------------------*/ +/* f l C u r r e n t D a t e */ +/* */ +/* Returns the current DOS-format date */ +/* */ +/* The DOS date format is documented in dosformt.h. */ +/* */ +/* If a TOD clock is not available, return the value of 1/1/80. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* Current date */ +/*----------------------------------------------------------------------*/ + +extern unsigned flCurrentDate(void); + + +/*----------------------------------------------------------------------*/ +/* f l C u r r e n t T i m e */ +/* */ +/* Returns the current DOS-format time */ +/* */ +/* The DOS time format is documented in dosformt.h. */ +/* */ +/* If a TOD clock is not available, return the value of 0:00 AM. */ +/* */ +/* Parameters: */ +/* None */ +/* */ +/* Returns: */ +/* Current time */ +/*----------------------------------------------------------------------*/ + +extern unsigned flCurrentTime(void); + + +/*----------------------------------------------------------------------*/ +/* f l C r e a t e M u t e x */ +/* */ +/* Creates and initializes a mutex object */ +/* */ +/* The mutex is initializes as not owned by anyone. */ +/* */ +/* Parameters: */ +/* mutex : Pointer to mutex object */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failure */ +/*----------------------------------------------------------------------*/ + +extern FLStatus flCreateMutex(FLMutex *mutex); + + +/*----------------------------------------------------------------------*/ +/* f l D e l e t e M u t e x */ +/* */ +/* Destroys a mutex object */ +/* */ +/* This function frees any resources taken by flCreateMutex. */ +/* */ +/* Parameters: */ +/* mutex : Pointer to mutex object */ +/* */ +/* Returns: */ +/* None */ +/*----------------------------------------------------------------------*/ + +extern void flDeleteMutex(FLMutex *mutex); + + +/*----------------------------------------------------------------------*/ +/* f l T a k e M u t e x */ +/* */ +/* Attempts to take ownership of a mutex. If the mutex is currently not */ +/* owned, TRUE is returned and the mutex becomes owned. If the mutex is */ +/* currently owned, FALSE is returned and ownership is not taken. */ +/* */ +/* Parameters: */ +/* mutex : Pointer to mutex object */ +/* */ +/* Returns: */ +/* FLBoolean : TRUE if ownership taken, FALSE otherwise */ +/*----------------------------------------------------------------------*/ + +extern FLBoolean flTakeMutex(FLMutex *mutex); + + +/*----------------------------------------------------------------------*/ +/* f l F r e e M u t e x */ +/* */ +/* Frees ownership of a mutex */ +/* */ +/* Parameters: */ +/* mutex : Pointer to mutex object */ +/* */ +/* Returns: */ +/* None */ +/*----------------------------------------------------------------------*/ + +extern void flFreeMutex(FLMutex *mutex); + + +#endif /* FLSYSFUN_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystem.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystem.c new file mode 100755 index 00000000..bf4621e8 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystem.c @@ -0,0 +1,720 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + + +/* + * includes + */ + +#include "tffsdrv.h" +#include "flbase.h" +#include "doch_sys.h" +#include "hib.h" + + +#ifdef TFFS_MESSAGES_ENABLED +int fl_debug = FL_DEBUG_DEF; +module_param(fl_debug, int, (S_IRUGO | S_IWUSR)); +MODULE_PARM_DESC(fl_debug,"Print TrueFFS debug messages [0-7]."); +#endif + +/* For portability reasons, Linux drivers should use macros readXXX/writeXXX + * when reading/writing hardware registers and transferring data from + * devices. Command line parameter "tffs_memcpy=<1|2|3>" allows DiskOnChip + * driver to use memcpy() library routine instead, which often greatly + * improves driver's 'read' performance. + * + * insmod tffs.o tffs_memcpy=1 + */ +int tffs_memcpy = 0; +module_param(tffs_memcpy, int, S_IRUGO); +MODULE_PARM_DESC(tffs_memcpy, "Use memcpy() for DiskOnChip data transfers."); + + +/* Command line parameter "tffs_addr=" allows user to tell + * DiskOnChip driver where to look for DiskOnChip. For example, to instruct + * driver to probe for DiskOnChip at physical address 0x14000000: + * + * insmod tffs.o tffs_addr=0x14000000 + */ +ulong tffs_addr[FL_SOCKETS] = { TFFS_PHYS_ADDR }; +static int __fl_sockets = FL_SOCKETS; /* just for module_param_array() below */ +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,9)) + module_param_array(tffs_addr, ulong, __fl_sockets, S_IRUGO); +#else + module_param_array(tffs_addr, ulong, &__fl_sockets, S_IRUGO); +#endif +MODULE_PARM_DESC(tffs_addr,"Physical address of DiskOnChip."); + +/* Command line parameter "tffs_skip_sleeps=" instructs DiskOnChip driver + * how often it should yield CPU during DiskOnChip 'write' operations. The + * higher the , the less frequently driver yield CPU, thus increasing + * it's 'write' performance, but also increasing it's load on CPU. + * + * insmod tffs.o tffs_skip_sleep=3 + */ +int tffs_skip_sleeps = 5; +module_param(tffs_skip_sleeps, int, (S_IRUGO | S_IWUSR)); +MODULE_PARM_DESC(tffs_skip_sleeps,"How often to yield CPU during write operations."); + + +unsigned int profiling[10] = {0}; + + + +/* + * static routines + */ +static void TffsMapMem (SocketInfo *psoc, unsigned long phys_addr, unsigned long length); +static void TffsUnmapMem (SocketInfo *psoc); +static void irq_wait_timed_out (unsigned long arg); + + + +/* + * static vars + */ + +/* semaphore used by TrueFFS: one per socket, plus one for dochVol.mutex */ +static struct semaphore sems [FL_SOCKETS + 1]; + +/* next TrueFFS semaphore to allocate (0..FL_SOCKETS-1) */ +static int total_sems = 0; + + + + +/*-----------------------------------------------------------------------* + * * + * T f f s M a p M e m * + * * + * Allocate physical memory region, and map it into kernel's address * + * space. * + * * + * Parameters: * + * psoc socket pointer * + * phys_addr starting address of physical memory region * + * length length (in bytes) of this physical memory region * + * * + *-----------------------------------------------------------------------*/ +static +void TffsMapMem ( SocketInfo * psoc, + unsigned long phys_addr, + unsigned long length ) +{ + struct resource * rs; + + /* no memory region has been obtained yet */ + psoc->fMemRequested = 0; + psoc->dwPhysAddr = 0; + psoc->dwMappedLen = 0; + psoc->dwVirtAddr = 0; + + /* request physical memory region that DiskOnChip resides in */ + if ((rs = request_mem_region(phys_addr, length, "tffs")) != NULL) + { + /* map this physical memory region to kernel's virtual addr. space */ + if ((psoc->dwVirtAddr = (ulong)ioremap_nocache(phys_addr, length)) != 0) + { + psoc->fMemRequested = 1; + psoc->dwPhysAddr = phys_addr; + psoc->dwMappedLen = length; + } + else + { + PrintkDebug("ioremap_nocache(0x%lx,0x%lx) failed", phys_addr, length); + release_mem_region (phys_addr, length); + } + } + else + { PrintkDebug("request_mem_region(0x%lx,0x%lx) failed", phys_addr, length); } +} + + + + +/*-----------------------------------------------------------------------* + * * + * T f f s U n m a p M e m * + * * + * Unmap and free memory region previously allocated by TffsMapMem(). * + * * + * Parameters: * + * psoc socket pointer * + * * + *-----------------------------------------------------------------------*/ +static +void TffsUnmapMem ( SocketInfo * psoc ) +{ + if (psoc->dwVirtAddr != 0) + iounmap ((void *)psoc->dwVirtAddr); + + if (psoc->fMemRequested == 1) + release_mem_region (psoc->dwPhysAddr, psoc->dwMappedLen); + + psoc->fMemRequested = 0; + psoc->dwPhysAddr = 0; + psoc->dwMappedLen = 0; + psoc->dwVirtAddr = 0; +} + + + + +void * TffsMalloc (unsigned long size) +{ + return vmalloc (size + 4); +} + + + + +void TffsFree (void * vptr) +{ + vfree (vptr); +} + + + + +int LnxTffsPrint(const char *fmt, ...) +{ + va_list args; + char buf[1024]; /* hopefully enough, kernel/printk.c thinks so */ + int i; + + va_start(args, fmt); + i = vsprintf(buf, fmt, args); + va_end(args); + buf[i] = '\0'; + + while(i>0) + { + if(buf[i-1]==0xd || buf[i-1]==0xa) + { + buf[--i]=0; + } + else + break; + } + printk(KERN_ERR TFFS_DEVICE_NAME": %s\n",buf); + return i; +} + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ r e a d w * + * * + * This routine transfers data from RAM to DiskOnChip device in cases * + * when DMA is not used. * + * * + * Parameters: * + * io_vaddr virtual address of DiskOnChip's data port * + * vbuf buffer to transfer data from * + * words number of 16-bit short words to transfer * + * * + *-----------------------------------------------------------------------*/ + +void tffs_readw ( unsigned long io_vaddr, short * vbuf, int words ) +{ + if (tffs_memcpy & 1) /* use memcpy() to transfer data; might not work ! */ + { + register char * p = (char *) vbuf; + register int n; + + for (words <<= 1; words > 0; words -= n, p += n) + { + /* DiskOnChip's I/O register is aliased across 1024-bytes region */ + n = ((words <= 1024) ? words : 1024); + memcpy (p, (void *)io_vaddr, n); + } + } + else /* standard Linux case: use __raw_readw for portability */ + { + while (words--) + *vbuf++ = __raw_readw (io_vaddr); + } +} + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ w r i t e w * + * * + * This routine transfers data from DiskOnChip device to RAM in cases * + * when DMA is not used. * + * * + * Parameters: * + * io_vaddr virtual address of DiskOnChip's data port * + * vbuf buffer to transfer data to * + * words number of 16-bit short words to transfer * + * * + *-----------------------------------------------------------------------*/ + +void tffs_writew ( unsigned long io_vaddr, short * vbuf, int words ) +{ + if (tffs_memcpy & 2) /* use memcpy() to transfer data; might not work ! */ + { + register char * p = (char *) vbuf; + register int n; + + for (words <<= 1; words > 0; words -= n, p += n) + { + /* DiskOnChip's I/O register is aliased across 1024-bytes region */ + n = ((words <= 1024) ? words : 1024); + memcpy ((void *)io_vaddr, p, n); + } + } + else /* standard Linux case: use __raw_writew for portability */ + { + while (words--) + { + __raw_writew (*vbuf, io_vaddr); + vbuf++; + } + } +} + + + +/*-----------------------------------------------------------------------* + * * + * d o c h b l k _ r e a d * + * * + * This routine transfers data from DiskOnChip H3 device to RAM. * + * * + * Parameters: * + * vbuf buffer to transfer data to * + * sectors number of 512-byte sectors to transfer * + * * + *-----------------------------------------------------------------------*/ + +int dochblk_read (void * vbuf, unsigned int sectors) +{ + flReadEvenNumberOfBytes ((DOCHFlash), DOCH_DATA_PORT_AREA, vbuf, ((sectors) << 9)); + return 0; +} + + + +/*-----------------------------------------------------------------------* + * * + * d o c h b l k _ w r i t e * + * * + * This routine transfers data from RAM to DiskOnChip H3 device. * + * * + * Parameters: * + * vbuf buffer to transfer data from * + * sectors number of 512-byte sectors to transfer * + * * + *-----------------------------------------------------------------------*/ + +int dochblk_write (void * vbuf, unsigned int sectors) +{ + flWriteEvenNumberOfBytes ((DOCHFlash), DOCH_DATA_PORT_AREA, vbuf, ((sectors) << 9)); + return 0; +} + + + + +void flSysfunInit ( void ) +{ + register int iSoc; + unsigned long win_size; /* size of DiskOnChip window in bytes */ + + total_sems = 0; + + /* DiskOnChip H3 devices can be configured to use 8-, 32- or 128-KByte + * window; we assume the worst case here (128-KB). + */ + win_size = DOCH_MEM_WIN_SIZE_128KB /* or DOCH_MEM_WIN_SIZE_8KB */; + + for (iSoc = 0; iSoc < FL_SOCKETS; iSoc++) + TffsMapMem (&tffsInfo.sockets[iSoc], tffs_addr[iSoc], win_size); + + /* We are not doing 'resume' after previous power 'suspend', but rather + * a full scale board initialization, hence FALSE flag below. + */ + if( tffsarch_init(FALSE) == 0 ) + PrintkWarning("tffsarch_init error"); +} + + + +void LnxSysfunRelease ( void ) +{ + int i; + + for (i = 0; i < FL_SOCKETS; i++) + TffsUnmapMem (&tffsInfo.sockets[i]); + + total_sems = 0; + + TffsHWRelease (); +} + + + +/*-----------------------------------------------------------------------* + * * + * f l C r e a t e M u t e x * + * * + * Create mutex. . * + * * + * Parameters: * + * mutex ID of newly created sempahore will be stored here * + * * + * Returns: * + * flOK if successful otherwise respective error code * + * * + *-----------------------------------------------------------------------*/ + +FLStatus flCreateMutex (FLMutex * mutex) +{ + if (total_sems >= (sizeof(sems) / sizeof(sems[0]))) + { + PrintkError("flCreateMutex: error creating mutex"); + return flNotEnoughMemory; + } + + /* initialize next available semaphore to 'available' state */ + sema_init (&sems[total_sems], 1); + + *mutex = (FLMutex) total_sems++; + + return flOK; +} + + + +/*-----------------------------------------------------------------------* + * * + * f l T a k e M u t e x * + * * + * Called to aquire the mutex. * + * * + * Parameters: * + * mutex identifies mutex to release * + * * + * Returns: * + * always TRUE * + * * + *-----------------------------------------------------------------------*/ + +FLBoolean flTakeMutex (FLMutex * mutex) +{ + register struct semaphore * psem = &sems[ (int)(*mutex) ]; + + /* put caller to sleep until semaphore is available */ + if( down_interruptible(psem) != 0 ) + { + /* Semaphore still isn't available - down_interruptible() returned + * because caller was waken up by signal. We must abort TrueFFS call. + */ + return FALSE; + } + + /* semaphore has been taken; TrueFFS call can proceed now */ + return TRUE; +} + + + +/*-----------------------------------------------------------------------* + * * + * f l F r e e M u t e x * + * * + * Called to release the mutex. * + * * + * Parameters: * + * mutex identifies mutex to release * + * * + *-----------------------------------------------------------------------*/ + +void flFreeMutex (FLMutex * mutex) +{ + register struct semaphore * psem = &sems[ (int)(*mutex) ]; + + /* release semaphore */ + up (psem); +} + + + +/*-----------------------------------------------------------------------* + * * + * f l D e l e t e M u t e x * + * * + * Called to destroy the mutex and free all associated resources. * + * * + * Parameters: * + * mutex identifies mutex to destroy * + * * + *-----------------------------------------------------------------------*/ + +void flDeleteMutex (FLMutex * mutex) +{ + /* just in case some thread(s) are still sleeping on this semaphore */ + flFreeMutex (mutex); +} + + + + +/*-----------------------------------------------------------------------* + * * + * f l B u i l d G e o m e t r y * + * * + * This routine calculates cylinder/head/sector geometry based on the * + * number of sectors on the disk. * + * * + * Parameters: * + * sectors total sectors on disk * + * cyl pointer to number of cylinders * + * heads pointer to number of heads * + * sec_per_track pointer to number of sectors per track * + * oldFormat ignored * + * wirHandle ignored * + * * + *-----------------------------------------------------------------------*/ + +void flBuildGeometry ( unsigned long sectors, + unsigned long * cyl, + unsigned long * heads, + unsigned long * sec_per_track, + unsigned char oldFormat, + unsigned short wIrHandle ) +{ + DeviceInfo * pdisk; + register int i; + + for (i = 0; i < (sizeof(tffsInfo.ppDevices) / sizeof(tffsInfo.ppDevices[0])); i++) + { + if ((pdisk = tffsInfo.ppDevices[i]) == NULL) + return; + + /* The 'wIrHandle' argument is the internal TrueFFS handle which is + * different from TrueFFS handle stored in DeviceInfo.bHandle, and + * passed to TrueFFS API routines. + */ + if (pdisk->dwSize == sectors) /* was (pdisk->bHandle == wIrHandle) */ + { + if (cyl != NULL) *cyl = pdisk->wCyl; + if (heads != NULL) *heads = pdisk->bHead; + if (sec_per_track != NULL) *sec_per_track = pdisk->bSect; + + return; + } + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * i r q _ w a i t _ t i m e d _ o u t * + * * + * This routine is called when DiskOnChip interrupt gets lost, and * + * watchdog timer gets activated. It prevents driver from hanging up in * + * such cases by posting a semaphore that socket's I/O thread is waiting * + * for. * + * * + * Parameters: * + * arg pointer to semaphore * + * * + *-----------------------------------------------------------------------*/ + +static +void irq_wait_timed_out ( unsigned long arg ) +{ + profiling[5]++; + + /* Since this routine is running, it means that DiskOnChip interrupt + * got lost (or delayed for too long). To prevent socket's I/O thread + * from hanging up, we wake up I/O thread here. + */ + complete ((struct completion *)arg); /* up ((struct semaphore *)arg); */ +} + + + + +/*-----------------------------------------------------------------------* + * * + * f l _ t f f s _ s l e e p * + * * + * This routine is called right after starting flash 'write' or 'erase' * + * operation on DiskOnChip. These operations usually take around 700 * + * ('write') or 3000 ('erase') microseconds to complete. This routine * + * might yield the CPU and cause task switch. * + * * + * Parameters: * + * handle TrueFFS handle (only lower 4 bits are used) * + * microseconds expected average duration of flash operation * + * * + *-----------------------------------------------------------------------*/ + +void fl_tffs_sleep ( unsigned int handle, + unsigned long microseconds ) +{ +#ifdef TFFS_USE_SLEEP + + int socNo = (int)(handle & 0xf); /* extract socket # from TrueFFS handle */ + + static int _counter = 0; + + if (tffsInfo.sockets[socNo].io_thread_state != 1) + { + /* DiskOnChip driver is being uninstalled, or power-suspended, or is + * power-resuming. In either of these cases, we want to process all + * outstanding I/O requests as quickly as possible; therefore we + * will not sleep. + */ + return; + } + + if (tffs_irq < 0) /* DiskOnChip R/B interrupts are not used */ + { + if (++_counter > tffs_skip_sleeps) + { + /* Once in a while (once in 'tffs_skip_sleeps' calls to this routine) + * we yield CPU and put DiskOnChip driver to sleep, to give chance + * to other tasks to run. Note that this negatively impacts + * DiskOnChip's 'write' performance. + */ + unsigned long jiffies_to_sleep = (HZ * microseconds) / 1000000; +#if 0 + if (jiffies_to_sleep == 0) + jiffies_to_sleep = 1; +#endif + /* yield CPU and sleep */ + set_current_state (TASK_INTERRUPTIBLE); + schedule_timeout (jiffies_to_sleep); + + _counter = 0; + } + else + { + /* TrueFFS will busy-poll DiskOnChip's status register to + * detect completion of flash 'write' and 'erase' operations. This + * improves DiskOnChip's 'write' performance, but also ties up CPU + * for extensive periods of time. + */ + return; + } + } + else /* yield CPU and sleep until waken up by DiskOnChip interrupt */ + { + struct timer_list watchdog_timer; + + profiling[0]++; + + /* To guard ourselves against stray DiskOnChip interrupts, + * we clear tffsInfo.sockets[socNo].wait_for_irq + * before enabling IRQ that DiskOnChip is nonnected to + */ + init_completion (&tffsInfo.sockets[socNo].wait_for_irq); /* sema_init (&tffsInfo.sockets[socNo].sleep_sem, 0); */ + + tffs_irq_enable (TRUE); + + /* To guard ourselves against the case when DiskOnChip interrupt + * will not be generated for some reason, or will get lost, we + * set watchdog timer to wake us up after 30 milliseconds. + */ + init_timer (&watchdog_timer); + watchdog_timer.function = irq_wait_timed_out; + watchdog_timer.data = (unsigned long) &tffsInfo.sockets[socNo].wait_for_irq /* &tffsInfo.sockets[socNo].sleep_sem */ ; + watchdog_timer.expires = jiffies + ((30 * HZ) / 1000); + add_timer (&watchdog_timer); + + /* sleep until DiskOnChip interrupt or watchdog timer wakes us up */ + wait_for_completion (&tffsInfo.sockets[socNo].wait_for_irq); /* down_interruptible (&tffsInfo.sockets[socNo].sleep_sem); */ + + tffs_irq_disable (TRUE); + + /* no longer need watchdog timer */ + del_timer_sync (&watchdog_timer); + } +#endif /* TFFS_USE_SLEEP */ +} + + + + +/*-----------------------------------------------------------------------* + * * + * d o c h _ s l e e p * + * * + * This routine is called numerous times during DiskOnChip H3 'write' * + * operations. * + * * + * Parameters: * + * sock socket # (zero-based) * + * microseconds expected average duration of flash operation * + * * + *-----------------------------------------------------------------------*/ + +void doch_sleep ( unsigned int soc, + unsigned long microseconds ) +{ + extern int write_requests; + static int __write_requests = 0; + + /* If DiskOnChip IRQ is enabled, or if 'tffs_skip_sleeps' set to yeild + * CPU often, we yield CPU. + */ + if (tffs_irq >= 0) + { + fl_tffs_sleep (soc, microseconds); + } + else + { + /* DiskOnChip IRQ is disabled. We yield CPU according to + * 'tffs_skip_sleep' setting, making sure that we do yield CPU + * at least once per I/O 'write' request. + */ + if ((tffs_skip_sleeps >= 100) || (write_requests != __write_requests)) + { + fl_tffs_sleep (soc, microseconds); + } + __write_requests = write_requests; + } +} diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystem.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystem.h new file mode 100755 index 00000000..e03bd289 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystem.h @@ -0,0 +1,173 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + +#ifndef FLSYSTEM_H +#define FLSYSTEM_H + +#include "flcustom.h" +#include "tffsarch.h" + +#include +#include +#include +#ifdef __KERNEL__ +# include +#endif + +#define NAMING_CONVENTION /* don't change me */ +#define TFFS_DLL_API +#define FL_PACKED_STRUCTURES __attribute__ ((packed)) +#ifndef TRUE +# define TRUE 1 +#endif +#ifndef FALSE +# define FALSE 0 +#endif + +#define FAR_LEVEL 0 +#define FLMutex int + +#ifndef FL_IOCTL_START +# define FL_IOCTL_LNX 0 /* don't change */ +# define FL_IOCTL_START 1 /* don't change */ +#endif + + +/* + * "yield CPU and sleep" implementation for G4/G3/H1 DiskOnChip devices + */ +#define FL_TFFS_SLEEP(handle,microseconds) fl_tffs_sleep((unsigned int)(handle),(microseconds)) +extern void fl_tffs_sleep (unsigned int handle, unsigned long microseconds); + + +/* + * "yield CPU and sleep" implementation for H3 DiskOnChip devices + */ +#define DOCH_SLEEP(soc,dev,microseconds) doch_sleep((soc),(microseconds)) +extern void doch_sleep (unsigned int soc, unsigned long microseconds); + + +/* + * macros for printing debug messages + */ + +#define DBG_PRINT_FLOW(zone,str) do { {LnxTffsPrint(str);} } while(0) +#define DBG_PRINT_FLOW_PRM(zone,str) do { {LnxTffsPrint str; } } while(0) +#define DBG_PRINT_WRN(zone,str) do { {LnxTffsPrint(str);} } while(0) +#define DBG_PRINT_WRN_PRM(zone,str) do { {LnxTffsPrint str; } } while(0) +#define DBG_PRINT_ERR(zone,str) do { {LnxTffsPrint(str);} } while(0) +#define DBG_PRINT_ERR_PRM(zone,str) do { {LnxTffsPrint str; } } while(0) +/* +#define DBG_PRINT_FLOW(zone,str) do { if(fl_debug & 4) {LnxTffsPrint(str);} } while(0) +#define DBG_PRINT_FLOW_PRM(zone,str) do { if(fl_debug & 4) {LnxTffsPrint str; } } while(0) +#define DBG_PRINT_WRN(zone,str) do { if(fl_debug & 2) {LnxTffsPrint(str);} } while(0) +#define DBG_PRINT_WRN_PRM(zone,str) do { if(fl_debug & 2) {LnxTffsPrint str; } } while(0) +#define DBG_PRINT_ERR(zone,str) do { if(fl_debug & 1) {LnxTffsPrint(str);} } while(0) +#define DBG_PRINT_ERR_PRM(zone,str) do { if(fl_debug & 1) {LnxTffsPrint str; } } while(0) +*/ +extern int LnxTffsPrint (const char *fmt, ...); +extern int fl_debug; + +/* + * dynamic memory allocation/freeing + */ +#define FL_MALLOC TffsMalloc +#define FL_FREE TffsFree +extern void * TffsMalloc (unsigned long size); +extern void TffsFree (void *vptr); + +/* + * Macro DOCH_SYS_FUNC_RELEASE is invoked when rmmod is called + */ +#define DOCH_SYS_FUNC_RELEASE LnxSysfunRelease() +extern void LnxSysfunRelease (void); + +/* + * pointer manupulation macros + */ +#define physicalToPointer(paddr,size,drive) ((void *) (paddr)) +#define addToFarPointer(ptr,val) ((void *) ((unsigned char *) (ptr) + (val))) +#define freePointer(ptr,size) /* do nothing */ + +/* + * macros tffscpy/tffscmp/tffsset are used with RAM buffers only + */ +#define tffscpy memcpy +#define tffscmp memcmp +#define tffsset memset + +/* + * macros for writing byte/short word/long word to I/O memory + */ +#define FLWRITE_IO_BYTE(val,addr) writeb((unsigned char) (val),(volatile unsigned char *)(addr)) +#define FLWRITE_IO_WORD(val,addr) __raw_writew((unsigned short)(val),(addr)) +#define FLWRITE_IO_DWORD(val,addr) __raw_writel((unsigned long) (val),(addr)) + +/* + * macros for reading byte/short word/long word from I/O memory + */ +#define FLREAD_IO_BYTE(addr) readb((volatile unsigned char*) (addr)) +#define FLREAD_IO_WORD(addr) __raw_readw(addr) +#define FLREAD_IO_DWORD(addr) __raw_readl(addr) + +/* + * macros for transferring data blocks to I/O memory + */ +#define TFFSCPY_FROM_IO(dest,src,cnt) memcpy_fromio((dest),(void*)(src),(cnt)) +#define TFFSCPY_FROM_IO_8_BITS TFFSCPY_FROM_IO +#define TFFSCPY_FROM_IO_16_BITS TFFSCPY_FROM_IO + +/* + * macros for transferring data blocks from I/O memory + */ +#define TFFSCPY_TO_IO(dest,src,cnt) memcpy_toio((void*)(dest),(src),(cnt)) +#define TFFSCPY_TO_IO_8_BITS TFFSCPY_TO_IO +#define TFFSCPY_TO_IO_16_BITS TFFSCPY_TO_IO + +/* + * macros for memset-like operations on I/O memory + */ +#define TFFSSET_IO(dest,val,cnt) memset_io((void*)(dest),(val),(cnt)) +#define TFFSSET_IO_8_BITS TFFSSET_IO +#define TFFSSET_IO_16_BITS TFFSSET_IO + + +extern int tffs_irq; +extern void tffs_irq_enable (int lock); +extern void tffs_irq_disable (int lock); + + +#endif /* FLSYSTEM_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystyp.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystyp.h new file mode 100755 index 00000000..67385c8c --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/flsystyp.h @@ -0,0 +1,96 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/version 6.3-up/BDK/src/flsystyp.h-arc $ + * + * Rev 1.14 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + */ + +/***************************************************************************** +* File Header * +* ----------- * +* Name : flsystyp.h * +* * +* Description : System defintions and types required for the implementation * +* of the system customization routines. * +* * +*****************************************************************************/ + +#ifndef FLSYSTYPE_H +#define FLSYSTYPE_H + + +#include "_common.h" +#include "flsystem.h" + +/* Boolean constants */ +#ifndef FALSE +#define FALSE 0 +#endif /* FALSE */ +#ifndef TRUE +#define TRUE 1 +#endif /* TRUE */ + + +/* Zones for debug printing */ + +#define FLZONE_NONE 0 +#define FLZONE_MTD 0x0001 +#define FLZONE_BDK 0x0002 +#define FLZONE_TL 0x0004 +#define FLZONE_BLKDEV 0x0008 +#define FLZONE_FORMAT 0x0010 +#define FLZONE_FS 0x0020 +#define FLZONE_SOCKET 0x0040 +#define FLZONE_IOCTL 0x0080 +#define FLZONE_PROD 0x0100 +#define FLZONE_STATISTICS 0x0200 +#define FLZONE_UTIL 0x0400 +#define FLZONE_PARA 0x0800 +#define FLZONE_ABS 0x1000 +#define FLZONE_ATA 0x2000 +#define FLZONE_API 0x4000 +#define FLZONE_FULL 0xffff + +#endif /* FLSYSTYPE_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fltl.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fltl.h new file mode 100755 index 00000000..9e38c292 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/fltl.h @@ -0,0 +1,122 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/fltl.h-arc $ + * + * Rev 1.9 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.8 Sep 11 2006 13:45:24 yaniv.iarovici + * Legal header added + * + * Rev 1.7 Aug 09 2006 16:52:52 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#ifndef FLTL_H +#define FLTL_H + +#include "flbase.h" +#include "flstruct.h" + + +typedef struct tTL TL; + +/*----------------------------------------------------------*/ +/* Format Parameters record passed to the translation layer */ +/*----------------------------------------------------------*/ + +typedef struct { + + /* Global device info */ + + FLByte percentUse; + + FLByte noOfBDTLPartitions; + + FLByte noOfBinaryPartitions; + + BDTLPartitionFormatParams3 FAR2* BDTLPartitionInfo; + + BinaryPartitionFormatParams3 FAR2* binaryPartitionInfo; + + FLDword flags; + + /* First volume info */ + + FLByte protectionKey[8]; + + FLByte protectionType; + + FLByte noOfSpareUnits; + + /* Special features */ + + FLByte cascadedDeviceNo; + + FLByte noOfCascadedDevices; + + FLProgressCallback progressCallback; + + FLDword osakVersion; + + /* None DiskOnChip parameters */ + + FLSDword bootImageLen; + + FLSDword dataPartitionLen; + + FLDword vmAddressingLimit; + + FLWord embeddedCISlength; + + FLByte FAR1 * embeddedCIS; + +} TLFormatParams; + +#include "_fltl.h" + +#endif /* FLTL_H */ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/geometry.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/geometry.c new file mode 100755 index 00000000..b9ab3b3f --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/geometry.c @@ -0,0 +1,132 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Testing/TrueFFS 6.3/Drop 2.5/3/common/geometry.c-arc $ + * + * Rev 1.6 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.5 Sep 11 2006 13:45:26 yaniv.iarovici + * Legal header added + * + * Rev 1.4 Aug 09 2006 16:52:52 Polina.Marimont + * initial for DOC Driver 1.0 + */ + +#include "flbase.h" + +/*----------------------------------------------------------------------*/ +/* f l B u i l d G e o m e t r y */ +/* */ +/* Get C/H/S information of the disk according to number of sectors. */ +/* */ +/* Parameters: */ +/* capacity : Number of Sectors in Volume */ +/* cylinders : Pointer to Number of Cylinders */ +/* heads : Pointer to Number of Heads */ +/* sectors : Pointer to Number of Sectors per Track */ +/* oldFormat : True for one sector per culoster */ +/* wIrHandle : Handle of the disk partition to check */ +/* */ +/*----------------------------------------------------------------------*/ + +#ifdef __cplusplus +extern "C" +#endif /* __cplusplus */ + +TFFS_DLL_API void NAMING_CONVENTION flBuildGeometry(FLDword capacity, FLDword FAR2 *cylinders, + FLDword FAR2 *heads, FLDword FAR2 *sectors, FLBoolean oldFormat, FLWord wIrHandle) +{ + FLDword temp; + FLDword orgCapacity = capacity; + +START_BUILD_GEOMETRY_ROUTINE: + + *cylinders = 1024; /* Set number of cylinders to max value */ + + if (oldFormat == TRUE) + { + *sectors = 62L; /* Max out number of sectors per track */ + temp = (*cylinders) * (*sectors); /* Compute divisor for heads */ + (*heads) = capacity / temp; /* Compute value for number of heads */ + if (capacity % temp) { /* If no remainder, done! */ + (*heads)++; /* Else, increment number of heads */ + temp = (*cylinders) * (*heads); /* Compute divisor for sectors */ + (*sectors) = capacity / temp; /* Compute value for sectors per track */ + if (capacity % temp) { /* If no remainder, done! */ + (*sectors)++; /* Else, increment number of sectors */ + temp = (*heads) * (*sectors); /* Compute divisor for cylinders */ + (*cylinders) = capacity / temp; /* Compute number of cylinders */ + } + } + } + else + { + *heads = 16L; /* Max out number of heads */ + temp = (*cylinders) * (*heads); /* Compute divisor for heads */ + *sectors = capacity / temp; /* Compute value for sectors per track */ + while (*sectors > 0x3f ){ /* While number of sectors too big */ + *heads *= 2; /* use one more head */ + temp = (*cylinders) * (*heads); /* Recompute divisor for heads */ + *sectors = capacity / temp; /* Recompute sectors per track */ + } + if (capacity % temp) { /* If no remainder, done! */ + (*sectors)++; /* Else, increment number of sectors */ + temp = (*cylinders) * (*sectors); /* Compute divisor for heads */ + *heads = capacity / temp; /* Compute value for heads */ + if (capacity % temp) { /* If no remainder, done! */ + (*heads)++; /* Else, increment number of heads */ + temp = (*heads) * (*sectors); /* Compute divisor for cylinders */ + *cylinders = (FLDword)(capacity / temp); /* Compute number of cylinders */ + } + } + } + /* Make sure some free sectors are left between C*H*S and TL sectors */ + if(orgCapacity == (*sectors) * (*heads) * (*cylinders)) + { + capacity--; + goto START_BUILD_GEOMETRY_ROUTINE; + } +} + +/*----------------------------------------------------------------------*/ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hal_nor.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hal_nor.c new file mode 100755 index 00000000..6a05e59f --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hal_nor.c @@ -0,0 +1,464 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/hal_nor.c-arc $ + * + * Rev 1.25 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.24 Mar 11 2007 16:41:20 einat.avidan + * bug fix: working on x86 requires read buffer not to be paged out + * replace the former solution (access to the begining and the end of the buffer under NO_INIT_MMU_PAGES compilation flag) + * with full solution: usage of a buffer that is locked on RAM + * + * Rev 1.23 Sep 11 2006 13:45:26 yaniv.iarovici + * Legal header added + * + * Rev 1.22 Aug 09 2006 17:26:56 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +/* + * includes + */ +#include "flbase.h" +#include "hal_nor.h" +#include "doch_sys.h" +#include "doch_ata.h" + +#ifdef FL_MIGRATION_VERSION +#include "docsys.h" +#endif /*FL_MIGRATION_VERSION*/ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Externals + */ +extern FLDword gAccessLayerType; + +#ifdef __cplusplus +} +#endif + + +#ifdef DOCH_USE_FUNC + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Externals + */ +extern FLDword gAccessLayerType; + +/* + * global vars + */ + +/****************************************************************************** + * * + * d o c h _ s y s _ i n i t * + * * + * Initialize BSP specific part of DOCH driver. * + * * + * Parameters : * + * socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) * + * * + * Returns : * + * 0 if success, otherwise respective error code. * + * * + ******************************************************************************/ + +DOCH_Error hal_init_nor ( FLSNative socketNo) +{ + DOCH_Socket* pdev; + DOCH_get_socket(pdev, socketNo); + + /*If socket is not registered, return error*/ + if(pdev == NULL) + return DOCH_DiskNotFound; + + /*Register access layer routines*/ + pdev->halRoutines.hal_get_ata_reg = hal_get_ata_reg_nor; + pdev->halRoutines.hal_set_ata_reg = hal_set_ata_reg_nor; + pdev->halRoutines.hal_get_ctrl_reg = hal_get_ctrl_reg_nor; + pdev->halRoutines.hal_set_ctrl_reg = hal_set_ctrl_reg_nor; + pdev->halRoutines.hal_blk_read = hal_blk_read_nor; + pdev->halRoutines.hal_blk_write = hal_blk_write_nor; + pdev->halRoutines.hal_doch_release = doch_sys_release_nor; + + gAccessLayerType = DOCH_AL_NOR; + + return DOCH_OK; +} + +/*********************************************************/ +/* Function name : doch_sys_release_nor*/ +/* Description : */ +/* Return type : */ +/* Argument : int socketNo*/ +/*********************************************************/ +FLSNative doch_sys_release_nor(int socketNo) +{ + return flOK; +} + +/****************************************************************************** + * * + * d o c h_ s y s _ g e t _ r e g X * + * * + * Reads DOCH register. * + * * + * Parameters : * + * base : pointer to the base of DOCH register set * + * reg : ATA register number * + * * + * Returns : * + * value of specified register * + * * + ******************************************************************************/ +FLByte hal_get_ata_reg_nor(volatile FLByte *base, FLSNative reg) +{ + volatile FLWord* vPtr = (volatile FLWord*)addToFarPointer(base, (reg<<1) + DOCH_CONT_REG_AREA); + FLWord val = DOCHREAD_IO_WORD(vPtr); + +#ifdef DOCH_BIG_ENDIAN + return (FLByte)(val>>8); /*Value is returned in the higher byte*/ +#else /*DOCH_BIG_ENDIAN*/ + return (FLByte)(val); +#endif /*DOCH_BIG_ENDIAN*/ +} + +FLWord hal_get_ctrl_reg_nor ( volatile FLByte * base, + FLSNative reg ) +{ + volatile FLWord* vPtr = (volatile FLWord*)addToFarPointer(base, reg); + FLWord regVal = DOCHREAD_IO_WORD(vPtr); + +#ifdef DOCH_BIG_ENDIAN + return ((regVal<<8) | (regVal>>8)); /*Swap high/low bytes*/ +#else /*DOCH_BIG_ENDIAN*/ + return regVal; +#endif /*DOCH_BIG_ENDIAN*/ +} + +/****************************************************************************** + * * + * d o c h _ s y s _ s e t _ r e g X * + * * + * Writes DOCH register. * + * * + * Parameters : * + * base : pointer to the base of DOCH register set * + * reg : ATA register number * + * val : value to write to register * + * * + * Returns : * + * value of specified register * + * * + ******************************************************************************/ + +void hal_set_ata_reg_nor( volatile FLByte * base, + FLSNative reg, + FLNative val ) +{ + volatile FLWord* vPtr = (volatile FLWord*)addToFarPointer(base, (reg<<1) + DOCH_CONT_REG_AREA); + +#ifdef DOCH_BIG_ENDIAN + val = ((val>>8) | (val<<8)); +#endif /*DOCH_BIG_ENDIAN*/ + + DOCHWRITE_IO_WORD((FLWord)val, vPtr); +} + +void hal_set_ctrl_reg_nor ( volatile FLByte * base, + FLSNative reg, + FLNative val ) +{ +#ifdef DOCH_BIG_ENDIAN + val = ((val>>8) | (val<<8)); +#endif /*DOCH_BIG_ENDIAN*/ + + DOCHWRITE_IO_WORD((FLWord)val, (base + reg)); +} + +/****************************************************************************** + * * + * b l k _ r e a d_ u s i n g _ d a t a _ r e g * + * * + * Read specified # of bytes through the ATA data register * + * * + * Parameters : * + * base : pointer to the base of DOCH register set * + * buf : buffer to write from * + * bytes : number of bytes to write * + * * + * Returns : * + * NONE * + * * + ******************************************************************************/ +void blk_read_using_data_reg ( volatile FLByte * base, + FLByte * buf, + FLSNative bytes ) +{ + register FLWord * buf16 ; + register FLSNative max; + + buf16 = (FLWord *) buf; + max = (FLSNative)buf + bytes; + + /* retrieve data */ + for (; (FLSNative)buf16 < max; buf16+=8) + { + buf16[0] = DOCHREAD_IO_WORD(base); + buf16[1] = DOCHREAD_IO_WORD(base); + buf16[2] = DOCHREAD_IO_WORD(base); + buf16[3] = DOCHREAD_IO_WORD(base); + buf16[4] = DOCHREAD_IO_WORD(base); + buf16[5] = DOCHREAD_IO_WORD(base); + buf16[6] = DOCHREAD_IO_WORD(base); + buf16[7] = DOCHREAD_IO_WORD(base); + } +} + +/****************************************************************************** + * * + * h a l _ b l k _ r e a d _ n o r * + * * + * Read 'sectors' sectors from DOCH * + * * + * Parameters : * + * base : pointer to the base of DOCH register set * + * dest : buffer to read to * + * sectors : number of sectors to read * + * * + * Returns : * + * always zero (success) * + * * + ******************************************************************************/ + +FLSNative hal_blk_read_nor ( volatile FLByte * base, + FLByte * dest, + FLSNative sectors ) +{ + volatile FLWord FAR0 * swin = (volatile FLWord FAR0 *)(addToFarPointer(base, DOCH_DATA_PORT_AREA)); + FLSNative count = sectors<>8); + dest[i++] = (FLByte)tmp; +#else + dest[i++] = (FLByte)tmp; + dest[i++] = (FLByte)(tmp>>8); +#endif /* DOCH_BIG_ENDIAN */ + } + } + else + { /* mainstream case */ + /* Some memcpy implementations from none 4 bytes aligned destination + * buffer may use a for loop of single byte calls to the first 2 + * bytes. This implementation may be good for RAM, but will be + * problematic to 16bit DiskOnChip that does not have a BHE signal. + * so if the buffer is not dword aligned we would not perform memcpy */ + + if (((FLDword)dest&0x3)==0) + { + DOCHCPY_FROM_IO_16_BITS( (volatile byte *)swin, dest, count ); + } + else + { /* read in short words */ + for (i = 0, count = count >> 1; i < (int)count; i++) + ((FLWord FAR1 *)dest)[i] = DOCHREAD_IO_WORD(swin); + } + } +#ifndef FL_NO_PF_PROTECTED_READ_MEM + tffscpy(OrigDest,protectedBuffer,count); +#endif /* FL_NO_PF_PROTECTED_READ_MEM */ + + return 0; +} + +/****************************************************************************** + * * + * b l k _ w r i t e _ u s i n g _ d a t a _ r e g * + * * + * Write specified # of bytes through the ATA data register * + * * + * Parameters : * + * base : pointer to the base of DOCH register set * + * buf : buffer to write from * + * bytes : number of bytes to write * + * * + * Returns : * + * NONE * + * * + ******************************************************************************/ +void blk_write_using_data_reg ( volatile FLByte * base, + FLByte * buf, + FLSNative bytes ) +{ + volatile FLWord * reg16 = (FLWord*)base; + register FLWord * buf16 ; + register FLSNative max; + + buf16 = (FLWord *) buf; + max = (FLSNative)buf + bytes; + + /* write data */ + for (; (FLSNative)buf16 < max; buf16+=8) + { + DOCHWRITE_IO_WORD(((FLWord FAR1 *)buf16)[0],reg16); + DOCHWRITE_IO_WORD(((FLWord FAR1 *)buf16)[1],reg16); + DOCHWRITE_IO_WORD(((FLWord FAR1 *)buf16)[2],reg16); + DOCHWRITE_IO_WORD(((FLWord FAR1 *)buf16)[3],reg16); + DOCHWRITE_IO_WORD(((FLWord FAR1 *)buf16)[4],reg16); + DOCHWRITE_IO_WORD(((FLWord FAR1 *)buf16)[5],reg16); + DOCHWRITE_IO_WORD(((FLWord FAR1 *)buf16)[6],reg16); + DOCHWRITE_IO_WORD(((FLWord FAR1 *)buf16)[7],reg16); + } +} + +/****************************************************************************** + * * + * h a l _ b l k _ w r i t e _ n o r * + * * + * write 'sectors' sectors to DOCH * + * * + * Parameters : * + * base : pointer to the base of DOCH register set * + * src : buffer to write from * + * sectors : number of sectors to write * + * * + * Returns : * + * always zero (success) * + * * + ******************************************************************************/ + +FLSNative hal_blk_write_nor ( volatile FLByte * base, + FLByte * src, + FLSNative sectors ) +{ + volatile FLWord FAR0 * swin = (volatile FLWord FAR0 *)addToFarPointer(base, DOCH_DATA_PORT_AREA); + FLSNative count = sectors<> 1; i < (int)count; i++) + /* while incrementing buffer offset */ + /* but do not increament DiskOnChip offset */ + DOCHWRITE_IO_WORD(((FLWord FAR1 *)src)[i],swin); + } + } + return 0; +} + + +#ifdef __cplusplus +} +#endif + +#else /*DOCH_USE_FUNC*/ + +DOCH_Error hal_init_nor_noFunc ( FLSNative socketNo) +{ + gAccessLayerType = DOCH_AL_NOR; + + return DOCH_OK; +} + +#endif /*DOCH_USE_FUNC*/ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hal_nor.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hal_nor.h new file mode 100755 index 00000000..c427a041 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hal_nor.h @@ -0,0 +1,91 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/hal_nor.h-arc $ + * + * Rev 1.17 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.16 Sep 11 2006 13:45:26 yaniv.iarovici + * Legal header added + * + * Rev 1.15 Aug 09 2006 17:26:56 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +#ifndef DOCH_SYS_NOR_H +#define DOCH_SYS_NOR_H + +#include "flsystyp.h" +#include "doch_api.h" +#include "hib.h" + +#ifdef __cplusplus +extern "C" { +#endif + +DOCH_Error hal_init_nor (FLSNative socketNo); +DOCH_Error hal_init_nor_noFunc (FLSNative socketNo); +FLByte hal_get_ata_reg_nor (volatile FLByte *base, FLSNative reg); +void hal_set_ata_reg_nor (volatile FLByte *base, FLSNative reg, FLNative val); +FLWord hal_get_ctrl_reg_nor (volatile FLByte *base, FLSNative reg); +void hal_set_ctrl_reg_nor (volatile FLByte *base, FLSNative reg, FLNative val); +FLSNative hal_blk_read_nor (volatile FLByte *base, FLByte *buf, FLSNative sectors); +FLSNative hal_blk_write_nor (volatile FLByte *base, FLByte *buf, FLSNative sectors); +FLSNative doch_sys_release_nor (int socketNo); + +/*Default read.write routines, using the ATA data register*/ +void blk_read_using_data_reg ( volatile FLByte * base, + FLByte * buf, + FLSNative bytes ); + +void blk_write_using_data_reg ( volatile FLByte * base, + FLByte * buf, + FLSNative bytes ); + +#ifdef __cplusplus +} +#endif + +#endif /*DOCH_SYS_NOR_H*/ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hib.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hib.h new file mode 100755 index 00000000..cf74bede --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/hib.h @@ -0,0 +1,272 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/general storage/TrueFFS (7.x)/src/H3/Include/hib.h-arc $ + * + * Rev 1.24 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.23 Oct 21 2007 10:46:04 Einat.Avidan + * optimization: save address of each Hib area instead of + * saving offset and core address (spare repetitive add commands) + * + * Rev 1.22 Sep 11 2006 13:45:26 yaniv.iarovici + * Legal header added + * + * Rev 1.21 Aug 09 2006 17:26:56 Polina.Marimont + * initial for DOC Driver 1.0 + * + */ + +#ifndef HIB_H +#define HIB_H + +/* HIB registers */ +/* ============= */ + +extern FLWord gMemWindowType; +extern FLDword gDochMemWinSize; + +extern FLWord gHibContRegAreaAddress; +extern FLWord gHibDataPortAreaAddress; +extern FLWord gHibConfigRegAreaAddress; + +/*Memory window type and size*/ +/*---------------------------*/ +/*Type*/ +#define MEM_WIN_8KB 0 +#define MEM_WIN_128KB 1 + +/*Size*/ +#define DOCH_MEM_WIN_SIZE (gDochMemWinSize) +#ifdef DOCH_32K_SLIDING_WINDOW + #define DOCH_MEM_WIN_SIZE_8KB 0x8000 /*32KB*/ + #define DOCH_MEM_WIN_SIZE_128KB 0x8000 /*32KB*/ +#else /*DOCH_32K_SLIDING_WINDOW*/ + #define DOCH_MEM_WIN_SIZE_8KB 0x2000 /*8KB*/ + #define DOCH_MEM_WIN_SIZE_128KB 0x20000 /*128KB*/ +#endif /*DOCH_32K_SLIDING_WINDOW*/ + +/*Register Areas*/ +/*--------------*/ + + +#define HIB_CORE_ADDRESS_8KB 0x0000 +#ifdef DOCH_32K_SLIDING_WINDOW + #define HIB_CORE_ADDRESS_128KB 0x0000 +#else /*DOCH_32K_SLIDING_WINDOW*/ + #define HIB_CORE_ADDRESS_128KB 0x8000 +#endif /*DOCH_32K_SLIDING_WINDOW*/ + +/*Area Address*/ +#ifndef DOCH_CONT_REG_AREA_ADDRESS + #define DOCH_CONT_REG_AREA_ADDRESS (gHibContRegAreaAddress) +#endif /*DOCH_CONT_REG_AREA_ADDRESS*/ + +#ifndef DOCH_DATA_PORT_AREA_ADDRESS + #define DOCH_DATA_PORT_AREA_ADDRESS (gHibDataPortAreaAddress) +#endif /*DOCH_DATA_PORT_AREA_ADDRESS*/ + +#ifndef DOCH_CONFIG_REG_AREA_ADDRESS + #define DOCH_CONFIG_REG_AREA_ADDRESS (gHibConfigRegAreaAddress) +#endif /*DOCH_CONFIG_REG_AREA_ADDRESS*/ + +/*8KB Offsets*/ +#define DOCH_CONT_REG_AREA_8KB_OFFSET 0x0800 +#define DOCH_DATA_PORT_AREA_8KB_OFFSET 0x1000 +#define DOCH_CONFIG_REG_AREA_8KB_OFFSET 0x1400 + +/*128KB Offsets*/ +#define DOCH_CONT_REG_AREA_128KB_OFFSET 0 +#define DOCH_DATA_PORT_AREA_128KB_OFFSET 0x0800 +#define DOCH_CONFIG_REG_AREA_128KB_OFFSET 0x1400 +#define DOCH_PRIMARY_SECONDARY_AREA_128KB_OFFSET 0x1800 + + +#define DOCH_CONT_REG_AREA DOCH_CONT_REG_AREA_ADDRESS +#define DOCH_DATA_PORT_AREA DOCH_DATA_PORT_AREA_ADDRESS +#define DOCH_CONFIG_REG_AREA DOCH_CONFIG_REG_AREA_ADDRESS + + +/* Control registers - offset is from DOCH_CONT_REG_AREA*/ +/*------------------------------------------------------*/ +#define DOCH_VERSION_REG (DOCH_CONT_REG_AREA + 0xC1A) +#define DOCH_LAST_ACCESS_ADDR_REG (DOCH_CONT_REG_AREA + 0xC1E) +#define DOCH_PAGED_RAM_CMD_REG (0x30) +#define DOCH_PAGED_RAM_SELECT_REG (0x70) +#define DOCH_PAGED_RAM_COTP_STAT_DL_REG (0x78) +#define DOCH_PAGED_RAM_COTP_SELECT_REG (0x7C) +#define DOCH_PAGED_RAM_UNIQUE_ID_DL (0x80) + +/* Host Configuration registers - offset is from DOCH_CONFIG_REG_AREA*/ +/*-------------------------------------------------------------------*/ +#define HIB_CHIPID1_REG (DOCH_CONFIG_REG_AREA) +#define HIB_BURST_WRITE_MODE_CTRL_REG (DOCH_CONFIG_REG_AREA + 0x02) +#define HIB_BURST_WRITE_MODE_EXIT_REG (DOCH_CONFIG_REG_AREA + 0x04) +#define HIB_DOWNLOAD_CONTROL_REG (DOCH_CONFIG_REG_AREA + 0x06) +#define HIB_IPL_CONTROL_REG (DOCH_CONFIG_REG_AREA + 0x08) +#define HIB_WARM_BOOT_REG (DOCH_CONFIG_REG_AREA + 0x0A) +#define HIB_POWER_DOWN_REG (DOCH_CONFIG_REG_AREA + 0x0C) +#define HIB_DMA_CTRL_REG (DOCH_CONFIG_REG_AREA + 0x0E) +#define HIB_SW_LOCK_REG (DOCH_CONFIG_REG_AREA + 0x10) +#define HIB_ENDIAN_CTRL_REG (DOCH_CONFIG_REG_AREA + 0x12) +#define HIB_OPERATION_MODE_REG (DOCH_CONFIG_REG_AREA + 0x14) +#define HIB_POWER_MODE_REG (DOCH_CONFIG_REG_AREA + 0x16) +#define HIB_DMA_NEGATION_REG (DOCH_CONFIG_REG_AREA + 0x18) +#define HIB_CHIPID2_REG (DOCH_CONFIG_REG_AREA + 0x22) +#define HIB_BURST_READ_MODE_CTRL_REG (DOCH_CONFIG_REG_AREA + 0x24) + + + + +/*Specific per-register values*/ +/*============================*/ +/*Burst Read/Write Mode Control Register*/ +#define HIB_BURST_HOLD_1_CLK 0x0000 +#define HIB_BURST_HOLD_2_CLK 0x2000 + +#define HIB_BURST_LEN_4_CYC 0x0000 +#define HIB_BURST_LEN_8_CYC 0x0800 +#define HIB_BURST_LEN_16_CYC 0x1000 +#define HIB_BURST_LEN_32_CYC 0x1800 + +#define HIB_BURST_DISABLE 0x0000 +#define HIB_BURST_ENABLE 0x0001 + +/*Download Control Register*/ +#define HIB_DOWNLOAD_COMPLETED 0x0000 +#define HIB_DOWNLOAD_IN_PROCESS 0x0001 + +/*IPL Control Register*/ +#define HIB_IPL_WRITE_DISABLE 0x0000 +#define HIB_IPL_WRITE_ENABLE 0x0001 + +#define HIB_IPL_NOT_READY_FOR_WRITE 0x0000 +#define HIB_IPL_READY_FOR_WRITE 0x0002 + +/*Warm Boot Register*/ +#define HIB_WARM_RST_POLARITY_LOW 0x0000 +#define HIB_WARM_RST_POLARITY_HIGH 0x0001 + +#define HIB_WARM_RST_BURST_ON 0x0000 +#define HIB_WARM_RST_BURST_NO_CHNG 0x0002 + +/*Power Down Register*/ +#define HIB_DPD_PIN_POLARITY_LOW 0x0000 +#define HIB_DPD_PIN_POLARITY_LOW 0x0000 + +#define HIB_DPD_PIN_DISABLE 0x0000 +#define HIB_DPD_PIN_ENABLE 0x0002 + +/*DMA Control Register*/ +#define HIB_DMA_REQ_DISABLE 0x0000 +#define HIB_DMA_REQ_ENABLE 0x0001 + +#define HIB_DMA_REQ_POL_HIGH 0x0000 +#define HIB_DMA_REQ_POL_LOW 0x0002 + +#define HIB_DMA_REQ_LEVEL 0x0000 +#define HIB_DMA_REQ_EDGE 0x0004 + +/*S/W Lock Register*/ +#define HIB_SW_LOCK_ON 0x0001 + +/*Endian Control Register*/ +#define HIB_END_SWAP_OFF 0x0000 +#define HIB_END_SWAP_ON 0x0101 + +/*Operation Mode Register*/ +#define HIB_NON_PIPE_ACCESS 0x00 +#define HIB_PIPE_ACCESS 0x01 + +#define HIB_NO_ADDR_SHIFT 0x00 +#define HIB_ADDR_SHIFT 0x02 + +/*Power Mode Register*/ +#define HIB_POWER_DOWN 0x0001 + +/*Paged RAM Command Register*/ +#define HIB_PAGED_RAM_ENABLE_SELECT 0x71 + +/*Paged RAM Select Register*/ +#define HIB_PAGED_RAM_SEQ 0x0080 + + +/*Folloing array is used to conserve every write to a configuration register. +The purpose is to enable reseting the device registers in case of power loss*/ +typedef struct { + FLWord wBurstWriteModeCtrl; + FLWord wIPLCtrl; + FLWord wPowerDown; + FLWord wDMACtrl; + FLWord wSWLock; + FLWord wEndianCtrl; + FLWord wEndianNegation; + FLWord wOperationMode; + FLWord wBurstReadModeCtrl; +} DOCH_ConfigRegsValue; + +typedef struct { + FLWord wBurstWriteModeCtrlSet; + FLWord wIPLCtrlSet; + FLWord wPowerDownSet; + FLWord wDMACtrlSet; + FLWord wSWLockSet; + FLWord wEndianCtrlSet; + FLWord wEndianNegationSet; + FLWord wOperationModeSet; + FLWord wBurstReadModeCtrlSet; +} DOCH_ConfigRegsSet; + +/* Changing device memory window size (8/128 KB)*/ +#define DOCH_PAGED_RAM_TIMEOUT 300000L +#define DOCH_READ_PAGED_RAM_DELAY 20 + +typedef enum { + DOCH_MEM_WIN_SIZE_8K = 0, + DOCH_MEM_WIN_SIZE_128K = 1, /*Regular, with no pull-downs on high address bits*/ + DOCH_MEM_WIN_SIZE_128K_SPECIAL = 2 /*Special, with pull-downs on high address bits*/ +} DOCH_MemWinSize; + +#endif /*HIB_H*/ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/ioctl_example/Makefile b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/ioctl_example/Makefile new file mode 100755 index 00000000..62a80263 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/ioctl_example/Makefile @@ -0,0 +1,72 @@ +#=============================================================================== +# +# Makefile for IOCTL demo application for DOC driver. +# +#=============================================================================== +# +# Copyright (C) 2006 msystems Ltd. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. Neither the name of msystems nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#=============================================================================== + + +# +# Specify root directory of Linux kernel's source tree as appropriate +# for your installation. +# +KERNEL_DIR = /opt/ti/omap2420/kernel/269 + +# +# Specify which compiler to use (default is ARM/GCC compiler) +# +CC = arm-unknown-linux-gnu-gcc + +# +# Specify compiler flags in the same fashion as 'make modules' does. +# Flags below are appropriate for XScale compilation. +# +CFLAGS += -I$(KERNEL_DIR)/include +CFLAGS += -I.. +CFLAGS += -Wall +# CFLAGS += -g + +# +# 'make all' rule +# +all : ioctl-example + +# +# make 'ioctl-example' demo application +# +ioctl-example : ioctl-example.c + $(CC) $(CFLAGS) -o $@ $< + +# +# 'make clean' rule +# +clean : + rm -f *.o ioctl-example + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/ioctl_example/ioctl-example.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/ioctl_example/ioctl-example.c new file mode 100755 index 00000000..bc9c4844 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/ioctl_example/ioctl-example.c @@ -0,0 +1,791 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2006, msystems Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of msystems nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/******************************************************************************/ + + +#include +#include +#include +#include +#include +#include +#include +#include "tffsioct.h" + + + + +#define ALLOW_FORMATTING +#undef ALLOW_BDK +#define ALLOW_HW_PROTECTION + + +/* make TrueFFS ahndle out of socket and disk ## */ +#define mk_tffs_handle(socNo,diskNo) (((unsigned short)(socNo) & 0xf) | \ + (((unsigned int)(diskNo) << 4) & 0xf0)) + + +/* + * static routines + */ + +static int fl_ioctl_get_info (int fd); +static int fl_ioctl_defragment (int fd); +static int fl_ioctl_customer_id (int fd); + +#ifdef ALLOW_BDK + static int fl_ioctl_bdk_operation (int fd); +#endif + +static int hdio_getgeo (int fd); + +#ifdef ALLOW_FORMATTING + static int fl_ioctl_erase_bd (int fd); + static int fl_ioctl_flash_format (int fd); + static int fl_ioctl_flash_unformat (int fd); + static int fl_ioctl_mount_volume (int fd); +#endif + +#ifdef ALLOW_HW_PROTECTION + static int fl_ioctl_hw_protection (int fd, int ioctl_opcode); +#endif + + + + +int main ( int argc, char * argv[] ) +{ + int ioctl_opcode; + int flags; + int fd; + int rc = -1; + + /* check if devce name and IOCTL opcode are specified, and get IOCTL opcode */ + if ((argc < 3) || (sscanf(argv[2], "%d", &ioctl_opcode) != 1)) + { + fprintf (stderr, "Usage: ioctl-example \n"); + fprintf (stderr, "Example: ioctl-example /dev/tffsa 14\n"); + fprintf (stderr, "Accepted values for :\n"); + fprintf (stderr, " %d for FL_IOCTL_CUSTOMER_ID\n", FL_IOCTL_CUSTOMER_ID); + fprintf (stderr, " %d for FL_IOCTL_DEFRAGMENT\n", FL_IOCTL_DEFRAGMENT); + fprintf (stderr, " %d for FL_IOCTL_GET_INFO\n", FL_IOCTL_GET_INFO); +#ifdef ALLOW_BDK + fprintf (stderr, " %d for FL_IOCTL_BDK_OPERATION\n", FL_IOCTL_BDK_OPERATION); +#endif +#ifdef ALLOW_FORMATTING + fprintf (stderr, " %d for FL_IOCTL_MOUNT_VOLUME\n", FL_IOCTL_MOUNT_VOLUME); + fprintf (stderr, " %d for FL_IOCTL_ERASE_BD\n", FL_IOCTL_ERASE_BD); + fprintf (stderr, " %d for FL_IOCTL_FLASH_FORMAT\n", FL_IOCTL_FLASH_FORMAT); + fprintf (stderr, " %d for FL_IOCTL_FLASH_UNFORMAT\n", FL_IOCTL_FLASH_UNFORMAT); +#endif +#ifdef ALLOW_HW_PROTECTION + fprintf (stderr, " %d for FL_IOCTL_BDTL_HW_PROTECTION\n", FL_IOCTL_BDTL_HW_PROTECTION); +#endif + fprintf (stderr, " %d for HDIO_GETGEO\n", 0x0301 /* HDIO_GETGEO */); + exit (-1); + } + + /* open device */ + flags = ((ioctl_opcode == FL_IOCTL_GET_INFO) ? O_RDONLY : O_RDWR); + if((fd = open(argv[1], flags)) == -1) + { + perror ("Can't open device"); + exit (-1); + } + + /* issue IOCTL to device */ + switch (ioctl_opcode) + { + case FL_IOCTL_CUSTOMER_ID: + rc = fl_ioctl_customer_id (fd); + break; + + case FL_IOCTL_DEFRAGMENT: + rc = fl_ioctl_defragment (fd); + break; + + case FL_IOCTL_MOUNT_VOLUME: + rc = fl_ioctl_mount_volume (fd); + break; + + case FL_IOCTL_GET_INFO: + rc = fl_ioctl_get_info (fd); + break; + +#ifdef ALLOW_BDK + case FL_IOCTL_BDK_OPERATION: + rc = fl_ioctl_bdk_operation (fd); + break; +#endif + +#ifdef ALLOW_FORMATTING + case FL_IOCTL_ERASE_BD: + rc = fl_ioctl_erase_bd (fd); + break; + + case FL_IOCTL_FLASH_FORMAT: + rc = fl_ioctl_flash_format (fd); + break; + + case FL_IOCTL_FLASH_UNFORMAT: + rc = fl_ioctl_flash_unformat (fd); + break; +#endif + +#ifdef ALLOW_HW_PROTECTION + case FL_IOCTL_BDTL_HW_PROTECTION: + rc = fl_ioctl_hw_protection (fd, ioctl_opcode); + break; +#endif + + case 0x0301: /* HDIO_GETGEO */ + rc = hdio_getgeo (fd); + break; + + } + + close (fd); + + exit (rc); +} + + + + +static +int fl_ioctl_customer_id (int fd) +{ + flIOctlRecord ioctl_data; + flCustomerIdOutput out; + int rc; + + ioctl_data.inputRecord = NULL; /* no input record for this IOCTL */ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_CUSTOMER_ID, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_CUSTOMER_ID IOCTL failed, error %d\n", out.status); + else + fprintf (stdout, "SUCCESS getting customer ID: 0x%x 0x%x 0x%x 0x%x\n", + out.id[0], out.id[1], out.id[2], out.id[3]); + return rc; +} + + + + +static +int fl_ioctl_defragment (int fd) +{ + flIOctlRecord ioctl_data; + flDefragInput in; + flDefragOutput out; + int rc; + + in.requiredNoOfSectors = -1; + + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_DEFRAGMENT, &ioctl_data); + if ((rc == 0) && (out.status == flOK)) + fprintf (stdout, "free sectors after defragmentation: %ld\n", out.actualNoOfSectors); + + return rc; +} + + + + +static +int fl_ioctl_get_info (int fd) +{ + flIOctlRecord ioctl_data; + flDiskInfoOutput out; + int rc; + + ioctl_data.inputRecord = NULL; /* no input record for this IOCTL */ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_GET_INFO, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_GET_INFO failed %d\n", out.status); + else + fprintf (stdout, "FL_IOCTL_GET_INFO reports %ld sectors\n", out.info.logicalSectors); + + return rc; +} + + + + +#ifdef ALLOW_FORMATTING + +static +int fl_ioctl_mount_volume (int fd) +{ + flIOctlRecord ioctl_data; + flMountInput in; + flOutputStatusRecord out; + int rc; + + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + +#if 1 + in.type = FL_DISMOUNT; /* unmount disk */ +#else + in.type = FL_MOUNT; /* re-mount disk */ +#endif + + rc = ioctl (fd, FL_IOCTL_MOUNT_VOLUME, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_MOUNT_VOLUME failed %d\n", out.status); + + return rc; +} + +#endif /* ALLOW_FORMATTING */ + + + + +#ifdef ALLOW_FORMATTING + +static +int fl_ioctl_erase_bd (int fd) +{ + flIOctlRecord ioctl_data; + int rc; + + /* unmount disk before formatting */ + { flMountInput in; + flOutputStatusRecord out; + + in.type = FL_DISMOUNT; + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_MOUNT_VOLUME, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_MOUNT_VOLUME/FL_DISMOUNT failed %d\n", out.status); + } + + /* re-format disk */ + { flEraseBDInput in; + flOutputStatusRecord out; + + in.dwFlags = 0; + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_ERASE_BD, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_ERASE_BD failed %d\n", out.status); + } + + /* re-mount disk */ + { flMountInput in; + flOutputStatusRecord out; + + in.type = FL_MOUNT; + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_MOUNT_VOLUME, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_MOUNT_VOLUME/FL_MOUNT failed %d\n", out.status); + } + + return rc; +} + +#endif /* ALLOW_FORMATTING */ + + + + +#ifdef ALLOW_FORMATTING + +static +int fl_ioctl_flash_format (int fd) +{ + flIOctlRecord ioctl_data; + flOutputStatusRecord out; + int rc; + + /* WARNING: You must send FL_IOCTL_MOUNT_VOLUME/FL_DISMOUNT call + * to all DiskOnChip disks (except for '/dev/tffsa') prior + * to calling this routine. You should not do that for + * /dev/tffsa - this routine must do it by itself. + */ + + /* send FL_IOCTL_MOUNT_VOLUME/FL_DISMOUNT call to '/dev/tffsa' */ + { flMountInput in; + + in.type = FL_DISMOUNT; + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_MOUNT_VOLUME, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_MOUNT_VOLUME/FL_DISMOUNT failed %d\n", out.status); + } + + /* format DiskOnChip */ + { flFlashFormatInput in; + FormatParams3 fp3; + BDTLPartitionFormatParams3 disks[16]; /* WARNING: Large data structure 1 */ + BinaryPartitionFormatParams3 bins[4]; + + memset (&in, 0, sizeof(in)); + memset (&fp3, 0, sizeof(FormatParams3)); + memset (disks, 0, sizeof(disks)); + memset (bins, 0, sizeof(bins)); + + in.fpPtr = &fp3; +#if 1 + in.dwFormatFlags = TL_NORMAL_FORMAT; +#else + /* If you intent on keeping some of BDTL partitions, uncomment + * this section, and specify how many partitions you want to keep. + */ + in.dwFormatFlags = TL_LEAVE_SOME_PARTITIONS; + in.sdwNoOfKeeps = 5; /* keep this many partitions */ +#endif + + fp3.progressCallback = NULL; + fp3.percentUse = 95; + fp3.BDTLPartitionInfo = &disks[0]; + fp3.binaryPartitionInfo = &bins[0]; + fp3.noOfBinaryPartitions = 0; + fp3.noOfBDTLPartitions = 0; + + /* specify size of 1-st DiskOnChip disk */ + disks[ fp3.noOfBDTLPartitions ].length = (40 * 0x100000); /* disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; +#if 0 + /* specify sizes of 2-nd .. 13-th DiskOnChip disk (if you need them) */ + disks[ fp3.noOfBDTLPartitions ].length = (20 * 0x100000); /* 2-nd disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (30 * 0x100000); /* 3-rd disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (40 * 0x100000); /* 4-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (50 * 0x100000); /* 5-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (60 * 0x100000); /* 6-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (70 * 0x100000); /* 7-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (80 * 0x100000); /* 8-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (90 * 0x100000); /* 9-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (50 * 0x100000); /* 10-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (50 * 0x100000); /* 11-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (50 * 0x100000); /* 12-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; + + disks[ fp3.noOfBDTLPartitions ].length = (50 * 0x100000); /* 13-th disk size in bytes */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; +#endif + +#if 1 /* specify size of last DiskOnChip disk (if you need it) */ + disks[ fp3.noOfBDTLPartitions ].length = 0; /* take all remaing space on DiskOnChip */ + disks[ fp3.noOfBDTLPartitions++ ].noOfSpareUnits = 3; +#endif + +#if 0 + /* specify size of the first binary partition */ + bins[fp3.noOfBinaryPartitions].length = (1 * 0x100000); /* size in bytes */ + memcpy (bins[fp3.noOfBinaryPartitions].sign, "BIPO", 4); + fp3.noOfBinaryPartitions++; + + /* specify size of the second binary partition */ + bins[fp3.noOfBinaryPartitions].length = (2 * 0x100000); /* size in bytes */ + memcpy (bins[fp3.noOfBinaryPartitions].sign, "BIPO", 4); + fp3.noOfBinaryPartitions++; +#endif + + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + + rc = ioctl (fd, FL_IOCTL_FLASH_FORMAT, &ioctl_data); + + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_FLASH_FORMAT failed %d\n", out.status); + } + + /* re-mount disk */ + { flMountInput in; + + in.type = FL_MOUNT; + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_MOUNT_VOLUME, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_MOUNT_VOLUME/FL_MOUNT failed %d\n", out.status); + } + + /* WARNING: You must kill DiskOnChip driver and reboot your system now ! */ + return rc; +} + +#endif /* ALLOW_FORMATTING */ + + + + +#ifdef ALLOW_FORMATTING + +static +int fl_ioctl_flash_unformat (int fd) +{ + flIOctlRecord ioctl_data; + flOutputStatusRecord out; + int rc; + + /* unmount disk before formatting */ + { flMountInput in; + + in.type = FL_DISMOUNT; + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_MOUNT_VOLUME, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_MOUNT_VOLUME/FL_DISMOUNT failed %d\n", out.status); + } + + { flFlashUnformatInput in; + + in.dwFlags = 0; + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_FLASH_UNFORMAT, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "FL_IOCTL_FLASH_UNFORMAT failed %d\n", out.status); + } + + /* WARNING: You must kill DiskOnChip driver and reboot your system now ! */ + return rc; +} + +#endif /* ALLOW_FORMATTING */ + + + + +static +int hdio_getgeo (int fd) +{ + struct hd_geometry + { + unsigned char heads; + unsigned char sectors; + unsigned short cylinders; + unsigned long start; + }; + + struct hd_geometry geo; + int rc; + + if ((rc = ioctl(fd, 0x0301 /* HDIO_GETGEO */, &geo)) != 0) + perror ("Error in HDIO_GETGEO"); + else + printf ("Disk geometry: %d heads, %d cylinders, %d sectors, start sector %ld\n", + (int)geo.heads, (int)geo.cylinders, (int)geo.sectors, geo.start); + return rc; +} + + + +#ifdef ALLOW_BDK + +static +int fl_ioctl_bdk_operation (int fd) +{ + flIOctlRecord ioctl_data; + int buf_size = (4 * 1024); + char * buf; + char * buf2; + int rc; + register int iBin = 0; + + /* allocate buffers */ + if ((buf = malloc(buf_size)) == NULL) + { + fprintf (stderr, "Can't alloc buffer"); + return -1; + } + if ((buf2 = malloc(buf_size)) == NULL) + { + fprintf (stderr, "Can't alloc buffer"); + free (buf); + return -1; + } + +#if 0 + for (; iBin <= 1; iBin++) +#endif + { + /* set this binary partition as the target of subsequent IOCTLs */ + + { flInputLnxRecord in; + flOutputLnxRecord out; + + in.command = 0; + in.data = mk_tffs_handle (0, 0); + + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + + rc = ioctl (fd, FL_IOCTL_LNX, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + { + fprintf (stderr, "FL_IOCTL_LNX failed %d\n", (int)out.status); + rc = -1; + goto quit; + } + } + + /* write, the read back and verify 'buf_size' bytes to this binary partition */ + + { flBDKOperationInput in; + flOutputStatusRecord out; + + fprintf (stdout, "Writing %d bytes to binary partition %d\n", buf_size, iBin); + + in.type = BDK_GET_INFO; + in.bdkStruct.flags = 0; + in.bdkStruct.length = 0; + in.bdkStruct.startingBlock = 0; + in.bdkStruct.bdkBuffer = NULL; + in.bdkStruct.signOffset = 8; + if (iBin == 0) + memcpy (in.bdkStruct.oldSign, "BIPO", 4); + else + memcpy (in.bdkStruct.oldSign, "BIPO", 4); + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_BDK_OPERATION, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + { + fprintf (stderr, "FL_IOCTL_BDK_OPERATION/BDK_GET_INFO failed %d\n", out.status); + rc = -1; + goto quit; + } + + in.type = BDK_INIT_WRITE; + in.bdkStruct.flags = 0; + in.bdkStruct.length = buf_size; + in.bdkStruct.bdkBuffer = NULL; + in.bdkStruct.signOffset = 8; + if (iBin == 0) + { + in.bdkStruct.startingBlock = 0; + memcpy (in.bdkStruct.oldSign, "BIPO", 4); + } + else + { + in.bdkStruct.startingBlock = 15; + memcpy (in.bdkStruct.oldSign, "BIPO", 4); + } + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_BDK_OPERATION, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + { + fprintf (stderr, "FL_IOCTL_BDK_OPERATION/BDK_INIT_WRITE failed %d\n", out.status); + rc = -1; + goto quit; + } + + in.type = BDK_WRITE; + in.bdkStruct.flags = ERASE_BEFORE_WRITE; + in.bdkStruct.length = buf_size; + in.bdkStruct.bdkBuffer = buf; + memset (buf, '$', buf_size); + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_BDK_OPERATION, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + { + fprintf (stderr, "FL_IOCTL_BDK_OPERATION/BDK_WRITE failed %d\n", out.status); + rc = -1; + goto quit; + } + + fprintf (stdout, "SUCCESS writing %d bytes to binary partition %d\n", buf_size, iBin); + + fprintf (stdout, "Reading back and verifying %d bytes from binary partition %d\n", buf_size, iBin); + + in.type = BDK_INIT_READ; + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_BDK_OPERATION, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + { + fprintf (stderr, "FL_IOCTL_BDK_OPERATION/BDK_INIT_READ failed %d\n", out.status); + rc = -1; + goto quit; + } + + in.type = BDK_READ; + in.bdkStruct.bdkBuffer = buf2; + memset (buf2, 0, buf_size); + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + rc = ioctl (fd, FL_IOCTL_BDK_OPERATION, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + { + fprintf (stderr, "FL_IOCTL_BDK_OPERATION/BDK_READ failed %d\n", out.status); + rc = -1; + goto quit; + } + + if( memcmp(buf, buf2, buf_size) != 0) + { + fprintf (stderr, "Error: mismatching data\n"); + rc = -1; + goto quit; + } + fprintf (stdout, "SUCCESS reading back and verifying data\n"); + } + } /* for(iBin) */ + +quit: + + free (buf); + free (buf2); + + return rc; +} + +#endif /* ALLOW_BDK */ + + + +#ifdef ALLOW_HW_PROTECTION + +/* + * This routine sets TrueFFS handle for subsequent IOCTLs + */ +static +int set_ioctl_handle (int fd, int tffs_handle) +{ + flIOctlRecord ioctl_data; + flInputLnxRecord in; + flOutputLnxRecord out; + int rc; + + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + + in.command = 0; + in.data = tffs_handle; + + rc = ioctl (fd, FL_IOCTL_LNX, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + { + fprintf (stderr, "FL_IOCTL_LNX failed %d\n", (int)out.status); + rc = -1; + } + else + fprintf (stdout, "SUCCESS setting handle 0x%x for future IOCTLs\n", tffs_handle); + + return rc; +} + + + +/* + * This routine provides example of using FL_IOCTL_..._HW_PROTECTION + * IOCTLs to insert key into protected partition. + */ +static +int fl_ioctl_hw_protection (int fd, int ioctl_opcode) +{ + flIOctlRecord ioctl_data; + int socket_no = 0; + int partition_no; + int rc; + + partition_no = /* specify your own partition here */ 0; + + /* set TrueFFS handle for subsequent IOCTL */ + + rc = set_ioctl_handle (fd, mk_tffs_handle(socket_no, partition_no)); + if (rc != 0) + return rc; + + /* insert key into partition */ + + { flProtectionInput in; + flProtectionOutput out; + + ioctl_data.inputRecord = ∈ + ioctl_data.outputRecord = &out; + + in.type = PROTECTION_INSERT_KEY; + + /* this is my usual key; replace it with your own */ + + in.key[0] = 'p'; + in.key[1] = 'i'; + in.key[2] = 's'; + in.key[3] = 's'; + in.key[4] = 'w'; + in.key[5] = 'o'; + in.key[6] = 'r'; + in.key[7] = 'd'; + + in.protectionType = 0; /* not actually used by PROTECTION_INSERT_KEY */ + + rc = ioctl (fd, ioctl_opcode, &ioctl_data); + if ((rc != 0) || (out.status != flOK)) + fprintf (stderr, "%d IOCTL failed %d\n", ioctl_opcode, out.status); + else + fprintf (stdout, "SUCCESS inserting protection key\n"); + } + + /* for security, set TrueFFS handle to impossible value (0xffff) */ + + set_ioctl_handle (fd, 0xffff); + + return rc; +} + +#endif /* ALLOW_HW_PROTECTION */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/part_inf.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/part_inf.h new file mode 100755 index 00000000..c817533c --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/part_inf.h @@ -0,0 +1,227 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ + +/***********************************************************************************/ +/* */ +/* This file contains various structure and defines concerning Partition info and */ +/* access */ +/* */ +/***********************************************************************************/ + +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/part_inf.h-arc $ + * + * Rev 1.20 Oct 22 2007 11:34:54 einat.avidan + * update copyrights header + * + * Rev 1.19 Feb 28 2007 09:53:48 einat.avidan + * No change + * + * Rev 1.18.1.0 Nov 30 2006 10:24:10 Yaniv.Iarovici + * Added 'DOCH_SecureDeleteDev1' to SDK Device Attributes. + * + * Rev 1.18 Sep 11 2006 13:45:26 yaniv.iarovici + * Legal header added + * + * Rev 1.17 Aug 09 2006 17:26:58 Polina.Marimont + * initial for DOC Driver 1.0 + * + * Rev 1.16.1.0 Aug 08 2006 15:55:32 Polina.Marimont + * DOC Driver 1.0 initial + * + * Rev 1.16 May 28 2006 13:02:34 polina.marimont + * 1. IDENTIFY DEVICE interface update + * 2. floors fix for format, where partition ended at the end of floor 0 + * + * Rev 1.15 May 18 2006 14:41:24 polina.marimont + * v1.40Fin1, PVCS log inside + */ + +#ifndef _PARTITION_INFO_H +#define _PARTITION_INFO_H + +#include "doch_api.h" + +/* Extended device info structure*/ +typedef struct { + FLWord wFlashType; + FLWord wPhysicalPageSize; /*In Sectors*/ + FLWord wNumOfPhysicalPagesInPhysicalErasableBlockSize; + FLWord wNumOfErasableBlocksPerPhysicalChip; + FLWord wPhysicalChipBusWidth; /*8/16*/ + FLWord wNumOfChipsOnDataBus; /*1..2*/ + FLWord wFlashChipNumOfPlanes; /*1..4*/ + FLWord wFlashChipNumOfBanks; /*Independently accessible parts of flash array*/ + FLWord wLogicalPageSize; /*In Sectors*/ + FLWord wNumOfLogicalPagesInLogicalErasableBlockSize; + FLWord wTotalNumOfLogicalErasableUnits; + FLWord wMapinfoUnitsUsed; + FLWord wLUNCurrentlyUsed; + FLWord wFreeUnitsOnMedia; + FLByte bReserved1[0x1E4]; +} DOCH_ExtendedDeviceInfo; + +/*Partition user attributes +512Byte overall (1 sector) +First DOCH_PART_INFO_SDK_RESERVED_BYTES bytes are reserved for SDK*/ +#define DOCH_PART_INFO_SDK_RESERVED_BYTES 0x40 +typedef struct { + FLByte bReserved1[DOCH_PART_INFO_SDK_RESERVED_BYTES]; /*For SDK use*/ + FLByte bReserved2[DOCH_SECTOR_SIZE - DOCH_PART_INFO_SDK_RESERVED_BYTES]; /*For application use*/ +} DOCH_PartitionUserAttr; + +/*Device user attributes +512Byte overall (1 sector) +First DOCH_DEVICE_INFO_SDK_RESERVED_BYTES bytes are reserved for SDK*/ +#define DOCH_DEVICE_INFO_SDK_RESERVED_BYTES 0x40 + +typedef struct { + FLByte bLastDev0PartSpanned; + FLByte numOfSpannedPartitionOnDev0; + FLByte secondFloorActive; /*At least 1 user partition resides on Dev1*/ + FLByte bLastPartitionOnDev0; /*Number of last partition that resides on Dev0*/ + FLDword dwSpanSector; /*Which sector in the spanned partition is the last that resides on dev0*/ + FLDword dwSpanSizeOnDev0; /*How many sectors on Dev0*/ + FLByte spare[4]; +} DOCH_PartitionSpanData; + +typedef struct { + FLDword dwSecureDeleteStartSector; + FLDword dwSecureDeleteNumOfSectors; + FLByte bOperationRequired; + FLByte bPart; + FLByte spare[2]; +} DOCH_SecureDeleteDev1; + +typedef struct { + DOCH_PartitionSpanData sSpanInfo; + DOCH_SecureDeleteDev1 sSecureDeleteDev1; + FLByte spare[0x24]; /*Rest of 0x40 bytes that are reserved for SDK use*/ +} DOCH_SDKDeviceAttr; + +typedef struct { + DOCH_SDKDeviceAttr sdkAttributes; + FLByte bReserved2[DOCH_SECTOR_SIZE - DOCH_DEVICE_INFO_SDK_RESERVED_BYTES]; /*For application use*/ +} DOCH_DeviceUserAttr; + + +/******************************************************************************/ +/* + * Configuration Partition structure, sub-structures and ENUMS + */ +/******************************************************************************/ + +/*Configuration Partition Layout*/ + +/*Sector #0*/ +typedef struct { + FLWord wVersion; + FLWord wCompatabilityVersion; + FLDword dwCommandFlagsOrStatuses; + FLDword dwDiskAttributes1; + FLDword dwGateKeeperAttr; /*FLDword dwDiskAttributes2;*/ + FLByte bReserved2[0x10]; + FLByte bUniqueID[0x10]; + FLByte bReserved3[0x10]; + FLByte bSerialNumber[0x14]; + FLByte bModelNumber[0x28]; + FLByte breserved4[2]; + FLWord wDefaultPartitionNumber; + FLDword dwUnformattedCapacity; /*In Sectors*/ + FLDword dwConfigurationPartitionExistsSign; + FLDword dwETFFSVER; + FLDword dwConfigPartitionSize; /*In Bytes*/ + FLByte bProgrammerName[0x10]; + FLByte bProgrammerVersion[0x8]; + FLByte bReserved6[0x58]; + FLByte bGateKeeperKey[0x80]; + FLByte bGateKeeperKeyReservedLargerKey[0x80]; +} DOCH_ConfigPartitionSector0; + +/*Sector #1*/ +typedef enum { + DOCH_MP_AUTH_TYPE_NONE = 0, /*No master password*/ + DOCH_MP_AUTH_TYPE_PWD = 1, /*Password protection (Null terminated)*/ + DOCH_MP_AUTH_TYPE_RSA = 2 /*RSA Protection (All 128Bytes are significant*/ +} DOCH_MasterPwdAuthType; + +typedef enum { + DOCH_MAO_MASTER_PWD_AUTH_TYPE = 0 +} DOCH_MasterAttributes_Offset; + +typedef enum { + DOCH_MAB_MASTER_PWD_AUTH_TYPE = 0x0000003F +} DOCH_MasterAttributes_Bits; + +typedef struct { + FLByte bReserved1[0xC]; + FLDword masterAttributes; + FLByte bReserved2[0xF0]; + FLByte bMasterPasskey[0x80]; + FLByte bReservedLargeMasterPasskey[0x80]; +} DOCH_ConfigPartitionSector1; + +/*Sector #2*/ +typedef struct { + FLByte bDochPublicKey[0x80]; + FLByte bReserved1[0x80]; + FLByte bDochPrivateKey[0x80]; + FLByte bReserved2[0x80]; +} DOCH_ConfigPartitionSector2; + +/*Sector #3*/ +/*Identical to DOCH_DriveParameters structure (ATA IDENTIFY_DEVICE structure)*/ + +/*Sectors #4..#14 are reserved*/ + +/*Sector #15 - OTP sector for tester*/ +typedef struct { + FLByte bUniqueID[0x10]; + FLByte bReserved1[0x10]; + FLByte bSerialNumber[0x14]; + FLByte bModelNumber[0x28]; + FLByte bReserved2[0x1A4]; +} DOCH_ConfigPartitionSector15; + + +#endif /*_PARTITION_INFO_H*/ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs-pm26.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs-pm26.c new file mode 100755 index 00000000..1e3e8908 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs-pm26.c @@ -0,0 +1,184 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + + +#include "tffsdrv.h" + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) && defined(CONFIG_PM) + +# if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)) + + /****************************************************************************** + * * + * Generic power management implementation for Linux kernels 2.6.15 and up. * + * * + ******************************************************************************/ + + static int suspend_driver (struct platform_device * dev, pm_message_t state) + { + tffs_suspend(); + return 0; + } + + static int resume_driver (struct platform_device * dev) + { + tffs_resume (); + return 0; + } + + static struct platform_driver pm_driver = + { + .suspend = suspend_driver, + .resume = resume_driver, + .driver = + { + .name = TFFS_DEVICE_NAME, + }, + }; + + int tffs_pm_init (void) + { + int rc; + + if( (rc = platform_driver_register(&pm_driver)) != 0) + PrintkError ("platform_driver_register() failed, PM disabled"); + return rc; + } + + int tffs_pm_exit (void) + { + platform_driver_unregister (&pm_driver); + return 0; + } + +# else /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)) */ + + /****************************************************************************** + * * + * Generic power management implementation for Linux kernels 2.6.0 .. 2.6.14 * + * * + ******************************************************************************/ + +# if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11)) + static int suspend_driver (struct device * dev, pm_message_t state, u32 level) +# else + static int suspend_driver (struct device * dev, u32 state, u32 level) +# endif + { + switch (level) + { + case SUSPEND_POWER_DOWN: + tffs_suspend (); + break; + + case SUSPEND_DISABLE: + case SUSPEND_SAVE_STATE: + default: + break; + } + return 0; + } + + static int resume_driver (struct device * dev, u32 level) + { + switch (level) + { + case RESUME_POWER_ON: + tffs_resume (); + break; + + case RESUME_RESTORE_STATE: + case RESUME_ENABLE: + default: + break; + } + return 0; + } + + static + void pm_release_device (struct device * pdev) + { } + + static struct platform_device pm_device = { + .name = TFFS_DEVICE_NAME, + .id = 0, + .dev.release = pm_release_device, + }; + + static struct device_driver pm_driver = { + .name = TFFS_DEVICE_NAME, + .bus = &platform_bus_type, + .suspend = suspend_driver, + .resume = resume_driver, + }; + + int tffs_pm_init (void) + { + /* register device with Linux Device Manager */ + if( platform_device_register(&pm_device) != 0 ) + { + PrintkError ("can't register device %s with LDM", pm_device.name); + return -ENODEV; + } + + /* register driver with Linux Device Manager */ + if( driver_register(&pm_driver) != 0 ) + { + PrintkError ("can't register driver %s with LDM", pm_driver.name); + + /* unregister device from Linux Device Manager */ + platform_device_unregister (&pm_device); + + return -ENODEV; + } + + return 0; /* success */ + } + + int tffs_pm_exit (void) + { + /* unregister driver from Linux Device Manager */ + driver_unregister (&pm_driver); + + /* unregister device from Linux Device Manager */ + platform_device_unregister (&pm_device); + + return 0; + } + +# endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)) */ +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) && defined(CONFIG_PM) */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs2lnx.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs2lnx.c new file mode 100755 index 00000000..71adf896 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs2lnx.c @@ -0,0 +1,1756 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + +#include "tffsdrv.h" +#include "tffs2lnx.h" +#include "_tffsioct.h" + +#include "fatfilt.h" +#include "flioctl.h" +#include "blockdev.h" +#include "doch_api.h" +#include "doch_ata.h" +#include "defs.h" + + +#define USE_FAT_FILTER /* allow runtime enabling/disabling of FAT filter */ +#define USE_EXT_FILTER /* allow runtime enabling/disabling of EXT filter */ + +#include "extfiltr.h" + + +/* + * global vars + */ + +TffsInfo tffsInfo; + + + +/* + * static routines + */ + +static int /* __init */ init_socket (SocketInfo *pSocket); +static int /* __init */ init_disk (DeviceInfo *pDisk, SocketInfo *pSocket); +static int release_socket (SocketInfo *pSoc); +static int release_disk (DeviceInfo *pDevice); +static void set_disk_geometry (DeviceInfo *pDevice); +static FLStatus socket_std_format (SocketInfo *psoc); +static FLStatus socket_unformat (SocketInfo *psoc); +static FLStatus print_firmware_string (void); +static int ata_passthrough (DeviceInfo *pdev, flIOctlRecord *ioctl_rec_ptr, + flInputLnxRecord *lnx_inrec_ptr); + +#if defined(DOCH_USE_BURST_MODE_READ) || defined(DOCH_USE_BURST_MODE_WRITE) + +/* Command line parameter "tffs_burst_enabled=1" enables synchronous + * burst in DiskOnChip. In this case user might also want to specify + * other burst-releated command-line parameters: + * + * "tffs_burst_length=" + * "tffs_burst_latency=" + * "tffs_burst_hold=" + * "tffs_burst_ws=" + */ + int tffs_burst_enabled = FALSE; + module_param(tffs_burst_enabled, int, S_IRUGO); + MODULE_PARM_DESC(tffs_burst_enabled, "enable (1) or disable (0) synchronous burst."); + + int tffs_burst_length = 5; + module_param(tffs_burst_length, int, S_IRUGO); + MODULE_PARM_DESC(tffs_burst_length, "burst length (2..5)."); + + int tffs_burst_latency = 0; + module_param(tffs_burst_latency, int, S_IRUGO); + MODULE_PARM_DESC(tffs_burst_latency, "burst latency (0..7)."); + + int tffs_burst_hold = 0; + module_param(tffs_burst_hold, int, S_IRUGO); + MODULE_PARM_DESC(tffs_burst_hold, "burst hold (0 or 1)."); + + int tffs_burst_ws = 0; + module_param(tffs_burst_ws, int, S_IRUGO); + MODULE_PARM_DESC(tffs_burst_ws, "burst wait states (0..3)."); + +#endif /* DOCH_USE_BURST_MODE_READ || DOCH_USE_BURST_MODE_WRITE */ + +/* Command line parameter "tffs_hardsect=", when specified as non-zero, + * forces DiskOnChip driver to use this hardsector size rather then obtain it + * from the DiskOnChip. The must be either zero (default - obtain + * hardsector from DiskOnChip), or power of 2 in the range [512..4096]. + */ +static int tffs_hardsect = 0; /* zero - obtain hardsector from DiskOnChip */ +module_param(tffs_hardsect, int, S_IRUGO); +MODULE_PARM_DESC(tffs_hardsect, "Size (in bytes) of hardware sector for all devices."); + +/* Command line parameter "tffs_unformat=" allows user to return + * DiskOnChip to it's original factory state. + * For example: + * + * insmod tffs.o tffs_unformat=0 + * + * will unformat DiskOnchip socket #0. + */ +static int tffs_unformat = 0xff; /* 0xff: don't unformat anything */ +module_param(tffs_unformat, int, S_IRUGO); +MODULE_PARM_DESC(tffs_unformat, "Unformat DiskOnChip socket."); + +/* Command line parameter "tffs_format=" allows user to perform + * low-level formatting of specified DiskOnChip socket when driver starts up. + * For example: + * + * insmod tffs.o tffs_format=0 + * + * will re-format DiskOnchip socket #0. + */ +static int tffs_format = 0xff; /* 0xff: don't format anything */ +module_param(tffs_format, int, S_IRUGO); +MODULE_PARM_DESC(tffs_format, "Format DiskOnChip socket."); + +/* Command line parameter "tffs_pio=", when specified as non-zero, + * forces DiskOnChip driver to use multi-sector polled I/O transfers with + * DiskOnChip H3 devices. The must be in range [0..256]; it specifies + * maximum number of sectors that can be written to or read from DiskOnChip + * H3 device in a single transfer. Default value is zero (use single-sector + * polled I/O mode). + */ +static unsigned int tffs_pio = 0; /* zero for single-sector polled I/O */ +module_param(tffs_pio, int, S_IRUGO); +MODULE_PARM_DESC(tffs_pio, "Multi-sector polled I/O mode."); + +#if defined(USE_FAT_FILTER) || defined(USE_EXT_FILTER) + /* Command line parameter "tffs_fs_filter=" allows user to enable/disable + * various file system filters at runtime. Allowed values for are zero + * (default - don't use filters), '1' (use EXT filter), and '2' (use FAT filter). + */ + static int tffs_fs_filter = 0; /* zero - don't use file system filters */ + module_param(tffs_fs_filter, int, S_IRUGO); + MODULE_PARM_DESC(tffs_fs_filter, "Enable FAT (tffs_fs_filter=1) or EXT (tffs_fs_filter=2) file system filters."); +#endif + + + + + + +unsigned char TffsIsWriteProtected (DeviceInfo *pDevice) +{ +#ifdef HW_PROTECTION + IOreq ioreq; + FLStatus stat; + + ioreq.irHandle = pDevice->bHandle; + + if ((stat = flIdentifyProtection(&ioreq)) == flOK) + { + if ((ioreq.irFlags & WRITE_PROTECTED) && !(ioreq.irFlags & KEY_INSERTED)) + return 1; + } + else + { + if ((stat != flFeatureNotSupported) && (stat != flNotProtected)) + { PrintkDebug ("flIdentifyProtection() error %d", stat); } + } +#endif /* HW_PROTECTION */ + + return 0; +} + + + + +/******************************************************************************* + * * + * T f f s I n i t * + * * + * Initialize TrueFFS, and find all disks on all DiskOnChip sockets. * + * * + * Parameters: none * + * * + * Returns: total number of disks found on all DiskOnChip sockets (zero if * + * none found), or -1 if error occurred. * + * * + *******************************************************************************/ + +int /* __init */ TffsInit (void) +{ + register int iSoc; + FLStatus stat; + +#if (ATA_MAX_NUM_OF_DEVICES != 1) + PrintkInfo ("configured for cascaded mDOC devices"); +#endif + + tffsInfo.wDevices = 0; + + memset (tffsInfo.ppDevices, 0, sizeof(tffsInfo.ppDevices)); + + /* initialize TrueFFS, and find all DiskOnChip sockets */ + if ((stat = flInit()) != flOK) + { + PrintkDebug ("flInit() error %d", stat); + return -1; + } + + /* if in verbose mode, print out DiskOnChip firmware info */ + if (fl_debug > FL_DEBUG_DEF) + print_firmware_string (); + + /* find all disks on all DiskOnChip sockets */ + for (iSoc = 0; iSoc < FL_SOCKETS; iSoc++) + init_socket (&tffsInfo.sockets[iSoc]); + + /* return total number of disks on all DiskOnChip sockets */ + return tffsInfo.wDevices; +} + + + + +/******************************************************************************* + * * + * T f f s C l e a n u p * + * * + * Uninitialize TrueFFS, and shut it down. * + * * + * Parameters: none * + * * + * Returns: always zero (success). * + * * + *******************************************************************************/ + +int TffsCleanup (void) +{ + register int iSoc; + + for (iSoc = 0; iSoc < FL_SOCKETS; iSoc++) + release_socket (&tffsInfo.sockets[iSoc]); + + memset (tffsInfo.ppDevices, 0, sizeof(tffsInfo.ppDevices)); + + tffsInfo.wDevices = 0; + +#ifdef FL_EXIT + flExit(); +#endif + + return 0; +} + + + + +static +int /* __init */ init_socket (SocketInfo *pSoc) +{ + IOreq ioreq; + FLStatus stat; + register int iDev; + SocketInfo*pS; + +#ifdef TFFS_USE_RAM + pSoc->fFound=1; +#endif + + /* if socket wasn't found, abort */ + if (pSoc->fFound == 0) + { pSoc->bHandle = 0xff; return 0; } + + for(pS=tffsInfo.sockets;pS!=pSoc;pS++) + { + if(pSoc->bHandle==pS->bHandle) + pSoc->bHandle++; + } + + PrintkInfo("Socket %u in addr 0x%lx",pSoc->bHandle,pSoc->dwPhysAddr); + + /* if requested, unformat socket */ + if (pSoc->bHandle == tffs_unformat) + { + PrintkInfo("unformat socket %d", tffs_unformat); + if( (stat = socket_unformat(pSoc)) != flOK ) + { + PrintkError ("unformat failed on socket %d, error %d", tffs_unformat, stat); + return 0; + } + PrintkInfo("unformatting successful"); + } + + /* if requested, format socket using standard formatting parameters */ + if (pSoc->bHandle == tffs_format) + { + PrintkInfo("format socket %d", tffs_format); + if( (stat = socket_std_format(pSoc)) != flOK ) + { + PrintkError ("format failed on socket %d, error %d", tffs_format, stat); + return 0; + } + PrintkInfo("formatting successful"); + } + + /* find out how many disks are on this DiskOnChip socket */ + ioreq.irHandle = pSoc->bHandle; + + stat = flCountVolumes(&ioreq); + if ((stat != flOK) || (ioreq.irFlags == 0)) + { + PrintkDebug("flCountVolumes error %d irFlags %lu", (int)stat, ioreq.irFlags); + +#ifdef TFFS_ALLOW_UNFORMATTED + pSoc->wDevices = 1; +#else + pSoc->wDevices = 0; +#endif + } + else + pSoc->wDevices = ioreq.irFlags; + + if (pSoc->wDevices == 0) + { + /* There are no any disk on this socket; probably this + * socket has never been formatted. + */ + return 0; + } + + if ((pSoc->pDevices = KMalloc(pSoc->wDevices * sizeof(DeviceInfo))) == NULL) + { + pSoc->wDevices = 0; + return 0; + } + + for (iDev = 0; iDev < pSoc->wDevices; iDev++) + init_disk (&pSoc->pDevices[iDev], pSoc); + + /* If configured, allocate scatter/gather buffer. Align size + * of scatter/gather buffer up to multiple of PAGE_SIZE. + */ + if (tffs_sg_bufsize > 0) + { + tffs_sg_bufsize = (((tffs_sg_bufsize - 1) / PAGE_SIZE) + 1) * PAGE_SIZE; + + if ((pSoc->pCache = KMalloc(tffs_sg_bufsize)) == NULL) + { + PrintkError ("can't allocate scatter/gather buffer"); + tffs_sg_bufsize = 0; + } + } + +#if 0 /* enable h/w DMA in DiskOnChip */ + ioreq.irHandle = pSoc->bHandle; + ioreq.irFlags = FL_DMA_TYPE; + ioreq.irLength = FL_DMA_HW_ENABLED; + + flHwConfig (&ioreq); +#endif + + /* set single- or multi-sector polled I/O mode */ + TffsSetPIO (pSoc); + +#if 0 /* andrayk June 23 2006: added for H3 burst */ + set_burst (pSoc); +#endif + + return (pSoc->wDevices != 0); +} + + + +/* defice still dismounted after init */ +static +int /* __init */ init_disk (DeviceInfo * pDisk, SocketInfo * pSocket) +{ + unsigned char bDevice; + + pDisk->bHandle=pSocket->bHandle+((pDisk-pSocket->pDevices)<<4); + pDisk->pSocket=(SocketInfo*)pSocket; + pDisk->wTffsHWSectorSizeShift=0; + while( (1<wTffsHWSectorSizeShift) != 8 ) + pDisk->wTffsHWSectorSizeShift++; + if(tffs_hardsect > 0) + pDisk->wHWSectorSize=tffs_hardsect; + else + pDisk->wHWSectorSize=512<<(TFFS_MAXHW_SECTOR_SIZE_BITSwTffsHWSectorSizeShift?TFFS_MAXHW_SECTOR_SIZE_BITS:pDisk->wTffsHWSectorSizeShift); + if(pDisk->wHWSectorSize>4096) + pDisk->wHWSectorSize=4096; + + pDisk->dwSize=0; + pDisk->fAbsMounted=0; + + if(TffsOpenDevice(pDisk)) + { + IOreq ioreq; + FLStatus stat; + + ioreq.irHandle=pDisk->bHandle; + + if ((stat = flSectorsInVolume(&ioreq)) == flOK) + pDisk->dwSize=ioreq.irLength; + else + PrintkDebug("flSectorsInVolume error %d",stat); + } + else + PrintkDebug("TffsOpenDevice error"); + +#ifndef TFFS_ALLOW_UNFORMATTED + if(pDisk->dwSize > 0) + { +#endif + for(bDevice=0; (tffsInfo.ppDevices[bDevice] != NULL) && (bDevice < FL_VOLUMES); bDevice++) + ; + if (bDevice >= FL_VOLUMES) + return 0; + tffsInfo.ppDevices[bDevice]=pDisk; + tffsInfo.wDevices++; + pDisk->diskNo=bDevice; +#ifndef TFFS_ALLOW_UNFORMATTED + } + else + return 0; +#endif + +#ifdef USE_EXT_FILTER + /* if we are going to use EXT filter, install it */ + if ((tffs_fs_filter == 1) && (pDisk->dwSize != 0)) + { + ExtFilterInit (pDisk); + } +#endif + + set_disk_geometry (pDisk); + + PrintkInfo ("Device 0x%x: %ld 512-byte sectors, h/w sector %d bytes", + pDisk->diskNo, pDisk->dwSize, pDisk->wHWSectorSize); + PrintkInfo ("C/H/S %u %u %u", pDisk->wCyl, pDisk->bHead, pDisk->bSect); + + return 1; +} + + + + +static +int release_socket (SocketInfo * pSoc) +{ + register int iDev; + + for (iDev = 0; iDev < pSoc->wDevices; iDev++) + release_disk (&pSoc->pDevices[iDev]); + + if (pSoc->pDevices != NULL) + { + kfree (pSoc->pDevices); + pSoc->pDevices = NULL; + } + + pSoc->wDevices = 0; + + /* free scatter/gather cache if was allocated */ + if (pSoc->pCache != NULL) + kfree (pSoc->pCache); + + return 0; +} + + + + +static +int release_disk (DeviceInfo *pDevice) +{ +#ifndef TFFS_ALLOW_UNFORMATTED + if(pDevice->dwSize==0) + return 0; +#endif + +#ifdef USE_EXT_FILTER + /* if we were using EXT filter, uninstall it */ + if ((tffs_fs_filter == 1) && (pDevice->dwSize != 0)) + { + ExtFilterRelease(pDevice); + } +#endif + if(!TffsCloseDevice(pDevice)) + PrintkDebug("TffsCloseDevice() error"); + + pDevice->dwSize=0; + tffsInfo.wDevices--; + return 1; +} + + + + +unsigned char TffsOpenDevice (DeviceInfo * pDisk) +{ + IOreq ioreq; + FLStatus status = flDriveNotAvailable; + + if (pDisk->fAbsMounted == 0) + { + ioreq.irHandle = pDisk->bHandle; + + if ((status = flAbsMountVolume(&ioreq)) == flOK) + pDisk->fAbsMounted = 1; + else + PrintkError("flAbsMountVolume() error %d", status); + } + +#ifdef TFFS_ALLOW_UNFORMATTED + if (pDisk->dwSize == 0) + return 1; +#endif + + return pDisk->fAbsMounted; +} + + + + +unsigned char TffsCloseDevice (DeviceInfo * pDevice) +{ + IOreq ioreq; + FLStatus stat = flDriveNotAvailable; + + if (pDevice->fAbsMounted != 0) + { + ioreq.irHandle = pDevice->bHandle; + + stat = flDismountVolume (&ioreq); + + pDevice->fAbsMounted = 0; + + if (stat != flOK) + { + PrintkDebug("flDismountVolume() error %d", stat); + return 0; + } + } + + return 1; +} + + + +#ifdef TFFS_STATISTIC + +static +void CountAl(DeviceInfo*pDevice,int block,int count,int dir) +{ + int sector=block,sectors=count,noInShared; + + while(sectors) + { + noInShared=(((sector>>pDevice->wTffsHWSectorSizeShift)+1)<wTffsHWSectorSizeShift)-sector; + if(noInShared>sectors) + noInShared=sectors; + if(noInShared==(1<wTffsHWSectorSizeShift)) + { + if(dir==READ) + { + pDevice->stat.dwAlReadShared++; + pDevice->stat.dwAlReadSec+=noInShared; + } + else + { + pDevice->stat.dwAlWriteShared++; + pDevice->stat.dwAlWriteSec+=noInShared; + } + } + else + { + if(dir==READ) + { + pDevice->stat.dwUnalReadShared++; + pDevice->stat.dwUnalReadSec+=noInShared; + } + else + { + pDevice->stat.dwUnalWriteShared++; + pDevice->stat.dwUnalWriteSec+=noInShared; + } + } + sectors-=noInShared; + sector+=noInShared; + } +} + +#endif /* TFFS_STATISTIC */ + + +#ifdef TFFS_COUNT_REQ_SECTORS +extern unsigned long dwRead,dwWritten; +#endif + + + +unsigned char TffsRead(DeviceInfo*pDevice,void*data,int block,int count) +{ + IOreq ioreq; + FLStatus stat = flDriveNotAvailable; + +#ifdef TFFS_COUNT_REQ_SECTORS + dwRead+=count; +#endif + +#ifdef TFFS_STATISTIC + pDevice->stat.dwAbsRead++; + pDevice->stat.dwAbsReadSec+=count; + CountAl(pDevice,block,count,READ); +#endif + + ioreq.irHandle=pDevice->bHandle; + ioreq.irData=data; + ioreq.irLength=block; + ioreq.irCount=count; + + if ((stat = flAbsRead(&ioreq)) == flOK) + return 1; + + PrintkDebug("flAbsRead() error %d",stat); + return 0; +} + +/* Perform read or write of appropriate number of sectors from a DOC volume */ +unsigned char TffsWrite(DeviceInfo*pDevice,void*data,int block,int count) +{ +#ifndef TFFS_RO + IOreq ioreq; + FLStatus stat = flDriveNotAvailable; + +# ifdef TFFS_COUNT_REQ_SECTORS + dwWritten+=count; +# endif + +# ifdef TFFS_STATISTIC + pDevice->stat.dwAbsWrite++; + pDevice->stat.dwAbsWriteSec+=count; + CountAl(pDevice,block,count,WRITE); +# endif + ioreq.irHandle=pDevice->bHandle; + ioreq.irData=data; + ioreq.irLength=block; + ioreq.irCount=count; + +# ifdef USE_EXT_FILTER + if (tffs_fs_filter == 1) /* use EXT filter */ + ExtFilter (pDevice,data,block,count); +# endif + +# ifdef USE_FAT_FILTER + if (tffs_fs_filter == 2) /* use FAT filter */ + ffCheckBeforeWrite (&ioreq); +# endif + if ((stat = flAbsWrite(&ioreq)) == flOK) + return 1; + PrintkError ("flAbsWrite error %d",stat); + +#endif /* TFFS_RO */ + + return 0; +} + + + +/************************************************************************ + * * + * s o c k e t _ s t d _ f o r m a t * + * * + * Formats DiskOnChip socket with standard format parameters. * + * WARNING: all existing data on DiskOnChip is destroyed ! * + * * + * Parameters: * + * psoc : socket to format * + * * + * Returns: * + * flOK on success, otherwise respective error code * + * * + ************************************************************************/ +static +FLStatus socket_std_format (SocketInfo * psoc) +{ + IOreq ioreq; + FLStatus stat = flDriveNotAvailable; + + /* format socket using standard formatting parameters */ + +static FormatParams3 std_fp3 = STD_FORMAT_PARAMS3; +static BDTLPartitionFormatParams3 std_bdtl_fp3 = STD_BDTL_PARAMS3; + + std_fp3.BDTLPartitionInfo = &std_bdtl_fp3; + + ioreq.irHandle = psoc->bHandle; + ioreq.irFlags = TL_NORMAL_FORMAT; + ioreq.irData = &std_fp3; + + if ((stat = flFlashFormat(&ioreq)) != flOK) + PrintkError("flFlashFormat error %d", stat); + + return stat; +} + + + +/************************************************************************ + * * + * s o c k e t _ u n _ f o r m a t * + * * + * Unformats DiskOnChip socket returning it to it's original factory * + * state. * + * WARNING: all existing data on DiskOnChip is destroyed ! * + * * + * Parameters: * + * psoc : socket to unformat * + * * + * Returns: * + * flOK on success, otherwise respective error code * + * * + ************************************************************************/ +static +FLStatus socket_unformat (SocketInfo * psoc) +{ + IOreq ioreq; + FLStatus stat; + + memset (&ioreq, 0, sizeof(ioreq)); + ioreq.irHandle = psoc->bHandle; + + if ((stat = flUnformat(&ioreq)) != flOK) + PrintkError("flUnformat error %d", stat); + + return stat; +} + + + +/************************************************************************ + * * + * p r i n t _ f i r m w a r e _ s t r i n g * + * * + * Print out various firmware informatio. * + * * + * Returns: * + * flOK on success, otherwise respective error code * + * * + ************************************************************************/ +static +FLStatus print_firmware_string (void) +{ + IOreq ioreq; + DOCH_Registers in_regs; + FLByte buf [512]; + FLStatus stat; + + memset (&in_regs, 0 , sizeof(in_regs)); + memset (&buf, 0 , sizeof(buf)); + + ioreq.irPath = &in_regs; + ioreq.irCount = DOCH_PASSTHRU_DATA_IN; + ioreq.irLength = 1; + ioreq.irData = buf; + + in_regs.bCommandStatus = DOCH_VSCMD_EXT_DEVICE_CTRL; + in_regs.bFeaturesError = DOCH_GET_EXTENDED_DEVICE_INFO; + + if( (stat = flDochPassThrough(&ioreq)) == flOK ) + PrintkInfo("%s", buf); + else + PrintkError("Can't get mDOC firmware info"); + + return stat; +} + + + +/************************************************************************ + * * + * a t a _ p a s s t h r o u g h * + * * + * This routine implements ATA pass-through command for DiskOnChip H3 * + * devices. * + * * + * Parameters: * + * pdev : device * + * ioctl_rec_ptr : kernel copy of user's flIOctlRecord * + * lnx_inrec_ptr : kernel copy of user's flInputLnxRecord * + * * + * Returns: * + * zero on success, otherwise -EFAULT or -ENOMEM * + * * + ************************************************************************/ +static +int ata_passthrough ( DeviceInfo * pdev, + flIOctlRecord * ioctl_rec_ptr, + flInputLnxRecord * lnx_inrec_ptr ) +{ + flOutputLnxRecord lnx_outrec; + flAtaPassthrough ata; + char * buf = NULL; + int rc = -EFAULT; + + /* copy struct flAtaPassthrough from user space */ + if( access_ok(VERIFY_WRITE, (void *)(lnx_inrec_ptr->data), sizeof(ata)) == 0 ) + return -EFAULT; + + if( copy_from_user(&ata, (void *)(lnx_inrec_ptr->data), sizeof(ata)) != 0 ) + return -EFAULT; + + if ((ata.passThruOP == DOCH_PASSTHRU_DATA_OUT) || (ata.passThruOP == DOCH_PASSTHRU_DATA_IN)) + { + /* currently we don't allow more then 256 sectors in single transfer */ + if (ata.userBuffSize > (256 * FL_SECTOR_SIZE)) + return -ENOMEM; + + /* check if we can access user buffer */ + if (ata.passThruOP == DOCH_PASSTHRU_DATA_OUT) + { + if( access_ok(VERIFY_READ, ata.userBuff, ata.userBuffSize) == 0 ) + return -EFAULT; + } + else if (ata.passThruOP == DOCH_PASSTHRU_DATA_IN) + { + if( access_ok(VERIFY_WRITE, ata.userBuff, ata.userBuffSize) == 0 ) + return -EFAULT; + } + + /* allocate kernel buffer to hold user data */ + if ((buf = vmalloc(ata.userBuffSize)) == NULL) + return -ENOMEM; + } + + /* For output (host -> DiskOnChip) operations, copy data from + * user buffer 'ata.userBuff' to to kernel buffer 'buf' + */ + if (ata.passThruOP == DOCH_PASSTHRU_DATA_OUT) + { + if( copy_from_user(buf, ata.userBuff, ata.userBuffSize) != 0 ) + goto quit; + +#if 0 /* andrayk May 12 2006: firmware checksum calculation to assist debugging */ + { register unsigned long s; + register int n = (ata.userBuffSize / sizeof(long)) - 1; + unsigned long * p = (unsigned long *)buf; + + for (s = 0; n >= 0; n--) + s ^= p[n]; + + PrintkDebug ("Firmware file checksum is 0x%lx", s); + } +#endif + } + + /* Execute pass-through ATA command, and put it's status into + * both 'flOutputLnxRecord.status' and 'flAtaPassthrough.status'. + */ + ata.status = lnx_outrec.status = + + DOCHAtaPassThrough (pdev->bHandle, /* not 'ata.socketNum', for security reasons */ + ata.passThruOP, + (DOCH_Registers *) &ata.in_regs, + (DOCH_Registers *) &ata.out_regs, + ata.secNum, + buf, + FALSE); /* don't use DiskOnChip interrupt */ + + /* For input (DiskOnChip -> host) operations, copy data from + * kernel buffer 'buf' to user buffer 'ata.userBuff'. + */ + if (ata.passThruOP == DOCH_PASSTHRU_DATA_IN) + { + if( copy_to_user(ata.userBuff, buf, ata.userBuffSize) != 0 ) + goto quit; + } + + /* copy updated struct flAtaPassthrough back to user space */ + if( copy_to_user((void *)(lnx_inrec_ptr->data), &ata, sizeof(ata)) != 0 ) + goto quit; + + /* copy updated struct flOutputLnxRecord back to user space */ + if( copy_to_user(ioctl_rec_ptr->outputRecord, &lnx_outrec, sizeof(lnx_outrec)) != 0 ) + goto quit; + + rc = 0; /* success */ + + quit: + + if (buf != NULL) + { + memset (buf, 0, ata.userBuffSize); + vfree (buf); + } + + return rc; +} + + + + +#define USR2KRN_O_START(typeOut) \ + { \ + typeOut output; \ + void *tmp; \ + if(!access_ok(VERIFY_WRITE,ioctlRecord.outputRecord,sizeof(typeOut))) \ + return -EFAULT; \ + tmp = ioctlRecord.outputRecord; \ + ioctlRecord.outputRecord = &output; + +#define USR2KRN_IO_START(typeIn,typeOut) \ + { \ + typeIn input; \ + typeOut output; \ + void *tmp; \ + if (!access_ok(VERIFY_READ,ioctlRecord.inputRecord,sizeof(typeIn))) \ + return -EFAULT; \ + if (copy_from_user(&input,ioctlRecord.inputRecord,sizeof(typeIn))) \ + return -EFAULT; \ + ioctlRecord.inputRecord = &input; \ + if (!access_ok(VERIFY_WRITE,ioctlRecord.outputRecord,sizeof(typeOut))) \ + return -EFAULT; \ + tmp = ioctlRecord.outputRecord; \ + ioctlRecord.outputRecord = &output; + +#define USR2KRN_END \ + if (copy_to_user(tmp, &output, sizeof(output))) \ + return -EFAULT; \ + return 0; \ + } + +#define USR2KRN01(theHandle,typeOut,pSoc) \ + USR2KRN_O_START(typeOut) \ + ioreq.irHandle = theHandle; \ + flIOctl(&ioreq); \ + USR2KRN_END + +#define USR2KRN11(theHandle,typeIn,typeOut,pSoc) \ + USR2KRN_IO_START(typeIn,typeOut) \ + ioreq.irHandle = theHandle; \ + flIOctl(&ioreq); \ + USR2KRN_END + + +/* returns: 0 - OK, 1 - no TFFS ioctl, <0 - error */ +int TffsIoctl(DeviceInfo*pDevice,int cmd,unsigned long arg) +{ +#ifdef FL_IOCTL_INTERFACE + unsigned char bdtlVolume=pDevice->bHandle; + IOreq ioreq; + flIOctlRecord ioctlRecord; + + static unsigned int handle_for_ioctls = 0xffff; + + if ((cmd < FL_IOCTL_LNX) || (cmd > FL_IOCTL_IPL_HW_PROTECTION)) + { PrintkError ("unknown IOCTL code %d passed to TrueFFS", cmd); return 1; } + + + /* map flIOctlRecord */ + if(!access_ok(VERIFY_WRITE|VERIFY_READ,(void*)arg,sizeof(flIOctlRecord))) + return -EFAULT; + if(copy_from_user(&ioctlRecord,(void*)arg,sizeof(flIOctlRecord))) + return -EFAULT; + ioreq.irData=&ioctlRecord; + ioreq.irFlags=cmd; + + switch(cmd) + { + + + case FL_IOCTL_GET_INFO: + { + struct hd_geometry geometry; + USR2KRN_O_START(flDiskInfoOutput); + + ioreq.irHandle = bdtlVolume; + flIOctl(&ioreq); + + geometry.heads = pDevice->bHead; + geometry.sectors = pDevice->bSect; + geometry.cylinders = pDevice->wCyl; + + ((flDiskInfoOutput*)(ioctlRecord.outputRecord))->info.cylinders=geometry.cylinders; + ((flDiskInfoOutput*)(ioctlRecord.outputRecord))->info.heads=geometry.heads; + ((flDiskInfoOutput*)(ioctlRecord.outputRecord))->info.sectors=geometry.sectors; + USR2KRN_END; + } + + + case FL_IOCTL_DEFRAGMENT: + USR2KRN11(bdtlVolume,flDefragInput,flDefragOutput,pSoc); + + + case FL_IOCTL_MOUNT_VOLUME: + USR2KRN11(bdtlVolume,flMountInput,flOutputStatusRecord,pSoc); + + +#ifdef BDK_ACCESS + case FL_IOCTL_BDK_OPERATION: + { + void*tmp1=NULL,*tmpIn=NULL; + flBDKOperationInput input; + flOutputStatusRecord output; + void*tmp; + + if(!access_ok(VERIFY_READ|VERIFY_WRITE,ioctlRecord.inputRecord,sizeof(flBDKOperationInput))) + { + PrintkDebug("FL_IOCTL_BDK_OPERATION:access_ok(inputRecord)"); + return -EFAULT; + } + if(copy_from_user(&input,ioctlRecord.inputRecord,sizeof(flBDKOperationInput))) + { + PrintkDebug("FL_IOCTL_BDK_OPERATION:copy_from_user(inputRecord)"); + return -EFAULT; + } + if(!access_ok(VERIFY_WRITE,ioctlRecord.outputRecord,sizeof(flOutputStatusRecord))) + { + PrintkDebug("FL_IOCTL_BDK_OPERATION:access_ok(outputRecord)"); + return -EFAULT; + } + tmp=ioctlRecord.outputRecord; + tmpIn=ioctlRecord.inputRecord; + ioctlRecord.inputRecord=&input; + ioctlRecord.outputRecord=&output; + + if(input.bdkStruct.bdkBuffer!=NULL) + { + tmp1=input.bdkStruct.bdkBuffer; + input.bdkStruct.bdkBuffer=VMalloc(input.bdkStruct.length); + if(input.bdkStruct.bdkBuffer==NULL) + { + PrintkDebug("FL_IOCTL_BDK_OPERATION:vmalloc"); + return -ENOMEM; + } + if(!access_ok(VERIFY_WRITE|VERIFY_READ,tmp1,input.bdkStruct.length)) + { + vfree(input.bdkStruct.bdkBuffer); + PrintkDebug("FL_IOCTL_BDK_OPERATION:access_ok"); + return -EFAULT; + } + if(copy_from_user(input.bdkStruct.bdkBuffer,tmp1,input.bdkStruct.length)) + { + vfree(input.bdkStruct.bdkBuffer); + PrintkDebug("FL_IOCTL_BDK_OPERATION:copy_from_user"); + return -EFAULT; + } + } + + ioreq.irHandle = handle_for_ioctls; + flIOctl(&ioreq); + + if(input.bdkStruct.bdkBuffer!=NULL) + { + if(copy_to_user(tmp1,input.bdkStruct.bdkBuffer,input.bdkStruct.length)) + { + PrintkDebug("FL_IOCTL_BDK_OPERATION:copy_to_user(bdkBuffer)"); + vfree(input.bdkStruct.bdkBuffer); + return -EFAULT; + } + vfree(input.bdkStruct.bdkBuffer); + } + + /* copy flBDKOperationInput */ + input.bdkStruct.bdkBuffer=tmp1; + if(copy_to_user(tmpIn,&input,sizeof(flBDKOperationInput))) + { + if(input.bdkStruct.bdkBuffer!=NULL) + vfree(input.bdkStruct.bdkBuffer); + PrintkDebug("FL_IOCTL_BDK_OPERATION:copy_to_user(inputRecord)"); + return -EFAULT; + } + + if(copy_to_user(tmp,&output,sizeof(output))) + return -EFAULT; + return 0; + } +#endif /* BDK_ACCESS */ + + + case FL_IOCTL_DELETE_SECTORS: + case FL_IOCTL_READ_SECTORS: + case FL_IOCTL_WRITE_SECTORS: + return -EINVAL; + + + case FL_IOCTL_BDTL_HW_PROTECTION: + case FL_IOCTL_IPL_HW_PROTECTION: +#ifdef BDK_ACCESS + case FL_IOCTL_BINARY_HW_PROTECTION: +#endif + +#ifdef HW_PROTECTION + { flProtectionInput my_prot_in, *usr_prot_in = (flProtectionInput *)ioctlRecord.inputRecord; + flProtectionOutput my_prot_out, *usr_prot_out = (flProtectionOutput *)ioctlRecord.outputRecord; + + if( !access_ok((VERIFY_WRITE | VERIFY_READ), usr_prot_in, sizeof(flProtectionInput)) ) + return -EFAULT; + if( !access_ok(VERIFY_WRITE, usr_prot_out, sizeof(flProtectionOutput))) + return -EFAULT; + + if( copy_from_user(&my_prot_in, usr_prot_in, sizeof(flProtectionInput)) ) + return -EFAULT; + + ioctlRecord.inputRecord = &my_prot_in; + ioctlRecord.outputRecord = &my_prot_out; + +# ifdef BDK_ACCESS + if (cmd == FL_IOCTL_BINARY_HW_PROTECTION) + ioreq.irHandle = handle_for_ioctls; + else +# endif + ioreq.irHandle = ((handle_for_ioctls != 0xffff) ? handle_for_ioctls : bdtlVolume); + + flIOctl (&ioreq); + + if( copy_to_user(usr_prot_in, &my_prot_in, sizeof(flProtectionInput)) ) + return -EFAULT; + if( copy_to_user(usr_prot_out, &my_prot_out,sizeof(flProtectionOutput)) ) + return -EFAULT; + + return 0; + } + +#else /* !HW_PROTECTION */ + return -EINVAL; +#endif + + + case FL_IOCTL_OTP: +#ifdef HW_OTP + { + void*tmp1; + USR2KRN_IO_START(flOtpInput,flOutputStatusRecord); + tmp1=input.buffer; + input.buffer=KMalloc(input.length); + if(input.buffer==NULL) + return -ENOMEM; + if(!access_ok(VERIFY_WRITE|VERIFY_READ,tmp1,input.length)) + { + kfree(input.buffer); + return -EFAULT; + } + if(copy_from_user(input.buffer,tmp1,input.length)) + { + kfree(input.buffer); + return -EFAULT; + } + + ioreq.irHandle = (bdtlVolume & 0x0f); + flIOctl(&ioreq); + + if(copy_to_user(tmp1,input.buffer,input.length)) + { + kfree(input.buffer); + return -EFAULT; + } + kfree(input.buffer); + USR2KRN_END; + } +#else /* HW_OTP */ + return -EINVAL; +#endif /* HW_OTP */ + + + case FL_IOCTL_CUSTOMER_ID: +#ifdef HW_OTP + USR2KRN01(bdtlVolume&0x0f,flCustomerIdOutput,pSoc); +#else /* HW_OTP */ + return -EINVAL; +#endif + + + case FL_IOCTL_UNIQUE_ID: +#ifdef HW_OTP + USR2KRN01(bdtlVolume&0x0f,flUniqueIdOutput,pSoc); +#else /* HW_OTP */ + return -EINVAL; +#endif + + + case FL_IOCTL_NUMBER_OF_PARTITIONS: + USR2KRN01(bdtlVolume&0x0f,flCountPartitionsOutput,pSoc); + + + case FL_IOCTL_WRITE_IPL: +#ifndef NO_IPL_CODE + { + flIPLInput iplInput; + flOutputStatusRecord outputStatusRecord; + void*outputStatusRecordSave,*bBufPtrSave; + if(!access_ok(VERIFY_READ,ioctlRecord.inputRecord,sizeof(flIPLInput))) + return -EFAULT; + if(copy_from_user(&iplInput,ioctlRecord.inputRecord,sizeof(flIPLInput))) + return -EFAULT; + if(!access_ok(VERIFY_WRITE,ioctlRecord.outputRecord,sizeof(flOutputStatusRecord))) + return -EFAULT; + outputStatusRecordSave=ioctlRecord.outputRecord; + ioctlRecord.inputRecord=&iplInput; + ioctlRecord.outputRecord=&outputStatusRecord; + + bBufPtrSave=iplInput.bBufPtr; + iplInput.bBufPtr=KMalloc(iplInput.sdwLength); + if(iplInput.bBufPtr==NULL) + return -ENOMEM; + if(!access_ok(VERIFY_READ,bBufPtrSave,iplInput.sdwLength)) + { + kfree(iplInput.bBufPtr); + return -EFAULT; + } + if(copy_from_user(iplInput.bBufPtr,bBufPtrSave,iplInput.sdwLength)) + { + kfree(iplInput.bBufPtr); + return -EFAULT; + } + ioreq.irHandle=bdtlVolume&0x0f; + flIOctl (&ioreq); + + kfree(iplInput.bBufPtr); + if(copy_to_user(outputStatusRecordSave,&outputStatusRecord,sizeof(flOutputStatusRecord))) + return -EFAULT; + return 0; + } +#else /* NO_IPL_CODE */ + return -EINVAL; +#endif /* NO_IPL_CODE */ + + + case FL_IOCTL_DEEP_POWER_DOWN_MODE: + USR2KRN11(bdtlVolume&0x0f,flPowerDownInput,flOutputStatusRecord,pSoc); + + + case FL_IOCTL_EXTENDED_ENVIRONMENT_VARIABLES: +#ifdef FL_ENVIRONMENT_VARS + USR2KRN11(bdtlVolume,flExtendedEnvVarsInput,flExtendedEnvVarsOutput,pSoc); +#else + return -EINVAL; +#endif /* FL_ENVIRONMENT_VARS */ + + + case FL_IOCTL_VERIFY_VOLUME: +#ifdef VERIFY_VOLUME + USR2KRN11(bdtlVolume,flVerifyVolumeInput,flVerifyVolumeOutput,pSoc); +#endif + + + case FL_IOCTL_SET_ACCESS_ROUTINE: + return -EINVAL; + + + case FL_IOCTL_GET_ACCESS_ROUTINE: + return -EINVAL; + + + case FL_IOCTL_IS_QUICK_MOUNT_VALID: +# ifndef FL_NO_QUICK_MOUNT_FEATURE + USR2KRN01(bdtlVolume,flGetQuickMountOutput,pSoc); +# else + return -EINVAL; +# endif /* FL_NO_QUICK_MOUNT_FEATURE */ + + + case FL_IOCTL_WRITE_QUICK_MOUNT_INFO: +# ifndef FL_NO_QUICK_MOUNT_FEATURE + USR2KRN01(bdtlVolume,flOutputStatusRecord,pSoc); +# else + return -EINVAL; +# endif /* FL_NO_QUICK_MOUNT_FEATURE */ + + + case FL_IOCTL_CLEAR_QUICK_MOUNT_INFO: +# ifndef FL_NO_QUICK_MOUNT_FEATURE + USR2KRN01(bdtlVolume,flOutputStatusRecord,pSoc); +# else + return -EINVAL; +# endif /* FL_NO_QUICK_MOUNT_FEATURE */ + + + case FL_IOCTL_FLASH_FORMAT: + +# ifndef FL_FORMAT_VOLUME + return -EINVAL; +# else + { FormatParams3 formatParams3; + BDTLPartitionFormatParams3 bdtl_fp [FL_VOLUMES]; +# ifdef BDK_ACCESS + BinaryPartitionFormatParams3 bin_fp [FL_BINARY_PARTITIONS]; +# endif + flFlashFormatInput flashFormatInput; + flOutputStatusRecord outputStatusRecord; + void * user_outputStatusRecord; + int bdtls; /* BDTL partitions to create */ + int bins; /* binary partitions to create */ + + PrintkDebug("TffsIoctl:FL_IOCTL_FLASH_FORMAT"); + + if( !access_ok(VERIFY_WRITE, ioctlRecord.outputRecord, sizeof(flOutputStatusRecord)) ) + return -EFAULT; + + user_outputStatusRecord = ioctlRecord.outputRecord; + ioctlRecord.outputRecord = &outputStatusRecord; + + if( !access_ok(VERIFY_READ, ioctlRecord.inputRecord, sizeof(flFlashFormatInput)) ) + return -EFAULT; + + if( copy_from_user(&flashFormatInput, ioctlRecord.inputRecord, sizeof(flFlashFormatInput)) ) + return -EFAULT; + + ioctlRecord.inputRecord = &flashFormatInput; + + if( !access_ok(VERIFY_READ, flashFormatInput.fpPtr, sizeof(FormatParams3)) ) + return -EFAULT; + + if( copy_from_user(&formatParams3, flashFormatInput.fpPtr, sizeof(FormatParams3)) ) + return -EFAULT; + + /* BDTL partitions layout */ + bdtls = flashFormatInput.fpPtr->noOfBDTLPartitions; + if (bdtls > FL_VOLUMES) + return -EINVAL; + + if( !access_ok(VERIFY_READ, flashFormatInput.fpPtr->BDTLPartitionInfo, + (sizeof(BDTLPartitionFormatParams3) * bdtls)) ) + return -EFAULT; + + if( copy_from_user(bdtl_fp, flashFormatInput.fpPtr->BDTLPartitionInfo, + (sizeof(BDTLPartitionFormatParams3) * bdtls)) ) + return -EFAULT; + + flashFormatInput.fpPtr->BDTLPartitionInfo = bdtl_fp; + + /* binary partitions layout */ + bins = flashFormatInput.fpPtr->noOfBinaryPartitions; + if (bins > 0) + { +# ifdef BDK_ACCESS + if( !access_ok(VERIFY_READ, flashFormatInput.fpPtr->binaryPartitionInfo, + (sizeof(BinaryPartitionFormatParams3) * bins)) ) + return -EFAULT; + + if( copy_from_user(bin_fp, flashFormatInput.fpPtr->binaryPartitionInfo, + (sizeof(BinaryPartitionFormatParams3) * bins)) ) + return -EFAULT; + + flashFormatInput.fpPtr->binaryPartitionInfo = bin_fp; +# else + return -EINVAL; +# endif + } + + /* set to NULL not mapped pointers */ + flashFormatInput.fpPtr->progressCallback = NULL; + flashFormatInput.fpPtr->embeddedCIS = NULL; + flashFormatInput.fpPtr->embeddedCISlength = 0; + + ioreq.irHandle = (bdtlVolume & 0x0f); + flIOctl (&ioreq); + + if( copy_to_user(user_outputStatusRecord, &outputStatusRecord, sizeof(outputStatusRecord))) + return -EFAULT; + + return 0; + } +# endif /* FL_FORMAT_VOLUME */ + + + case FL_IOCTL_ERASE_BD: +# ifdef FL_FORMAT_VOLUME + PrintkDebug("TffsIoctl:FL_IOCTL_ERASE_BD"); + USR2KRN11(bdtlVolume,flEraseBDInput,flOutputStatusRecord,pSoc); +# else /* FL_FORMAT_VOLUME */ + return -EINVAL; +# endif /* FL_FORMAT_VOLUME */ + + + case FL_IOCTL_FLASH_UNFORMAT: +# ifdef FL_FORMAT_VOLUME + USR2KRN11(bdtlVolume,flFlashUnformatInput,flOutputStatusRecord,pSoc); +# else /* FL_FORMAT_VOLUME */ + return -EINVAL; +# endif /* FL_FORMAT_VOLUME */ + + +#if defined(TFFS_USE_G4) && defined(HW_OTP) + case FL_IOCTL_MCOTP: + { + flMCOtpInput mcotpInput; + flOutputStatusRecord outputStatusRecord; + void*outputStatusRecordSave,*bufferSave=NULL,*mcotpInputSave; + + if(!access_ok(VERIFY_READ|VERIFY_WRITE,ioctlRecord.inputRecord,sizeof(flMCOtpInput))) + return -EFAULT; + if(copy_from_user(&mcotpInput,ioctlRecord.inputRecord,sizeof(flMCOtpInput))) + return -EFAULT; + if(!access_ok(VERIFY_WRITE,ioctlRecord.outputRecord,sizeof(flOutputStatusRecord))) + return -EFAULT; + outputStatusRecordSave=ioctlRecord.outputRecord; + mcotpInputSave=ioctlRecord.inputRecord; + ioctlRecord.inputRecord=&mcotpInput; + ioctlRecord.outputRecord=&outputStatusRecord; + + if(mcotpInput.length!=0) + { + bufferSave=mcotpInput.buffer; + mcotpInput.buffer=VMalloc(mcotpInput.length); + if(mcotpInput.buffer==NULL) + return -ENOMEM; + if(!access_ok(VERIFY_READ|VERIFY_WRITE,mcotpInput.buffer,mcotpInput.length)) + return -EFAULT; + if(copy_from_user(mcotpInput.buffer,bufferSave,sizeof(mcotpInput.length))) + return -EFAULT; + } + + ioreq.irHandle = bdtlVolume&0x0f; + flIOctl (&ioreq); + + if(mcotpInput.length!=0) + { + if(copy_to_user(bufferSave,mcotpInput.buffer,sizeof(mcotpInput.length))) + return -EFAULT; + vfree(mcotpInput.buffer); + mcotpInput.buffer=bufferSave; + } + if(copy_to_user(mcotpInputSave,&mcotpInput,sizeof(flMCOtpInput))) + return -EFAULT; + if(copy_to_user(outputStatusRecordSave,&outputStatusRecord,sizeof(flMCOtpInput))) + return -EFAULT; + + } +#endif /* defined(TFFS_USE_G4) && defined(HW_OTP) */ + + + case FL_IOCTL_LNX: + { + flInputLnxRecord inRec; + flOutputLnxRecord outRec; + + if(!access_ok(VERIFY_READ,ioctlRecord.inputRecord,sizeof(flInputLnxRecord))) + return -EFAULT; + if(copy_from_user(&inRec,ioctlRecord.inputRecord,sizeof(flInputLnxRecord))) + return -EFAULT; + if(!access_ok(VERIFY_WRITE,ioctlRecord.outputRecord,sizeof(flOutputLnxRecord))) + return -EFAULT; + + switch(inRec.command) + { + case 0: /* set TrueFFS handle for future IOCTLs */ + { + handle_for_ioctls = inRec.data; + + outRec.status = flOK; + if(copy_to_user(ioctlRecord.outputRecord, &outRec, sizeof(flOutputLnxRecord))) + return -EFAULT; + return 0; + } +#if defined(TFFS_DEBUG_DRIVER) && !defined(TFFS_RO) + case 3: /* print no of used sectors on device */ + { + ioreq.irHandle=pDevice->bHandle; + ioreq.irLength=0; + + outRec.status =flDefragmentVolume (&ioreq); + + outRec.data=ioreq.irLength; + if(copy_to_user(ioctlRecord.outputRecord,&outRec,sizeof(flOutputLnxRecord))) + return -EFAULT; + return 0; + } +#endif /* TFFS_DEBUG_DRIVER */ + + case 5: /* ATA pass-through command */ + return ata_passthrough (pDevice, &ioctlRecord, &inRec); + } + } + + + default: + PrintkDebug("TffsIoctl: no Tffs ioctl"); + return -EINVAL; + } + + /* do not check error code - it sended by outRec->status */ + flIOctl (&ioreq); + + return 0; +#else /* FL_IOCTL_INTERFACE */ + return 1; +#endif /* FL_IOCTL_INTERFACE */ +} + + + + +/******************************************************************************* + * * + * T f f s E n a b l e I R Q * + * * + * This routine enables DiskOnChip interrupt generation upon completion of * + * flash erase/write operation. Works with all types of DiskOnChip devices. * + * * + * Parameters: * + * * + * psoc socket pointer * + * * + * Returns: * + * * + * always zero (success) * + * * + *******************************************************************************/ + +int TffsEnableIRQ (SocketInfo * psoc) +{ + IOreq ioreq; + + ioreq.irHandle = psoc->bHandle; + ioreq.irFlags = FL_IRQ_RB_TYPE; + ioreq.irLength = (FL_INT_RB_ENABLED | /* FL_IRQ_EDGE_TYPE */ FL_IRQ_LEVEL_TYPE); + + flHwConfig (&ioreq); + + return 0; +} + + + + +/******************************************************************************* + * * + * T f f s S e t P I O * + * * + * If requested, this routine sets multi-sector polled I/O mode in DiskOnChip * + * H3 devices. It has no effect on H1/G4/G3 DiskOnChip devices. * + * * + * Parameters: * + * * + * psoc socket pointer * + * * + * Returns: * + * * + * zero if success otherwise respective error code * + * * + *******************************************************************************/ + +int TffsSetPIO (SocketInfo * psoc) +{ + IOreq ioreq; + DOCH_Error rc = DOCH_OK; + + if (tffs_pio > 0) /* multi-sector polled I/O mode requested */ + { + /* If we are going to use intermediate DMA buffer (which is one MMU page + * in size), we must make sure that multi-sector PIO won't overrun it. + */ + if( (tffs_dma_mode > 0) && !(tffs_dma_mode & 0x4) && + ((tffs_pio * FL_SECTOR_SIZE) > PAGE_SIZE) ) + { + PrintkError ("Multi-sector polled I/O overruns DMA buffer, disabled"); + tffs_pio = 0; + return -1; + } + + /* Set multi-sector polled I/O mode to transfer up to + * 'tffs_pio_mode' (but no more then 256) sectors at once. + */ + ioreq.irHandle = psoc->bHandle; + ioreq.irCount = DOCH_DATA_XFER_MODE_MULT; + ioreq.irLength = ((tffs_pio <= 255) ? tffs_pio : 0); + + if ((rc = flDOCHSetDataTransferMode(&ioreq)) != DOCH_OK) + { + PrintkError ("Can't set multi-sector polled I/O, error %d", rc); + tffs_pio = 0; + return -1; + } + PrintkInfo ("use multi-sector I/O (%d sectors)", tffs_pio); + } + else /* single-sector polled I/O mode requested */ + { + /* DiskOnChip H3 devices default to single-sector polled I/O mode + * upon reset, so we don't have to do anything here. + */ + } + + return (int)rc; +} + + + +/******************************************************************************* + * * + * T f f s S u s p e n d * + * * + * Power down DiskOnChip socket. * + * * + * Parameters: * + * * + * psoc socket pointer * + * * + * Returns: * + * * + * always zero (success) * + * * + *******************************************************************************/ + +int TffsSuspend (SocketInfo * psoc) +{ + IOreq ioreq; + + ioreq.irHandle = psoc->bHandle; + ioreq.irFlags = DEEP_POWER_DOWN; + + flDeepPowerDownMode (&ioreq); + + return 0; +} + + + + +/******************************************************************************* + * * + * T f f s R e s u m e * + * * + * Power up (previously powered down) DiskOnChip socket. * + * * + * Parameters: * + * * + * psoc socket pointer * + * * + * Returns: * + * * + * always zero (success) * + * * + *******************************************************************************/ + +int TffsResume (SocketInfo * psoc) +{ + IOreq ioreq; + + ioreq.irHandle = psoc->bHandle; + ioreq.irFlags = EXIT_DEEP_POWER_DOWN; + + flDeepPowerDownMode (&ioreq); + + return 0; +} + + + +static +void set_disk_geometry (DeviceInfo *pDisk) +{ + /* Limitations for old BIOSes: + no. of heads : 8 bits - max 255 + no. of cylinders: 10 bits - max 1023 + no. of sectors per track: 6 bits - max 63 */ + + if (pDisk->dwSize == 0) + { + pDisk->wCyl = 1; + pDisk->bHead = 1; + pDisk->bSect = 1; + return; + } + else if (pDisk->dwSize <= 0x800000) /* up to 4 GByte */ + { + unsigned long sectors, rest, minSec, maxSec, sec, minCyl, cyl; + + rest=sectors = (pDisk->dwSize >> pDisk->wTffsHWSectorSizeShift); /* use shared sector size instead kernel HW sector size - the same geometry for any harsect */ + + minSec=sectors/(1023*255); + if(sectors!=minSec*1023*255) + minSec++; + maxSec=63>>pDisk->wTffsHWSectorSizeShift; + minCyl=sectors/(maxSec*255); + if(sectors!=minCyl*maxSec*255) + minCyl++; + + for(sec=maxSec;sec>=minSec;sec--) + { + unsigned long minHead,maxHead,dwHead; + minHead=sectors/(sec*1023); + if(sectors!=minHead*sec*1023) + minHead++; + /* if(minHead%16) minHead=((minHead>>4)+1)<<4; */ + + maxHead=sectors/(sec*minCyl); + if(maxHead>255) + maxHead=255; + for(dwHead=minHead;dwHead<=maxHead;dwHead++ /*=16*/ ) + { + unsigned long tmp; + cyl=sectors/(sec*dwHead); + tmp=sectors-cyl*sec*dwHead; + if(rest>tmp) + { + pDisk->wCyl=cyl; + pDisk->bHead=dwHead; + pDisk->bSect=sec<wTffsHWSectorSizeShift; + if(tmp==0) + { + PrintkDebug("C/H/S (0) %u %u %u",pDisk->wCyl,pDisk->bHead,pDisk->bSect); + return; + } + rest=tmp; + } + } + } + } + else /* 4 .. 512 GByte */ + { + unsigned long heads = 16L, sectors_per_track = 63L, cylinders; + + /* Our preferences are (from highest to lowest): + * - 63 sectors per track + * - 16 heads + * - less then 65535 cylinders + */ + while ((cylinders = pDisk->dwSize / (heads * sectors_per_track)) > 65535L) + { + if (heads < 255L) heads++; + else if (sectors_per_track < 255L) sectors_per_track++; + else + { + PrintkError ("Error calculating C/H/S"); + break; + } + } + + pDisk->wCyl = (unsigned short) cylinders; + pDisk->bHead = (unsigned char) heads; + pDisk->bSect = (unsigned char) sectors_per_track; + + /* disk should have whole number of cylinders */ + pDisk->dwSize = (unsigned long)pDisk->wCyl * pDisk->bHead * pDisk->bSect; + } +} + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs2lnx.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs2lnx.h new file mode 100755 index 00000000..9975b4db --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs2lnx.h @@ -0,0 +1,59 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + +#ifndef ___TFFS2LNX__H__ +#define ___TFFS2LNX__H__ + +/* Driver Functions */ +int TffsInit (void); +int TffsCleanup (void); +unsigned char TffsOpenDevice(DeviceInfo*pDevice); +unsigned char TffsCloseDevice(DeviceInfo*pDevice); +unsigned char TffsRead(DeviceInfo*pDevice,void*data,int block,int count); +unsigned char TffsWrite(DeviceInfo*pDevice,void*data,int block,int count); +int TffsIoctl(DeviceInfo*pDevice,int cmd,unsigned long arg); +unsigned char TffsIsWriteProtected(DeviceInfo*pDevice); + +/* enable DiskOnChip interrupt */ +extern int TffsEnableIRQ (SocketInfo *psoc); + +/* set multi-sector polled I/O mode */ +extern int TffsSetPIO (SocketInfo *psoc); + +/* suspend/resume power */ +extern int TffsSuspend (SocketInfo *psoc); +extern int TffsResume (SocketInfo *psoc); + +#endif /* ___TFFS2LNX__H__ */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs_api.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs_api.c new file mode 100755 index 00000000..8a23d0f4 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs_api.c @@ -0,0 +1,5359 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/tffs_api.c-arc $ + * + * Rev 1.100 Dec 25 2007 11:21:16 einat.avidan + * bug fix: unformat should not delete all partitions only if + * identified protected partitions + * + * Rev 1.99 Dec 16 2007 11:43:34 einat.avidan + * Add format start and format complete signatures in disk user attributes + * AbsMount: check format complete signature if format start signature exist + * + * + * Rev 1.98 Dec 04 2007 17:48:08 einat.avidan + * Bug fix: add check for format completeness in flAbsMountVolume + * Round requested fast area size up to unit Size + * Changed parameters passed to flDOCHWipeSectors + * Bug fix: TFFSChangeProtectionType failed setting partition as OTW + * + * Rev 1.97 Nov 04 2007 17:08:24 einat.avidan + * use secure erase command + * fix printout + * + * Rev 1.96 Oct 30 2007 17:12:00 einat.avidan + * new fast area type - FL_LENGTH_ALL + * unformat - delete partitions even if bad format + * implement eraseBD and SecureDelete by writing + * + * Rev 1.95 Oct 23 2007 11:30:36 einat.avidan + * update function documentation + * + * Rev 1.94 Oct 22 2007 11:34:56 einat.avidan + * update copyrights header + * + * Rev 1.93 Oct 11 2007 18:50:44 Einat.Avidan + * Replace global Boolean pattern with pattern in size of + * byte instead of dWord + * add compilation flags for SOTP and SLPP + * remove internal call to flDOCHFreeSectors in TFFSAbsDelete + * bug fix: TFFSWriteIPL did not support FL_IPL_SWAP_BYTES_MODE + * + * Rev 1.92 Sep 04 2007 15:42:24 einat.avidan + * bug fix: SCR 2993: flIdentifyProtection() does not report LOCK_ASSERTED + * + * Rev 1.91 Jul 02 2007 11:44:42 einat.avidan + * bug fix: SCR2966 : removed flags which are not in use + * FL_PREPARE_FOR_RESUME + * FL_IPL_NO_ADDRESS_SHIFT_MODE + * + * Rev 1.90 Jul 01 2007 13:47:28 einat.avidan + * bug fix: SCR 2964 compilation flag FL_VERIFY_WRITE should exclude \ include code for write verification + * + * Rev 1.89 Jun 20 2007 12:08:40 einat.avidan + * when DOCH_AUTO_DPD_BY_HOST is enabeled: wrong macro name was used(TFFS_API_IS_DPD_ON instead of TFFS_API_IS_AUTO_DPD_ON) + * + * Rev 1.88 Mar 22 2007 17:12:12 einat.avidan + * add SOTP + * + * Rev 1.87 Mar 22 2007 16:44:50 einat.avidan + * bug fix: TFFSVolumeInfo will return SLPP protection indication in case of SLPP and 0 otherwise. + * + * Rev 1.86 Mar 13 2007 13:47:18 einat.avidan + * add support for SLPP + * + * Rev 1.85 Mar 11 2007 16:59:06 einat.avidan + * bug fix: scr2886 flHardwareProtectionLock was not supported. + * bug fix: scr2819 maximum number of authentication tries of IPL partition was 1 + * + * Rev 1.84 Feb 28 2007 10:34:08 einat.avidan + * In write IPL – do not write whole partition, in order to reduce the time between reset and busy + * + * Rev 1.83 Feb 15 2007 17:53:14 Einat.Avidan + * Enable burst without DMA + * + * Rev 1.81.1.8 Nov 30 2006 10:24:16 Yaniv.Iarovici + * Fixed compilation warnings. + * + * Rev 1.81.1.7 Nov 21 2006 14:26:32 Yaniv.Iarovici + * Enable removing 'lock enabled' attribute from a partition. + * + * Rev 1.81.1.6 Nov 12 2006 09:48:00 Yaniv.Iarovici + * Write default/customized delay cell configuration values in flWriteIPL(). + * + * Rev 1.81.1.5 Nov 01 2006 08:56:28 Yaniv.Iarovici + * Prevent leaving ALL existing partitions in flFlashFormat(). + * + * Rev 1.81.1.4 Oct 31 2006 14:00:52 yaniv.iarovici + * Prevent setting a NON-CHANGABLE partition to CHANGEABLE. + * + * Rev 1.81.1.3 Oct 30 2006 15:50:40 yaniv.iarovici + * Fixed comment for flFlashFormat(). + * + * Rev 1.81.1.2 Oct 29 2006 11:00:00 Yaniv.Iarovici + * 1. All HW protection related routines enabled in bdCall() + * (Removed '#ifdef HW_PROTECTION') + * 2. Added casting to (void*) on 'DEFAULT_KEY' when calling tffsAPISetIoreq(). + * + * Rev 1.81.1.1 Oct 25 2006 09:10:48 Yaniv.Iarovici + * 1. Declare TFFSIdentifyProtection(). + * 2. Remove '#ifdef FL_EXTENDED_DISK_INFO' from implementation of TFFSGetExtendedDiskInfo(). + * 3. Change comment in description of TFFSFlashFormat(). + * 4. In TFFSUnFormat() - Check that all partitions are authenticated before trying to unformat. + * 5. Remove '#ifdef HW_PROTECTION' from implementation of protection routines. + * 6. Allow setting Normal IPL mode when using 8KB window. + * 7. Allow removing the 'CHANGEABLE_PROTECTION' attribute from a partition. + * + * Rev 1.81.1.0 Oct 22 2006 14:54:14 yaniv.iarovici + * 1. Fixed compilation warnings. + * 2. Changed flRegisterDOCH3SOC()return type to FLStatus. + * + * Rev 1.81 Oct 09 2006 14:06:06 yaniv.iarovici + * 1. Fixed compilation errors when FL_RDA_ONLY is defined + * 2. Fix TrueFFS version in TFFSGetExtendedDiskInfo() + * + * Rev 1.80 Oct 05 2006 11:01:22 yaniv.iarovici + * 1. Modified debug prints. + * 2. Removed unnecessary use of #ifdef HW_OTP + * 3. Fixed wrong protection attribute returned by TFFSIdentifyProtection() + * for READ and WRITE protected partition. + * + * Rev 1.79 Sep 14 2006 09:56:50 yaniv.iarovici + * Set IPL partition as 'protectable' upon its creation. + * + * Rev 1.78 Sep 13 2006 10:30:46 yaniv.iarovici + * Fix compilation warnings + * + * Rev 1.77 Sep 11 2006 13:45:28 yaniv.iarovici + * Legal header added + * + * Rev 1.76 Sep 03 2006 14:45:22 Yaniv.Iarovici + * 1. Allow calling TFFSGetExtendedDiskInfo() without request for specific partition info. + * 2. Bug fix: In TFFSChangeProtectionType() - set dwLockControl correctly. + * + * Rev 1.75 Aug 24 2006 11:40:04 Yaniv.Iarovici + * Bug fix in TFFSGetExtendedDiskInfo() - wrong return code checked. + * + * Rev 1.74 Aug 22 2006 13:26:56 Yaniv.Iarovici + * Fix calculation of 'numOfBinaryParToLeave' when BDK_ACCESS is defined. + * + * Rev 1.73 Aug 17 2006 15:33:28 Yaniv.Iarovici + * Remove Joint Protection + * + * Rev 1.71 Aug 17 2006 15:20:18 Yaniv.Iarovici + * 1) Encapsulate Joint Protection code under '#ifdef FL_JOINT_PROTECTION' (NOT define by default!) + * 2) Fix Joint protection support for Read protected partitions. + * + * Rev 1.69 Aug 16 2006 08:48:26 Yaniv.Iarovici + * 1) Enable READ+Write protection: + * - tffsFormatSetProtectionAttribs() + * - TFFSChangeProtectionType() + * 2) TFFSflashFormat(): + * - Add /LEAVE support for BDTL partitions as well as BDK + * - Rename 'binParToLeave; to 'numOfParToLeave ' + * - Encasulate BDK related code by '#ifdef BDK_ACCESS' + * 3) Fix description for TFFSChangeProtectionType() + * 4) Encapsulate BDK related code under '#ifdef BDK_ACCESS'. + * 5) Change error code returned by 'TFFSChangeProtectionKey()' to flHWProtection. + * + * Rev 1.67 Aug 09 2006 17:27:40 Polina.Marimont + * initial for DOC Driver 1.0 + * + * Rev 1.66 Aug 09 2006 17:20:28 Polina.Marimont + * initial for DOC Driver 1.0, DPD fixes from branch 1.64... applied + * + * Rev 1.63 Jul 03 2006 22:13:56 polina.marimont + * 1. bug fix - protection with leave failed to format + * 2. bug fix - flags returned by identifyProtection on OTW protected partition + * + * Rev 1.62 Jun 28 2006 11:34:56 Polina.Marimont + * bug fix - TFFSGetUniqueID() shoudl be enabled / disabled by HW_OTP flag and not by FL_EXTENDED_DISK_INFO + * + * Rev 1.61 Jun 28 2006 10:36:00 Polina.Marimont + * bug fix - writeIPL() on non-first data chunk caused to wrong data to be written + * + * Rev 1.60 Jun 27 2006 15:53:26 Polina.Marimont + * bug fix flVolumeInfo() API return base address + * + * Rev 1.59 Jun 26 2006 11:05:22 Polina.Marimont + * added include to hib.h file + * + * Rev 1.58 Jun 22 2006 17:55:38 Polina.Marimont + * compilation warnings fixes + * + * Rev 1.57 Jun 22 2006 13:18:40 Polina.Marimont + * updated comments + * + * Rev 1.56 Jun 22 2006 09:36:46 Polina.Marimont + * error codes compatibility for extendedDiskInfo() + * + * Rev 1.55 Jun 22 2006 09:06:06 Polina.Marimont + * TFFSRemoveProtectionKey() error code compatibily fix + * + * Rev 1.54 Jun 21 2006 18:25:42 Polina.Marimont + * 1. enter/exit DPD function fix + * 2. change protection to OTW updated + * 3. identify prrotection updated + * + * Rev 1.53 Jun 20 2006 12:40:28 Polina.Marimont + * error codes for insert key and authenticate partition fixed to be compatible to non mDOC h3 devices + * + * Rev 1.52 Jun 18 2006 13:09:00 Polina.Marimont + * 1. error codes changed to be compatible to non mDOC H3 devices + * 2. macros definition usage update + * 3. AutoDPD and DPD parameters set changed, storage moved to SA SDK + * + * Rev 1.51 Jun 14 2006 17:59:48 Polina.Marimont + * 1. structure definitions moved to header file + * 2. special function added for set IOreq structure parameters + * 3. printing fixes + * 4. bug fix - flash lifetime indication fix + * 5. bug fix - number of volume on unformatted device (returns 1) + * 6. check BDTL size should not be equal to 0, while formatting + * 7. unformat - remove all, including OTP and IPL partitions from the device + * 8. wipe sectors usage restored + * 9. bdkWriteInit() added check for requested size exceeded subpartition size + * 10. bug fix - used unit on BDK subparition rounded to the low boundary + * 11. When EDGE interrupt configured - print warning and configure to LEVEL interrupt. + * + * Rev 1.50 May 31 2006 15:41:44 polina.marimont + * TrueFFS 7.1.0 EQA16 + * + * Rev 1.49 May 28 2006 14:50:30 polina.marimont + * fix for IDENTIFY DEVICE + * + * Rev 1.48 May 28 2006 13:03:10 polina.marimont + * update for IDENTIFY DEVICE change + * + * Rev 1.47 May 24 2006 14:57:26 polina.marimont + * bugfix - erase BDK subpartition always erases first unit of subpartition 0 + * + * Rev 1.46 May 24 2006 08:17:06 polina.marimont + * dochVol.intermediateBuf - free added to tffsApiExit() function + * + * Rev 1.45 May 24 2006 08:13:30 polina.marimont + * TFFSbdkPartitionInfo() - wrong handle received from ioreq. + * + * Rev 1.44 May 21 2006 18:06:44 polina.marimont + * compilation errors fix, when CHECK_BEFORE_EVERY_COMMAND defined + * + * Rev 1.43 May 18 2006 14:29:56 polina.marimont + * TFFSBdkPartitionInfo() fixed to return flBadDriveHandle, when wrong number of partition specified, using migration variable + * + * Rev 1.42 May 18 2006 09:47:06 polina.marimont + * 1. IOCTL fixed + * 2. used size set back to 0 + * + * Rev 1.41 May 17 2006 15:42:28 polina.marimont + * 1. Error codes are fixed up to Legacy + SA package + * 2. LOCK and CHANGABLE protection support + * 3. Format fixed - common functions used to add IPL and OTP partitions, also to set partition protection attributes + * 4. PassThrough implemented + * 5. bug fixes + * + * Rev 1.40 Apr 11 2006 13:21:34 tal.heller + * enable EraseBD API. + * Bug Fix - Last Partition size wasn't initialized. + * Fix CC compilation + * adapt SecureDelete ioreq implementation to DOCH + * Bug Fix - StickLock API + * Comments syntax errors. + * + * Rev 1.39 Mar 29 2006 16:39:50 DoronC + * Bug fix - compilation warnings ove various compilers. + * + * Rev 1.38 Mar 27 2006 16:21:58 DoronC + * Add DMA support. + * + * Rev 1.37 Mar 22 2006 17:35:46 DoronC + * Bug fix - add signature to disk attributes in order to use only + * format made by TrueFFS 7.1 and not by host SDK. + * Other format will force reformatting of the media. + * + * Rev 1.36 Mar 20 2006 17:21:58 DoronC + * Bug fix - read IPL using buffers failed. + * + * Rev 1.35 Mar 20 2006 10:41:16 DoronC + * Bug fix - protection change was not working. + * + * Rev 1.34 Mar 15 2006 16:17:54 DoronC + * Bug fix - wrong flag was checked when reading IPL. + * + * Rev 1.33 Mar 15 2006 15:58:04 DoronC + * Bug fix - change protection key caused an exception. + * + * Rev 1.32 Mar 15 2006 14:14:46 DoronC + * Bug fix - formating protected partition with no active protection failed. + * Bug fix - IPL flags were not checked. + * + * Rev 1.31 Mar 15 2006 11:28:16 DoronC + * Bug fix - IPL write was not working properly. + * Bug fix - BDK used size was faulty. + * + * Rev 1.30 Mar 14 2006 09:53:52 DoronC + * Bug fix - DOCFlash win field was not initialized by the init routine + * causing exception on some conditions. + * + * Rev 1.29 Mar 06 2006 08:40:52 DoronC + * Bug fix - protection identify was reported wrong. + * + * Rev 1.28 Mar 05 2006 15:52:24 DoronC + * Protection structure of H3 changed to contain dwords instead + * of words. + * + * Rev 1.27 Mar 02 2006 12:02:30 DoronC + * Bug fix - mount was checked for wrong number of partitions. + * + * Rev 1.26 Mar 02 2006 08:30:26 DoronC + * Host SDK API changed from IOreq2 to IOreq. + * + * Rev 1.25 Feb 16 2006 11:32:38 DoronC + * Store binary partition flags in the attributes and return then + * when requested by extendedInfo for computability with legacy + * devices. + * + * Rev 1.24 Feb 16 2006 10:02:40 DoronC + * Bug fix - Compilation warnings removed. + * Bug fix - Combining DPS between BDK and BDTL was not + * working properly during format. + * Bug fix - change protection key&type of combined DPS was not + * working. + * + * Rev 1.23 Feb 14 2006 10:50:02 DoronC + * Remove large variables from stack. use one global buffer for + * all large buffers needs. + */ + + +#include "flsystem.h" +#include "flcustom.h" +#include "defs.h" +#include "flbase.h" +#include "flstdcmp.h" + +#include "flsystyp.h" +#include "flchkdef.h" +#include "blockdev.h" +#include "_docsys.h" + +#include "hib.h" +#include "doch_ata.h" +#include "doch_api.h" +#include "bdkemul.h" +#include "tffs_api.h" +#include "doch_func.h" +#include "dochtl.h" + + +#define MAX_MOUNT_COUNT 100 /*100 Times...*/ +#define DOCH_NUM_OF_PLANES 1 +#define DOCH_NUM_OF_BANKS 1 +#define DOCH_SECTORS_PER_PAGE 4 +#define DOCH_SHARED_SECTORS 32 + +#define DOCH_CAPACITY_128MB 0x40000 /*In Sectors*/ +#define DOCH_CAPACITY_256MB 0x80000 /*In Sectors*/ +#define DOCH_CAPACITY_512MB 0x100000 /*In Sectors*/ +#define DOCH_CAPACITY_1GB 0x200000 /*In Sectors*/ +#define DOCH_CAPACITY_2GB 0x400000 /*In Sectors*/ +#define DOCH_CAPACITY_4GB 0x800000 /*In Sectors*/ +#define DOCH_CAPACITY_8GB 0x1000000 /*In Sectors*/ + +#define DOCH_UNIT_SIZE_256KB 0x40000 /*In Bytes*/ +#define DOCH_UNIT_SIZE_512KB 0x80000 /*In Bytes*/ +#define DOCH_UNIT_SIZE_1MB 0x100000 /*In Bytes*/ +#define DOCH_UNIT_SIZE_2MB 0x200000 /*In Bytes*/ +#define DOCH_UNIT_SIZE_4MB 0x400000 /*In Bytes*/ + +#define createIrHandle(socket, partition) ((socket) + ((partition) << 4)); + +/********************/ +/* Externs */ +/********************/ + +#ifdef __cplusplus +extern "C" { +#endif + +extern FLByte gIsDMAEnabled; /*DMA is Enabled/Disabled*/ +extern DOCH_DpdSettings gDpdSettings; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND +extern FLByte gDeviceTurnedOff; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + +#ifdef __cplusplus +} +#endif + +/********************/ +/* Global Vars */ +/********************/ + +DocHVolume dochVol; +FLBoolean dochBdCallWasCalled = FALSE; +FLBoolean dochDpdInitialized = FALSE; + +#ifdef CHECK_POWER_ON_EVERY_COMMAND +#define TFFS_API_RET(rc)((rc==DOCH_DeviceTurnedOff) ? flSuspendModeDetected : flGeneralFailure) +#else /*CHECK_POWER_ON_EVERY_COMMAND*/ +#define TFFS_API_RET(rc) flGeneralFailure +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + +#define TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, dochStatus, flStatus){\ + DOCH_DeviceInfo * pDevInfo = (DOCH_DeviceInfo*)dochVol.intermediateBuf;\ + dochStatus = flDOCHIdentifyDiskOnChipDevice(tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0,dochVol.intermediateBuf, 0,0));\ + if(dochStatus != DOCH_OK){\ + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("flDOCHIdentifyDiskOnChipDevice failed with status: 0x%x "),dochStatus));\ + return (dochStatus==DOCH_DiskNotFound)? flUnknownMedia:TFFS_API_RET(dochStatus);}\ + dochVol.dwUnformattedCapacity = pDevInfo->dwUnformattedCapacity;\ + dochVol.dwVirtualUnitSizeInSectors = (pDevInfo->dwUnitSize!=0) ? pDevInfo->dwUnitSize : (dochVol.dwUnformattedCapacity>>9);\ + dochVol.dwVirtualUnitSize = ((dochVol.dwVirtualUnitSizeInSectors)<dwOtpEnabled = ((protectionType & CHANGEABLE_PROTECTION) && \ + (!(protectionType & SECTOR_LEVEL_PROTECTION))) ? TRUE : FALSE;\ + pPartitionFormatInfoAPI->dwPartitionType = DOCH_PRT_TYPE_NORMAL;\ + pPartitionFormatInfoAPI->dwPerformanceControl = DOCH_NORMAL_PERFORMANCE;\ + pPartitionFormatInfoAPI->dwPageSizeExp = DOCH_PAGE_SIZE_512B;\ + pPartitionFormatInfoAPI->dwHashType = DOCH_HASH_TYPE_SHA1;\ + pPartitionFormatInfoAPI->dwEncryptionType = DOCH_ENCRYPT_NONE;\ + pPartitionFormatInfoAPI->dwMasterControl = DOCH_PART_ACCESS_MODE_FULL;\ + pPartitionFormatInfoAPI->dwMaxNumOfAuthAttempts = DOCH_MAX_PWD_ATTEMPTS;\ + pPartitionFormatInfoAPI->bSOTP = FALSE; +#else /*FL_SLPP*/ + /*SOTP is supported and SLPP isn't*/ + #define TFFS_API_SET_MIG_STD_PART_PRMS(pPartitionFormatInfoAPI, protectionType)\ + pPartitionFormatInfoAPI->dwOtpEnabled = (protectionType & CHANGEABLE_PROTECTION) ? TRUE : FALSE;\ + pPartitionFormatInfoAPI->dwPartitionType = DOCH_PRT_TYPE_NORMAL;\ + pPartitionFormatInfoAPI->dwPerformanceControl = DOCH_NORMAL_PERFORMANCE;\ + pPartitionFormatInfoAPI->dwPageSizeExp = DOCH_PAGE_SIZE_512B;\ + pPartitionFormatInfoAPI->dwHashType = DOCH_HASH_TYPE_SHA1;\ + pPartitionFormatInfoAPI->dwEncryptionType = DOCH_ENCRYPT_NONE;\ + pPartitionFormatInfoAPI->dwMasterControl = DOCH_PART_ACCESS_MODE_FULL;\ + pPartitionFormatInfoAPI->dwMaxNumOfAuthAttempts = DOCH_MAX_PWD_ATTEMPTS;\ + pPartitionFormatInfoAPI->bSOTP = FALSE; +#endif /*FL_SLPP*/ +#else /*FL_SOTP*/ +#ifdef FL_SLPP + /*SOTP is not supported and SLPP is supported*/ + #define TFFS_API_SET_MIG_STD_PART_PRMS(pPartitionFormatInfoAPI, protectionType)\ + pPartitionFormatInfoAPI->dwOtpEnabled = ((protectionType & CHANGEABLE_PROTECTION) && \ + (!(protectionType & SECTOR_LEVEL_PROTECTION))) ? TRUE : FALSE;\ + pPartitionFormatInfoAPI->dwPartitionType = DOCH_PRT_TYPE_NORMAL;\ + pPartitionFormatInfoAPI->dwPerformanceControl = DOCH_NORMAL_PERFORMANCE;\ + pPartitionFormatInfoAPI->dwPageSizeExp = DOCH_PAGE_SIZE_512B;\ + pPartitionFormatInfoAPI->dwHashType = DOCH_HASH_TYPE_SHA1;\ + pPartitionFormatInfoAPI->dwEncryptionType = DOCH_ENCRYPT_NONE;\ + pPartitionFormatInfoAPI->dwMasterControl = DOCH_PART_ACCESS_MODE_FULL;\ + pPartitionFormatInfoAPI->dwMaxNumOfAuthAttempts = DOCH_MAX_PWD_ATTEMPTS; +#else /*FL_SLPP*/ + /*both SOTP and SLPP are not supported*/ + #define TFFS_API_SET_MIG_STD_PART_PRMS(pPartitionFormatInfoAPI, protectionType)\ + pPartitionFormatInfoAPI->dwOtpEnabled = (protectionType & CHANGEABLE_PROTECTION) ? TRUE : FALSE;\ + pPartitionFormatInfoAPI->dwPartitionType = DOCH_PRT_TYPE_NORMAL;\ + pPartitionFormatInfoAPI->dwPerformanceControl = DOCH_NORMAL_PERFORMANCE;\ + pPartitionFormatInfoAPI->dwPageSizeExp = DOCH_PAGE_SIZE_512B;\ + pPartitionFormatInfoAPI->dwHashType = DOCH_HASH_TYPE_SHA1;\ + pPartitionFormatInfoAPI->dwEncryptionType = DOCH_ENCRYPT_NONE;\ + pPartitionFormatInfoAPI->dwMasterControl = DOCH_PART_ACCESS_MODE_FULL;\ + pPartitionFormatInfoAPI->dwMaxNumOfAuthAttempts = DOCH_MAX_PWD_ATTEMPTS; +#endif /*FL_SLPP*/ +#endif /*FL_SOTP*/ +/*********************/ +/* Static functions */ +/*********************/ +#ifndef FL_READ_ONLY +static FLStatus tffsApiAddOtpIPL(FLBoolean bIPL, IOreq * myIoreq, IOreq * ioreq); +static FLStatus tffsFormatSetProtectionAttribs(FLByte bProtType, DOCH_PartitionFormatInfoAPI* pPartitionFormatInfoAPI, FLByte * bKey, FLWord wKeyLen); +#endif /*FL_READ_ONLY*/ + +static FLStatus tffsApiAuthPartition(IOreq * myIoreq, IOreq * ioreq, FLByte bPartNo, FLByte * pKey, FLWord wKeyLen); +static IOreq* tffsAPISetIoreq(IOreq * pIoreq, FLHandle irHandle, FLDword irFlags, void* irPath, void * irData, FLSDword irLength, FLSDword irCount); + +static FLStatus TFFSIdentifyProtection(IOreq* ioreq); + +/*----------------------------------------------------------------------*/ +/* Function name : actualPartitionNum*/ +/* Description : */ +/* Return type : FLStatus */ +/* Argument : FLByte* partNum*/ +/* Argument : FLByte partitionType*/ +/*----------------------------------------------------------------------*/ +FLStatus actualPartitionNum(FLByte* partNum, FLByte partitionType, FLSDword sdwSocketNo) +{ + DOCH_Socket* pDev; + + DOCH_get_socket(pDev, sdwSocketNo); + if( pDev==NULL ) + return flBadParameter; + + switch(partitionType) + { + case PARTITION_TYPE_IPL: + break; + + case PARTITION_TYPE_BDTL: + *partNum += (dochVol.numOfBinaryPartitions + (dochVol.iplExists + dochVol.otpExists)); + break; + + case PARTITION_TYPE_BINARY: +#ifdef BDK_ACCESS + *partNum += (dochVol.iplExists + dochVol.otpExists); + break; +#else /*BDK_ACCESS*/ + return flPartitionNotFound; +#endif /*BDK_ACCESS*/ + + case PARTITION_TYPE_OTP: + break; + + default: + break; + } + + if( (*partNum) == 0 ) + return flOK; + + if( ((*partNum) >= DOCH_MAX_PARTITIONS) || ((*partNum) >=pDev->wTotalNumOfPartitions) ) + return flPartitionNotFound; + + return flOK; +}/*actualPartitionNum()*/ + + +/*----------------------------------------------------------------------*/ +/* T F F S E x t e n d e d G e t D i s k I n f o */ +/* */ +/* Returns general information about the Device and a specific partition */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Must be set to 0 */ +/* bits 3-0 - Socket # (zero based) */ +/* irCount : Partition number */ +/* irFlags : Either FL_BDK_PARTITION or FL_DISK_PARTITION */ +/* irData : Address of FLExtendedDiskInfo structure */ +/* irLength : Floor number to access - FL_ALL_FLOORS */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSGetExtendedDiskInfo(IOreq* ioreq) +{ + DOCH_Error rc; + FLStatus flStatus = flOK; + DOCH_Error specificPartRC = DOCH_PartitionNotFound; + DOCH_Error iplRC = DOCH_PartitionNotFound; + IOreq myIoreq; + FLExtendedDiskInfo FAR1 * info = (FLExtendedDiskInfo FAR1 *)ioreq->irData; + FLDword dwIPLSize; + FLByte bNumOfBinaryPartitions, partition; + FLWord wTotalNumOfPartitions; + FLDword dwPartitionFlags = 0; + DOCH_DeviceInfo * pDochDevInfo = (DOCH_DeviceInfo*)dochVol.intermediateBuf; + DOCH_DiskUserAttrWithBinary * pDiskUserAttrWithBinary = (DOCH_DiskUserAttrWithBinary*)dochVol.intermediateBuf; + DOCH_PartitionUserAttrWithBinary* pPartUserAttrWithBinary = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf; + DOCH_Socket * pDev; + + DOCH_get_socket(pDev, FL_GET_SOCKET_FROM_HANDLE(ioreq)); + + + /*Retrieve DOCH extended info structure*/ + /*-------------------------------------*/ + rc = flDOCHIdentifyDiskOnChipDevice(tffsAPISetIoreq(&myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq),0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSGetExtendedDiskInfo(): flDOCHIdentifyDiskOnChipDevice failed with status: %d "), rc)); + return (rc==DOCH_DiskNotFound)? flUnknownMedia:TFFS_API_RET(rc); + } + + TFFS_API_GET_UNIT_SIZE(myIoreq,ioreq, rc, flStatus); + + wTotalNumOfPartitions = pDochDevInfo->wTotalNumOfPartitions; + + /* Retrieve Disk User Attributes */ + /*-------------------------------*/ + rc = flDOCHGetDiskUserAttributes(tffsAPISetIoreq(&myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSGetExtendedDiskInfo(): flDOCHGetDiskUserAttributes failed with status: 0x%x "),rc)); + return (rc==DOCH_ProtectionFault)?flHWProtection:flBadFormat; /* if not protected -> like media header not found */ + } + + /* Check if device is not formatted */ + if( (! pDiskUserAttrWithBinary->bIplPresent) && (! pDiskUserAttrWithBinary->bOtpPresent) ) + { + /*Fill only relevant fields*/ + info->dwTLType = 0; + info->dwFormatFlags = 0; + info->dwTrueFFSVersion = 0; + info->dwFlashTechnology = 0; + info->dwType = FL_H3; + info->dwSubType = 0; + info->bMediaType = 0; + info->bNoOfFloors = (FLByte)pDev->wNumOfDevices; + info->bNoOfPlanes = DOCH_NUM_OF_PLANES; + info->bNoOfBanks = DOCH_NUM_OF_BANKS; + info->bDataBusWidth = 16; /*DOCH always uses 16bit*/ + info->bSectorsPerPage = DOCH_SECTORS_PER_PAGE; + info->bSharedSectors = DOCH_SHARED_SECTORS; + info->bFastAreaSharedSectors = 0; + info->bMaxRelatedSectors = 0; + info->dwIPLSize = 0; + info->bChangeableProtectedAreas = 0; + info->btotalProtectedAreas = 0; + info->dwUnitsInFirstFloor = 0; + info->dwUnitSize = dochVol.dwVirtualUnitSize; + info->dwMaxBadPercentage = 0; + + info->bNoOfBinaryPartitions = 0; + info->bNoOfDiskPartitions = 0; + info->bBlockMultiplierBits = 0; + info->dwPercentUsed = 0; + info->bHeaderUnits = 0; + info->wHeaderLocation = 0; + + /* Programmer name and version strings */ + /* Retrieve from disk attributes*/ + tffscpy(info->bProgrammerNamePtr, pDiskUserAttrWithBinary->bProgrammerName, sizeof(FLDword)); + tffscpy(info->bProgrammerVersionPtr, pDiskUserAttrWithBinary->bProgrammerVersion, sizeof(FLDword)); + info->dwTrueFFSVersion = 0; + DBG_PRINT_ERR(FLZONE_API, "TFFSGetExtendedDiskInfo(): device NOT formatted \r\n"); + return flBadFormat; + } + wTotalNumOfPartitions = wTotalNumOfPartitions - pDiskUserAttrWithBinary->bIplPresent - + pDiskUserAttrWithBinary->bOtpPresent; + bNumOfBinaryPartitions = pDiskUserAttrWithBinary->bNumOfBinaryPartitions; + + /* Programmer name and version strings */ + tffscpy(&info->bProgrammerNamePtr[0], pDiskUserAttrWithBinary->bProgrammerName, + sizeof(pDiskUserAttrWithBinary->bProgrammerName)); + tffscpy(&info->bProgrammerVersionPtr[0], pDiskUserAttrWithBinary->bProgrammerVersion, + sizeof(pDiskUserAttrWithBinary->bProgrammerVersion)); + + info->dwTrueFFSVersion = + (((pDiskUserAttrWithBinary->bTFFSVersion[0] - 0x30)*1000) + + ((pDiskUserAttrWithBinary->bTFFSVersion[1] - 0x30)*100 ) + + ((pDiskUserAttrWithBinary->bTFFSVersion[2] - 0x30)*10 ) + + (pDiskUserAttrWithBinary->bTFFSVersion[3] - 0x30)); + + /*Retrieve IPL partition size*/ + /*---------------------------*/ + iplRC = flDOCHPartitionInfo(tffsAPISetIoreq(&myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq) + (DOCH_IPL_PARTITION_NUM << 4), + 0,0,dochVol.intermediateBuf,0,0)); + if(iplRC != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSGetExtendedDiskInfo(): flDOCHPartitionInfo of IPL partition failed with status: 0x%x "), rc)); + return (iplRC==DOCH_ProtectionFault)?flHWProtection:flBadFormat; /* if not protected, but fails -> like bad format */ + } + dwIPLSize = ((DOCH_PartitionInfo*)dochVol.intermediateBuf)->nPartitionSize << DOCH_SECTOR_SIZE_BITS; + + /* Fill FLExtendedDiskInfo structure */ + /*--------------------------------------*/ + + /******************************************/ + /* Fields that belong to the entire media */ + /******************************************/ + info->dwTLType = 0; + info->dwFormatFlags = 0; + + info->dwFlashTechnology = 0; + info->dwType = FL_H3; + info->dwSubType = 0; + info->bMediaType = 0; + info->bNoOfFloors = (FLByte)pDev->wNumOfDevices; + info->bNoOfPlanes = DOCH_NUM_OF_PLANES; + info->bNoOfBanks = DOCH_NUM_OF_BANKS; + info->bDataBusWidth = 16; /*DOCH always uses 16bit*/ + info->bSectorsPerPage = DOCH_SECTORS_PER_PAGE; + info->bSharedSectors = DOCH_SHARED_SECTORS; + info->bFastAreaSharedSectors = 0; + info->bMaxRelatedSectors = 0; + info->dwIPLSize = dwIPLSize; + info->bChangeableProtectedAreas = 2; + info->btotalProtectedAreas = 2; + info->dwUnitsInFirstFloor = 0; + info->dwUnitSize = dochVol.dwVirtualUnitSize; + info->dwMaxBadPercentage = 0; + + info->bNoOfBinaryPartitions = bNumOfBinaryPartitions; + info->bNoOfDiskPartitions = wTotalNumOfPartitions - bNumOfBinaryPartitions; + info->bBlockMultiplierBits = 0; + info->dwPercentUsed = 0; + info->bHeaderUnits = 0; + info->wHeaderLocation = 0; + + + /*Retrieve specific partition info + Note that the specific partition is always a BDTL partition + Hence jumping over IPL/OTP/Binary Partition + -------------------------------------------*/ + partition = (FLByte)ioreq->irCount; + if(partition != FL_EXT_INFO_NO_SPEC_PART) + { + if(ioreq->irFlags == FL_DISK_PARTITION) + flStatus = actualPartitionNum(&partition, PARTITION_TYPE_BDTL, FL_GET_SOCKET_FROM_HANDLE(ioreq)); + else if(ioreq->irFlags == FL_BDK_PARTITION) + { + #ifdef BDK_ACCESS + flStatus = actualPartitionNum(&partition, PARTITION_TYPE_BINARY, FL_GET_SOCKET_FROM_HANDLE(ioreq)); + #else /*BDK_ACCESS*/ + return flPartitionNotFound; + #endif /*BDK_ACCESS*/ + } + if( flStatus!=flOK ) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSGetExtendedDiskInfo(): specific partition NOT FOUND \r\n"); + return flStatus; + } + + specificPartRC = flDOCHGetParitionUserAttributes(tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq) + (partition << 4), + 0,0,dochVol.intermediateBuf,0,0)); + if(specificPartRC != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSGetExtendedDiskInfo(): specific partition NOT FOUND \r\n"); + return (specificPartRC==DOCH_ProtectionFault)? flHWProtection : flBadDriveHandle; + } + if ((ioreq->irFlags == FL_DISK_PARTITION) && (pPartUserAttrWithBinary->bType != PARTITION_TYPE_BDTL)) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSGetExtendedDiskInfo(): Partition is not BDTL partition. \r\n"); + return flGeneralFailure; + } + + #ifdef BDK_ACCESS + if ((ioreq->irFlags == FL_BDK_PARTITION) && (pPartUserAttrWithBinary->bType != PARTITION_TYPE_BINARY)) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSGetExtendedDiskInfo(): Partition is not BDK partition. \r\n"); + return flGeneralFailure; + } + + if( pPartUserAttrWithBinary->bType == PARTITION_TYPE_BINARY ) + dwPartitionFlags = pPartUserAttrWithBinary->binPartHeader.dwPartitionFlags; + #endif /*BDK_ACCESS*/ + + specificPartRC = flDOCHPartitionInfo(tffsAPISetIoreq( &myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq) + (partition << 4), + 0, 0, dochVol.intermediateBuf, 0, 0)); + /* Check if partition exists */ + if(specificPartRC == DOCH_PartitionNotFound) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSGetExtendedDiskInfo(): specific partition NOT FOUND \r\n"); + return flBadDriveHandle; + } + /************************************************/ + /* Fields that belong to the specific partition */ + /************************************************/ + if(specificPartRC == DOCH_OK) + { + DOCH_PartitionInfo* pPartInfo = (DOCH_PartitionInfo*)dochVol.intermediateBuf; + info->wHeaderLocation = 0; + info->dwVirtualUnits = pPartInfo->nPartitionSize/dochVol.dwVirtualUnitSizeInSectors; + info->dwNormalAreaUnitSize = dochVol.dwVirtualUnitSize; + if(ioreq->irFlags == FL_DISK_PARTITION) + { + info->dwFastAreaVirtualFactor = pPartInfo->wFastAreaFactor; + info->dwFastAreaLogicalUnitSize = dochVol.dwVirtualUnitSize / (1<wFastAreaFactor); + info->dwFastUnits = pPartInfo->nFastAreaSize / (info->dwFastAreaLogicalUnitSize>>DOCH_SECTOR_SIZE_BITS); + } + else + {/* binary partition */ + #ifdef BDK_ACCESS + info->dwFastAreaVirtualFactor = 0; + info->dwFastAreaLogicalUnitSize = 0; + info->dwFastUnits = 0; + #else /*BDK_ACCESS*/ + return flPartitionNotFound; + #endif /*BDK_ACCESS*/ + } + info->dwFirstUnit = 0; + info->dwLastUnit = info->dwVirtualUnits; + info->dwPartitionFlags = dwPartitionFlags; + info->dwFirstQuickMountUnit = 0; + info->dwSpareUnits = 0; + info->dwTransferUnits = 0; + + + info->bMinSectorsForFolding = 0; + info->bMinSectorsForNextWrite = 0; + info->bfastAreaMinSectorsForNextWrite = 0; + + /******************************************/ + /* Fields that are valid only after mount */ + /******************************************/ + info->dwUsedUnits = 0; + info->dwFreeUnits = 0; + info->bNeededFreeUnits = 0; + info->dwUMDBBTSector = 0; + } + else + return TFFS_API_RET(specificPartRC); + + }/*end of if(partition != FL_EXT_INFO_NO_SPEC_PART)*/ + + return flOK; +}/*TFFSGetExtendedDiskInfo()*/ + + +/*----------------------------------------------------------------------*/ +/* T F F S V o l u m e I n f o */ +/* */ +/* Get general information about the media. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0,1,..) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Address of user buffer to read general */ +/* information into. */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irFlags : SECTOR_LEVEL_PROTECTION if the partition is */ +/* defined as SLPP */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSVolumeInfo(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + VolumeInfoRecord FAR1 * volumeInfo = (VolumeInfoRecord FAR1 *)ioreq->irData; + FLDword dwPartitionSize; + + /*Retrieve specific partition info*/ + /*--------------------------------*/ + rc = flDOCHPartitionInfo(tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSVolumeInfo(): flDOCHPartitionInfo failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flBadDriveHandle : TFFS_API_RET(rc)); + } + dwPartitionSize = ((DOCH_PartitionInfo*)dochVol.intermediateBuf)->nPartitionSize; + +#ifdef FL_SLPP + /* Is the partition SLPP?*/ + if(((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->partitionAttributes2 & DOCH_PA2B_PROTECTION_TYPE) >> DOCH_PA2O_PROTECTION_TYPE) + == DOCH_PARTITION_SLPP_PROTECTED) + ioreq->irFlags = SECTOR_LEVEL_PROTECTION; + else + ioreq->irFlags = 0; +#endif /*FL_SLPP*/ + + /*Retrieve DOCH extended info structure and calculate unit number if required */ + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + + /* Fill VolumeInfoRecord structure */ + /*----------------------------------*/ + /*Media Geometry*/ + flBuildGeometry( dwPartitionSize, &volumeInfo->cylinders, + &volumeInfo->heads, &volumeInfo->sectors, + FALSE, (FLWord)ioreq->irHandle); + + volumeInfo->logicalSectors = dwPartitionSize; + volumeInfo->bootAreaSize = 0; + /* Return window base reg */ + /*------------------------*/ + tffsAPISetIoreq( &myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq),0,0,0,0,0); + rc=flDOCHGetPhysicalAddress(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSGetPhysicalInfo(): DOCHGetPhysicalAddress failed with status: 0x%x "), rc)); + return (DOCH_DiskNotFound==rc) ? flAdapterNotFound : TFFS_API_RET(rc); + } + volumeInfo->baseAddress = myIoreq.irCount; + +#ifdef FL_LOW_LEVEL + volumeInfo->flashType = FL_H3; + volumeInfo->dwPhysicalUnitSize = dochVol.dwVirtualUnitSizeInSectors; + volumeInfo->dwPhysicalSize = dochVol.dwUnformattedCapacity; + volumeInfo->DOCType = FL_H3; + volumeInfo->lifeTime= 1; /*1 - indicates fresh media*/ +#endif /*FL_LOW_LEVEL*/ + + tffsset(volumeInfo->driverVer,0,sizeof(volumeInfo->driverVer)); + tffscpy(volumeInfo->driverVer,driverVersion, + TFFSMIN(sizeof(volumeInfo->driverVer),sizeof(driverVersion))); + + tffsset(volumeInfo->OSAKVer,0,sizeof(volumeInfo->OSAKVer)); + tffscpy(volumeInfo->OSAKVer, OSAKVersion, + TFFSMIN(sizeof(volumeInfo->OSAKVer),sizeof(OSAKVersion))); + + return flOK; +}/*TFFSVolumeInfo()*/ + +/*----------------------------------------------------------------------*/ +/* T F F S C o u n t V o l u m e s */ +/* */ +/* Counts the number of volumes on the Flash device. */ +/* */ +/* Not all the volumes necessarily need to be mounted. A drive formated */ +/* with a read protection will be registered but can not be accessed. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* : Partition number ( 0,1,2... ) */ +/* */ +/* Returns: */ +/* irFlags : Number of partitions */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSCountVolumes(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_GeneralFailure; + + IOreq myIoreq; + FLByte bNumOfPartition; + DOCH_DiskUserAttrWithBinary * pDiskUserAttrWithBinary = (DOCH_DiskUserAttrWithBinary *)(dochVol.intermediateBuf); + + /*Retrieve DOCH global info structure*/ + /*-------------------------------------*/ + rc = flDOCHIdentifyDiskOnChipDevice(tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), + 0,0,dochVol.intermediateBuf, 0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSCountVolumes(): flDOCHIdentifyDiskOnChipDevice failed with status: 0x%x "), rc)); + return (rc==DOCH_DiskNotFound)? flUnknownMedia : TFFS_API_RET(rc); + } + bNumOfPartition = (FLByte)((DOCH_DeviceInfo*)dochVol.intermediateBuf)->wTotalNumOfPartitions; + + /*Retrieve disk attributes*/ + rc = flDOCHGetDiskUserAttributes(tffsAPISetIoreq( &myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0, + dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSCountVolumes(): flDOCHGetDiskUserAttributes failed with status: 0x%x"), rc)); + return (rc==DOCH_ProtectionFault)?flHWProtection:TFFS_API_RET(rc); + } + bNumOfPartition = bNumOfPartition - pDiskUserAttrWithBinary->bIplPresent - + pDiskUserAttrWithBinary->bOtpPresent - pDiskUserAttrWithBinary->bNumOfBinaryPartitions; + + /*Extract # of partitions from Extended Info*/ + /*------------------------------------------*/ + ioreq->irFlags = bNumOfPartition; + + /* fix number of partitions - unformatted device should return 1*/ + if( (pDiskUserAttrWithBinary->bNumOfBinaryPartitions==0) && + (bNumOfPartition==0) ) + { + ioreq->irFlags = 1; + } + return flOK; +}/* TFFSCountVolumes() */ + + +/*----------------------------------------------------------------------*/ +/* f l S e c t o r s I n V o l u m e */ +/* */ +/* Returns number of virtual sectors in volume. */ +/* */ +/* In case the inserted volume is not mounted, returns current status. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irLength : number of virtual sectors in volume */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSSectorsInVolume(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq myIoreq; + + + /*Retrieve specific partition info*/ + /*--------------------------------*/ + myIoreq.irHandle = ioreq->irHandle; + myIoreq.irData = dochVol.intermediateBuf; + + rc = flDOCHPartitionInfo(tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSSectorsInVolume(): flDOCHPartitionInfo failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flBadDriveHandle : TFFS_API_RET(rc)); + } + + ioreq->irLength = ((DOCH_PartitionInfo*)dochVol.intermediateBuf)->nPartitionSize; + return flOK; +}/* TFFSSectorsInVolume */ + +#ifndef FL_NO_QUICK_MOUNT_FEATURE +/*----------------------------------------------------------------------*/ +/* */ +/* Quick mount routines are Obsoleted for DOCH */ +/* */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSClearQuickMountInfo(IOreq* ioreq) +{ + return flOK; +}/*TFFSClearQuickMountInfo*/ + +static FLStatus TFFSWriteQuickMountInfo(IOreq* ioreq) +{ + return flOK; +}/*TFFSWriteQuickMountInfo*/ + +static FLStatus TFFSGetQuickMountStatus(IOreq* ioreq) +{ + ioreq->irFlags = FL_ON; + return flOK; +}/*TFFSGetQuickMountStatus*/ + +#endif /* FL_NO_QUICK_MOUNT_FEATURE */ + +/********************************************************/ +/* */ +/* Mount related routines are obsolete for DOCH */ +/* Maintained in API only for backward compatibility */ +/* */ +/********************************************************/ +static FLStatus TFFSAbsMountVolume(IOreq* ioreq) +{ + FLByte partition; + FLStatus flStatus; + IOreq myIoreq; + DOCH_Error rc; + DOCH_DiskUserAttrWithBinary* pDiskUserAttr = (DOCH_DiskUserAttrWithBinary*) dochVol.intermediateBuf; + + partition = FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq); + + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irHandle = ioreq->irHandle; + myIoreq.irData = dochVol.intermediateBuf; + rc = flDOCHGetDiskUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSAbsMountVolume(): flDOCHGetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection:TFFS_API_RET(rc); + } + /*Get some data from disk attributes sector*/ + if ((tffscmp(pDiskUserAttr->bMigrationSignature, + TFFS_API_MIGRATION_SIGNATURE, + sizeof(pDiskUserAttr->bMigrationSignature)) != 0) + || (!pDiskUserAttr->bIplPresent) + || (!pDiskUserAttr->bOtpPresent)) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSAbsMountVolume(): Device is not formated with TrueFFS. Either reformat the device or run upgrade utility.\n"); + return flBadFormat; + } + + /* check whether format with DD 1.1 beta or upper*/ + if (tffscmp(pDiskUserAttr->bFormatStartSignature, + TFFS_API_FORMAT_START_SIGNATURE, + sizeof(pDiskUserAttr->bFormatStartSignature)) == 0) + { + if (tffscmp(pDiskUserAttr->bFormatCompleteSignature, + TFFS_API_FORMAT_COMPLETE_SIGNATURE, + sizeof(pDiskUserAttr->bFormatCompleteSignature)) != 0) + { + DBG_PRINT_ERR(FLZONE_API,"TFFSAbsMountVolume(): No format completion signature \n"); + return flBadFormat; + } + }else + { /* Format with earlier versions*/ + /* retrieve last partition number*/ + FLByte bLastPartition; + rc = flDOCHIdentifyDiskOnChipDevice(tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), + 0,0,dochVol.intermediateBuf, 0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSAbsMountVolume(): flDOCHIdentifyDiskOnChipDevice failed with status: 0x%x \n"), rc)); + return (rc==DOCH_DiskNotFound)? flUnknownMedia : TFFS_API_RET(rc); + } + bLastPartition = (FLByte)((DOCH_DeviceInfo*)dochVol.intermediateBuf)->wTotalNumOfPartitions -1; + + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq) + (bLastPartition << 4), 0,0, dochVol.intermediateBuf,0,0); + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if((rc != DOCH_OK && rc!=DOCH_ProtectionFault) ||(rc==DOCH_ProtectionFault && bLastPartition==partition)) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSAbsMountVolume(): flDOCHGetParitionUserAttributes failed with status: 0x%x \n"), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + /* no failure if last partition is hidden and we try to mount different partition*/ + } + + if (rc!=DOCH_ProtectionFault) + { /* if last partition is not hidden we can check format completeness*/ + if ((FLByte)((DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf)->bType != PARTITION_TYPE_BDTL) + { + DBG_PRINT_ERR(FLZONE_API,"TFFSAbsMountVolume(): No format completion indication on last partition \n"); + return flBadFormat; + } + } + } + + flStatus = dochMountTL(partition, FL_GET_SOCKET_FROM_HANDLE(ioreq)); + if (flStatus == flOK) + { + if(dochVol.mountCount[partition] < 0x64) + dochVol.mountCount[partition]++; + } + return flStatus; +}/*TFFSAbsMountVolume*/ + +static FLStatus TFFSAbsDismountVolume(IOreq* ioreq) +{ + FLByte partition; + FLStatus rc; + partition = FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq); + if(dochVol.mountCount[partition] == 0) + { + return flNotMounted; + } + + if(dochVol.mountCount[partition] > 0) + { + rc = dochDismountTL(partition); + if (rc == flOK) + { + dochVol.mountCount[partition]--; + } + } + else + rc = flNotMounted; + return rc; +}/*TFFSAbsDismountVolume*/ + + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSCheckVolume*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSCheckVolume(IOreq* ioreq) +{ + FLStatus flStatus; + if(dochVol.mountCount[FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq)] > 0) + flStatus = flOK; + else + flStatus = flNotMounted; + return flStatus; +}/*TFFSCheckVolume*/ + +#ifndef FL_READ_ONLY +/*----------------------------------------------------------------------*/ +/* T F F S D e f r a g m e n t V o l u m e */ +/* */ +/* Performs a general defragmentation and recycling of non-writable */ +/* Flash areas, to achieve optimal write speed. */ +/* */ +/* NOTE: The required number of sectors (in irLength) may be changed */ +/* (from another execution thread) while defragmentation is active. In */ +/* particular, the defragmentation may be cut short after it began by */ +/* modifying the irLength field to 0. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irLength : Minimum number of sectors to make available for */ +/* writes. */ +/* */ +/* Returns: */ +/* irLength : Actual number of sectors available for writes */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSDefragmentVolume(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + FLSDword request = ioreq->irLength; + + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + /*Return values*/ + /*=============*/ + switch(request) + { + case FL_MINIMAL_DEFRAGMENTATION: + case FL_MAXIMUM_DEFRAGMENTATION: + ioreq->irLength = dochVol.dwVirtualUnitSizeInSectors; + return flNotEnoughMemory; + + case FL_STATIC_WEAR_LEVELING_DELAYED: + case FL_STATIC_WEAR_LEVELING_NOW: + case FL_STATIC_WEAR_LEVELING_ON: + case FL_STATIC_WEAR_LEVELING_OFF: + ioreq->irLength = dochVol.dwVirtualUnitSizeInSectors; + break; + + default: + if(request > 0) + ioreq->irLength = dochVol.dwVirtualUnitSizeInSectors; + else + { + if(request == 0) + ioreq->irLength = 0; + else + return flBadParameter; + } + return flNotEnoughMemory; + } + return flOK; +}/*TFFSDefragmentVolume()*/ + + + + + +/*********************************************************/ +/* Function name : tffsFormatSetProtectionAttribs*/ +/* Description : */ +/* Return type : FLStatus */ +/* Argument : FLByte bProtType*/ +/* Argument : DOCH_PartitionFormatInfoAPI* pPartitionFormatInfoAPI*/ +/* Argument : FLByte * bKey*/ +/* Argument : FLWord wKeyLen*/ +/*********************************************************/ +static FLStatus tffsFormatSetProtectionAttribs( FLByte bProtType, DOCH_PartitionFormatInfoAPI* pPartitionFormatInfoAPI, + FLByte * pKey, FLWord wKeyLen) +{ + FLBoolean read_protect, write_protect, change_protect, locked; +#ifdef FL_SLPP + FLBoolean slpp =FALSE; +#endif /*FL_SLPP*/ +#ifdef FL_SOTP + FLBoolean sotp =FALSE; +#endif /*FL_SOTP*/ + + read_protect = write_protect = change_protect = locked = FALSE; + /*Enabled Protections*/ + + if( (bProtType & READ_PROTECTED) == READ_PROTECTED) + read_protect = TRUE; + if( (bProtType & WRITE_PROTECTED) == WRITE_PROTECTED) + write_protect = TRUE; + if( (bProtType & CHANGEABLE_PROTECTION) == CHANGEABLE_PROTECTION) + change_protect = TRUE; + if( (bProtType & LOCK_ENABLED) == LOCK_ENABLED) + locked = TRUE; +#ifdef FL_SLPP + if ((bProtType & SECTOR_LEVEL_PROTECTION) == SECTOR_LEVEL_PROTECTION) + slpp=TRUE; +#endif /*FL_SLPP*/ +#ifdef FL_SOTP + if ((bProtType & FORMAT_SEQUENTIAL_OTP)==FORMAT_SEQUENTIAL_OTP) + sotp=TRUE; + + if (sotp) + { + pPartitionFormatInfoAPI->bSOTP =TRUE; + pPartitionFormatInfoAPI->dwOtpEnabled =TRUE; + change_protect =TRUE; /* lock of SOTP is performed later on and is not allowed if not changeable*/ + } +#endif /*FL_SOTP*/ + + /*Protection requested*/ + if(read_protect || write_protect) + { + pPartitionFormatInfoAPI->dwProtectionType = DOCH_PARTITION_PWD_PROTECTED; + + /*Specific protection*/ + if(read_protect) + { + pPartitionFormatInfoAPI->dwGuestAccessMode = DOCH_PART_ACCESS_MODE_NONE; + } + else /*write_protect*/ + { + pPartitionFormatInfoAPI->dwGuestAccessMode = DOCH_PART_ACCESS_MODE_RO; + } + } + else + { +#ifdef FL_SLPP + /*SLPP partition*/ + if(slpp) + pPartitionFormatInfoAPI->dwProtectionType = DOCH_PARTITION_SLPP_PROTECTED; + /*No protection requested or changeable protection only requested */ + else +#endif /*FL_SLPP*/ + pPartitionFormatInfoAPI->dwProtectionType = (change_protect!=FALSE)?DOCH_PARTITION_PWD_PROTECTED:DOCH_PARTITION_NOT_PROTECTED; + + pPartitionFormatInfoAPI->dwUserAccessMode = DOCH_PART_ACCESS_MODE_FULL; + pPartitionFormatInfoAPI->dwGuestAccessMode = DOCH_PART_ACCESS_MODE_FULL; + } + + /* lock notification */ + pPartitionFormatInfoAPI->dwLockControl = (locked==TRUE) ? DOCH_LOCK_ACTIVE : DOCH_LOCK_NOT_ACTIVE; + + /*Passkey*/ +#ifndef FL_SLPP + if(read_protect || write_protect || change_protect) +#else /*FL_SLPP*/ + if(read_protect || write_protect || change_protect||slpp) +#endif /*FL_SLPP*/ + { + tffscpy(pPartitionFormatInfoAPI->bPasskey, pKey, wKeyLen); + } + + + + return flOK; +}/*tffsFormatSetProtectionAttribs*/ + +#ifdef FL_FORMAT_VOLUME +/*----------------------------------------------------------------------*/ +/* T F F S F l a s h F o r m a t */ +/* */ +/* Performs formatting of the DiskOnChip. */ +/* All existing data is destroyed. */ +/* */ +/* Note : This routine is the format routine for OSAK 5.0 and up. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* Partition number must be 0 */ +/* irFlags : */ +/* TL_NORMAL_FORMAT : Normal format */ +/* TL_LEAVE_SOME_PARTITIONS : Leave some of the previously */ +/* existing partitions */ +/* TL_DO_NOT_PERFORM_DOWNLOAD */ +/* irData : Address of FormatParams3 structure to use */ +/* (defined in format.h) */ +/* irLength : If the TL_LEAVE_SOME_PARTITIONS flag is set, */ +/* this field will indicate the number of partitions */ +/* to leave. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSflashFormat(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + FLStatus myStatus; + IOreq myIoreq; + FLSNative i=0; + FLByte partNum=0, numOfBinaryPartitions; + +#ifdef BDK_ACCESS + FLByte totalNumOfPartitions; +#endif /*BDK_ACCESS*/ + + FormatParams3 FAR1 * FP3 = (FormatParams3 FAR1 *)ioreq->irData; + BDTLPartitionFormatParams3 FAR2 * bdtlUserParams; + +#ifdef BDK_ACCESS + BinaryPartitionFormatParams3 FAR2 * binUserParams; + FLSNative numOfBinaryParToLeave = 0; +#endif /*BDK_ACCESS*/ + + FLSNative total_num_of_partitions = (FP3->noOfBinaryPartitions + FP3->noOfBDTLPartitions); + FLSNative numOfParToLeave = 0; + FLByte bOtpPresent, bIplPresent; + FLWord lastRemainingPartition, wNumOfOriginalPartitions; + + FLByte* intBuf = dochVol.intermediateBuf; + DOCH_DiskUserAttrWithBinary* pDiskUserAttrWithBinary = (DOCH_DiskUserAttrWithBinary*)intBuf; + DOCH_PartitionUserAttrWithBinary* pPartitionUserAttrWithBinary = (DOCH_PartitionUserAttrWithBinary*)intBuf; + DOCH_PartitionFormatInfoAPI* pPartitionFormatInfoAPI = (DOCH_PartitionFormatInfoAPI*)intBuf; + DOCH_Socket* pDev; + +#ifdef BDK_ACCESS + FLDword dwPartitionTotalSize; +#endif /*BDK_ACCESS*/ + + DOCH_get_socket(pDev, FL_GET_SOCKET_FROM_HANDLE(ioreq)); + if( pDev==NULL ) + return flBadParameter; + + /*If binary partitions requested and no BDK support - return error*/ +#ifndef BDK_ACCESS + if(FP3->noOfBinaryPartitions > 0) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): Binary partitions not supported when BDK_ACCESS Not Defined!\r\n"))); + return flBadParameter; + } +#endif /*BDK_ACCESS*/ + + /*Retrieve disk attributes*/ + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq); + myIoreq.irData = intBuf; + rc = flDOCHGetDiskUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHGetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection:TFFS_API_RET(rc); + } + + /* Get some data from disk attributes sector */ + numOfBinaryPartitions = pDiskUserAttrWithBinary->bNumOfBinaryPartitions; + bIplPresent = pDiskUserAttrWithBinary->bIplPresent; + bOtpPresent = pDiskUserAttrWithBinary->bOtpPresent; + +#ifdef BDK_ACCESS + totalNumOfPartitions = (FLByte)pDev->wTotalNumOfPartitions; +#endif /*BDK_ACCESS*/ + + /* check for corruption during format or wrong format */ + /* wrong signature */ + if( (tffscmp(pDiskUserAttrWithBinary->bMigrationSignature, TFFS_API_MIGRATION_SIGNATURE, + sizeof(pDiskUserAttrWithBinary->bMigrationSignature)) != 0) + /* disk attributes not match no. of partitions */ + || (pDev->wTotalNumOfPartitions<2 && bIplPresent && bOtpPresent) + /* there are enough partitions but IPL or/and OTP indication corrupted */ + || (pDev->wTotalNumOfPartitions>2 && (bIplPresent!=1 || bOtpPresent!=1)) ) + { + bIplPresent = 0; + bOtpPresent = 0; + numOfBinaryPartitions = 0; + } + +#ifdef BDK_ACCESS + /*Calculate how many binary partition to LEAVE*/ + if(ioreq->irFlags == TL_LEAVE_BINARY_AREA) + { + numOfParToLeave = numOfBinaryPartitions; + numOfBinaryParToLeave = numOfBinaryPartitions; + } + else + { + if(ioreq->irFlags == TL_LEAVE_SOME_BINARY_AREA) + { + numOfParToLeave = ioreq->irLength; + numOfBinaryParToLeave = TFFSMIN(numOfBinaryPartitions, numOfParToLeave); + } + else + { + numOfParToLeave = 0; + numOfBinaryParToLeave = 0; + } + } + + if(numOfParToLeave > totalNumOfPartitions) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): numOfParToLeave > totalNumOfPartitions \r\n "); + return flBadParameter; + } + + if((numOfBinaryParToLeave + FP3->noOfBinaryPartitions) > MAX_BINARY_PARTITIONS_PER_DRIVE) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): Number of binary partitions exceed maximum allowed.\r\n "); + return flBadParameter; + } + + if((numOfParToLeave > numOfBinaryPartitions) && (FP3->noOfBinaryPartitions > 0)) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): Can`t create Binary after BDTL.\r\n "); + return flBadParameter; + } + +#else /*BDK_ACCESS*/ + if(ioreq->irFlags == TL_LEAVE_SOME_PARTITIONS) + { + numOfParToLeave = ioreq->irLength; + } + else + { + numOfParToLeave = 0; + } +#endif /*BDK_ACCESS*/ + + /* Check that total number of partitions AFTER format does not exceed FL_VOLUMES */ + if((numOfParToLeave + FP3->noOfBinaryPartitions + FP3->noOfBDTLPartitions) > FL_VOLUMES) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): Number of partitions exceed maximum allowed.\r\n "); + return flBadParameter; + } + + /* Leaving all existing partitions is not allowed */ + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irHandle = ioreq->irHandle; + myStatus = TFFSCountVolumes(&myIoreq); + if(myStatus != flOK) + return myStatus; + if(numOfParToLeave >= (FLSNative)myIoreq.irFlags) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): Leaving all existing partitions is not allowed!!!.\r\n "); + return flBadParameter; + } + + + /*Calculate number of remaining partitions*/ + lastRemainingPartition = (numOfParToLeave + bOtpPresent + bIplPresent); + + /*Retrieve DOCH extended info structure*/ + /*-------------------------------------*/ + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + wNumOfOriginalPartitions = ((DOCH_DeviceInfo*)intBuf)->wTotalNumOfPartitions; + + /*Clear partition attributes for partitions to be deleted */ + if(lastRemainingPartition > 0) + { + tffsset(intBuf, 0, DOCH_SECTOR_SIZE); + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irData = intBuf; + for(i=lastRemainingPartition; i < wNumOfOriginalPartitions; i++) + { + myIoreq.irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq) + (i << 4); + rc = flDOCHSetParitionUserAttributes(&myIoreq); + if( rc!=DOCH_OK ) + { + return (rc==DOCH_ProtectionFault)? flHWProtection:TFFS_API_RET(rc); + } + } + } + + /*Set numOfBinaryPartitions*/ +#ifdef BDK_ACCESS + numOfBinaryPartitions = numOfBinaryParToLeave; +#else /*BDK_ACCESS*/ + numOfBinaryPartitions = 0; +#endif /*BDK_ACCESS*/ + + /*Set programmer name, programmer version and TFFS version*/ + tffsset(intBuf, 0, DOCH_SECTOR_SIZE); + pDiskUserAttrWithBinary->bNumOfBinaryPartitions = numOfBinaryPartitions; + pDiskUserAttrWithBinary->bIplPresent = bIplPresent; + pDiskUserAttrWithBinary->bOtpPresent = bOtpPresent; + tffscpy(&pDiskUserAttrWithBinary->bProgrammerName, FL_PROGRAMMER_NAME, 4); + tffscpy(&pDiskUserAttrWithBinary->bProgrammerVersion, FL_PROGRAMMER_VERSION, 4); + tffscpy(&pDiskUserAttrWithBinary->bTFFSVersion, TrueFFSVersion, 4); + tffscpy(pDiskUserAttrWithBinary->bMigrationSignature, TFFS_API_MIGRATION_SIGNATURE, + sizeof(pDiskUserAttrWithBinary->bMigrationSignature)); + /* starting DD 1.1 beta - indication on format start and format complete*/ + tffscpy(pDiskUserAttrWithBinary->bFormatStartSignature, TFFS_API_FORMAT_START_SIGNATURE, + sizeof(pDiskUserAttrWithBinary->bFormatStartSignature)); + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq); + myIoreq.irData = intBuf; + rc = flDOCHSetDiskUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHSetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection:TFFS_API_RET(rc); + } + dochVol.numOfBinaryPartitions = numOfBinaryPartitions; + + if (bOtpPresent == 0) + total_num_of_partitions++; + if (bIplPresent == 0) + total_num_of_partitions++; + + if( (wNumOfOriginalPartitions > 2) ||/* more, than IPL and OTP present */ + (bIplPresent==0 && bOtpPresent == 0 && numOfBinaryPartitions == 0) )/* or not proper format */ + { + /*Delete partitions not marked to "leave" (if such exists)*/ + tffsAPISetIoreq( &myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0,0,0xFF, + numOfParToLeave + bIplPresent + bOtpPresent); + rc = flDOCHDeletePartitions(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHDeletePartitions failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection:TFFS_API_RET(rc); + } + } + + /*Set IPL partition*/ + if(bIplPresent == 0) + { + /* add IPL partition, update it's attributes and disk attributes */ + checkStatus( tffsApiAddOtpIPL(TRUE, &myIoreq, ioreq) ); + memset (intBuf, 0xff, DOCH_SECTOR_SIZE); + for (i = 0; i < TFFS_API_8K_NORMAL_IPL_SIZE ; i++) + { + tffsAPISetIoreq( &myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), + (DOCH_IPL_MODE_8KB_WINDOW|DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT), + 0, dochVol.intermediateBuf, 1, TFFS_API_8K_NORMAL_IPL_SIZE); + if (i == 0) + myIoreq.irFlags |= DOCH_IPL_WRITE_FIRST_CHUNK; + rc = flDOCHWriteIPL(&myIoreq); + if (rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): Failed writing default IPL. status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x \n"), rc)); + TFFS_API_RET_PART_FLSTATUS(rc,flWriteFault); + } + } + dochVol.iplExists = 1; + bIplPresent = 1; + }/* IPL should be added */ + + /*Set OTP partition*/ + if(bOtpPresent == 0) + { + checkStatus( tffsApiAddOtpIPL(FALSE, &myIoreq, ioreq) ); + dochVol.otpExists = 1; + bOtpPresent = 1; + }/*OTP partition should be added */ + + partNum = bOtpPresent + bIplPresent + numOfParToLeave; + +#ifdef BDK_ACCESS + + binUserParams = FP3->binaryPartitionInfo; + + /*Perform for every binary partition*/ + /*----------------------------------*/ + for(i=0; i< FP3->noOfBinaryPartitions; i++) + { + /* Fill DOCH_PartitionFormatInfoAPI structure from FormatParams3 structure */ + /*==========================================================================*/ + tffsset(intBuf, 0, sizeof(DOCH_PartitionFormatInfoAPI)); + + /* standard migration format params */ + TFFS_API_SET_MIG_STD_PART_PRMS(pPartitionFormatInfoAPI, binUserParams->protectionType); + + /* protection features */ + checkStatus( tffsFormatSetProtectionAttribs(binUserParams->protectionType, pPartitionFormatInfoAPI, + binUserParams->protectionKey, sizeof(binUserParams->protectionKey)) ); + + + /*Partition size (must be FL_LENGTH_IN_BYTES)*/ + pPartitionFormatInfoAPI->nPartitionSize = (binUserParams->length & 0x1FF) ? + ((binUserParams->length)>>DOCH_SECTOR_SIZE_BITS)+1 : ((binUserParams->length)>>DOCH_SECTOR_SIZE_BITS); + + /*Round partition size to Unit Size*/ + pPartitionFormatInfoAPI->nPartitionSize = + (pPartitionFormatInfoAPI->nPartitionSize+dochVol.dwVirtualUnitSizeInSectors-1) & (~(dochVol.dwVirtualUnitSizeInSectors-1)); + + if( pPartitionFormatInfoAPI->nPartitionSize == 0 ) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): cannot add zero length binary partition "); + return flBadParameter; + } + + /*Add partition*/ + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0, intBuf,0,0); + rc = flDOCHAddPartition(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHAddPartition (Binary) failed with status: 0x%x "), rc)); + return TFFS_API_RET(rc); + } +#ifdef HW_PROTECTION + /*Authenticate partition*/ + if(((binUserParams->protectionType & PROTECTABLE) == PROTECTABLE) && + ((binUserParams->protectionType & (READ_PROTECTED | WRITE_PROTECTED)) != 0)) + { + checkStatus( tffsApiAuthPartition(&myIoreq, ioreq, partNum, binUserParams->protectionKey, + sizeof(binUserParams->protectionKey))); + } +#endif /*HW_PROTECTION*/ + + /*Retrieve partition info*/ + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq) + (partNum << 4), 0,0, intBuf,0,0); + rc = flDOCHPartitionInfo(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHPartitionInfo failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + dwPartitionTotalSize = ((DOCH_PartitionInfo*)intBuf)->nPartitionSize; + + /*Retrieve current attributes*/ + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + + /* Update the partition attributes and write them back to device */ + /*-------------*/ + /*Set type to binary*/ + pPartitionUserAttrWithBinary->bType = PARTITION_TYPE_BINARY; + pPartitionUserAttrWithBinary->binPartHeader.dwPartitionFlags = binUserParams->flags; + /*Set signature*/ + tffscpy( pPartitionUserAttrWithBinary->binPartHeader.subPartitions[0].bSignature, + binUserParams->sign, BDK_SIGNATURE_NAME); + /*Set length*/ + pPartitionUserAttrWithBinary->binPartHeader.subPartitions[0].dwSize = dwPartitionTotalSize; + /*Set # of sub-partitions to 1*/ + pPartitionUserAttrWithBinary->binPartHeader.bNumOfSubPartitions = 1; + /*Set DPS attribute*/ + pPartitionUserAttrWithBinary->bDPSFwd = 0; /*Not used*/ + pPartitionUserAttrWithBinary->bDPSBwd = 0; /*Not used*/ + /*Set protection attribute*/ + pPartitionUserAttrWithBinary->bChangableProtection = ((binUserParams->protectionType & CHANGEABLE_PROTECTION) == CHANGEABLE_PROTECTION); + pPartitionUserAttrWithBinary->bProtected = ((binUserParams->protectionType & PROTECTABLE) == PROTECTABLE); + /*Set attributes back to device*/ + rc = flDOCHSetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHSetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + + /* Update the disk attributes and write them back to device */ + /*-------------*/ + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0, intBuf,0,0); + rc = flDOCHGetDiskUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHGetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + pDiskUserAttrWithBinary->bNumOfBinaryPartitions = numOfBinaryPartitions + 1; + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0, intBuf,0,0); + rc = flDOCHSetDiskUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHSetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + +#ifdef HW_PROTECTION + /*Authenticate partition*/ + if((((binUserParams->protectionType & PROTECTABLE) == PROTECTABLE) && + (binUserParams->protectionType & (READ_PROTECTED | WRITE_PROTECTED)) != 0) && + (ioreq->irFlags & TL_DO_NOT_PERFORM_DOWNLOAD) == 0) + { + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&myIoreq, partNum); + myIoreq.irFlags = DOCH_ACCESS_USER_PASSWORD; + rc = flDOCHDisablePartAccess(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHDisablePartAccess failed with status: 0x%x "), rc)); + return TFFS_API_RET(rc); + } + } +#endif /*HW_PROTECTION*/ + + numOfBinaryPartitions++; + partNum++; + dochVol.numOfBinaryPartitions = numOfBinaryPartitions; + binUserParams++; + } +#endif /*BDK_ACCESS*/ + + /* fix the partition size to be zero - spend on the reminder of the disk + required for last partition */ + FP3->BDTLPartitionInfo[FP3->noOfBDTLPartitions-1].length = 0; + + /*Perform for every bdtl partition*/ + /*--------------------------------*/ + bdtlUserParams = FP3->BDTLPartitionInfo; + for(i=0; i< FP3->noOfBDTLPartitions; i++) + { + /* Fill DOCH_PartitionFormatInfoAPI structure from FormatParams3 structure */ + /*==========================================================================*/ + tffsset(intBuf, 0, sizeof(DOCH_PartitionFormatInfoAPI)); + + /* standard migration format params */ + TFFS_API_SET_MIG_STD_PART_PRMS(pPartitionFormatInfoAPI, bdtlUserParams->protectionType); + + /* protection features */ + checkStatus( tffsFormatSetProtectionAttribs(bdtlUserParams->protectionType, pPartitionFormatInfoAPI, + bdtlUserParams->protectionKey, sizeof(bdtlUserParams->protectionKey)) ); + + /*Partition size*/ + /*--------------*/ + switch(bdtlUserParams->lengthType) + { + case FL_LENGTH_IN_BYTES: + /*Convert to Sectors*/ + pPartitionFormatInfoAPI->nPartitionSize = + (bdtlUserParams->length & 0x1FF) ? + ((bdtlUserParams->length)>>DOCH_SECTOR_SIZE_BITS)+1 : ((bdtlUserParams->length)>>DOCH_SECTOR_SIZE_BITS); + break; + + case FL_LENGTH_IN_SECTORS: + /*Already in sectors*/ + pPartitionFormatInfoAPI->nPartitionSize = bdtlUserParams->length; + break; + + case FL_LENGTH_IN_UNITS: + pPartitionFormatInfoAPI->nPartitionSize = (bdtlUserParams->length << DOCH_SECTORS_IN_UNIT_BITS); + break; + + case FL_LENGTH_IN_PERCENTS: + /*Not supported*/ + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): FL_LENGTH_IN_PERCENTS Not supported\r\n "); + return flBadParameter; + + case FL_LENGTH_IN_CYLINDERS: + /*Not supported*/ + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): FL_LENGTH_IN_CYLINDERS Not supported\r\n "); + return flBadParameter; + + default: + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): Unsupported Normal area length type\r\n "); + return flBadParameter; + } + + /*Round partition size to Unit Size*/ + /*---------------------------------*/ + pPartitionFormatInfoAPI->nPartitionSize = + ((pPartitionFormatInfoAPI->nPartitionSize + + dochVol.dwVirtualUnitSizeInSectors - 1) & (~(dochVol.dwVirtualUnitSizeInSectors-1))); + + /*Fast area size*/ + /*--------------*/ + switch(bdtlUserParams->fastAreaLengthType) + { + case FL_LENGTH_IN_BYTES: + pPartitionFormatInfoAPI->nFastAreaSize = (bdtlUserParams->fastAreaLength >> DOCH_SECTOR_SIZE_BITS); + pPartitionFormatInfoAPI->dwFastAreaSizeType = DOCH_FAST_AREA_TYPE_SECTORS; + break; + + case FL_LENGTH_IN_SECTORS: + pPartitionFormatInfoAPI->nFastAreaSize = bdtlUserParams->fastAreaLength; + pPartitionFormatInfoAPI->dwFastAreaSizeType = DOCH_FAST_AREA_TYPE_SECTORS; + break; + + case FL_LENGTH_IN_UNITS: + /*Not supported*/ + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): FL_LENGTH_IN_UNITS Not supported\r\n "); + return flBadParameter; + /*break;*/ + + case FL_LENGTH_IN_PERCENTS: + /*Not supported*/ + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): FL_LENGTH_IN_PERCENTS Not supported\r\n "); + return flBadParameter; + + + case FL_LENGTH_IN_CYLINDERS: + /*Not supported*/ + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): FL_LENGTH_IN_CYLINDERS Not supported\r\n "); + return flBadParameter; + /*break;*/ + + case FL_LENGTH_ALL: + pPartitionFormatInfoAPI->nFastAreaSize = TL_ENHANCED_PERFORMANCE; + pPartitionFormatInfoAPI->dwFastAreaSizeType = DOCH_FAST_AREA_TYPE_PERCENT; + break; + + default: + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat(): Unsupported Fast area length type\r\n "); + return flBadParameter; + /*break;*/ + } + pPartitionFormatInfoAPI->wFastAreaFactor = bdtlUserParams->fastAreaVirtualFactor; + + /*Round fast area size up to Unit Size*/ + /*------------------------------------*/ + if (pPartitionFormatInfoAPI->dwFastAreaSizeType == DOCH_FAST_AREA_TYPE_SECTORS) + { + pPartitionFormatInfoAPI->nFastAreaSize = + ((pPartitionFormatInfoAPI->nFastAreaSize + + dochVol.dwVirtualUnitSizeInSectors - 1) & (~(dochVol.dwVirtualUnitSizeInSectors-1))); + } + + /*Add partition*/ + /*-------------*/ + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0, intBuf,0,0); + rc = flDOCHAddPartition(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHAddPartition (Bdtl) failed with status: 0x%x "), rc)); + return TFFS_API_RET(rc); + } + + /*Authenticate partition*/ + if(((bdtlUserParams->protectionType & PROTECTABLE) == PROTECTABLE) && + (bdtlUserParams->protectionType & (READ_PROTECTED | WRITE_PROTECTED)) != 0) + { + checkStatus( tffsApiAuthPartition(&myIoreq, ioreq, partNum, + bdtlUserParams->protectionKey, sizeof(bdtlUserParams->protectionKey)) ); + } + + + /*Retrieve current attributes*/ + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq) + (partNum << 4), 0,0, intBuf,0,0); + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + + /*Set type to BDTL*/ + pPartitionUserAttrWithBinary->bType = PARTITION_TYPE_BDTL; + /*Set DPS attribute*/ + pPartitionUserAttrWithBinary->bDPSFwd = 0; /*Not used*/ + pPartitionUserAttrWithBinary->bDPSBwd = 0; /*Not used*/ + /*Set protection attribute*/ + pPartitionUserAttrWithBinary->bChangableProtection = ((bdtlUserParams->protectionType & CHANGEABLE_PROTECTION) == CHANGEABLE_PROTECTION); + pPartitionUserAttrWithBinary->bProtected = ((bdtlUserParams->protectionType & PROTECTABLE) == PROTECTABLE); + /*Set attributes back to device*/ + rc = flDOCHSetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHSetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + +#ifdef FL_SOTP + if (bdtlUserParams->protectionType & FORMAT_SEQUENTIAL_OTP/*pPartitionFormatInfoAPI->bSOTP*/) + { + /*lock SOTP partition*/ + + pPartitionFormatInfoAPI->bSOTP =TRUE; + pPartitionFormatInfoAPI->dwOtpEnabled =TRUE; + + + myIoreq.irHandle = ((FL_GET_SOCKET_FROM_HANDLE(ioreq))|((partNum)<<4)); + rc = flDOCHSetParitionProtection(tffsAPISetIoreq(&myIoreq, myIoreq.irHandle,(DOCH_LOCK_AS_OTP|DOCH_SEQUENTIAL_OTP),0,pPartitionFormatInfoAPI,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSflashFormat()(): flDOCHSetParitionProtection Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc) ; + } + + } +#endif /*FL_SOTP*/ + + /*Authenticate partition*/ + if (((bdtlUserParams->protectionType & PROTECTABLE) == PROTECTABLE) && + ((ioreq->irFlags & TL_DO_NOT_PERFORM_DOWNLOAD) == 0)) + { + tffsset(&myIoreq, 0, sizeof(myIoreq)); + myIoreq.irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&myIoreq, partNum); + myIoreq.irFlags = DOCH_ACCESS_USER_PASSWORD; + rc = flDOCHDisablePartAccess(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHDisablePartAccess failed with status: 0x%x "), rc)); + return TFFS_API_RET(rc); + } + } + partNum++; + bdtlUserParams++; + } + + /* starting DD 1.1 beta - add format complete indication*/ + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0, intBuf, 0,0); + rc = flDOCHGetDiskUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHGetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection : TFFS_API_RET(rc); + } + tffscpy(pDiskUserAttrWithBinary->bFormatCompleteSignature, TFFS_API_FORMAT_COMPLETE_SIGNATURE, + sizeof(pDiskUserAttrWithBinary->bFormatCompleteSignature)); + rc = flDOCHSetDiskUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSflashFormat(): flDOCHSetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection : TFFS_API_RET(rc); + } + return flOK; +}/* TFFSFlashFormat() */ + + +/*----------------------------------------------------------------------*/ +/* T F F S U n f o r m a t */ +/* */ +/* Erase the entire media returning the DiskOnChip to it's virgin state */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0, 1, ...) */ +/* Partition number must be 0 */ +/* irPath : Pointer to progress call back routine, or NULL */ +/* irFlags : reserved ( 0 ) */ +/* irData : reserved (NULL) */ +/* irLength : reserved ( 0 ) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSUnFormat(IOreq* ioreq) +{ + FLStatus status; + DOCH_Error rc; + IOreq myIoreq; + FLExtendedDiskInfo extInfo; + FLByte i; + + tffsset(&myIoreq, 0, sizeof(myIoreq)); + + /*Retrieve # of partitions*/ + myIoreq.irHandle = (ioreq->irHandle & 0xF); + myIoreq.irCount = FL_EXT_INFO_NO_SPEC_PART; + myIoreq.irFlags = FL_BDK_PARTITION; + myIoreq.irData = &extInfo; + status = TFFSGetExtendedDiskInfo(&myIoreq); + /* if GetExtendedDiskInfo fails (bad format) force deletion of partitions + do not return status*/ + if (status ==flOK) + { + /*Check that all partitions are not actively protected + If so - return flHWProtection*/ + for(i = 0; iirHandle, 0,0, dochVol.intermediateBuf,0,0); + rc = flDOCHPartitionInfo(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSEraseBD(): flDOCHPartitionInfo failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + numOfSectors = ((DOCH_PartitionInfo*)dochVol.intermediateBuf)->nPartitionSize; + + /* check protection */ + tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0, NULL,0,0); + status = TFFSIdentifyProtection(&myIoreq); + if(status != flOK && status != flNotProtected) + return status; + if((myIoreq.irFlags & (WRITE_PROTECTED)) && ((myIoreq.irFlags & KEY_INSERTED)==0)) + return flHWProtection; + + /*Erase the entire partition*/ + /*--------------------------*/ + + tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0,NULL,0,numOfSectors); + rc = flDOCHWipeSectors(&myIoreq); + + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSEraseBD(): flDOCHErasePartition failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, TFFS_API_RET(rc)); + } + return flOK; +}/*TFFSEraseBD()*/ +#endif /*FL_FORMAT_VOLUME*/ +#endif /*FL_READ_ONLY*/ + +#ifdef FL_ABS_READ_WRITE +/*----------------------------------------------------------------------*/ +/* f l A b s R e a d */ +/* */ +/* Reads absolute sectors by sector no. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Address of user buffer to read into */ +/* irSectorNo : First sector no. to read (sector 0 is the */ +/* DOS boot sector). */ +/* irSectorCount : Number of consecutive sectors to read */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually read */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSAbsRead(IOreq* ioreq, FLSDword * pIrCount) +{ + DOCH_Error rc; + FLSDword dwsOrigIrCount=ioreq->irCount; + + /*Read required sectors*/ + /*---------------------*/ +#ifdef FL_DMA_CONFIG + if( (((FLDword)ioreq->irData & 3) == 0) && (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN) ) + { + ioreq->irFlags |= DOCH_USE_DMA; + } +#endif /* FL_DMA_CONFIG */ +#ifdef FL_USE_BURST_MODE_READ + if((((FLDword)ioreq->irData & 3) == 0) && (tffs_burst_enabled == TRUE)) /* andrayk Nov 01 2007: enabling burst at runtime */ + { + ioreq->irFlags |= DOCH_USE_BURST; + } +#endif /* FL_USE_BURST_MODE_READ */ + + rc = flDOCHReadPartitionSectors(ioreq); + if(rc != DOCH_OK) + { + (*pIrCount) = dwsOrigIrCount - ioreq->irCount; /*update number of sectors which is read */ + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSAbsRead(): flDOCHReadPartitionSectors failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flReadFault); + } + + (*pIrCount) = dwsOrigIrCount; + return flOK; +}/*TFFSAbsRead()*/ + + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSAbsAddress*/ +/* Description : dummy function */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSAbsAddress(IOreq* ioreq) +{ + return flFeatureNotSupported; +}/*TFFSAbsAddress()*/ + + +#ifndef FL_READ_ONLY +/*----------------------------------------------------------------------*/ +/* f l A b s W r i t e */ +/* */ +/* Writes absolute sectors by sector no. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Address of user buffer to write from */ +/* irSectorNo : First sector no. to write */ +/* irSectorCount : Number of consecutive sectors to write */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually written */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSAbsWrite(IOreq* ioreq) +{ + DOCH_Error rc; + FLSDword dwOrigIrCount = ioreq->irCount; + + /*Write required sectors*/ +#ifdef FL_USE_DMA_ON_WRITE /* should be changed to FL_DMA_CONFIG */ + if( (((FLDword)ioreq->irData & 3) == 0) && (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN) ) + ioreq->irFlags |= DOCH_USE_DMA; +#endif /*FL_USE_DMA_ON_WRITE*/ + rc = flDOCHWritePartitionSectors(ioreq); + if(rc != DOCH_OK) + { + ioreq->irCount = dwOrigIrCount - ioreq->irCount; /*update number of sectors which is written */ + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSAbsWrite(): flDOCHWritePartitionSectors failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + + ioreq->irCount = dwOrigIrCount; + return flOK; +}/*TFFSAbsWrite()*/ + +/*----------------------------------------------------------------------*/ +/* f l A b s D e l e t e */ +/* */ +/* Marks absolute sectors by sector no. as deleted. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irSectorNo : First sector no. to delete */ +/* irSectorCount : Number of consecutive sectors to delete */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually deleted */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSAbsDelete(IOreq* ioreq) +{ + /* FreeSectors does not perform any operation in mDoc H3 + therefore this call is removed*/ +#ifdef FL_SUPPORT_FREE_SECTORS + DOCH_Error rc; + + /*Free required sectors*/ + /*---------------------*/ + rc = flDOCHFreeSectors(ioreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSAbsDelete(): flDOCHFreeSectors failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, TFFS_API_RET(rc)); + } +#endif /*FL_SUPPORT_FREE_SECTORS*/ + return flOK; +}/*TFFSAbsDelete*/ + +/*----------------------------------------------------------------------*/ +/* f l A b s S e c u r e D e l e t e */ +/* */ +/* Marks absolute sectors by sector no. as deleted making sure no */ +/* previous copy exists. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irSectorNo : First sector no. to delete */ +/* irSectorCount : Number of consecutive sectors to delete */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irSectorCount : Number of sectors actually deleted */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSAbsSecureDelete(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + FLDword numOfSectors; + FLStatus status; + + /* check parameters before initialize wipe operations */ + /*----------------------------------------------------*/ + tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0, dochVol.intermediateBuf,0,0); + rc = flDOCHPartitionInfo(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSEraseBD(): flDOCHPartitionInfo failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc); + } + numOfSectors = ((DOCH_PartitionInfo*)dochVol.intermediateBuf)->nPartitionSize; + + /* check partition limits */ + if ((FLDword)(ioreq->irSectorNo+ioreq->irSectorCount)>numOfSectors) + { + return flBadParameter; + } + + /* check protection */ + tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0, NULL,0,0); + status = TFFSIdentifyProtection(&myIoreq); + if(status != flOK && status != flNotProtected) + return status; + if((myIoreq.irFlags & (WRITE_PROTECTED)) && ((myIoreq.irFlags & KEY_INSERTED)==0)) + return flHWProtection; + + tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0,NULL,ioreq->irSectorNo,ioreq->irSectorCount); + rc = flDOCHWipeSectors(&myIoreq); + + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSAbsSecureDelete(): flDOCHEraseSectors failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, TFFS_API_RET(rc)); + } + return flOK; +}/*TFFSAbsSecureDelete()*/ + +#endif /*FL_READ_ONLY*/ +#endif /*FL_ABS_READ_WRITE*/ + +/*----------------------------------------------------------------------*/ +/* f l G e t P h y s i c a l I n f o */ +/* */ +/* Get physical information of the media. The information includes */ +/* JEDEC ID, unit size and media size. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0,1,..) */ +/* irData : Address of user buffer to read physical */ +/* information into. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irLength : Window base address. note mast be cast to */ +/* unsigned. */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSGetPhysicalInfo(IOreq* ioreq) +{ + IOreq myIoreq; + DOCH_Error rc = DOCH_OK; + PhysicalInfo FAR1 * physicalInfo = (PhysicalInfo FAR1 *)ioreq->irData; + + /*Retrieve extended disk info*/ + /*---------------------------*/ + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + + /*Fill PhysicalInfo structure*/ + /*---------------------------*/ + physicalInfo->type = 0;/*docDeviceInfo.wFlashType;*/ + physicalInfo->mediaType = FL_H3; + physicalInfo->dwUnitSize = dochVol.dwVirtualUnitSizeInSectors; + physicalInfo->dwMediaSize = ((DOCH_DeviceInfo*)dochVol.intermediateBuf)->dwUnformattedCapacity; + physicalInfo->dwChipSize = physicalInfo->dwMediaSize; + physicalInfo->interleaving = 0; + + /* Return window base reg */ + /*------------------------*/ + tffsAPISetIoreq( &myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq),0,0,0,0,0); + rc=flDOCHGetPhysicalAddress(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSGetPhysicalInfo(): DOCHGetPhysicalAddress failed with status: 0x%x "), rc)); + return (DOCH_DiskNotFound==rc) ? flAdapterNotFound : TFFS_API_RET(rc); + } + ioreq->irLength = myIoreq.irCount; + return flOK; +}/*TFFSGetPhysicalInfo()*/ + + + +#ifdef BDK_ACCESS + + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSbdkReadInit*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSbdkReadInit(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + FLByte subPart; + IOreq myIoreq; + BDKStruct* bdkStrct = (BDKStruct*)(ioreq->irData); + DOCH_PartitionUserAttrWithBinary* pPartitionUserAttrWithBinary = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf; + + /* retrieve device information */ + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + + /*Retrieve current atttributes*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkReadInit(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + for(subPart=0; + subPart < pPartitionUserAttrWithBinary->binPartHeader.bNumOfSubPartitions; + subPart++) + { + if (tffscmp(pPartitionUserAttrWithBinary->binPartHeader.subPartitions[subPart].bSignature, + bdkStrct->oldSign, BDK_SIGNATURE_NAME) == 0) + break; + } + if(subPart >= pPartitionUserAttrWithBinary->binPartHeader.bNumOfSubPartitions) + { /*If oldSign was not found on the partition - return error*/ + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkReadInit(): findSubPartBySignature failed with status: 0x%x "), rc)); + return flPartitionNotFound; + } + if( ((bdkStrct->length >>DOCH_SECTOR_SIZE_BITS) + (bdkStrct->startingBlock * dochVol.dwVirtualUnitSizeInSectors)) > + pPartitionUserAttrWithBinary->binPartHeader.subPartitions[subPart].dwSize ) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkReadInit(): recieved length exceeds partition size.\r\n"); + return flBadParameter; + } + /*Save operation init values for actual read operation*/ + dochVol.bdkInitValues.dwStartReadSector = bdkStrct->startingBlock * dochVol.dwVirtualUnitSizeInSectors + + pPartitionUserAttrWithBinary->binPartHeader.subPartitions[subPart].dwOffset; + dochVol.bdkInitValues.dwCurrentReadByte = 0; + dochVol.bdkInitValues.dwReadLength = bdkStrct->length; + return flOK; +}/*TFFSbdkReadInit()*/ + + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSbdkReadBlock*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSbdkReadBlock(IOreq* ioreq) +{ +#ifndef FL_ABS_READ_WRITE + return flFeatureNotSupported; +#else /*FL_ABS_READ_WRITE*/ + DOCH_Error dochErr = DOCH_FeatureNotSupported; + IOreq myIoreq; + BDKStruct* bdkStrct = (BDKStruct*)(ioreq->irData); + FLByte* buf = bdkStrct->bdkBuffer; + FLDword byteOffsetInSector = (dochVol.bdkInitValues.dwCurrentReadByte % DOCH_SECTOR_SIZE); + FLDword currentSector = dochVol.bdkInitValues.dwStartReadSector + + (dochVol.bdkInitValues.dwCurrentReadByte >> DOCH_SECTOR_SIZE_BITS); + FLDword fullSectorsToRead, bytesToPad; + FLWord wBytesToCopy; + + if (byteOffsetInSector != 0) + { + wBytesToCopy = (FLWord)TFFSMIN(DOCH_SECTOR_SIZE - byteOffsetInSector, bdkStrct->length); + fullSectorsToRead = (bdkStrct->length - wBytesToCopy)>>DOCH_SECTOR_SIZE_BITS; + bytesToPad = bdkStrct->length - wBytesToCopy - (fullSectorsToRead << DOCH_SECTOR_SIZE_BITS); + } + else + { + fullSectorsToRead = bdkStrct->length >>DOCH_SECTOR_SIZE_BITS; + bytesToPad = bdkStrct->length - (fullSectorsToRead << DOCH_SECTOR_SIZE_BITS); + } + + if (dochVol.bdkInitValues.dwCurrentReadByte + bdkStrct->length > dochVol.bdkInitValues.dwReadLength) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkReadBlock(): Attempted reading out of readInit aread.\r\n"); + return flBadParameter; + } + /*Read NOT from start of sector*/ + if(byteOffsetInSector != 0) + { + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,currentSector,1); + dochErr = flDOCHReadPartitionSectors(&myIoreq); + if(dochErr != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkReadBlock(): TFFSAbsRead failed with status: 0x%x "), dochErr)); + TFFS_API_RET_PART_FLSTATUS(dochErr, flReadFault); + } + wBytesToCopy = (FLWord)TFFSMIN(DOCH_SECTOR_SIZE - byteOffsetInSector, bdkStrct->length); + tffscpy(buf, &dochVol.intermediateBuf[byteOffsetInSector], wBytesToCopy); + dochVol.bdkInitValues.dwCurrentReadByte += wBytesToCopy; + byteOffsetInSector = (byteOffsetInSector + wBytesToCopy)% DOCH_SECTOR_SIZE; + buf += wBytesToCopy; + if ((byteOffsetInSector % DOCH_SECTOR_SIZE) == 0) + currentSector++; + } + + /*Read requested sectors, use init values from TFFSbdkReadInit*/ + if(fullSectorsToRead > 0) + { + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,buf,currentSector,fullSectorsToRead); +#ifdef FL_DMA_CONFIG + if( (((FLDword)myIoreq.irData & 3) == 0) && (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN) ) + { + myIoreq.irFlags |= DOCH_USE_DMA; + } +#endif /* FL_DMA_CONFIG */ +#ifdef FL_USE_BURST_MODE_READ + if( ((FLDword)myIoreq.irData & 3) == 0) + { + myIoreq.irFlags |= DOCH_USE_BURST; + } +#endif /* FL_USE_BURST_MODE_READ */ + dochErr = flDOCHReadPartitionSectors(&myIoreq); + if(dochErr != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkReadBlock(): TFFSAbsRead failed with status: 0x%x "), dochErr)); + TFFS_API_RET_PART_FLSTATUS(dochErr, flReadFault); + } + buf += (fullSectorsToRead<irHandle,0,0,dochVol.intermediateBuf,currentSector,1); + dochErr = flDOCHReadPartitionSectors(&myIoreq); + if(dochErr != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkReadBlock(): TFFSAbsRead failed with status: 0x%x "), dochErr)); + TFFS_API_RET_PART_FLSTATUS(dochErr, flReadFault); + } + tffscpy(buf, dochVol.intermediateBuf, bytesToPad); + dochVol.bdkInitValues.dwCurrentReadByte += bytesToPad; + } + + if(dochErr != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkReadBlock(): TFFSAbsRead failed with status: 0x%x "), dochErr)); + TFFS_API_RET_PART_FLSTATUS(dochErr, flReadFault); + } + return flOK; +#endif /*FL_ABS_READ_WRITE*/ +}/*TFFSbdkReadBlock()*/ + +#ifndef FL_READ_ONLY +/*----------------------------------------------------------------------*/ +/* Function name : TFFSbdkWriteInit*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSbdkWriteInit(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq myIoreq; + FLByte subPart; + BDKStruct* bdkStrct = (BDKStruct*)(ioreq->irData); + DOCH_PartitionUserAttrWithBinary* attrSectorPtr = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf;; + + /* retrieve the unit size and other information */ + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + + /*Retrieve current atttributes*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkReadInit(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + for(subPart=0; + subPart < attrSectorPtr->binPartHeader.bNumOfSubPartitions; + subPart++) + { + if (tffscmp(attrSectorPtr->binPartHeader.subPartitions[subPart].bSignature, + bdkStrct->oldSign, BDK_SIGNATURE_NAME) == 0) + break; + } + if(subPart >= attrSectorPtr->binPartHeader.bNumOfSubPartitions) + { /*If oldSign was not found on the partition - return error*/ + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkReadInit(): findSubPartBySignature failed with status: 0x%x "), rc)); + return flPartitionNotFound; + } + + if( ((bdkStrct->length >>DOCH_SECTOR_SIZE_BITS) + (bdkStrct->startingBlock * dochVol.dwVirtualUnitSizeInSectors)) > + attrSectorPtr->binPartHeader.subPartitions[subPart].dwSize ) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkWriteInit(): requested size exceeds subpartition size"); + return flBadParameter; + } + + /*Save operation init values for actual write operation*/ + dochVol.bdkInitValues.dwStartWriteSector = bdkStrct->startingBlock * dochVol.dwVirtualUnitSizeInSectors + + attrSectorPtr->binPartHeader.subPartitions[subPart].dwOffset; + dochVol.bdkInitValues.dwCurrentWriteByte = 0; + dochVol.bdkInitValues.dwWriteLength = bdkStrct->length; + dochVol.bdkInitValues.bWriteSubPartitionNum = subPart; + return flOK; +}/*TFFSbdkWriteInit()*/ + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSbdkWriteBlock*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSbdkWriteBlock(IOreq* ioreq) +{ +#ifndef FL_ABS_READ_WRITE + return flFeatureNotSupported; +#else /*FL_ABS_READ_WRITE*/ + DOCH_Error rc = DOCH_OK; + IOreq myIoreq; + BDKStruct* bdkStrct = (BDKStruct*)(ioreq->irData); + DOCH_PartitionUserAttrWithBinary* attrSectorPtr; + FLByte* userBuf; + FLWord wBytesToCopy, wBytesToPad; + FLDword currentSector, byteOffsetInSector; + FLDword fullSectorsToWrite; + FLDword dwUsedSize; + + byteOffsetInSector = (dochVol.bdkInitValues.dwCurrentWriteByte % DOCH_SECTOR_SIZE); + currentSector = dochVol.bdkInitValues.dwStartWriteSector + + (dochVol.bdkInitValues.dwCurrentWriteByte >> DOCH_SECTOR_SIZE_BITS); + wBytesToCopy = (FLWord)TFFSMIN(DOCH_SECTOR_SIZE - byteOffsetInSector, bdkStrct->length); + userBuf = bdkStrct->bdkBuffer; + if (byteOffsetInSector) + { + fullSectorsToWrite = (bdkStrct->length - wBytesToCopy)>>DOCH_SECTOR_SIZE_BITS; + wBytesToPad = (FLWord)(bdkStrct->length - wBytesToCopy - (fullSectorsToWrite << DOCH_SECTOR_SIZE_BITS)); + } + else + { + fullSectorsToWrite = bdkStrct->length >>DOCH_SECTOR_SIZE_BITS; + wBytesToPad = (FLWord)(bdkStrct->length - (fullSectorsToWrite << DOCH_SECTOR_SIZE_BITS)); + } + + + /*If first sector is NOT aligned: + - Read it + - Copy contiguous data + - Write sector + ==============*/ + if(byteOffsetInSector != 0) + { + /*Read*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,currentSector,1); +#ifdef FL_USE_BURST_MODE_READ + /* TODO - update myIoreq.irFlags */ +#endif /*FL_USE_BURST_MODE_READ*/ + rc = flDOCHReadPartitionSectors(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkWriteBlock(): Reading sector for padding failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + + /*Copy*/ + wBytesToCopy = (FLWord)TFFSMIN(DOCH_SECTOR_SIZE - byteOffsetInSector, bdkStrct->length); + tffscpy(dochVol.intermediateBuf + byteOffsetInSector, userBuf, wBytesToCopy); + + /*Write*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,currentSector,1); + rc = flDOCHWritePartitionSectors(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkWriteBlock(): Writing sector after padding failed with status: 0x%x \r\n"), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + userBuf += wBytesToCopy; + dochVol.bdkInitValues.dwCurrentWriteByte += wBytesToCopy; + + byteOffsetInSector = (byteOffsetInSector + wBytesToCopy)% DOCH_SECTOR_SIZE; + if (byteOffsetInSector == 0) + currentSector++; + + } + + /*Write requested sectors, use init values from TFFSbdkWriteInit*/ + if(fullSectorsToWrite > 0) + { + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,userBuf,currentSector,fullSectorsToWrite); +#ifdef FL_USE_DMA_ON_WRITE /*should be changed to #ifdef FL_DMA_CONFIG*/ + if( (((FLDword)userBuf & 3) == 0) && (gIsDMAEnabled == DOCH_GLOBAL_BOOL_PATTERN) ) + { + myIoreq.irFlags |= DOCH_USE_DMA; + } +#endif /*FL_USE_DMA_ON_WRITE*/ + rc = flDOCHWritePartitionSectors(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkWriteBlock(): Writing contiguous sectors failed with status:0x%x \r\n"), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + + userBuf += (fullSectorsToWrite<irHandle,0,0,dochVol.intermediateBuf,currentSector,1); + rc = flDOCHReadPartitionSectors(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkWriteBlock(): Reading sector for padding failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + + /*Copy*/ + tffscpy(dochVol.intermediateBuf, userBuf, wBytesToPad); + + /*Write*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,currentSector,1); + rc = flDOCHWritePartitionSectors(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkWriteBlock(): Writing sector after padding failed with status: 0x%x \r\n"), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + userBuf += wBytesToPad; + dochVol.bdkInitValues.dwCurrentWriteByte += wBytesToPad; + byteOffsetInSector = (byteOffsetInSector + wBytesToPad)% DOCH_SECTOR_SIZE; + if (byteOffsetInSector == 0) + currentSector++; + } + + /*write operation was successful, update usesize*/ + /*Retrieve current attributes*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkWriteBlock(): Getting partition attributes failed with status: 0x%x \r\n"), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + attrSectorPtr = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf; + dwUsedSize = attrSectorPtr->binPartHeader.subPartitions[dochVol.bdkInitValues.bWriteSubPartitionNum].dwUsedSize; + if ((dwUsedSize << DOCH_SECTOR_SIZE_BITS) < (FLDword)(dochVol.bdkInitValues.dwCurrentWriteByte)) + { + dwUsedSize = attrSectorPtr->binPartHeader.subPartitions[dochVol.bdkInitValues.bWriteSubPartitionNum].dwUsedSize; + dwUsedSize += fullSectorsToWrite + (wBytesToPad ? 1:0); + attrSectorPtr->binPartHeader.subPartitions[dochVol.bdkInitValues.bWriteSubPartitionNum].dwUsedSize = dwUsedSize; + + rc = flDOCHSetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkWriteBlock(): Getting partition attributes failed with status: 0x%x \r\n"), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + } + return flOK; +#endif /*FL_ABS_READ_WRITE*/ +}/*TFFSbdkWriteBlock()*/ + + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSbdkErase*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSbdkErase(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq myIoreq; + BDKStruct* bdkStrct = (BDKStruct*)(ioreq->irData); + FLSNative binPartNum = FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq); + FLSNative unitsToDelete = bdkStrct->length;/*((bdkStrct->length / BDK_UNIT_SIZE) + 1);*/ + FLDword lastDeletedSector, dwSubPartOffset; + DOCH_PartitionUserAttrWithBinary* attrSectorPtr; + FLByte bSubPart; + + /*get unit size etc*/ + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + + /*Retrieve current atttributes*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkErase(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + attrSectorPtr = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf; + for(bSubPart=0; + bSubPart < attrSectorPtr->binPartHeader.bNumOfSubPartitions; + bSubPart++) + { + if (tffscmp(attrSectorPtr->binPartHeader.subPartitions[bSubPart].bSignature, + bdkStrct->oldSign, BDK_SIGNATURE_NAME) == 0) + break; + } + if(bSubPart >= attrSectorPtr->binPartHeader.bNumOfSubPartitions) + { /*If oldSign was not found on the partition - return error*/ + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkErase(): findSubPartBySignature failed with status: 0x%x "), rc)); + return flPartitionNotFound; + } + + if (((bdkStrct->startingBlock + unitsToDelete) * dochVol.dwVirtualUnitSize) > + (attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwSize << DOCH_SECTOR_SIZE_BITS)) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkErase(): Erase requested for more than partition size. "); + return flNoSpaceInVolume; + } + + /* save the offset */ + dwSubPartOffset = attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwOffset; + /* update used size */ + lastDeletedSector = ((bdkStrct->startingBlock + unitsToDelete) * dochVol.dwVirtualUnitSizeInSectors); + if(lastDeletedSector >= attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwUsedSize ) + { /*Update used size only if exceeds current used size*/ + attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwUsedSize = + (bdkStrct->startingBlock + dochVol.dwVirtualUnitSizeInSectors - 1) & (~(dochVol.dwVirtualUnitSizeInSectors - 1)); + + /*Set modified atttributes*/ + tffsAPISetIoreq( &myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq) + (binPartNum << 4),0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHSetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkErase(): flDOCHSetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + } + + + tffsset(&myIoreq,0,sizeof(IOreq)); + myIoreq.irHandle =ioreq->irHandle; + myIoreq.irSectorNo = (FLDword)(bdkStrct->startingBlock * dochVol.dwVirtualUnitSizeInSectors) + dwSubPartOffset; + myIoreq.irSectorCount =(FLDword)dochVol.dwVirtualUnitSizeInSectors; + rc = flDOCHWipeSectors(&myIoreq); + + + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkErase(): flDOCHWipeSectors failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, TFFS_API_RET(rc)); + } + + return flOK; +}/*TFFSbdkErase()*/ + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSbdkCreate*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSbdkCreate(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq myIoreq; + FLByte bSubPart; + DOCH_PartitionUserAttrWithBinary* attrSectorPtr; + BDKStruct* bdkStrct = (BDKStruct*)(ioreq->irData); + FLDword reqLength; + FLByte newSPIndex; + + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + + /*Retrieve current atttributes*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkCreate(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + attrSectorPtr = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf; + /*Check that this is actually a binary partition*/ + if(attrSectorPtr->bType != PARTITION_TYPE_BINARY) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkCreate(): Partition is NOT Binary \r\n"); + return flBadParameter; + } + + for(bSubPart=0; + bSubPart < attrSectorPtr->binPartHeader.bNumOfSubPartitions; + bSubPart++) + { + if (tffscmp(attrSectorPtr->binPartHeader.subPartitions[bSubPart].bSignature, + bdkStrct->oldSign, BDK_SIGNATURE_NAME) == 0) + break; + } + if(bSubPart >= attrSectorPtr->binPartHeader.bNumOfSubPartitions) + { /*If oldSign was not found on the partition - return error*/ + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkCreate(): findSubPartBySignature failed with status:0x%x "), rc)); + return flPartitionNotFound; + } + + /*If new SP size equals in size - simply replace signature and return*/ + reqLength = bdkStrct->length * dochVol.dwVirtualUnitSizeInSectors; + if( reqLength == 0 ) + { + DBG_PRINT_WRN(FLZONE_API, "TFFSbdkCreate(): zero size subpartition requested "); + return flNoSpaceInVolume;/*strange errors up to legacy devices*/ + } + + /* size match exactly -> replace signature */ + if(reqLength == attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwSize) + { + tffscpy(attrSectorPtr->binPartHeader.subPartitions[bSubPart].bSignature, + bdkStrct->newSign, BDK_SIGNATURE_NAME); + } + else + { + /*Check that there is enough space in the current SP*/ + /*Check that max number of SP was not exceeded*/ + if(reqLength > (attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwSize << DOCH_SECTOR_SIZE_BITS)) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkCreate(): No Space In Volume \r\n"); + return flNoSpaceInVolume; + } + else + { + if(attrSectorPtr->binPartHeader.bNumOfSubPartitions >= (SUB_PARTITIONS_PER_BINARY-1)) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkCreate(): Too Many Binary Partitions \r\n"); + return flTooManyBinaryPartitions; + } + } + /*Assign new SP number*/ + newSPIndex = attrSectorPtr->binPartHeader.bNumOfSubPartitions; + + /*Set current and new SP atttributes*/ + attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwSize -= reqLength; + /*Set new SP atttributes*/ + attrSectorPtr->binPartHeader.subPartitions[newSPIndex].dwOffset = + attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwOffset + + attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwSize; + attrSectorPtr->binPartHeader.subPartitions[newSPIndex].dwSize = reqLength; + + tffscpy(attrSectorPtr->binPartHeader.subPartitions[newSPIndex].bSignature, + bdkStrct->newSign, + BDK_SIGNATURE_NAME); + /*Increment number of SP by 1*/ + attrSectorPtr->binPartHeader.bNumOfSubPartitions++; + } + + /*Set modified atttributes*/ + tffsAPISetIoreq( &myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHSetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkCreate(): flDOCHSetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + return flOK; +}/*TFFSbdkCreate()*/ + + +#endif /*FL_READ_ONLY*/ + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSbdkPartitionInfo*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSbdkPartitionInfo(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_OK; + IOreq myIoreq; + DOCH_PartitionUserAttrWithBinary* attrSectorPtr; + BDKStruct* bdkStrct = (BDKStruct*)(ioreq->irData); + FLDword dwPartititonSize, dwUsedUnits; + /*If oldSign was not found on the partition - return error*/ + FLByte bSubPart; + + TFFS_API_GET_UNIT_SIZE(myIoreq, ioreq, rc, flStatus); + + if( FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq) >= (dochVol.numOfBinaryPartitions+dochVol.otpExists+dochVol.iplExists) ) + { + return flBadDriveHandle; + } + + bdkStrct->flags = dochVol.numOfBinaryPartitions; /*total number of BDK on the media*/ + + tffsAPISetIoreq( &myIoreq, ioreq->irHandle, 0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHPartitionInfo(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkPartitionInfo(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + dwPartititonSize = ((DOCH_PartitionInfo*)dochVol.intermediateBuf)->nPartitionSize << DOCH_SECTOR_SIZE_BITS; + + /*Retrieve current atttributes*/ + tffsAPISetIoreq( &myIoreq, ioreq->irHandle, 0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHGetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSbdkPartitionInfo(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + attrSectorPtr = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf; + /*Check that this is actually a binary partition*/ + if(attrSectorPtr->bType != PARTITION_TYPE_BINARY) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkPartitionInfo(): Partition is NOT Binary \r\n"); + return flBadParameter; + } + + for(bSubPart=0; + bSubPart < attrSectorPtr->binPartHeader.bNumOfSubPartitions; + bSubPart++) + { + if (tffscmp(attrSectorPtr->binPartHeader.subPartitions[bSubPart].bSignature, + bdkStrct->oldSign, BDK_SIGNATURE_NAME) == 0) + break; + } + if(bSubPart >= attrSectorPtr->binPartHeader.bNumOfSubPartitions) + { /*If oldSign was not found on the partition - return error*/ + DBG_PRINT_ERR(FLZONE_API, "TFFSbdkPartitionInfo(): Sub partition not found."); + return flNoSpaceInVolume ; /* for compatibility with legacy devices */ + } + + /*Returned values*/ + dwUsedUnits = ((attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwUsedSize + dochVol.dwVirtualUnitSizeInSectors - 1)/ dochVol.dwVirtualUnitSizeInSectors); + bdkStrct->length = dwUsedUnits * dochVol.dwVirtualUnitSize; + if(bdkStrct->length == 0) /*Used size must be at least 1 unit*/ + bdkStrct->length = dochVol.dwVirtualUnitSizeInSectors << DOCH_SECTOR_SIZE_BITS; + + bdkStrct->startingBlock = attrSectorPtr->binPartHeader.subPartitions[bSubPart].dwSize << DOCH_SECTOR_SIZE_BITS; + ioreq->irLength = dwPartititonSize; + + return flOK; +}/*TFFSbdkPartitionInfo()*/ +#endif /*BDK_ACCESS*/ + +/*----------------------------------------------------------------------*/ +/* f l I n s e r t P r o t e c t i o n K e y */ +/* b d k I n s e r t P r o t e c t i o n K e y */ +/* */ +/* Insert the protection key in order to remove the protection of the */ +/* partition specified by the drive handle */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based), doch count */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : pointer to an 8 bytes key array */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSInsertProtectionKey(IOreq* ioreq) +{ + IOreq myIoreq; + FLByte bPartNum; + FLStatus flStatus; + + /* Format DOCH_PartitionAcessPassword structure */ + /* Note that legacy devices has only 8 bytes passkey */ + /*-----------------------------------------------*/ + bPartNum = FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq); + flStatus = tffsApiAuthPartition(&myIoreq, ioreq, bPartNum, (FLByte *)ioreq->irData, PROTECTION_KEY_LENGTH ); + if( flStatus == flNotProtected ) + flStatus = flOK; + + return flStatus; +}/*TFFSInsertProtectionKey()*/ + +#ifdef BDK_ACCESS + +#endif /* BDK_ACCESS */ + +#ifdef HW_OTP +/*----------------------------------------------------------------------*/ +/* f l O T P S i z e */ +/* */ +/* Get the OTP size and state */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* bits 3-0 - Socket # (zero based) */ +/* irLength : The size of the used OTP area in bytes */ +/* irCount : The size of the OTP area in bytes */ +/* irFlags : LOCKED_OTP for a locked area otherwise unlocked */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSOTPSize(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + + /*Get partition (OTP) info*/ + /*----------------------*/ + tffsAPISetIoreq( &myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq) + (TFFS_API_OTP_PARTITION_NUM << 4), + 0,0,dochVol.intermediateBuf,0,0); + rc = flDOCHPartitionInfo(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSOTPSize(): flDOCHPartitionInfo failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + /*Returned values*/ + ioreq->irCount = TFFS_API_OTP_PART_SIZE; + ioreq->irFlags = ((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->dwCommandFlagsOrStatuses & DOCH_CFSB_PERM_LOCKED) == DOCH_CFSB_PERM_LOCKED); + if (ioreq->irFlags) + ioreq->irLength = TFFS_API_OTP_PART_SIZE; + else + ioreq->irLength = 0; + return flOK; +}/*TFFSOTPSize()*/ + +/*----------------------------------------------------------------------*/ +/* f l O T P R e a d */ +/* */ +/* Read OTP Partition */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Address of user buffer to read into */ +/* irCount : First byte to read. */ +/* irLength : Number of consecutive bytes to read */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSOTPRead(IOreq* ioreq) +{ +#ifndef FL_ABS_READ_WRITE + return flFeatureNotSupported; +#else /*FL_ABS_READ_WRITE*/ + FLStatus status = flReadFault; + IOreq myIoreq; + /*FLByte padSector[DOCH_SECTOR_SIZE];*/ + FLByte * padSector = dochVol.intermediateBuf; + FLByte* buf = (FLByte*)ioreq->irData; + FLDword firstByteInFirstSector = (ioreq->irCount % DOCH_SECTOR_SIZE); + FLDword firstSector = (ioreq->irCount >> DOCH_SECTOR_SIZE_BITS); + FLDword bytesToRead = ioreq->irLength; + /* FLBoolean lessThenOneSector = FALSE; */ + FLDword padBytesInFirstSector, bytesInUnfullSector,fullSectorsToRead,bytesToPad; + + if((firstByteInFirstSector + bytesToRead) < DOCH_SECTOR_SIZE) + { + /* lessThenOneSector = TRUE; */ + padBytesInFirstSector = (DOCH_SECTOR_SIZE - (firstByteInFirstSector + bytesToRead)); + if(firstByteInFirstSector == 0) + bytesInUnfullSector = bytesToRead; + else + bytesInUnfullSector = 0; + fullSectorsToRead = 0; + bytesToPad = padBytesInFirstSector; + } + else + { + padBytesInFirstSector = (firstByteInFirstSector == 0) ? 0 : (DOCH_SECTOR_SIZE - firstByteInFirstSector); + bytesInUnfullSector = ((ioreq->irLength - padBytesInFirstSector) % DOCH_SECTOR_SIZE); + fullSectorsToRead = ((ioreq->irLength - (padBytesInFirstSector + bytesInUnfullSector))>>DOCH_SECTOR_SIZE_BITS); + bytesToPad = (bytesInUnfullSector == 0) ? 0 : (DOCH_SECTOR_SIZE - bytesInUnfullSector); + } + + /*Read NOT from start of sector*/ + if(firstByteInFirstSector != 0) + { + tffsset(padSector, 0, sizeof(padSector)); + tffsAPISetIoreq( &myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq) + (TFFS_API_OTP_PARTITION_NUM << 4), + 0,0,padSector,firstSector,1); + status = TFFSAbsRead(&myIoreq, &(ioreq->irSectorCount)); + if(status != flOK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSOTPRead(): TFFSAbsRead failed with status: 0x%x "), status)); + return status; + } + tffscpy(buf, &padSector[firstByteInFirstSector], (DOCH_SECTOR_SIZE - firstByteInFirstSector)); + buf += (DOCH_SECTOR_SIZE - firstByteInFirstSector); + firstSector++; + } + + if(fullSectorsToRead > 0) + { + tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq) + (TFFS_API_OTP_PARTITION_NUM << 4), + 0,0,buf,firstSector,fullSectorsToRead); + status = TFFSAbsRead(&myIoreq, &(ioreq->irSectorCount)); + if(status != flOK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSOTPRead(): TFFSAbsRead failed with status: 0x%x "), status)); + return status; + } + buf += (fullSectorsToRead<irSectorCount)); + if(status != flOK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSOTPRead(): TFFSAbsRead failed with status: 0x%x "), status)); + return status; + } + tffscpy(buf, padSector, bytesInUnfullSector); + } + return flOK; +#endif /*FL_ABS_READ_WRITE*/ +}/*TFFSOTPRead()*/ + +/*----------------------------------------------------------------------*/ +/* f l O T P W r i t e A n d L o c k */ +/* */ +/* Write data to OTP partition and lock the partition */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to user data */ +/* irLength : The size to write, in bytes. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSOTPWriteAndLock(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + + tffsAPISetIoreq(&myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq) + (TFFS_API_OTP_PARTITION_NUM << 4),0, + 0,ioreq->irData,0,(ioreq->irLength>>DOCH_SECTOR_SIZE_BITS)); + + /*1. Perform last write + 2. Lock the partition for writing (OTP) + ---------------------------------------*/ + rc = flDOCHWriteAndLock(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSOTPWriteAndLock(): flDOCHWriteAndLock failed with status: 0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + return flOK; +}/*TFFSOTPWriteAndLock()*/ + + +/*----------------------------------------------------------------------*/ +/* f l G e t U n i q u e I D */ +/* */ +/* Returns the 16 bytes device unique ID */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to a 16 bytes buffer to read into the */ +/* unique ID data */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irData : 16 bytes unique ID buffer */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSGetUniqueID(IOreq* ioreq) +{ + DOCH_Error rc = DOCH_GeneralFailure; + IOreq myIoreq; + + tffsAPISetIoreq(&myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq),0,0,dochVol.intermediateBuf,0,0); + + /*Get extended disk info*/ + /*----------------------*/ + rc = flDOCHIdentifyDiskOnChipDevice(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSGetUniqueID(): flDOCHIdentifyDiskOnChipDevice failed with status: 0x%x "), rc)); + return (rc==DOCH_DiskNotFound)? flUnknownMedia : TFFS_API_RET(rc); + } + + tffscpy(ioreq->irData, ((DOCH_DeviceInfo*)dochVol.intermediateBuf)->bUniqueID, + sizeof(((DOCH_DeviceInfo*)dochVol.intermediateBuf)->bUniqueID)); + return flOK; +}/*TFFSGetUniqueID()*/ + +/*----------------------------------------------------------------------*/ +/* f l G e t C u s t o m e r I D */ +/* */ +/* Returns the 4 bytes customer ID */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to a 4 bytes buffer to read into the */ +/* customer ID */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irData : 4 bytes unique ID buffer */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSGetCustomerID(IOreq* ioreq) +{ + FLStatus status; + IOreq tmpIoreq; + FLByte uniqueID[16]; + + /*Use local copy of ioreq*/ + /*-----------------------*/ + tffsAPISetIoreq(&tmpIoreq,ioreq->irHandle,0,0,uniqueID,0,0); + + /*Retrieve UniqueID*/ + /*-----------------*/ + status = TFFSGetUniqueID(&tmpIoreq); + if(status != flOK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSGetCustomerID(): TFFSGetUniqueID failed with status: 0x%x "), status)); + return status; + } + + /*Extract 1st 4 bytes (CustomerID)*/ + /*--------------------------------*/ + tffscpy(ioreq->irData, uniqueID, 8); + return flOK; +}/*TFFSGetCustomerID()*/ + +#endif /* HW_OTP */ + + + +/*----------------------------------------------------------------------*/ +/* f l R e c o v e r F r o m P o w e r L o s s */ +/* */ +/* Recover from a power OFF without full TrueFFS initialization. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* */ +/* Returns: None */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSRecoverFromPowerLoss(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + + tffsAPISetIoreq(&myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq),0,0,0,0,0); + rc = flDOCHRecoverFromPowerLoss(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSRecoverFromPowerLoss(): flDOCHRecoverFromPowerLoss failed with status: 0x%x "), rc)); + return flBadParameter; + } + return flOK; +}/*TFFSRecoverFromPowerLoss()*/ + + +/*----------------------------------------------------------------------*/ +/* f l D e e p P o w e r D o w n M o d e */ +/* */ +/* Forces the device into and out of the deep power down mode */ +/* To set the Auto-DPD, ACTIVE/INACTIVE modes and timeout MUST be reset,*/ +/* by other API! */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irFlags : DEEP_POWER_DOWN forces the low power consumption */ +/* mode. otherwise turning to the regular mode */ +/* */ +/* Returns: None */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSDeepPowerDownMode(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + + tffsAPISetIoreq( &myIoreq,FL_GET_SOCKET_FROM_HANDLE(ioreq),0,0,0,gDpdSettings.timeOut, + (gDpdSettings.activeMode | gDpdSettings.inActiveMode) ); + if (ioreq->irFlags == DEEP_POWER_DOWN) /* enter DPD */ + { + /* reset modes + leave in inactive mode */ + myIoreq.irFlags = DOCH_PM_INACTIVE_MODE | DOCH_PM_SET_BOTH_MODES; + } + else/* exit DPD*/ + { + if( TFFS_API_IS_AUTO_DPD_ON(FL_GET_SOCKET_FROM_HANDLE(ioreq)) ) /* AutoDPD on */ + { + myIoreq.irFlags = DOCH_PM_INACTIVE_MODE | DOCH_PM_SET_BOTH_MODES; /* MUST be in inactive to allow all AutoDPDs*/ + } + else /* AutoDPD off*/ + { + myIoreq.irFlags = DOCH_PM_WORK_MODE | DOCH_PM_SET_BOTH_MODES;/* just put in active mode */ + } + } + + rc = DOCHSetPowerMode(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSDeepPowerDownMode(): DOCHSetPowerMode failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return TFFS_API_RET(rc); + } + return flOK; +}/*TFFSDeepPowerDownMode()*/ + +/*----------------------------------------------------------------------*/ +/* f l H w C o n f i g */ +/* */ +/* his routine enables to control DiskOnChip H/W features. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irFlags : Describing H/W configuration Type */ +/* irLength : New value to use - Different for each H/W */ +/* configuration type chosen. */ +/* */ +/* Returns: None */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSHwConfig(IOreq* ioreq) +{ + IOreq myIoreq; + DOCH_Error dochRC; + FLDword ctrl; + + switch(ioreq->irFlags) + { + case FL_DPD_TYPE:/*Configures the behavior of DiskOnChip DPD input pin*/ + tffsAPISetIoreq(&myIoreq,ioreq->irHandle,DOCH_POWER_DOWN,0,0,0,0); + switch(ioreq->irLength) + { + case FL_DPD_DISABLED: + myIoreq.irLength |= DOCH_DPD_PIN_DISABLED; + break; + + case FL_DPD_EXIT_RISE_EDGE: + myIoreq.irLength |= (DOCH_DPD_PIN_ENABLED | DOCH_DPD_PIN_POL_HIGH); + break; + + case FL_DPD_EXIT_FALL_EDGE: + myIoreq.irLength |= (DOCH_DPD_PIN_ENABLED | DOCH_DPD_PIN_POL_LOW); + break; + + case FL_DPD_ENTER_1_EXIT_0: + case FL_DPD_ENTER_0_EXIT_1: + default: + return flFeatureNotSupported; + } + + dochRC = DOCHConfigHW(&myIoreq); + if(dochRC != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSHwConfig(): flDOCHDPDMode failed...\r\n"); + return flBadFunction; + } + + break; + + case FL_PAGE_MODE_TYPE: + case FL_TURBO_MODE_TYPE: + case FL_DPS_2_COPIES_TYPE: + return flOK; + + case FL_IRQ_RB_TYPE : + /* Enable interrupts (if requested) */ + if(ioreq->irLength & FL_IRQ_EDGE_TYPE)/* Not supported in H3 */ + { + DBG_PRINT_WRN(FLZONE_API, "TFFSHwConfig(): EDGE interrupts not supported by mDOC H3 devices, LEVEL interrupt enabled.\r\n"); + } + /* save set configuration */ + gDochIrqEnabled[ioreq->irHandle] = (ioreq->irLength & FL_INT_RB_ENABLED); + break; + + case FL_DMA_TYPE: + tffsAPISetIoreq(&myIoreq,ioreq->irHandle,DOCH_DMA_ENABLE,0,0,0,0); + if (ioreq->irLength & FL_DMA_HW_ENABLED) + { + myIoreq.irLength = TRUE; + } + else + { + myIoreq.irLength = FALSE; + } + dochRC = DOCHConfigHW(&myIoreq); + if(dochRC != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSHwConfig(): Setting DMA enable status failed.\r\n"); + return (dochRC==DOCH_BadParameter) ? flBadParameter : flFeatureNotSupported; + } + ctrl = ((DOCH_DMA_PULSE_WIDTH)<<4) | DOCH_DMA_REQ_POL_LOW; + if (ioreq->irLength & FL_DMA_REQ_EDGE) + ctrl |= DOCH_DMA_REQ_EDGE; + if (ioreq->irLength & FL_NEGATED_0_ASSERTED_1) + ctrl &= ~DOCH_DMA_REQ_POL_LOW; + tffsAPISetIoreq(&myIoreq,ioreq->irHandle,DOCH_DMA_CTRL,0,0,ctrl, 0); + dochRC = DOCHConfigHW(&myIoreq); + if(dochRC != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSHwConfig(): Setting DMA enable status failed.\r\n"); + return (dochRC==DOCH_BadParameter) ? flBadParameter : flFeatureNotSupported; + } + break; + default: + DBG_PRINT_ERR(FLZONE_API, "TFFSHwConfig(): Not Supported \r\n"); + return flFeatureNotSupported; + } + + return flOK; +}/*TFFSHwConfig*/ + +#ifndef NO_IPL_CODE +/*----------------------------------------------------------------------*/ +/* f l W r i t e I P L */ +/* */ +/* Place a user buffer to both copies of the IPL area */ +/* */ +/* Note : */ +/* */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0,1,..) */ +/* 4 LSB - Socket number */ +/* irData : Pointer to user buffer */ +/* irLength : Size of the buffer */ +/* irFlags : See flags bellow */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSWriteIPL(IOreq* ioreq) +{ +#ifdef FL_READ_ONLY + return flFeatureNotSupported; +#else /*FL_READ_ONLY*/ + DOCH_Error rc = DOCH_GeneralFailure; + IOreq ioreq_WriteIpl; + IOreq ioreq_ReadIpl; + FLDword iplFlags, totalIPLSize, i , dwIPLSizeToWrite=0; + + if ((ioreq->irLength & (DOCH_SECTOR_SIZE - 1)) != 0) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSWriteIPL(): writeIPL must be done in buffers with N x 512B size (while n is a positive integer.\r\n"); + return flBadParameter; + } + if ((ioreq->irFlags & FL_IPL_128K_WINDOW_MODE) == 0) /*8KB window*/ + { + iplFlags = DOCH_IPL_MODE_8KB_WINDOW | DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT; + if (ioreq->irFlags & FL_IPL_VIRTUAL_RAM_MODE) + { + iplFlags |= DOCH_IPL_MODE_VIRTUAL_RAM; + totalIPLSize = TFFS_API_VIRTUAL_RAM_8K_IPL_SIZE; + } + else if (ioreq->irFlags & FL_DOC_IPL_PAGED_RAM_MODE) + { + iplFlags |= DOCH_IPL_MODE_PAGED_RAM; + totalIPLSize = TFFS_API_PAGED_IPL_SIZE; + } + else + { + totalIPLSize = TFFS_API_8K_NORMAL_IPL_SIZE; + } + } + else /*128KB window*/ + { + iplFlags = DOCH_IPL_MODE_NORMAL_RAM | DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT; + if (ioreq->irFlags & FL_IPL_VIRTUAL_RAM_MODE) + { + iplFlags |= DOCH_IPL_MODE_VIRTUAL_RAM; + totalIPLSize = TFFS_API_VIRTUAL_RAM_128K_IPL_SIZE; + } + else if (ioreq->irFlags & FL_DOC_IPL_PAGED_RAM_MODE) + { + iplFlags |= DOCH_IPL_MODE_PAGED_RAM; + totalIPLSize = TFFS_API_PAGED_IPL_SIZE; + } + else + { + totalIPLSize = TFFS_API_128K_NORMAL_IPL_SIZE; + } + } + if (ioreq->irFlags & FL_IPL_SWAP_BYTES_MODE) + { + iplFlags |= DOCH_IPL_MODE_ACTIVE_SWAP_BYTES; + } + if ((FLDword)(ioreq->irCount + ((ioreq->irLength) >> DOCH_SECTOR_SIZE_BITS)) > totalIPLSize) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSWriteIPL(): IPL size exceed current IPL mode allowed size."); + return flBadParameter; + } + if (iplFlags & DOCH_IPL_MODE_VIRTUAL_RAM) + { + /*virtual mode requires all IPL size to be written*/ + dwIPLSizeToWrite = totalIPLSize; + } + else + { + dwIPLSizeToWrite = (FLDword)(ioreq->irCount + ((ioreq->irLength) >> DOCH_SECTOR_SIZE_BITS)); + /*round to page size*/ + dwIPLSizeToWrite= (dwIPLSizeToWrite+DOCH_SECTORS_PER_PAGE-1) & (~(DOCH_SECTORS_PER_PAGE-1)); + if (dwIPLSizeToWrite > totalIPLSize) /*sanity check - should not fail*/ + { + DBG_PRINT_ERR(FLZONE_API, "TFFSWriteIPL(): IPL size exceed current IPL mode allowed size."); + return flBadParameter; + } + } + if (ioreq->irCount != 0) + { + for (i = 0; i < (FLDword)(ioreq->irCount);i++) + { + tffsAPISetIoreq(&ioreq_ReadIpl, FL_GET_SOCKET_FROM_HANDLE(ioreq),iplFlags,0,dochVol.intermediateBuf,1,i); + rc = flDOCHReadIPL(&ioreq_ReadIpl); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSWriteIPL(): Failed reading previous IPL copy. status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flReadFault); + } + + tffsAPISetIoreq(&ioreq_WriteIpl, FL_GET_SOCKET_FROM_HANDLE(ioreq),iplFlags,0,dochVol.intermediateBuf, + 1, dwIPLSizeToWrite); + if (i == 0) + ioreq_WriteIpl.irFlags |= DOCH_IPL_WRITE_FIRST_CHUNK; + rc = flDOCHWriteIPL(&ioreq_WriteIpl); + if (rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSWriteIPL(): Failed writing previous IPL copy. status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + } + } + + tffsAPISetIoreq(&ioreq_WriteIpl, FL_GET_SOCKET_FROM_HANDLE(ioreq),iplFlags,0,ioreq->irData, + ioreq->irLength >> DOCH_SECTOR_SIZE_BITS, dwIPLSizeToWrite); + if (ioreq->irCount == 0) + { + ioreq_WriteIpl.irFlags |= DOCH_IPL_WRITE_FIRST_CHUNK; + + ioreq_WriteIpl.irFlags |= (FL_IPL_DELAY_CELL_CONFIG_READ<<4); + ioreq_WriteIpl.irFlags |= (FL_IPL_DELAY_CELL_CONFIG_WRITE<<8); + } + + rc = flDOCHWriteIPL(&ioreq_WriteIpl); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSWriteIPL(): Failed writing new IPL data. status: "); + DBG_PRINT_ERR(FLZONE_API, "TFFSWriteIPL(): TFFSAbsWrite failed with status: "); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + + /*Write remainder*/ + tffsset(dochVol.intermediateBuf, 0, DOCH_SECTOR_SIZE); + for (i = ((ioreq->irLength >> DOCH_SECTOR_SIZE_BITS)+ ioreq->irCount); i < dwIPLSizeToWrite ; i++) + { + rc = flDOCHWriteIPL(tffsAPISetIoreq( &ioreq_WriteIpl,FL_GET_SOCKET_FROM_HANDLE(ioreq),iplFlags, + 0,dochVol.intermediateBuf,1,totalIPLSize)); + if (rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSWriteIPL(): Failed writing previous IPL copy. status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + } + return flOK; +#endif /*FL_READ_ONLY*/ +}/*TFFSWriteIPL*/ + +/*----------------------------------------------------------------------*/ +/* r e a d I P L */ +/* */ +/* Read IPL to user buffer. */ +/* */ +/* Note : Read length must be a multiplication of 512 bytes */ +/* Note : Causes DiskOnChip Millennium Plus to download (i,e protection */ +/* key will be removed from all partitions. */ +/* */ +/* Parameters: */ +/* irHandle : Socket number (0,1,..) */ +/* 4 LSB - Socket number */ +/* irData : Pointer to user buffer */ +/* irLength : Size of the buffer */ +/* irCount : Used IPL size on the media */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSReadIPL(IOreq* ioreq) +{ + FLStatus rc = flReadFault; + DOCH_Error dochErr = DOCH_ReadFault; + FLDword fullSectorsToRead, bytesToPad = 0; + /*FLByte padBuffer[DOCH_SECTOR_SIZE];*/ + FLByte * padBuffer=dochVol.intermediateBuf; + IOreq ioreq_ipl; + + fullSectorsToRead = ioreq->irLength >> DOCH_SECTOR_SIZE_BITS; + bytesToPad = ioreq->irLength % DOCH_SECTOR_SIZE; + tffsset(&ioreq_ipl, 0, sizeof(ioreq_ipl)); + ioreq_ipl.irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq); + ioreq_ipl.irCount = ioreq->irCount; + + if (fullSectorsToRead > 0) + { + ioreq_ipl.irLength = fullSectorsToRead; + ioreq_ipl.irData = ioreq->irData; + dochErr = flDOCHReadIPL(&ioreq_ipl); + if(dochErr != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSReadIPL(): TFFSAbsRead failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), dochErr)); + TFFS_API_RET_PART_FLSTATUS(rc, flReadFault); + } + } + + if ((bytesToPad > 0) || (ioreq->irLength == 0)) + { + ioreq_ipl.irLength = 1; + ioreq_ipl.irData = padBuffer; + dochErr = flDOCHReadIPL(&ioreq_ipl); + if(dochErr != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSReadIPL(): TFFSAbsRead failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), dochErr)); + TFFS_API_RET_PART_FLSTATUS(rc, flReadFault); + } + tffscpy((void*)(((FLByte*)ioreq->irData) + (fullSectorsToRead<irFlags = DOCH_IPL_MODE_NORMAL_RAM; + if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_PAGED_RAM) != 0) + ioreq->irFlags |= FL_DOC_IPL_PAGED_RAM_MODE; + if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_VIRTUAL_RAM) != 0) + ioreq->irFlags |= FL_IPL_VIRTUAL_RAM_MODE; + if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_ADDRESS_SHIFT_IN_AFFECT) == 0) + ioreq->irFlags |= FL_IPL_NO_ADDRESS_SHIFT_MODE; + if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_ACTIVE_SWAP_BYTES) != 0) + ioreq->irFlags |= FL_IPL_SWAP_BYTES_MODE; + if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_8KB_WINDOW) == 0) + { + ioreq->irFlags |= FL_IPL_128K_WINDOW_MODE; + if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_VIRTUAL_RAM) != 0) + ioreq->irCount = TFFS_API_VIRTUAL_RAM_128K_IPL_SIZE << DOCH_SECTOR_SIZE_BITS; + else if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_PAGED_RAM) != 0) + ioreq->irCount = (TFFS_API_PAGED_IPL_SIZE << DOCH_SECTOR_SIZE_BITS); + else + ioreq->irCount = (TFFS_API_128K_NORMAL_IPL_SIZE << DOCH_SECTOR_SIZE_BITS); + } + else + { + if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_VIRTUAL_RAM) != 0) + ioreq->irCount = TFFS_API_VIRTUAL_RAM_8K_IPL_SIZE << DOCH_SECTOR_SIZE_BITS; + else if ((ioreq_ipl.irFlags & DOCH_IPL_MODE_PAGED_RAM) != 0) + ioreq->irCount = (TFFS_API_PAGED_IPL_SIZE << DOCH_SECTOR_SIZE_BITS); + else + ioreq->irCount = (TFFS_API_8K_NORMAL_IPL_SIZE << DOCH_SECTOR_SIZE_BITS); + } + return flOK; +}/*TFFSReadIPL()*/ + +#endif /*NO_IPL_CODE*/ + + +/*----------------------------------------------------------------------*/ +/* f l I d e n t i f y P r o t e c t i o n */ +/* b d k I d e n t i f y P r o t e c t i o n */ +/* */ +/* Returns the specified partitions protection attributes */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irFlags CHANGEABLE_PROTECTION - changeable protection type */ +/* PROTECTABLE - partition can receive protection */ +/* READ_PROTECTED - partition is read protected */ +/* WRITE_PROTECTED - partition is write protected */ +/* LOCK_ENABLED - HW lock signal is enabled */ +/* LOCK_ASSERTED - HW lock signal is asserted */ +/* KEY_INSERTED - key is inserted (not currently */ +/* protected. */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSIdentifyProtection(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + FLByte protectionType,guestAccessMode,lockControl,otpBit,hwLockSignal,sLockSignal,authenticated; +#ifdef FL_SOTP + FLByte sotp; + FLDword dwSOTPoffset=0; +#endif /*FL_SOTP*/ + + /*Retrieve partition info*/ + /*-----------------------*/ + rc = flDOCHPartitionInfo(tffsAPISetIoreq(&myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSIdentifyProtection(): flDOCHPartitionInfo failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + protectionType = (FLByte)(((DOCH_PartitionInfo*)dochVol.intermediateBuf)->partitionAttributes2 & DOCH_PA2B_PROTECTION_TYPE); + guestAccessMode = (FLByte)((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->partitionAttributes2 & DOCH_PA2B_GUEST_MODE) + >> DOCH_PA2O_GUEST_MODE); + lockControl = (FLByte)((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->partitionAttributes2 & DOCH_PA2B_LOCK_CTRL) + >> DOCH_PA2O_LOCK_CTRL); + otpBit = (FLByte)((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->dwCommandFlagsOrStatuses & DOCH_CFSB_PERM_LOCKED) + >> DOCH_CFSO_PERM_LOCKED); + + hwLockSignal = (FLByte)((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->dwCommandFlagsOrStatuses & DOCH_CFSB_HW_LOCK_ASSERTED) + >> DOCH_CFSO_HW_LOCK_ASSERTED); + sLockSignal = (FLByte)((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->dwCommandFlagsOrStatuses & DOCH_CFSB_SW_LOCK_ASSERTED) + >> DOCH_CFSO_SW_LOCK_ASSERTED); + + authenticated = (FLByte)((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->dwCommandFlagsOrStatuses & DOCH_CFSB_USER_AUTHENTICATED) + >> DOCH_CFSO_USER_AUTHENTICATED); +#ifdef FL_SOTP + sotp = (FLByte)((((DOCH_PartitionInfo*)dochVol.intermediateBuf)->dwCommandFlagsOrStatuses & DOCH_CFSB_SOTP_LOCKED) + >> DOCH_CFSO_SOTP_LOCKED); + if (sotp) + { + /*return SOTP offset*/ + ioreq->irCount=((DOCH_PartitionInfo*)dochVol.intermediateBuf)->dwSOTPoffset; + } + else + { + /*illegal offset returned in case of non SOTP partition*/ + ioreq->irCount=0xFFFFFFFF; + } +#endif /*FL_SOTP*/ + + /*Retrieve partition attributes*/ + /*-----------------------------*/ + tffsset(dochVol.intermediateBuf, 0, sizeof(DOCH_PartitionUserAttrWithBinary)); + rc = flDOCHGetParitionUserAttributes(tffsAPISetIoreq(&myIoreq,ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0 )); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSIdentifyProtection(): flDOCHGetParitionUserAttributes failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + /*Set popper bits in irFlags according to partition attributes*/ + /*------------------------------------------------------------*/ + ioreq->irFlags=0; + + /*Set PROTECTABLE and CHANGEABLE_PROTECTION to user attributes*/ + /*------------------------------------------------------------*/ + ioreq->irFlags |= (((DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf)->bProtected * PROTECTABLE); + ioreq->irFlags |= (((DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf)->bChangableProtection * CHANGEABLE_PROTECTION); + + if(protectionType != DOCH_PARTITION_NOT_PROTECTED) + { + /*Default access mode (without authentication)*/ + /*--------------------------------------------*/ + if(guestAccessMode == DOCH_PART_ACCESS_MODE_NONE) + ioreq->irFlags |= (READ_PROTECTED | WRITE_PROTECTED); + else if(guestAccessMode == DOCH_PART_ACCESS_MODE_RO) + ioreq->irFlags |= WRITE_PROTECTED; + } + + /*Lock signal enabled/disabled*/ + /*----------------------------*/ + if(lockControl == DOCH_LOCK_ACTIVE) + ioreq->irFlags |= LOCK_ENABLED; + + /*Lock signal asserted*/ + /*--------------------*/ + if(hwLockSignal) + ioreq->irFlags |= LOCK_ASSERTED; + + /*Key inserted*/ + /*------------*/ + if(authenticated && protectionType != DOCH_PARTITION_NOT_PROTECTED) + ioreq->irFlags |= KEY_INSERTED; + + + /* SLOCK signal */ + /*--------------------------*/ + if(sLockSignal) + ioreq->irFlags |= STICKY_LOCK_ASSERTED; + + if( ((ioreq->irFlags & (WRITE_PROTECTED | READ_PROTECTED)) == 0) && + (protectionType != DOCH_PARTITION_NOT_PROTECTED) && (otpBit==0) ) + { + ioreq->irFlags |= KEY_INSERTED; + } + + /*OTW (Indicated by OTP Bit)*/ + /*--------------------------*/ + if(otpBit == 1) + { +#ifdef FL_SOTP + if (!sotp) + { +#endif /*FL_SOTP*/ + /* WRITE_PROTECTED and CHANGEABLE_PROTECTION added for compatibility with non-mDOC H3 devices */ + ioreq->irFlags |= (OTW_PROTECTED|WRITE_PROTECTED|CHANGEABLE_PROTECTION); +#ifdef FL_SOTP + } + else + { + ioreq->irFlags |= (OTW_PROTECTED); + } +#endif /*FL_SOTP*/ + } +#ifdef FL_SOTP + /* SOTP partition*/ + if (sotp) + { + ioreq->irFlags |= IDENTIFIED_SEQUENTIAL_OTP; + } +#endif /*FL_SOTP*/ + + /* check that no protection applied at all */ + if( (protectionType == DOCH_PARTITION_NOT_PROTECTED) && (ioreq->irFlags==0)) + return flNotProtected; + + return flOK; +}/*TFFSIdentifyProtection()*/ + + +/*----------------------------------------------------------------------*/ +/* f l R e m o v e P r o t e c t i o n K e y */ +/* b d k R e m o v e P r o t e c t i o n K e y */ +/* */ +/* Remove the protection key making the partition protected again */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSRemoveProtectionKey(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + FLByte bPartNum; + DOCH_PartitionInfo * pDOCH_PartitionInfo = (DOCH_PartitionInfo*)dochVol.intermediateBuf; + + rc = flDOCHPartitionInfo(tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0, dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + /*If already protected - return DOCH_OK*/ + if(rc == DOCH_ProtectionFault) + return flOK; + + DBG_PRINT_ERR(FLZONE_API, "TFFSRemoveProtectionKey(): flDOCHPartitionInfo Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return TFFS_API_RET(rc); + } + if( (pDOCH_PartitionInfo->partitionAttributes2&DOCH_PA2B_PROTECTION_TYPE) == DOCH_PARTITION_NOT_PROTECTED) + { + if( (pDOCH_PartitionInfo->partitionAttributes2&DOCH_PA2B_LOCK_CTRL)!=0 ) + { + if( ((pDOCH_PartitionInfo->partitionAttributes2&DOCH_PA2B_GUEST_MODE)==DOCH_PART_ACCESS_MODE_FULL ) && + ((pDOCH_PartitionInfo->partitionAttributes2&DOCH_PA2B_USER_MODE) ==DOCH_PART_ACCESS_MODE_FULL ) ) + {/* both user and guest have full protection -> write protection not applied */ + return flOK; /* return OK for backward compatibility */ + } + } + else + { + return flNotProtected; /* trying to remove key from not-protected partition */ + } + }/* not protected partition */ + + + tffsset(&myIoreq,0,sizeof(myIoreq)); + myIoreq.irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq); + bPartNum = FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(&myIoreq, bPartNum); + myIoreq.irFlags = DOCH_ACCESS_USER_PASSWORD; + /*Disable partition authentication*/ + /*--------------------------------*/ + rc = flDOCHDisablePartAccess(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSRemoveProtectionKey(): flDOCHDisablePartAccess Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + + return TFFS_API_RET(rc); + } + return flOK; +}/*TFFSRemoveProtectionKey()*/ + +/*----------------------------------------------------------------------*/ +/* f l C h a n g e P r o t e c t i o n K e y */ +/* b d k C h a n g e P r o t e c t i o n K e y */ +/* */ +/* Changes the current protection key with a new one. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to the new 8 bytes key array */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSChangeProtectionKey(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + DOCH_PartitionUserAttrWithBinary* pPartitionUserAttrWithBinary = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf; + DOCH_PartitionProtectionAPI * pPartitionProtectionAPI = (DOCH_PartitionProtectionAPI *)dochVol.intermediateBuf; + + /*Retrieve partition info*/ + /*-----------------------*/ + rc = flDOCHGetParitionUserAttributes(tffsAPISetIoreq(&myIoreq, ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionKey(): flDOCHGetParitionUserAttributes failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + if( pPartitionUserAttrWithBinary->bChangableProtection == FALSE ) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionKey(): Can't change protection of unchangeable protection partition.\n"); + return flUnchangeableProtection; + } + + /*-----------------------*/ + /*Change passkey to new one*/ + /*-------------------------*/ + tffsset(dochVol.intermediateBuf, 0, sizeof(DOCH_PartitionProtectionAPI)); + tffscpy(pPartitionProtectionAPI->bPasskey, ioreq->irData, PROTECTION_KEY_LENGTH); + + /*Set new partition info (with new passkey) back to DOCH*/ + /*------------------------------------------------------*/ + rc = flDOCHSetParitionProtection(tffsAPISetIoreq(&myIoreq, ioreq->irHandle,DOCH_PASSKEY_VALID,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionKey(): flDOCHSetParitionProtection Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc) ; + } + return flOK; +}/*TFFSChangeProtectionKey()*/ + + +/*----------------------------------------------------------------------*/ +/* f l C h a n g e P r o t e c t i o n T y p e */ +/* b d k C h a n g e P r o t e c t i o n T y p e */ +/* */ +/* Changes the protection attributes of the partitions. */ +/* In order for a partition to change its protection type (without */ +/* reformatting the media) it must have the CHANGEABLE_PRTOECTION */ +/* attribute. */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Partition # (zero based) */ +/* bits 3-0 - Socket # (zero based) */ +/* irFlags : CHANGEABLE_PROTECTION - changeable protection type */ +/* PROTECTABLE - partition can receive protection */ +/* READ_PROTECTED - partition is read protected */ +/* WRITE_PROTECTED - partition is write protected */ +/* LOCK_ENABLED - HW lock signal is enabled */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSChangeProtectionType(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + IOreq ioreq3; + FLBoolean read_protect, write_protect, locked; + FLDword guestAccessMode; + FLDword partitionAttr; + FLByte otwAsserted = ((ioreq->irFlags & OTW_PROTECTED) == OTW_PROTECTED); + DOCH_PartitionUserAttrWithBinary* pPartitionUserAttrWithBinary = (DOCH_PartitionUserAttrWithBinary*)dochVol.intermediateBuf; + DOCH_PartitionProtectionAPI * pPartitionProtectionAPI = (DOCH_PartitionProtectionAPI *)dochVol.intermediateBuf; + + /*Retrieve partition info*/ + /*-----------------------*/ + rc = flDOCHGetParitionUserAttributes(tffsAPISetIoreq(&myIoreq,ioreq->irHandle, 0,0,dochVol.intermediateBuf,0,0) ); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): flDOCHgetParitionUserAttributes failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + if (pPartitionUserAttrWithBinary->bChangableProtection == FALSE) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): Can't change protection of unchangeable protection partition.\n"); + return flUnchangeableProtection; + } + + /*If OTW_PROTECTED was asserted - lock the partition from further writing*/ + /*-----------------------------------------------------------------------*/ + if(otwAsserted) + { + if(ioreq->irFlags == (OTW_PROTECTED | PROTECTABLE | WRITE_PROTECTED)) + { + + /*Retrieve partition user attributes*/ + /*----------------------------------*/ + rc = flDOCHGetParitionUserAttributes(tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): flDOCHGetParitionUserAttributes failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + /* change partition protection to non-changable */ + pPartitionUserAttrWithBinary->bChangableProtection = 0; + + /*Set attributes back to device*/ + /*----------------------------------*/ + rc = flDOCHSetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): flDOCHSetParitionUserAttributes Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + /*Lock the partition as OTP */ + /*--------------------------*/ + tffsset(dochVol.intermediateBuf, 0, sizeof(DOCH_PartitionProtectionAPI)); + tffsAPISetIoreq(&myIoreq, ioreq->irHandle,DOCH_LOCK_AS_OTP,0,dochVol.intermediateBuf,0,0); + rc = flDOCHSetParitionProtection(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): DOCHSetParitionProtection failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + TFFS_API_RET_PART_FLSTATUS(rc, flWriteFault); + } + + return flOK; + } + else + { + return flBadParameter; + } + }/*OTW protection*/ + + /*Retrieve current partition info from DOCH*/ + /*-----------------------------------------*/ + rc = flDOCHPartitionInfo(tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): flDOCHPartitionInfo Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + partitionAttr = ((DOCH_PartitionInfo*)dochVol.intermediateBuf)->partitionAttributes2; + + /*Retrieve partition user attributes*/ + /*----------------------------------*/ + rc = flDOCHGetParitionUserAttributes(tffsAPISetIoreq(&myIoreq, ioreq->irHandle, 0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): flDOCHGetParitionUserAttributes failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + /*Change protection type + (only relevant fields are changed from the retrieved values!) + =============================================================*/ + pPartitionUserAttrWithBinary->bChangableProtection = + (((ioreq->irFlags & CHANGEABLE_PROTECTION) == CHANGEABLE_PROTECTION) + && (pPartitionUserAttrWithBinary->bChangableProtection == 1)); + + pPartitionUserAttrWithBinary->bProtected = ((ioreq->irFlags & PROTECTABLE) == PROTECTABLE); + + /*Set attributes back to device*/ + rc = flDOCHSetParitionUserAttributes(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): flDOCHSetParitionUserAttributes Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + + tffsset(dochVol.intermediateBuf, 0, (DOCH_SECTOR_SIZE)); + + /*Default access mode*/ + /*-------------------*/ + read_protect = ((ioreq->irFlags & READ_PROTECTED) == READ_PROTECTED); + write_protect = ((ioreq->irFlags & WRITE_PROTECTED) == WRITE_PROTECTED); + locked = ((ioreq->irFlags & LOCK_ENABLED) == LOCK_ENABLED); + if(read_protect) + guestAccessMode = DOCH_PART_ACCESS_MODE_NONE; + else if(write_protect) + guestAccessMode = DOCH_PART_ACCESS_MODE_RO; + else + guestAccessMode = DOCH_PART_ACCESS_MODE_FULL; + + DOCH_SetBits(&partitionAttr, DOCH_PA2B_GUEST_MODE, DOCH_PA2O_GUEST_MODE, guestAccessMode); + + if(guestAccessMode != DOCH_PART_ACCESS_MODE_FULL) + DOCH_SetBits(&partitionAttr, DOCH_PA2B_PROTECTION_TYPE, DOCH_PA2O_PROTECTION_TYPE, 1); + + /*Fill partPropApi structure*/ + /*--------------------------*/ + pPartitionProtectionAPI->dwProtectionType = + ((partitionAttr & DOCH_PA2B_PROTECTION_TYPE) >> DOCH_PA2O_PROTECTION_TYPE); + pPartitionProtectionAPI->dwUserAccessMode = + ((partitionAttr & DOCH_PA2B_USER_MODE) >> DOCH_PA2O_USER_MODE); + pPartitionProtectionAPI->dwGuestAccessMode = + ((partitionAttr & DOCH_PA2B_GUEST_MODE) >> DOCH_PA2O_GUEST_MODE); + pPartitionProtectionAPI->dwMasterControl = + ((partitionAttr & DOCH_PA2B_MASTER_CTRL) >> DOCH_PA2O_MASTER_CTRL); + pPartitionProtectionAPI->dwEncryptionType = + ((partitionAttr & DOCH_PA2B_ENCRYPT_TYPE) >> DOCH_PA2O_ENCRYPT_TYPE); + pPartitionProtectionAPI->dwLockControl = + ((partitionAttr & DOCH_PA2B_LOCK_CTRL) >> DOCH_PA2O_LOCK_CTRL); + pPartitionProtectionAPI->dwMaxNumOfAuthAttempts = + ((partitionAttr & DOCH_PA2B_MAX_AUTH_ATTEMPTS) >> DOCH_PA2O_MAX_AUTH_ATTEMPTS); + + if(locked == TRUE) + pPartitionProtectionAPI->dwLockControl = DOCH_LOCK_ACTIVE; + else + pPartitionProtectionAPI->dwLockControl = DOCH_LOCK_NOT_ACTIVE; + + /*Set new partition info (with new protection type) back to DOCH*/ + /*--------------------------------------------------------------*/ + rc = flDOCHSetParitionProtection(tffsAPISetIoreq(&myIoreq,ioreq->irHandle,DOCH_ATTRIBUTES_VALID,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSChangeProtectionType(): flDOCHSetParitionProtection Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return rc==DOCH_ProtectionFault ? flHWProtection : TFFS_API_RET(rc); + } + + /*If all is well, disable access to the partition*/ + /* (Is reset needed???? - TBD)*/ + return TFFSRemoveProtectionKey(tffsAPISetIoreq(&ioreq3,ioreq->irHandle,0,0,0,0,0)); +}/*TFFSChangeProtectionType()*/ + +/*----------------------------------------------------------------------*/ +/* f l A p p l y S t i c k y L o c k */ +/* */ +/* Enable the sticky lock mode to all relevant partitions */ +/* */ +/* Parameters: */ +/* irHandle : Drive number (0, 1, ...) */ +/* bits 7-4 - Must be set to 0 */ +/* bits 3-0 - Socket # (zero based) */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSApplyStickyLock(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + + rc = DOCHConfigHW(tffsAPISetIoreq(&myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), DOCH_SLOCK, 0,0,DOCH_SLOCK_ACTIVE,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSApplyStickyLock(): DOCHConfigHW Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return flBadFunction; + } + + return flOK; +}/*TFFSApplyStickyLock*/ + + +/*-----------------------------------------*/ +/* Function name : TFFSHwProtectionLock*/ +/* Description : */ +/* Return type : static FLStatus */ +/* Argument : IOreq* ioreq*/ +/*-----------------------------------------*/ +static FLStatus TFFSHwProtectionLock(IOreq* ioreq) +{ + DOCH_Error rc; + IOreq myIoreq; + FLDword partitionAttr; + DOCH_PartitionProtectionAPI * pPartitionProtectionAPI = (DOCH_PartitionProtectionAPI*)dochVol.intermediateBuf; + + /*Retrieve current partition info from DOCH*/ + /*-----------------------------------------*/ + rc = flDOCHPartitionInfo(tffsAPISetIoreq(&myIoreq, ioreq->irHandle,0,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSHwProtectionLock(): flDOCHPartitionInfo Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } + partitionAttr = ((DOCH_PartitionInfo*)dochVol.intermediateBuf)->partitionAttributes2; + + memset(dochVol.intermediateBuf, 0, sizeof(DOCH_PartitionProtectionAPI)); + + /*Lock signal*/ + /*-----------*/ + if((ioreq->irFlags & LOCK_ENABLED) == LOCK_ENABLED) + DOCH_SetBits(&partitionAttr, DOCH_PA2B_LOCK_CTRL, DOCH_PA2O_LOCK_CTRL, DOCH_LOCK_ACTIVE); + else + DOCH_SetBits(&partitionAttr, DOCH_PA2B_LOCK_CTRL, DOCH_PA2O_LOCK_CTRL, DOCH_LOCK_NOT_ACTIVE); + + /*Fill partPropApi structure*/ + /*--------------------------*/ + pPartitionProtectionAPI->dwProtectionType = + ((partitionAttr & DOCH_PA2B_PROTECTION_TYPE) >> DOCH_PA2O_PROTECTION_TYPE); + pPartitionProtectionAPI->dwUserAccessMode = + ((partitionAttr & DOCH_PA2B_USER_MODE) >> DOCH_PA2O_USER_MODE); + pPartitionProtectionAPI->dwGuestAccessMode = + ((partitionAttr & DOCH_PA2B_GUEST_MODE) >> DOCH_PA2O_GUEST_MODE); + pPartitionProtectionAPI->dwMasterControl = + ((partitionAttr & DOCH_PA2B_MASTER_CTRL) >> DOCH_PA2O_MASTER_CTRL); + pPartitionProtectionAPI->dwEncryptionType = + ((partitionAttr & DOCH_PA2B_ENCRYPT_TYPE) >> DOCH_PA2O_ENCRYPT_TYPE); + pPartitionProtectionAPI->dwLockControl = + ((partitionAttr & DOCH_PA2B_LOCK_CTRL) >> DOCH_PA2O_LOCK_CTRL); + pPartitionProtectionAPI->dwMaxNumOfAuthAttempts = + ((partitionAttr & DOCH_PA2B_MAX_AUTH_ATTEMPTS) >> DOCH_PA2O_MAX_AUTH_ATTEMPTS); + + /*Set modified partition info*/ + /*---------------------------*/ + rc = flDOCHSetParitionProtection(tffsAPISetIoreq(&myIoreq, ioreq->irHandle,DOCH_ATTRIBUTES_VALID,0,dochVol.intermediateBuf,0,0)); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "TFFSHwProtectionLock(): flDOCHSetParitionProtection Failed with status : "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return (rc==DOCH_ProtectionFault) ? flHWProtection : TFFS_API_RET(rc) ; + } + return flOK; +}/*TFFSHwProtectionLock()*/ +#ifdef FL_SLPP +/*----------------------------------------------------------------------*/ +/* f l S L P P U n l o c k R a n g e */ +/* */ +/* Unlock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to unlock */ +/* irLength : Number of sectors to unlock */ +/* irData : Pointer to an 8 bytes passkey array */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSSLPPUnlockRange(IOreq* ioreq) +{ + DOCH_Error rc; + + rc = flDOCHSLPPUnlockRange(ioreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSSLPPUnlockRange(): flDOCHSLPPUnlockRange failed with status: 0x%x \r\n\r\n"), rc)); + + if(rc == DOCH_ProtectionFault) + return flHWProtection; + else + return flGeneralFailure; + } + return flOK; +}/*TFFSSLPPUnlockRange*/ + +/*----------------------------------------------------------------------*/ +/* f l S L P P L o c k R a n g e */ +/* */ +/* Lock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to lock */ +/* irLength : Number of sectors to lock */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSSLPPLockRange(IOreq* ioreq) +{ + DOCH_Error rc; + + rc = flDOCHSLPPLockRange(ioreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSSLPPLockRange(): flDOCHSLPPLockRange failed with status: 0x%x \r\n\r\n"), rc)); + + if(rc == DOCH_ProtectionFault) + return flHWProtection; + else + return flGeneralFailure; + } + return flOK; +}/*TFFSSLPPLockRange*/ + +/*----------------------------------------------------------------------*/ +/* f l S L P P U n l o c k E n t i r e P a r t i t i o n */ +/* */ +/* Unlock all sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to an 8 bytes passkey array */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSSLPPUnlockEntirePartition(IOreq* ioreq) +{ + DOCH_Error rc; + + rc = flDOCHSLPPUnlockEntirePartition(ioreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSSLPPUnlockEntirePartition(): flDOCHSLPPUnlockEntirePartition failed with status: 0x%x \r\n\r\n"), rc)); + + if(rc == DOCH_ProtectionFault) + return flHWProtection; + else + return flGeneralFailure; + } + return flOK; +}/*TFFSSLPPUnlockEntirePartition*/ + +/*----------------------------------------------------------------------*/ +/* f l S L P P S t i c k y L o c k R a n g e */ +/* */ +/* Sticky lock a range of sectors on a sector protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irCount : First sector to sticky lock */ +/* irLength : Number of sectors to sticky lock */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSSLPPStickLockRange(IOreq* ioreq) +{ + DOCH_Error rc; + + rc = flDOCHSLPPStickyLockRange(ioreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSSLPPStickLockRange(): flDOCHSLPPStickyLockRange failed with status: 0x%x \r\n\r\n"), rc)); + + if(rc == DOCH_ProtectionFault) + return flHWProtection; + else + return flGeneralFailure; + } + return flOK; +}/*TFFSSLPPStickLockRange*/ + +/*----------------------------------------------------------------------*/ +/* f l S L P P R e p o r t L o c k e d R a n g e s */ +/* */ +/* Report currently defined unlocked/stick locked ranges on a sector */ +/* protected partition. */ +/* */ +/* Parameters: */ +/* irHandle : Bits 3-0 - Socket # (zero based) */ +/* irData : Pointer to DOCH_SLPPReport structure */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/* irCount : Number of currently defined ranges */ +/*----------------------------------------------------------------------*/ +static FLStatus TFFSSLPPReportLockedRanges(IOreq* ioreq) +{ + DOCH_Error rc; + + DOCH_SLPPReport* slppRep = (DOCH_SLPPReport*)ioreq->irData; + + rc = flDOCHSLPPReportRanges(ioreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("TFFSSLPPReportLockedRanges(): flDOCHSLPPStickyLockRange failed with status: 0x%x \r\n\r\n"), rc)); + + if(rc == DOCH_ProtectionFault) + return flHWProtection; + else + return flGeneralFailure; + } + + ioreq->irCount = slppRep->numOfActiveRanges; + + return flOK; +}/*TFFSSLPPReportLockedRanges*/ +#endif /*FL_SLPP*/ + +/*----------------------------------------------------------------------*/ +/* Function name : TFFSPassThrough*/ +/* Description : calls to DOCH pass through command with converted */ +/* parameters */ +/* Return type : FLStatus */ +/* Argument : IOreq FAR2 *ioreq*/ +/* irHandle : Socket number ( 0,1,2... ) */ +/* 4 LSB - Socket number */ +/* irData : pointer to user buffer (for DATA IN and DATA out */ +/* commands) */ +/* irLength : number of sectors in buffer, pointed to by irData*/ +/* irCount : bits 0..1 - pass through operation flow, where */ +/* 0 - No Data(CTRL), 1 - Data IN, 2 - Data OUT */ +/* bit 2 - 1, when interrupt should be used, */ +/* 0 - otherwise */ +/* bits 4..7 - frame size exponent, should be set */ +/* to 0 for now - 1 sector */ +/* irPath : pointer to buffer from type DOCH_Registers* */ +/* IN - input registers, OUT - out registers */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +FLStatus TFFSPassThrough(IOreq FAR2 *ioreq) +{ + DOCH_Error rc; + /*IOreq myIoreq;*/ + FLSNative snFlow = (FLSNative)(ioreq->irCount & 0x00000003); + FLBoolean fUseInterrupt = (FLBoolean)((ioreq->irCount&0x00000004)>>2); + /*FLDword dwMultSectorFrame = (FLDword)(ioreq->irCount&0x00000f0)>>4);*/ + /*DOCH_Socket* pDev = DOCH_get_socket(FL_GET_SOCKET_FROM_HANDLE(ioreq));*/ + + /* TODO - add retrieve current transfer mode from device */ + + rc = DOCHAtaPassThrough( FL_GET_SOCKET_FROM_HANDLE(ioreq), snFlow, + (DOCH_Registers*)ioreq->irPath, (DOCH_Registers*)ioreq->irPath, + (FLNative)ioreq->irLength, (void*)ioreq->irData, fUseInterrupt); + + return (rc==DOCH_ATA_NO_ERROR)?flOK : flGeneralFailure; +}/*TFFSPassThrough()*/ + + +/*----------------------------------------------------------------------*/ +/* b d C a l l B C T o S D K */ +/* */ +/* Performs needed general operations before calling actual function */ +/* Calls appropriate TFFS function (that will convert to SDK routine(s))*/ +/* */ +/* Parameters: */ +/* functionNo : DOCH SDK function to run */ +/* ioreq : DOCH ioreq structure */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +FLStatus bdCallTFFSToDOCH(FLFunctionNo functionNo, IOreq FAR2 *ioreq) +{ + FLStatus rc = flFeatureNotSupported; + DOCH_Error dochRc; + IOreq myIoreq; + FLByte partNum; + FLByte partNumTemp = 0; + FLHandle origIrHandle; + DOCH_DiskUserAttrWithBinary* pDiskUserAttrWithBinary; + IOreq ioreq1; + + /*Sanity Check*/ + /*------------*/ + if(ioreq == NULL) + { + DBG_PRINT_ERR(FLZONE_BLKDEV,"bdCallTFFSToDOCH: - Ioreq is NULL"); + return flBadParameter; + } + + origIrHandle = ioreq->irHandle; + + /* Actions to take on the first time bdCallTFFSToDOCH is invoked */ + /*---------------------------------------------------------------*/ + if(dochBdCallWasCalled == FALSE) + { + checkStatus(flInit()); + tffsset (&dochVol, 0, sizeof(dochVol)); + checkStatus(flCreateMutex(&dochVol.mutex)); + dochBdCallWasCalled = TRUE; + dochVol.intermediateBuf = (FLByte*)FL_MALLOC(DOCH_SECTOR_SIZE); + if (dochVol.intermediateBuf == NULL) + { + DBG_PRINT_ERR(FLZONE_API, "bdCallTFFSToDOCH(): Can't allocate intermediate buffer.\r\n"); + return flNotEnoughMemory; + } + + /*Retrieve diskAttributes at least once*/ + /*(numOfBinaryPartitions, iplExists, otpExists will be further updated + by TFFSflashFormat if called) + ---------------------------*/ + dochRc = flDOCHGetDiskUserAttributes(tffsAPISetIoreq(&myIoreq, 0,0,0,dochVol.intermediateBuf,0,0)); + if(dochRc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "bdCallTFFSToDOCH(): flDOCHGetDiskUserAttributes failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); +#ifdef CHECK_POWER_ON_EVERY_COMMAND + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + return flSuspendModeDetected; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + return flBadFunction; + } + + pDiskUserAttrWithBinary =(DOCH_DiskUserAttrWithBinary*)dochVol.intermediateBuf; + + dochVol.numOfBinaryPartitions = pDiskUserAttrWithBinary->bNumOfBinaryPartitions; + dochVol.iplExists = pDiskUserAttrWithBinary->bIplPresent; + dochVol.otpExists = pDiskUserAttrWithBinary->bOtpPresent; + }/* dochBdCallWasCalled was called */ + + /* get partition number and check it up to call type */ + partNum = FL_GET_FLASH_PARTITION_FROM_HANDLE(ioreq); + if((functionNo >= INDEX_BINARY_START) && (functionNo <= INDEX_BINARY_END)) + {/* binary partition */ + + /* check that the number of binary partition not exceeded number of BDK on the device */ + if( partNum >= dochVol.numOfBinaryPartitions ) + return flBadDriveHandle; + + rc = actualPartitionNum(&partNum, PARTITION_TYPE_BINARY, FL_GET_SOCKET_FROM_HANDLE(ioreq)); + if(rc != flOK) + { + DBG_PRINT_ERR(FLZONE_API, "bdCallTFFSToDOCH(): actualPartitionNum failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return rc; + } + ioreq->irHandle &= (0xFFFFFF0F); + ioreq->irHandle |= (partNum << 4); + } + else + { + if((functionNo >= INDEX_NEED_PARTITION_0_START) && (functionNo <= INDEX_NEED_PARTITION_0_END)) + {/* calls, which required partition number zero */ + if( partNum!=0 ) + return flBadDriveHandle; + } + else + { + if(functionNo > INDEX_NEED_PARTITION_0_END) + {/* BDTL partition */ + rc = actualPartitionNum(&partNum, PARTITION_TYPE_BDTL, FL_GET_SOCKET_FROM_HANDLE(ioreq)); + if(rc != flOK) + { + DBG_PRINT_ERR(FLZONE_API, "bdCallTFFSToDOCH(): actualPartitionNum failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return rc; + } + ioreq->irHandle &= (0xFFFFFF0F); + ioreq->irHandle |= (partNum << 4); + } + /* otherwise -> Files calls - different treatment */ + } + } + + /*make sure specific function precondition*/ + if (!flTakeMutex(&dochVol.mutex)) + return flDriveNotAvailable; + switch(functionNo) + { + case FL_ABS_READ: + case FL_ABS_WRITE: + case FL_ABS_DELETE: + case FL_ABS_SECURE_DELETE: + case FL_SECTORS_IN_VOLUME: + if (dochVol.mountCount[partNum] == 0) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("bdCallTFFSToDOCH(): Media must be mounted before calling 0x%d function\r\n"), functionNo)); + flFreeMutex(&dochVol.mutex); + return flNotMounted; + } + break; + case BD_ERASE_BD: + if (dochVol.mountCount[partNum] != 0) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("bdCallTFFSToDOCH(): Media must be unmounted before calling 0x%d function\r\n"), functionNo)); + flFreeMutex(&dochVol.mutex); + return flNoWriteAccess; + } + break; + + case BD_FLASH_FORMAT: + case BD_UNFORMAT: + for (partNumTemp = 0; partNumTemp < DOCH_MAX_PARTITIONS; partNumTemp++) + { + if (dochVol.mountCount[partNumTemp] != 0) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("bdCallTFFSToDOCH(): All partitions must be unmounted before calling 0x%d function\n"), functionNo)); + flFreeMutex(&dochVol.mutex); + return flNoWriteAccess; + } + } + default: + break; + } + + /*Branch to appropriate TFFS routine according to function#*/ + /*---------------------------------------------------------*/ + + switch(functionNo) + { +#ifdef FL_EXTENDED_DISK_INFO + case FL_GET_EXTENDED_DISK_INFO: + rc = TFFSGetExtendedDiskInfo(ioreq); + break; + +#endif /* FL_EXTENDED_DISK_INFO */ + case FL_VOLUME_INFO: + rc = TFFSVolumeInfo(ioreq); + break; + + case FL_COUNT_VOLUMES: + rc = TFFSCountVolumes(ioreq); + break; + + case FL_SECTORS_IN_VOLUME: + rc = TFFSSectorsInVolume(ioreq); + break; + +/* Quick mount routines */ +#ifndef FL_NO_QUICK_MOUNT_FEATURE + case FL_CLEAR_QUICK_MOUNT_INFO: + rc = TFFSClearQuickMountInfo(ioreq); + break; + + case FL_WRITE_QUICK_MOUNT_INFO: + rc = TFFSWriteQuickMountInfo(ioreq); + break; + + case FL_GET_QUICK_MOUNT_STATUS: + rc = TFFSGetQuickMountStatus(ioreq); + break; + +#endif /* FL_NO_QUICK_MOUNT_FEATURE */ + +/* Volume mounting routines */ + case FL_ABS_MOUNT: + rc = TFFSAbsMountVolume(ioreq); + break; + + case FL_DISMOUNT_VOLUME: + rc = TFFSAbsDismountVolume(ioreq); + break; + + case FL_CHECK_VOLUME: + rc = TFFSCheckVolume(ioreq); + break; + +/* Media */ +#ifndef FL_READ_ONLY + case FL_DEFRAGMENT_VOLUME: + rc = TFFSDefragmentVolume(ioreq); + break; + + +#ifdef FL_FORMAT_VOLUME + case BD_FLASH_FORMAT: + rc = TFFSflashFormat(ioreq); + break; + + case BD_UNFORMAT: + rc = TFFSUnFormat(ioreq); + break; + + case BD_ERASE_BD: + rc = TFFSEraseBD(ioreq); + break; + + +#endif /* FL_FORMAT_VOLUME */ +#endif /* FL_READ_ONLY */ + +/* IO */ +#ifdef FL_ABS_READ_WRITE + case FL_ABS_READ: + ioreq->irFlags = 0; + rc = TFFSAbsRead(ioreq, &(ioreq->irSectorCount)); + break; + + case FL_ABS_ADDRESS: + rc = TFFSAbsAddress(ioreq); + break; + + +#ifndef FL_READ_ONLY + case FL_ABS_WRITE: + ioreq->irFlags = 0; + rc = TFFSAbsWrite(ioreq); + break; + + case FL_ABS_DELETE: + rc = TFFSAbsDelete(ioreq); + break; + + case FL_ABS_SECURE_DELETE: + rc = TFFSAbsSecureDelete(ioreq); + break; + +#endif /* FL_READ_ONLY */ +#endif /* FL_ABS_READ_WRITE */ + + case FL_GET_PHYSICAL_INFO: + rc = TFFSGetPhysicalInfo(ioreq); + break; + +/* BDK routines (obsolete) */ +#ifdef BDK_ACCESS + case FL_BINARY_READ_INIT: + rc = TFFSbdkReadInit(ioreq); + break; + + case FL_BINARY_READ_BLOCK: + rc = TFFSbdkReadBlock(ioreq); + break; + +#ifndef FL_READ_ONLY + case FL_BINARY_WRITE_INIT: + rc = TFFSbdkWriteInit(ioreq); + break; + + case FL_BINARY_WRITE_BLOCK: + rc = TFFSbdkWriteBlock(ioreq); + break; + + case FL_BINARY_ERASE: + rc = TFFSbdkErase(ioreq); + break; + + case FL_BINARY_CREATE: + rc = TFFSbdkCreate(ioreq); + break; +#endif /* FL_READ_ONLY */ + + case FL_BINARY_PARTITION_INFO: + rc = TFFSbdkPartitionInfo(ioreq); + break; +#endif /* BDK_ACCESS */ + +/* OTP routines */ +#ifdef HW_OTP + case FL_OTP_SIZE: + rc = TFFSOTPSize(ioreq); + break; + + case FL_OTP_READ: + rc = TFFSOTPRead(ioreq); + break; + + case FL_OTP_WRITE: + rc = TFFSOTPWriteAndLock(ioreq); + break; + + case FL_UNIQUE_ID: + rc = TFFSGetUniqueID(ioreq); + break; + + case FL_CUSTOMER_ID: + rc = TFFSGetCustomerID(ioreq); + break; + +#endif /* HW_OTP */ + + case FL_RECOVER_FROM_POWER_LOSS: + rc = TFFSRecoverFromPowerLoss(ioreq); + break; + + case FL_DEEP_POWER_DOWN_MODE: + rc = TFFSDeepPowerDownMode(ioreq); + break; + + case FL_HW_CONFIG: + rc = TFFSHwConfig(ioreq); + break; + + +/* IPL routines */ +#ifndef NO_IPL_CODE + case FL_WRITE_IPL: + rc = TFFSWriteIPL(ioreq); + break; + + case FL_READ_IPL: + rc = TFFSReadIPL(ioreq); + break; +#endif /*NO_IPL_CODE*/ + + +/* Protection routines */ + case FL_PROTECTION_GET_TYPE: + case FL_BINARY_PROTECTION_GET_TYPE: + case FL_IPL_PROTECTION_GET_TYPE: + rc = TFFSIdentifyProtection(ioreq); + break; + + case FL_IPL_PROTECTION_INSERT_KEY:/* dont break after inserting default key */ + /* don't insert default key in order not to reduce number of authentication tries*/ + /*TFFSInsertProtectionKey(tffsAPISetIoreq(&ioreq1, 0, 0,0,(void*)DEFAULT_KEY,0,0));*/ + case FL_PROTECTION_INSERT_KEY: + case FL_BINARY_PROTECTION_INSERT_KEY: + rc = TFFSInsertProtectionKey(ioreq); + break; + + case FL_PROTECTION_REMOVE_KEY: + case FL_BINARY_PROTECTION_REMOVE_KEY: + case FL_IPL_PROTECTION_REMOVE_KEY: + rc = TFFSRemoveProtectionKey(ioreq); + break; + + case FL_IPL_PROTECTION_CHANGE_KEY: /* dont break after inserting default key */ + TFFSInsertProtectionKey(tffsAPISetIoreq(&ioreq1, 0, 0,0,(void*)DEFAULT_KEY,0,0)); + case FL_PROTECTION_CHANGE_KEY: + case FL_BINARY_PROTECTION_CHANGE_KEY: + rc = TFFSChangeProtectionKey(ioreq); + break; + + case FL_IPL_PROTECTION_CHANGE_TYPE:/* dont break after inserting default key */ + TFFSInsertProtectionKey(tffsAPISetIoreq(&ioreq1, 0, 0,0,(void*)DEFAULT_KEY,0,0)); + case FL_PROTECTION_CHANGE_TYPE: + case FL_BINARY_PROTECTION_SET_TYPE: + rc = TFFSChangeProtectionType(ioreq); + break; + + case FL_PROTECTION_STICKY_LOCK: + rc = TFFSApplyStickyLock(ioreq); + break; + + case FL_PROTECTION_SET_LOCK: + case FL_BINARY_PROTECTION_CHANGE_LOCK: + rc = TFFSHwProtectionLock(ioreq); + break; +#ifdef FL_SLPP + case FL_SLPP_UNLOCK_RANGE: + rc = TFFSSLPPUnlockRange(ioreq); + break; + + case FL_SLPP_LOCK_RANGE: + rc = TFFSSLPPLockRange(ioreq); + break; + + case FL_SLPP_UNLOCK_ENTIRE_PARTITION: + rc = TFFSSLPPUnlockEntirePartition(ioreq); + break; + + case FL_SLPP_STICKY_LOCK_RANGE: + rc = TFFSSLPPStickLockRange(ioreq); + break; + + case FL_SLPP_REPORT_LOCKED_RANGES: + rc = TFFSSLPPReportLockedRanges(ioreq); + break; +#endif /*FL_SLPP*/ + + case FL_DOCH_PASS_THROUGH: + rc = TFFSPassThrough(ioreq); + break; + + default: + DBG_PRINT_ERR_PRM(FLZONE_BLKDEV,(FLTXT("bdCallTFFSToDOCH: - Undefined Function# %d.\r\n"),functionNo)); + rc = flFeatureNotSupported; + break; + } + + /*Reset irHandle to original value*/ + ioreq->irHandle = origIrHandle; + flFreeMutex(&dochVol.mutex); +#ifdef CHECK_POWER_ON_EVERY_COMMAND + if( gDeviceTurnedOff==DOCH_GLOBAL_BOOL_PATTERN ) + return flSuspendModeDetected; +#endif /*CHECK_POWER_ON_EVERY_COMMAND*/ + return rc; +} + + +/*static +FLStatus TFFSCheckBeforeWrite(IOreq* ioreq) { return flFeatureNotSupported;}*/ + + +/*----------------------------------------------------------------------*/ +/* f l S e t D o c B u s R o u t i n e */ +/* */ +/* Set user defined memory access routines for DOCH. */ +/* */ +/* Parameters: */ +/* socket : Socket number to install routine for. */ +/* structPtr : Pointer to function structure. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +TFFS_DLL_API FLStatus NAMING_CONVENTION DochSetDocBusRoutine(FLByte socket, + FLAccessStruct FAR1 * structPtr) +{ + return flOK; +} + +/*----------------------------------------------------------------------*/ +/* f l G e t D o c B u s R o u t i n e */ +/* */ +/* Get currently installed memory access routines for DOCH. */ +/* */ +/* Parameters: */ +/* socket : Socket number to install routine for. */ +/* structPtr : Pointer to function structure. */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failed */ +/*----------------------------------------------------------------------*/ +TFFS_DLL_API FLStatus NAMING_CONVENTION DochGetDocBusRoutine(FLByte socket, + FLAccessStruct FAR1 * structPtr) +{ + return flOK; +} + + +/*----------------------------------------------------------------------*/ +/* f l R e g i s t e r D O C H 3 S O C */ +/* */ +/* Register DOCH3 socket */ +/* */ +/* Parameters: */ +/* dwAddress : Address were DOCH socket is located */ +/* */ +/* Returns: */ +/* DOCH_Error : 0 on success, otherwise failure */ +/* 'noOfSockets' is incremented in case a socket was found */ +/*----------------------------------------------------------------------*/ +FLStatus flRegisterDOCH3SOC(FLDword dwAddress) +{ + DOCH_Error rc; + +#ifndef DOCH_USE_FUNC + DOCHFlash->win = (volatile FLByte FAR0*)physicalToPointer(dwAddress, DOCH_MEM_WIN_SIZE, 0); +#endif /*DOCH_USE_FUNC*/ + + rc = DochRegisterSocket(dwAddress); + if(rc != DOCH_OK) + return flAdapterNotFound; + + noOfSockets++; + return flOK; +}/*flRegisterDOCH3SOC*/ + +/*----------------------------------------------------------------------*/ +/* t f f s A p i E x i t */ +/* */ +/* Exit routine for tffs_api.c layer */ +/* */ +/* Parameters: */ +/* NONE */ +/* */ +/* Returns: */ +/* FLStatus : 0 on success, otherwise failure */ +/*----------------------------------------------------------------------*/ +FLStatus tffsApiExit(void) +{ + DBG_PRINT_FLOW(FLZONE_ABS, "tffsApiExit() Invoked \r\n\n"); + + if( dochVol.intermediateBuf!=NULL ) + { + FL_FREE(dochVol.intermediateBuf); + dochVol.intermediateBuf = NULL; + } + noOfSockets = 0; + DochSDKExit(); + flDeleteMutex(&dochVol.mutex); + return flOK; +} + + +/*----------------------------------------------------------------------*/ +/* Function name : tffsApiSetAutoDpd*/ +/* Description : sets */ +/* Return type : FLStatus */ +/* Argument : FLSDword dwsSocket*/ +/* Argument : FLDword value*/ +/* Argument : FLDword FAR2 *prevValue*/ +/*----------------------------------------------------------------------*/ +FLStatus tffsApiSetAutoDpd( FLEnvVars envVarType, FLSDword dwsSocket, FLDword value, FLDword FAR2 *prevValue ) +{ + IOreq myIoreq; + +#ifdef DOCH_AUTO_DPD_BY_HOST + + if( envVarType!=TFFS_API_IS_AUTO_DPD_ON(dwsSocket) ) + return flFeatureNotSupported; + + (*prevValue) = TFFS_API_IS_AUTO_DPD_ON(dwsSocket) ? TRUE : FALSE; + + tffsAPISetIoreq( &myIoreq, dwsSocket, DOCH_ENV_AUTO_DPD_BY_HOST, 0,0, value, 0); + if (flDOCHSetEnvVar(&myIoreq) != DOCH_OK) + return flFeatureNotSupported; + + TFFS_API_SAVE_POWER_MODES(dwsSocket) = 0xFFFFFFFF; + return flOK; + +#else /*DOCH_AUTO_DPD_BY_HOST*/ + FLDword dwMode; + FLBoolean bAutoDpdOn = TFFS_API_IS_AUTO_DPD_ON(dwsSocket) ? TRUE : FALSE; + DOCH_Error rc; + + switch( envVarType) /* set IOREQ values */ + { + case FL_SET_AUTO_DPD_MODE: + dwMode = gDpdSettings.activeMode; + if( value == FL_ON )/*DPD is ON, device may be in DPD, idle or Active state */ + { + /* fix active mode to enable auto DPD */ + if( dwMode == DOCH_WM_NORMAL ) + dwMode = DOCH_WM_NORMAL_AND_AUTO_STBY; + if( dwMode == DOCH_WM_LOW_FREQ ) + dwMode = DOCH_WM_LOW_FREQ_AND_AUTO_STBY; + + tffsAPISetIoreq( &myIoreq, dwsSocket, (DOCH_PM_SET_BOTH_MODES|DOCH_PM_INACTIVE_MODE), + 0,0, gDpdSettings.timeOut, (dwMode | gDpdSettings.inActiveMode)); + } + else /* set the device to 'always ON' mode */ + { + /* fix active mode to disable auto DPD */ + if( dwMode == DOCH_WM_NORMAL_AND_AUTO_STBY ) + dwMode = DOCH_WM_NORMAL; + if( dwMode == DOCH_WM_LOW_FREQ_AND_AUTO_STBY ) + dwMode = DOCH_WM_LOW_FREQ; + + tffsAPISetIoreq( &myIoreq, dwsSocket, (DOCH_PM_SET_BOTH_MODES|DOCH_PM_INACTIVE_MODE), + 0,0,gDpdSettings.timeOut, (dwMode | gDpdSettings.inActiveMode)); + } + + (*prevValue) = bAutoDpdOn; + TFFS_API_SAVE_POWER_MODES(dwsSocket); + break; + + case FL_SET_ACTIVE_DPD_MODE: + dwMode = value; /* copy value to init this variable */ + if(bAutoDpdOn == FL_ON ) + { + if( value == DOCH_WM_NORMAL ) + dwMode = DOCH_WM_NORMAL_AND_AUTO_STBY; + if( value == DOCH_WM_LOW_FREQ ) + dwMode = DOCH_WM_LOW_FREQ_AND_AUTO_STBY; + } + else + { + if( value == DOCH_WM_NORMAL_AND_AUTO_STBY ) + dwMode = DOCH_WM_NORMAL; + if( value == DOCH_WM_LOW_FREQ_AND_AUTO_STBY ) + dwMode = DOCH_WM_LOW_FREQ; + } + + (*prevValue) = gDpdSettings.activeMode; + tffsAPISetIoreq(&myIoreq, dwsSocket, (DOCH_PM_SET_BOTH_MODES | DOCH_PM_INACTIVE_MODE), + 0,0, gDpdSettings.timeOut, (dwMode|gDpdSettings.inActiveMode) ); + break; + + case FL_SET_INACTIVE_DPD_MODE: + (*prevValue) = gDpdSettings.inActiveMode; + /* must leave device in inactive mode */ + tffsAPISetIoreq(&myIoreq, dwsSocket, (DOCH_PM_SET_BOTH_MODES | DOCH_PM_INACTIVE_MODE), + 0,0, gDpdSettings.timeOut, (value|gDpdSettings.activeMode) ); + break; + + case FL_SET_TIMEOUT_DPD: + /* reset both modes + set timeout */ + (*prevValue) = gDpdSettings.timeOut; + tffsAPISetIoreq( &myIoreq, dwsSocket, (DOCH_PM_SET_BOTH_MODES|DOCH_PM_INACTIVE_MODE),0,0, + value, (gDpdSettings.activeMode|gDpdSettings.inActiveMode) ); + break; + + default: + return flFeatureNotSupported; + }/*switch*/ + + rc = DOCHSetPowerMode(&myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR(FLZONE_API, "tffsApiSetAutoDpd(): DOCHSetPowerMode failed with status: "); + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("0x%x "), rc)); + return TFFS_API_RET(rc); + } + return flOK; +#endif /*DOCH_AUTO_DPD_BY_HOST*/ +}/*tffsApiSetAutoDpd()*/ + + +/************************************************************************/ +/* internal functions */ +/************************************************************************/ + +/************************************************************************/ +/* Function name : tffsApiAuthPartition*/ +/* Description : authenticates H3 partition */ +/* Return type : FLStatus - flOK, flWrongKey or flGeneralFailure*/ +/* Argument : IOreq * myIoreq*/ +/* Argument : IOreq * ioreq*/ +/* Argument : FLByte bPartNo - number of partition up to H3 count */ +/* Argument : FLByte * pKey - key */ +/* Argument : FLWord wKeyLen - length of the key pointed to by pKey*/ +/************************************************************************/ +static FLStatus tffsApiAuthPartition(IOreq * myIoreq, IOreq * ioreq, FLByte bPartNo, FLByte * pKey, FLWord wKeyLen) +{ + DOCH_Error rc; + DOCH_PartitionAcessPassword * pPartitionAcessPassword = (DOCH_PartitionAcessPassword *)(dochVol.intermediateBuf); + DOCH_PartitionInfo * partInfoPtr = (DOCH_PartitionInfo *)dochVol.intermediateBuf; + + + /* non mDOC H3 devices return flOK, when wrong key inserted to partition with CHNAGABLE + protection only. So first determine, which protection we have */ + tffsAPISetIoreq(myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0, 0, dochVol.intermediateBuf, 0, 0); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE( myIoreq, bPartNo ); + rc = flDOCHPartitionInfo(myIoreq); + if( rc != DOCH_OK ) + { + /*In case of Read and Write protection, we might not be able to retrieve the partition info*/ + if(rc == DOCH_ProtectionFault) + goto authenticateOnly; + + return (rc==DOCH_ProtectionFault) ? flHWProtection : ((rc==DOCH_PartitionNotFound) ? flPartitionNotFound : TFFS_API_RET(rc)); + } +#ifndef FL_OTP + if( (partInfoPtr->dwCommandFlagsOrStatuses & DOCH_CFSB_PERM_LOCKED)!=0 ) /* OTW protected partition should return wrong key */ +#else /*FL_OTP*/ + if( (partInfoPtr->dwCommandFlagsOrStatuses & (DOCH_CFSB_PERM_LOCKED|DOCH_CFSB_SOTP_LOCKED))==DOCH_CFSB_PERM_LOCKED) /* OTW protected partition should return wrong key */ +#endif /*FL_OTP*/ + { + return flWrongKey; + } + + if( (partInfoPtr->partitionAttributes2&DOCH_PA2B_PROTECTION_TYPE)==DOCH_PARTITION_NOT_PROTECTED) + { + return flNotProtected; + } + + /* password protected */ + if( ((partInfoPtr->partitionAttributes2&DOCH_PA2B_PROTECTION_TYPE)==DOCH_PARTITION_PWD_PROTECTED) || + ((partInfoPtr->partitionAttributes2&DOCH_PA2B_LOCK_CTRL)!=0) ) + { + if( ((partInfoPtr->partitionAttributes2&DOCH_PA2B_GUEST_MODE)==DOCH_PART_ACCESS_MODE_FULL ) && + ((partInfoPtr->partitionAttributes2&DOCH_PA2B_USER_MODE) ==DOCH_PART_ACCESS_MODE_FULL ) ) + {/* both user and guest have full protection -> write protection not applied */ + return flNotProtected; + } + } + +authenticateOnly: + tffsset(dochVol.intermediateBuf, 0, DOCH_SECTOR_SIZE); + tffscpy(pPartitionAcessPassword->bPassword, pKey, wKeyLen); + tffsAPISetIoreq( myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq),DOCH_ACCESS_USER_PASSWORD, 0, dochVol.intermediateBuf, 0,0); + DOCH_SET_PARTITION_TO_IOREQ_HANDLE(myIoreq, bPartNo); + /*Authenticate the partition*/ + rc = flDOCHAccessPartWithPwd(myIoreq); + if (rc != DOCH_OK) + { + return (rc==DOCH_ProtectionFault) ? flWrongKey : TFFS_API_RET(rc); + } + return flOK; +}/* tffsApiAuthPartition() */ + + +#ifndef FL_READ_ONLY +/************************************************************************/ +/* Function name : tffsApiAddOtpIPL*/ +/* Description : adds IPL or OTP partition*/ +/* Return type : static FLStatus - flOK, flGeneralFailure, flHWProtection*/ +/* Argument : FLBoolean bIPL - TRUE, when IPL should be added, FALSE, when OTP*/ +/* Argument : IOreq * myIoreq */ +/************************************************************************/ +static FLStatus tffsApiAddOtpIPL(FLBoolean bIPL, IOreq * myIoreq, IOreq * ioreq) +{ + DOCH_Error rc = DOCH_OK; + FLStatus flStatus; + FLByte * intBuf = dochVol.intermediateBuf; + DOCH_PartitionFormatInfoAPI * pPartitionFormatInfoAPI = (DOCH_PartitionFormatInfoAPI *)intBuf; + + tffsset(intBuf, 0, sizeof(DOCH_PartitionFormatInfoAPI)); + + TFFS_API_SET_MIG_STD_PART_PRMS(pPartitionFormatInfoAPI,0);/* protection type dont matter */ + + /* Protection features */ + pPartitionFormatInfoAPI->dwOtpEnabled = TRUE; /* enable OTP -> IPL can be OTW protected */ + if( bIPL==TRUE ) + { + flStatus = tffsFormatSetProtectionAttribs( CHANGEABLE_PROTECTION|PROTECTABLE, pPartitionFormatInfoAPI, + (FLByte*)DEFAULT_KEY, sizeof(DEFAULT_KEY)); + if( flOK != flStatus ) + return flStatus; + } + else + { + pPartitionFormatInfoAPI->dwProtectionType = DOCH_PARTITION_NOT_PROTECTED; + pPartitionFormatInfoAPI->dwUserAccessMode = DOCH_PART_ACCESS_MODE_FULL; + pPartitionFormatInfoAPI->dwGuestAccessMode = DOCH_PART_ACCESS_MODE_FULL; + } + pPartitionFormatInfoAPI->dwLockControl = DOCH_LOCK_NOT_ACTIVE; + + + /*Partition size (must be FL_LENGTH_IN_BYTES)*/ + pPartitionFormatInfoAPI->nPartitionSize = + (bIPL==TRUE) ? IPL_PARTITION_SIZE_SECTORS : (TFFS_API_OTP_PART_SIZE >> DOCH_SECTOR_SIZE_BITS); + + /*Add partition*/ + tffsAPISetIoreq(myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0, intBuf, 0,0); + rc = flDOCHAddPartition(myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("tffsApiAddOtpIPL(): flDOCHAddPartition (IPL) failed with status: 0x%x "), rc)); + return TFFS_API_RET(rc); + } + + /*Retrieve current attributes*/ + tffsset(myIoreq, 0, sizeof(IOreq)); + if( bIPL == TRUE ) + myIoreq->irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq) + (DOCH_IPL_PARTITION_NUM << 4); + else + myIoreq->irHandle = FL_GET_SOCKET_FROM_HANDLE(ioreq) + (TFFS_API_OTP_PARTITION_NUM << 4); + myIoreq->irData = intBuf; + rc = flDOCHGetParitionUserAttributes(myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("tffsApiAddOtpIPL(): flDOCHGetParitionUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection : TFFS_API_RET(rc); + } + + /*Set type to IPL or OTP*/ + ((DOCH_PartitionUserAttrWithBinary*)intBuf)->bType = (bIPL == TRUE) ? PARTITION_TYPE_IPL:PARTITION_TYPE_OTP; + /* set IPL partition to be changeable */ + ((DOCH_PartitionUserAttrWithBinary*)intBuf)->bChangableProtection = bIPL; + /* set IPL partition to be protectable */ + ((DOCH_PartitionUserAttrWithBinary*)intBuf)->bProtected = bIPL; + /*Set attributes back to device*/ + rc = flDOCHSetParitionUserAttributes(myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("tffsApiAddOtpIPL(): flDOCHSetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection : TFFS_API_RET(rc); + } + + tffsAPISetIoreq(myIoreq, FL_GET_SOCKET_FROM_HANDLE(ioreq), 0,0, intBuf, 0,0); + rc = flDOCHGetDiskUserAttributes(myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("tffsApiAddOtpIPL(): flDOCHGetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection : TFFS_API_RET(rc); + } + + if(bIPL == TRUE) + ((DOCH_DiskUserAttrWithBinary*)intBuf)->bIplPresent = 1; + else + ((DOCH_DiskUserAttrWithBinary*)intBuf)->bOtpPresent = 1; + rc = flDOCHSetDiskUserAttributes(myIoreq); + if(rc != DOCH_OK) + { + DBG_PRINT_ERR_PRM(FLZONE_API, (FLTXT("tffsApiAddOtpIPL(): flDOCHSetDiskUserAttributes failed with status: 0x%x "), rc)); + return (rc==DOCH_ProtectionFault)? flHWProtection : TFFS_API_RET(rc); + } + return flOK; +}/*tffsApiAddOtpIPL*/ +#endif /*FL_READ_ONLY*/ + +/************************************************************************/ +/* Function name : tffsAPISetIoreq */ +/* Description : */ +/* Return type : IOreq * */ +/* Argument : IOreq * pIoreq*/ +/* Argument : FLHandle irHandle*/ +/* Argument : FLDword irFlags*/ +/* Argument : void* irPath*/ +/* Argument : void * irData*/ +/* Argument : FLSDword irLength*/ +/* Argument : FLSDword irCount*/ +/************************************************************************/ +static IOreq * tffsAPISetIoreq(IOreq * pIoreq, FLHandle irHandle, FLDword irFlags, void* irPath, void * irData, FLSDword irLength, FLSDword irCount) +{ + pIoreq->irCount = irCount; + pIoreq->irData = irData; + pIoreq->irFlags = irFlags; + pIoreq->irHandle = irHandle; + pIoreq->irLength = irLength; + pIoreq->irPath = irPath; + return pIoreq; +}/*tffsAPISetIoreq*/ + +/* end of file tffs_api.c */ + + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs_api.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs_api.h new file mode 100755 index 00000000..ef631bae --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffs_api.h @@ -0,0 +1,224 @@ +/******************************************************************************/ +/* */ +/* Copyright (C), 1995-2007, SanDisk IL Ltd. All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions are */ +/* met: */ +/* 1. Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* 3. Neither the name of SanDisk IL nor the names of its contributors may be*/ +/* used to endorse or promote products derived from this software without */ +/* specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */ +/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ +/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ +/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ +/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */ +/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */ +/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/* NOTWITHSTANDING ANYTHING STATED TO THE CONTRARY, SANDISK'S TOTAL LIABILITY*/ +/* ARISING OUT OF OR RELATED TO THE SOFTWARE OR ANY SUPPORT SERVICES */ +/* PROVIDED WITH RESPECT THERETO SHALL NOT EXCEED $100. */ +/* */ +/* The laws of the State of California, United States of America, exclusive */ +/* of conflict-of-laws provisions, shall govern this license in all respects.*/ +/* The the federal or state courts of competent jurisdiction in the State */ +/* of California shall have exclusive jurisdiction with respect to all */ +/* actions commenced in relation to the software. Licensee agrees not */ +/* to export or re-export, directly or indirectly any technical data */ +/* acquired from SanDisk or any products utilizing such data in violation */ +/* of applicable export laws and regulations. */ +/* */ +/******************************************************************************/ +/* + * $Log: V:/PVCSDB/DiskOnChip/archives/Test for 7.x/src/H3/tffs_api.h-arc $ + * + * Rev 1.32 Dec 11 2007 12:30:54 einat.avidan + * Add format start and format complete signatures in disk user attributes + * + * Rev 1.31 Oct 22 2007 11:34:56 einat.avidan + * update copyrights header + * + * Rev 1.30 Jun 20 2007 12:09:20 einat.avidan + * when DOCH_AUTO_DPD_BY_HOST is enabeled: wrong macro name was used(TFFS_API_IS_DPD_ON instead of TFFS_API_IS_AUTO_DPD_ON) + * + * Rev 1.29 Sep 11 2006 13:45:28 yaniv.iarovici + * Legal header added + * + * Rev 1.28 Aug 16 2006 09:57:50 Yaniv.Iarovici + * Fix compilation error due to PVCS comment + * + * Rev 1.26 Aug 16 2006 08:48:40 Yaniv.Iarovici + * Change OTP partition size to 256KB (#define TFFS_API_OTP_PART_SIZE 0x40000 -> 256KB). + * + * Rev 1.25 Aug 09 2006 17:26:50 Polina.Marimont + * initial for DOC Driver 1.0 + * + * Rev 1.24.1.0 Aug 08 2006 15:55:34 Polina.Marimont + * DOC Driver 1.0 initial + * + * Rev 1.23 Jun 18 2006 13:09:16 Polina.Marimont + * AutoDPD and DPD parameters storage moved to SA SDK + * + * Rev 1.22 Jun 14 2006 18:00:18 Polina.Marimont + * structures definitions moved to this file + * + * Rev 1.21 May 18 2006 09:48:50 polina.marimont + * 1. added function for autoDPD support + * 2. actual partition number API changed + * + * Rev 1.20 Apr 11 2006 13:17:22 tal.heller + * add DOCH_SECURE_DELETE_DATA_OFFSET define + * + * Rev 1.19 Mar 22 2006 17:35:46 DoronC + * Bug fix - add signature to disk attributes in order to use only + * format made by TrueFFS 7.1 and not by host SDK. + * Other format will force reformating of the media. + * + * Rev 1.18 Mar 15 2006 16:18:18 DoronC + * Bug fix - normal IPL of 8KB window was wrong. + * + * Rev 1.17 Mar 15 2006 11:28:18 DoronC + * Bug fix - IPL write was not working properly. + * + * Rev 1.16 Mar 14 2006 09:54:16 DoronC + * Bug fix - IPL size was limited to 1KB when righting normal node + * IPL instead of 2KB + * + * Rev 1.15 Mar 02 2006 08:30:54 DoronC + * Bug fix - IPL was not working since size should be in sectors. + * + * Rev 1.14 Feb 14 2006 10:50:02 DoronC + * Remove large variables from stack. use one global buffer for + * all large buffers needs. + */ + +/***********************************************************************************/ +/* */ +/* Header file for sdk_api module */ +/* */ +/***********************************************************************************/ + +#ifndef _TFFS_API +#define _TFFS_API + +FLStatus bdCallTFFSToDOCH(FLFunctionNo functionNo, IOreq FAR2 *ioreq); + +#ifdef BDK_ACCESS +typedef struct { + FLDword dwStartReadSector; + FLDword dwCurrentReadByte; + FLDword dwReadLength; + FLDword dwStartWriteSector; + FLDword dwCurrentWriteByte; + FLDword dwWriteLength; + FLByte bWriteSubPartitionNum; +} sBdkInitValues; +#endif /*BDK_ACCESS*/ + +typedef struct __DocHVolume +{ + FLMutex mutex; + FLByte numOfBinaryPartitions; + FLByte iplExists; + FLByte otpExists; + FLBoolean verifyWrite; + FLByte *intermediateBuf; + FLDword mountCount[DOCH_MAX_PARTITIONS]; +#ifdef BDK_ACCESS + sBdkInitValues bdkInitValues; +#endif /*BDK_ACCESS*/ + FLDword dwVirtualUnitSize; + FLDword dwVirtualUnitSizeInSectors; + FLDword dwNumOfUnits; + FLDword dwUnformattedCapacity; + + FLDword dwPowerMode[FL_SOCKETS]; /* saves power modes */ +}DocHVolume; + +/* MACRO: TFFS_API_IS_AUTO_DPD_ON - determines whether one of Auto DPD modes defined */ +#define TFFS_API_IS_AUTO_DPD_ON(socket) ( ((gDpdSettings.activeMode & DOCH_WM_NORMAL_AND_AUTO_STBY) == DOCH_WM_NORMAL_AND_AUTO_STBY) || \ + ((gDpdSettings.activeMode & DOCH_WM_LOW_FREQ_AND_AUTO_STBY) == DOCH_WM_LOW_FREQ_AND_AUTO_STBY) || \ + ((gDpdSettings.inActiveMode & DOCH_IM_IDLE_2_DPD) == DOCH_IM_IDLE_2_DPD) ) +/* MACRO: TFFS_API_SAVE_DPD_STATES(socket) - saves the power modes into global variable */ +#define TFFS_API_SAVE_POWER_MODES(socket) dochVol.dwPowerMode[socket] = gDpdSettings.inActiveMode | gDpdSettings.activeMode; + +/********************/ +/* Defines */ +/********************/ + +#define DOCH_SECTORS_IN_UNIT_BITS 9 +#define DOCH_SECTORS_IN_UNIT (1<= PAGE_OFFSET) && ((vaddr) < (unsigned long)high_memory)) +#endif + + +/* + * static routines + */ +static void __dmasw_bread (int off, void *vbuf, unsigned int bytes); +static void __dmasw_bwrite (int off, void *vbuf, unsigned int bytes); + + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ d m a s w * + * * + * Transfer data between DiskOnChip's and RAM buffer. * + * This routines handles any kind of virtual buffer (linearly mapped or * + * vmalloc() allocated, spanning multiple memory pages, containing * + * multiple sectors). * + * * + * Parameters: * + * win pointer to DiskOnChip's I/O window * + * off offset of DiskOnChip's I/O register from the base * + * of DiskOnChip window * + * vbuf virtual address of RAM buffer * + * bytes bytes to transfer * + * read DMA direction: '1' for DiskOnChip->RAM, or zero * + * for RAM->DiskOnChip * + * * + *-----------------------------------------------------------------------*/ + +void tffs_dmasw ( char * win, + int off, + void * vbuf, + unsigned int bytes, + int read ) +{ + /* We check if 'vbuf' is linearly mapped kernel virtual address (and + * is therefore laid out in consecutive physical pages). If 'vbuf' + * is not linearly mapped (i.e. came from user space or allocated + * via vmalloc()), we check if it entirely fits into a single memory + * page. + */ + if ((virt_addr_valid((unsigned long)vbuf)) /* linearly mapped kernel virtual address */ + || + (Align(vbuf,PAGE_SIZE) == Align((unsigned long)vbuf + bytes,PAGE_SIZE))) + { + if (read == 1) + __dmasw_bread (off, vbuf, bytes); + else + __dmasw_bwrite (off, vbuf, bytes); + } + else /* 'vbuf' crosses memory page boundary */ + { + if (bytes >= (FL_SECTOR_SIZE * 2)) /* two or more sectors */ + { + register unsigned long bytes_on_this_page; + + /* Do multiple DMA transfers, each one fitting into a single + * memory page. + */ + do + { + bytes_on_this_page = PAGE_SIZE - ((unsigned long)vbuf & (PAGE_SIZE - 1)); + if (bytes_on_this_page > bytes) + bytes_on_this_page = bytes; + + if (read == 1) + __dmasw_bread (off, vbuf, bytes_on_this_page); + else + __dmasw_bwrite (off, vbuf, bytes); + + bytes -= bytes_on_this_page; + vbuf = (char *)vbuf + bytes_on_this_page; + + } while (bytes > 0); + } + else /* single sector; don't bother with DMA ... */ + { + if (read == 1) + tffs_readw ((unsigned long)(win + off), vbuf, (bytes / sizeof(short))); + else + tffs_writew ((unsigned long)(win + off), vbuf, (bytes / sizeof(short))); + } + } +} + + + + + +#if defined(CONFIG_ARCH_MAINSTONE) || defined(CONFIG_MACH_MAINSTONE) + +/*_____________________________________________________________________________ + | | + | | + | Intel PXA27x ("Mainstone") board | + | | + |____________________________________________________________________________| +*/ + + +# include +# include +# include + + +/* Routine blk_dma_inv_range_harvard() (arch/arm/mm/blockops.c) appears + * to be buggy: it seems to constantly shoot past the end of the address + * range [vbuf..vbuf+bytes] by 32 bytes. It also appears to write some + * bogus data into this RAM address range while invalidating it in D-cache. + */ +# define PXA27X_DCACHE_BUG_WORKAROUND + + +/* + * static routines for PXA27x + */ + +static void tffs_dma_init (int resume); +static void tffs_dma_release (void); +static void tffs_dma_intr (int dma, void *dummy, struct pt_regs *regs); + + + + +/*-----------------------------------------------------------------------* + * * + * t f f s a r c h _ i n i t * + * * + * This routine is called during module initialization time with 'resume'* + * argument set to FALSE, and from Power Manager's 'resume' routine with * + * 'resume' argument set to TRUE. If 'resume' is FALSE, this routine * + * allocates and initializes all required board resources; if 'resume' * + * is TRUE, this routine does minimal required re-initialization of * + * these resources after power suspend. * + * * + * Parameters: * + * suspend FALSE (module initialization) or TRUE (power resume) * + * * + * Returns: * + * always '1' (success) * + * * + *-----------------------------------------------------------------------*/ + +unsigned char tffsarch_init ( int resume ) +{ + /* chip select that DiskOnChip is connected to */ +#define PXA27X_CS 5 + + /* Value to write to chip select's conf register. Possible values are: + * + * 0x099C VLIO DiskOnChip adapter and DiskOnChip G4/G3/H3 device + * 0x0AAC VLIO DiskOnChip adapter and DiskOnChip H1 device + * 0xA998 sync DiskOnChip adapter and DiskOnChip G4/G3/H3 device + * 0xAAA8 sync DiskOnChip adapter and DiskOnChip H1 device + * + * Register description: + * + * 31 0 - slow device (VLIO); 1 - fast device + * 30:28 The value of this bit is half the number of memory clock cycles + * from the time that chip select is de-asserted after a read or + * write until the next chip select (of a different static memory + * bank) or nSDCS is asserted + * 27:24 ROM Delay Next Access The RDN field is encoded as follows: + * ENCODED (Programmed) Value -----> DECODED (Actual) Value + * 0-11 -----> 0-11 + * 12 -----> 15 + * 13 -----> 20 + * 14 -----> 26 + * 15 -----> 30 + * RDNx * 2 = amount of time nOE or nPWE is deasserted to address + * hold and address setup to nOE or nPWE assertion time + * 23:20 This determines the minimum number of memory clock cycles + * (minus 1) of nOE (nPWE) assert time for each beat of read (write) + * 19 ROM Bus Width (1 = 16 bits) + * 16-18 0 - Synchronous flash; 2 - burst 4; 3 - burst 8; 4 - Variable-latency + * I/O (VLIO) + */ + +#define PXA27X_CS_VAL 0x026C /* andrayk Nov 242 006: originally was 0x044C */ + + int cs = PXA27X_CS; + unsigned long val; + + if (resume == FALSE) + { PrintkInfo ("use Chip Select %d", cs); } + + /* Line below configures GPIO33 as output. + * Without this line, DiskOnChip driver fails to detect DiskOnChip G4. + */ + GPDR1 |= 0x2; /* was: GPDR1 = 0xfc3fab83 */ + + /* read chip select config reg */ + val = __REG(0x48000008 + ((cs / 2) * sizeof(long))); + + if (cs & 1) + val = ((PXA27X_CS_VAL << 16) | (val & 0xffff)); + else + val = ((val & 0xffff0000) | PXA27X_CS_VAL); + + /* write chip select config reg */ + __REG(0x48000008 + ((cs / 2) * sizeof(long))) = val; + + /* if DMA is requested, configure it */ + if (tffs_dma_mode > 0) + { + tffs_dma_init (resume); + } + + return 1; +} + + + +void TffsHWRelease(void) +{ + /* if DMA was actually used, release all DMA resources */ + if (tffs_dma_mode > 0) + { + tffs_dma_release (); + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ d m a _ i n i t * + * * + * This routine is called during module initialization time with 'resume'* + * argument set to FALSE, and from Power Manager's 'resume' routine with * + * 'resume' argument set to TRUE. If 'resume' is FALSE, this routine * + * allocates and initializes all required DMA resources; if 'resume' is * + * TRUE, this routine does minimal required re-initialization of DMA * + * channel after power suspend. * + * * + * Parameters: * + * resume FALSE (module initialization) or TRUE (power resume) * + * * + *-----------------------------------------------------------------------*/ +static +void tffs_dma_init (int resume) +{ + if (resume == FALSE) + { + /* We use single DMA channel for both 'read' and + * 'write' operations, so we allocate it here. + */ + if ((tffsInfo.channel = pxa_request_dma(TFFS_DEVICE_NAME, + DMA_PRIO_LOW, tffs_dma_intr, NULL)) < 0) + { + /* failed to allocate DMA channel, won't use DMA */ + tffs_dma_mode = 0; + + PrintkError ("can't get DMA chan"); + return; + } + PrintkInfo ("use DMA channel %d", tffsInfo.channel); + } + + DRCMR(tffsInfo.channel) = (DRCMR_MAPVLD | (tffsInfo.channel & 0x1f)); + __REG(0x400000a0) |= (1 << tffsInfo.channel); + + /* clear any pending DMA errors/interrupts */ + DCSR(tffsInfo.channel) = (DCSR_NODESC | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR); + + if (resume == FALSE) + { + tffsInfo.dma_buf_vptr = NULL; + tffsInfo.dma_buf_size = 0; + + if ((tffs_dma_mode >= 1) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) || !defined(PXA27X_DCACHE_BUG_WORKAROUND) + && (tffs_dma_mode <= 3) +#endif + ) + { + /* allocate intermediate DMA buffer (we assume one MMU page will be enough) */ + tffsInfo.dma_buf_size = PAGE_SIZE; + + tffsInfo.dma_buf_vptr = +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + consistent_alloc ((GFP_KERNEL | GFP_DMA), tffsInfo.dma_buf_size, + &tffsInfo.dma_buf_paddr); +#else + dma_alloc_coherent (NULL, tffsInfo.dma_buf_size, + &tffsInfo.dma_buf_paddr, (GFP_KERNEL | GFP_DMA)); +#endif + if (tffsInfo.dma_buf_vptr == NULL) + { + /* failed to allocate intermediate DMA buffer, won't use DMA */ + tffs_dma_mode = 0; + + pxa_free_dma (tffsInfo.channel); + + tffsInfo.channel = -1; + tffsInfo.dma_buf_size = 0; + + PrintkError ("can't alloc DMA buffer, won't use DMA"); + } + } + } +} + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ d m a _ r e l e a s e * + * * + * Release all previously allocated DMA resources (channel, intermediate * + * DMA buffer etc.). For Intel PXA27x (Mainstone) board. * + * * + *-----------------------------------------------------------------------*/ + +static +void tffs_dma_release(void) +{ + /* if previously was allocated, release DMA channel */ + if (tffsInfo.channel >= 0) + { + pxa_free_dma (tffsInfo.channel); + + tffsInfo.channel = -1; + } + + /* if previously was allocated, release intermediate DMA buffer */ + if (tffsInfo.dma_buf_vptr != NULL) + { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + consistent_free (tffsInfo.dma_buf_vptr, PAGE_SIZE, tffsInfo.dma_buf_paddr); +#else + dma_free_coherent (NULL, PAGE_SIZE, tffsInfo.dma_buf_vptr, tffsInfo.dma_buf_paddr); +#endif + tffsInfo.dma_buf_vptr = NULL; + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * _ _ d m a s w _ b r e a d * + * * + * Transfer data from DiskOnChip's I/O reguster to RAM buffer. * + * Example implementation For Intel PXA27x (Mainstone) board. * + * * + * Parameters: * + * off offset of DiskOnChip's I/O register from the base * + * of DiskOnChip window * + * vbuf virtual address of RAM buffer * + * bytes bytes to transfer * + * * + *-----------------------------------------------------------------------*/ +static +void __dmasw_bread ( int off, + void * vbuf, + unsigned int bytes ) +{ + int chan = tffsInfo.channel; + u_int tmp; + register int waiting; + register int direct_dma; + + profiling[2]++; + + direct_dma = ((tffs_dma_mode & 4) ? TRUE : FALSE); + + /* Due to a bug in kernel routine blk_dma_inv_range_harvard() + * (arch/arm/mm/blockops.c), we allow direct DMA to destination + * buffer 'vbuf' only when it's aligned at CPU's cache line boundary. + */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) && defined(PXA27X_DCACHE_BUG_WORKAROUND) + if ((u32)vbuf & 31) + direct_dma = FALSE; +#endif + + /* Set source physical address for DMA transfer (this would be DiskOnChip's + * I/O register which is located at offset 'off' from the DiskOnChip's + * base address as specified by tffs_addr[0]). + */ + DSADR(chan) = tffs_addr[0] + off; + + /* Set target physical address for DMA transfer. + * This would be physical address of intermediate DMA buffer (for + * DMA modes 1/2/3), or physical address of the destination buffer + * (for DMA modes 5/6/7). + */ + if (direct_dma == TRUE) /* do DMA transfer directly into 'vbuf' */ + { + if (virt_addr_valid((unsigned long)vbuf)) /* 'vbuf' is in low memory */ + { + DTADR(chan) = __pa (vbuf); + } + else /* 'vbuf' is in high memory */ + { + char * k_vbuf = (char *) page_address(vmalloc_to_page(vbuf)) + + ((unsigned long)vbuf & (PAGE_SIZE - 1)); + if (k_vbuf == NULL) + { + PrintkError ("error, DMA requested on high memory page"); + return; + } + + DTADR(chan) = __pa (k_vbuf); + + /* andrayk Nov 22 2006: possible bug. Routine consistent_alloc() + * (arch/arm/mm/consistent.c) applies __pa() macro to it's 'vbuf' + * argument (see below). This might cause CPU exception. + */ + } + + /* Write (if dirty) and purge contents of 'vbuf' from CPU cache(s) */ + /* Possible options: + * consistent_sync(vbuf, bytes, DMA_FROM_DEVICE); ARM/SH + * dma_cache_inv((unsigned long)vbuf, (unsigned long)bytes); MIPS/PPC/x86 + */ + +#ifdef PXA27X_DCACHE_BUG_WORKAROUND + + /* Routine blk_dma_inv_range_harvard() (arch/arm/mm/blockops.c) appears + * to be buggy: it seems to constantly shoot past the end of the address + * range [vbuf..vbuf+bytes] by 32 bytes. It also appears to write some + * bogus data into this RAM address range while invalidating it in D-cache. + */ + consistent_sync (vbuf, bytes - 1, DMA_FROM_DEVICE); +#else + consistent_sync (vbuf, bytes, DMA_FROM_DEVICE); +#endif + } + else /* transfer into intermediate DMA buffer */ + { + DTADR(chan) = tffsInfo.dma_buf_paddr; + } + + /* specify parameters of DMA transfer */ + tmp = DCMD_INCTRGADDR | /* increment target address */ + DCMD_WIDTH2 | /* 16-bit data path */ + /* DCMD_ENDIRQEN | */ /* don't generate interrupt at the end of transfer */ + bytes; + + if ((bytes & 31) == 0) + tmp |= DCMD_BURST32; /* 32-bytes burst */ + + DCMD(chan) = tmp; + + /* clear all status bits, and start DMA transfer */ + DCSR(chan) = (DCSR_RUN | DCSR_NODESC | DCSR_ENDINTR | DCSR_STOPSTATE | DCSR_BUSERR); + + /* poll DMA channel's status register for end of DMA transfer */ + for (waiting = 100000; waiting > 0; waiting--) /* hope this is long enough ... */ + { + /* read Channel Status Register to find out status of DMA transfer */ + tmp = DCSR (chan); + + if (tmp & (DCSR_STOPSTATE | DCSR_BUSERR)) + { + if ((tmp & DCSR_BUSERR) == 0) + { + /* DMA transfer completed, move data from the intermediate DMA + * buffer to the destination buffer (in case it was used). + */ + if (direct_dma == FALSE) + memcpy (vbuf, tffsInfo.dma_buf_vptr, bytes); + } + else + { + PrintkError ("Bus error, DMA transfer failed"); + /* andrayk Mar 24 2006: DMA transfer failed, find way to let MTD know this */ + } + return; + } + } + + PrintkError ("DMA transfer timed out"); +} + + + + +/*-----------------------------------------------------------------------* + * * + * _ _ d m a s w _ b w r i t e * + * * + * Transfer data from RAM buffer to DiskOnChip's I/O reguster. * + * Example implementation for Intel PXA27x (Mainstone) board. * + * * + * Parameters: * + * off offset of DiskOnChip's I/O register from the base * + * of DiskOnChip window * + * vbuf virtual address of RAM buffer * + * bytes bytes to transfer * + * * + *-----------------------------------------------------------------------*/ +static +void __dmasw_bwrite ( int off, + void * vbuf, + unsigned int bytes ) +{ + int chan = tffsInfo.channel; + u_int tmp; + register int waiting; + + profiling[3]++; + + /* Set target physical address for DMA transfer (this would be DiskOnChip's + * I/O register which is located at offset 'off' from the DiskOnChip's + * base address as specified by tffs_addr[0]). + */ + DTADR(chan) = tffs_addr[0] + off; + + /* set source physical address for DMA transfer */ + + if (tffs_dma_mode & 4) /* do DMA transfer directly from 'vbuf' */ + { + /* Write (if dirty) contents of 'vbuf' from CPU D-cache to RAM. + * Possible options: + * consistent_sync(vbuf, bytes, DMA_TO_DEVICE); ARM/SH + * dma_cache_wback((unsigned long)vbuf, (unsigned long)bytes); MIPS/PPC/x86 + */ + consistent_sync (vbuf, bytes, DMA_TO_DEVICE); + + if (virt_addr_valid((unsigned long)vbuf)) /* 'vbuf' is in low memory */ + { + DSADR(chan) = __pa (vbuf); + } + else /* 'vbuf' is in high memory */ + { + char * k_vbuf = (char *) page_address(vmalloc_to_page(vbuf)) + + ((unsigned long)vbuf & (PAGE_SIZE - 1)); + if (k_vbuf == NULL) + { + PrintkError ("error, DMA requested on high memory page"); + return; + } + + DSADR(chan) = __pa (k_vbuf); + } + } + else /* use intermediate DMA buffer */ + { + /* move data from RAM buffer to the intermediate DMA buffer */ + memcpy (tffsInfo.dma_buf_vptr, vbuf, bytes); + + DSADR(chan) = tffsInfo.dma_buf_paddr; + } + + /* specify parameters of DMA transfer */ + tmp = DCMD_INCSRCADDR | /* increment source address */ + DCMD_WIDTH2 | /* 16-bit data path */ + /* DCMD_ENDIRQEN | */ /* don't generate interrupt at the end of transfer */ + bytes; + + if ((bytes & 31) == 0) + tmp |= DCMD_BURST32; /* 32-bytes burst */ + + DCMD(chan) = tmp; + + /* clear all status bits, and start DMA transfer */ + DCSR(chan) = (DCSR_RUN | DCSR_NODESC | DCSR_ENDINTR | DCSR_STOPSTATE | DCSR_BUSERR); + + /* poll DMA channel's status register for end of DMA transfer */ + for (waiting = 100000; waiting > 0; waiting--) /* hope this is long enough ... */ + { + /* read Channel Status Register to find out status of DMA transfer */ + tmp = DCSR (chan); + + if (tmp & (DCSR_STOPSTATE | DCSR_BUSERR)) + { + if (tmp & DCSR_BUSERR) + { + PrintkError ("Bus error, DMA transfer failed"); + /* andrayk Mar 24 2006: DMA transfer failed, find way to let MTD know this */ + } + else + { + /* DMA transfer successful */ + } + return; + } + } + + PrintkError ("DMA transfer timed out"); +} + + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ d m a _ i n t r * + * * + * Handle DMA interrupt on Intel PXA27x (Mainstone) board. * + * * + * Parameters: * + * dma interrupting DMA channel * + * dummy not used * + * regs not used * + * * + *-----------------------------------------------------------------------*/ +static +void tffs_dma_intr ( int dma, + void * dummy, /* not used */ + struct pt_regs * regs ) /* not used */ +{ + register u_int tmp; + + profiling[4]++; + + /* check if interrupt came from our DMA channel */ + if (dma == tffsInfo.channel) + { + /* check if DMA transfer was successful */ + if ((tmp = DCSR(dma)) & DCSR_BUSERR) + { + /* andrayk Mar 24 2006: DMA transfer failed, find way to let MTD know this */ + PrintkError ("Bus error, DMA transfer failed"); + } + + /* clear DMA interrupt from this channel */ + DCSR(dma) = (tmp | (DCSR_BUSERR | DCSR_ENDINTR)); + } + else + { PrintkError ("received DMA interrupt on wrong channel"); } +} + + + + +#elif defined(CONFIG_OMAP_H2) || defined(CONFIG_MACH_OMAP_H2) + +/*_____________________________________________________________________________ + | | + | | + | Texas Instruments OMAP-1610 (H2) board | + | | + |____________________________________________________________________________| +*/ + +# include +# include + + /* + + EMIFS: Extended Memory Interface Slow. This 16-bit wide bus can interface + with and handle all transactions to flash memory, ROM, asynchronous + memories, and synchronous burst flash. + The EMIFS can support 16-bit interface width only. + TC: traffic controller + The EMIFS supports 8-,16-, or 32-bit asynchronous and synchronous + read, 4- x 32-bit synchronous burst read and 8-, 16-, or 32-bit + asynchronous write. + + EMIFS_PRIOR EMIFS LRU priority register FFFECC04 + EMIFS_CONFIG EMIFS configuration register FFFECC0C + EMIFS_CCS2 EMIFS chip-select configuration CS2 FFFECC18 + 7:4 RDWST Controls the wait states cycle number for asynchronous read operation and the initial idle time for asynchronous read page mode and synchronous read mode. + 15:12 PGWST/WELEN Controls the wait states cycle number between accesses in a page for asynchronous page mode. Controls the WE pulse length during a write access. When PGWSTEN is 0, this bit specifies both PGWST/WELEN. When PGWSTEN is 1, this bit specifies only WELEN + EMIFS_PTOR1 EMIFS dynamic priority time-out 1 FFFECC28 + EMIFS_PTOR2 EMIFS dynamic priority time-out 2 FFFECC2C + EMIFS_PTOR3 EMIFS dynamic priority time-out 3 FFFECC30 + EMIFS_DWS EMIFS dynamic wait states FFFECC40 + EMIFS_AADDR EMIFS abort address FFFECC44 + EMIFS_ATYPER EMIFS abort type FFFECC48 + EMIFS_ATOR EMIFS abort time-out FFFECC4C + EMIFS_ACS2 Advanced EMIFS chip-select configuration nCS2 FFFECC58 + + + EMIFS_CS2_CONFIG 0xFFFECC18 + BSP sets the reg val 0xf800f22a, but the val after kernel starts is 0xff80fff3 + + */ + + + + +/* + * static routines for OMAP1610 + */ + +static void tffs_dma_init (int resume); +static void tffs_dma_release (void); + + + +/* + * static vars + */ + +static dma_regs_t * dma_regs = NULL; + + + +/*-----------------------------------------------------------------------* + * * + * t f f s a r c h _ i n i t * + * * + * This routine is called during module initialization time with 'resume'* + * argument set to FALSE, and from Power Manager's 'resume' routine with * + * 'resume' argument set to TRUE. If 'resume' is FALSE, this routine * + * allocates and initializes all required board resources; if 'resume' * + * is TRUE, this routine does minimal required re-initialization of * + * these resources after power suspend. * + * * + * Parameters: * + * suspend FALSE (module initialization) or TRUE (power resume) * + * * + * Returns: * + * always '1' (success) * + * * + *-----------------------------------------------------------------------*/ + +unsigned char tffsarch_init (int resume) +{ + register unsigned short tmp16; + register unsigned long tmp32; + + /* Configure Chip Select that DiskOnChip is connected to. + * + * NOTE. Code below configures Chip Select to set duration of + * DiskOnChip access cycle to 70 nanosecond, which is + * appropriate for the case when DiskOnChip is connected to + * OMAP1610 board via M-Systems' adapters. If you solder + * DiskOnChip into your board, consider changing Chip Select + * settings to significantly shorten DiskOnChip acecss cycle. + * This should have significant positive efefct on + * DiskOnChip's 'read' performance. + */ + tmp32 = (1 << 27) | /* wait states between accesses in a page for async. page mode */ + (1 << 23) | /* idle cycles for bus turn around */ + (0 << 16) | /* asynchronous read */ + (1 << 12) | /* WE length */ + (0 << 8) | /* wait states in write operation */ + (0 << 4) | /* wait states in read operation */ + 2; /* REF_CLK = TC_CK / 2 */ + +#define OMAP1610_H2_CS 2 /* chip select that DiskOnChip is connected to */ + + outl (tmp32, (EMIFS_CS0_CONFIG + (OMAP1610_H2_CS * sizeof(unsigned long)))); + + if (tffs_irq >= 0) + { + /* Configure GPIO-9 as input. This is actually a default state + * after reset, but just to be sure ... + */ + tmp16 = inw (GPIO_DIRECTION_REG); + outw ((tmp16 | (1 << (tffs_irq - IH_GPIO_BASE))), GPIO_DIRECTION_REG); + + /* configure DiskOnChip IRQ as GPIO-9, disable PullDown */ + outl( (inl(PULL_DWN_CTRL_2) | (1 << 23)), PULL_DWN_CTRL_2); + + /* select function W8 pin as GPIO-9 */ + outl( (inl(FUNC_MUX_CTRL_B) & 0xFF1FFFFF), FUNC_MUX_CTRL_B); + } + +# if 0 + volatile unsigned long*reg; + unsigned long ulTemp; + + /* configure DMAREQ# as MPUIO4, disable PullDown */ + ulTemp = *(volatile unsigned long*) 0xFFFE1044; + ulTemp |= 0x00002000; /* 0x1<<13; */ + *(volatile unsigned long *)0xFFFE1044 = (unsigned long)ulTemp; + + /* select function DMA_REQ tffsInfo.channel 6 */ + ulTemp = *(volatile unsigned long*) 0xFFFE1020; + ulTemp |= 0x8000; /* 0x1<<15; */ + *(volatile unsigned long *)0xFFFE1020 = (unsigned long)ulTemp; + + /* configure mDoc IRQ# as GPIO-9, disable PullDown */ + /* TH: For H2 Platform */ + ulTemp = *(volatile unsigned long*) 0xFFFE1048; + ulTemp |= 0x800000; /* 0x1<<23; */ + *(volatile unsigned long *)0xFFFE1048 = (unsigned long)ulTemp; + + /* select function W8 pin as GPIO-9 */ + ulTemp = *(volatile unsigned long*) (0xFFFE1030); + ulTemp &= 0xFF1FFFFF; + *(volatile unsigned long *)(0xFFFE1030) = (unsigned long)ulTemp; + + reg=(unsigned long*)EMIFS_CONFIG_REG; + PrintkInfo("EMIFS_CONFIG_REG=0x%lx",*reg); + *reg=0x0c; + reg=(unsigned long*)EMIFS_CONFIG_REG; + PrintkInfo("EMIFS_CONFIG_REG=0x%lx",*reg); + + reg=(unsigned long*)EMIFS_CS2_CONFIG2; + PrintkInfo("EMIFS_CS2_CONFIG2=0x%lx",*reg); + + reg=(unsigned long*)EMIFS_CS2_CONFIG; + PrintkInfo("EMIFS_CS2_CONFIG=0x%lx",*reg); + *reg=0x8070; + reg=(unsigned long*)EMIFS_CS2_CONFIG; + PrintkInfo("EMIFS_CS2_CONFIG=0x%lx",*reg); +# endif + + /* if DMA is requested, configure it */ + if (tffs_dma_mode > 0) + { + tffs_dma_init (resume); + } + + return 1; +} + + + +void TffsHWRelease(void) +{ + /* if DMA was actually used, release all DMA resources */ + if (tffs_dma_mode > 0) + { + tffs_dma_release (); + } +} + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ d m a _ i n i t * + * * + * This routine is called during module initialization time with 'resume'* + * argument set to FALSE, and from Power Manager's 'resume' routine with * + * 'resume' argument set to TRUE. If 'resume' is FALSE, this routine * + * allocates and initializes all required DMA resources; if 'resume' is * + * TRUE, this routine does minimal required re-initialization of DMA * + * channel after power suspend. * + * * + * Parameters: * + * resume FALSE (module initialization) or TRUE (power resume) * + * * + *-----------------------------------------------------------------------*/ +static +void tffs_dma_init (int resume) +{ + u32 tmp; + + if (resume == FALSE) + { + /* We use single DMA channel for both 'read' and 'write' operations, + * so we allocate it here. We don't use DMA interrupts, so we won't + * need DMA callback. + */ + tffsInfo.channel = + omap_request_dma (eDMANotSync, /* not connected to any DMA line */ + TFFS_DEVICE_NAME, + NULL, /* no callback when DMA completes */ + NULL, /* data to pass to DMA callback */ + &dma_regs); + if ((tffsInfo.channel != 0) || (dma_regs == NULL)) + { + /* failed to allocate DMA channel, won't use DMA */ + tffs_dma_mode = 0; + + PrintkError ("can't get DMA chan"); + return; + } + } + + /* Logical Channel Control Register. + * Specify peripheral DMA transfer. + */ + dma_regs->lch_ctrl = LCH_TYPE_P; + + /* Channel Element Number Register. + * Specify single element (16-bit word) per DMA frame. + */ + dma_regs->cen = 1; + + /* Channel Control Register 2. + * Specify block synchronization. + */ + dma_regs->ccr2 = (1 << 2); + + /* Channel Interrupt Control Register. + * Enable time-out interrupt, disable all others. + */ + dma_regs->cicr = /* (1 << 5) | */ /* end-of-block interrupt */ + 1; /* timeout interrupt */ + + /* read Channel Status register to clear it */ + tmp = dma_regs->csr; + + if (resume == FALSE) + { + tffsInfo.dma_buf_vptr = NULL; + tffsInfo.dma_buf_size = 0; + + if ((tffs_dma_mode >= 1) && (tffs_dma_mode <= 3)) + { + /* allocate intermediate DMA buffer (we assume one MMU page will be enough) */ + tffsInfo.dma_buf_size = PAGE_SIZE; + + tffsInfo.dma_buf_vptr = +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + consistent_alloc ((GFP_KERNEL | GFP_DMA), tffsInfo.dma_buf_size, + &tffsInfo.dma_buf_paddr); +#else + dma_alloc_coherent (NULL, tffsInfo.dma_buf_size, + &tffsInfo.dma_buf_paddr, (GFP_KERNEL | GFP_DMA)); +#endif + if (tffsInfo.dma_buf_vptr == NULL) + { + /* failed to allocate intermediate DMA buffer, won't use DMA */ + tffs_dma_mode = 0; + + omap_free_dma (dma_regs); + dma_regs = NULL; + + tffsInfo.dma_buf_size = 0; + PrintkError ("can't alloc DMA buffer"); + } + } + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ d m a _ r e l e a s e * + * * + * Release all previously allocated DMA resources (channel, intermediate * + * DMA buffer etc.). For OMAP1610 (H2) board. * + * * + *-----------------------------------------------------------------------*/ +static +void tffs_dma_release(void) +{ + /* if previously was allocated, release DMA channel */ + if (tffsInfo.channel == 0) + { + omap_free_dma (dma_regs); + dma_regs = NULL; + + tffsInfo.channel = -1; + } + + /* if previously was allocated, release intermediate DMA buffer */ + if (tffsInfo.dma_buf_vptr != NULL) + { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + consistent_free (tffsInfo.dma_buf_vptr, PAGE_SIZE, tffsInfo.dma_buf_paddr); +#else + dma_free_coherent (NULL, PAGE_SIZE, tffsInfo.dma_buf_vptr, tffsInfo.dma_buf_paddr); +#endif + tffsInfo.dma_buf_vptr = NULL; + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * _ _ d m a s w _ b r e a d * + * * + * Transfer data from DiskOnChip's I/O reguster to RAM buffer. * + * Example implementation For Texas Instruments OMAP1610 H2 board. * + * * + * Parameters: * + * off offset of DiskOnChip's I/O register from the base * + * of DiskOnChip window * + * vbuf virtual address of RAM buffer * + * bytes bytes to transfer * + * * + *-----------------------------------------------------------------------*/ +static +void __dmasw_bread ( int off, + void * vbuf, + unsigned int bytes ) +{ + register u32 tmp; + register int waiting; + + profiling[2]++; + + /* Channel Source/Destination Parameters. + * Specify 16-bit port width, EMIFS source, allow source packing, + * 4-words burst allowed for source, EMIFF destination. allow + * destination packing, 4-words burst allowed for destination. + */ + dma_regs->csdp = (BURST_4 << 14) | /* dest.: use 4-word burst */ + DCSDP_DST_PACK | /* pack dest. */ + (PORT_EMIFF << 9) | /* dest. is EMIFF (RAM) */ + (BURST_4 << 7) | /* source: use 4-word burst */ + DCSDP_SRC_PACK | /* pack source */ + (PORT_EMIFS << 2) | /* source is EMIFS (DiskOnChip) */ + DATA_TYPE_S16; /* 16-bit data path */ + + /* Channel Control Register. + * Specify no synchronization, no OMAP 3.0/3.1 compatibility, no + * frame synchronization, high priority, constant source address, + * post-increment destination address. + */ + dma_regs->ccr = (AMODE_POST_INC << 14) | /* dest (RAM): post-increment */ + (AMODE_CONST << 12) | /* source (DiskOnChip) : const addr. */ + DCCR_N31COMP | /* no OMAP 3.0/3.1 compatibility */ + DCCR_PRIO; /* high priority */ + + /* Channel Frame Number Register. + * We assume that frame consists of single element, and element + * consists of single 16-bit word. + */ + dma_regs->cfn = (bytes / sizeof(u16)); + + /* Channel Source Start Address Registers. This would be DiskOnChip's + * I/O register which is located at offset 'off' from the DiskOnChip's + * base address as specified by tffs_addr[0]). + */ + tmp = tffs_addr[0] + off; + dma_regs->cssa_u = (tmp >> 16); + dma_regs->cssa_l = (tmp & 0xffff); + + /* Channel Destination Start Address Registers */ + if (tffs_dma_mode & 4) /* do DMA transfer directly into 'vbuf' */ + { + if (virt_addr_valid((unsigned long)vbuf)) /* 'vbuf' is in low memory */ + { + tmp = __pa (vbuf); + } + else /* 'vbuf' is in high memory */ + { + char * k_vbuf = (char *) page_address(vmalloc_to_page(vbuf)) + + ((unsigned long)vbuf & (PAGE_SIZE - 1)); + tmp = __pa (k_vbuf); + } + + /* write (if dirty) and purge contents of 'vbuf' from CPU cache(s) */ +#if 1 + /* D-cache only. Possible options: + * flush_dcache_range((unsigned long)vbuf, (unsigned long)(vbuf + bytes)); ARM/PPC + * consistent_sync(vbuf, bytes, PCI_DMA_BIDIRECTIONAL); ARM/PPC + * dma_cache_wback_inv((unsigned long)vbuf, (unsigned long)bytes); MIPS/PPC/SH/x86 + */ + flush_dcache_range ((unsigned long)vbuf, (unsigned long)(vbuf + bytes)); +#else + /* both D- and I-caches */ + cpu_cache_clean_invalidate_range ((unsigned long)vbuf, (unsigned long)(vbuf + bytes), 1); +#endif + } + else /* transfer into intermediate DMA buffer */ + { + tmp = tffsInfo.dma_buf_paddr; + } + dma_regs->cdsa_u = (tmp >> 16); + dma_regs->cdsa_l = (tmp & 0xffff); + + /* start DMA channel */ + dma_regs->ccr |= DCCR_EN; + + /* wait for DMA transfer to finish */ + for (waiting = 100000; waiting > 0; waiting--) /* hope this is long enough ... */ + { + if (((tmp = dma_regs->ccr) & DCCR_EN) == 0) + { + /* read Channel Status Register to clear it */ + if (((tmp = dma_regs->csr) & DCSR_ERROR) == 0) + { + /* DMA transfer completed, move data from the intermediate DMA + * buffer to the destination buffer (in case it was used). + */ + if ((tffs_dma_mode & 4) == 0) + memcpy (vbuf, tffsInfo.dma_buf_vptr, bytes); + } + else /* andrayk June 13 2006: DMA transfer failed, find way to let MTD know this */ + { + PrintkError ("Bus error, DMA transfer failed"); + } + return; + } + } + + PrintkError ("DMA transfer timed out"); +} + + + + +/*-----------------------------------------------------------------------* + * * + * _ _ d m a s w _ b w r i t e * + * * + * Transfer data from RAM buffer to DiskOnChip's I/O reguster. * + * Example implementation For Texas Instruments OMAP1610 H2 board. * + * * + * Parameters: * + * off offset of DiskOnChip's I/O register from the base * + * of DiskOnChip window * + * vbuf virtual address of RAM buffer * + * bytes bytes to transfer * + * * + *-----------------------------------------------------------------------*/ +static +void __dmasw_bwrite ( int off, + void * vbuf, + unsigned int bytes ) +{ + register u32 tmp; + register int waiting; + + profiling[3]++; + + /* Channel Source/Destination Parameters. + * Specify 16-bit port width, EMIFF source, allow source packing, + * 4-words burst allowed for source, EMIFS destination. allow + * destination packing, 4-words burst allowed for destination. + */ + dma_regs->csdp = (BURST_4 << 14) | /* dest.: use 4-word burst */ + DCSDP_DST_PACK | /* pack dest. */ + (PORT_EMIFS << 9) | /* dest. is EMIFS (DiskOnChip) */ + (BURST_4 << 7) | /* source: use 4-word burt */ + DCSDP_SRC_PACK | /* pack source */ + (PORT_EMIFF << 2) | /* source is EMIFF (RAM) */ + DATA_TYPE_S16; /* 16-bit data path */ + + /* Channel Control Register. + * Specify no synchronization, no OMAP 3.0/3.1 compatibility, no + * frame synchronization, high priority, constant dest. address, + * post-increment source address. + */ + dma_regs->ccr = (AMODE_CONST << 14) | /* dest. (DiskOnChip): const addr. */ + (AMODE_POST_INC << 12) | /* source (RAM): post-increment */ + DCCR_N31COMP | /* no OMAP 3.1/3.0 compatibility */ + DCCR_PRIO; /* high priority */ + + /* Channel Frame Number Register. + * We assume that frame consists of single elemnt, and element consists + * of single 16-bit word. + */ + dma_regs->cfn = (bytes / sizeof(u16)); + + /* Channel Source Start Address Registers */ + if (tffs_dma_mode & 4) /* do DMA transfer directly from 'vbuf' */ + { + /* Write (if dirty) contents of 'vbuf' from CPU D-cache to RAM. + * Possible options: + * clean_dcache_range((unsigned long)vbuf, (unsigned long)(vbuf + bytes)); ARM/PPC + * consistent_sync(vbuf, bytes, PCI_DMA_TODEVICE); ARM/PPC + * dma_cache_wback((unsigned long)vbuf, (unsigned long)bytes); MIPS/PPC/SH/x86 + */ + clean_dcache_range ((unsigned long)vbuf, (unsigned long)(vbuf + bytes)); + + if (virt_addr_valid((unsigned long)vbuf)) /* 'vbuf' is in low memory */ + { + tmp = __pa (vbuf); + } + else /* 'vbuf' is in high memory */ + { + char * k_vbuf = (char *) page_address(vmalloc_to_page(vbuf)) + + ((unsigned long)vbuf & (PAGE_SIZE - 1)); + tmp = __pa (k_vbuf); + } + } + else /* use intermediate DMA buffer */ + { + /* move data from RAM buffer to the intermediate DMA buffer */ + memcpy (tffsInfo.dma_buf_vptr, vbuf, bytes); + + tmp = tffsInfo.dma_buf_paddr; + } + dma_regs->cssa_u = (tmp >> 16); + dma_regs->cssa_l = (tmp & 0xffff); + + /* Channel Destination Start Address Regist.This would be DiskOnChip's + * I/O register which is located at offset 'off' from the DiskOnChip's + * base address as specified by tffs_addr[0]). + */ + tmp = tffs_addr[0] + off; + dma_regs->cdsa_u = (tmp >> 16); + dma_regs->cdsa_l = (tmp & 0xffff); + + /* start DMA channel */ + dma_regs->ccr |= DCCR_EN; + + /* poll DMA channel's status register for end of DMA transfer */ + for (waiting = 100000; waiting > 0; waiting--) /* hope this is long enough ... */ + { + if (((tmp = dma_regs->ccr) & DCCR_EN) == 0) + { + if ((tmp = dma_regs->csr) & DCSR_ERROR) /* andrayk June 14 2006: DMA transfer failed, find way to let MTD know this */ + { + PrintkError ("Bus error, DMA transfer failed"); + } + return; + } + } + + PrintkError ("DMA transfer timed out"); +} + + + +#elif defined(CONFIG_ARCH_OMAP24XX) + +/*_____________________________________________________________________________ + | | + | | + | Texas Instruments OMAP-2420 (H4) board | + | | + |____________________________________________________________________________| +*/ + +# include +# include +/* # include */ /* conflicts with */ +# include +# include + +/* Routine blk_dma_inv_range_harvard() (arch/arm/mm/blockops.c) appears + * to be buggy: it seems to constantly shoot past the end of the address + * range [vbuf..vbuf+bytes] by 32 bytes. It also appears to write some + * bogus data into this RAM address range while invalidating it in D-cache. + */ +# define OMAP2420_DCACHE_BUG_WORKAROUND + + +# ifndef OMAP_DMA4_CCR_EN +# define OMAP_DMA4_CCR_EN (1 << 7) +# endif + +# define GPMC_CONFIG1_CS2 0xC0 /* phys. addr. 0x6800A0C0 */ +# define GPMC_CONFIG2_CS2 (GPMC_CONFIG1_CS2 + 0x4) /* phys. addr. 0x6800A0C4 */ +# define GPMC_CONFIG3_CS2 (GPMC_CONFIG1_CS2 + 0x8) /* phys. addr. 0x6800A0C8 */ +# define GPMC_CONFIG4_CS2 (GPMC_CONFIG1_CS2 + 0xC) /* phys. addr. 0x6800A0CC */ +# define GPMC_CONFIG5_CS2 (GPMC_CONFIG1_CS2 + 0x10) /* phys. addr. 0x6800A0D0 */ +# define GPMC_CONFIG6_CS2 (GPMC_CONFIG1_CS2 + 0x14) /* phys. addr. 0x6800A0D4 */ +# define GPMC_CONFIG7_CS2 (GPMC_CONFIG1_CS2 + 0x18) /* phys. addr. 0x6800A0D8 */ + +# ifndef OMAP2420_GPIO_SET_IRQENABLE1 +# define OMAP2420_GPIO_SET_IRQENABLE1 0x0064 +# endif +# ifndef OMAP2420_GPIO_CLEAR_IRQENABLE1 +# define OMAP2420_GPIO_CLEAR_IRQENABLE1 0x0060 +# endif +# ifndef OMAP2420_GPIO_IRQSTATUS1 +# define OMAP2420_GPIO_IRQSTATUS1 0x0018 +# endif +# ifndef OMAP2420_GPMC_BASE +# define OMAP2420_GPMC_BASE OMAP24XX_GPMC_BASE +# endif + +/* layout of DMA channel's registers */ +typedef struct { + volatile u32 ccr; /* Channel Control Register */ + volatile u32 clnk; /* Channel Link Control */ + volatile u32 cicr; /* Channel Interrupt Control Register */ + volatile u32 csr; /* Channel Status Register */ + volatile u32 csdp; /* Channel Source / Destination Parameters */ + volatile u32 cen; /* Channel Element Number */ + volatile u32 cfn; /* Channel Frame Number */ + volatile u32 cssa; /* Channel Source Start Address */ + volatile u32 cdsa; /* Channel Destination Start Address */ + volatile u32 csei; /* Channel Source Element Index */ + volatile u32 csfi; /* Channel Source Frame Index */ + volatile u32 cdei; /* Channel Destination Element Index */ + volatile u32 cdfi; /* Channel Destination Frame Index */ + volatile u32 csac; /* Channel Source Address Counter */ + volatile u32 cdac; /* Channel Destination Address Counter */ + volatile u32 ccen; /* Channel Current Element Number */ + volatile u32 ccfn; /* Channel Current Frame Number */ +} __dma_reg_t; + + +/* + * static routines for OMAP2420 + */ +static void tffs_dma_init (int resume); +static void tffs_dma_release (void); + + +/* + * static vars + */ +static __dma_reg_t * dma_regs_vptr = NULL; + + + +void omap24xx_enable_gpio_irq (int gpio_irq, int enable) +{ + register u32 gpio_line = gpio_irq - IH_GPIO_BASE; + register u32 bit = OMAP_GPIO_BIT(gpio_line); + register u32 base_reg = OMAP_GPIO_BASE_REG(gpio_line); + unsigned int val = 0; + + if (enable == TRUE) + { + writel (bit, (base_reg + OMAP2420_GPIO_SET_IRQENABLE1)); + __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4"::"r"(val)); /* memory barrier */ + + omap_set_gpio_edge_ctrl (gpio_line, OMAP_GPIO_LEVEL_LOW); + } + else + { + omap_set_gpio_edge_ctrl (gpio_line, 0); + + writel (bit, (base_reg + OMAP2420_GPIO_CLEAR_IRQENABLE1)); + __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4"::"r"(val)); /* memory barrier */ + + writel (bit, (base_reg + OMAP2420_GPIO_IRQSTATUS1)); + __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4"::"r"(val)); /* memory barrier */ + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * t f f s a r c h _ i n i t * + * * + * This routine is called during module initialization time with 'resume'* + * argument set to FALSE, and from Power Manager's 'resume' routine with * + * 'resume' argument set to TRUE. If 'resume' is FALSE, this routine * + * allocates and initializes all required board resources; if 'resume' * + * is TRUE, this routine does minimal required re-initialization of * + * these resources after power suspend. For OMAP2420 (H4) board. * + * * + * Parameters: * + * suspend FALSE (module initialization) or TRUE (power resume) * + * * + * Returns: * + * always '1' (success) * + * * + *-----------------------------------------------------------------------*/ + +unsigned char tffsarch_init (int resume) +{ + register int tmp; + char * vp; + + if ((vp = (char *)ioremap_nocache(OMAP2420_GPMC_BASE, PAGE_SIZE)) == NULL) + { + PrintkError ("ioremap_nocache failed"); + } + else + { + /* Configure Chip Select that DiskOnChip is connected to. + * + * NOTE. Code below configures Chip Select to set duration of + * DiskOnChip access cycle to 65 nanosecond, which is + * appropriate for the case when DiskOnChip is connected to + * OMAP2420 board via M-Systems' adapters. If you solder + * DiskOnChip into your board, consider changing Chip Select + * settings to significantly shorten DiskOnChip acecss cycle. + * This should have significant positive efefct on + * DiskOnChip's 'read' performance. + */ + + tmp = (0 << 31) | /* synchronous wrapping burst not supported */ + (0 << 30) | /* single access */ + (0 << 29) | /* asynchronous read */ + (0 << 28) | /* single access */ + (0 << 27) | /* write asynchronous */ + (0 << 25) | /* start access time at first rising edge of GPMC.CLK */ + (0 << 23) | /* burst length 4 words */ + (0 << 22) | /* wait pin not monitored for read access */ + (0 << 21) | /* wait pin not monitored for write access */ + (0 << 18) | /* wait pin is monitored with valid data */ + (0 << 16) | /* wait input pin is WAIT0 */ + (1 << 12) | /* 16-bit device */ + (0 << 10) | /* NOR flash, pSRAM, or asynchronous device */ + (1 << 9) | /* address/data multiplexed attached device */ + (0 << 4) | /* x1 latencies */ + (3 << 0); /* GPMC.CLK = GPMC_FCLK/4 */ + writel (tmp /* 0x00001203 */, vp + GPMC_CONFIG1_CS2); + + tmp = (6 << 16) | /* nCS assertion time for write access */ + (6 << 8) | /* nCS assertion time for read access */ + (0 << 7) | /* nCS timing sygnal is not delayed */ + (0 << 0); /* nCS assertion time */ + writel (tmp /* 0x00060600 */, vp + GPMC_CONFIG2_CS2); + + tmp = (1 << 16) | /* nADV deassertion time for write access */ + (1 << 8) | /* nADV deassertion time for read access */ + (0 << 7) | /* nADV timing control sygnal is not delayed */ + (0 << 0); /* nADV assertion time */ + writel (tmp /* 0x00010100 */, vp + GPMC_CONFIG3_CS2); + + tmp = (5 << 24) | /* nWE deassertion time */ + (0 << 23) | /* nWE timing control sygnal is not delayed */ + (2 << 16) | /* nWE assertion time */ + (6 << 8) | /* nOE deassertion time */ + (0 << 7) | /* nOE timing control sygnal is not delayed */ + (2 << 0); /* nOE assertion time */ + writel (tmp /* 0x05020602 */, vp + GPMC_CONFIG4_CS2); + + tmp = (1 << 24) | /* delay between successive words in multiple access */ + (5 << 16) | /* delay between start-cycle and first data valid */ + (7 << 8) | /* total write cycle time in GPMC_FCLK cycles */ + (7 << 0); /* total read cycle time in GPMC_FCLK cycles */ + writel (tmp /* 0x01050707 */, vp + GPMC_CONFIG5_CS2); + + /* Map Chips Select CS2 at physical address 0x10000000 (as + * specified by macro TFFS_PHYS_ADDR). + */ + tmp = 0x00000F50; + writel (tmp, vp + GPMC_CONFIG7_CS2); + + iounmap (vp); + } + + if (tffs_irq >= 0) + { + register int gpio_line = (tffs_irq - IH_GPIO_BASE); + + if( omap_request_gpio(gpio_line) == 0 ) + { + register u8 x = readb (OMAP24XX_VA_SYSTEM_CONTROL_BASE + 0x10c); + + /* set GPIO function (mux mode 3), disable pullup/pulldown */ + x &= ~(MUXMODE_MASK); + x |= 3; + x &= ~(PULL_UD_ENABLE_MASK); + writeb (x, OMAP24XX_VA_SYSTEM_CONTROL_BASE + 0x10c); + + /* configure this GPIO line as input */ + omap_set_gpio_direction (gpio_line, TRUE); + + /* configure GPIO interrupt as level-low for this GPIO line */ +#if 0 + omap_set_gpio_edge_ctrl (gpio_line, /* OMAP_GPIO_LEVEL_LOW */ OMAP_GPIO_FALLING_EDGE); +#endif + } + else + { + PrintkWarning ("failed to get IRQ %d", tffs_irq); + tffs_irq = -1; + } + } + + /* if DMA is requested, configure it */ + if (tffs_dma_mode > 0) + { + tffs_dma_init (resume); + } + + return 1; +} + + + + +void TffsHWRelease(void) +{ + /* if DMA was actually used, release all DMA resources */ + if (tffs_dma_mode > 0) + { + tffs_dma_release (); + } + + /* if IRQ was actually used, release respective GPIO resources */ + if (tffs_irq >= 0) + { + register int gpio_line = (tffs_irq - IH_GPIO_BASE); + + omap_free_gpio (gpio_line); + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ d m a _ i n i t * + * * + * This routine is called during module initialization time with 'resume'* + * argument set to FALSE, and from Power Manager's 'resume' routine with * + * 'resume' argument set to TRUE. If 'resume' is FALSE, this routine * + * allocates and initializes all required DMA resources; if 'resume' is * + * TRUE, this routine does minimal required re-initialization of DMA * + * channel after power suspend. For OMAP2420 (H4) board. * + * * + * Parameters: * + * suspend FALSE (module initialization) or TRUE (power resume) * + * * + *-----------------------------------------------------------------------*/ +static +void tffs_dma_init (int resume) +{ + register u32 tmp; + int rc; + + if (resume == FALSE) + { + /* We use single DMA channel for both 'read' and 'write' operations, + * so we allocate it here. We don't use DMA interrupts, so we won't + * need DMA callback. + */ + rc = omap_request_dma (0, + TFFS_DEVICE_NAME, + NULL, /* no callback when DMA completes */ + NULL, /* data to pass to DMA callback */ + &tffsInfo.channel); + + if ((rc != 0) || (tffsInfo.channel < 0) || + (tffsInfo.channel >= OMAP24XX_LOGICAL_DMA_CH_COUNT)) + { + /* failed to allocate DMA channel, won't use DMA */ + tffs_dma_mode = 0; + + PrintkError ("can't get DMA chan"); + return; + } + else + { + PrintkInfo ("use DMA channel %d", tffsInfo.channel); + + /* virt. address of DMA channel's register set */ + dma_regs_vptr = (__dma_reg_t *) + (OMAP_DMA4_BASE + (0x60 * tffsInfo.channel) + 0x80); + } + } + + /* Channel Control Register */ + tmp = (0 << 25) | /* buffering enabled */ + (0 << 24) | /* destination triggers DMA request */ + (1 << 23) | /* prefetch enabled */ + (0 << 21) | /* secure mode disabled */ + (0 << 19) | /* no synchronization */ + (1 << 18) | /* block synchronization */ + (0 << 17) | /* transaparent copy disabled */ + (0 << 16) | /* constant fill disabled */ + (1 << 14) | /* post-increment destination address */ + (0 << 12) | /* constant source address */ + (0 << 8) | /* ignore MSUSPEND */ + (0 << 7) | /* channel disabled (stopped) */ + (1 << 6) | /* high priority channel */ + (0 << 5) | /* no frame synchronization */ + (0 << 0); /* no synchronization (i.e. s/w DMA) */ + writel (tmp, &dma_regs_vptr->ccr); + + /* Channel Frame Number Register. + * We assume that frame consists of single element. + */ + writel (1, &dma_regs_vptr->cfn); + + /* Channel Interrupt Control Register. + * Disable all interrupts - we will be polling DMA controller. + */ + tmp = /* OMAP_DMA_DROP_IRQ | */ /* synchronization drop */ + /* OMAP_DMA_BLOCK_IRQ | */ /* end-of-block interrupt */ + /* (1 << 11) | */ /* misaligned address error */ + /* (1 << 8) | */ /* transaction error */ + 0; + writel (tmp, &dma_regs_vptr->cicr); + + /* Channel Status Register. + * Write all-ones to clear any pending interrupts. + */ + writel (~0, &dma_regs_vptr->csr); + + if (resume == FALSE) + { + tffsInfo.dma_buf_vptr = NULL; + tffsInfo.dma_buf_size = 0; + + if ((tffs_dma_mode >= 1) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) || !defined(OMAP2420_DCACHE_BUG_WORKAROUND) + && (tffs_dma_mode <= 3) +#endif + ) + { + /* allocate intermediate DMA buffer (we assume one MMU page will be enough) */ + tffsInfo.dma_buf_size = PAGE_SIZE; + + tffsInfo.dma_buf_vptr = +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + consistent_alloc ((GFP_KERNEL | GFP_DMA), tffsInfo.dma_buf_size, + &tffsInfo.dma_buf_paddr); +#else + dma_alloc_coherent (NULL, tffsInfo.dma_buf_size, + &tffsInfo.dma_buf_paddr, (GFP_KERNEL | GFP_DMA)); +#endif + if (tffsInfo.dma_buf_vptr == NULL) + { + /* failed to allocate intermediate DMA buffer, won't use DMA */ + tffs_dma_mode = 0; + + omap_free_dma (tffsInfo.channel); + + tffsInfo.channel = -1; + tffsInfo.dma_buf_size = 0; + + dma_regs_vptr = NULL; + + PrintkError ("can't alloc DMA buffer, won't use DMA"); + } + } + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * t f f s _ d m a _ r e l e a s e * + * * + * Release all previously allocated DMA resources (channel, intermediate * + * DMA buffer etc.). For OMAP2420 (H4) board. * + * * + *-----------------------------------------------------------------------*/ +static +void tffs_dma_release(void) +{ + /* if previously was allocated, release DMA channel */ + if (tffsInfo.channel >= 0) + { + omap_free_dma (tffsInfo.channel); + + tffsInfo.channel = -1; + dma_regs_vptr = NULL; + } + + /* if previously was allocated, release intermediate DMA buffer */ + if (tffsInfo.dma_buf_vptr != NULL) + { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + consistent_free (tffsInfo.dma_buf_vptr, PAGE_SIZE, tffsInfo.dma_buf_paddr); +#else + dma_free_coherent (NULL, PAGE_SIZE, tffsInfo.dma_buf_vptr, tffsInfo.dma_buf_paddr); +#endif + tffsInfo.dma_buf_vptr = NULL; + } +} + + + + +/*-----------------------------------------------------------------------* + * * + * _ _ d m a s w _ b r e a d * + * * + * Transfer data from DiskOnChip's I/O reguster to RAM buffer. * + * Example implementation For Texas Instruments OMAP2420 H4 board. * + * * + * Parameters: * + * off offset of DiskOnChip's I/O register from the base * + * of DiskOnChip window * + * vbuf virtual address of RAM buffer * + * bytes bytes to transfer * + * * + *-----------------------------------------------------------------------*/ +static +void __dmasw_bread ( int off, + void * vbuf, + unsigned int bytes ) +{ + register __dma_reg_t * regs = dma_regs_vptr; + register u32 tmp, tmp2; + register int waiting; + register int direct_dma; + + profiling[2]++; + + direct_dma = ((tffs_dma_mode & 4) ? TRUE : FALSE); + + /* Due to a bug in kernel routine blk_dma_inv_range_harvard() + * (arch/arm/mm/blockops.c), we allow direct DMA to destination + * buffer 'vbuf' only when it's aligned at CPU's cache line boundary. + */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) && defined(OMAP2420_DCACHE_BUG_WORKAROUND) + if ((u32)vbuf & 31) + direct_dma = FALSE; +#endif + + /* Channel Source/Destination Parameters */ + tmp = (0 << 21) | /* little-endian source (DiskOnChip) */ + (1 << 20) | /* source endianism lock */ + (0 << 19) | /* little-endian destination (SDRAM) */ + (1 << 18) | /* destination endianism adapt */ + (1 << 16) | /* writes (to SDRAM) posted */ + (3 << 14) | /* 64-byte burst on destination (SDRAM) */ + (1 << 13) | /* destination (SDRAM) packed */ + (3 << 7) | /* 64-byte burst on source (DiskOnChip) */ + (1 << 6) | /* source (DiskOnChip) packed */ + (1 << 0) ; /* 16-bit data port width */ + writel (tmp, ®s->csdp); + + /* Channel Control Register */ + tmp2 = (0 << 25) | /* buffering enabled */ + (0 << 24) | /* destination triggers DMA request */ + (1 << 23) | /* prefetch enabled */ + (0 << 21) | /* secure mode disabled */ + (0 << 19) | /* no synchronization */ + (1 << 18) | /* block synchronization */ + (0 << 17) | /* transaparent copy disabled */ + (0 << 16) | /* constant fill disabled */ + (1 << 14) | /* post-increment destination address */ + (0 << 12) | /* constant source address */ + (0 << 8) | /* ignore MSUSPEND */ + (0 << 7) | /* channel disabled (stopped) */ + (1 << 6) | /* high priority channel */ + (0 << 5) | /* no frame synchronization */ + (0 << 0); /* no synchronization (i.e. s/w DMA) */ + writel (tmp2, ®s->ccr); + + /* Channel Element Number Register */ + writel ((bytes >> 1), ®s->cen); + + /* Channel Source Start Address Register. + * This would be DiskOnChip's I/O register which is located at offset + * 'off' from the DiskOnChip's base address as specified by tffs_addr[0]). + */ + writel ((tffs_addr[0] + off), ®s->cssa); + + /* Channel Destination Start Address Register. + * This would be physical address of intermediate DMA buffer (for + * DMA modes 1 and 3), or physical address of the destination buffer + * (for DMA modes 5 and 7). + */ + if (direct_dma == TRUE) /* do DMA transfer directly into 'vbuf' */ + { + if (virt_addr_valid((unsigned long)vbuf)) /* 'vbuf' is in low memory */ + { + tmp = __pa (vbuf); + } + else /* 'vbuf' is in high memory */ + { + char * k_vbuf = (char *) page_address(vmalloc_to_page(vbuf)) + + ((unsigned long)vbuf & (PAGE_SIZE - 1)); + if (k_vbuf == NULL) + { + PrintkError ("error, DMA requested on high memory page"); + return; + } + + tmp = __pa (k_vbuf); + } + + /* Write (if dirty) and purge contents of 'vbuf' from CPU cache(s) */ + /* Possible options: + * consistent_sync(vbuf, bytes, DMA_FROM_DEVICE); ARM/SH + * dma_cache_inv((unsigned long)vbuf, (unsigned long)bytes); MIPS/PPC/x86 + */ +#ifdef OMAP2420_DCACHE_BUG_WORKAROUND + /* Routine blk_dma_inv_range_harvard() (arch/arm/mm/blockops.c) appears + * to be buggy: it seems to constantly shoot past the end of the address + * range [vbuf..vbuf+bytes] by 32 bytes. It also appears to write some + * bogus data into this RAM address range while invalidating it in D-cache. + */ + consistent_sync (vbuf, bytes - 1, DMA_FROM_DEVICE); +#else + consistent_sync (vbuf, bytes, DMA_FROM_DEVICE); +#endif + + } + else /* transfer into intermediate DMA buffer */ + { + tmp = tffsInfo.dma_buf_paddr; + } + writel (tmp, ®s->cdsa); + + /* Channel Status Register. + * Write all-ones to clear any pending interrupts. + */ + writel (~0, ®s->csr); + + /* start DMA channel by setting ENABLED bit in Channel Control Register */ + writel ((tmp2 | OMAP_DMA4_CCR_EN), ®s->ccr); + + /* we don't want to see any of these DMA errors */ + tmp2 = (1 << 11) | /* misaligned error */ + (1 << 9) | /* secure transaction error */ + (1 << 8) | /* transaction error */ + (1 << 1); /* synchronization drop */ + + /* Wait for DMA transfer to finish (ENABLED bit in + * Channel Control Register changes to zero). + */ + for (waiting = 100000; waiting > 0; waiting--) /* hope this is long enough ... */ + { + if( readl(®s->ccr) & OMAP_DMA4_CCR_EN ) + continue; + + /* read Channel Status Register to find out status of DMA transfer */ + tmp = readl(®s->csr) & tmp2; + + /* write all-ones to clear any pending interrupts */ + writel (~0, ®s->csr); + + /* any errors ? */ + if (tmp == 0) + { + /* DMA transfer successfully completed, move data from intermediate + * DMA buffer to destination buffer (in case it was used). + */ + if (direct_dma == FALSE) + memcpy (vbuf, tffsInfo.dma_buf_vptr, bytes); + } + else /* andrayk June 13 2006: DMA transfer failed, find way to let MTD know this */ + { + PrintkError ("DMA transfer failed"); + } + return; + } + + PrintkError ("DMA transfer timed out"); +} + + + + +/*-----------------------------------------------------------------------* + * * + * _ _ d m a s w _ b w r i t e * + * * + * Transfer data from RAM buffer to DiskOnChip's I/O reguster. * + * Example implementation For Texas Instruments OMAP2420 H4 board. * + * * + * Parameters: * + * off offset of DiskOnChip's I/O register from the base * + * of DiskOnChip window * + * vbuf virtual address of RAM buffer * + * bytes bytes to transfer * + * * + *-----------------------------------------------------------------------*/ +static +void __dmasw_bwrite ( int off, + void * vbuf, + unsigned int bytes ) +{ + register __dma_reg_t * regs = dma_regs_vptr; + register u32 tmp, tmp2; + register int waiting; + + profiling[3]++; + + /* Channel Source/Destination Parameters */ + tmp = (0 << 21) | /* little-endian source (SDRAM) */ + (1 << 20) | /* source endianism locked */ + (0 << 19) | /* little-endian dest. (DiskOnChip) */ + (1 << 18) | /* destination endianism locked */ + (1 << 16) | /* writes (to DiskOnChip) posted */ + (0 << 14) | /* 64-byte burst on dest. (DiskOnChip) */ + (1 << 13) | /* destination (DiskOnChip) packed */ + (3 << 7) | /* 64-byte burst on source (SDRAM) */ + (1 << 6) | /* source (SDRAM) packed */ + (1 << 0) ; /* 16-bit data port width */ + writel (tmp, ®s->csdp); + + /* Channel Control Register */ + tmp2 = (0 << 25) | /* buffering enabled */ + (1 << 24) | /* source triggers DMA request */ + (1 << 23) | /* prefetch enabled */ + (0 << 21) | /* secure mode disabled */ + (0 << 19) | /* no synchronization */ + (1 << 18) | /* block synchronization */ + (0 << 17) | /* transaparent copy disabled */ + (0 << 16) | /* constant fill disabled */ + (0 << 14) | /* constant destination address */ + (1 << 12) | /* post-increment source address */ + (0 << 8) | /* ignore MSUSPEND */ + (0 << 7) | /* channel disabled (stopped) */ + (1 << 6) | /* high priority channel */ + (0 << 5) | /* no frame synchronization */ + (0 << 0); /* no synchronization (i.e. s/w DMA) */ + writel (tmp2, ®s->ccr); + + /* Channel Element Number Register */ + writel ((bytes >> 1), ®s->cen); + + /* Channel Source Start Address Register. + * This would be physical address of intermediate DMA buffer (for + * DMA modes 2 and 3), or physical address of the destination buffer + * (for DMA modes 6 and 7). + */ + if (tffs_dma_mode & 4) /* do DMA transfer directly from 'vbuf' */ + { + /* Write (if dirty) contents of 'vbuf' from CPU D-cache to RAM. + * Possible options: + * consistent_sync(vbuf, bytes, DMA_TO_DEVICE); ARM/SH + * dma_cache_wback((unsigned long)vbuf, (unsigned long)bytes); MIPS/PPC/x86 + */ + consistent_sync (vbuf, bytes, DMA_TO_DEVICE); + + if (virt_addr_valid((unsigned long)vbuf)) /* 'vbuf' is in low memory */ + { + tmp = __pa (vbuf); + } + else /* 'vbuf' is in high memory */ + { + char * k_vbuf = (char *) page_address(vmalloc_to_page(vbuf)) + + ((unsigned long)vbuf & (PAGE_SIZE - 1)); + if (k_vbuf == NULL) + { + PrintkError ("error, DMA requested on high memory page"); + return; + } + + tmp = __pa (k_vbuf); + } + } + else /* use intermediate DMA buffer */ + { + /* move data from RAM buffer to the intermediate DMA buffer */ + memcpy (tffsInfo.dma_buf_vptr, vbuf, bytes); + + tmp = tffsInfo.dma_buf_paddr; + } + writel (tmp, ®s->cssa); + + /* Channel Destination Start Address Register. + * This would be DiskOnChip's I/O register which is located at offset + * 'off' from the DiskOnChip's base address as specified by tffs_addr[0]). + */ + writel ((tffs_addr[0] + off), ®s->cdsa); + + /* Channel Status Register. + * Write all-ones to clear any pending interrupts. + */ + writel (~0, ®s->csr); + + /* start DMA channel by setting ENABLED bit in Channel Control Register */ + writel ((tmp2 | OMAP_DMA4_CCR_EN), ®s->ccr); + + /* we don't want to see any of these DMA errors */ + tmp2 = (1 << 11) | /* misaligned error */ + (1 << 9) | /* secure transaction error */ + (1 << 8) | /* transaction error */ + (1 << 1); /* synchronization drop */ + + /* Wait for DMA transfer to finish (ENABLED bit in + * Channel Control Register changes to zero). + */ + for (waiting = 100000; waiting > 0; waiting--) /* hope this is long enough ... */ + { + if( readl(®s->ccr) & OMAP_DMA4_CCR_EN ) + continue; + + /* read Channel Status Register to find out status of DMA transfer */ + tmp = readl(®s->csr) & tmp2; + + /* write all-ones to clear any pending interrupts */ + writel (~0, ®s->csr); + + /* any errors ? */ + if (tmp != 0) /* andrayk June 13 2006: DMA transfer failed, find way to let MTD know this */ + { + PrintkError ("DMA transfer failed"); + } + return; + } + + PrintkError ("DMA transfer timed out"); +} + + + + +#elif defined(CONFIG_OMAP_OSK) + +/*_____________________________________________________________________________ + | | + | | + | Texas Instruments OMAP OSK board | + | | + |____________________________________________________________________________| +*/ + + +unsigned char tffsarch_init (int resume) +{ + (*(short*)0xFFFEC808) = 0x00F5; + (*(short*)0xFFFEC808) = 0x00A0; + return 1; +} + +void TffsHWRelease(void) +{ } + +static void __dmasw_bread (int off, void * vbuf, unsigned int bytes) +{ } + +static void __dmasw_bwrite (int off, void * vbuf, unsigned int bytes) +{ } + + + + +#elif defined(CONFIG_ARCH_LUBBOCK) + +/*_____________________________________________________________________________ + | | + | | + | Intel PXA25x ("Lubbock") board | + | | + |____________________________________________________________________________| +*/ + +# define MSC2_CNTR_REG_ADDR 0x48000000 +# define MSC2_OFFSET 0x10 +# define MCS5_INIT_VAL 0xFFF80000 + +unsigned char tffsarch_init (int resume) +{ + volatile void *myMSC2ptr; + unsigned long msc2Val; + + myMSC2ptr = (volatile void *)ioremap_nocache(MSC2_CNTR_REG_ADDR, 0x1000); + /* MSC2 Static Memory Control Register - 16-bit mode for CS5 */ + msc2Val = readl( myMSC2ptr + MSC2_OFFSET ); + writel( ((msc2Val & 0x0000FFFF) | MCS5_INIT_VAL), myMSC2ptr + MSC2_OFFSET ); + /* *(myMCS5 + 4) = MCS5_INIT_VAL; */ + iounmap( (void *)myMSC2ptr); + + return 1; +} + +static void __dmasw_bread (int off, void * vbuf, unsigned int bytes) +{ } + +static void __dmasw_bwrite (int off, void * vbuf, unsigned int bytes) +{ } + + + + +#else /* ARCH */ + +/*_____________________________________________________________________________ + | | + | | + | All other boards | + | | + |____________________________________________________________________________| +*/ + +unsigned char tffsarch_init (int resume) +{ + return 1; +} + +void TffsHWRelease(void) +{ } + +static void __dmasw_bread (int off, void * vbuf, unsigned int bytes) +{ } + +static void __dmasw_bwrite (int off, void * vbuf, unsigned int bytes) +{ } + +#endif /* ARCH */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsarch.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsarch.h new file mode 100755 index 00000000..dce399c3 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsarch.h @@ -0,0 +1,174 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + +#ifndef TFFSARCH_H +#define TFFSARCH_H + + + +/* + * includes + */ + +#include +//#include +#include + + +/* + * Physical address of DiskOnChip device. + * + * M-Systems provides default values for variety of popular boards (see also + * documentation for respective DiskOnChip adaptors for these boards). If you + * are using different board, you'll need to define TFFS_PHYS_ADDR as + * appropriate for your system. + */ +#if defined(CONFIG_ARCH_MAINSTONE) || defined(CONFIG_MACH_MAINSTONE) +# define TFFS_PHYS_ADDR 0x14000000 /* chip select CS5 on Intel PXA27x Mainstone */ +#elif defined(CONFIG_ARCH_LUBBOCK) +# define TFFS_PHYS_ADDR 0x14000000 +#elif defined(CONFIG_ARCH_OMAP24XX) +# define TFFS_PHYS_ADDR 0x10000000 /* chip select CS2 on Texas Instruments OMAP2420 */ +#elif defined(CONFIG_OMAP_H2) || defined(CONFIG_MACH_OMAP_H2) +# define TFFS_PHYS_ADDR 0x8000000 +#elif defined(CONFIG_OMAP_OSK) +# define TFFS_PHYS_ADDR 0x6000000 +#elif defined(CONFIG_M386) || defined(CONFIG_M486) || defined(CONFIG_M586) || defined(CONFIG_M586TSC) || defined(CONFIG_M586MMX) || defined(CONFIG_M686) || defined(CONFIG_MPENTIUMIII) || defined(CONFIG_MPENTIUM4) +# define TFFS_PHYS_ADDR 0xd0000 +#else +# define TFFS_PHYS_ADDR 0 +#endif +extern unsigned long tffs_addr []; + + +/* + * Board's IRQ line that DiskOnChip's IREQ is connected to. + * + * M-Systems provides default values for variety of popular boards (see also + * documentation for respective DiskOnChip adaptors for these boards). If you + * are using different board, you'll need to define TFFS_IRQ as + * appropriate for your system, or set it to (-1) if you don't want to use + * DiskOnChip IREQ. + */ +#if defined(CONFIG_ARCH_MAINSTONE) || defined(CONFIG_MACH_MAINSTONE) +# define TFFS_IRQ MAINSTONE_IRQ(7) /* Intel PXA27x ("Mainstone") */ +#elif defined(CONFIG_ARCH_LUBBOCK) +# define TFFS_IRQ (-1) +#elif defined(CONFIG_ARCH_OMAP24XX) +# define TFFS_IRQ (-1) /* OMAP_GPIO_IRQ_NO(94), if using GPIO line 94 */ +#elif defined(CONFIG_OMAP_H2) || defined(CONFIG_MACH_OMAP_H2) /* Texas Instruments OMAP1610 SDP ("H2") */ +# define TFFS_IRQ (-1) /* was INT_GPIO_9, or numerically 169 */ +#elif defined(CONFIG_OMAP_OSK) +# define TFFS_IRQ (-1) +#elif defined(CONFIG_M386) || defined(CONFIG_M486) || defined(CONFIG_M586) || defined(CONFIG_M586TSC) || defined(CONFIG_M586MMX) || defined(CONFIG_M686) || defined(CONFIG_MPENTIUMIII) || defined(CONFIG_MPENTIUM4) +# define TFFS_IRQ (-1) +#else +# define TFFS_IRQ (-1) +#endif + + +/* # define FL_XSCALE_BOOT_MODE */ + + +/* DiskOnChip driver uses 'flRead512Bytes' macro to transfer 512-bytes of + * data from DiskOnChip to destination RAM buffer. We check if s/w DMA + * is enabled for 'read' operations, and if buffer is properly aligned. + * If they are, we use s/w DMA to transfer data; otherwise we use TrueFFS' + * internal C loops to transfer data in 16-bit short words. + */ + extern int tffs_dma_mode; + + extern void tffs_readw (unsigned long io_vaddr, short *vbuf, int words); + extern void tffs_writew (unsigned long io_vaddr, short *vbuf, int words); + extern void tffs_dmasw (char *win, int off, void *vbuf, unsigned int bytes, int read); + +#if defined(CONFIG_ARCH_MAINSTONE) || defined(CONFIG_MACH_MAINSTONE) || defined(CONFIG_OMAP_H2) || defined(CONFIG_MACH_OMAP_H2) || defined(CONFIG_ARCH_OMAP24XX) + +# define flReadEvenNumberOfBytes(flash,off,vbuf,bytes) \ + ( \ + ((tffs_dma_mode & 1) && ((bytes) >= 512) && ((((long)(vbuf)) & (sizeof(long) - 1)) == 0)) \ + ? \ + tffs_dmasw(((char*)((flash)->win)),(off),(vbuf),(bytes),1) \ + : \ + tffs_readw(((unsigned long)(((char *)((flash)->win)) + (off))),((short*)(vbuf)),((bytes) / sizeof(short))) \ + ) + +# define flWriteEvenNumberOfBytes(flash,off,vbuf,bytes) \ + ( \ + ((tffs_dma_mode & 2) && ((bytes) >= 512) && ((((long)(vbuf)) & (sizeof(long) - 1)) == 0)) \ + ? \ + tffs_dmasw(((char*)((flash)->win)),(off),(vbuf),(bytes),0) \ + : \ + tffs_writew(((unsigned long)((char*)((flash)->win) + (off))),((short*)(vbuf)),((bytes) / sizeof(short))) \ + ) + +#else /* not Mainstone/OMAP1610/OMAP2420 */ + +# define flReadEvenNumberOfBytes(flash,off,vbuf,bytes) \ + tffs_readw(((unsigned long)((char*)((flash)->win) + (off))),((short*)(vbuf)),((bytes) / sizeof(short))) + +# define flWriteEvenNumberOfBytes(flash,off,vbuf,bytes) \ + tffs_writew(((unsigned long)((char*)((flash)->win) + (off))),((short*)(vbuf)),((bytes) / sizeof(short))) + +#endif /* ARCH */ + + + +/* DiskOnChip driver uses DOCHBLK_READ and DOCHBLK_WRITE macros to transfer + * data from and from (respectively) DiskOnChip H3 devices. + */ +# define DOCHBLK_READ(reg_base,vbuf,sectors) dochblk_read((vbuf),(sectors)) +# define DOCHBLK_WRITE(reg_base,vbuf,sectors) dochblk_write((vbuf),(sectors)) + +# if 0 /* andrayk June 23 2006: added for H3 burst */ +# define DOCHREAD_BURST(reg_base,offset,vbuf,sectors) dochblk_read((vbuf),(sectors)) +# define DOCHWRITE_BURST(reg_base,offset,vbuf,sectors) dochblk_write((vbuf),(sectors)) +#endif + +extern int dochblk_read (void *vbuf, unsigned int sectors); +extern int dochblk_write (void *vbuf, unsigned int sectors); + + +extern unsigned char tffsarch_init (int resume_flag); +extern void TffsHWRelease (void); + + +#ifdef CONFIG_ARCH_OMAP24XX + extern void omap24xx_enable_gpio_irq (int gpio_irq, int enable); +#endif + + +#endif /* TFFSARCH_H */ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsdrv.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsdrv.h new file mode 100755 index 00000000..5d7a2bf2 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsdrv.h @@ -0,0 +1,312 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + +#ifndef __TFFSDRV_H__ +#define __TFFSDRV_H__ + +/* this driver is for 2.[4/5/6].x versions of Linux kernels */ +#include +#ifndef KERNEL_VERSION +# define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) +#endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,7,0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0)) +# error "unsupported Linux kernel version" +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)) +# include +#endif + +#if (LINUX_VERSION_CODE +# else +# include +# endif +# endif +#endif + +#include + +#if (LINUX_VERSION_CODE>KERNEL_VERSION(2,5,0)) +# include +#endif + +#include /* kmalloc() */ +#include /* HDIO_GETGEO */ +#include /* ...lock_kernel() */ +#include /* ...mem_region() */ +#include +#include /* ok_access(), put_usr(), get_user() */ +#include +#include /* struct ext2_super_block */ /* only for ext filter */ +#include /* mdelay() */ +#include +#include +#include /* blk_ioctl() */ +#include /* for SIOCDEVPRIVATE */ /* only for 2.6.x */ +#include /* 2.4.18 for lubbock don't want to work w/o this */ + +//#include +#include + +#include + +#include +#include +#include + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) +# include +# include +#endif + +#include "flcustom.h" +#include "tffsarch.h" + +#ifdef CONFIG_PROC_FS +# include +#endif + +/* definitions for blk.h */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) +extern int tffs_major; +# define MAJOR_NR tffs_major +# define DEVICE_ON +# define DEVICE_OFF(d) +# define DEVICE_NR(device) (MINOR(device)>>DEV2PART_SHIFT) +# define DEVICE_NO_RANDOM +# include +#else +# include +#endif +/* end of blk.h definitions */ + +#ifdef TFFS_DEBUG_DRIVER +# define PrintkDebug(fmt,args...) printk(KERN_DEBUG TFFS_DEVICE_NAME": "fmt"\n",## args) +/* # define PrintkDebug(fmt,args...) printk(KERN_ERR TFFS_DEVICE_NAME": "fmt"\n",## args) */ +#else /* TFFS_DEBUG_DRIVER */ +# define PrintkDebug(fmt,args...) +#endif /* TFFS_DEBUG_DRIVER */ +#define PrintkInfo(fmt,args...) printk(KERN_INFO TFFS_DEVICE_NAME": "fmt"\n",## args) +#define PrintkError(fmt,args...) printk(KERN_ERR TFFS_DEVICE_NAME": "fmt"\n",## args) +#define PrintkWarning(fmt,args...) printk(KERN_WARNING TFFS_DEVICE_NAME": "fmt"\n",## args) + +#ifdef TFFS_STATISTIC + +typedef struct +{ + unsigned long dwReadReq; /* total 'read' requests received by driver */ + unsigned long dwReadReqNoThread; /* number of these requests done by DeviceRequest() */ + unsigned long dwAbsReadSec; /* total sectors read */ + unsigned long dwAlReadSec; /* aligned 512-byte sectors read */ + unsigned long dwUnalReadSec; /* unaligned 512-byte sectors read */ + unsigned long dwAlReadShared; /* aligned shared 512-byte sectors read */ + unsigned long dwUnalReadShared; /* unaligned shared 512-byte sectors read */ + unsigned long dwAbsRead; /* total flAbsRead() calls */ + unsigned long dwWriteReq; /* total 'write' requests received by driver */ + unsigned long dwAbsWriteSec; /* total sectors written */ + unsigned long dwAlWriteSec; /* aligned 512-byte sectors written */ + unsigned long dwUnalWriteSec; /* unaligned 512-byte sectors written */ + unsigned long dwAlWriteShared; /* aligned shared 512-byte sectors written */ + unsigned long dwUnalWriteShared; /* unaligned shared 512-byte sectors written */ + unsigned long dwAbsWrite; /* total flAbsWrite() calls */ +}TffsStatistic; + +#endif /* TFFS_STATISTIC */ + +struct tagDeviceInfo; + +typedef struct +{ + struct tagDeviceInfo*pDevices; + unsigned short wDevices; /* should be WORD to allow left shift to 5 */ + struct list_head requestsList; /* list of requests from IO queue */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) + spinlock_t request_list_lock; +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) + struct completion wait_for_io_thread; /* wait for socket's I/O thread to start/stop */ + struct completion wait_for_irq; /* wait for DiskOnChip interrupt */ +#else + struct semaphore threadSemaphore; /* wait for socket's I/O thread to start/stop */ + struct semaphore sleep_sem; /* used to wait for erase/write completion */ +#endif + + wait_queue_head_t waitQueueHead; /* wait queue for thread and flSleep */ + int io_thread_state; + unsigned char bHandle; /* socket, as ioreq.irHandle */ + char * pCache; + int fFound; + unsigned long dwPhysAddr,dwVirtAddr,dwMappedLen; + int fMemRequested; +}SocketInfo; + +/* #ifdef TFFS_USE_EXT_FILTER */ +struct tagSectInfo; +typedef struct tagSectInfo +{ + unsigned long dwSector; /* no of sector on device */ + unsigned short bSectors; /* length */ + struct tagSectInfo*pParent,*pPrev,*pNext; + unsigned char bFlag; +#define EXTF_PT 0x01 /* empty part table space */ +#define EXTF_HAS_PT 0x02 /* has written part table */ +#define EXTF_SB 0x04 /* empty super block space */ +#define EXTF_HAS_SB 0x08 /* has superblock written, but no group descriptors */ +#define EXTF_HAS_GD 0x10 /* has superblock and group descriptors */ +#define EXTF_BB 0x20 /* block bitmap was allocated and waiting for group description */ +#define EXTF_HAS_BB 0x40 /* has block bitmap */ +#ifdef TFFS_DEBUG_DRIVER + int no; /* part no */ + unsigned long dwOffset; /* PT */ + unsigned long dwFirstSectorOfBitmap; /* BB */ + unsigned long dwExt3Flags; /* SB */ +#else + unsigned long dw; +#define dwOffset dw +#define dwFirstSectorOfBitmap dw +#define dwExt3Flags dw +#endif /* TFFS_DEBUG_DRIVER */ + unsigned long dwBlocksPerBitmap; /* SB and BB */ + unsigned char bSect2BlockShift; /* SB */ + unsigned short wGroups; /* SB */ +}SectInfo; +/* #endif TFFS_USE_EXT_FILTER */ + +typedef struct tagDeviceInfo +{ + SocketInfo*pSocket; + unsigned char diskNo; /* disk # (zero-based) */ + unsigned char bHandle; /* socket & partition, as ioreq.irHandle */ + unsigned long dwSize; /* device size */ + int in_use; + unsigned short wHWSectorSize; /* hw sector size in driver */ + unsigned short wTffsHWSectorSizeShift; /* shared sectors size in tffs */ + unsigned char fAbsMounted; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) + struct gendisk * gd; /* struct gendisk allocated for this disk */ + struct request_queue * rq; /* disk's request queue */ + spinlock_t rq_lock; /* request queue lock */ +#else + request_queue_t requestQueue; +#endif + +/* #ifdef TFFS_USE_EXT_FILTER */ + SectInfo sect[2]; + SectInfo **pCache; +/* #endif */ + + unsigned short wCyl; + unsigned char bHead,bSect; + +#ifdef TFFS_STATISTIC + TffsStatistic stat; /* various disk statistics */ +#endif + +#ifdef CONFIG_PROC_FS + struct proc_dir_entry * pProcFile; +#endif +}DeviceInfo; + +typedef struct +{ + unsigned char wDevices; + SocketInfo sockets[FL_SOCKETS]; + DeviceInfo*ppDevices[FL_VOLUMES]; + +#if defined(TFFS_PARTITIONABLE) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) + struct gendisk genDisk; +#endif + +#ifdef CONFIG_PROC_FS + struct proc_dir_entry*pProcDir; +#endif + + int channel; /* assume only one DMA connected */ + dma_addr_t dma_buf_paddr; /* physical address of DMA buffer */ + void * dma_buf_vptr; /* virtual address of DMA buffer */ + int dma_buf_size; /* size of DMA buffer in bytes */ + +}TffsInfo; + +extern TffsInfo tffsInfo; +extern int tffs_sg_bufsize; + +#define VMalloc(size) vmalloc((size)+4) +#define KMalloc(size) kmalloc((size)+4,GFP_KERNEL) + +/* DiskOnChip driver's minor version number */ +#define TFFS_DRV_VER 85 + + +/* driver's generic suspend/resume power management routines */ +extern void tffs_suspend (void); +extern void tffs_resume (void); + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) +# ifdef CONFIG_PM +# include + extern int tffs_pm_init (void); + extern int tffs_pm_exit (void); + extern int tffs_pm_allowed (SocketInfo * pSoc, int flag); +# endif + +# ifdef CONFIG_DPM +# include + extern int tffs_dpm_register (void); + extern int tffs_dpm_unregister (void); +# endif +#endif + + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) && defined (CONFIG_PM) +# include +# if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)) +# include +# endif + extern int tffs_pm_init (void); + extern int tffs_pm_exit (void); +#endif + + +#endif /* __TFFSDRV_H__*/ diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsdrv26.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsdrv26.c new file mode 100755 index 00000000..6594868f --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsdrv26.c @@ -0,0 +1,1902 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + +#include "tffsdrv.h" + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) + +#include "tffs2lnx.h" +#include "flbase.h" + + + +MODULE_AUTHOR("M-Systems"); +MODULE_DESCRIPTION("TrueFFS driver"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE(TFFS_SUPPORTED_DEVICE); + + + +/* + * module parameters + */ + +/* major device # to use */ +int tffs_major = 100; +module_param(tffs_major, int, S_IRUGO); +MODULE_PARM_DESC(tffs_major, "major device number, zero to use dynamic."); + +/* priority of driver's I/O threads */ +static int tffs_prio = 0; /* max -20, min 19 */ +module_param(tffs_prio, int, (S_IRUGO | S_IWUSR)); +MODULE_PARM_DESC(tffs_prio,"priority of DiskOnChip I/O thread."); + +/* interrupt line that DiskOnChip's IREQ is connected to */ +int tffs_irq = TFFS_IRQ; +module_param(tffs_irq, int, S_IRUGO); +MODULE_PARM_DESC(tffs_irq, "Interrupt line DiskOnChip's IREQ is connected to."); + +/* DMA mode. Allowed modes are: + * 0 (don't use DMA) + * 1 (use s/w DMA in read operations only; uses intermediate DMA buffer) + * 2 (use s/w DMA in write operations only; uses intermediate DMA buffer) + * 3 (combined 1 and 2) + * 5 (use s/w DMA for direct transfers from user source buffers) + * 6 (use s/w DMA for direct transfers to user dest. buffers) + * 7 (combined 5 and 6) + * Default is don't use DMA. + */ +int tffs_dma_mode = 0; +module_param(tffs_dma_mode, int, S_IRUGO); +MODULE_PARM_DESC(tffs_dma_mode, "DMA mode (0, 1, 2, 3, 5, 6 or 7)."); + +/* Automatic Deep PowerDown mode. Allowed modes are 0 (default; disabled), + * or 1 (enabled). When enabled, Automatic Deep PowerDown mode will cause + * DiskOnChip driver to power down DiskOnChip after completion of every + * read/write operation, and power it up again before starting the next one. + */ +int tffs_auto_dpd = FL_OFF; +module_param(tffs_auto_dpd, int, S_IRUGO); +MODULE_PARM_DESC(tffs_auto_dpd, "Powerdown DiskOnChip after every operation (1), or don't (0)."); + +/* Upon completion of every read/write access, DiskOnChip H3 devices + * immediately switch from the normal mode into the idle mode, and stay + * in the idle mode for 'DOCH_DPD_DEFAULT_DPD_TIMEOUT' milliseconds before + * switching into deep-power-down mode. + */ +int tffs_dpd_timeout = 1; +module_param(tffs_dpd_timeout, int, S_IRUGO); +MODULE_PARM_DESC(tffs_dpd_timeout, "Time (in milliseconds) before DiskOnChip automatically powers itself down."); + +/* Read data from DiskOnChip into scatter/gather buffer, then scatter it to + * destination buffers. Allowed values are TRUE (scatter data) or FALSE (don't). + */ +int tffs_sg_read = TRUE; +module_param(tffs_sg_read, int, S_IRUGO); +MODULE_PARM_DESC(tffs_sg_read, "Use scatter/gather during read operations."); + +/* Gather data from source buffers into scatter/gather buffer before writing + * it to DiskOnChip. Allowed values are TRUE (gather data) or FALSE (don't). + */ +int tffs_sg_write = TRUE; +module_param(tffs_sg_write, int, S_IRUGO); +MODULE_PARM_DESC(tffs_sg_write, "Use scatter/gather during write operations."); + +/* size of scatter/gather buffer in bytes; must be multiple of PAGE_SIZE */ +int tffs_sg_bufsize = (16 * PAGE_SIZE); +module_param(tffs_sg_bufsize, int, S_IRUGO); +MODULE_PARM_DESC(tffs_sg_bufsize, "Size of scatter/gather buffer, in bytes."); + + + + +/* + * macros + */ +#ifndef _MIN +# define _MIN(a,b) ((a) < (b) ? (a) : (b)) +#endif + + + + +/* + * types + */ +struct scatter_t /* scatter buffer for READ requests */ +{ + char * buf; /* starting address */ + char * pcurrent; + unsigned int size; /* size of buffer in bytes */ + unsigned int remaining_bytes; + sector_t start_sector; /* starting disk sector # */ + unsigned int sectors; /* remaining sectors in this request */ +}; + +struct gather_t /* gather buffer for WRITE requests */ +{ + char * buf; /* starting address */ + char * free; /* free part fo the buffer */ + unsigned int size; /* size of buffer in bytes */ + unsigned int free_bytes; /* remaining free space in bytes */ + sector_t start_sector; /* starting disk sector # */ +}; + + + + +/* + * global vars + */ +int write_requests = 0; + + + + +/* + * static routines + */ +static int /* __init */ __tffs_module_init (void); +static void /* __init */ init_socket (SocketInfo *psoc); +static void /* __init */ init_disk (DeviceInfo *pdisk); +static void /* __exit */ release_socket (SocketInfo *psoc); +static void /* __exit */ release_disk (DeviceInfo * pdisk); +static void cleanup (int STEP); + +static void disk_request_queue_handler (struct request_queue * q); +static int socket_io_thread (void *arg); +static int requests_to_do (SocketInfo *psoc); +static void do_requests_list (SocketInfo *psoc); +static int do_write_request (struct request *r); +static int do_read_request (struct request *r); +static int rw_bio_no_sg (struct request * r, DeviceInfo *pdisk, int rw); +static int write_bio (struct request * r, struct gather_t *gather, DeviceInfo *pdisk); +static int read_bio (struct request * r, struct scatter_t *scatter, DeviceInfo *pdisk); + + +static int disk_open (struct block_device *blk_dev, fmode_t mode); +static int disk_close (struct gendisk *gd, fmode_t mode); +static int disk_ioctl (struct block_device *blk_dev, fmode_t mode, unsigned int cmd, unsigned long arg); + +static irqreturn_t interrupt_handler (int irq, void *psoc/*, struct pt_regs *regs*/); + +#ifdef CONFIG_PROC_FS + static int /* __init */ procfs_register (DeviceInfo *pdisk); + static int /* __exit */ procfs_unregister (DeviceInfo *pdisk); + static int procfs_write (struct file* file, const char* buffer, unsigned long count, void* data); + static int procfs_read (char* buffer, char** start, off_t offset, int length, int* eof, void* data); +#endif + + + + +/* + * static vars + */ +static struct semaphore open_close_mutex; /* used to serialize disk open/close calls */ + +static char tffs_str[] = TFFS_DEVICE_NAME; + +static struct block_device_operations tffs_bdev_ops = +{ + .open = disk_open, + .release = disk_close, + .ioctl = disk_ioctl, + .owner = THIS_MODULE +}; + +/* for tracking enabled/disabled state of IRQ that DiskOnChip is connected to */ +static spinlock_t __irq_lock = SPIN_LOCK_UNLOCKED; +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_MAINSTONE) || defined(CONFIG_MACH_MAINSTONE) + static int __irq_enabled = TRUE; +#else + static int __irq_enabled = FALSE; +#endif + + + + +/******************************************************************************* + * * + * t f f s _ m o d u l e _ i n i t * + * * + * Module initialization routine. * + * * + * Parameters: none * + * * + * Returns: zero if success, otherwise standard negative error code * + * * + *******************************************************************************/ + +int /* __init */ tffs_module_init (void) +{ +# ifdef TRACE32 /* needed for section relocation in TRACE32 */ + extern int trace32_data; + extern int trace32_bss; + extern const int trace32_rodata; + printk ("\n\nTRACE32 section relocation: .data=0x%lx .bss=0x%lx .rodata=0x%lx\n\n", + (long)(&trace32_data), (long)(&trace32_bss), (long)(&trace32_rodata)); +# endif + + return __tffs_module_init(); +} + +module_init(tffs_module_init); + + + + +/******************************************************************************* + * * + * t f f s _ m o d u l e _ e x i t * + * * + * Module cleanup and routine; called when module is unloaded. * + * * + * Parameters: none * + * * + *******************************************************************************/ + +void /* __exit */ tffs_module_exit (void) +{ + cleanup (100); +} + +module_exit(tffs_module_exit); + + + + +/******************************************************************************* + * * + * _ _ t f f s _ m o d u l e _ i n i t * + * * + * Initialize DiskOnChip driver. * + * * + * Parameters: none * + * * + * Returns: zero if success, otherwise standard negative error code * + * * + *******************************************************************************/ +static +int /* __init */ __tffs_module_init (void) +{ + int STEP, iSoc, tmp; + + STEP = 0; + + PrintkInfo ("mDOC driver %s.%d", TrueFFSVersion, TFFS_DRV_VER); + + memset (tffsInfo.sockets, 0, sizeof(tffsInfo.sockets)); + + for (iSoc = 0; iSoc < FL_SOCKETS; iSoc++) + { + init_completion (&tffsInfo.sockets[iSoc].wait_for_irq); /* sema_init (&tffsInfo.sockets[iSoc].sleep_sem, 0); */ + + init_waitqueue_head (&tffsInfo.sockets[iSoc].waitQueueHead); + } + + STEP++; /* 1 */ + + /* if requested, install handler for DiskOnChip interrupts */ + if (tffs_irq >= 0) + { + if( request_irq(tffs_irq, interrupt_handler, 0 /* SA_INTERRUPT */, + tffs_str, &tffsInfo.sockets[0]) == 0 ) + { + tffs_irq_disable (TRUE); + + PrintkInfo ("use IRQ %d", tffs_irq); + } + else /* can't install interrupt handler, won't use IRQ */ + { + PrintkWarning ("failed to get IRQ %d", tffs_irq); + tffs_irq = -1; + } + } + else { PrintkInfo ("will not use IRQ"); } + + STEP++; /* 2 */ + + /* Find all DiskOnChip sockets, find out how many disks are on + * each socket, and abs.mount each disk. + */ + if( TffsInit() <= 0 ) + { + PrintkError ("No DiskOnChips found"); + return -ENODEV; + } + + STEP++; /* 3 */ + + if (tffs_irq >= 0) + { + /* enable interrupt generation in DiskOnChip */ + TffsEnableIRQ (&tffsInfo.sockets[0]); + } + + STEP++; /* 4 */ + + /* Register our major device # (or accept dynamically allocated + * major #). + */ + if ((tmp = register_blkdev(tffs_major, tffs_str)) < 0) + { + PrintkError ("Can't get major %d", tffs_major); + cleanup (STEP); + return -EBUSY; + } + if (tffs_major == 0) /* we asked for dynamic major #, and we got it */ + tffs_major = tmp; + PrintkInfo ("use major device number %d", tffs_major); + + STEP++; /* 5 */ + +#ifdef CONFIG_PROC_FS + if ((tffsInfo.pProcDir = proc_mkdir(tffs_str, NULL)) == NULL) + { PrintkWarning ("Can't create /proc/%s", tffs_str); } +#endif + + STEP++; /* 6 */ + + /* initialize Open/Close mutex in "available" state */ + sema_init (&open_close_mutex, 1); + + /* init sockets */ + for (iSoc = 0; iSoc < FL_SOCKETS; iSoc++) + init_socket (&tffsInfo.sockets[iSoc]); + + STEP++; /* 7 */ + +#ifdef CONFIG_PM + tffs_pm_init (); /* register with Power Manager */ +#endif + + STEP++; /* 8 */ + + return 0; +} + + + + +/******************************************************************************* + * * + * i n i t _ s o c k e t * + * * + * Initialize socket's I/O thread and all socket's disks. * + * * + * Parameters: * + * psoc pointer to socket being initialized * + * * + *******************************************************************************/ +static +void /* __init */ init_socket ( SocketInfo * psoc ) +{ + int iDisk; + + if (psoc->fFound == 0) + return; + + init_completion (&psoc->wait_for_io_thread); /* sema_init (&psoc->threadSemaphore, 0); */ + + /* Tell I/O thread to wake us up once it gets up and running */ + psoc->io_thread_state = 2; + + /* start socket's I/O thread */ + kernel_thread (socket_io_thread, (void *)psoc, 0); + + /* wait until socket's I/O thread is up and running */ + wait_for_completion (&psoc->wait_for_io_thread); /* down_interruptible (&psoc->threadSemaphore); */ + + /* socket's I/O thread has been started, and is currently waiting for + * I/O requests to be posted to psoc->waitQueueHead. + */ + for (iDisk = 0; iDisk < psoc->wDevices; iDisk++) + init_disk (&psoc->pDevices[iDisk]); +} + + + + +/******************************************************************************* + * * + * i n i t _ d i s k * + * * + * Initialize individual disk. s). * + * * + * Parameters: * + * pdisk pointer to disk * + * * + *******************************************************************************/ +static +void /* __init */ init_disk ( DeviceInfo * pdisk ) +{ + struct gendisk * gd; + int max_partitions; + + /* nobody has opened this disk yet */ + pdisk->in_use = 0; + +#ifdef TFFS_STATISTIC + memset (&pdisk->stat, 0, sizeof(pdisk->stat)); +#endif + +#ifdef CONFIG_PROC_FS + procfs_register (pdisk); +#endif + + /* allocate request queue for this disk */ + spin_lock_init (&pdisk->rq_lock); + + pdisk->rq = blk_init_queue (disk_request_queue_handler, &pdisk->rq_lock); + if (pdisk->rq == NULL) + { + PrintkError ("blk_init_queue() failed for disk 0x%x", pdisk->bHandle); + return; + } + else + pdisk->rq->queuedata = pdisk; + + /* Maximum number of file system partitions that we allow + * on the disk (this doesn't include "raw" disk). + */ + max_partitions = ((1 << DEV2PART_SHIFT) - 1); + + /* allocate struct gendisk for this disk */ + if ((gd = alloc_disk(max_partitions)) == NULL) + { + /* return previously allocated request queue to the system */ + blk_cleanup_queue (pdisk->rq); + pdisk->rq = NULL; + + PrintkError ("alloc_disk() failed for disk 0x%x", pdisk->bHandle); + return; + } + else + pdisk->gd = gd; + + gd->major = tffs_major; + gd->first_minor = (pdisk->diskNo * (max_partitions + 1/*"raw" disk entry*/)); + gd->fops = &tffs_bdev_ops; + gd->queue = pdisk->rq; + gd->private_data = pdisk; + + /* name this disk */ + snprintf (gd->disk_name, sizeof(gd->disk_name), "%s%c", + tffs_str, ('a' + (char)(pdisk->diskNo))); + + /* specify disk's capacity in 512-byte sectors */ + set_capacity (gd, pdisk->dwSize); + + /* Tell kernel about this disk. Before add_disk() returns, + * kernel will attempt to read Master Boot Record and parse + * partition table(s) on this disk; it will post I/O requests + * to pdisk->rq, and call disk_request_queue_handler() + * to handle these request. + */ + add_disk (gd); +} + + + + +/******************************************************************************* + * * + * c l e a n u p * + * * + * Free all data structures alocated during driver's startup. * + * * + * Parameters: * + * STEP specifies which resources to free * + * * + * Returns: void * + * * + *******************************************************************************/ +static +void cleanup ( int STEP ) +{ + int iSoc; + + if (STEP >= 8) + { +#ifdef CONFIG_PM + tffs_pm_exit (); /* unregister from Power Manager */ +#endif + } + + if (STEP >= 7) + { + /* For every socket, flush all socket's disks, and sleep until socket's + * I/O thread handled all outstanding I/O requests and exited. + */ + for (iSoc = 0; iSoc < FL_SOCKETS; iSoc++) + { + if (tffsInfo.sockets[iSoc].fFound != 0) + release_socket (&tffsInfo.sockets[iSoc]); + } + } + + if (STEP >= 6) + { +#ifdef CONFIG_PROC_FS + remove_proc_entry (tffs_str, NULL); + tffsInfo.pProcDir = NULL; +#endif + } + + if (STEP >= 5) + { + unregister_blkdev (tffs_major, tffs_str); + } + + if (STEP >= 4) + { + /* disable_irq (tffs_irq); */ + + /* We should tell DiskOnChip to disable interrupt generation, but + * unfortunately TrueFFS currently doesn't provide API for that. + */ + } + + if (STEP >= 3) + { + /* For all disks of all DiskOnChip sockets, write Quick Mount + * records to them, abs.unmount them, and shut down TrueFFS. + */ + TffsCleanup (); + } + + if (STEP >= 2) + { + /* if previously installed, remove DiskOnChip interrupt handler */ + if (tffs_irq >= 0) + free_irq (tffs_irq, &tffsInfo.sockets[0]); + } +} + + + + +/******************************************************************************* + * * + * r e l e a s e _ s o c k e t * + * * + * Release DiskOnChip socket. * + * * + * Parameters: * + * psoc pointer to socket being released * + * * + * Returns: void * + * * + *******************************************************************************/ +static +void /* __exit */ release_socket ( SocketInfo * psoc ) +{ + int iDisk; + + if (psoc->fFound == 0) + return; + + /* Release all socket's disks; this involves flushing all partitions + * on all these disks. + */ + for (iDisk = 0; iDisk < psoc->wDevices; iDisk++) + release_disk (&psoc->pDevices[iDisk]); + + if (psoc->io_thread_state == 1) /* I/O thread is running */ + { + init_completion (&psoc->wait_for_io_thread); + + /* Tell I/O thread to complete handling of all outstanding I/O requests, + * wake us up, and exit. + */ + psoc->io_thread_state = 2; + + /* in case socket's I/O thread is currently sleeping, wake it up */ + wake_up (&psoc->waitQueueHead); + + /* now wait for I/O thread to exit */ + wait_for_completion (&psoc->wait_for_io_thread); /* down_interruptible (&psoc->threadSemaphore); */ + } +} + + + + +/******************************************************************************* + * * + * r e l e a s e _ d i s k * + * * + * Release disk. * + * * + * Parameters: * + * pdisk pointer to disk being released * + * * + * Returns: void * + * * + *******************************************************************************/ +static +void /* __exit */ release_disk (DeviceInfo * pdisk) +{ + if (pdisk->gd != NULL) + { + del_gendisk (pdisk->gd); + pdisk->gd = NULL; + } + + if (pdisk->rq != NULL) + { + blk_cleanup_queue (pdisk->rq); + pdisk->rq = NULL; + } + +#ifdef CONFIG_PROC_FS + procfs_unregister (pdisk); +#endif +} + + + + +/******************************************************************************* + * * + * d i s k _ o p e n * + * * + * Open disk (i.e. block_device_operations.open()). * + * * + * Parameters: * + * * + * blk_dev block_device pointer * + * filp file pointer * +static int disk_open (struct block_device *blk_dev, fmode_t mode); + * * + * Returns: zero if success, otherwise negative error code * + * * + *******************************************************************************/ +static +int disk_open ( struct block_device * blk_dev, + fmode_t mode ) +{ + int rc = 0; /* assume success */ + struct gendisk * gd = blk_dev->bd_disk; + DeviceInfo * pdisk = (DeviceInfo *) gd->private_data; + + if (pdisk == NULL) + return -ENODEV; + + /* one Open/Close at a time */ + if( down_interruptible(&open_close_mutex) != 0 ) + return -ERESTARTSYS; /* wait was interrupted by signal */ + + /* can't open write-protected disk for writing */ + if (mode & O_RDWR) + { +#ifndef TFFS_RO + if( TffsIsWriteProtected(pdisk) ) +#endif + { + rc = -EROFS; goto quit; + } + } + + if (pdisk->in_use == 0) + { + if( TffsOpenDevice(pdisk) == 0 ) + { + PrintkError("Open() failed on %s(0x%x)", gd->disk_name, pdisk->bHandle); + + rc = -ENODEV; goto quit; + } + } + + /* success opening this disk */ + //filp->private_data = pdisk; + + /* one more user for this device, as well as for DiskOnChip driver */ + pdisk->in_use++; + + quit: + + /* allow other Open/Close calls to proceed */ + up (&open_close_mutex); + + return rc; +} + + + + +/******************************************************************************* + * * + * d i s k _ c l o s e * + * * + * Release disk (i.e. block_device_operations.release()). * + * * + * Parameters: * + * * + * blk_dev block_device pointer * + * filp file pointer (could be NULL) * +static int disk_close (struct gendisk *gd, fmode_t mode); + * * + * Returns: zero if success, otherwise negative error code * + * * + *******************************************************************************/ +static +int disk_close ( struct gendisk *gd, + fmode_t mode ) +{ + DeviceInfo * pdisk = (DeviceInfo *) gd->private_data; + + /* one Open/Close at a time */ + if( down_interruptible(&open_close_mutex) != 0 ) + return -ERESTARTSYS; /* wait was interrupted by signal */ + + if (--pdisk->in_use == 0) /* last user had just closed this disk */ + { + if( TffsCloseDevice(pdisk) == 0 ) + { + PrintkDebug("Release() failed on %s(0x%x)", gd->disk_name, pdisk->bHandle); + } + } + + /* allow other Open/Close calls to proceed */ + up (&open_close_mutex); + + return 0; +} + + + + +/******************************************************************************* + * * + * d i s k _ i o c t l * + * * + * Handle IOCTLs to disk (i.e. device_operations.ioctl()). * + * * + * Parameters: * + * * + * blk_dev block_device pointer * + * filp file pointer (could be NULL) * + * cmd IOCTL command * + * arg argument to IOCTL command * +static int disk_ioctl (struct block_device *blk_dev, fmode_t mode, unsigned int cmd, unsigned long arg); + * * + * Returns: zero if success, otherwise negative error code * + * * + *******************************************************************************/ +static +int disk_ioctl ( struct block_device * blk_dev, + fmode_t mode, + unsigned int cmd, + unsigned long arg ) +{ + struct gendisk * gd = blk_dev->bd_disk; + DeviceInfo * pdisk = (DeviceInfo *) gd->private_data; + int rc = -ENOTTY; + + /* sanity check */ +/*my + if ((filp != NULL) && (filp->private_data != pdisk)) + return -ENODEV; +*/ + if (cmd >= SIOCDEVPRIVATE) /* driver specific (TrueFFS) IOCTL code */ + { + rc = TffsIoctl (pdisk, (cmd - SIOCDEVPRIVATE), arg); + + if (rc < 0) + PrintkError("ioctl=0x%x error=0x%x on %s", cmd, rc, gd->disk_name); + + if (rc == 1) /* unrecognized TrueFFS IOCTL code */ + rc = -ENOTTY; + } + else /* standard Linux IOCTL code */ + { + switch (cmd) + { + case HDIO_GETGEO: + { + struct hd_geometry geo; + + geo.heads = pdisk->bHead; + geo.sectors = pdisk->bSect; + geo.cylinders = pdisk->wCyl; + geo.start = get_start_sect (blk_dev->bd_inode->i_bdev); + + if ((void *)arg == NULL) + { rc = -EINVAL; break; } + + if( !access_ok(VERIFY_WRITE, (void *)arg, sizeof(geo))) + { rc = -EFAULT; break; } + + if( copy_to_user((void *)arg, &geo, sizeof(geo)) != 0 ) + { rc = -EFAULT; break; } + + rc = 0; /* success */ + } + break; + + default: /* unknown Linux IOCTL code */ + { + PrintkError("unknown ioctl=0x%x on %s", cmd, gd->disk_name); + } + } + } + + return rc; +} + + + + +/******************************************************************************* + * * + * i n t e r r u p t _ h a n d l e r * + * * + * DiskOnChip interupt handler. * + * * + * Parameters: * + * * + * irq not used * + * psoc socket pointer * + * regs not used * + * * + * Returns: always IRQ_HANDLED * + * * + *******************************************************************************/ +static +irqreturn_t interrupt_handler ( int irq, /* not used */ + void * psoc/*, + struct pt_regs * regs*/ ) /* not used */ +{ + tffs_irq_disable (FALSE); + + profiling[1]++; + + /* wake up socket's I/O thread */ + complete (&((SocketInfo *)psoc)->wait_for_irq); /* up (&((SocketInfo *)psoc)->sleep_sem); */ + return IRQ_HANDLED; +} + + + + +/******************************************************************************* + * * + * t f f s _i r q _ e n a b l e * + * * + * Enable IRQ that DiskOnChip is connected to. * + * * + * Parameters: * + * * + * lock if TRUE, use __irq_lock; otherwise don't * + * * + *******************************************************************************/ +void tffs_irq_enable (int lock) +{ + unsigned long flags; + + if (lock == TRUE) + spin_lock_irqsave (&__irq_lock, flags); + + if (__irq_enabled == FALSE) + { + __irq_enabled = TRUE; + + enable_irq (tffs_irq); + +#ifdef CONFIG_ARCH_OMAP24XX + omap24xx_enable_gpio_irq (tffs_irq, TRUE); +#endif + } + + if (lock == TRUE) + spin_unlock_irqrestore (&__irq_lock, flags); +} + + + +/******************************************************************************* + * * + * t f f s _i r q _ d i s a b l e * + * * + * Disable IRQ that DiskOnChip is connected to. * + * * + * Parameters: * + * * + * lock if TRUE, use __irq_lock; otherwise don't * + * * + *******************************************************************************/ +void tffs_irq_disable (int lock) +{ + unsigned long flags; + + if (lock == TRUE) + spin_lock_irqsave (&__irq_lock, flags); + + if (__irq_enabled == TRUE) + { + __irq_enabled = FALSE; + +#ifdef CONFIG_ARCH_OMAP24XX + omap24xx_enable_gpio_irq (tffs_irq, FALSE); +#endif + + disable_irq (tffs_irq); + } + + if (lock == TRUE) + spin_unlock_irqrestore (&__irq_lock, flags); +} + + + + +/******************************************************************************* + * * + * d i s k _ r e q u e s t _ q u e u e _ h a n d l e r * + * * + * This routine implements request handling function for per-disk request * + * queue. It's called by generic_unplug_device (drivers/block/ll_rw_block.c) * + * with request queue's lock held, and both hardware and software interrupts * + * disabled (so it must be fast). * + * * + * Parameters: * + * q disk's request queue * + * * + *******************************************************************************/ +static +void disk_request_queue_handler (struct request_queue * q) +{ + struct request * r; + SocketInfo * psoc; + DeviceInfo * pdisk; + int lock_taken = FALSE; + + /* we run with hardware and software interrupts disabled */ + + while ((r = blk_peek_request(q)) != NULL) + { + /* take this request off disk's request queue */ + blk_start_request (r); + + if (lock_taken == FALSE) + { + pdisk = r->rq_disk->private_data; + psoc = pdisk->pSocket; + + spin_lock (&psoc->request_list_lock); + lock_taken = TRUE; + } + + /* Append this request to socket's request list. Socket's + * I/O thread will take it from there, handle it, and cycle + * it back to this queue. + */ + list_add_tail (&r->queuelist, &psoc->requestsList); + } + + if (lock_taken == TRUE) + { + spin_unlock (&psoc->request_list_lock); + + /* in case socket's I/O thread is currently sleeping, wake it up */ + wake_up (&psoc->waitQueueHead); + } +} + + + + +/******************************************************************************* + * * + * s o c k e t _ i o _ t h r e a d * + * * + * This routine implements per-socket I/O thread. It runs as a kernel thread, * + * and processes I/O requests that disk_request_queue_handler() put to * + * socket's request list. This routine can (and often does) sleep. * + * * + * Parameters: * + * arg socket pointer * + * * + *******************************************************************************/ +static +int socket_io_thread (void * arg) +{ + SocketInfo * psoc = (SocketInfo *) arg; + char name[32]; + + current->flags |= (PF_MEMALLOC | PF_NOFREEZE); + + sprintf (name, "%s%c", tffs_str, '0' + (char)psoc->bHandle); + daemonize (name); + + /* we don't want to receive any signals */ + spin_lock_irq (¤t->sighand->siglock); + sigfillset (¤t->blocked); + recalc_sigpending (); + spin_unlock_irq (¤t->sighand->siglock); + + /* adjist thread's priority if necessary */ + if (tffs_prio != 0) + set_user_nice (current, tffs_prio); + + /* initially socket's request list is empty */ + spin_lock_init (&psoc->request_list_lock); + INIT_LIST_HEAD (&psoc->requestsList); + + /* If somebody is waiting for socket's I/O thread to start up and + * get ready for processing I/O requests, let them know that we did. + */ + if (psoc->io_thread_state == 2) + complete (&psoc->wait_for_io_thread); /* up (&psoc->threadSemaphore); */ + + /* socket's I/O thread is ready to receive I/O requests */ + psoc->io_thread_state = 1; + + while (psoc->io_thread_state == 1) + { + /* wait 5 clock ticks for I/O requests to arrive */ + wait_event_interruptible_timeout (psoc->waitQueueHead, requests_to_do(psoc), 5); + + /* handle all I/O requests (if any) in socket's request ist */ + do_requests_list (psoc); + } + + /* If somebody is waiting for socket's I/O thread to terminate, + * let them know that it did. + */ + if (psoc->io_thread_state == 2) + complete (&psoc->wait_for_io_thread); /* up (&psoc->threadSemaphore); */ + + /* socket's I/O thread terminated */ + psoc->io_thread_state = 0; + + return 0; +} + + + + +/******************************************************************************* + * * + * d o _ r e q u e s t s _ l i s t * + * * + * This routine handles all requests in socket's request list. * + * * + * Parameters: * + * psoc socket pointer * + * * + *******************************************************************************/ +static +void do_requests_list ( SocketInfo * psoc ) +{ + struct request * r; + struct gendisk * gd; + DeviceInfo * pdisk; + unsigned long flags; + unsigned int nr_sectors; + + /* lock socket's request list */ + spin_lock_irqsave (&psoc->request_list_lock, flags); + + /* if socket's request list isn't empty, process all requests there */ + while( !(list_empty(&psoc->requestsList)) ) + { + /* take next request off socket's request list */ + r = list_entry_rq (psoc->requestsList.next); + list_del_init (&r->queuelist); + + /* unlock socket's request list */ + spin_unlock_irqrestore (&psoc->request_list_lock, flags); + + /* Mark all non-filesystem request, and those filesystem requests + * that don't pass sanity check, as not-uptodate (i.e. failed). + */ + if( !blk_fs_request(r) || + ((gd = r->rq_disk) == NULL) || + ((pdisk = gd->private_data) == NULL) || + (pdisk->gd != gd) || + (blk_rq_pos(r) + blk_rq_sectors(r) > pdisk->dwSize) + ) + { + nr_sectors = blk_rq_cur_sectors(r); + __blk_end_request(r, 0, nr_sectors << 9); + /* + end_that_request_first (r, 0, r->hard_cur_sectors);*/ + } + else /* legitimate filesystem request; handle it */ + { + if (rq_data_dir(r) == WRITE) + { + write_requests++; + + do_write_request (r); + } + else /* READ request */ + { + do_read_request (r); + } + } + + /* mark this request as done */ + spin_lock_irqsave (&pdisk->rq_lock, flags); /* spin_lock (&pdisk->rq_lock); */ + +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,24)) + blk_end_request_all(r, (r->errors == 0) ? 0 : -EIO); +#else +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)) + end_that_request_last (r, /* success */ 1); +#else + end_that_request_last (r); +#endif +#endif + + + spin_unlock_irqrestore (&pdisk->rq_lock, flags); /* spin_unlock (&pdisk->rq_lock); */ + + /* lock socket's request list */ + spin_lock_irqsave (&psoc->request_list_lock, flags); + } + + /* unlock socket's request list */ + spin_unlock_irqrestore (&psoc->request_list_lock, flags); +} + + + + +/******************************************************************************* + * * + * d o _ w r i t e _ r e q u e s t * + * * + * This routine handles single WRITE request. * + * * + * Parameters: * + * psoc socket pointer * + * * + * Returns: * + * zero if I/O error was encountered, otherwise '1'. * + * * +sector = blk_rq_pos(r) +nr_sectors= blk_rq_sectors(r) + +*******************************************************************************/ +static +int do_write_request ( struct request * r ) +{ + DeviceInfo * pdisk = (DeviceInfo *) r->rq_disk->private_data; + /*struct bio * bio;*/ + struct gather_t gather; + unsigned long total_sectors; + int success = 1; + unsigned int nr_sectors ; + + total_sectors = blk_rq_sectors(r); + + /* in case we are going to use gather buffer, mark it as empty */ + if ((tffs_sg_bufsize > 0) && (tffs_sg_write != FALSE)) + { + gather.buf = + gather.free = pdisk->pSocket->pCache; + gather.size = + gather.free_bytes = tffs_sg_bufsize; + + /* first disk sector # for this request */ + gather.start_sector = blk_rq_pos(r); + } + + /* do all bio's of this request */ + + /*rq_for_each_bio (bio, r) */ + { + if( write_bio(r, &gather, pdisk) < 0) + success = 0; /* I/O error */ + } + + /* flush remaining data (if any) from gather buffer to disk */ + if ((tffs_sg_bufsize > 0) && (tffs_sg_write != FALSE) + && (gather.free > gather.buf)) + { + int ns = ((gather.free - gather.buf) >> 9); /* remaining sectors in buf */ + + if( TffsWrite (pdisk, gather.buf, gather.start_sector, ns) == 0 ) + success = 0; /* I/O error */ + } + + /* Note that if we encountered I/O error in the middle of + * request processing, we mark the entire request as failed. + * Not very smart but hopefully will do for now ... + */ + nr_sectors = blk_rq_cur_sectors(r); + __blk_end_request(r, success, nr_sectors << 9); + + /*end_that_request_first (r, success, total_sectors);*/ + + return success; +} + + + + +/******************************************************************************* + * * + * d o _ r e a d _ r e q u e s t * + * * + * This routine handles single READ request. * + * * + * Parameters: * + * psoc socket pointer * + * * + * Returns: * + * zero if I/O error was encountered, otherwise '1'. * + * * + *******************************************************************************/ +static +int do_read_request ( struct request * r ) +{ + DeviceInfo * pdisk = (DeviceInfo *) r->rq_disk->private_data; + /*struct bio * bio;*/ + struct scatter_t scatter; + unsigned long total_sectors; + int success = 1; + unsigned int nr_sectors ; + + total_sectors = blk_rq_sectors(r); + /* read in data from disk into scatter buffer */ + if ((tffs_sg_bufsize > 0) && (tffs_sg_read != FALSE)) + { + int ns = _MIN(blk_rq_sectors(r), (tffs_sg_bufsize >> 9)); + + scatter.buf = pdisk->pSocket->pCache; + scatter.size = tffs_sg_bufsize; + + if( TffsRead (pdisk, scatter.buf, blk_rq_pos(r), ns) == 0 ) + { + success = 0; /* I/O error */ + goto out; + } + + scatter.pcurrent = scatter.buf; + scatter.remaining_bytes = (ns << 9); + scatter.sectors = blk_rq_sectors(r) - ns; + scatter.start_sector = blk_rq_pos(r) + ns; + } + + /* do all bio's of this request */ + /*rq_for_each_bio (bio, r)*/ + { + if( read_bio(r, &scatter, pdisk) < 0) + success = 0; /* I/O error */ + } + +out: + + /* Note that if we encountered I/O error in the middle of + * request processing, we mark the entire request as failed. + * Not very smart but hopefully will do for now ... + */ +/* end_that_request_first (r, success, total_sectors); */ + nr_sectors = blk_rq_cur_sectors(r); + __blk_end_request(r, success, nr_sectors << 9); + + return success; +} + + + + +/******************************************************************************* + * * + * w r i t e _ b i o * + * * + * This routine handles single 'struct bio' WRITE operation using gather * + * buffer. * + * * + * Parameters: * + * bio pointer to 'struct bio' to WRITE * + * gather pointer to gather buffer * + * pdisk disk pointer * + * * + * Returns: * + * zero if success otherwise -EIO negative error code * + * * + *******************************************************************************/ +static +int write_bio ( struct request * r, + /*struct bio * bio, */ + struct gather_t * gather, + DeviceInfo * pdisk ) +{ + struct bio_vec * bv; + int rc = 0; + struct req_iterator iter; + + if ((tffs_sg_bufsize == 0) || (tffs_sg_write == FALSE)) + { + /* we don't use gather buffer; do one I/O segment at a time */ + + printk("rw_bio_no_sg!!!!!!!!!!!!!!!!!!\n"); + rc = rw_bio_no_sg (r, pdisk, WRITE); + + } + else /* use gather buffer */ + { + /*bio_for_each_segment (bv, bio, i)*/ + rq_for_each_segment(bv, r, iter) + { + unsigned int n = bv->bv_len; /* bytes in this I/O segment */ + char * p; + + /* If segment's page resides in high memory, map it into + * kernel's address space temporarily. + */ + if (PageHighMem(bv->bv_page)) + p = kmap (bv->bv_page) + bv->bv_offset; + else /* segment's page resides in low memory */ + p = page_address (bv->bv_page) + bv->bv_offset; + + for (; n >= gather->free_bytes; ) + { + /* This I/O segment won't fit into the remaining space in + * gather buffer. Copy the part that does fit into gather + * buffer (making it full), then flush entire gather buffer + * to disk. + */ + if (gather->free_bytes > 0) + { + memcpy (gather->free, p, gather->free_bytes); + + p += gather->free_bytes; + n -= gather->free_bytes; + } + + /* flush entire gather buffer to disk */ + if( TffsWrite (pdisk, gather->buf, gather->start_sector, + (gather->size >> 9)) == 0 ) + rc = -EIO; /* I/O error */ + + /* gather buffer is empty */ + gather->free = gather->buf; + gather->free_bytes = gather->size; + gather->start_sector += (gather->size >> 9); + } + + /* remaining part of this segment fits into gather buffer */ + if (n > 0) + { + memcpy (gather->free, p, n); + + gather->free += n; + gather->free_bytes -= n; + } + + /* If segment's page resides in high memory, cancel + * previously established mapping. + */ + if (PageHighMem(bv->bv_page)) + kunmap (bv->bv_page); + } + } + + return rc; +} + + + + +/******************************************************************************* + * * + * r e a d _ b i o * + * * + * This routine handles single 'struct bio' READ operation using scatter * + * buffer. * + * * + * Parameters: * + * bio pointer to 'struct bio' to WRITE * + * scatter pointer to scatter buffer * + * pdisk disk pointer * + * * + * Returns: * + * zero if success otherwise -EIO negative error code * + * * + *******************************************************************************/ +static +int read_bio ( struct request * r, + /*struct bio * bio, */ + struct scatter_t * scatter, + DeviceInfo * pdisk ) +{ + struct bio_vec * bv; + int rc = 0; + struct req_iterator iter; + + if ((tffs_sg_bufsize == 0) || (tffs_sg_read == FALSE)) + { + /* we don't use scatter buffer; do one I/O segment at a time */ + printk("rw_bio_no_sg 2 !!!!!!!!!!!!!!!!!!\n"); + + rc = rw_bio_no_sg (r, pdisk, READ); + } + else /* use gather buffer */ + { + rq_for_each_segment(bv, r, iter) + { + unsigned int n = bv->bv_len; /* bytes in this I/O segment */ + unsigned int ns; + char * p; + + /* If segment's page resides in high memory, map it into + * kernel's address space temporarily. + */ + if (PageHighMem(bv->bv_page)) + p = kmap (bv->bv_page) + bv->bv_offset; + else /* segment's page resides in low memory */ + p = page_address (bv->bv_page) + bv->bv_offset; + + for (; n >= scatter->remaining_bytes; ) + { + /* This I/O segment is larger then number of remaining bytes + * in scatter buffer. Copy all these remaining bytes (making + * scatter buffer empty), then re-fill scatter buffer from disk. + */ + if (scatter->remaining_bytes > 0) + { + memcpy (p, scatter->pcurrent, scatter->remaining_bytes); + + p += scatter->remaining_bytes; + n -= scatter->remaining_bytes; + } + + /* scatter buffer is empty now */ + scatter->remaining_bytes = 0; + scatter->pcurrent = scatter->buf; + + /* end of this request ? */ + if ((ns = _MIN(scatter->sectors, (tffs_sg_bufsize >> 9))) == 0) + break; + + /* re-fill scatter buffer from disk */ + if( TffsRead (pdisk, scatter->buf, scatter->start_sector, ns) == 0 ) + rc = -EIO; /* I/O error */ + + scatter->remaining_bytes = (ns << 9); + scatter->sectors -= ns; + scatter->start_sector += ns; + } + + /* Remaining part of this segment can be entirely taken + * from the scatter buffer. + */ + if (n > 0) + { + memcpy (p, scatter->pcurrent, n); + + scatter->pcurrent += n; + scatter->remaining_bytes -= n; + } + + /* If segment's page resides in high memory, cancel + * previously established mapping. + */ + if (PageHighMem(bv->bv_page)) + kunmap (bv->bv_page); + } + } + + return rc; +} + + + + +/******************************************************************************* + * * + * r w _ b i o _ n o _ s g * + * * + * This routine handles single 'struct bio' without using scatter/gather * + * buffers. It issues TrueFFS I/O call for each segment of this 'struct bio'. * + * * + * Parameters: * + * bio pointer to 'struct bio' to handle * + * pdisk disk pointer * + * rw READ or WRITE * + * * + * Returns: * + * zero if success otherwise -EIO negative error code * + * * + *******************************************************************************/ +static +int rw_bio_no_sg ( struct request * r, + /* struct bio * bio, */ + DeviceInfo * pdisk, + int rw ) +{ + sector_t sector = r->bio->bi_sector; /* starting disk sector for this bio */ + struct bio_vec * bv; + char * p; + int rc = 0; + unsigned int ns; + struct req_iterator iter; + + /*bio_for_each_segment (bv, bio, i)*/ + rq_for_each_segment(bv, r, iter) + { + if ((ns = (bv->bv_len >> 9)) > 0) /* sectors in this segment */ + { + /* If segment's page resides in high memory, map it into + * kernel's address space temporarily. + */ + if (PageHighMem(bv->bv_page)) + p = kmap (bv->bv_page) + bv->bv_offset; + else /* segment's page resides in low memory */ + p = page_address (bv->bv_page) + bv->bv_offset; + + if (rw == READ) + { + if( TffsRead (pdisk, p, sector, ns) == 0 ) + rc = -EIO; /* I/O error */ + } + else + { + if( TffsWrite (pdisk, p, sector, ns) == 0 ) + rc = -EIO; /* I/O error */ + } + + /* If segment's page resides in high memory, cancel + * previously established mapping. + */ + if (PageHighMem(bv->bv_page)) + kunmap (bv->bv_page); + + sector += ns; + } + } + + return rc; +} + + + + +/******************************************************************************* + * * + * r e q u e s t s _ t o _ d o * + * * + * This routine checks if there are any requests in socket's request list. * + * * + * Parameters: * + * psoc socket pointer * + * * + * Returns: * + * FALSE if list is empty, otherwise TRUE * + * * + *******************************************************************************/ +static +int requests_to_do ( SocketInfo * psoc ) +{ + unsigned long flags; + int rc = FALSE; /* assume list is empty */ + + spin_lock_irqsave (&psoc->request_list_lock, flags); + + if( !list_empty(&psoc->requestsList) ) + rc = TRUE; + + spin_unlock_irqrestore (&psoc->request_list_lock, flags); + + return rc; +} + + + +/******************************************************************************* + * * + * t f f s _ s u s p e n d * + * * + * This routine is intended to be called by various Linux Power Managers to * + * power down all DiskOnChip devices when system goes into powerdown mode. * + * * + * Parameters: none * + * * + * Returns: void * + * * + *******************************************************************************/ +void tffs_suspend (void) +{ + SocketInfo * psoc; + int i; + + for (i = 0; i < FL_SOCKETS; i++) + { + psoc = &tffsInfo.sockets[i]; + + if (psoc->fFound == 0) + continue; + + init_completion (&psoc->wait_for_io_thread); + + /* Tell I/O thread to finish all outstanding I/O requests, wake + * up us, and exit. + */ + psoc->io_thread_state = 2; + + /* in case socket's I/O thread is currently sleeping, wake it up */ + wake_up (&psoc->waitQueueHead); + + /* wait for I/O thread to exit */ + wait_for_completion (&psoc->wait_for_io_thread); /* down_interruptible (&psoc->threadSemaphore); */ + + /* tell TrueFFS to power down DiskOnChip */ + TffsSuspend (psoc); + } + + /* disable DiskOnChip interrupts */ + if (tffs_irq >= 0) + { + tffs_irq_disable (TRUE); + } +} + + + + +/******************************************************************************* + * * + * t f f s _ r e s u m e * + * * + * This routine is intended to be called by various Linux Power Managers to * + * power up all DiskOnChip devices when system comes up from powerdown mode. * + * * + * Parameters: none * + * * + * Returns: void * + * * + *******************************************************************************/ +void tffs_resume (void) +{ + SocketInfo * psoc; + int i; + + /* We are doing 'resume' after previous power 'suspend', not + * full scale board initialization, hence TRUE flag below. + */ + tffsarch_init (TRUE); + + /* enable DiskOnChip interrupts */ + if (tffs_irq >= 0) + { + tffs_irq_enable (TRUE); + } + + for (i = 0; i < FL_SOCKETS; i++) + { + psoc = &tffsInfo.sockets[i]; + + if (psoc->fFound == 0) + continue; + + /* Tell TrueFFS to power up DiskOnChip. This call takes around 20 + * milliseconds (DiskOnChip driver will not yield CPU during this time). + */ + TffsResume (psoc); + + /* restore multi-sector poleld I/O mode in DiskOnChip h3 devices */ + TffsSetPIO (psoc); + + init_completion (&psoc->wait_for_io_thread); + + /* tell I/O thread to wake us up once it gets running */ + psoc->io_thread_state = 2; + + /* start I/O thread */ + kernel_thread (socket_io_thread, (void *)psoc, 0); + + /* wait for I/O thread to get running */ + wait_for_completion (&psoc->wait_for_io_thread); /* down_interruptible (&psoc->threadSemaphore); */ + } +} + + + + +#ifdef CONFIG_PROC_FS + +/******************************************************************************* + * * + * p r o c f s _ r e g i s t e r * + * * + * Create disk's entry in /proc/. * + * * + * Parameters: * + * * + * pdisk disk pointer * + * * + * Returns: zero if success otherwise negative error code. * + * * + *******************************************************************************/ +static +int /* __init */ procfs_register ( DeviceInfo * pdisk ) +{ + char name[] = "a"; + + name[0] += (char)(pdisk->diskNo); + + if ((pdisk->pProcFile = create_proc_entry(name, 0, tffsInfo.pProcDir)) == NULL) + { + PrintkWarning("Can't create /proc/tffs/%s", name); + return -EBUSY; + } + + pdisk->pProcFile->read_proc = procfs_read; + pdisk->pProcFile->write_proc = procfs_write; + pdisk->pProcFile->data = pdisk; + + return 0; +} + + + + +/******************************************************************************* + * * + * p r o c f s _ u n r e g i s t e r * + * * + * Delete disk's entry in /proc/. * + * * + * Parameters: * + * * + * pdisk disk pointer * + * * + * Returns: always zero (success). * + * * + *******************************************************************************/ +static +int /* __exit */ procfs_unregister ( DeviceInfo * pdisk ) +{ + char name[] = "a"; + + name[0] += (char)(pdisk->diskNo); + + remove_proc_entry (name, tffsInfo.pProcDir); + pdisk->pProcFile = NULL; + + return 0; +} + + + + +/******************************************************************************* + * * + * p r o c f s _ w r i t e * + * * + * Called when disk's entry in /proc/ is wriiten to. * + * * + * Parameters: * + * * + * file not used * + * buffer not used * + * count not used * + * data disk pointer * + * * + * Returns: always zero (success). * + * * + *******************************************************************************/ +static +int procfs_write ( struct file * file, + const char * buffer, + unsigned long count, + void * data ) +{ +# ifdef TFFS_STATISTIC + DeviceInfo * pdisk = (DeviceInfo *)data; + + memset (&pdisk->stat, 0, sizeof(pdisk->stat)); +# endif + + return count; +} + + + + +/******************************************************************************* + * * + * p r o c f s _ r e a d * + * * + * Called when disk's entry in /proc/ is read from. * + * * + * Parameters: * + * * + * buf buffer to put data to * + * start not used * + * offset not used * + * length not used * + * eof End-of-File indicator * + * data disk pointer * + * * + * Returns: number of characters written to buffer 'buf' * + * * + *******************************************************************************/ +static +int procfs_read ( char * buf, + char ** start, + off_t offset, + int length, + int * eof, + void * data ) +{ + char * p = buf; + int i; + +# ifdef TFFS_STATISTIC + + { DeviceInfo * pdisk = (DeviceInfo *)data; + TffsStatistic * stat = &pdisk->stat; + + p += sprintf (p, "flAbsRead calls %ld\n", stat->dwAbsRead); + p += sprintf (p, "total %ld read requests (%ld by disk_request_queue_handler)\n", + stat->dwReadReq, stat->dwReadReqNoThread); + p += sprintf (p, "total %ld sectors read (aligned %ld, unaligned %ld)\n", + stat->dwAbsReadSec, stat->dwAlReadSec, stat->dwUnalReadSec); + p += sprintf (p, "read shared sectors: aligned %ld, unaligned %ld\n", + stat->dwAlReadShared, stat->dwUnalReadShared); + + p += sprintf (p,"flAbsWrite calls %ld\n", stat->dwAbsWrite); + p += sprintf (p, "total %ld write requests\n", stat->dwWriteReq); + p += sprintf (p,"total %ld sectors written (aligned %ld, unaligned %ld)\n", + stat->dwAbsWriteSec, stat->dwAlWriteSec, stat->dwUnalWriteSec); + p += sprintf (p,"written shared sectors: aligned %ld, unaligned %ld\n", + stat->dwAlWriteShared, stat->dwUnalWriteShared); + } + +# endif /* TFFS_STATISTIC */ + + p += sprintf (p, "profiling:"); + for (i = 0; i < 10; i++) + p += sprintf (p, " %d", profiling[i]); + p += sprintf (p, "\n"); + + *eof = 1; + + return (p - buf); +} + +#endif /* CONFIG_PROC_FS */ + +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsioct.h b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsioct.h new file mode 100755 index 00000000..8aae1ca3 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/tffsioct.h @@ -0,0 +1,55 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + +#ifndef TFFSIOCT_H +#define TFFSIOCT_H + +#include "_tffsioct.h" +#include + + +#define FL_IOCTL_LNX (SIOCDEVPRIVATE + 0) +#define FL_IOCTL_START (SIOCDEVPRIVATE + 1) + +#include "flioctl.h" + +/* replicas of enums in doch_api.h */ +#define DOCH_PASSTHRU_DATA_OUT 0x02 +#define DOCH_DOWNLOAD_MICROCODE 0x92 +#define DOCH_DLMCODE_DOWNLOAD_AND_SAVE 0x7 + +#endif /* TFFSIOCT_H */ + diff --git a/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/trace32.c b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/trace32.c new file mode 100755 index 00000000..eba22825 --- /dev/null +++ b/kernel-2.6.33/arch/arm/mach-pxa/g900/ttfs/trace32.c @@ -0,0 +1,48 @@ +/****************************************************************************** + * * + * Project: DOC Driver for Linux 2.6 Block device driver for mDOC H3 family * + * of devices under Linux kernel 2.6. * + * * + * Version: 1.0 * + * Email questions to: oemsupport@sandisk.com * + * Copyright (C) SanDisk IL Ltd. 1995 - 2007 * + * SanDisk IL Ltd., 7 Atir Yeda Street, Kfar Saba 44425, Israel * + * * + ****************************************************************************** + * * + * This program is free software; you can redistribute it and/or modify it * + * under the terms of the GNU General Public License as published by the Free * + * Software Foundation; either version 2 of the License, or any later version.* + * This program is distributed in the hope that it will be useful, but WITHOUT* + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * + * more details, which is set forth in the readme.txt file. * + * You should have received a copy of the GNU General Public License along * + * with this program; if not, write to the Free Software Foundation, Inc., 51 * + * Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * + * * + * This License does not grant you any right to use the trademarks, service * + * marks or logos of SanDisk IL Ltd. or SanDisk Corporation. * + * Subject to the foregoing, SanDisk IL Ltd., for itself and on behalf of its * + * licensors, hereby reserves all intellectual property rights in the program,* + * except for the rights expressly granted in this License. * + * * + ******************************************************************************/ + +/* + * $Log$ + */ + + +#include +#include +#include + +/* + * These variables reside at the beginning of respective sections +*/ +int trace32_data = 0x11223344; /* beginning of .data section */ +int trace32_bss; /* beginning of .bss section */ +const int trace32_rodata = 0x55667788; /* beginning of .rodata section */ + + diff --git a/kernel-2.6.33/drivers/input/touchscreen/ak4183.c b/kernel-2.6.33/drivers/input/touchscreen/ak4183.c index 9bd06b18..01320c04 100755 --- a/kernel-2.6.33/drivers/input/touchscreen/ak4183.c +++ b/kernel-2.6.33/drivers/input/touchscreen/ak4183.c @@ -183,7 +183,7 @@ static u32 ak4183_read_values(struct ak4183 *tsc, struct ts_event *tc) //s32 x,y; tc->x = ak4183_xfer(tsc, READ_X);//x tc->y = ak4183_xfer(tsc, READ_Y);//y - //printk(KERN_INFO "AK4183: %5i;%5i;", + //devdbg(KERN_INFO "AK4183: %5i;%5i;", // tc->x,tc->y); tc->z1 = ak4183_xfer(tsc,READ_Z1);//z1 tc->z2 = ak4183_xfer(tsc,READ_Z2);//z2 @@ -195,7 +195,7 @@ static u32 ak4183_read_values(struct ak4183 *tsc, struct ts_event *tc) if (rt<5000){rt=5000;} // max rt=(6350-rt)*3;//0xFFF max if (rt>=0xFFF) {rt=0xFFE;}//max - // printk(KERN_INFO "AK4183: %5u;%5u;%5u;%5u;%5u;", + // devdbg(KERN_INFO "AK4183: %5u;%5u;%5u;%5u;%5u;", // tc->x,tc->y,tc->z1,tc->z2,rtt); }else{ rt=0;//no touch @@ -337,23 +337,21 @@ static int __devinit ak4183_probe(struct i2c_client *client, int err; if (!pdata) { - dev_err(&client->dev, "platform data is required!\n"); - printk(KERN_ERR "ak4183: platform data is required!\n"); return -EINVAL; } if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_WORD_DATA)) { - printk(KERN_ERR "ak4183: err i2c_check_functionality!\n"); + dev_err(&client->dev, "err i2c_check_functionality!\n"); return -EIO; } ts = kzalloc(sizeof(struct ak4183), GFP_KERNEL); input_dev = input_allocate_device(); if (!ts || !input_dev) { err = -ENOMEM; - printk(KERN_ERR "ak4183: err input_allocate_device!\n"); + dev_err(&client->dev, "err input_allocate_device!\n"); goto err_free_mem; } @@ -393,7 +391,6 @@ static int __devinit ak4183_probe(struct i2c_client *client, if (err < 0) { dev_err(&client->dev, "irq %d busy?\n", ts->irq); - printk(KERN_ERR "ak4183: err irq %d busy?\n",ts->irq); goto err_free_mem; } @@ -401,13 +398,13 @@ static int __devinit ak4183_probe(struct i2c_client *client, /* err = ak4183_xfer(ts, PWRDOWN); if (err < 0){ goto err_free_irq; - printk(KERN_ERR "ak4183: err ak4183_xfer\n"); + dev_err(&client->dev, "err ak4183_xfer\n"); } */ err = input_register_device(input_dev); if (err){ goto err_free_irq; - printk(KERN_ERR "ak4183: err input_register_device\n"); + dev_err(&client->dev, "err input_register_device\n"); } i2c_set_clientdata(client, ts); @@ -441,7 +438,7 @@ static int __devexit ak4183_remove(struct i2c_client *client) } static struct i2c_device_id ak4183_idtable[] = { - { "ak4183", 0 }, + { "ak4183", 0x48 }, { } }; diff --git a/kernel-2.6.33/drivers/video/Kconfig b/kernel-2.6.33/drivers/video/Kconfig index 42357dc6..70f0d8ee 100755 --- a/kernel-2.6.33/drivers/video/Kconfig +++ b/kernel-2.6.33/drivers/video/Kconfig @@ -1831,18 +1831,6 @@ config FB_G900 To compile this driver as a module, choose M here: the module will be called g900fb. -config FB_G900_NEW - tristate "New FB for Toshiba G900 frame buffer support" - depends on FB && ARM - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - select FB_MODE_HELPERS - ---help--- - Say Y here if you have a Toshiba G900 PDA. - - To compile this driver as a module, choose M here: the - module will be called g900fb. config FB_MBX tristate "2700G LCD framebuffer support" diff --git a/kernel-2.6.33/drivers/video/Makefile b/kernel-2.6.33/drivers/video/Makefile index ec70868e..115c99e4 100755 --- a/kernel-2.6.33/drivers/video/Makefile +++ b/kernel-2.6.33/drivers/video/Makefile @@ -100,7 +100,6 @@ obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o obj-$(CONFIG_FB_PXA) += pxafb.o obj-$(CONFIG_FB_PXA168) += pxa168fb.o obj-$(CONFIG_FB_G900) += g900fb.o -obj-$(CONFIG_FB_G900_NEW) += g900fb2.o obj-$(CONFIG_FB_W100) += w100fb.o obj-$(CONFIG_FB_TMIO) += tmiofb.o obj-$(CONFIG_FB_AU1100) += au1100fb.o diff --git a/kernel-2.6.33/drivers/video/g900fb.c b/kernel-2.6.33/drivers/video/g900fb.c index 1bc9c8c7..dd4b0567 100755 --- a/kernel-2.6.33/drivers/video/g900fb.c +++ b/kernel-2.6.33/drivers/video/g900fb.c @@ -1,4 +1,8 @@ -/*linux/drivers/video/g900fb.c -- Toshiba g900 Simple Frame Buffer device +/*linux/drivers/video/g900fb2.c -- + * + * Copyright (C) 2010 Angell Fear + * + * Copyright (C) 2010 Kosyak * * Copyright (C) 2008 El Tuba * @@ -6,7 +10,9 @@ * * Copyright (C) 2008 Vladimir Chernichkin * - * Copyright (C) 2002 James Simmons + * Copyright (C) 2007, Google Inc. + * + * Copyright (C) 2002 James Simmons * * Copyright (C) 1997 Geert Uytterhoeven * @@ -29,199 +35,148 @@ #include #include #include +#include + + +#define FB_WIDTH 480 +#define FB_HEIGHT 800 +#define VIDEOMEMSTART 0x0a000000 /* vram variable value from HaRET */ +#define FB_NUMBER_OF_BUFFERS 1 +#define FB_BYTES_PER_PIXEL 2 +#define VIDEOMEMBUFSIZE FB_WIDTH * FB_HEIGHT * FB_BYTES_PER_PIXEL +#define VIDEOMEMSIZE VIDEOMEMBUFSIZE * FB_NUMBER_OF_BUFFERS + + -#define VIDEOMEMSIZE (4*800*480) /* screen size KB */ -#define VIDEOMEMSTART 0x0a000020 //vram variable value from HaRET static void *videomemory; -static u_long videomemorysize = VIDEOMEMSIZE; +static u_long videomemorysize = VIDEOMEMSIZE * FB_NUMBER_OF_BUFFERS; module_param(videomemorysize, ulong, 0); +struct g900_fb { + int rotation; + struct fb_info fb; + u32 cmap[16]; +}; static struct fb_var_screeninfo g900fb_default __initdata = { - .xres = 480, - .yres = 800, - .xres_virtual = 480, - .yres_virtual = 800, + .xres = FB_WIDTH, + .yres = FB_HEIGHT, + .xres_virtual = FB_WIDTH, + .yres_virtual = FB_HEIGHT, .bits_per_pixel = 16, .red = { 11, 5, 0 }, .green = { 5, 6, 0 }, .blue = { 0, 5, 0 }, - .height = -1, - .width = -1, + .height = FB_HEIGHT, + .width = FB_WIDTH, .accel_flags = FB_ACCEL_NONE, - //The following values seem to not affect the screeen behavior - .pixclock = 10, - .left_margin = 1, - .right_margin = 0, - .upper_margin = 0, - .lower_margin = 0, -// .hsync_len = 96, - .hsync_len = 2, - .vsync_len = 2, - .vmode = FB_VMODE_NONINTERLACED + }; static struct fb_fix_screeninfo g900fb_fix __initdata = { - .id = "g900 FB", - .type = FB_TYPE_PACKED_PIXELS, - .visual = FB_VISUAL_TRUECOLOR, - .xpanstep = 8, - .accel = FB_ACCEL_NONE, - .ypanstep = 1, - .ywrapstep = 0, - .smem_start = VIDEOMEMSTART, - .smem_len = VIDEOMEMSIZE, + .id = "g900 FB", + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_TRUECOLOR, + .accel = FB_ACCEL_NONE, + .xpanstep = 1, + .ypanstep = 1, + .ywrapstep = 0, + .smem_start = VIDEOMEMSTART, + .smem_len = VIDEOMEMSIZE, + .line_length = FB_WIDTH * FB_BYTES_PER_PIXEL, }; static int g900fb_enable __initdata = 1; /* disabled by default */ module_param(g900fb_enable, bool, 0); -static int g900fb_check_var(struct fb_var_screeninfo *var, - struct fb_info *info); -static int g900fb_set_par(struct fb_info *info); -static int g900fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info); +static int g900fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); +//static int g900fb_set_par(struct fb_info *info); +static int g900fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info); static int g900fb_pan_display(struct fb_var_screeninfo *var,struct fb_info *info); +//static int g900fb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg); + +static void g900fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect); +static void g900fb_copyarea(struct fb_info *info, const struct fb_copyarea *region); +static void g900fb_imageblit(struct fb_info *info, const struct fb_image *image); + +static void g900fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) +{ +/* Метод уÑÐºÐ¾Ñ€ÐµÐ½Ð¸Ñ Ð´Ð»Ñ Ð·Ð°Ð¿Ð¾Ð»Ð½ÐµÐ½Ð¸Ñ Ð¿Ñ€Ñмоугольника линиÑми пикÑелей */ +/* похоже вообще не иÑпользуетьÑÑ */ + cfb_fillrect(info,rect); + +}; +static void g900fb_copyarea(struct fb_info *info, const struct fb_copyarea *region) +{ +/* Метод уÑÐºÐ¾Ñ€ÐµÐ½Ð¸Ñ ÐºÐ¾Ð¿Ð¸Ñ€Ð¾Ð²Ð°Ð½Ð¸Ñ Ð¾Ð´Ð½Ð¾Ð¹ прÑмоугольной облаÑти в другую */ +/* похоже вообще не иÑпользуетьÑÑ */ + cfb_copyarea(info,region); +}; +static void g900fb_imageblit(struct fb_info *info, const struct fb_image *image) +{ +/* Метод уÑÐºÐ¾Ñ€ÐµÐ½Ð¸Ñ Ñ€Ð¸ÑÐ¾Ð²Ð°Ð½Ð¸Ñ Ð½Ð° Ñкране картинки */ +/* Без Ñтого даже не отображаетьÑÑ ÐºÐ¾Ð½Ñоль !!! */ + cfb_imageblit(info,image); +}; + + +static int g900fb_mmap(struct fb_info *info, struct vm_area_struct *vma) +{}; static struct fb_ops g900fb_ops = { - .fb_check_var = g900fb_check_var, - .fb_set_par = g900fb_set_par, - .fb_setcolreg = g900fb_setcolreg, - .fb_pan_display = g900fb_pan_display, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, + .fb_check_var = g900fb_check_var, /* Проверка параметров */ + //.fb_set_par = g900fb_set_par, /* Программирование региÑтров контроллера */ + .fb_setcolreg = g900fb_setcolreg, /* УÑтановка карты цветов */ + .fb_pan_display = g900fb_pan_display, /* переключение Ñтраниц буферов */ + .fb_fillrect = g900fb_fillrect, + .fb_copyarea = g900fb_copyarea, + .fb_imageblit = g900fb_imageblit, + //.fb_ioctl = g900fb_ioctl, /* ЗавиÑÐ¸Ð¼Ð°Ñ Ð¾Ñ‚ уÑтройÑтва ioctl */ + //.fb_blank = g900fb_blank, /* Включение/выключение Ñкрана */ + //.fb_mmap = g900fb_mmap, }; - /* - * Internal routines - */ - -static u_long get_line_length(int xres_virtual, int bpp) +static inline u32 convert_bitfield(int val, struct fb_bitfield *bf) { - u_long length; + unsigned int mask = (1 << bf->length) - 1; - length = xres_virtual * bpp; - length = (length + 31) & ~31; - length >>= 3; - return (length); + return (val >> (16 - bf->length) & mask) << bf->offset; } - /* - * Setting the video mode has been split into two parts. - * First part, xxxfb_check_var, must not write anything - * to hardware, it should only verify and adjust var. - * This means it doesn't alter par but it does use hardware - * data from it to check this var. - */ + static int g900fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { - u_long line_length; - if (!var->xres) - var->xres = 1; - if (!var->yres) - var->yres = 1; - if (var->xres > var->xres_virtual) - var->xres_virtual = var->xres; - if (var->yres > var->yres_virtual) - var->yres_virtual = var->yres; - if (var->bits_per_pixel <= 1) - var->bits_per_pixel = 1; - else if (var->bits_per_pixel <= 8) - var->bits_per_pixel = 8; - else if (var->bits_per_pixel <= 16) - var->bits_per_pixel = 16; - else if (var->bits_per_pixel <= 24) - var->bits_per_pixel = 24; - else if (var->bits_per_pixel <= 32) - var->bits_per_pixel = 32; - else - return -EINVAL; - - if (var->xres_virtual < var->xoffset + var->xres) - var->xres_virtual = var->xoffset + var->xres; - if (var->yres_virtual < var->yoffset + var->yres) - var->yres_virtual = var->yoffset + var->yres; - - /* - * Memory limit - */ - line_length = - get_line_length(var->xres_virtual, var->bits_per_pixel); - if (line_length * var->yres_virtual > videomemorysize) - return -ENOMEM; - - /* - * Now that we checked it we alter var. The reason being is that the video - * mode passed in might not work but slight changes to it might make it - * work. This way we let the user know what is acceptable. - */ - switch (var->bits_per_pixel) { - case 1: - case 8: - var->red.offset = 0; - var->red.length = 8; - var->green.offset = 0; - var->green.length = 8; - var->blue.offset = 0; - var->blue.length = 8; - var->transp.offset = 0; - var->transp.length = 0; - break; - case 16: /* RGBA 5551 */ - if (var->transp.length) { - var->red.offset = 0; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 5; - var->blue.offset = 10; - var->blue.length = 5; - var->transp.offset = 15; - var->transp.length = 1; - } else { /* RGB 565 */ - var->red.offset = 0; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 6; - var->blue.offset = 11; - var->blue.length = 5; - var->transp.offset = 0; - var->transp.length = 0; + if((var->rotate & 1) != (info->var.rotate & 1)) { + if((var->xres != info->var.yres) || + (var->yres != info->var.xres) || + (var->xres_virtual != info->var.yres) || + (var->yres_virtual > + info->var.xres * FB_NUMBER_OF_BUFFERS) || + (var->yres_virtual < info->var.xres )) { + return -EINVAL; + } + } else { + if((var->xres != info->var.xres) || + (var->yres != info->var.yres) || + (var->xres_virtual != info->var.xres) || + (var->yres_virtual > + info->var.yres * FB_NUMBER_OF_BUFFERS) || + (var->yres_virtual < info->var.yres )) { + return -EINVAL; } - break; - case 24: /* RGB 888 */ - var->red.offset = 0; - var->red.length = 8; - var->green.offset = 8; - var->green.length = 8; - var->blue.offset = 16; - var->blue.length = 8; - var->transp.offset = 0; - var->transp.length = 0; - break; - case 32: /* RGBA 8888 */ - var->red.offset = 0; - var->red.length = 8; - var->green.offset = 8; - var->green.length = 8; - var->blue.offset = 16; - var->blue.length = 8; - var->transp.offset = 24; - var->transp.length = 8; - break; } - var->red.msb_right = 0; - var->green.msb_right = 0; - var->blue.msb_right = 0; - var->transp.msb_right = 0; - + if((var->xoffset != info->var.xoffset) || + (var->bits_per_pixel != info->var.bits_per_pixel) || + (var->grayscale != info->var.grayscale)) { + return -EINVAL; + } return 0; } @@ -229,12 +184,18 @@ static int g900fb_check_var(struct fb_var_screeninfo *var, * the hardware state info->par and fix which can be affected by the * change in par. For this driver it doesn't do much. */ + /* static int g900fb_set_par(struct fb_info *info) { - info->fix.line_length = get_line_length(info->var.xres_virtual, info->var.bits_per_pixel); + struct g900_fb *fb = container_of(info, struct g900_fb, fb); + if(fb->rotation != fb->fb.var.rotate) { + fb->rotation = fb->fb.var.rotate; + //TODO: Dynamic Rotation!!! + } + return 0; } - +*/ /* * Set a single color register. The values supplied are already * rounded down to the hardware's capabilities (according to the @@ -244,127 +205,99 @@ static int g900fb_set_par(struct fb_info *info) static int g900fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info) { - if (regno >= 256) /* no. of hw registers */ - return 1; - /* - * Program hardware... do anything you want with transp - */ + struct g900_fb *fb = container_of(info, struct g900_fb, fb); - /* grayscale works only partially under directcolor */ - /* grayscale = 0.30*R + 0.59*G + 0.11*B */ - if (info->var.grayscale) {red = green = blue =(red * 77 + green * 151 + blue * 28) >> 8;} - - /* Directcolor: - * var->{color}.offset contains start of bitfield - * var->{color}.length contains length of bitfield - * {hardwarespecific} contains width of RAMDAC - * cmap[X] is programmed to (X << red.offset) | (X << green.offset) | (X << blue.offset) - * RAMDAC[X] is programmed to (red, green, blue) - * - * Pseudocolor: - * uses offset = 0 && length = RAMDAC register width. - * var->{color}.offset is 0 - * var->{color}.length contains widht of DAC - * cmap is not used - * RAMDAC[X] is programmed to (red, green, blue) - * Truecolor: - * does not use DAC. Usually 3 are present. - * var->{color}.offset contains start of bitfield - * var->{color}.length contains length of bitfield - * cmap is programmed to (red << red.offset) | (green << green.offset) | - * (blue << blue.offset) | (transp << transp.offset) - * RAMDAC does not exist - */ -#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) - switch (info->fix.visual) { - case FB_VISUAL_TRUECOLOR: - case FB_VISUAL_PSEUDOCOLOR: - red = CNVT_TOHW(red, info->var.red.length); - green = CNVT_TOHW(green, info->var.green.length); - blue = CNVT_TOHW(blue, info->var.blue.length); - transp = CNVT_TOHW(transp, info->var.transp.length); - break; - case FB_VISUAL_DIRECTCOLOR: - red = CNVT_TOHW(red, 8); /* expect 8 bit DAC */ - green = CNVT_TOHW(green, 8); - blue = CNVT_TOHW(blue, 8); - /* hey, there is bug in transp handling... */ - transp = CNVT_TOHW(transp, 8); - break; - } -#undef CNVT_TOHW - /* Truecolor has hardware independent palette */ - if (info->fix.visual == FB_VISUAL_TRUECOLOR) { - u32 v; - - if (regno >= 16) - return 1; - - v = (red << info->var.red.offset) | - (green << info->var.green.offset) | - (blue << info->var.blue.offset) | - (transp << info->var.transp.offset); - - switch (info->var.bits_per_pixel) { - case 8: - break; - case 16: - ((u32 *) (info->pseudo_palette))[regno] = v; - break; - case 24: - case 32: - ((u32 *) (info->pseudo_palette))[regno] = v; - break; - } + if (regno < 16) { + fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) | + convert_bitfield(blue, &fb->fb.var.blue) | + convert_bitfield(green, &fb->fb.var.green) | + convert_bitfield(red, &fb->fb.var.red); return 0; } - return 0; + else { + return 1; + } } - /* - * Pan or Wrap the Display - * - * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag - */ - static int g900fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { - u32 total; - - if (var->vmode & FB_VMODE_YWRAP) { - if (var->yoffset < 0 - || var->yoffset >= info->var.yres_virtual - || var->xoffset) - return -EINVAL; - } else { - if (var->xoffset + var->xres > info->var.xres_virtual || - var->yoffset + var->yres > info->var.yres_virtual) - return -EINVAL; - } - info->var.xoffset = var->xoffset; - info->var.yoffset = var->yoffset; - if (var->vmode & FB_VMODE_YWRAP) - info->var.vmode |= FB_VMODE_YWRAP; - else - info->var.vmode &= ~FB_VMODE_YWRAP; - - - -// var->xoffset = 20; - var->xoffset = 0; - total = var->yoffset * info->fix.line_length + var->xoffset; - - // Needs to be rewritten - info->fix.smem_start=VIDEOMEMSTART - total; - - - return 0; + struct fb_copyarea fbca; + return 0; } +/* + * Initialisation + */ +static int __init g900fb_probe(struct platform_device *dev) +{ + struct g900_fb *fb; + int retval = -ENOMEM; + + fb = kzalloc(sizeof(*fb), GFP_KERNEL); + if(fb == NULL) + goto err; + + if (!request_mem_region(VIDEOMEMSTART, videomemorysize, "g900fb")) { + printk(KERN_INFO"g900fb: cannot get framebuffer\n"); + goto err1; + } + + fb->fb.flags = FBINFO_FLAG_DEFAULT; + fb->fb.fbops = &g900fb_ops; + fb->fb.pseudo_palette = fb->cmap; + fb->fb.fix = g900fb_fix; + fb->fb.var = g900fb_default; + + fb->fb.screen_base = ioremap(VIDEOMEMSTART, videomemorysize); + + retval = fb_set_var(&fb->fb, &fb->fb.var); + if(retval) + goto err1; + + retval = register_framebuffer(&fb->fb); + if (retval < 0) + goto err2; + + platform_set_drvdata(dev, &fb->fb); + + printk(KERN_INFO "fb%d: g900 frame buffer device, using %ldK of video memory\n", + fb->fb.node, videomemorysize >> 10); + + return 0; + +err2: + framebuffer_release(&fb->fb); +err1: + kfree(fb); +err: + iounmap(videomemory); + return retval; +} + +static int g900fb_remove(struct platform_device *dev) +{ + struct g900_fb *fb = platform_get_drvdata(dev); + + if (fb) { + unregister_framebuffer(&fb->fb); + iounmap(videomemory); + framebuffer_release(&fb->fb); + kfree(fb); + } + return 0; +} + +static struct platform_driver g900fb_driver = { + .probe = g900fb_probe, + .remove = g900fb_remove, + .driver = { + .name = "g900fb", + }, +}; #ifndef MODULE static int __init g900fb_setup(char *options) @@ -386,74 +319,6 @@ static int __init g900fb_setup(char *options) } #endif /* MODULE */ - /* - * Initialisation - */ - -static int __init g900fb_probe(struct platform_device *dev) -{ - struct fb_info *info; - int retval = -ENOMEM; - - info = framebuffer_alloc(sizeof(u32) * 256, &dev->dev); - if (!info) - goto err; - - if (!request_mem_region(VIDEOMEMSTART, VIDEOMEMSIZE,"g900fb")) { - printk(KERN_INFO"g900fb: cannot get framebuffer\n"); - goto err2; - } - - - - info->screen_base = ioremap(VIDEOMEMSTART,videomemorysize); - info->fbops = &g900fb_ops; - info->var = g900fb_default; - info->fix = g900fb_fix; - info->pseudo_palette = info->par; - info->par = NULL; - info->flags = FBINFO_FLAG_DEFAULT; - - retval = fb_alloc_cmap(&info->cmap, 256, 0); - if (retval < 0) - goto err1; - - retval = register_framebuffer(info); - if (retval < 0) - goto err2; - platform_set_drvdata(dev, info); - - printk(KERN_INFO"fb%d: g900 frame buffer device, using %ldK of video memory\n", - info->node, videomemorysize >> 10); - return 0; -err2: - fb_dealloc_cmap(&info->cmap); -err1: - framebuffer_release(info); -err: - iounmap(videomemory); - return retval; -} - -static int g900fb_remove(struct platform_device *dev) -{ - struct fb_info *info = platform_get_drvdata(dev); - - if (info) { - unregister_framebuffer(info); - iounmap(videomemory); - framebuffer_release(info); - } - return 0; -} - -static struct platform_driver g900fb_driver = { - .probe = g900fb_probe, - .remove = g900fb_remove, - .driver = { - .name = "g900fb", - }, -}; static struct platform_device *g900fb_device; @@ -501,7 +366,7 @@ static void __exit g900fb_exit(void) } module_exit(g900fb_exit); -MODULE_AUTHOR("El Tuba "); -MODULE_DESCRIPTION("Framebuffer driver for the Toshiba g900"); +MODULE_AUTHOR("Angell "); +MODULE_DESCRIPTION("Framebuffer driver for the Toshiba g900 "); MODULE_LICENSE("GPL"); -#endif /* MODULE */ +#endif diff --git a/ramfs-android/default.prop b/ramfs-android/default.prop index cb83448f..14c7ca8a 100644 --- a/ramfs-android/default.prop +++ b/ramfs-android/default.prop @@ -5,7 +5,6 @@ ro.secure=0 ro.allow.mock.location=1 ro.debuggable=1 persist.service.adb.enable=1 -#ro.sf.lcd_density=180 ro.sf.lcd_density=210 #dalvik.vm.heapsize=10m diff --git a/ramfs-android/init b/ramfs-android/init index 415bfd13..a3a0efc6 100755 --- a/ramfs-android/init +++ b/ramfs-android/init @@ -62,7 +62,7 @@ if [ ! -e /sys/block/mmcblk0/mmcblk0p1 ] ; then fi echo "Mounting SD card to /sdcard" -/bin/mount -t vfat /dev/block/mmcblk0p1 /sdcard +/bin/mount -t vfat -o rw,umask=0,codepage=866,iocharset=cp1251 /dev/block/mmcblk0p1 /sdcard [ $? -eq 0 ] || fail "Failed to Mount SD Card" #echo "Dumping kernel log." @@ -102,20 +102,33 @@ fi #/bin/losetup /dev/block/loop2 /sdcard/ANDROID/extram.img #[ $? -eq 0 ] && /bin/swapon /dev/block/loop2 -if [ -e /sdcard/ANDROID/userscript.sh ] ; then - cp /sdcard/ANDROID/userscript.sh /data - /bin/chmod 777 /data/userscript.sh - /data/userscript.sh +#mkdir /cache + +#echo "Mapping file 'cache.img' to 'loop' device /dev/loop2" +#/bin/losetup /dev/block/loop2 /sdcard/ANDROID/cache.img +#[ $? -eq 0 ] || fail "Failed to find cache.img on SD Card" + +#echo "Mount '/dev/loop2' to /cache" +#/bin/mount -t ext2 /dev/block/loop2 /cache +#[ $? -eq 0 ] || fail "Failed to mount /cache" + + + +if [ -e /sdcard/ANDROID/bootscript.sh ] ; then + cp /sdcard/ANDROID/bootscript.sh /data + /bin/chmod 777 /data/bootscript.sh + /data/bootscript.sh fi -export LD_PRELOAD=/system/lib/libts.so:/system/lib/ts/pthres.so +dmesg > /sdcard/ANDROID/kernel.log -if [ -f /sdcard/ts ] ; then - echo "EXECUTE CALIBRATE TOUCHSCREEN!!!" - /bin/mkdir -m 0777 /data/system/tslib - /system/bin/ts_calibrate - /bin/rm /sdcard/ts -fi +#export LD_PRELOAD=/system/lib/libts.so:/system/lib/ts/pthres.so +#if [ -f /sdcard/ts ] ; then +# echo "EXECUTE CALIBRATE TOUCHSCREEN!!!" +# /bin/mkdir -m 0777 /data/system/tslib +# /system/bin/ts_calibrate +# /bin/rm /sdcard/ts +#fi #exec /bin/sh diff --git a/ramfs-android/init.rc b/ramfs-android/init.rc index cd21201f..d6245b0b 100755 --- a/ramfs-android/init.rc +++ b/ramfs-android/init.rc @@ -177,6 +177,8 @@ on boot hostname localhost domainname localdomain + alsa_ctl init + # set RLIMIT_NICE to allow priorities from 19 to -20 setrlimit 13 40 40 @@ -211,7 +213,7 @@ on boot setprop alsa.mixer.playback.speaker Master ### RIL - #setprop rild.libpath "/system/lib/libreference-ril.so" +# setprop rild.libpath "/system/lib/g900-ril.so" setprop rild.libpath "/system/lib/libhtcgeneric-ril.so" setprop rild.libargs "-d /dev/ttyS0" @@ -419,10 +421,6 @@ on property:init.svc.wpa_supplicant=stopped ### SOUND HACK!!!!!!!!! -service alsa-init /system/bin/alsa_ctl init - oneshot - user root - group root service alsa-set /system/bin/alsa_amixer sset "Master" "100,0" "on" oneshot diff --git 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