/* Copyright (c) 2006 NVIDIA Corporation.  All rights reserved.
 *
 * NVIDIA Corporation and its licensors retain all intellectual property 
 * and proprietary rights in and to this software, related documentation 
 * and any modifications thereto.  Any use, reproduction, disclosure or 
 * distribution of this software and related documentation without an 
 * express license agreement from NVIDIA Corporation is strictly prohibited.
 */

#if !defined (__GFVXSCR_INC__)
#define __GFVXSCR_INC__

/** VxAPI GFVXVIPINFO::Flag flagbit: 8-bit/clock video data.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_PARALLEL_INPUT             0x00000001

/** VxAPI GFVXVIPINFO::Flag flagbit: Serial input.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_SERIAL_INPUT               0x00000002

/** VxAPI GFVXVIPINFO::Flag flagbit: VHSYNC and VVSYNC in the data stream.
    If this flag is set, vertical and horizontal sync for the camera picture
    is contained in the data stream going into the data port of the VIP.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_HVSYNC_IN_STREAM           0x00000004

/** VxAPI GFVXVIPINFO::Flag flagbit: Camera VHSYNC asserted by external signal.
    If this flag is set, vertical and horizontal sync for the camera picture
    is asserted to the GoForce chip by external signals, usually coming from
    the camera chip.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_EXTERNAL_VHSYNC            0x00000008

/** VxAPI GFVXVIPINFO::Flag flagbit: Camera VHSYNC generated by GoForce chip.
    If this flag is set, vertical and horizontal sync is generated by the
    GoForce chip, and not contained in the data stream. The following members
    of GFVXVIPINFO have to be set to define the timing:
    - GFVXVIPINFO::VHPulseWidth
    - GFVXVIPINFO::VHPulsePeriod
    - GFVXVIPINFO::VVPulseWidth
    - GFVXVIPINFO::VVPulsePeriod
    - GFVXVIPINFO::VVDelay
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_INTERNAL_VHSYNC            0x00000010

/** VxAPI GFVXVIPINFO::Flag flagbit: VCLK generated externally.
    If this flag is set, camera VCLK is provided from an external source,
    and VLCK will be selected as clock source for VI module.
    @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVX_VIP_EXTERNAL_VCLK_PRESERVE_CLKSEL
*/
#define GFVX_VIP_EXTERNAL_VCLK              0x00000020

/** VxAPI GFVXVIPINFO::Flag flagbit: VCLK generated by GoForce chip.
    If this flag is set, camera VCLK is provided by the GoForce chip.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_INTERNAL_VCLK              0x00000040

/** VxAPI GFVXVIPINFO::Flag flagbit: Detect field 0 or 1, will not work for
    internal VHSYNC (#GFVX_VIP_INTERNAL_VHSYNC).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_DETECT_FIELD               0x00000080

/** VxAPI GFVXVIPINFO::Flag flagbit: Horizontal flip.
    Flip VIP image horizontally.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_RGB_H_FLIP                 0x00000100

/** VxAPI GFVXVIPINFO::Flag flagbit: Vertical flip.
    Flip VIP image vertically.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_RGB_V_FLIP                 0x00000200

/** VxAPI GFVXVIPINFO::Flag flagbit: CPU feeds image to VIP.
    This flag indicates to the VIP, that image data is fed from the
    host interface.
    @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVxVIPFeedImage()
*/
#define GFVX_VIP_HOST_IMAGE                 0x00000400

/** VxAPI GFVXVIPINFO::Flag flagbit: Change the default timing for VHSYNC and
    VCLK. If this flag is set, VHSYNC and VCLK timing characteristics such as
    polarity, active edge, serial frame polarity, size, field info are
    overridden with GFVxVIPSetVIP() by the parameters passed in
    GFVXVIPINFO::NewTiming.
    
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_CHANGE_DEFAULT_TIMING      0x00000800

/** VxAPI GFVXVIPINFO::Flag flagbit: Camera master clock provided by GoForce
    chip. When this flag is set, GFVXVIPINFO::MClockFreq must be set to the
    ideal clock which the camera wants. Internally the best matching frequency
    is provided to the camera.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_ASK_FOR_MCLOCK             0x00001000

/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type A interface.
    @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2
*/
#define GFVX_VIP_TYPE_A                     0x00002000    

/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type B interface.
    @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2
*/
#define GFVX_VIP_TYPE_B                     0x00004000    

/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type C interface.
    @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2
*/
#define GFVX_VIP_TYPE_C                     0x00008000    

/** VxAPI GFVXVIPINFO::Flag flagbit: Camera is running at type C interface
    and do not remove the 0xFF, 0x02 sequence.
    @see GFVXVIPINFO, GFVxVIPSetVIP(), pageVxOverview2
*/
#define GFVX_VIP_TYPE_C_RAW                 0x00010000

/** VxAPI GFVXVIPINFO::Flag flagbit: Enable destination byte swap for YUV/RGB
    data written to preview surface.

    This flag enables byte swap for 32 bit words of data coming from VIP and
    going to a target RGB or YUV422 surface. The sequence of 4 byte groups in
    <code>(LSB)b0 b1 b2 b3(MSB)</code> order is swapped to
    <code>(LSB)b1 b0 b3 b2(MSB)</code>.

    This flag only affects data written to a preview surface, i.e. VIP image
    capture enabled with GFVxVIPSetVIP() and GFVxVIPUpdate(). It does not
    affect raw data going to the JPEG/MPEG encoder.
    
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_DEST_BYTE_SWAP             0x00020000

/** VxAPI GFVXVIPINFO::Flag flagbit: VI output without rotation    
    Rotate VIP image 0 degree
    @version SC15 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_ROTATE_0                   0x00040000

/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 90 degree rotation
    Rotate VIP image 90 degree 
    @version SC15 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_ROTATE_90                  0x00080000

/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 180 degree rotation
    Rotate VIP image 180 degree
    @version SC15 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_ROTATE_180                 0x00100000

/** VxAPI GFVXVIPINFO::Flag flagbit: VI output with 270 degree rotation
    Rotate VIP image 270 degree
    @version SC15 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_ROTATE_270                 0x00200000

/** VxAPI GFVXVIPINFO::Flag flagbit: RGB565 input to EPP.
    @todo clarify
    @version SC15 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_RGB565                     0x00400000

/** VxAPI GFVXVIPINFO::Flag flagbit: RGB888 input to EPP.
    @todo clarify
    @version SC15 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_RGB888                     0x00800000

/** VxAPI GFVXVIPINFO::Flag flagbit: RGB444 input to EPP.
    @todo clarify
    @version SC15 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_RGB444                     0x01000000

/** VxAPI GFVXVIPINFO::Flag flagbit: Preserve VI clock source but enable external VLCK pad.
    This flag can be used in combination with GFVX_VIP_EXTERNAL_VCLK to enable
    an external clock on VLCK, but keep the VI module clocksource.
    @version SC15 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP(), GFVX_VIP_EXTERNAL_VCLK
*/
#define GFVX_VIP_EXTERNAL_VCLK_PRESERVE_CLKSEL 0x02000000

/** VxAPI GFVXVIPINFO::Flag flagbit: VIP input type D interface.
    @version SC17 and above
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_TYPE_D 0x04000000

#define GFVX_VIP_CSI_ENABLE                    0x08000000

/** VxAPI GFVXVIPINFO::Flag flagbit: Bypass any manipulation on internal master
    clock generation output pin.

    This flag is mutually exclusive to #GFVX_VIP_PRE_GENERATE_MCLOCK and
    #GFVX_VIP_ASK_FOR_MCLOCK.

    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_BYPASS_MCLOCK_PIN          0x20000000

/** VxAPI GFVXVIPINFO::Flag flagbit: Bypass any manipulation on VCLK, VHSYNC,
    and VID[7:0] pins.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_BYPASS_NON_MCLOCK_PINS     0x40000000

/** VxAPI GFVXVIPINFO::Flag flagbit: Pre-generation of master clock.
    Useful for scanning the I2C bus for a camera.
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_PRE_GENERATE_MCLOCK        0x80000000

/**
    Bypass ISP mode.
*/
#define GFVX_VIP_BYPASS_ISP                0x10000000

/** VxAPI GFVXVIPINFO::NewTiming flagbit: Parallel data latched at falling edge
    of VCLK (default is rising edge).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_PDL_FALLING_VCLK          0x00000001

/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial data lacthed at rising edge of
    VCLK (default is falling edge).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_SDL_RISING_VCLK           0x00000001

/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC active low (default is active
    high).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_VHSYNC_ACTIVE_LOW         0x00000002

/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC active low (default is active
    high).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_VVSYNC_ACTIVE_LOW         0x00000004

/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC active leading edge (default
    is trailing edge).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_VHSYNC_ACTIVE_EDGE_LEAD   0x00000008

/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC active leading edge  (default
    is trailing edge).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_VVSYNC_ACTIVE_EDGE_LEAD   0x00000010

/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial video frame sync active low,
    falling edge indicates start of data frame (default is active high, rising
    edge indicates start of data frame).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_SFRAME_ACTIVE_LOW         0x00000020

/** VxAPI GFVXVIPINFO::NewTiming flagbit: Serial video input is 16 bit per
    frame (default is 8 bit per frame).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_SFRAME_SIZE_16            0x00000040

/** VxAPI GFVXVIPINFO::NewTiming flagbit: Field 0 is bottom/even field
    (default is top/odd field).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_FILED_0_BOTTOM            0x00000080

/** VxAPI GFVXVIPINFO::NewTiming flagbit: VCLK output from GoForce chip active
    low (default is active high).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_VCLK_OUTPUT_ACTIVE_LOW    0x00000100

#define GFVX_VIP_VHSYNC_ACTIVE_LOW_RESET   0x00000200

/** VxAPI GFVXVIPINFO::NewTiming flagbit: VVSYNC reset active low (default is active
    high).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/
#define GFVX_VIP_VVSYNC_ACTIVE_LOW_RESET   0x00000400

/** VxAPI GFVXVIPINFO::NewTiming flagbit: VHSYNC reset active leading edge (default
    is trailing edge).
    @see GFVXVIPINFO, GFVxVIPSetVIP()
*/


#endif