1741 lines
94 KiB
C
Executable File
1741 lines
94 KiB
C
Executable File
/* Copyright (c) 2006 NVIDIA Corporation. All rights reserved.
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*
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* NVIDIA Corporation and its licensors retain all intellectual property
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* and proprietary rights in and to this software, related documentation
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* and any modifications thereto. Any use, reproduction, disclosure or
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* distribution of this software and related documentation without an
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* express license agreement from NVIDIA Corporation is strictly prohibited.
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*/
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#if !defined __GFDISPCMDDATA_H__
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#define __GFDISPCMDDATA_H__
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// Display Signal Options 0
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#define GF_DEFAULT_TABLE 0x01 // Display Default Table Support
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#define GF_DXAPI_SUPPORT 0x02 // DxAPI Support
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#define GF_FMARK_SUPPORT 0x04 // FMARK Supported by panel
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#define GFSDXAPI_PROC0 0x80000000 // PROC0 in Display DxAPI table in Script
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#define GFSDXAPI_PROC1 0x80000001 // PROC1 in Display DxAPI table in Script
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#define GFSDXAPI_PROC2 0x80000002 // PROC2 in Display DxAPI table in Script
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#define GFSDXAPI_PROC3 0x80000003 // PROC3 in Display DxAPI table in Script
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#define GFSDXAPI_PROC4 0x80000004 // PROC4 in Display DxAPI table in Script
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#define GFSDXAPI_PROC5 0x80000005 // PROC5 in Display DxAPI table in Script
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#define GFSDXAPI_PROC6 0x80000006 // PROC6 in Display DxAPI table in Script
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#define GFSDXAPI_PROC7 0x80000007 // PROC7 in Display DxAPI table in Script
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#define GFSDXAPI_PROC8 0x80000008 // PROC8 in Display DxAPI table in Script
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#define GFSDXAPI_PROC9 0x80000009 // PROC9 in Display DxAPI table in Script
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#define GFSDXAPI_PROC10 0x8000000A // PROC10 in Display DxAPI table in Script
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#define GFSDXAPI_PROC11 0x8000000B // PROC11 in Display DxAPI table in Script
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#define GFSDXAPI_PROC12 0x8000000C // PROC12 in Display DxAPI table in Script
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#define GFSDXAPI_PROC13 0x8000000D // PROC13 in Display DxAPI table in Script
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#define GFSDXAPI_PROC14 0x8000000E // PROC14 in Display DxAPI table in Script
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#define GFSDXAPI_PROC15 0x8000000F // PROC14 in Display DxAPI table in Script
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#define GFSDXAPI_PROC16 0x80000010 // PROC16 in Display DxAPI table in Script
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#define GFSDXAPI_PROC17 0x80000011 // PROC17 in Display DxAPI table in Script
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#define GFSDXAPI_PROC18 0x80000012 // PROC18 in Display DxAPI table in Script
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#define GFSDXAPI_PROC19 0x80000013 // PROC19 in Display DxAPI table in Script
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#define GFSDXAPI_PROC20 0x80000014 // PROC20 in Display DxAPI table in Script
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#define GFSDXAPI_PROC21 0x80000015 // PROC21 in Display DxAPI table in Script
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#define GFSDXAPI_PROC22 0x80000016 // PROC22 in Display DxAPI table in Script
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#define GFSDXAPI_PROC23 0x80000017 // PROC23 in Display DxAPI table in Script
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#define GFSDXAPI_PROC24 0x80000018 // PROC24 in Display DxAPI table in Script
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#define GFSDXAPI_PROC25 0x80000019 // PROC25 in Display DxAPI table in Script
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#define GFSDXAPI_PROC26 0x8000001A // PROC26 in Display DxAPI table in Script
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#define GFSDXAPI_PROC27 0x8000001B // PROC27 in Display DxAPI table in Script
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#define GFSDXAPI_PROC28 0x8000001C // PROC28 in Display DxAPI table in Script
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#define GFSDXAPI_PROC29 0x8000001D // PROC29 in Display DxAPI table in Script
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#define GFSDXAPI_PROC30 0x8000001E // PROC30 in Display DxAPI table in Script
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#define GFSDXAPI_PROC31 0x8000001F // PROC31 in Display DxAPI table in Script
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#define GFSDXAPI_PROC_END 0x8000FFFF // PROC End in Display DxAPI table in Script
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#define OFFSET_DISP_SIGNAL_OPTIONS0 0x00000101
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#define GFSCMD_H_PULSE0 0x00088101
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#define GFSCMD_H_PULSE1 0x000A8101
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#define GFSCMD_H_PULSE2 0x000C8101
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#define GFSCMD_V_PULSE0 0x00108101
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#define GFSCMD_V_PULSE1 0x00128101
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#define GFSCMD_V_PULSE2 0x00138101
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#define GFSCMD_V_PULSE3 0x00148101
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#define GFSCMD_M0 0x00188101
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#define GFSCMD_M1 0x001A8101
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#define GF_H_PULSE0_DISABLE 0x00000000
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#define GF_H_PULSE0_ENABLE 0x00000100
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#define GF_H_PULSE1_DISABLE 0x00000000
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#define GF_H_PULSE1_ENABLE 0x00000400
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#define GF_H_PULSE2_DISABLE 0x00000000
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#define GF_H_PULSE2_ENABLE 0x00001000
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#define GF_V_PULSE0_DISABLE 0x00000000
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#define GF_V_PULSE0_ENABLE 0x00010000
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#define GF_V_PULSE1_DISABLE 0x00000000
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#define GF_V_PULSE1_ENABLE 0x00040000
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#define GF_V_PULSE2_DISABLE 0x00000000
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#define GF_V_PULSE2_ENABLE 0x00080000
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#define GF_V_PULSE3_DISABLE 0x00000000
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#define GF_V_PULSE3_ENABLE 0x00100000
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#define GF_M0_DISABLE 0x00000000
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#define GF_M0_ENABLE 0x01000000
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#define GF_M1_DISABLE 0x00000000
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#define GF_M1_ENABLE 0x02000000
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// Display Signal Options 1
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#define OFFSET_DISP_SIGNAL_OPTIONS1 0x00000102
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#define GFSCMD_DI 0x00108102
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#define GFSCMD_PP 0x00128102
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#define GF_DI_DISABLE 0x00000000
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#define GF_DI_ENABLE 0x00010000
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#define GF_PP_DISABLE 0x00000000
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#define GF_PP_ENABLE 0x00040000
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#define OFFSET_H_PULSE0_CONTROL 0x0000010c
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#define GFSCMD_H_PULSE0_MODE 0x0003810c
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#define GFSCMD_H_PULSE0_POLARITY 0x0004810c
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#define GFSCMD_H_PULSE0_V_QUAL 0x0006810c
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#define GFSCMD_H_PULSE0_LAST 0x0008810c
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#define GF_H_PULSE0_MODE_NORMAL 0x00000000
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#define GF_H_PULSE0_MODE_ONE_CLOCK 0x00000008
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#define GF_H_PULSE0_POLARITY_HIGH 0x00000000
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#define GF_H_PULSE0_POLARITY_LOW 0x00000010
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#define GF_H_PULSE0_V_QUAL_ALWAYS 0x00000000
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#define GF_H_PULSE0_V_QUAL_VACTIVE 0x00000080
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#define GF_H_PULSE0_V_QUAL_VACTIVE1 0x000000A0
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#define GF_H_PULSE0_LAST_START_A 0x00000000
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#define GF_H_PULSE0_LAST_END_A 0x00000100
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#define GF_H_PULSE0_LAST_START_B 0x00000200
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#define GF_H_PULSE0_LAST_END_B 0x00000300
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#define GF_H_PULSE0_LAST_START_C 0x00000400
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#define GF_H_PULSE0_LAST_END_C 0x00000500
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#define GF_H_PULSE0_LAST_START_D 0x00000600
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#define GF_H_PULSE0_LAST_END_D 0x00000700
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#define OFFSET_H_PULSE0_POSITION_A 0x0000010d
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#define GFSCMD_H_PULSE0_POSITION_A 0x0000810d
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#define OFFSET_H_PULSE1_CONTROL 0x00000111
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#define GFSCMD_H_PULSE1_MODE 0x00038111
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#define GFSCMD_H_PULSE1_POLARITY 0x00048111
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#define GFSCMD_H_PULSE1_V_QUAL 0x00068111
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#define GFSCMD_H_PULSE1_LAST 0x00088111
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#define GF_H_PULSE1_MODE_NORMAL 0x00000000
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#define GF_H_PULSE1_MODE_ONE_CLOCK 0x00000008
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#define GF_H_PULSE1_POLARITY_HIGH 0x00000000
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#define GF_H_PULSE1_POLARITY_LOW 0x00000010
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#define GF_H_PULSE1_V_QUAL_ALWAYS 0x00000000
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#define GF_H_PULSE1_V_QUAL_VACTIVE 0x00000080
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#define GF_H_PULSE1_V_QUAL_VACTIVE1 0x000000A0
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#define GF_H_PULSE1_LAST_START_A 0x00000000
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#define GF_H_PULSE1_LAST_END_A 0x00000100
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#define GF_H_PULSE1_LAST_START_B 0x00000200
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#define GF_H_PULSE1_LAST_END_B 0x00000300
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#define GF_H_PULSE1_LAST_START_C 0x00000400
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#define GF_H_PULSE1_LAST_END_C 0x00000500
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#define GF_H_PULSE1_LAST_START_D 0x00000600
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#define GF_H_PULSE1_LAST_END_D 0x00000700
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#define OFFSET_H_PULSE1_POSITION_A 0x00000112
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#define GFSCMD_H_PULSE1_POSITION_A 0x00008112
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#define OFFSET_H_PULSE2_CONTROL 0x00000116
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#define GFSCMD_H_PULSE2_MODE 0x00038116
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#define GFSCMD_H_PULSE2_POLARITY 0x00048116
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#define GFSCMD_H_PULSE2_V_QUAL 0x00068116
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#define GFSCMD_H_PULSE2_LAST 0x00088116
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#define GF_H_PULSE2_MODE_NORMAL 0x00000000
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#define GF_H_PULSE2_MODE_ONE_CLOCK 0x00000008
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#define GF_H_PULSE2_POLARITY_HIGH 0x00000000
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#define GF_H_PULSE2_POLARITY_LOW 0x00000010
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#define GF_H_PULSE2_V_QUAL_ALWAYS 0x00000000
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#define GF_H_PULSE2_V_QUAL_VACTIVE 0x00000080
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#define GF_H_PULSE2_V_QUAL_VACTIVE1 0x000000A0
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#define GF_H_PULSE2_LAST_START_A 0x00000000
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#define GF_H_PULSE2_LAST_END_A 0x00000100
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#define GF_H_PULSE2_LAST_START_B 0x00000200
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#define GF_H_PULSE2_LAST_END_B 0x00000300
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#define GF_H_PULSE2_LAST_START_C 0x00000400
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#define GF_H_PULSE2_LAST_END_C 0x00000500
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#define GF_H_PULSE2_LAST_START_D 0x00000600
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#define GF_H_PULSE2_LAST_END_D 0x00000700
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#define OFFSET_H_PULSE2_POSITION_A 0x00000117
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#define GFSCMD_H_PULSE2_POSITION_A 0x00008117
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#define GFSCMD_V_PULSE0_POLARITY 0x0004811b
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#define GFSCMD_V_PULSE0_DELAY_CNTRL 0x0006811b
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#define GFSCMD_V_PULSE0_LAST 0x0008811b
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#define GF_V_PULSE0_POLARITY_HIGH 0x00000000
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#define GF_V_PULSE0_POLARITY_LOW 0x00000010
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#define GF_V_PULSE0_NODELAY 0x00000000
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#define GF_V_PULSE0_DELAY 0x00000040
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#define GF_V_PULSE0_DELAY1 0x00000080
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#define GF_V_PULSE0_LAST_START_A 0x00000000
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#define GF_V_PULSE0_LAST_END_A 0x00000100
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#define GF_V_PULSE0_LAST_START_B 0x00000200
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#define GF_V_PULSE0_LAST_END_B 0x00000300
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#define GF_V_PULSE0_LAST_START_C 0x00000400
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#define GF_V_PULSE0_LAST_END_C 0x00000500
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#define OFFSET_V_PULSE0_POSITION_A 0x0000011c
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#define GFSCMD_V_PULSE0_POSITION_A 0x0000811c
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#define GF_V_PULSE0_START_A 0x00000000
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#define GF_V_PULSE0_END_A 0x00010000
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#define GFSCMD_V_PULSE1_POLARITY 0x0004811f
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#define GFSCMD_V_PULSE1_DELAY_CNTRL 0x0006811f
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#define GFSCMD_V_PULSE1_LAST 0x0008811f
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#define GF_V_PULSE1_POLARITY_HIGH 0x00000000
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#define GF_V_PULSE1_POLARITY_LOW 0x00000010
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#define GF_V_PULSE1_NODELAY 0x00000000
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#define GF_V_PULSE1_DELAY1 0x00000040
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#define GF_V_PULSE1_DELAY2 0x00000080
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#define GF_V_PULSE1_LAST_START_A 0x00000000
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#define GF_V_PULSE1_LAST_END_A 0x00000100
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#define GF_V_PULSE1_LAST_START_B 0x00000200
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#define GF_V_PULSE1_LAST_END_B 0x00000300
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#define GF_V_PULSE1_LAST_START_C 0x00000400
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#define GF_V_PULSE1_LAST_END_C 0x00000500
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#define OFFSET_V_PULSE1_POSITION_A 0x00000120
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#define GFSCMD_V_PULSE1_POSITION_A 0x00008120
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#define OFFSET_M0_CONTROL 0x00000127
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#define GFSCMD_M0_CLOCK_SELECT 0x00008127
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#define GFSCMD_M0_PHASE_CONTROL 0x00048127
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#define GFSCMD_M0_PHASE_RESET 0x00068127
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#define GFSCMD_M0_POLARITY 0x00078127
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#define GFSCMD_M0_PERIOD 0x00088127
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#define GFSCMD_M0_H_POSITION 0x00108127
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#define GF_M0_CLOCK_SELECT_PCLK 0x00000000
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#define GF_M0_CLOCK_SELECT_LCLK 0x00000002
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#define GF_M0_CLOCK_SELECT_FCLK 0x00000003
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#define GF_M0_PHASE_CONTROL_FREE_RUN 0x00000000
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#define GF_M0_PHASE_CONTROL_VACTIVE_RESTART 0x00000020
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#define GF_M0_PHASE_CONTROL_FRAME_INVERT 0x00000030
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#define GF_M0_PHASE_RESET_NOT_RESET 0x00000000
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#define GF_M0_PHASE_RESET_RESET 0x00000040
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#define GF_M0_POLARITY_HIGH 0x00000000
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#define GF_M0_POLARITY_LOW 0x00000080
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#define GF_M0_PERIOD_VAL 0x00000100
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#define GF_M0_H_POSITION_VAL 0x00010000
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#define OFFSET_M1_CONTROL 0x00000128
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#define GFSCMD_M1_CLOCK_SELECT 0x00008128
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#define GFSCMD_M1_PHASE_CONTROL 0x00048128
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#define GFSCMD_M1_PHASE_RESET 0x00068128
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#define GFSCMD_M1_POLARITY 0x00078128
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#define GFSCMD_M1_PERIOD 0x00088128
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#define GFSCMD_M1_H_POSITION 0x00108128
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#define GF_M1_CLOCK_SELECT_PCLK 0x00000000
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#define GF_M1_CLOCK_SELECT_LCLK 0x00000002
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#define GF_M1_CLOCK_SELECT_FCLK 0x00000003
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#define GF_M1_PHASE_CONTROL_FREE_RUN 0x00000000
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#define GF_M1_PHASE_CONTROL_VACTIVE_RESTART 0x00000020
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#define GF_M1_PHASE_CONTROL_FRAME_INVERT 0x00000030
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#define GF_M1_PHASE_RESET_NOT_RESET 0x00000000
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#define GF_M1_PHASE_RESET_RESET 0x00000040
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#define GF_M1_POLARITY_HIGH 0x00000000
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#define GF_M1_POLARITY_LOW 0x00000080
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#define GF_M1_PERIOD_VAL 0x00000100
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#define GF_M1_H_POSITION_VAL 0x00010000
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#define GF_DISP_CLOCK_CONTROL_0 0x0000012f
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#define GFSCMD_SHIFT_CLK_DIVIDER 0x0000812f
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#define GFSCMD_PIXEL_CLK_DIVIDER 0x0008812f
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//#define GF_SHCLKD_1_256_VAL 0x00000000
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#define GF_PCD1 0x00000000
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#define GF_PCD1H 0x00000100
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#define GF_PCD2 0x00000200
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#define GF_PCD3 0x00000300
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#define GF_PCD4 0x00000400
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#define GF_PCD6 0x00000500
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#define GF_PCD8 0x00000600
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#define GF_PCD9 0x00000700
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#define GF_PCD12 0x00000800
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#define GF_PCD16 0x00000900
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#define GF_PCD13 0x00000a00
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#define GF_PCD18 0x00000b00
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#define GF_PCD24 0x00000c00
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#define OFFSET_DISP_INTERFACE_CONTROL 0x00000130
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#define GFSCMD_DISP_DATA_FORMAT 0x00008130
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#define GFSCMD_DISP_DATA_ALIGNMENT 0x00088130
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#define GFSCMD_DISP_DATA_ORDER 0x00098130
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#define GF_DF1P1C_PRLL 0x00000000
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#define GF_DF1P2C24B_PRLL 0x00000001
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#define GF_DF1P2C18B_PRLL 0x00000002
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#define GF_DF1P2C16B_PRLL 0x00000003
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#define GF_DF1CNL_SRL 0x00000004
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#define GF_DF2CNL_SRL 0x00000005
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#define GF_DF3CNL_SRL 0x00000006
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#define GF_DF_SPI 0x00000007
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#define GF_MSB 0x00000000
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#define GF_LSB 0x00000100
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#define GF_RED_BLUE 0x00000000
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#define GF_BLUE_RED 0x00000200
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#define OFFSET_DISP_COLOR_CONTROL 0x00000131
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#define GFSCMD_BASE_COLOR_SIZE 0x00008131
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#define GFSCMD_DITHER_CONTROL 0x00088131
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#define GFSCMD_ORD_DITHER_ROTATION 0x000C8131
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#define GFSCMD_DISP_COLOR_SWAP 0x00108131
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#define GFSCMD_BLANK_COLOR 0x00118131
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#define GFSCMD_NON_BASE_COLOR 0x00128131
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#define GFSCMD_LCD_MD0 0x00188131
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#define GF_BASE666 0x00000000
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#define GF_BASE111 0x00000001
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#define GF_BASE222 0x00000002
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#define GF_BASE333 0x00000003
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#define GF_BASE444 0x00000004
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#define GF_BASE555 0x00000005
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#define GF_BASE565 0x00000006
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#define GF_BASE332 0x00000007
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#define GF_BASE888 0x00000008
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#define GF_DISABLE 0x00000000
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#define GF_ORDERED 0x00000200
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#define GF_ERRDIFF 0x00000300
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#define GF_ORD_DITHER_ROTATION_VAL 0x00000000
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#define GF_SWAP_RGB 0x00000000
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#define GF_SWAP_BGR 0x00010000
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#define GF_BLANK_ZERO 0x00000000
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#define GF_BLANK_ONES 0x00020000
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#define GF_NON_BASE_ZERO 0x00000000
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#define GF_NON_BASE_ONES 0x00040000
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#define GF_LCD_MD0_LOW 0x00000000
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#define GF_LCD_MD0_HIGH 0x01000000
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#define OFFSET_SHIFT_CLOCK_OPTIONS 0x00000132
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#define GFSCMD_SC0_H_QUALIFIER 0x00008132
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#define GFSCMD_SC0_V_QUALIFIER 0x00038132
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#define GFSCMD_SC0_CLK_DIVIDER 0x00068132
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#define GFSCMD_SC1_H_QUALIFIER 0x00108132
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#define GFSCMD_SC1_V_QUALIFIER 0x00138132
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#define GFSCMD_SC1_CLK_DIVIDER 0x00158132
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#define GF_SC0_H_DISABLE 0x00000000
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#define GF_SC0_H_NO_HQUAL 0x00000001
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#define GF_SC0_H_HACTIVE 0x00000002
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#define GF_SC0_H_EXT_HACTIVE 0x00000003
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#define GF_SC0_H_HPULSE0 0x00000004
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#define GF_SC0_H_EXT_HPULSE0 0x00000005
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#define GF_SC0_V_NO_VQUAL 0x00000000
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#define GF_SC0_V_RESERVED 0x00000008
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#define GF_SC0_V_VACTIVE 0x00000010
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#define GF_SC0_V_EXT_VACTIVE 0x00000018
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#define GF_SC0_V_VPULSE0 0x00000020
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#define GF_SC0_V_EXT_VPULSE0 0x00000028
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#define GF_SC0_DIV1 0x00000000
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#define GF_SC0_DIV2 0x00000040
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#define GF_SC0_DIV4 0x00000080
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#define GF_SC1_H_DISABLE 0x00000000
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#define GF_SC1_H_NO_HQUAL 0x00010000
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#define GF_SC1_H_HACTIVE 0x00020000
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#define GF_SC1_H_EXT_HACTIVE 0x00030000
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#define GF_SC1_H_HPULSE1 0x00040000
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#define GF_SC1_H_EXT_HPULSE1 0x00050000
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#define GF_SC1_V_NO_VQUAL 0x00000000
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#define GF_SC1_V_RESERVED 0x00080000
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#define GF_SC1_V_VACTIVE 0x00100000
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#define GF_SC1_V_EXT_VACTIVE 0x00180000
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#define GF_SC1_V_VPULSE1 0x00200000
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#define GF_SC1_V_EXT_VPULSE1 0x00280000
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#define GF_SC1_DIV1 0x00000000
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#define GF_SC1_DIV2 0x00400000
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#define GF_SC1_DIV4 0x00800000
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|
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#define OFFSET_DATA_ENABLE_OPTIONS 0x00000133
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|
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#define GFSCMD_DE_SELECT_ACTIVE 0x00008133
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#define GFSCMD_DE_CONTROL 0x00038133
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#define GF_DE_ACTIVE_ALL_LINES 0x00000000
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#define GF_DE_ACTIVE_NOBLANK 0x00000001
|
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#define GF_DE_ONECLK 0x00000000
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#define GF_DE_NORMAL 0x00000004
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#define GF_DE_ONE_CLK_PRECD_ACTIVE 0x00000008
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#define GF_DE_ONE_PIXEL_CLK_EARLY 0x0000000C
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#define OFFSET_SERIAL_INTERFACE_OPTIONS 0x00000134
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#define GFSCMD_SDT_STP_MODE 0x00008134
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#define GFSCMD_SDT_STP_DURATION 0x00028134
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#define GFSCMD_STH_DURATION 0x00068134
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#define GFSCMD_STP_CONTRO 0x00078134
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|
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#define GF_SDT_STP_DISABLE 0x00000000
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#define GF_SDT_STP_RESERVED 0x00000001
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#define GF_SDT_STP_ENABLE_DUP 0x00000002
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#define GF_SDT_STP_ENABLE 0x00000003
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#define GF_SDT_STP_DURATION_VAL 0x00000000
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#define GF_ONE_CLOCK 0x00000000
|
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#define GF_TWO_CLOCK 0x00000040
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#define GF_STP_NORMAL 0x00000000
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#define GF_STP_EXTENDED 0x00000080
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|
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#define OFFSET_LCD_LSPI_OPTIONS 0x00000135
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#define GFSCMD_LCD_SPI_CS_MAIN 0x00008135
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#define GFSCMD_LCD_SPI_DC 0x00018135
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#define GFSCMD_SPI_CS_CONTROL_LCD_IS_SPI 0x00028135
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#define GFSCMD_LCD_SPI_DIRECTION_LSB2MSB 0x00048135
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|
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#define GF_CS_MAIN 0x00000000
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#define GF_CS_SUB 0x00000001
|
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#define GF_LDC_LOW 0x00000000
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#define GF_LDC_HIGH 0x00000002
|
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#define GF_LCD_IS_SPI 0x00000000
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#define GF_LCD_SPI 0x00000004
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#define GF_IS_SPI 0x00000008
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#define GF_FORCED 0x0000000C
|
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#define GF_MSB2LSB 0x00000000
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#define GF_LSB2MSB 0x00000010
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|
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#define OFFSET_SIGNAL_RAISE 0x00000005
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#define GFSCMD_SIGNAL_RAISE_VECTOR 0x00008005
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#define GFSCMD_SIGNAL_RAISE_SELECT 0x00088005
|
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#define GFSCMD_SIGNAL_RAISE_CHANNEL_ID 0x00108005
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|
|
|
#define GF_RAISE_VECTOR_VAL 0x00000000
|
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#define GF_RAISE_NONE 0x00000000
|
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#define GF_RAISE_FRAME_END 0x00000100
|
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#define GF_RAISE_VBLANK 0x00000200
|
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#define GF_RAISE_VPULSE3 0x00000300
|
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#define GF_RAISE_CHANNEL_ID_VAL 0x00000000
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|
|
#define OFFSET_SIGNAL_REFCOUNT 0x00000006
|
|
#define GFSCMD_SIGNAL_REFCOUNT_VECTOR 0x00008006
|
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#define GFSCMD_SIGNAL_REFCOUNT_SELECT 0x00108006
|
|
|
|
#define GF_REFCOUNT_VECTOR_VAL 0x00000000
|
|
#define GF_REFCOUNT_NONE 0x00000000
|
|
#define GF_REFCOUNT_FRAME_END 0x00010000
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|
|
// Display Power Control
|
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|
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#define OFFSET_DISPLAY_POWER_CONTROL 0x00000009
|
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#define GFSCMD_PW0_CONTROL 0x00008009
|
|
#define GFSCMD_PW1_CONTROL 0x00028009
|
|
#define GFSCMD_PW2_CONTROL 0x00048009
|
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#define GFSCMD_PW3_CONTROL 0x00068009
|
|
#define GFSCMD_PW4_CONTROL 0x00088009
|
|
#define GFSCMD_PM0_CONTROL 0x00108009
|
|
#define GFSCMD_PM1_CONTROL 0x00128009
|
|
#define GFSCMD_SPI_CONTROL 0x00188009
|
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#define GFSCMD_HSPI_CONTROL 0x00198009
|
|
|
|
#define GF_PW0_DISABLE 0x00000000
|
|
#define GF_PW0_ENABLE 0x00000001
|
|
#define GF_PW1_DISABLE 0x00000000
|
|
#define GF_PW1_ENABLE 0x00000004
|
|
#define GF_PW2_DISABLE 0x00000000
|
|
#define GF_PW2_ENABLE 0x00000010
|
|
#define GF_PW3_DISABLE 0x00000000
|
|
#define GF_PW3_ENABLE 0x00000040
|
|
#define GF_PW4_DISABLE 0x00000000
|
|
#define GF_PW4_ENABLE 0x00010000
|
|
#define GF_PM0_DISABLE 0x00000000
|
|
#define GF_PM0_ENABLE 0x00040000
|
|
#define GF_PM1_DISABLE 0x00000000
|
|
#define GF_PM1_ENABLE 0x00400000
|
|
#define GF_SPI_DISABLE 0x00000000
|
|
#define GF_SPI_ENABLE 0x01000000
|
|
#define GF_HSPI_DISABLE 0x00000000
|
|
#define GF_HSPI_ENABLE 0x02000000
|
|
|
|
// Pin Output Enable registers
|
|
|
|
#define OFFSET_PIN_OUTPUT_ENABLE0 0x00000802
|
|
#define GFSCMD_LD0_PIN_OUTPUT 0x00008802
|
|
#define GFSCMD_LD1_PIN_OUTPUT 0x00028802
|
|
#define GFSCMD_LD2_PIN_OUTPUT 0x00048802
|
|
#define GFSCMD_LD3_PIN_OUTPUT 0x00068802
|
|
#define GFSCMD_LD4_PIN_OUTPUT 0x00088802
|
|
#define GFSCMD_LD5_PIN_OUTPUT 0x000a8802
|
|
#define GFSCMD_LD6_PIN_OUTPUT 0x000c8802
|
|
#define GFSCMD_LD7_PIN_OUTPUT 0x000e8802
|
|
#define GFSCMD_LD8_PIN_OUTPUT 0x00108802
|
|
#define GFSCMD_LD9_PIN_OUTPUT 0x00128802
|
|
#define GFSCMD_LD10_PIN_OUTPUT 0x00148802
|
|
#define GFSCMD_LD11_PIN_OUTPUT 0x00168802
|
|
#define GFSCMD_LD12_PIN_OUTPUT 0x00188802
|
|
#define GFSCMD_LD13_PIN_OUTPUT 0x001a8802
|
|
#define GFSCMD_LD14_PIN_OUTPUT 0x001c8802
|
|
#define GFSCMD_LD15_PIN_OUTPUT 0x001e8802
|
|
#define GFSCMD_LD0_LD15_PIN_OUTPUT 0x00208802
|
|
|
|
|
|
#define GF_LD0_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD0_OUTPUT_DISABLE 0x00000001
|
|
#define GF_LD1_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD1_OUTPUT_DISABLE 0x00000004
|
|
#define GF_LD2_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD2_OUTPUT_DISABLE 0x00000010
|
|
#define GF_LD3_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD3_OUTPUT_DISABLE 0x00000040
|
|
#define GF_LD4_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD4_OUTPUT_DISABLE 0x00000100
|
|
#define GF_LD5_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD5_OUTPUT_DISABLE 0x00000400
|
|
#define GF_LD6_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD6_OUTPUT_DISABLE 0x00001000
|
|
#define GF_LD7_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD7_OUTPUT_DISABLE 0x00004000
|
|
#define GF_LD8_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD8_OUTPUT_DISABLE 0x00010000
|
|
#define GF_LD9_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD9_OUTPUT_DISABLE 0x00040000
|
|
#define GF_LD10_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD10_OUTPUT_DISABLE 0x00100000
|
|
#define GF_LD11_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD11_OUTPUT_DISABLE 0x00400000
|
|
#define GF_LD12_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD12_OUTPUT_DISABLE 0x01000000
|
|
#define GF_LD13_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD13_OUTPUT_DISABLE 0x04000000
|
|
#define GF_LD14_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD14_OUTPUT_DISABLE 0x10000000
|
|
#define GF_LD15_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD15_OUTPUT_DISABLE 0x40000000
|
|
#define GF_LD0_LD15_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD0_LD15_OUTPUT_DISABLE 0x55555555
|
|
|
|
|
|
#define OFFSET_PIN_OUTPUT_ENABLE1 0x00000803
|
|
#define GFSCMD_LD16_PIN_OUTPUT 0x00008803
|
|
#define GFSCMD_LD17_PIN_OUTPUT 0x00028803
|
|
#define GFSCMD_LPW0_PIN_OUTPUT 0x00108803
|
|
#define GFSCMD_LPW1_PIN_OUTPUT 0x00128803
|
|
#define GFSCMD_LPW2_PIN_OUTPUT 0x00148803
|
|
#define GFSCMD_LSC0_PIN_OUTPUT 0x00188803
|
|
#define GFSCMD_LSC1_PIN_OUTPUT 0x001a8803
|
|
#define GFSCMD_LVS_PIN_OUTPUT 0x001c8803
|
|
#define GFSCMD_LHS_PIN_OUTPUT 0x001e8803
|
|
#define GFSCMD_LD16_LD17_PIN_OUTPUT 0x00208803
|
|
|
|
#define GF_LD16_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD16_OUTPUT_DISABLE 0x00000001
|
|
#define GF_LD17_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD17_OUTPUT_DISABLE 0x00000004
|
|
#define GF_LPW0_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LPW0_OUTPUT_DISABLE 0x00010000
|
|
#define GF_LPW1_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LPW1_OUTPUT_DISABLE 0x00040000
|
|
#define GF_LPW2_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LPW2_OUTPUT_DISABLE 0x00100000
|
|
#define GF_LSC0_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LSC0_OUTPUT_DISABLE 0x01000000
|
|
#define GF_LSC1_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LSC1_OUTPUT_DISABLE 0x04000000
|
|
#define GF_LVS_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LVS_OUTPUT_DISABLE 0x10000000
|
|
#define GF_LHS_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LHS_OUTPUT_DISABLE 0x40000000
|
|
#define GF_LD16_LD17_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LD16_LD17_OUTPUT_DISABLE 0x00000005
|
|
|
|
|
|
#define DC_PIN_OUTPUT_ENABLE2 0x00000804
|
|
#define GFSCMD_LHP0_PIN_OUTPUT 0x00008804
|
|
#define GFSCMD_LHP1_PIN_OUTPUT 0x00028804
|
|
#define GFSCMD_LHP2_PIN_OUTPUT 0x00048804
|
|
#define GFSCMD_LVP0_PIN_OUTPUT 0x00088804
|
|
#define GFSCMD_LVP1_PIN_OUTPUT 0x000A8804
|
|
#define GFSCMD_LM0_PIN_OUTPUT 0x00108804
|
|
#define GFSCMD_LM1_PIN_OUTPUT 0x00128804
|
|
#define GFSCMD_LDI_PIN_OUTPUT 0x00148804
|
|
#define GFSCMD_LPP_PIN_OUTPUT 0x00168804
|
|
|
|
#define GF_LHP0_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LHP0_OUTPUT_DISABLE 0x00000001
|
|
#define GF_LHP1_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LHP1_OUTPUT_DISABLE 0x00000004
|
|
#define GF_LHP2_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LHP2_OUTPUT_DISABLE 0x00000010
|
|
#define GF_LVP0_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LVP0_OUTPUT_DISABLE 0x00000100
|
|
#define GF_LVP1_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LVP1_OUTPUT_DISABLE 0x00000404
|
|
#define GF_LM0_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LM0_OUTPUT_DISABLE 0x00010000
|
|
#define GF_LM1_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LM1_OUTPUT_DISABLE 0x00040000
|
|
#define GF_LDI_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LDI_OUTPUT_DISABLE 0x00100000
|
|
#define GF_LPP_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LPP_OUTPUT_DISABLE 0x00400000
|
|
|
|
#define OFFSET_OUTPUT_ENABLE3 0x00000805
|
|
#define GFSCMD_LSCK_PIN_OUTPUT 0x00008805
|
|
#define GFSCMD_LSDA_PIN_OUTPUT 0x00028805
|
|
#define GFSCMD_LCSN_PIN_OUTPUT 0x00048805
|
|
#define GFSCMD_LDC_PIN_OUTPUT 0x00068805
|
|
#define GFSCMD_LSPI_PIN_OUTPUT 0x00088805
|
|
|
|
#define GF_LSCK_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LSCK_OUTPUT_DISABLE 0x00000001
|
|
#define GF_LSDA_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LSDA_OUTPUT_DISABLE 0x00000004
|
|
#define GF_LCSN_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LCSN_OUTPUT_DISABLE 0x00000010
|
|
#define GF_LDC_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LDC_OUTPUT_DISABLE 0x00000040
|
|
#define GF_LSPI_OUTPUT_ENABLE 0x00000000
|
|
#define GF_LSPI_OUTPUT_DISABLE 0x00000100
|
|
|
|
|
|
// Pin Output Polarity registers
|
|
|
|
#define OFFSET_PIN_OUTPUT_POLARITY0 0x00000806
|
|
#define GFSCMD_LD0_PIN_POLARITY 0x00008806
|
|
#define GFSCMD_LD1_PIN_POLARITY 0x00028806
|
|
#define GFSCMD_LD2_PIN_POLARITY 0x00048806
|
|
#define GFSCMD_LD3_PIN_POLARITY 0x00068806
|
|
#define GFSCMD_LD4_PIN_POLARITY 0x00088806
|
|
#define GFSCMD_LD5_PIN_POLARITY 0x000a8806
|
|
#define GFSCMD_LD6_PIN_POLARITY 0x000c8806
|
|
#define GFSCMD_LD7_PIN_POLARITY 0x000e8806
|
|
#define GFSCMD_LD8_PIN_POLARITY 0x00108806
|
|
#define GFSCMD_LD9_PIN_POLARITY 0x00128806
|
|
#define GFSCMD_LD10_PIN_POLARITY 0x00148806
|
|
#define GFSCMD_LD11_PIN_POLARITY 0x00168806
|
|
#define GFSCMD_LD12_PIN_POLARITY 0x00188806
|
|
#define GFSCMD_LD13_PIN_POLARITY 0x001a8806
|
|
#define GFSCMD_LD14_PIN_POLARITY 0x001c8806
|
|
#define GFSCMD_LD15_PIN_POLARITY 0x001e8806
|
|
#define GFSCMD_LD0_LD15_PIN_POLARITY 0x00208806
|
|
|
|
|
|
#define GF_LD0_POLARITY_HIGH 0x00000000
|
|
#define GF_LD0_POLARITY_LOW 0x00000001
|
|
#define GF_LD1_POLARITY_HIGH 0x00000000
|
|
#define GF_LD1_POLARITY_LOW 0x00000004
|
|
#define GF_LD2_POLARITY_HIGH 0x00000000
|
|
#define GF_LD2_POLARITY_LOW 0x00000010
|
|
#define GF_LD3_POLARITY_HIGH 0x00000000
|
|
#define GF_LD3_POLARITY_LOW 0x00000040
|
|
#define GF_LD4_POLARITY_HIGH 0x00000000
|
|
#define GF_LD4_POLARITY_LOW 0x00000100
|
|
#define GF_LD5_POLARITY_HIGH 0x00000000
|
|
#define GF_LD5_POLARITY_LOW 0x00000400
|
|
#define GF_LD6_POLARITY_HIGH 0x00000000
|
|
#define GF_LD6_POLARITY_LOW 0x00001000
|
|
#define GF_LD7_POLARITY_HIGH 0x00000000
|
|
#define GF_LD7_POLARITY_LOW 0x00004000
|
|
#define GF_LD8_POLARITY_HIGH 0x00000000
|
|
#define GF_LD8_POLARITY_LOW 0x00010000
|
|
#define GF_LD9_POLARITY_HIGH 0x00000000
|
|
#define GF_LD9_POLARITY_LOW 0x00040000
|
|
#define GF_LD10_POLARITY_HIGH 0x00000000
|
|
#define GF_LD10_POLARITY_LOW 0x00100000
|
|
#define GF_LD11_POLARITY_HIGH 0x00000000
|
|
#define GF_LD11_POLARITY_LOW 0x00400000
|
|
#define GF_LD12_POLARITY_HIGH 0x00000000
|
|
#define GF_LD12_POLARITY_LOW 0x01000000
|
|
#define GF_LD13_POLARITY_HIGH 0x00000000
|
|
#define GF_LD13_POLARITY_LOW 0x04000000
|
|
#define GF_LD14_POLARITY_HIGH 0x00000000
|
|
#define GF_LD14_POLARITY_LOW 0x10000000
|
|
#define GF_LD15_POLARITY_HIGH 0x00000000
|
|
#define GF_LD15_POLARITY_LOW 0x40000000
|
|
#define GF_LD0_LD15_POLARITY_HIGH 0x00000000
|
|
#define GF_LD0_LD15_POLARITY_LOW 0x55555555
|
|
|
|
#define OFFSET_PIN_OUTPUT_POLARITY1 0x00000807
|
|
#define GFSCMD_LD16_PIN_POLARITY 0x00008807
|
|
#define GFSCMD_LD17_PIN_POLARITY 0x00028807
|
|
#define GFSCMD_LPW0_PIN_POLARITY 0x00108807
|
|
#define GFSCMD_LPW1_PIN_POLARITY 0x00128807
|
|
#define GFSCMD_LPW2_PIN_POLARITY 0x00148807
|
|
#define GFSCMD_LSC0_PIN_POLARITY 0x00188807
|
|
#define GFSCMD_LSC1_PIN_POLARITY 0x001a8807
|
|
#define GFSCMD_LVS_PIN_POLARITY 0x001c8807
|
|
#define GFSCMD_LHS_PIN_POLARITY 0x001e8807
|
|
#define GFSCMD_LD16_LD17_PIN_POLARITY 0x00208807
|
|
|
|
#define GF_LD16_POLARITY_HIGH 0x00000000
|
|
#define GF_LD16_POLARITY_LOW 0x00000001
|
|
#define GF_LD17_POLARITY_HIGH 0x00000000
|
|
#define GF_LD17_POLARITY_LOW 0x00000004
|
|
#define GF_LPW0_POLARITY_HIGH 0x00000000
|
|
#define GF_LPW0_POLARITY_LOW 0x00010000
|
|
#define GF_LPW1_POLARITY_HIGH 0x00000000
|
|
#define GF_LPW1_POLARITY_LOW 0x00040000
|
|
#define GF_LPW2_POLARITY_HIGH 0x00000000
|
|
#define GF_LPW2_POLARITY_LOW 0x00100000
|
|
#define GF_LSC0_POLARITY_HIGH 0x00000000
|
|
#define GF_LSC0_POLARITY_LOW 0x01000000
|
|
#define GF_LSC1_POLARITY_HIGH 0x00000000
|
|
#define GF_LSC1_POLARITY_LOW 0x04000000
|
|
#define GF_LVS_POLARITY_HIGH 0x00000000
|
|
#define GF_LVS_POLARITY_LOW 0x10000000
|
|
#define GF_LHS_POLARITY_HIGH 0x00000000
|
|
#define GF_LHS_POLARITY_LOW 0x40000000
|
|
#define GF_LD16_LD17_POLARITY_HIGH 0x00000000
|
|
#define GF_LD16_LD17_POLARITY_LOW 0x00000005
|
|
|
|
#define DC_PIN_OUTPUT_POLARITY2 0x00000808
|
|
#define GFSCMD_LHP0_PIN_POLARITY 0x00008808
|
|
#define GFSCMD_LHP1_PIN_POLARITY 0x00028808
|
|
#define GFSCMD_LHP2_PIN_POLARITY 0x00048808
|
|
#define GFSCMD_LVP0_PIN_POLARITY 0x00088808
|
|
#define GFSCMD_LVP1_PIN_POLARITY 0x000A8808
|
|
#define GFSCMD_LM0_PIN_POLARITY 0x00108808
|
|
#define GFSCMD_LM1_PIN_POLARITY 0x00128808
|
|
#define GFSCMD_LDI_PIN_POLARITY 0x00148808
|
|
#define GFSCMD_LPP_PIN_POLARITY 0x00168808
|
|
|
|
#define GF_LHP0_POLARITY_HIGH 0x00000000
|
|
#define GF_LHP0_POLARITY_LOW 0x00000001
|
|
#define GF_LHP1_POLARITY_HIGH 0x00000000
|
|
#define GF_LHP1_POLARITY_LOW 0x00000004
|
|
#define GF_LHP2_POLARITY_HIGH 0x00000000
|
|
#define GF_LHP2_POLARITY_LOW 0x00000010
|
|
#define GF_LVP0_POLARITY_HIGH 0x00000000
|
|
#define GF_LVP0_POLARITY_LOW 0x00000100
|
|
#define GF_LVP1_POLARITY_HIGH 0x00000000
|
|
#define GF_LVP1_POLARITY_LOW 0x00000404
|
|
#define GF_LM0_POLARITY_HIGH 0x00000000
|
|
#define GF_LM0_POLARITY_LOW 0x00010000
|
|
#define GF_LM1_POLARITY_HIGH 0x00000000
|
|
#define GF_LM1_POLARITY_LOW 0x00040000
|
|
#define GF_LDI_POLARITY_HIGH 0x00000000
|
|
#define GF_LDI_POLARITY_LOW 0x00100000
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#define GF_LPP_POLARITY_HIGH 0x00000000
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#define GF_LPP_POLARITY_LOW 0x00400000
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#define OFFSET_OUTPUT_POLARITY3 0x00000809
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#define GFSCMD_LSCK_PIN_POLARITY 0x00008809
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#define GFSCMD_LSDA_PIN_POLARITY 0x00028809
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#define GFSCMD_LCSN_PIN_POLARITY 0x00048809
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#define GFSCMD_LDC_PIN_POLARITY 0x00068809
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#define GFSCMD_LSPI_PIN_POLARITY 0x00088809
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#define GF_LSCK_POLARITY_HIGH 0x00000000
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#define GF_LSCK_POLARITY_LOW 0x00000001
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#define GF_LSDA_POLARITY_HIGH 0x00000000
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#define GF_LSDA_POLARITY_LOW 0x00000004
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#define GF_LCSN_POLARITY_HIGH 0x00000000
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#define GF_LCSN_POLARITY_LOW 0x00000010
|
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#define GF_LDC_POLARITY_HIGH 0x00000000
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#define GF_LDC_POLARITY_LOW 0x00000040
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#define GF_LSPI_POLARITY_HIGH 0x00000000
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#define GF_LSPI_POLARITY_LOW 0x00000100
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// Pin Output data registers
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|
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#define OFFSET_PIN_OUTPUT_DATA0 0x0000080a
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#define GFSCMD_LD0_PIN_OUTPUT_DATA 0x0000880a
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#define GFSCMD_LD1_PIN_OUTPUT_DATA 0x0002880a
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#define GFSCMD_LD2_PIN_OUTPUT_DATA 0x0004880a
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#define GFSCMD_LD3_PIN_OUTPUT_DATA 0x0006880a
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#define GFSCMD_LD4_PIN_OUTPUT_DATA 0x0008880a
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#define GFSCMD_LD5_PIN_OUTPUT_DATA 0x000a880a
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#define GFSCMD_LD6_PIN_OUTPUT_DATA 0x000c880a
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#define GFSCMD_LD7_PIN_OUTPUT_DATA 0x000e880a
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#define GFSCMD_LD8_PIN_OUTPUT_DATA 0x0010880a
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#define GFSCMD_LD9_PIN_OUTPUT_DATA 0x0012880a
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#define GFSCMD_LD10_PIN_OUTPUT_DATA 0x0014880a
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#define GFSCMD_LD11_PIN_OUTPUT_DATA 0x0016880a
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#define GFSCMD_LD12_PIN_OUTPUT_DATA 0x0018880a
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#define GFSCMD_LD13_PIN_OUTPUT_DATA 0x001a880a
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#define GFSCMD_LD14_PIN_OUTPUT_DATA 0x001c880a
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#define GFSCMD_LD15_PIN_OUTPUT_DATA 0x001e880a
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#define GFSCMD_LD0_LD15_PIN_OUTPUT_DATA 0x0020880a
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#define GF_LD0_DATA_LOW 0x00000002
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#define GF_LD0_DATA_HIGH 0x00000003
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#define GF_LD1_DATA_LOW 0x00000008
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#define GF_LD1_DATA_HIGH 0x0000000c
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#define GF_LD2_DATA_LOW 0x00000020
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#define GF_LD2_DATA_HIGH 0x00000030
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#define GF_LD3_DATA_LOW 0x00000080
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#define GF_LD3_DATA_HIGH 0x000000c0
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#define GF_LD4_DATA_LOW 0x00000200
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#define GF_LD4_DATA_HIGH 0x00000300
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#define GF_LD5_DATA_LOW 0x00000800
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#define GF_LD5_DATA_HIGH 0x00000c00
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#define GF_LD6_DATA_LOW 0x00002000
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#define GF_LD6_DATA_HIGH 0x00003000
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#define GF_LD7_DATA_LOW 0x00008000
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#define GF_LD7_DATA_HIGH 0x0000c000
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#define GF_LD8_DATA_LOW 0x00020000
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#define GF_LD8_DATA_HIGH 0x00030000
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#define GF_LD9_DATA_LOW 0x00080000
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#define GF_LD9_DATA_HIGH 0x000c0000
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#define GF_LD10_DATA_LOW 0x00200000
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#define GF_LD10_DATA_HIGH 0x00300000
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#define GF_LD11_DATA_LOW 0x00800000
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#define GF_LD11_DATA_HIGH 0x00c00000
|
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#define GF_LD12_DATA_LOW 0x02000000
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#define GF_LD12_DATA_HIGH 0x03000000
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#define GF_LD13_DATA_LOW 0x08000000
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#define GF_LD13_DATA_HIGH 0x0c000000
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#define GF_LD14_DATA_LOW 0x20000000
|
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#define GF_LD14_DATA_HIGH 0x30000000
|
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#define GF_LD15_DATA_LOW 0x80000000
|
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#define GF_LD15_DATA_HIGH 0xc0000000
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#define GF_LD0_LD15_DATA_LOW 0xaaaaaaaa
|
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#define GF_LD0_LD15_DATA_HIGH 0xffffffff
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|
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#define OFFSET_PIN_OUTPUT_DATA1 0x0000080b
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#define GFSCMD_LD16_PIN_OUTPUT_DATA 0x0000880b
|
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#define GFSCMD_LD17_PIN_OUTPUT_DATA 0x0002880b
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#define GFSCMD_LPW0_PIN_OUTPUT_DATA 0x0010880b
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#define GFSCMD_LPW1_PIN_OUTPUT_DATA 0x0012880b
|
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#define GFSCMD_LPW2_PIN_OUTPUT_DATA 0x0014880b
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#define GFSCMD_LSC0_PIN_OUTPUT_DATA 0x0018880b
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#define GFSCMD_LSC1_PIN_OUTPUT_DATA 0x001a880b
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#define GFSCMD_LVS_PIN_OUTPUT_DATA 0x001c880b
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#define GFSCMD_LHS_PIN_OUTPUT_DATA 0x001e880b
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#define GFSCMD_LD16_LD17_PIN_OUTPUT_DATA 0x0020880b
|
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|
|
#define GF_LD16_DATA_LOW 0x00000002
|
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#define GF_LD16_DATA_HIGH 0x00000003
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#define GF_LD17_DATA_LOW 0x00000008
|
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#define GF_LD17_DATA_HIGH 0x0000000c
|
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#define GF_LPW0_DATA_LOW 0x00020000
|
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#define GF_LPW0_DATA_HIGH 0x00030000
|
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#define GF_LPW1_DATA_LOW 0x00080000
|
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#define GF_LPW1_DATA_HIGH 0x000c0000
|
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#define GF_LPW2_DATA_LOW 0x00200000
|
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#define GF_LPW2_DATA_HIGH 0x00300000
|
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#define GF_LSC0_DATA_LOW 0x02000000
|
|
#define GF_LSC0_DATA_HIGH 0x03000000
|
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#define GF_LSC1_DATA_LOW 0x08000000
|
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#define GF_LSC1_DATA_HIGH 0x0c000000
|
|
#define GF_LVS_DATA_LOW 0x20000000
|
|
#define GF_LVS_DATA_HIGH 0x30000000
|
|
#define GF_LHS_DATA_LOW 0x80000000
|
|
#define GF_LHS_DATA_HIGH 0xc0000000
|
|
#define GF_LD16_LD17_DATA_LOW 0x0000000a
|
|
#define GF_LD16_LD17_DATA_HIGH 0x0000000f
|
|
|
|
|
|
#define OFFSET_PIN_OUTPUT_DATA2 0x0000080c
|
|
#define GFSCMD_LHP0_PIN_OUTPUT_DATA 0x0000880c
|
|
#define GFSCMD_LHP1_PIN_OUTPUT_DATA 0x0002880c
|
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#define GFSCMD_LHP2_PIN_OUTPUT_DATA 0x0004880c
|
|
#define GFSCMD_LVP0_PIN_OUTPUT_DATA 0x0008880c
|
|
#define GFSCMD_LVP1_PIN_OUTPUT_DATA 0x000A880c
|
|
#define GFSCMD_LM0_PIN_OUTPUT_DATA 0x0010880c
|
|
#define GFSCMD_LM1_PIN_OUTPUT_DATA 0x0012880c
|
|
#define GFSCMD_LDI_PIN_OUTPUT_DATA 0x0014880c
|
|
#define GFSCMD_LPP_PIN_OUTPUT_DATA 0x0016880c
|
|
|
|
#define GF_LHP0_DATA_LOW 0x00000002
|
|
#define GF_LHP0_DATA_HIGH 0x00000003
|
|
#define GF_LHP1_DATA_LOW 0x00000008
|
|
#define GF_LHP1_DATA_HIGH 0x0000000c
|
|
#define GF_LHP2_DATA_LOW 0x00000020
|
|
#define GF_LHP2_DATA_HIGH 0x00000030
|
|
#define GF_LVP0_DATA_LOW 0x00000200
|
|
#define GF_LVP0_DATA_HIGH 0x00000300
|
|
#define GF_LVP1_DATA_LOW 0x00000800
|
|
#define GF_LVP1_DATA_HIGH 0x00000c00
|
|
#define GF_LM0_DATA_LOW 0x00020000
|
|
#define GF_LM0_DATA_HIGH 0x00030000
|
|
#define GF_LM1_DATA_LOW 0x00080000
|
|
#define GF_LM1_DATA_HIGH 0x000c0000
|
|
#define GF_LDI_DATA_LOW 0x00200000
|
|
#define GF_LDI_DATA_HIGH 0x00300000
|
|
#define GF_LPP_DATA_LOW 0x00800000
|
|
#define GF_LPP_DATA_HIGH 0x00c00000
|
|
|
|
#define OFFSET_OUTPUT_DATA3 0x0000080d
|
|
#define GFSCMD_LSCK_PIN_OUTPUT_DATA 0x0000880d
|
|
#define GFSCMD_LSDA_PIN_OUTPUT_DATA 0x0002880d
|
|
#define GFSCMD_LCSN_PIN_OUTPUT_DATA 0x0004880d
|
|
#define GFSCMD_LDC_PIN_OUTPUT_DATA 0x0006880d
|
|
#define GFSCMD_LSPI_PIN_OUTPUT_DATA 0x0008880d
|
|
|
|
#define GF_LSCK_DATA_LOW 0x00000002
|
|
#define GF_LSCK_DATA_HIGH 0x00000003
|
|
#define GF_LSDA_DATA_LOW 0x00000008
|
|
#define GF_LSDA_DATA_HIGH 0x0000000c
|
|
#define GF_LCSN_DATA_LOW 0x00000020
|
|
#define GF_LCSN_DATA_HIGH 0x00000030
|
|
#define GF_LDC_DATA_LOW 0x00000080
|
|
#define GF_LDC_DATA_HIGH 0x000000c0
|
|
#define GF_LSPI_DATA_LOW 0x00000200
|
|
#define GF_LSPI_DATA_HIGH 0x00000300
|
|
|
|
// Pin Input Enable
|
|
|
|
#define GFSCMD_LSPI_PIN_INPUT 0x00088811
|
|
#define GF_LSPI_INPUT_ENABLE 0x00000000
|
|
#define GF_LSPI_INPUT_DISABLE 0x00000100
|
|
|
|
#define GFSCMD_LDC_PIN_INPUT 0x00088411
|
|
#define GF_LDC_INPUT_ENABLE 0x00000000
|
|
#define GF_LDC_INPUT_DISABLE 0x00000040
|
|
|
|
#define GFSCMD_LPP_PIN_INPUT 0x00168811
|
|
#define GF_LPP_INPUT_ENABLE 0x00000000
|
|
#define GF_LPP_INPUT_DISABLE 0x00400000
|
|
|
|
// Pin Output Select
|
|
|
|
#define DC_PIN_OUTPUT_SELECT0 0x00000814
|
|
#define GFSCMD_LD0_OUTPUT_SELECT 0x00008814
|
|
#define GFSCMD_LD1_OUTPUT_SELECT 0x00048814
|
|
#define GFSCMD_LD2_OUTPUT_SELECT 0x00088814
|
|
#define GFSCMD_LD3_OUTPUT_SELECT 0x000C8814
|
|
#define GFSCMD_LD4_OUTPUT_SELECT 0x00108814
|
|
#define GFSCMD_LD5_OUTPUT_SELECT 0x00148814
|
|
#define GFSCMD_LD6_OUTPUT_SELECT 0x00188814
|
|
#define GFSCMD_LD7_OUTPUT_SELECT 0x001C8814
|
|
#define GFSCMD_LD0_LD7_OUTPUT_SELECT 0x00208814
|
|
|
|
#define GF_LD0_PIN_FOR_LD0 0
|
|
#define GF_LD0_PIN_FOR_LD0_OUT 1
|
|
#define GF_LD0_PIN_FOR_SC_ 4
|
|
#define GF_LD1_PIN_FOR_LD1 0
|
|
#define GF_LD1_PIN_FOR_LD1_OUT 1
|
|
#define GF_LD1_PIN_FOR_SC 4
|
|
#define GF_LD2_PIN_FOR_LD2 0
|
|
#define GF_LD2_PIN_FOR_LD2_OUT 1
|
|
#define GF_LD2_PIN_FOR_SD0_ 4
|
|
#define GF_LD3_PIN_FOR_LD3 0
|
|
#define GF_LD3_PIN_FOR_LD3_OUT 1
|
|
#define GF_LD3_PIN_FOR_SD0 4
|
|
#define GF_LD4_PIN_FOR_LD4 0
|
|
#define GF_LD4_PIN_FOR_LD4_OUT 1
|
|
#define GF_LD4_PIN_FOR_SD1_ 4
|
|
#define GF_LD5_PIN_FOR_LD5 0
|
|
#define GF_LD5_PIN_FOR_LD5_OUT 1
|
|
#define GF_LD5_PIN_FOR_SD1 4
|
|
#define GF_LD6_PIN_FOR_LD6 0
|
|
#define GF_LD6_PIN_FOR_LD6_OUT 1
|
|
#define GF_LD6_PIN_FOR_STH 4
|
|
#define GF_LD7_PIN_FOR_LD7 0
|
|
#define GF_LD7_PIN_FOR_LD7_OUT 1
|
|
#define GF_LD7_PIN_FOR_SDT 4
|
|
#define GF_LD0_LD7_PIN_FOR_LD0_LD7 0x00000000
|
|
#define GF_LD0_LD7_PIN_FOR_LD0_LD7_OUT 0x11111111
|
|
#define GF_LD0_LD7_PIN_FOR_LPD0_LPD7_OUT 0x22222222
|
|
|
|
#define DC_PIN_OUTPUT_SELECT1 0x00000815
|
|
#define GFSCMD_LD8_OUTPUT_SELECT 0x00008815
|
|
#define GFSCMD_LD9_OUTPUT_SELECT 0x00048815
|
|
#define GFSCMD_LD10_OUTPUT_SELECT 0x00088815
|
|
#define GFSCMD_LD11_OUTPUT_SELECT 0x000C8815
|
|
#define GFSCMD_LD12_OUTPUT_SELECT 0x00108815
|
|
#define GFSCMD_LD13_OUTPUT_SELECT 0x00148815
|
|
#define GFSCMD_LD14_OUTPUT_SELECT 0x00188815
|
|
#define GFSCMD_LD15_OUTPUT_SELECT 0x001C8815
|
|
#define GFSCMD_LD8_LD15_OUTPUT_SELECT 0x00208815
|
|
|
|
#define GF_LD8_PIN_FOR_LD8 0
|
|
#define GF_LD8_PIN_FOR_LD8_OUT 1
|
|
#define GF_LD8_PIN_FOR_LPD8_OUT 2
|
|
#define GF_LD8_PIN_FOR_STP 4
|
|
#define GF_LD9_PIN_FOR_LD9 0
|
|
#define GF_LD9_PIN_FOR_LD9_OUT 1
|
|
#define GF_LD9_PIN_FOR_LPD9_OUT 2
|
|
#define GF_LD9_PIN_FOR_SD2_ 4
|
|
#define GF_LD10_PIN_FOR_LD10 0
|
|
#define GF_LD10_PIN_FOR_LD10_OUT 1
|
|
#define GF_LD10_PIN_FOR_SD2 4
|
|
#define GF_LD11_PIN_FOR_LD11 0
|
|
#define GF_LD11_PIN_FOR_LD11_OUT 1
|
|
#define GF_LD12_PIN_FOR_LD12 0
|
|
#define GF_LD12_PIN_FOR_LD12_OUT 1
|
|
#define GF_LD13_PIN_FOR_LD13 0
|
|
#define GF_LD13_PIN_FOR_LD13_OUT 1
|
|
#define GF_LD14_PIN_FOR_LD14 0
|
|
#define GF_LD14_PIN_FOR_LD14_OUT 1
|
|
#define GF_LD15_PIN_FOR_LD15 0
|
|
#define GF_LD15_PIN_FOR_LD15_OUT 1
|
|
#define GF_LD8_LD15_PIN_FOR_LD8_LD15 0x00000000
|
|
#define GF_LD8_LD15_PIN_FOR_LD8_LD15_OUT 0x11111111
|
|
#define GF_LD8_LD15_PIN_FOR_LPD8_LPD15_OUT 0x22222222
|
|
|
|
#define DC_PIN_OUTPUT_SELECT2 0x00000816
|
|
#define GFSCMD_LD16_OUTPUT_SELECT 0x00008816
|
|
#define GFSCMD_LD17_OUTPUT_SELECT 0x00048816
|
|
|
|
#define GF_LD16_PIN_FOR_LD16 0
|
|
#define GF_LD16_PIN_FOR_LD16_OUT 1
|
|
#define GF_LD17_PIN_FOR_LD17 0
|
|
#define GF_LD17_PIN_FOR_LD17_OUT 1
|
|
|
|
#define OFFSET_PIN_OUTPUT_SELECT3 0x00000817
|
|
#define GFSCMD_LPW0_OUTPUT_SELECT 0x00008817
|
|
#define GFSCMD_LPW1_OUTPUT_SELECT 0x00048817
|
|
#define GFSCMD_LPW2_OUTPUT_SELECT 0x00088817
|
|
#define GFSCMD_LSC0_OUTPUT_SELECT 0x00108817
|
|
#define GFSCMD_LSC1_OUTPUT_SELECT 0x00148817
|
|
#define GFSCMD_LVS_OUTPUT_SELECT 0x00188817
|
|
#define GFSCMD_LHS_OUTPUT_SELECT 0x001c8817
|
|
|
|
#define GF_LPW0_PIN_FOR_PW0 0
|
|
#define GF_LPW0_PIN_FOR_PW0_OUT 1
|
|
#define GF_LPW0_PIN_FOR_PW1 2
|
|
#define GF_LPW0_PIN_FOR_PM0 3
|
|
#define GF_LPW0_PIN_FOR_PW2 4
|
|
#define GF_LPW1_PIN_FOR_PW1 0
|
|
#define GF_LPW1_PIN_FOR_PW1_OUT 1
|
|
#define GF_LPW1_PIN_FOR_PW2 2
|
|
#define GF_LPW1_PIN_FOR_PM1 3
|
|
#define GF_LPW1_PIN_FOR_PW3 4
|
|
#define GF_LPW2_PIN_FOR_PW2 0
|
|
#define GF_LPW2_PIN_FOR_PW2_OUT 1
|
|
#define GF_LPW2_PIN_FOR_PW3 2
|
|
#define GF_LPW2_PIN_FOR_PM0 3
|
|
#define GF_LPW2_PIN_FOR_PW4 4
|
|
#define GF_LSC0_PIN_FOR_LSC0 0
|
|
#define GF_LSC0_PIN_FOR_LSC0_OUT 1
|
|
#define GF_LSC1_PIN_FOR_LSC1 0
|
|
#define GF_LSC1_PIN_FOR_LSC1_OUT 1
|
|
#define GF_LSC1_PIN_FOR_LSC1_DE 2
|
|
#define GF_LVS_PIN_FOR_VSYNC 0
|
|
#define GF_LVS_PIN_FOR_LVS_OUT 1
|
|
#define GF_LVS_PIN_FOR_PM1 3
|
|
#define GF_LHS_PIN_FOR_HSYNC 0
|
|
#define GF_LHS_PIN_FOR_LHS_OUT 1
|
|
#define GF_LHS_PIN_FOR_PM0 3
|
|
|
|
#define OFSSET_PIN_OUTPUT_SELECT4 0x00000818
|
|
#define GFSCMD_LHP0_OUTPUT_SELECT 0x00008818
|
|
#define GFSCMD_LHP1_OUTPUT_SELECT 0x00048818
|
|
#define GFSCMD_LHP2_OUTPUT_SELECT 0x00088818
|
|
#define GFSCMD_LVP0_OUTPUT_SELECT 0x00108818
|
|
#define GFSCMD_LVP1_OUTPUT_SELECT 0x00148818
|
|
|
|
#define GF_LHP0_PIN_FOR_LHP0 0
|
|
#define GF_LHP0_PIN_FOR_LHP0_OUT 1
|
|
#define GF_LHP0_PIN_FOR_LD21 2
|
|
#define GF_LHP0_PIN_FOR_PM0 3
|
|
#define GF_LHP1_PIN_FOR_LHP1 0
|
|
#define GF_LHP1_PIN_FOR_LHP1_OUT 1
|
|
#define GF_LHP1_PIN_FOR_LD18 2
|
|
#define GF_LHP1_PIN_FOR_PM1 3
|
|
#define GF_LHP2_PIN_FOR_LHP2 0
|
|
#define GF_LHP2_PIN_FOR_LHP2_OUT 1
|
|
#define GF_LHP2_PIN_FOR_LD19 2
|
|
#define GF_LHP2_PIN_FOR_PM0 3
|
|
#define GF_LHP2_PIN_FOR_LVP2 4
|
|
#define GF_LVP0_PIN_FOR_LVP0 0
|
|
#define GF_LVP0_PIN_FOR_LVP0_OUT 1
|
|
#define GF_LVP0_PIN_FOR_PM0 3
|
|
#define GF_LVP1_PIN_FOR_LVP1 0
|
|
#define GF_LVP1_PIN_FOR_LVP1_OUT 1
|
|
#define GF_LVP1_PIN_FOR_LD20 2
|
|
#define GF_LVP1_PIN_FOR_PM1 3
|
|
#define GF_LVP1_PIN_FOR_PW4 4
|
|
|
|
#define OFFSET_PIN_OUTPUT_SELECT5 0x00000819
|
|
#define GFSCMD_LM0_OUTPUT_SELECT 0x00008819
|
|
#define GFSCMD_LM1_OUTPUT_SELECT 0x00048819
|
|
#define GFSCMD_LDI_OUTPUT_SELECT 0x00088819
|
|
#define GFSCMD_LPP_OUTPUT_SELECT 0x000c8819
|
|
|
|
#define GF_LM0_PIN_FOR_LM0 0
|
|
#define GF_LM0_PIN_FOR_LM0_OUT 1
|
|
#define GF_LM0_PIN_FOR_SCS 2
|
|
#define GF_LM0_PIN_FOR_PM0 3
|
|
#define GF_LM0_PIN_FOR_LVP2 4
|
|
#define GF_LM1_PIN_FOR_M1 0
|
|
#define GF_LM1_PIN_FOR_LM1_OUT 1
|
|
#define GF_LM1_PIN_FOR_LD21 2
|
|
#define GF_LM1_PIN_FOR_PM1 3
|
|
#define GF_LM1_PIN_FOR_LVP3 4
|
|
#define GF_LDI_PIN_FOR_DI 0
|
|
#define GF_LDI_PIN_FOR_LDI_OUT 1
|
|
#define GF_LDI_PIN_FOR_LD22 2
|
|
#define GF_LDI_PIN_FOR_PM0 3
|
|
#define GF_LDI_PIN_FOR_SCS 4
|
|
#define GF_LPP_PIN_FOR_PP 0
|
|
#define GF_LPP_PIN_FOR_LPP_OUT 1
|
|
#define GF_LPP_PIN_FOR_LD23 2
|
|
#define GF_LPP_PIN_FOR_PM1 3
|
|
#define GF_LPP_PIN_FOR_LVP3 4
|
|
|
|
#define OFFSET_PIN_OUTPUT_SELECT6 0x0000081a
|
|
#define GFSCMD_LSCK_OUTPUT_SELECT 0x0000881a
|
|
#define GFSCMD_LSDA_OUTPUT_SELECT 0x0004881a
|
|
#define GFSCMD_LCSN_OUTPUT_SELECT 0x0008881a
|
|
#define GFSCMD_LDC_OUTPUT_SELECT 0x000c881a
|
|
#define GFSCMD_LSPI_OUTPUT_SELECT 0x0010881a
|
|
|
|
#define GF_LSCK_PIN_FOR_SCK 0
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#define GF_LSCK_PIN_FOR_LSCK_OUT 1
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#define GF_LSCK_PIN_FOR_PM0 3
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#define GF_LSDA_PIN_FOR_SDA 0
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#define GF_LSDA_PIN_FOR_LSDA_OUT 1
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#define GF_LSDA_PIN_FOR_SCS 2
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#define GF_LSDA_PIN_FOR_PM1 3
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#define GF_LCS_PIN_FOR_MCS 0
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#define GF_LCS_PIN_FOR_LCS_OUT 1
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#define GF_LCS_PIN_FOR_PM0 3
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#define GF_LDC_PIN_FOR_SDC 0
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#define GF_LDC_PIN_FOR_LDC_OUT 1
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#define GF_LDC_PIN_FOR_LD22 2
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#define GF_LDC_PIN_FOR_PM1 3
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#define GF_LSPI_PIN_FOR_SPI 0
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#define GF_LSPI_PIN_FOR_LSPI_OUT 1
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#define GF_LSPI_PIN_FOR_DE 2
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#define GF_LSPI_PIN_FOR_PM0 3
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#define GF_LSPI_PIN_FOR_PCLK 4
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//#define OFFSET_PIN_MISC_CONTROL 0x0000081b
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//#define DISP_CLOCK_OUTPUT_MASK
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//#define DISP_CLOCK_OUTPUT_SHIFT
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//#define DISP_CLOCK_OUTPUT_DISABLE
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//#define DISP_CLOCK_OUTPUT_ENABLE
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#define OFFSET_PM0_CONTROL 0x0000081c
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#define GFSCMD_PM0_CLOCK_SELECT 0x0000881c
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#define GFSCMD_PM0_CLOCK_DIVIDER 0x0004881c
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#define GFSCMD_PM0_PERIOD 0x0012881c
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#define GF_PM0_SHIFT_CLOCK 0x00000000
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#define GF_PM0_PIXEL_CLOCK 0x00000001
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#define GF_PM0_LINE_CLOCK 0x00000002
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#define GF_PM0_FRAME_CLOCK 0x00000003
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#define GF_PM0_CLOCK_DIVIDER_VAL 0x00000010
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#define GF_PM0_PERIOD_VAL 0x00040000
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#define OFFSET_PM0_DUTY_CYCLE 0x0000081d
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#define GFSCMD_PM0_DUTY_CYCLE 0x0000881d
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#define GF_PM0_DUTY_CYCLE_VAL 0x00000000
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#define OFFSET_PM1_CONTROL 0x0000081e
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#define GFSCMD_PM1_CLOCK_SELECT 0x0000881e
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#define GFSCMD_PM1_CLOCK_DIVIDER 0x0004881e
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#define GFSCMD_PM1_PERIOD 0x0012881e
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#define GF_PM1_SHIFT_CLOCK 0x00000000
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#define GF_PM1_PIXEL_CLOCK 0x00000001
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#define GF_PM1_LINE_CLOCK 0x00000002
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#define GF_PM1_FRAME_CLOCK 0x00000003
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#define GF_PM1_CLOCK_DIVIDER_VAL 0x00000010
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#define GF_PM1_PERIOD_VAL 0x00040000
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#define OFFSET_PM1_DUTY_CYCLE 0x0000081f
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#define GFSCMD_PM1_DUTY_CYCLE 0x0000881f
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#define GF_PM1_DUTY_CYCLE_VAL 0x00000000
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////////////////////////
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#define OFFSET_SPI_CONTROL 0x00000820
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#define GFSCMD_SPI_SERIAL_CLK_CONTROL 0x00008820
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#define GFSCMD_SPI_DATA_DIRECTION 0x00038820
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#define GFSCMD_SPI_BITS_PER_CYCLE 0x00048820
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#define GFSCMD_SPI_CLK_DIVIDER_1_32 0x00108820
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#define GFSCMD_SPI_STATUS 0x00188820
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#define GF_SPI_1SCLK_CS_RISING_EDGE_ACTV 0x00000000
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#define GF_SPI_2SCLK_CS_RISING_EDGE_ACTV 0x00000001
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#define GF_SPI_1SCLK_CS_FALLING_EDGE_ACTV 0x00000002
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#define GF_SPI_2SCLK_CS_FALLING_EDGE_ACTV 0x00000003
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#define GF_SPI_MSB2LSB 0x00000000
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#define GF_SPI_LSB2MSB 0x00000008
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#define GF_SPI8 0x00000000
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#define GF_SPI8DC 0x00000010
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#define GF_SPI12 0x00000020
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#define GF_SPI16 0x00000030
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#define GF_SPI16DC 0x00000040
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#define GF_START_BYTE_PLUS_SPI16 0x00000050
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#define GF_SPI18 0x00000060
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#define GF_SPI24 0x00000070
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//#define GF_SPI_CLK_DIVIDER_1_32_VAL
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#define GF_SPI_STATUS_DISABLE 0x00000000
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#define GF_STATUS_ENABLE_HOST_SPI 0x01000000
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#define GF_STATUS_ENABLE_HOST_IS_SPI 0x02000000
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#define GF_STATUS_ENABLE_ALL_SPI_CYCL 0x03000000
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//#define OFFSET_HSPI_START_BYTE 0x00000821
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#define GFSCMD_HSPI_DATA_START_BYTE 0x00008821
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#define GFSCMD_HSPI_START_BYTE 0x00008821
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//#define GFSCMD_HSPI_COMMAND_START_BYTE 0x00088821
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//#define OFFSET_HSPI_WRITE_DATA_CD 0x00000822
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#define GFSCMD_HSPI_WRITE_DATA_A 0x00008822
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#define GFSCMD_HSPI_WRITE_DATA_B 0x00088822
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#define GFSCMD_HSPI_WRITE_DATA_AB 0x00208822
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//#define OFFSET_HSPI_WRITE_DATA_CD 0x00000823
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#define GFSCMD_HSPI_WRITE_DATA_C 0x00008823
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#define GFSCMD_HSPI_WRITE_DATA_D 0x00088823
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#define GFSCMD_HSPI_WRITE_DATA_CD 0x00208823
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#define GF_HSPI_CMD_CYCLE1 0
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#define GF_HSPI_CMD_CYCLE2 0
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#define GF_HSPI_CMD_CYCLE3 0
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#define GF_HSPI_CMD_CYCLE4 0
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#define GF_HSPI_DATA_CYCLE1 1
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#define GF_HSPI_DATA_CYCLE2 2
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#define GF_HSPI_DATA_CYCLE3 4
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#define GF_HSPI_DATA_CYCLE4 8
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#define GF_HSPI_MAIN_CS_CYCLE1 1
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#define GF_HSPI_MAIN_CS_CYCLE2 2
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#define GF_HSPI_MAIN_CS_CYCLE3 4
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#define GF_HSPI_MAIN_CS_CYCLE4 8
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#define GF_HSPI_SUB_CS_CYCLE1 1
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#define GF_HSPI_SUB_CS_CYCLE2 2
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#define GF_HSPI_SUB_CS_CYCLE3 4
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#define GF_HSPI_SUB_CS_CYCLE4 8
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//////////////////////////
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#if 0
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// LCD SPI interface signals
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#define DC_P_LCD_SPI_OPTIONS 0x00000135
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#define GF_LCD_SPI_CS 0x00008135
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#define GF_LCD_SPI_DC 0x00018135
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#define GF_SPI_CS_CONTROL 0x00028135
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#define GF_LCD_SPI_DIRECTION 0x00048135
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#define GF_LCD_SPI_CS_MAIN 0x00000000
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#define GF_LCD_SPI_CS_SUB 0x00000001
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#define GF_LCD_SPI_DC_LOW 0x00000000
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#define GF_LCD_SPI_DC_HIGH 0x00000002
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#define GF_SPI_CS_CONTROL_LCD_IS_SPI 0x00000000
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#define GF_SPI_CS_CONTROL_LCD_SPI 0x00000004
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#define GF_SPI_CS_CONTROL_IS_SPI 0x00000008
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#define GF_SPI_CS_CONTROL_FORCED 0x0000000C
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#define GF_LCD_SPI_DIRECTION_MSB2LSB 0x00000000
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#define GF_LCD_SPI_DIRECTION_LSB2MSB 0x00000010
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#endif
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// Class: Initialization Sequence (IS)
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#define OFSSET_P_INIT_SEQ_CONTROL 0x00000141
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#define GFSCMD_SEND_INIT_SEQUENCE 0x00008141
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#define GFSCMD_INIT_SEQUENCE_MODE_PLCD 0x00018141
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#define GFSCMD_INIT_SEQ_DC_SIGNAL_NODC 0x00048141
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#define GFSCMD_INIT_SEQ_DC_CONTROL 0x00078141
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#define GFSCMD_FRAME_INIT_SEQ_CYCLES 0x00088141
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#define GF_SEND_INIT_SEQUENCE_DISABLE 0x00000000
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#define GF_SEND_INIT_SEQUENCE_ENABLE 0x00000001
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#define GF_INIT_SEQUENCE_MODE_PLCD_INIT 0x00000000
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#define GF_INIT_SEQUENCE_MODE_SPI_INIT 0x00000002
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#define GF_INIT_SEQ_SIGNAL_NODC 0x00000000
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#define GF_INIT_SEQ_SIGNAL_VSYNC 0x00000010
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#define GF_INIT_SEQ_SIGNAL_VPULSE0 0x00000020
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#define GF_INIT_SEQ_SIGNAL_VPULSE1 0x00000030
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#define GF_INIT_SEQ_SIGNAL_VPULSE2 0x00000040
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#define GF_INIT_SEQ_SIGNAL_VPULSE3 0x00000050
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#define GF_INIT_SEQ_CONTROL 0x00000080
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//#define GF_FRAME_INIT_SEQ_CYCLES 0x00000100
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// SPI Init Sequence Write Data bits 31-0
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#define DC_P_SPI_INIT_SEQ_DATA_A 0x00000142
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#define GFSCMD_SPI_INIT_SEQ_DATA_A 0x00008142
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// SPI Init Sequence Write Data bits 63-32
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#define DC_P_SPI_INIT_SEQ_DATA_B 0x00000143
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#define GFSCMD_SPI_INIT_SEQ_DATA_B 0x00008143
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// SPI Init Sequence Write Data bits 95-64
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#define DC_P_SPI_INIT_SEQ_DATA_C 0x00000144
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#define GFSCMD_SPI_INIT_SEQ_DATA_C 0x00008144
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// SPI Init Sequence Write Data bits 127-96
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#define DC_P_SPI_INIT_SEQ_DATA_D 0x00000145
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#define GFSCMD_SPI_INIT_SEQ_DATA_D 0x00008145
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#define OFFSET_DISPLAY_COMMAND 0x00000003
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#define GFSCMD_DISPLAY_CTRL_MODE 0x00058003
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#define GF_CTRL_MODE_STOP 0x00000000
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#define GF_CTRL_MODE_C_DISPLAY 0x00000020
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#define GF_CTRL_MODE_NC_DISPLAY 0x00000040
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#define GF_CTRL_MODE_NOCHANGE 0x000000C0
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/* Other Commands */
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#define GF_NO_DATA 0x00000000
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#define GFSCMD_LVDD_ON 0x01020000
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#define GFSCMD_LVDD_OFF 0x01020001
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#define GFSCMD_RESET_LHP2 0x0104880c
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#define GFSCMD_RESET_LVP0 0x0108880c
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#define GFSCMD_MS_DELAY 0x01005A5A
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#define GFSCMD_WAIT_VBLANK 0x01005555
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#define GFSCMD_END_OF_TABLE 0x0100ffff
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#define GFSCMD_I2C_A_PAL_PLL2_CLK 0x0100F000
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#define GFSDEFAULT_CMD 0x10000000 // Default settings
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#define GFSDEFAULT_BACKLIGHT0 0x10000001
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#define GF_ON_LPW2 0x00000000
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#define GF_ON_LPW0 0x00000001
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#define GFSDEFAULT_BACKLIGHT1 0x10000002
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#define GF_ON_LM1 0x00000000
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#define GF_ON_LPW1 0x00000001
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#define GFPDRV_CMD 0x20000000
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#define GFHOST_CMD 0x40000000
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#define GFSCMD_PANEL_PKT_HEADER_START 0x40000000
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#define GF_DLY_AFTR_DATA_SENT_MASK 0x00002000
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#define GF_A_2MS_DLY_AFTR_DATA_SENT 0x00000000
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#define GF_A_NO_DLY_AFTR_DATA_SENT 0x00002000
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#define GF_RAISE_WAIT_AFTR_DATA_SENT_MASK 0x00001000
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#define GF_A_RAISE_WAIT_AFTR_DATA_SENT 0x00001000
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#define GF_DATA_BURST_MASK 0x000000ff
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#define GF_A_DATA_BURST0 0x00000000
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#define GF_A_DATA_BURST1 0x00000001
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#define GF_A_DATA_BURST2 0x00000002
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#define GF_A_DATA_BURST3 0x00000003
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#define GF_A_DATA_BURST4 0x00000004
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#define GF_A_DATA_BURST5 0x00000005
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#define GF_A_DATA_BURST6 0x00000006
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#define GF_A_DATA_BURST7 0x00000007
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#define GF_A_DATA_BURST8 0x00000008
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#define GF_CS_MASK 0x000f0000
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#define GF_A_MCS_ACTVH 0x00010000
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#define GF_A_MCS_ACTVL 0x00020000
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#define GF_A_SCS_ACTVH 0x00030000
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#define GF_A_SCS_ACTVL 0x00040000
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#define GF_RS_DC_MASK 0x00f00000
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#define GF_A_RS_DC_IXH_DATAL 0x00100000
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#define GF_A_RS_DC_IXL_DATAL 0x00200000
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#define GF_A_RS_DC_IXL_DATAH 0x00300000
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#define GF_A_RS_DC_IXH_DATAH 0x00400000
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#define GF_IFACE_MASK 0x00008f00
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#define GF_A_IFACE_PRLL 0x00008000
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#define GF_A_IFACE_PRLL_8 0x00008100
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#define GF_A_IFACE_PRLL_9 0x00008200
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#define GF_A_IFACE_PRLL_16 0x00008300
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#define GF_A_IFACE_PRLL_18 0x00008400
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#define GF_A_IFACE_SPI_8 0x00000100
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#define GF_A_IFACE_SPI_8DC 0x00000200
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#define GF_A_IFACE_SPI_12 0x00000300
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#define GF_A_IFACE_SPI_16 0x00000400
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#define GF_A_IFACE_SPI_16DC 0x00000500
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#define GF_A_IFACE_SPI_16_START8 0x00000600
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#define GF_A_IFACE_SPI_18 0x00000700
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#define GF_A_IFACE_SPI_24 0x00000800
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#define GF_A_IF_LSB_ALINED 0x00004000
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#define GF_A_IF_MSB_ALINED 0x00000000
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#define GF_IF_ALINED_MASK 0x00004000
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#define GF_CLK_PER_PIXEL_MASK 0x3f000000
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#define GF_A_1CLK_PIXEL 0x01000000
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#define GF_A_2CLK_PIXEL 0x02000000
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#define GF_A_3CLK_PIXEL 0x03000000
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#define GF_A_4CLK_PIXEL 0x04000000
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#define GF_A_24CLK_PIXEL 0x18000000
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// Parellel
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#define GF_A_DATA_VLD_MASK 0xC0000000
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#define GF_A_DATA_VLD_CLK_RISE 0x40000000
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#define GF_A_DATA_VLD_CLK_FALL 0x80000000
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// Serial
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#define GF_SPI_SCLK_CS_EDGE_ACTV_MASK 0xC0000000
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#define GF_A_SPI_1SCLK_CS_RISING_EDGE_ACTV 0x40000000
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#define GF_A_SPI_2SCLK_CS_RISING_EDGE_ACTV 0x00000000
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#define GF_A_SPI_1SCLK_CS_FALLING_EDGE_ACTV 0xC0000000
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#define GF_A_SPI_2SCLK_CS_FALLING_EDGE_ACTV 0x80000000
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#define GF_A_SPI_CS_ACTVH 0x00010000
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#define GF_A_SPI_CS_ACTVL 0x00020000
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#define GF_SPI_RS_DC_MASK 0x00f00000
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#define GF_A_SPI_RS_DC_IXH_DATAL 0x00100000
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#define GF_A_SPI_RS_DC_IXL_DATAL 0x00200000
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#define GF_A_SPI_RS_DC_IXL_DATAH 0x00300000
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#define GF_A_SPI_RS_DC_IXH_DATAH 0x00400000
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#define GF_B_ 0x00000000
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#define GF_C_ 0x00000000
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#define GF_SPI_DATA_START_BYTE 0x00000000
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#define GF_SPI_CMD_START_BYTE 0x00000000
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#define GF_PANEL_DRV_CMD_DATA ~0x0000ffff
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#define GFSCMD_PANEL_PKT_HEADER_END 0x40008000
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#define GFPERIODIC_CMD 0x4000C000
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#define GFSCMD_PERIODIC_PKT_HEADER_START 0x4000C000
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#define GFSCMD_PERIODIC_PKT_HEADER_SIZE 0x0000000A
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#define GF_IS_PERDC_MSB9_LSB9_SWAP_MASK 0x00800000
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#define GF_IS_PERDC_MSB9_LSB9_SWAP 0x00800000
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#define GF_IS_PERDC_PARLL_CYCLE_MASK 0x0000000f
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#define GF_IS_PERDC_PARLL_CYCLE0 0x00000000
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#define GF_IS_PERDC_PARLL_CYCLE1 0x00000001
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#define GF_IS_PERDC_PARLL_CYCLE2 0x00000002
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#define GF_IS_PERDC_PARLL_CYCLE3 0x00000003
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#define GF_IS_PERDC_PARLL_CYCLE4 0x00000004
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#define GF_IS_PERDC_PARLL_CYCLE5 0x00000005
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#define GF_IS_PERDC_PARLL_CYCLE6 0x00000006
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#define GF_IS_PERDC_PARLL_CYCLE7 0x00000007
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#define GF_IS_PERDC_PARLL_CYCLE8 0x00000008
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#define GF_IS_PERDC_PARLL_CYCLE9 0x00000009
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#define GF_IS_PERDC_PARLL_CYCLE10 0x0000000A
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#define GF_IS_PERDC_PARLL_CYCLE11 0x0000000B
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#define GF_IS_PERDC_PARLL_CYCLE12 0x0000000C
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#define GF_IS_PERDC_PARLL_IF_MASK 0xf0000000
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#define GF_IS_PERDC_PARLL_IF_8 0x00000000
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#define GF_IS_PERDC_PARLL_IF_9 0x10000000
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#define GF_IS_PERDC_PARLL_IF_18 0x20000000
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#define GF_IS_PERDC_PARLL_IF_16 0x30000000
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#define GF_IS_PERDC_PARLL_MAX_DATA_MASK 0x0000ff00
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#define GF_IS_PERDC_PARLL_MAX_DATA_IF_8 0x00005900
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#define GF_IS_PERDC_PARLL_MAX_DATA_IF_9 0x00005900
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#define GF_IS_PERDC_PARLL_MAX_DATA_IF_16 0x00006B00
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#define GF_IS_PERDC_PARLL_MAX_DATA_IF_18 0x00006B00
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#define GFIS_PRLL_EN_RS_DC_C 0
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#define GFIS_PRLL_EN_RS_DC_D 0
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#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_1_D (1 << (108-96))
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#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_2_D (1 << (111-96))
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#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_3_D (1 << (114-96))
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#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_4_D (1 << (117-96))
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#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_5_D (1 << (120-96))
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#define GFIS_PRLL_ENBLE_LSC0_18_CYCLE_6_D (1 << (123-96))
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#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_1_D (1 << (109-96))
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#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_2_D (1 << (112-96))
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#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_3_D (1 << (115-96))
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#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_4_D (1 << (118-96))
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#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_5_D (1 << (121-96))
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#define GFIS_PRLL_ENBLE_LSC1_18_CYCLE_6_D (1 << (124-96))
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#define GFIS_PRLL_RS_CD_18_CYCLE_1_H_D (1 << (110-96))
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#define GFIS_PRLL_RS_CD_18_CYCLE_1_L_D 0x00000000
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#define GFIS_PRLL_RS_CD_18_CYCLE_2_H_D (1 << (113-96))
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#define GFIS_PRLL_RS_CD_18_CYCLE_2_L_D 0x00000000
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#define GFIS_PRLL_RS_CD_18_CYCLE_3_H_D (1 << (116-96))
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#define GFIS_PRLL_RS_CD_18_CYCLE_3_L_D 0x00000000
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#define GFIS_PRLL_RS_CD_18_CYCLE_4_H_D (1 << (119-96))
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#define GFIS_PRLL_RS_CD_18_CYCLE_4_L_D 0x00000000
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#define GFIS_PRLL_RS_CD_18_CYCLE_5_H_D (1 << (122-96))
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#define GFIS_PRLL_RS_CD_18_CYCLE_5_L_D 0x00000000
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#define GFIS_PRLL_RS_CD_18_CYCLE_6_H_D (1 << (125-96))
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#define GFIS_PRLL_RS_CD_18_CYCLE_6_L_D 0x00000000
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#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_1_C (1 << (90-64))
|
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#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_2_C (1 << (93-64))
|
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#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_3_D (1 << (96-96))
|
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#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_4_D (1 << (99-96))
|
|
#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_5_D (1 << (102-96))
|
|
#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_6_D (1 << (105-96))
|
|
#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_7_D (1 << (108-96))
|
|
#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_8_D (1 << (111-96))
|
|
#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_9_D (1 << (114-96))
|
|
#define GFIS_PRLL_ENBLE_LSC0_9_CYCLE_10_D (1 << (117-96))
|
|
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_1_C (1 << (91-64))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_2_C (1 << (94-64))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_3_D (1 << (97-96))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_4_D (1 << (100-96))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_5_D (1 << (103-96))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_6_D (1 << (106-96))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_7_D (1 << (109-96))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_8_D (1 << (112-96))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_9_D (1 << (115-96))
|
|
#define GFIS_PRLL_ENBLE_LSC1_9_CYCLE_10_D (1 << (118-96))
|
|
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_1_H_C (1 << (92-64))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_1_L_C 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_2_H_C (1 << (95-64))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_2_L_C 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_3_H_D (1 << (98-96))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_3_L_D 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_4_H_D (1 << (101-96))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_4_L_D 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_5_H_D (1 << (104-96))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_5_L_D 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_6_H_D (1 << (107-96))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_6_L_D 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_7_H_D (1 << (110-96))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_7_L_D 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_8_H_D (1 << (113-96))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_8_L_D 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_9_H_D (1 << (116-96))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_9_L_D 0x00000000
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_10_H_D (1 << (119-96))
|
|
#define GFIS_PRLL_RS_CD_9_CYCLE_10_L_D 0x00000000
|
|
|
|
// Serial
|
|
|
|
#define GF_IS_PERDC_SERIAL_CYCLE_MASK 0x0000000f
|
|
#define GF_IS_PERDC_SERIAL_CYCLE0 0x00000000
|
|
#define GF_IS_PERDC_SERIAL_CYCLE1 0x00000001
|
|
#define GF_IS_PERDC_SERIAL_CYCLE2 0x00000002
|
|
#define GF_IS_PERDC_SERIAL_CYCLE3 0x00000003
|
|
#define GF_IS_PERDC_SERIAL_CYCLE4 0x00000004
|
|
#define GF_IS_PERDC_SERIAL_CYCLE5 0x00000005
|
|
#define GF_IS_PERDC_SERIAL_CYCLE6 0x00000006
|
|
#define GF_IS_PERDC_SERIAL_CYCLE7 0x00000007
|
|
#define GF_IS_PERDC_SERIAL_CYCLE8 0x00000008
|
|
#define GF_IS_PERDC_SERIAL_CYCLE9 0x00000009
|
|
#define GF_IS_PERDC_SERIAL_CYCLE10 0x0000000A
|
|
#define GF_IS_PERDC_SERIAL_CYCLE11 0x0000000B
|
|
#define GF_IS_PERDC_SERIAL_CYCLE12 0x0000000C
|
|
|
|
#define GF_IS_PERDC_SERIAL_IF_MASK 0xf0000000
|
|
#define GF_IS_PERDC_SERIAL_IF_8 0x80000000
|
|
#define GF_IS_PERDC_SERIAL_IF_9 0x90000000
|
|
#define GF_IS_PERDC_SERIAL_IF_12 0xA0000000
|
|
#define GF_IS_PERDC_SERIAL_IF_16 0xB0000000
|
|
#define GF_IS_PERDC_SERIAL_IF_18 0xC0000000
|
|
#define GF_IS_PERDC_SERIAL_IF_24 0xD0000000
|
|
|
|
#define GF_IS_PERDC_SERIAL_MAX_DATA_MASK 0x0000ff00
|
|
#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_8 0x00005900
|
|
#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_9 0x00005900
|
|
#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_12 0x00006A00
|
|
#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_16 0x00006B00
|
|
#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_18 0x00006C00
|
|
#define GF_IS_PERDC_SERIAL_MAX_DATA_IF_24 0x00006D00
|
|
|
|
#define GFIS_SERIAL_EN_RS_DC_C 0
|
|
#define GFIS_SERIAL_EN_RS_DC_D 0
|
|
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_1_D (1 << (96-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_2_D (1 << (98-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_3_D (1 << (100-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_24_CYCLE_4_D (1 << (102-96))
|
|
|
|
#define GFIS_SERIAL_RS_CD_24_CYCLE_1_H_D (1 << (97-96))
|
|
#define GFIS_SERIAL_RS_CD_24_CYCLE_1_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_24_CYCLE_2_H_D (1 << (99-96))
|
|
#define GFIS_SERIAL_RS_CD_24_CYCLE_2_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_24_CYCLE_3_H_D (1 << (101-96))
|
|
#define GFIS_SERIAL_RS_CD_24_CYCLE_3_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_24_CYCLE_4_H_D (1 << (103-96))
|
|
#define GFIS_SERIAL_RS_CD_24_CYCLE_4_L_D 0x00000000
|
|
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_1_D (1 << (108-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_2_D (1 << (110-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_3_D (1 << (112-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_4_D (1 << (114-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_5_D (1 << (116-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_18_CYCLE_6_D (1 << (118-96))
|
|
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_1_H_D (1 << (109-96))
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_1_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_2_H_D (1 << (111-96))
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_2_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_3_H_D (1 << (113-96))
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_3_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_4_H_D (1 << (115-96))
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_4_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_5_H_D (1 << (117-96))
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_5_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_6_H_D (1 << (119-96))
|
|
#define GFIS_SERIAL_RS_CD_18_CYCLE_6_L_D 0x00000000
|
|
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_1_D (1 << (112-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_2_D (1 << (114-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_3_D (1 << (116-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_4_D (1 << (118-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_5_D (1 << (120-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_6_D (1 << (122-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_7_D (1 << (124-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_16_CYCLE_7_D (1 << (124-96))
|
|
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_1_H_D (1 << (113-96))
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_1_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_2_H_D (1 << (115-96))
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_2_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_3_H_D (1 << (117-96))
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_3_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_4_H_D (1 << (119-96))
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_4_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_5_H_D (1 << (121-96))
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_5_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_6_H_D (1 << (123-96))
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_6_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_7_H_D (1 << (125-96))
|
|
#define GFIS_SERIAL_RS_CD_16_CYCLE_7_L_D 0x00000000
|
|
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_1_D (1 << (109-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_2_D (1 << (111-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_3_D (1 << (113-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_4_D (1 << (115-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_5_D (1 << (117-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_6_D (1 << (119-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_7_D (1 << (121-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_8_D (1 << (123-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_12_CYCLE_9_D (1 << (125-96))
|
|
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_1_H_D (1 << (110-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_1_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_2_H_D (1 << (112-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_2_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_3_H_D (1 << (114-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_3_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_4_H_D (1 << (116-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_4_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_5_H_D (1 << (118-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_5_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_6_H_D (1 << (120-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_6_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_7_H_D (1 << (122-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_7_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_8_H_D (1 << (124-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_8_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_9_H_D (1 << (126-96))
|
|
#define GFIS_SERIAL_RS_CD_12_CYCLE_9_L_D 0x00000000
|
|
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_1_D (1 << (99-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_2_D (1 << (101-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_3_D (1 << (103-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_4_D (1 << (105-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_5_D (1 << (107-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_6_D (1 << (109-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_7_D (1 << (111-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_8_D (1 << (113-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_9_D (1 << (115-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_9_CYCLE_10_D (1 << (117-96))
|
|
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_1_H_D (1 << (100-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_1_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_2_H_D (1 << (102-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_2_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_3_H_D (1 << (104-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_3_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_4_H_D (1 << (106-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_4_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_5_H_D (1 << (108-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_5_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_6_H_D (1 << (110-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_6_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_7_H_D (1 << (112-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_7_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_8_H_D (1 << (114-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_8_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_9_H_D (1 << (116-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_9_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_10_H_D (1 << (118-96))
|
|
#define GFIS_SERIAL_RS_CD_9_CYCLE_10_L_D 0x00000000
|
|
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_1_D (1 << (96-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_2_D (1 << (98-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_3_D (1 << (100-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_4_D (1 << (102-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_5_D (1 << (104-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_6_D (1 << (106-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_7_D (1 << (108-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_8_D (1 << (110-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_9_D (1 << (112-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_10_D (1 << (114-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_11_D (1 << (116-96))
|
|
#define GFIS_SERIAL_ENBLE_LMSCS_LSSCS_8_CYCLE_12_D (1 << (118-96))
|
|
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_1_H_D (1 << (97-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_1_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_2_H_D (1 << (99-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_2_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_3_H_D (1 << (101-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_3_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_4_H_D (1 << (103-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_4_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_5_H_D (1 << (105-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_5_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_6_H_D (1 << (107-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_6_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_7_H_D (1 << (109-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_7_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_8_H_D (1 << (111-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_8_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_9_H_D (1 << (113-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_9_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_10_H_D (1 << (115-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_10_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_11_H_D (1 << (117-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_11_L_D 0x00000000
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_12_H_D (1 << (119-96))
|
|
#define GFIS_SERIAL_RS_CD_8_CYCLE_12_L_D 0x00000000
|
|
|
|
#define GFSCMD_PERIODIC_PKT_HEADER_END 0x4000E000
|
|
|
|
#define GFSCMD_I2C_PKT_HEADER_START 0x4000A000
|
|
|
|
#define GF_I2C_DATA_BURST_MASK 0x000000ff
|
|
#define GF_I2C_A_DATA_BURST0 0x00000000
|
|
#define GF_I2C_A_DATA_BURST1 0x00000001
|
|
#define GF_I2C_A_DATA_BURST2 0x00000002
|
|
#define GF_I2C_A_DATA_BURST3 0x00000003
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#define GF_I2C_A_DATA_BURST4 0x00000004
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#define GF_I2C_A_DATA_BURST5 0x00000005
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#define GF_I2C_A_DATA_BURST6 0x00000006
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#define GF_I2C_A_DATA_BURST7 0x00000007
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#define GF_I2C_A_DATA_BURST8 0x00000008
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#define GF_HW_SW_I2C_MASK 0x00000300
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#define GF_HW_I2C 0x00000000
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#define GF_SW_I2C 0x00000100
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#define GF_I2C_B_WRITE_ID 0x00000000
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#define GF_I2C_C_READ_ID 0x00000000
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#define GFSCMD_I2C_PKT_HEADER_END 0x4000B000
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//SDIO GPIOs
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#define GFSCMD_GPIO_SD_INIT 0x00008f00 //One time Init SD GPIO
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#define GF_NO_DATA 0x00000000
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#define GFSCMD_GPIO_SD_PIN_SDGP0 0x00008f01
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#define GFSCMD_GPIO_SD_PIN_SDGP1 0x00018f01
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#define GFSCMD_GPIO_SD_PIN_CMD 0x00028f02
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#define GFSCMD_GPIO_SD_PIN_CLK 0x00038f02
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#define GFSCMD_GPIO_SD_PIN_DATA0 0x00048f00
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#define GFSCMD_GPIO_SD_PIN_DATA1 0x00048f01
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#define GFSCMD_GPIO_SD_PIN_DATA2 0x00048f02
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#define GFSCMD_GPIO_SD_PIN_DATA3 0x00048f03
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#define GF_GPIO_PIN_OUTPUT_ENABLE 0x00000000
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#define GF_GPIO_PIN_INPUT_ENABLE 0x00000001
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#define GF_GPIO_PIN_DISABLE 0x00000002
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#define GF_GPIO_PIN_HIGH 0x00000003
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#define GF_GPIO_PIN_LOW 0x00000004
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#endif //__GFDISPCMDDATA_H__
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