msm: camera: YV12 video support
Support for color format YV12. Signed-off-by: Azam Sadiq Pasha Kapatrala Syed <akapatra@codeaurora.org>
This commit is contained in:
committed by
Bryan Huntsman
parent
d42d120608
commit
7ff0cf4999
@@ -149,8 +149,12 @@ struct msm_ispif_params {
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};
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struct msm_vpe_phy_info {
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uint32_t sbuf_phy;
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uint32_t y_phy;
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uint32_t cbcr_phy;
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uint32_t planar0_off;
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uint32_t planar1_off;
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uint32_t planar2_off;
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uint32_t p0_phy;
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uint32_t p1_phy;
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uint32_t p2_phy;
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uint8_t output_id; /* VFE31_OUTPUT_MODE_PT/S/V */
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uint32_t frame_id;
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};
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@@ -197,8 +201,12 @@ struct msm_camera_csiphy_params {
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struct msm_vfe_phy_info {
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uint32_t sbuf_phy;
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uint32_t y_phy;
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uint32_t cbcr_phy;
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uint32_t planar0_off;
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uint32_t planar1_off;
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uint32_t planar2_off;
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uint32_t p0_phy;
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uint32_t p1_phy;
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uint32_t p2_phy;
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uint8_t output_id; /* VFE31_OUTPUT_MODE_PT/S/V */
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uint32_t frame_id;
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};
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@@ -228,8 +236,8 @@ struct video_crop_t{
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};
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struct msm_vpe_buf_info {
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uint32_t y_phy;
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uint32_t cbcr_phy;
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uint32_t p0_phy;
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uint32_t p1_phy;
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struct timespec ts;
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uint32_t frame_id;
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struct video_crop_t vpe_crop;
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@@ -288,7 +296,7 @@ struct msm_camvfe_params {
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struct msm_camvpe_fn {
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int (*vpe_reg)(struct msm_vpe_callback *);
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int (*vpe_cfg_update) (void *);
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void (*send_frame_to_vpe) (uint32_t y_phy, uint32_t cbcr_phy,
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void (*send_frame_to_vpe) (uint32_t planar0_off, uint32_t planar1_off,
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struct timespec *ts, int output_id);
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int (*vpe_config)(struct msm_vpe_cfg_cmd *, void *);
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void (*vpe_cfg_offset)(int frame_pack, uint32_t pyaddr,
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@@ -276,16 +276,18 @@ static int check_pmem_info(struct msm_pmem_info *info, int len)
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{
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if (info->offset < len &&
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info->offset + info->len <= len &&
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info->y_off < len &&
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info->cbcr_off < len)
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info->planar0_off < len &&
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info->planar1_off < len &&
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info->planar2_off < len)
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return 0;
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pr_err("%s: check failed: off %d len %d y %d cbcr %d (total len %d)\n",
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pr_err("%s: check failed: off %d len %d plane0 %d plane1 %d plane2 %d (total len %d)\n",
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__func__,
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info->offset,
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info->len,
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info->y_off,
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info->cbcr_off,
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info->planar0_off,
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info->planar1_off,
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info->planar2_off,
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len);
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return -EINVAL;
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}
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@@ -342,7 +344,7 @@ static int msm_pmem_table_add(struct hlist_head *ptype,
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hlist_add_head(&(region->list), ptype);
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spin_unlock_irqrestore(pmem_spinlock, flags);
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CDBG("%s: type %d, paddr 0x%lx, vaddr 0x%lx\n",
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pr_info("%s: type %d, paddr 0x%lx, vaddr 0x%lx\n",
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__func__, info->type, paddr, (unsigned long)info->vaddr);
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return 0;
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@@ -420,8 +422,9 @@ static uint8_t msm_pmem_region_lookup_2(struct hlist_head *ptype,
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}
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static int msm_pmem_frame_ptov_lookup(struct msm_sync *sync,
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unsigned long pyaddr,
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unsigned long pcbcraddr,
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unsigned long p0addr,
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unsigned long p1addr,
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unsigned long p2addr,
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struct msm_pmem_info *pmem_info,
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int clear_active)
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{
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@@ -431,9 +434,9 @@ static int msm_pmem_frame_ptov_lookup(struct msm_sync *sync,
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spin_lock_irqsave(&sync->pmem_frame_spinlock, flags);
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hlist_for_each_entry_safe(region, node, n, &sync->pmem_frames, list) {
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if (pyaddr == (region->paddr + region->info.y_off) &&
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pcbcraddr == (region->paddr +
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region->info.cbcr_off) &&
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if (p0addr == (region->paddr + region->info.planar0_off) &&
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p1addr == (region->paddr + region->info.planar1_off) &&
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p2addr == (region->paddr + region->info.planar2_off) &&
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region->info.active) {
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/* offset since we could pass vaddr inside
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* a registerd pmem buffer
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@@ -447,12 +450,13 @@ static int msm_pmem_frame_ptov_lookup(struct msm_sync *sync,
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}
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}
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/* After lookup failure, dump all the list entries... */
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pr_err("%s, for pyaddr 0x%lx, pcbcraddr 0x%lx\n",
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__func__, pyaddr, pcbcraddr);
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pr_err("%s, failed for plane0 addr 0x%lx, plane1 addr 0x%lx plane2 addr 0x%lx\n",
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__func__, p0addr, p1addr, p2addr);
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hlist_for_each_entry_safe(region, node, n, &sync->pmem_frames, list) {
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pr_err("listed pyaddr 0x%lx, pcbcraddr 0x%lx, active = %d",
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(region->paddr + region->info.y_off),
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(region->paddr + region->info.cbcr_off),
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pr_err("listed p0addr 0x%lx, p1addr 0x%lx, p2addr 0x%lx, active = %d",
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(region->paddr + region->info.planar0_off),
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(region->paddr + region->info.planar1_off),
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(region->paddr + region->info.planar2_off),
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region->info.active);
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}
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@@ -461,7 +465,7 @@ static int msm_pmem_frame_ptov_lookup(struct msm_sync *sync,
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}
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static int msm_pmem_frame_ptov_lookup2(struct msm_sync *sync,
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unsigned long pyaddr,
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unsigned long p0_phy,
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struct msm_pmem_info *pmem_info,
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int clear_active)
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{
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@@ -471,7 +475,7 @@ static int msm_pmem_frame_ptov_lookup2(struct msm_sync *sync,
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spin_lock_irqsave(&sync->pmem_frame_spinlock, flags);
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hlist_for_each_entry_safe(region, node, n, &sync->pmem_frames, list) {
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if (pyaddr == (region->paddr + region->info.y_off) &&
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if (p0_phy == (region->paddr + region->info.planar0_off) &&
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region->info.active) {
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/* offset since we could pass vaddr inside
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* a registerd pmem buffer
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@@ -522,8 +526,8 @@ static unsigned long msm_pmem_stats_ptov_lookup(struct msm_sync *sync,
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}
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static unsigned long msm_pmem_frame_vtop_lookup(struct msm_sync *sync,
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unsigned long buffer,
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uint32_t yoff, uint32_t cbcroff, int fd, int change_flag)
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unsigned long buffer, uint32_t p0_off, uint32_t p1_off,
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uint32_t p2_off, int fd, int change_flag)
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{
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struct msm_pmem_region *region;
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struct hlist_node *node, *n;
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@@ -533,8 +537,9 @@ static unsigned long msm_pmem_frame_vtop_lookup(struct msm_sync *sync,
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hlist_for_each_entry_safe(region,
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node, n, &sync->pmem_frames, list) {
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if (((unsigned long)(region->info.vaddr) == buffer) &&
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(region->info.y_off == yoff) &&
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(region->info.cbcr_off == cbcroff) &&
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(region->info.planar0_off == p0_off) &&
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(region->info.planar1_off == p1_off) &&
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(region->info.planar2_off == p2_off) &&
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(region->info.fd == fd) &&
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(region->info.active == 0)) {
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if (change_flag)
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@@ -545,17 +550,18 @@ static unsigned long msm_pmem_frame_vtop_lookup(struct msm_sync *sync,
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}
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}
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/* After lookup failure, dump all the list entries... */
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pr_err("%s, failed for vaddr 0x%lx, yoff %d cbcroff %d\n",
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__func__, buffer, yoff, cbcroff);
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pr_err("%s, failed for vaddr 0x%lx, p0_off %d p1_off %d\n",
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__func__, buffer, p0_off, p1_off);
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hlist_for_each_entry_safe(region, node, n, &sync->pmem_frames, list) {
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pr_err("listed vaddr 0x%p, cbcroff %d, active = %d",
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(region->info.vaddr),
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(region->info.cbcr_off),
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region->info.active);
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pr_err("%s, failed for vaddr 0x%lx, r_p0 = 0x%x p0_off 0x%x"
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"r_p1 = 0x%x, p1_off 0x%x, r_p2 = 0x%x, p2_off = 0x%x"
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" active = %d\n", __func__, buffer, region->info.planar0_off,
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p0_off, region->info.planar1_off,
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p1_off, region->info.planar2_off, p2_off,
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region->info.active);
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}
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spin_unlock_irqrestore(&sync->pmem_frame_spinlock, flags);
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return 0;
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}
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@@ -711,32 +717,37 @@ static int __msm_get_frame(struct msm_sync *sync,
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vdata = (struct msm_vfe_resp *)(qcmd->command);
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pphy = &vdata->phy;
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CDBG("%s, pphy->p2_phy = 0x%x\n", __func__, pphy->p2_phy);
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rc = msm_pmem_frame_ptov_lookup(sync,
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pphy->y_phy,
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pphy->cbcr_phy,
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pphy->p0_phy,
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pphy->p1_phy,
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pphy->p2_phy,
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&pmem_info,
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1); /* Clear the active flag */
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if (rc < 0) {
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pr_err("%s: cannot get frame, invalid lookup address "
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"y %x cbcr %x\n",
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pr_err("%s: cannot get frame, invalid lookup address"
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"plane0 add %x plane1 add %x plane2 add%x\n",
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__func__,
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pphy->y_phy,
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pphy->cbcr_phy);
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pphy->p0_phy,
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pphy->p0_phy,
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pphy->p0_phy);
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goto err;
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}
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frame->ts = qcmd->ts;
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frame->buffer = (unsigned long)pmem_info.vaddr;
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frame->y_off = pmem_info.y_off;
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frame->cbcr_off = pmem_info.cbcr_off;
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frame->planar0_off = pmem_info.planar0_off;
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frame->planar1_off = pmem_info.planar1_off;
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frame->planar2_off = pmem_info.planar2_off;
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frame->fd = pmem_info.fd;
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frame->path = vdata->phy.output_id;
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frame->frame_id = vdata->phy.frame_id;
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CDBG("%s: y %x, cbcr %x, qcmd %x, virt_addr %x\n",
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__func__,
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pphy->y_phy, pphy->cbcr_phy, (int) qcmd, (int) frame->buffer);
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CDBG("%s: plane0 %x, plane1 %x, plane2 %x,qcmd %x, virt_addr %x\n",
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__func__, pphy->p0_phy, pphy->p1_phy, pphy->p2_phy,
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(int) qcmd, (int) frame->buffer);
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err:
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free_qcmd(qcmd);
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@@ -1047,8 +1058,8 @@ static int msm_divert_frame(struct msm_sync *sync,
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return -EINVAL;
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}
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rc = msm_pmem_frame_ptov_lookup(sync, data->phy.y_phy,
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data->phy.cbcr_phy, &pinfo,
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rc = msm_pmem_frame_ptov_lookup(sync, data->phy.p0_phy,
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data->phy.p1_phy, data->phy.p2_phy, &pinfo,
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0); /* do not clear the active flag */
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if (rc < 0) {
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@@ -1057,8 +1068,8 @@ static int msm_divert_frame(struct msm_sync *sync,
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}
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buf.fmain.buffer = (unsigned long)pinfo.vaddr;
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buf.fmain.y_off = pinfo.y_off;
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buf.fmain.cbcr_off = pinfo.cbcr_off;
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buf.fmain.planar0_off = pinfo.planar0_off;
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buf.fmain.planar1_off = pinfo.planar1_off;
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buf.fmain.fd = pinfo.fd;
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CDBG("%s: buf 0x%x fd %d\n", __func__, (unsigned int)buf.fmain.buffer,
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@@ -1088,13 +1099,15 @@ static int msm_divert_st_frame(struct msm_sync *sync,
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buf.type = OUTPUT_TYPE_ST_R;
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} else {
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if (se->resptype == MSM_CAM_RESP_STEREO_OP_1) {
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rc = msm_pmem_frame_ptov_lookup(sync, data->phy.y_phy,
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data->phy.cbcr_phy, &pinfo,
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rc = msm_pmem_frame_ptov_lookup(sync, data->phy.p0_phy,
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data->phy.p1_phy, data->phy.p2_phy,
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&pinfo,
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1); /* do clear the active flag */
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buf.buf_info.path = path;
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} else if (se->resptype == MSM_CAM_RESP_STEREO_OP_2) {
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rc = msm_pmem_frame_ptov_lookup(sync, data->phy.y_phy,
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data->phy.cbcr_phy, &pinfo,
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rc = msm_pmem_frame_ptov_lookup(sync, data->phy.p0_phy,
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data->phy.p1_phy, data->phy.p2_phy,
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&pinfo,
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0); /* do not clear the active flag */
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buf.buf_info.path = path;
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} else
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@@ -1153,8 +1166,9 @@ static int msm_divert_st_frame(struct msm_sync *sync,
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buf.buf_info.buffer = (unsigned long)pinfo.vaddr;
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buf.buf_info.phy_offset = pinfo.offset;
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buf.buf_info.y_off = pinfo.y_off;
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buf.buf_info.cbcr_off = pinfo.cbcr_off;
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buf.buf_info.planar0_off = pinfo.planar0_off;
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buf.buf_info.planar1_off = pinfo.planar1_off;
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buf.buf_info.planar2_off = pinfo.planar0_off;
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buf.buf_info.fd = pinfo.fd;
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CDBG("%s: buf 0x%x fd %d\n", __func__,
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@@ -2010,7 +2024,7 @@ static int __msm_put_frame_buf(struct msm_sync *sync,
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/* Change the active flag. */
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pphy = msm_pmem_frame_vtop_lookup(sync,
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pb->buffer,
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pb->y_off, pb->cbcr_off, pb->fd, 1);
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pb->planar0_off, pb->planar1_off, pb->planar2_off, pb->fd, 1);
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if (pphy != 0) {
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CDBG("%s: rel: vaddr %lx, paddr %lx\n",
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@@ -2038,7 +2052,7 @@ static int __msm_put_pic_buf(struct msm_sync *sync,
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pphy = msm_pmem_frame_vtop_lookup(sync,
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pb->buffer,
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pb->y_off, pb->cbcr_off, pb->fd, 1);
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pb->planar0_off, pb->planar1_off, pb->planar2_off, pb->fd, 1);
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if (pphy != 0) {
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CDBG("%s: rel: vaddr %lx, paddr %lx\n",
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@@ -2306,21 +2320,21 @@ static int __msm_get_pic(struct msm_sync *sync,
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pphy = &vdata->phy;
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rc = msm_pmem_frame_ptov_lookup2(sync,
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pphy->y_phy,
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pphy->p0_phy,
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&pmem_info,
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1); /* mark pic frame in use */
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if (rc < 0) {
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pr_err("%s: cannot get pic frame, invalid lookup"
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" address y %x cbcr %x\n",
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__func__, pphy->y_phy, pphy->cbcr_phy);
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" address p0_phy add %x p1_phy add%x\n",
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__func__, pphy->p0_phy, pphy->p1_phy);
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goto err;
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}
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frame->ts = qcmd->ts;
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frame->buffer = (unsigned long)pmem_info.vaddr;
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frame->y_off = pmem_info.y_off;
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frame->cbcr_off = pmem_info.cbcr_off;
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frame->planar0_off = pmem_info.planar0_off;
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frame->planar1_off = pmem_info.planar1_off;
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frame->fd = pmem_info.fd;
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if (sync->stereocam_enabled &&
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sync->stereo_state != STEREO_RAW_SNAP_STARTED) {
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@@ -2331,20 +2345,21 @@ static int __msm_get_pic(struct msm_sync *sync,
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} else
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frame->path = vdata->phy.output_id;
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CDBG("%s: y %x, cbcr %x, qcmd %x, virt_addr %x\n",
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__func__, pphy->y_phy,
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pphy->cbcr_phy, (int) qcmd, (int) frame->buffer);
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CDBG("%s: p0_phy add %x, p0_phy add %x, qcmd %x, "
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"virt_addr %x\n",
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__func__, pphy->p0_phy,
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pphy->p1_phy, (int) qcmd, (int) frame->buffer);
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} else { /* PP */
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pframe = (struct msm_frame *)(qcmd->command);
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frame->ts = qcmd->ts;
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frame->buffer = pframe->buffer;
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frame->y_off = pframe->y_off;
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frame->cbcr_off = pframe->cbcr_off;
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frame->planar0_off = pframe->planar0_off;
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frame->planar1_off = pframe->planar1_off;
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frame->fd = pframe->fd;
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frame->path = pframe->path;
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CDBG("%s: PP y_off %x, cbcr_off %x, path %d vaddr 0x%x\n",
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__func__, frame->y_off, frame->cbcr_off, frame->path,
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(int) frame->buffer);
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__func__, frame->planar0_off, frame->planar1_off,
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frame->path, (int) frame->buffer);
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}
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err:
|
||||
@@ -2573,13 +2588,13 @@ static int msm_put_st_frame(struct msm_sync *sync, void __user *arg)
|
||||
vfe_rp = (struct msm_vfe_resp *)qcmd->command;
|
||||
|
||||
CDBG("%s: Left Py = 0x%x y_off = %d cbcr_off = %d\n",
|
||||
__func__, vfe_rp->phy.y_phy,
|
||||
stereo_frame_half.L.buf_y_off,
|
||||
stereo_frame_half.L.buf_cbcr_off);
|
||||
__func__, vfe_rp->phy.p0_phy,
|
||||
stereo_frame_half.L.buf_p0_off,
|
||||
stereo_frame_half.L.buf_p1_off);
|
||||
|
||||
sync->vpefn.vpe_cfg_offset(stereo_frame_half.packing,
|
||||
vfe_rp->phy.y_phy + stereo_frame_half.L.buf_y_off,
|
||||
vfe_rp->phy.y_phy + stereo_frame_half.L.buf_cbcr_off,
|
||||
vfe_rp->phy.p0_phy + stereo_frame_half.L.buf_p0_off,
|
||||
vfe_rp->phy.p0_phy + stereo_frame_half.L.buf_p1_off,
|
||||
&(qcmd->ts), OUTPUT_TYPE_ST_L, stereo_frame_half.L,
|
||||
stereo_frame_half.frame_id);
|
||||
|
||||
@@ -2595,14 +2610,15 @@ static int msm_put_st_frame(struct msm_sync *sync, void __user *arg)
|
||||
|
||||
st_pphy = msm_pmem_frame_vtop_lookup(sync,
|
||||
stereo_frame_half.buf_info.buffer,
|
||||
stereo_frame_half.buf_info.y_off,
|
||||
stereo_frame_half.buf_info.cbcr_off,
|
||||
stereo_frame_half.buf_info.planar0_off,
|
||||
stereo_frame_half.buf_info.planar1_off,
|
||||
stereo_frame_half.buf_info.planar2_off,
|
||||
stereo_frame_half.buf_info.fd,
|
||||
0); /* Do not change the active flag. */
|
||||
|
||||
sync->vpefn.vpe_cfg_offset(stereo_frame_half.packing,
|
||||
st_pphy + stereo_frame_half.R.buf_y_off,
|
||||
st_pphy + stereo_frame_half.R.buf_cbcr_off,
|
||||
st_pphy + stereo_frame_half.R.buf_p0_off,
|
||||
st_pphy + stereo_frame_half.R.buf_p1_off,
|
||||
NULL, OUTPUT_TYPE_ST_R, stereo_frame_half.R,
|
||||
stereo_frame_half.frame_id);
|
||||
|
||||
@@ -3292,10 +3308,10 @@ static void msm_vfe_sync(struct msm_vfe_resp *vdata,
|
||||
switch (vdata->type) {
|
||||
case VFE_MSG_OUTPUT_P:
|
||||
if (sync->pp_mask & PP_PREV) {
|
||||
CDBG("%s: PP_PREV in progress: phy_y %x phy_cbcr %x\n",
|
||||
CDBG("%s: PP_PREV in progress: p0_add %x p1_add %x\n",
|
||||
__func__,
|
||||
vdata->phy.y_phy,
|
||||
vdata->phy.cbcr_phy);
|
||||
vdata->phy.p0_phy,
|
||||
vdata->phy.p1_phy);
|
||||
spin_lock_irqsave(&pp_prev_spinlock, flags);
|
||||
if (sync->pp_prev)
|
||||
CDBG("%s: overwriting pp_prev!\n",
|
||||
@@ -3453,8 +3469,8 @@ static void msm_vfe_sync(struct msm_vfe_resp *vdata,
|
||||
vdata->vpe_bf.vpe_crop =
|
||||
*(struct video_crop_t *)(sync->cropinfo);
|
||||
|
||||
vdata->vpe_bf.y_phy = vdata->phy.y_phy;
|
||||
vdata->vpe_bf.cbcr_phy = vdata->phy.cbcr_phy;
|
||||
vdata->vpe_bf.p0_phy = vdata->phy.p0_phy;
|
||||
vdata->vpe_bf.p1_phy = vdata->phy.p1_phy;
|
||||
vdata->vpe_bf.ts = (qcmd->ts);
|
||||
vdata->vpe_bf.frame_id = vdata->phy.frame_id;
|
||||
qcmd->command = vdata;
|
||||
@@ -3466,8 +3482,8 @@ static void msm_vfe_sync(struct msm_vfe_resp *vdata,
|
||||
"= %ld\n", __func__, qcmd->ts.tv_nsec);
|
||||
|
||||
sync->vpefn.send_frame_to_vpe(
|
||||
vdata->phy.y_phy,
|
||||
vdata->phy.cbcr_phy,
|
||||
vdata->phy.p0_phy,
|
||||
vdata->phy.p1_phy,
|
||||
&(qcmd->ts), OUTPUT_TYPE_V);
|
||||
|
||||
free_qcmd(qcmd);
|
||||
|
||||
@@ -119,7 +119,7 @@ static int msm_isp_enqueue(struct msm_cam_media_controller *pmctl,
|
||||
data->type == VFE_MSG_OUTPUT_S ||
|
||||
data->type == VFE_MSG_OUTPUT_T) {
|
||||
msm_mctl_buf_done(pmctl, data->type,
|
||||
(u32)data->phy.y_phy);
|
||||
(u32)data->phy.planar0_off);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
@@ -584,7 +584,7 @@ static int msm_frame_axi_cfg(struct v4l2_subdev *sd,
|
||||
D("%s region %d paddr = 0x%p\n", __func__, i,
|
||||
(void *)region[i].paddr);
|
||||
D("%s region y_off = %d cbcr_off = %d\n", __func__,
|
||||
region[i].info.y_off, region[i].info.cbcr_off);
|
||||
region[i].info.planar0_off, region[i].info.planar1_off);
|
||||
}
|
||||
/* send the AXI configuration command to driver */
|
||||
rc = msm_isp_subdev_ioctl(sd, cfgcmd, data);
|
||||
|
||||
@@ -297,9 +297,8 @@ static void msm_vidbuf_queue(struct videobuf_queue *vq,
|
||||
D("%s buffer type is %d\n", __func__, mem->buffer_type);
|
||||
frame.path = pcam_inst->path;
|
||||
frame.buffer = 0;
|
||||
frame.y_off = mem->y_off;
|
||||
frame.cbcr_off = mem->cbcr_off;
|
||||
|
||||
frame.planar0_off = mem->planar0_off;
|
||||
frame.planar1_off = mem->planar1_off;
|
||||
/* now release frame to vfe */
|
||||
cfgcmd.cmd_type = CMD_FRAME_BUF_RELEASE;
|
||||
cfgcmd.value = (void *)&frame;
|
||||
|
||||
@@ -84,16 +84,16 @@ static int check_pmem_info(struct msm_pmem_info *info, int len)
|
||||
{
|
||||
if (info->offset < len &&
|
||||
info->offset + info->len <= len &&
|
||||
info->y_off < len &&
|
||||
info->cbcr_off < len)
|
||||
info->planar0_off < len &&
|
||||
info->planar1_off < len)
|
||||
return 0;
|
||||
|
||||
pr_err("%s: check failed: off %d len %d y %d cbcr %d (total len %d)\n",
|
||||
__func__,
|
||||
info->offset,
|
||||
info->len,
|
||||
info->y_off,
|
||||
info->cbcr_off,
|
||||
info->planar0_off,
|
||||
info->planar1_off,
|
||||
len);
|
||||
return -EINVAL;
|
||||
}
|
||||
@@ -325,10 +325,10 @@ uint8_t msm_pmem_region_lookup_3(struct msm_cam_v4l2_device *pcam, int idx,
|
||||
reg->info.type = mem_type;
|
||||
|
||||
reg->info.offset = 0;
|
||||
reg->info.y_off = mem->y_off;
|
||||
reg->info.cbcr_off = PAD_TO_WORD(mem->cbcr_off);
|
||||
reg->info.planar0_off = mem->planar0_off;
|
||||
reg->info.planar1_off = PAD_TO_WORD(mem->planar1_off);
|
||||
D("%s y_off = %d, cbcr_off = %d\n", __func__,
|
||||
reg->info.y_off, reg->info.cbcr_off);
|
||||
reg->info.planar0_off, reg->info.planar1_off);
|
||||
rc += 1;
|
||||
reg++;
|
||||
}
|
||||
|
||||
@@ -337,10 +337,13 @@ static void vfe_addr_convert(struct msm_vfe_phy_info *pinfo,
|
||||
break;
|
||||
}
|
||||
pinfo->output_id = outid;
|
||||
pinfo->y_phy =
|
||||
((struct vfe_message *)data)->_u.msgOut.yBuffer;
|
||||
pinfo->cbcr_phy =
|
||||
((struct vfe_message *)data)->_u.msgOut.cbcrBuffer;
|
||||
pinfo->p0_phy =
|
||||
((struct vfe_message *)data)->_u.msgOut.p0_addr;
|
||||
pinfo->p1_phy =
|
||||
((struct vfe_message *)data)->_u.msgOut.p1_addr;
|
||||
pinfo->p2_phy =
|
||||
((struct vfe_message *)data)->_u.msgOut.p2_addr;
|
||||
CDBG("%s, p2_phy = 0x%x\n", __func__, pinfo->p2_phy);
|
||||
|
||||
pinfo->frame_id =
|
||||
((struct vfe_message *)data)->_u.msgOut.frameCounter;
|
||||
@@ -456,8 +459,8 @@ static void vfe31_proc_ops(enum VFE31_MESSAGE_ID id, void *msg, size_t len)
|
||||
GFP_ATOMIC);
|
||||
}
|
||||
|
||||
static void vfe_send_outmsg(uint8_t msgid, uint32_t pyaddr,
|
||||
uint32_t pcbcraddr)
|
||||
static void vfe_send_outmsg(uint8_t msgid, uint32_t p0_addr,
|
||||
uint32_t p1_addr, uint32_t p2_addr)
|
||||
{
|
||||
struct vfe_message msg;
|
||||
uint8_t outid;
|
||||
@@ -483,8 +486,10 @@ static void vfe_send_outmsg(uint8_t msgid, uint32_t pyaddr,
|
||||
break;
|
||||
}
|
||||
msg._u.msgOut.output_id = msgid;
|
||||
msg._u.msgOut.yBuffer = pyaddr;
|
||||
msg._u.msgOut.cbcrBuffer = pcbcraddr;
|
||||
msg._u.msgOut.p0_addr = p0_addr;
|
||||
msg._u.msgOut.p1_addr = p1_addr;
|
||||
msg._u.msgOut.p2_addr = p2_addr;
|
||||
CDBG("%s p2_addr = 0x%x\n", __func__, p2_addr);
|
||||
|
||||
vfe31_proc_ops(msgid, &msg, sizeof(struct vfe_message));
|
||||
return;
|
||||
@@ -540,7 +545,7 @@ static int vfe31_disable(struct camera_enable_cmd *enable,
|
||||
}
|
||||
|
||||
static int vfe31_add_free_buf2(struct vfe31_output_ch *outch,
|
||||
uint32_t paddr, uint32_t y_off, uint32_t cbcr_off)
|
||||
uint32_t paddr, uint32_t p0_off, uint32_t p1_off, uint32_t p2_off)
|
||||
{
|
||||
struct vfe31_free_buf *free_buf = NULL;
|
||||
unsigned long flags = 0;
|
||||
@@ -550,20 +555,24 @@ static int vfe31_add_free_buf2(struct vfe31_output_ch *outch,
|
||||
|
||||
spin_lock_irqsave(&outch->free_buf_lock, flags);
|
||||
free_buf->paddr = paddr;
|
||||
free_buf->y_off = y_off;
|
||||
free_buf->cbcr_off = cbcr_off;
|
||||
free_buf->planar0_off = p0_off;
|
||||
free_buf->planar1_off = p1_off;
|
||||
free_buf->planar2_off = p2_off;
|
||||
list_add_tail(&free_buf->node, &outch->free_buf_head);
|
||||
|
||||
CDBG("%s: free_buf paddr = 0x%x, y_off = %d, cbcr_off = %d\n",
|
||||
__func__, free_buf->paddr, free_buf->y_off,
|
||||
free_buf->cbcr_off);
|
||||
CDBG("%s: free_buf paddr = 0x%x, p0_off = %d, p1_off = %d,"
|
||||
"p2_off = %d\n", __func__, free_buf->paddr,
|
||||
free_buf->planar0_off, free_buf->planar1_off,
|
||||
free_buf->planar2_off);
|
||||
spin_unlock_irqrestore(&outch->free_buf_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define vfe31_add_free_buf(outch, regptr) \
|
||||
vfe31_add_free_buf2(outch, regptr->paddr, regptr->info.y_off, \
|
||||
regptr->info.cbcr_off)
|
||||
vfe31_add_free_buf2(outch, regptr->paddr, \
|
||||
regptr->info.planar0_off, \
|
||||
regptr->info.planar1_off, \
|
||||
regptr->info.planar2_off)
|
||||
|
||||
#define vfe31_free_buf_available(outch) \
|
||||
(!list_empty(&outch.free_buf_head))
|
||||
@@ -660,10 +669,10 @@ static int vfe31_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p1 = ao + 6 + i; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
|
||||
p1 = ao + 12 + i; /* wm1 for cbcr */
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
regp1++;
|
||||
}
|
||||
ret = vfe31_add_free_buf(outp1, regp1);
|
||||
@@ -692,47 +701,47 @@ static int vfe31_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
/* Parse the buffers!!! */
|
||||
if (ad->bufnum2 == 1) { /* assuming bufnum1 = bufnum2 */
|
||||
p1 = ao + 6; /* wm0 ping */
|
||||
*p1++ = (regp1->paddr + regp1->info.y_off);
|
||||
*p1++ = (regp1->paddr + regp1->info.planar0_off);
|
||||
|
||||
/* this is to duplicate ping address to pong.*/
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
|
||||
p1 = ao + 30; /* wm4 ping */
|
||||
*p1++ = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1++ = (regp1->paddr + regp1->info.planar1_off);
|
||||
CDBG("%s: regp1->info.cbcr_off = 0x%x\n", __func__,
|
||||
regp1->info.cbcr_off);
|
||||
regp1->info.planar1_off);
|
||||
|
||||
/* this is to duplicate ping address to pong.*/
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
|
||||
p1 = ao + 12; /* wm1 ping */
|
||||
*p1++ = (regp2->paddr + regp2->info.y_off);
|
||||
*p1++ = (regp2->paddr + regp2->info.planar0_off);
|
||||
|
||||
/* pong = ping,*/
|
||||
*p1 = (regp2->paddr + regp2->info.y_off);
|
||||
*p1 = (regp2->paddr + regp2->info.planar0_off);
|
||||
|
||||
p1 = ao + 36; /* wm5 */
|
||||
*p1++ = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p1++ = (regp2->paddr + regp2->info.planar1_off);
|
||||
CDBG("%s: regp2->info.cbcr_off = 0x%x\n", __func__,
|
||||
regp2->info.cbcr_off);
|
||||
regp2->info.planar1_off);
|
||||
|
||||
/* pong = ping,*/
|
||||
*p1 = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p1 = (regp2->paddr + regp2->info.planar1_off);
|
||||
} else { /* more than one snapshot */
|
||||
/* first fill ping & pong */
|
||||
for (i = 0; i < 2; i++) {
|
||||
p1 = ao + 6 + i; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
p1 = ao + 30 + i; /* wm4 for cbcr */
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
regp1--;
|
||||
}
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p2 = ao + 12 + i; /* wm1 for y */
|
||||
*p2 = (regp2->paddr + regp2->info.y_off);
|
||||
*p2 = (regp2->paddr + regp2->info.planar0_off);
|
||||
p2 = ao + 36 + i; /* wm5 for cbcr */
|
||||
*p2 = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p2 = (regp2->paddr + regp2->info.planar1_off);
|
||||
regp2--;
|
||||
}
|
||||
|
||||
@@ -781,25 +790,25 @@ static int vfe31_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
/* first fill ping & pong */
|
||||
for (i = 0; i < 2; i++) {
|
||||
p1 = ao + 6 + i; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
p1 = ao + 30 + i; /* wm4 for cbcr */
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
regp1++;
|
||||
}
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p2 = ao + 12 + i; /* wm1 for y */
|
||||
*p2 = (regp2->paddr + regp2->info.y_off);
|
||||
*p2 = (regp2->paddr + regp2->info.planar0_off);
|
||||
p2 = ao + 36 + i; /* wm5 for cbcr */
|
||||
*p2 = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p2 = (regp2->paddr + regp2->info.planar1_off);
|
||||
regp2++;
|
||||
}
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p3 = ao + 18 + i; /* wm2 for y */
|
||||
*p3 = (regp3->paddr + regp3->info.y_off);
|
||||
*p3 = (regp3->paddr + regp3->info.planar0_off);
|
||||
p3 = ao + 42 + i; /* wm6 for cbcr */
|
||||
*p3 = (regp3->paddr + regp3->info.cbcr_off);
|
||||
*p3 = (regp3->paddr + regp3->info.planar1_off);
|
||||
regp3++;
|
||||
}
|
||||
|
||||
@@ -847,19 +856,25 @@ static int vfe31_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p1 = ao + 6 + i; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
|
||||
p1 = ao + 30 + i; /* wm4 for cbcr */
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
|
||||
if (vfe31_ctrl->outpath.out0.ch2 >= 0) {
|
||||
/* wm6 for cr & wm4 for cb: YV12 case*/
|
||||
p1 = ao + 42 + i;
|
||||
*p1 = (regp1->paddr + regp1->info.planar2_off);
|
||||
}
|
||||
regp1++;
|
||||
}
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p2 = ao + 12 + i; /* wm1 for y */
|
||||
*p2 = (regp2->paddr + regp2->info.y_off);
|
||||
*p2 = (regp2->paddr + regp2->info.planar0_off);
|
||||
|
||||
p2 = ao + 36 + i; /* wm5 for cbcr */
|
||||
*p2 = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p2 = (regp2->paddr + regp2->info.planar1_off);
|
||||
regp2++;
|
||||
}
|
||||
for (i = 2; i < ad->bufnum1; i++) {
|
||||
@@ -885,7 +900,7 @@ static int vfe31_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
regp1 = &(ad->region[ad->bufnum1]);
|
||||
vfe31_ctrl->outpath.output_mode |= VFE31_OUTPUT_MODE_S;
|
||||
p1 = ao + 6; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
if (p_sync->stereocam_enabled)
|
||||
p_sync->stereo_state = STEREO_RAW_SNAP_IDLE;
|
||||
}
|
||||
@@ -1306,6 +1321,10 @@ static int vfe31_start(void)
|
||||
if (vfe31_ctrl->outpath.output_mode & VFE31_OUTPUT_MODE_PT) {
|
||||
irq_comp_mask |= (0x1 << vfe31_ctrl->outpath.out0.ch0 |
|
||||
0x1 << vfe31_ctrl->outpath.out0.ch1);
|
||||
if (vfe31_ctrl->outpath.out0.ch2 >= 0)
|
||||
irq_comp_mask |= (0x1 << vfe31_ctrl->outpath.out0.ch0 |
|
||||
0x1 << vfe31_ctrl->outpath.out0.ch1 |
|
||||
0x1 << vfe31_ctrl->outpath.out0.ch2);
|
||||
}
|
||||
|
||||
if (vfe31_ctrl->outpath.output_mode & VFE31_OUTPUT_MODE_V) {
|
||||
@@ -1315,12 +1334,14 @@ static int vfe31_start(void)
|
||||
|
||||
msm_io_w(irq_comp_mask, vfe31_ctrl->vfebase + VFE_IRQ_COMP_MASK);
|
||||
|
||||
|
||||
if (vfe31_ctrl->outpath.output_mode & VFE31_OUTPUT_MODE_PT) {
|
||||
msm_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch0]);
|
||||
msm_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch1]);
|
||||
if (vfe31_ctrl->outpath.out0.ch2 >= 0)
|
||||
msm_io_w(1, vfe31_ctrl->vfebase +
|
||||
vfe31_AXI_WM_CFG[vfe31_ctrl->outpath.out0.ch2]);
|
||||
}
|
||||
if (p_sync->stereocam_enabled)
|
||||
msm_camio_set_perf_lvl(S_STEREO_VIDEO);
|
||||
@@ -2238,7 +2259,8 @@ static int vfe31_config(struct msm_vfe_cfg_cmd *cmd, void *data)
|
||||
break;
|
||||
}
|
||||
|
||||
ret = vfe31_add_free_buf2(outch, p, b->y_off, b->cbcr_off);
|
||||
ret = vfe31_add_free_buf2(outch, p, b->planar0_off,
|
||||
b->planar1_off, b->planar2_off);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
break;
|
||||
@@ -2265,7 +2287,8 @@ static int vfe31_config(struct msm_vfe_cfg_cmd *cmd, void *data)
|
||||
} else
|
||||
return -EFAULT;
|
||||
|
||||
ret = vfe31_add_free_buf2(outch, p, b->y_off, b->cbcr_off);
|
||||
ret = vfe31_add_free_buf2(outch, p, b->planar0_off,
|
||||
b->planar1_off, b->planar2_off);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
break;
|
||||
@@ -2802,7 +2825,7 @@ static void vfe31_process_error_irq(uint32_t errStatus)
|
||||
|
||||
static void vfe31_process_output_path_irq_0(uint32_t ping_pong)
|
||||
{
|
||||
uint32_t pyaddr, pcbcraddr;
|
||||
uint32_t p0_addr, p1_addr, p2_addr;
|
||||
#ifdef CONFIG_MSM_CAMERA_V4L2
|
||||
uint32_t pyaddr_ping, pcbcraddr_ping, pyaddr_pong, pcbcraddr_pong;
|
||||
#endif
|
||||
@@ -2814,26 +2837,36 @@ static void vfe31_process_output_path_irq_0(uint32_t ping_pong)
|
||||
|
||||
if (free_buf) {
|
||||
/* Y channel */
|
||||
pyaddr = vfe31_get_ch_addr(ping_pong,
|
||||
p0_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch0);
|
||||
/* Chroma channel */
|
||||
pcbcraddr = vfe31_get_ch_addr(ping_pong,
|
||||
p1_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch1);
|
||||
|
||||
CDBG("output path 0, pyaddr = 0x%x, pcbcraddr = 0x%x\n",
|
||||
pyaddr, pcbcraddr);
|
||||
if (vfe31_ctrl->outpath.out0.ch2 >= 0)
|
||||
p2_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch2);
|
||||
else
|
||||
p2_addr = p0_addr;
|
||||
|
||||
CDBG("output path 0, p0_addr = 0x%x, p1_addr = 0x%x,"
|
||||
"p2_addr = 0x%x\n", p0_addr, p1_addr, p2_addr);
|
||||
/* Y channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
if (vfe31_ctrl->outpath.out0.ch2 >= 0)
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch2,
|
||||
free_buf->paddr + free_buf->planar2_off);
|
||||
|
||||
kfree(free_buf);
|
||||
/* if continuous mode, for display. (preview) */
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_P, pyaddr, pcbcraddr);
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_P, p0_addr, p1_addr, p2_addr);
|
||||
} else {
|
||||
vfe31_ctrl->outpath.out0.frame_drop_cnt++;
|
||||
pr_warning("path_irq_0 - no free buffer!\n");
|
||||
@@ -2878,54 +2911,54 @@ static void vfe31_process_output_path_irq_0(uint32_t ping_pong)
|
||||
|
||||
static void vfe31_process_snapshot_frame(uint32_t ping_pong)
|
||||
{
|
||||
uint32_t pyaddr, pcbcraddr;
|
||||
uint32_t p0_addr, p1_addr;
|
||||
struct vfe31_free_buf *free_buf = NULL;
|
||||
/* Y channel- Main Image */
|
||||
pyaddr = vfe31_get_ch_addr(ping_pong,
|
||||
p0_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch0);
|
||||
/* Chroma channel - TN Image */
|
||||
pcbcraddr = vfe31_get_ch_addr(ping_pong,
|
||||
p1_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch1);
|
||||
|
||||
free_buf = vfe31_get_free_buf(&vfe31_ctrl->outpath.out1);
|
||||
CDBG("%s: snapshot main, pyaddr = 0x%x, pcbcraddr = 0x%x\n",
|
||||
__func__, pyaddr, pcbcraddr);
|
||||
CDBG("%s: snapshot main, p0_addr = 0x%x, p1_addr = 0x%x\n",
|
||||
__func__, p0_addr, p1_addr);
|
||||
if (free_buf) {
|
||||
/* Y channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
}
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_S, pyaddr, pcbcraddr);
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_S, p0_addr, p1_addr, p0_addr);
|
||||
|
||||
/* Y channel- TN Image */
|
||||
pyaddr = vfe31_get_ch_addr(ping_pong,
|
||||
p0_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch0);
|
||||
/* Chroma channel - TN Image */
|
||||
pcbcraddr = vfe31_get_ch_addr(ping_pong,
|
||||
p1_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch1);
|
||||
|
||||
free_buf = vfe31_get_free_buf(&vfe31_ctrl->outpath.out0);
|
||||
CDBG("%s: snapshot TN, pyaddr = 0x%x, pcbcraddr = 0x%x\n",
|
||||
__func__, pyaddr, pcbcraddr);
|
||||
CDBG("%s: snapshot TN, p0_addr = 0x%x, pcbcraddr = 0x%x\n",
|
||||
__func__, p0_addr, p1_addr);
|
||||
if (free_buf) {
|
||||
/* Y channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
}
|
||||
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_T, pyaddr, pcbcraddr);
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_T, p0_addr, p1_addr, p0_addr);
|
||||
|
||||
/* in snapshot mode if done then send
|
||||
snapshot done message */
|
||||
@@ -2962,14 +2995,14 @@ static void vfe31_process_raw_snapshot_frame(uint32_t ping_pong)
|
||||
/* Y channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
}
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_S, pyaddr, pcbcraddr);
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_S, pyaddr, pcbcraddr, 0);
|
||||
|
||||
/* in snapshot mode if done then send
|
||||
snapshot done message */
|
||||
@@ -2984,54 +3017,54 @@ static void vfe31_process_raw_snapshot_frame(uint32_t ping_pong)
|
||||
}
|
||||
static void vfe31_process_zsl_frame(uint32_t ping_pong)
|
||||
{
|
||||
uint32_t pyaddr, pcbcraddr;
|
||||
uint32_t p0_addr, p1_addr;
|
||||
struct vfe31_free_buf *free_buf = NULL;
|
||||
/* Y channel- Main Image */
|
||||
pyaddr = vfe31_get_ch_addr(ping_pong,
|
||||
p0_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out2.ch0);
|
||||
/* Chroma channel - Main Image */
|
||||
pcbcraddr = vfe31_get_ch_addr(ping_pong,
|
||||
p1_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out2.ch1);
|
||||
|
||||
free_buf = vfe31_get_free_buf(&vfe31_ctrl->outpath.out2);
|
||||
CDBG("%s: snapshot main, pyaddr = 0x%x, pcbcraddr = 0x%x\n",
|
||||
__func__, pyaddr, pcbcraddr);
|
||||
__func__, p0_addr, p1_addr);
|
||||
if (free_buf) {
|
||||
/* Y channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out2.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out2.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
}
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_S, pyaddr, pcbcraddr);
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_S, p0_addr, p1_addr, 0);
|
||||
|
||||
/* Y channel- TN Image */
|
||||
pyaddr = vfe31_get_ch_addr(ping_pong,
|
||||
p0_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch0);
|
||||
/* Chroma channel - TN Image */
|
||||
pcbcraddr = vfe31_get_ch_addr(ping_pong,
|
||||
p1_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch1);
|
||||
|
||||
free_buf = vfe31_get_free_buf(&vfe31_ctrl->outpath.out1);
|
||||
CDBG("%s: snapshot TN, pyaddr = 0x%x, pcbcraddr = 0x%x\n",
|
||||
__func__, pyaddr, pcbcraddr);
|
||||
__func__, p0_addr, p1_addr);
|
||||
if (free_buf) {
|
||||
/* Y channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out1.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
}
|
||||
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_T, pyaddr, pcbcraddr);
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_T, p0_addr, p1_addr, 0);
|
||||
}
|
||||
|
||||
static void vfe31_process_output_path_irq_1(uint32_t ping_pong)
|
||||
@@ -3103,7 +3136,7 @@ static void vfe31_process_output_path_irq_1(uint32_t ping_pong)
|
||||
|
||||
static void vfe31_process_output_path_irq_2(uint32_t ping_pong)
|
||||
{
|
||||
uint32_t pyaddr, pcbcraddr;
|
||||
uint32_t p0_addr, p1_addr, p2_addr;
|
||||
struct vfe31_free_buf *free_buf = NULL;
|
||||
|
||||
#ifdef CONFIG_MSM_CAMERA_V4L2
|
||||
@@ -3132,25 +3165,31 @@ static void vfe31_process_output_path_irq_2(uint32_t ping_pong)
|
||||
|
||||
if (free_buf) {
|
||||
/* Y channel */
|
||||
pyaddr = vfe31_get_ch_addr(ping_pong,
|
||||
p0_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out2.ch0);
|
||||
/* Chroma channel */
|
||||
pcbcraddr = vfe31_get_ch_addr(ping_pong,
|
||||
p1_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out2.ch1);
|
||||
|
||||
CDBG("video output, pyaddr = 0x%x, pcbcraddr = 0x%x\n",
|
||||
pyaddr, pcbcraddr);
|
||||
if (vfe31_ctrl->outpath.out0.ch2 >= 0)
|
||||
p2_addr = vfe31_get_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out0.ch2);
|
||||
else
|
||||
p2_addr = p0_addr;
|
||||
|
||||
CDBG("video output, p0_addr = 0x%x, p1_addr = 0x%x\n",
|
||||
p0_addr, p1_addr);
|
||||
|
||||
/* Y channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out2.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe31_put_ch_addr(ping_pong,
|
||||
vfe31_ctrl->outpath.out2.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_V, pyaddr, pcbcraddr);
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_V, p0_addr, p1_addr, p2_addr);
|
||||
} else {
|
||||
vfe31_ctrl->outpath.out2.frame_drop_cnt++;
|
||||
pr_warning("path_irq_2 - no free buffer!\n");
|
||||
|
||||
@@ -841,8 +841,9 @@ struct vfe31_irq_status {
|
||||
|
||||
struct vfe_msg_output {
|
||||
uint8_t output_id;
|
||||
uint32_t yBuffer;
|
||||
uint32_t cbcrBuffer;
|
||||
uint32_t p0_addr;
|
||||
uint32_t p1_addr;
|
||||
uint32_t p2_addr;
|
||||
struct vfe_frame_bpc_info bpcInfo;
|
||||
struct vfe_frame_asf_info asfInfo;
|
||||
uint32_t frameCounter;
|
||||
@@ -877,8 +878,9 @@ struct vfe31_cmd_type {
|
||||
struct vfe31_free_buf {
|
||||
struct list_head node;
|
||||
uint32_t paddr;
|
||||
uint32_t y_off;
|
||||
uint32_t cbcr_off;
|
||||
uint32_t planar0_off;
|
||||
uint32_t planar1_off;
|
||||
uint32_t planar2_off;
|
||||
};
|
||||
|
||||
struct vfe31_output_ch {
|
||||
|
||||
@@ -335,9 +335,9 @@ static void vfe_addr_convert(struct msm_vfe_phy_info *pinfo,
|
||||
break;
|
||||
}
|
||||
pinfo->output_id = outid;
|
||||
pinfo->y_phy =
|
||||
pinfo->planar0_off =
|
||||
((struct vfe_message *)data)->_u.msgOut.yBuffer;
|
||||
pinfo->cbcr_phy =
|
||||
pinfo->planar1_off =
|
||||
((struct vfe_message *)data)->_u.msgOut.cbcrBuffer;
|
||||
|
||||
pinfo->frame_id =
|
||||
@@ -587,12 +587,12 @@ static int vfe32_enqueue_free_buf(struct vfe32_output_ch *outch,
|
||||
|
||||
spin_lock_irqsave(&outch->free_buf_lock, flags);
|
||||
free_buf->paddr = paddr;
|
||||
free_buf->y_off = y_off;
|
||||
free_buf->cbcr_off = cbcr_off;
|
||||
free_buf->planar0_off = y_off;
|
||||
free_buf->planar1_off = cbcr_off;
|
||||
list_add_tail(&free_buf->node, &outch->free_buf_queue);
|
||||
CDBG("%s: free_buf paddr = 0x%x, y_off = %d, cbcr_off = %d\n",
|
||||
__func__, free_buf->paddr, free_buf->y_off,
|
||||
free_buf->cbcr_off);
|
||||
__func__, free_buf->paddr, free_buf->planar0_off,
|
||||
free_buf->planar1_off);
|
||||
spin_unlock_irqrestore(&outch->free_buf_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
@@ -688,15 +688,17 @@ static int vfe32_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p1 = ao + 6 + i; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
|
||||
p1 = ao + 12 + i; /* wm1 for cbcr */
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
regp1++;
|
||||
}
|
||||
|
||||
for (i = 2; i < ad->bufnum2; i++) {
|
||||
ret = vfe32_enqueue_free_buf(outp1, regp1->paddr,
|
||||
regp1->info.y_off, regp1->info.cbcr_off);
|
||||
regp1->info.planar0_off,
|
||||
regp1->info.planar1_off);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
regp1++;
|
||||
@@ -722,53 +724,53 @@ static int vfe32_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
/* Parse the buffers!!! */
|
||||
if (ad->bufnum2 == 1) { /* assuming bufnum1 = bufnum2 */
|
||||
p1 = ao + 6; /* wm0 ping */
|
||||
*p1++ = (regp1->paddr + regp1->info.y_off);
|
||||
*p1++ = (regp1->paddr + regp1->info.planar0_off);
|
||||
/* this is to duplicate ping address to pong.*/
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
p1 = ao + 30; /* wm4 ping */
|
||||
*p1++ = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1++ = (regp1->paddr + regp1->info.planar1_off);
|
||||
/* this is to duplicate ping address to pong.*/
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
p1 = ao + 12; /* wm1 ping */
|
||||
*p1++ = (regp2->paddr + regp2->info.y_off);
|
||||
*p1++ = (regp2->paddr + regp2->info.planar0_off);
|
||||
/* pong = ping,*/
|
||||
*p1 = (regp2->paddr + regp2->info.y_off);
|
||||
*p1 = (regp2->paddr + regp2->info.planar0_off);
|
||||
p1 = ao + 36; /* wm5 */
|
||||
*p1++ = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p1 = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p1++ = (regp2->paddr + regp2->info.planar1_off);
|
||||
*p1 = (regp2->paddr + regp2->info.planar1_off);
|
||||
|
||||
} else { /* more than one snapshot */
|
||||
/* first fill ping & pong */
|
||||
for (i = 0; i < 2; i++) {
|
||||
p1 = ao + 6 + i; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
p1 = ao + 30 + i; /* wm4 for cbcr */
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
regp1++;
|
||||
}
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p2 = ao + 12 + i; /* wm1 for y */
|
||||
*p2 = (regp2->paddr + regp2->info.y_off);
|
||||
*p2 = (regp2->paddr + regp2->info.planar0_off);
|
||||
p2 = ao + 36 + i; /* wm5 for cbcr */
|
||||
*p2 = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p2 = (regp2->paddr + regp2->info.planar1_off);
|
||||
regp2++;
|
||||
}
|
||||
|
||||
for (i = 2; i < ad->bufnum1; i++) {
|
||||
ret = vfe32_enqueue_free_buf(outp1,
|
||||
regp1->paddr,
|
||||
regp1->info.y_off,
|
||||
regp1->info.cbcr_off);
|
||||
regp1->paddr,
|
||||
regp1->info.planar0_off,
|
||||
regp1->info.planar1_off);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
regp1++;
|
||||
}
|
||||
for (i = 2; i < ad->bufnum2; i++) {
|
||||
ret = vfe32_enqueue_free_buf(outp2,
|
||||
regp2->paddr,
|
||||
regp2->info.y_off,
|
||||
regp2->info.cbcr_off);
|
||||
regp2->paddr,
|
||||
regp2->info.planar0_off,
|
||||
regp2->info.planar1_off);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
regp2++;
|
||||
@@ -794,33 +796,37 @@ static int vfe32_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p1 = ao + 6 + i; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr +
|
||||
regp1->info.planar0_off);
|
||||
|
||||
p1 = ao + 30 + i; /* wm1 for cbcr */
|
||||
*p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
*p1 = (regp1->paddr +
|
||||
regp1->info.planar1_off);
|
||||
regp1++;
|
||||
}
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
p2 = ao + 12 + i; /* wm0 for y */
|
||||
*p2 = (regp2->paddr + regp2->info.y_off);
|
||||
*p2 = (regp2->paddr +
|
||||
regp2->info.planar0_off);
|
||||
|
||||
p2 = ao + 36 + i; /* wm1 for cbcr */
|
||||
*p2 = (regp2->paddr + regp2->info.cbcr_off);
|
||||
*p2 = (regp2->paddr +
|
||||
regp2->info.planar1_off);
|
||||
regp2++;
|
||||
}
|
||||
for (i = 2; i < ad->bufnum1; i++) {
|
||||
ret = vfe32_enqueue_free_buf(outp1, regp1->paddr,
|
||||
regp1->info.y_off,
|
||||
regp1->info.cbcr_off);
|
||||
regp1->info.planar0_off,
|
||||
regp1->info.planar1_off);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
regp1++;
|
||||
}
|
||||
for (i = 2; i < ad->bufnum2; i++) {
|
||||
ret = vfe32_enqueue_free_buf(outp2, regp2->paddr,
|
||||
regp2->info.y_off,
|
||||
regp2->info.cbcr_off);
|
||||
regp2->info.planar0_off,
|
||||
regp2->info.planar1_off);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
regp2++;
|
||||
@@ -834,7 +840,7 @@ static int vfe32_config_axi(int mode, struct axidata *ad, uint32_t *ao)
|
||||
regp1 = &(ad->region[ad->bufnum1]);
|
||||
vfe32_ctrl->outpath.output_mode |= VFE32_OUTPUT_MODE_S;
|
||||
p1 = ao + 6; /* wm0 for y */
|
||||
*p1 = (regp1->paddr + regp1->info.y_off);
|
||||
*p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
@@ -2338,11 +2344,11 @@ static void vfe32_process_output_path_irq_0(void)
|
||||
/* Y channel */
|
||||
vfe32_put_ch_addr(ping_pong,
|
||||
vfe32_ctrl->outpath.out0.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe32_put_ch_addr(ping_pong,
|
||||
vfe32_ctrl->outpath.out0.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
}
|
||||
if (vfe32_ctrl->operation_mode ==
|
||||
@@ -2440,11 +2446,11 @@ static void vfe32_process_output_path_irq_1(void)
|
||||
/* Y channel */
|
||||
vfe32_put_ch_addr(ping_pong,
|
||||
vfe32_ctrl->outpath.out1.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe32_put_ch_addr(ping_pong,
|
||||
vfe32_ctrl->outpath.out1.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
}
|
||||
if (vfe32_ctrl->operation_mode ==
|
||||
@@ -2540,11 +2546,11 @@ static void vfe32_process_output_path_irq_2(void)
|
||||
/* Y channel */
|
||||
vfe32_put_ch_addr(ping_pong,
|
||||
vfe32_ctrl->outpath.out2.ch0,
|
||||
free_buf->paddr + free_buf->y_off);
|
||||
free_buf->paddr + free_buf->planar0_off);
|
||||
/* Chroma channel */
|
||||
vfe32_put_ch_addr(ping_pong,
|
||||
vfe32_ctrl->outpath.out2.ch1,
|
||||
free_buf->paddr + free_buf->cbcr_off);
|
||||
free_buf->paddr + free_buf->planar1_off);
|
||||
kfree(free_buf);
|
||||
}
|
||||
vfe_send_outmsg(MSG_ID_OUTPUT_V, pyaddr, pcbcraddr);
|
||||
@@ -3175,8 +3181,8 @@ static long msm_vfe_subdev_ioctl(struct v4l2_subdev *sd,
|
||||
rc = -EFAULT;
|
||||
break;
|
||||
}
|
||||
|
||||
rc = vfe32_enqueue_free_buf(outch, p, b->y_off, b->cbcr_off);
|
||||
rc = vfe32_enqueue_free_buf(outch, p, b->planar0_off,
|
||||
b->planar1_off);
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
@@ -882,8 +882,8 @@ struct vfe32_cmd_type {
|
||||
struct vfe32_free_buf {
|
||||
struct list_head node;
|
||||
uint32_t paddr;
|
||||
uint32_t y_off;
|
||||
uint32_t cbcr_off;
|
||||
uint32_t planar0_off;
|
||||
uint32_t planar1_off;
|
||||
};
|
||||
|
||||
struct vfe32_output_ch {
|
||||
|
||||
@@ -72,14 +72,15 @@ static void vfe_7x_convert(struct msm_vfe_phy_info *pinfo,
|
||||
{
|
||||
switch (type) {
|
||||
case VFE_MSG_OUTPUT_P: {
|
||||
pinfo->y_phy = ((struct vfe_endframe *)data)->y_address;
|
||||
pinfo->cbcr_phy =
|
||||
pinfo->planar0_off = ((struct vfe_endframe *)data)->y_address;
|
||||
pinfo->planar1_off =
|
||||
((struct vfe_endframe *)data)->cbcr_address;
|
||||
|
||||
pinfo->planar2_off = pinfo->planar0_off;
|
||||
pinfo->output_id = OUTPUT_TYPE_P;
|
||||
|
||||
CDBG("vfe_7x_convert, y_phy = 0x%x, cbcr_phy = 0x%x\n",
|
||||
pinfo->y_phy, pinfo->cbcr_phy);
|
||||
pinfo->planar0_off, pinfo->planar1_off);
|
||||
|
||||
((struct vfe_frame_extra *)extdata)->bl_evencol =
|
||||
((struct vfe_endframe *)data)->blacklevelevencolumn;
|
||||
@@ -99,20 +100,20 @@ static void vfe_7x_convert(struct msm_vfe_phy_info *pinfo,
|
||||
break;
|
||||
|
||||
case VFE_MSG_OUTPUT_S: {
|
||||
pinfo->y_phy = paddr_s_y;
|
||||
pinfo->cbcr_phy = paddr_s_cbcr;
|
||||
pinfo->planar0_off = paddr_s_y;
|
||||
pinfo->planar1_off = paddr_s_cbcr;
|
||||
pinfo->output_id = OUTPUT_TYPE_S;
|
||||
CDBG("vfe_7x_convert: y_phy = 0x%x cbcr_phy = 0x%x\n",
|
||||
pinfo->y_phy, pinfo->cbcr_phy);
|
||||
pinfo->planar0_off, pinfo->planar1_off);
|
||||
}
|
||||
break;
|
||||
|
||||
case VFE_MSG_OUTPUT_T: {
|
||||
pinfo->y_phy = paddr_t_y;
|
||||
pinfo->cbcr_phy = paddr_t_cbcr;
|
||||
pinfo->planar0_off = paddr_t_y;
|
||||
pinfo->planar1_off = paddr_t_cbcr;
|
||||
pinfo->output_id = OUTPUT_TYPE_T;
|
||||
CDBG("vfe_7x_convert: y_phy = 0x%x cbcr_phy = 0x%x\n",
|
||||
pinfo->y_phy, pinfo->cbcr_phy);
|
||||
pinfo->planar0_off, pinfo->planar1_off);
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -372,19 +373,20 @@ static int vfe_7x_config_axi(int mode,
|
||||
|
||||
CDBG("bufnum1 = %d\n", ad->bufnum1);
|
||||
if (mode == OUTPUT_1_AND_2) {
|
||||
paddr_t_y = regptr->paddr + regptr->info.y_off;
|
||||
paddr_t_cbcr = regptr->paddr + regptr->info.cbcr_off;
|
||||
paddr_t_y = regptr->paddr + regptr->info.planar0_off;
|
||||
paddr_t_cbcr = regptr->paddr +
|
||||
regptr->info.planar1_off;
|
||||
}
|
||||
|
||||
CDBG("config_axi1: O1, phy = 0x%lx, y_off = %d, cbcr_off =%d\n",
|
||||
regptr->paddr, regptr->info.y_off,
|
||||
regptr->info.cbcr_off);
|
||||
regptr->paddr, regptr->info.planar0_off,
|
||||
regptr->info.planar1_off);
|
||||
|
||||
bptr = &ao->output1buffer1_y_phy;
|
||||
for (cnt = 0; cnt < ad->bufnum1; cnt++) {
|
||||
*bptr = regptr->paddr + regptr->info.y_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar0_off;
|
||||
bptr++;
|
||||
*bptr = regptr->paddr + regptr->info.cbcr_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar1_off;
|
||||
|
||||
bptr++;
|
||||
regptr++;
|
||||
@@ -392,9 +394,9 @@ static int vfe_7x_config_axi(int mode,
|
||||
|
||||
regptr--;
|
||||
for (cnt = 0; cnt < (8 - ad->bufnum1); cnt++) {
|
||||
*bptr = regptr->paddr + regptr->info.y_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar0_off;
|
||||
bptr++;
|
||||
*bptr = regptr->paddr + regptr->info.cbcr_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar1_off;
|
||||
bptr++;
|
||||
}
|
||||
} /* if OUTPUT1 or Both */
|
||||
@@ -403,16 +405,17 @@ static int vfe_7x_config_axi(int mode,
|
||||
regptr = &(ad->region[ad->bufnum1]);
|
||||
|
||||
CDBG("bufnum2 = %d\n", ad->bufnum2);
|
||||
paddr_s_y = regptr->paddr + regptr->info.y_off;
|
||||
paddr_s_cbcr = regptr->paddr + regptr->info.cbcr_off;
|
||||
paddr_s_y = regptr->paddr + regptr->info.planar0_off;
|
||||
paddr_s_cbcr = regptr->paddr + regptr->info.planar1_off;
|
||||
CDBG("config_axi2: O2, phy = 0x%lx, y_off = %d, cbcr_off =%d\n",
|
||||
regptr->paddr, regptr->info.y_off, regptr->info.cbcr_off);
|
||||
regptr->paddr, regptr->info.planar0_off,
|
||||
regptr->info.planar1_off);
|
||||
|
||||
bptr = &ao->output2buffer1_y_phy;
|
||||
for (cnt = 0; cnt < ad->bufnum2; cnt++) {
|
||||
*bptr = regptr->paddr + regptr->info.y_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar0_off;
|
||||
bptr++;
|
||||
*bptr = regptr->paddr + regptr->info.cbcr_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar1_off;
|
||||
|
||||
bptr++;
|
||||
regptr++;
|
||||
@@ -420,9 +423,9 @@ static int vfe_7x_config_axi(int mode,
|
||||
|
||||
regptr--;
|
||||
for (cnt = 0; cnt < (8 - ad->bufnum2); cnt++) {
|
||||
*bptr = regptr->paddr + regptr->info.y_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar0_off;
|
||||
bptr++;
|
||||
*bptr = regptr->paddr + regptr->info.cbcr_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar1_off;
|
||||
bptr++;
|
||||
}
|
||||
}
|
||||
@@ -584,10 +587,10 @@ static int vfe_7x_config(struct msm_vfe_cfg_cmd *cmd, void *data)
|
||||
fack.header = VFE_FRAME_ACK;
|
||||
|
||||
fack.output2newybufferaddress =
|
||||
(void *)(p + b->y_off);
|
||||
(void *)(p + b->planar0_off);
|
||||
|
||||
fack.output2newcbcrbufferaddress =
|
||||
(void *)(p + b->cbcr_off);
|
||||
(void *)(p + b->planar1_off);
|
||||
|
||||
vfecmd->queue = QDSP_CMDQUEUE;
|
||||
vfecmd->length = sizeof(struct vfe_outputack);
|
||||
|
||||
@@ -72,14 +72,15 @@ static void vfe_7x_convert(struct msm_vfe_phy_info *pinfo,
|
||||
{
|
||||
switch (type) {
|
||||
case VFE_MSG_OUTPUT_P: {
|
||||
pinfo->y_phy = ((struct vfe_endframe *)data)->y_address;
|
||||
pinfo->cbcr_phy =
|
||||
pinfo->planar0_off = ((struct vfe_endframe *)data)->y_address;
|
||||
pinfo->planar1_off =
|
||||
((struct vfe_endframe *)data)->cbcr_address;
|
||||
|
||||
pinfo->planar2_off = pinfo->planar0_off;
|
||||
pinfo->output_id = OUTPUT_TYPE_P;
|
||||
|
||||
CDBG("vfe_7x_convert, y_phy = 0x%x, cbcr_phy = 0x%x\n",
|
||||
pinfo->y_phy, pinfo->cbcr_phy);
|
||||
pinfo->planar0_off, pinfo->planar1_off);
|
||||
|
||||
memcpy(((struct vfe_frame_extra *)extdata),
|
||||
&((struct vfe_endframe *)data)->extra,
|
||||
@@ -92,19 +93,19 @@ static void vfe_7x_convert(struct msm_vfe_phy_info *pinfo,
|
||||
}
|
||||
break;
|
||||
case VFE_MSG_OUTPUT_S: {
|
||||
pinfo->y_phy = paddr_s_y;
|
||||
pinfo->cbcr_phy = paddr_s_cbcr;
|
||||
pinfo->planar0_off = paddr_s_y;
|
||||
pinfo->planar1_off = paddr_s_cbcr;
|
||||
pinfo->output_id = OUTPUT_TYPE_S;
|
||||
CDBG("vfe_7x_convert: y_phy = 0x%x cbcr_phy = 0x%x\n",
|
||||
pinfo->y_phy, pinfo->cbcr_phy);
|
||||
pinfo->planar0_off, pinfo->planar1_off);
|
||||
}
|
||||
break;
|
||||
case VFE_MSG_OUTPUT_T: {
|
||||
pinfo->y_phy = paddr_t_y;
|
||||
pinfo->cbcr_phy = paddr_t_cbcr;
|
||||
pinfo->planar0_off = paddr_t_y;
|
||||
pinfo->planar1_off = paddr_t_cbcr;
|
||||
pinfo->output_id = OUTPUT_TYPE_T;
|
||||
CDBG("vfe_7x_convert: y_phy = 0x%x cbcr_phy = 0x%x\n",
|
||||
pinfo->y_phy, pinfo->cbcr_phy);
|
||||
pinfo->planar0_off, pinfo->planar1_off);
|
||||
}
|
||||
break;
|
||||
case VFE_MSG_STATS_AF:
|
||||
@@ -355,19 +356,20 @@ static int vfe_7x_config_axi(int mode,
|
||||
|
||||
CDBG("bufnum1 = %d\n", ad->bufnum1);
|
||||
if (mode == OUTPUT_1_AND_2) {
|
||||
paddr_t_y = regptr->paddr + regptr->info.y_off;
|
||||
paddr_t_cbcr = regptr->paddr + regptr->info.cbcr_off;
|
||||
paddr_t_y = regptr->paddr + regptr->info.planar0_off;
|
||||
paddr_t_cbcr = regptr->paddr +
|
||||
regptr->info.planar1_off;
|
||||
}
|
||||
|
||||
CDBG("config_axi1: O1, phy = 0x%lx, y_off = %d, cbcr_off =%d\n",
|
||||
regptr->paddr, regptr->info.y_off,
|
||||
regptr->info.cbcr_off);
|
||||
regptr->paddr, regptr->info.planar0_off,
|
||||
regptr->info.planar1_off);
|
||||
|
||||
bptr = &ao->output1buffer1_y_phy;
|
||||
for (cnt = 0; cnt < ad->bufnum1; cnt++) {
|
||||
*bptr = regptr->paddr + regptr->info.y_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar0_off;
|
||||
bptr++;
|
||||
*bptr = regptr->paddr + regptr->info.cbcr_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar1_off;
|
||||
|
||||
bptr++;
|
||||
regptr++;
|
||||
@@ -375,9 +377,9 @@ static int vfe_7x_config_axi(int mode,
|
||||
|
||||
regptr--;
|
||||
for (cnt = 0; cnt < (8 - ad->bufnum1); cnt++) {
|
||||
*bptr = regptr->paddr + regptr->info.y_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar0_off;
|
||||
bptr++;
|
||||
*bptr = regptr->paddr + regptr->info.cbcr_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar1_off;
|
||||
bptr++;
|
||||
}
|
||||
}
|
||||
@@ -386,17 +388,18 @@ static int vfe_7x_config_axi(int mode,
|
||||
regptr = &(ad->region[ad->bufnum1]);
|
||||
|
||||
CDBG("bufnum2 = %d\n", ad->bufnum2);
|
||||
paddr_s_y = regptr->paddr + regptr->info.y_off;
|
||||
paddr_s_cbcr = regptr->paddr + regptr->info.cbcr_off;
|
||||
paddr_s_y = regptr->paddr + regptr->info.planar0_off;
|
||||
paddr_s_cbcr = regptr->paddr + regptr->info.planar1_off;
|
||||
|
||||
CDBG("config_axi2: O2, phy = 0x%lx, y_off = %d, cbcr_off =%d\n",
|
||||
regptr->paddr, regptr->info.y_off, regptr->info.cbcr_off);
|
||||
regptr->paddr, regptr->info.planar0_off,
|
||||
regptr->info.planar1_off);
|
||||
|
||||
bptr = &ao->output2buffer1_y_phy;
|
||||
for (cnt = 0; cnt < ad->bufnum2; cnt++) {
|
||||
*bptr = regptr->paddr + regptr->info.y_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar0_off;
|
||||
bptr++;
|
||||
*bptr = regptr->paddr + regptr->info.cbcr_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar1_off;
|
||||
|
||||
bptr++;
|
||||
regptr++;
|
||||
@@ -404,9 +407,9 @@ static int vfe_7x_config_axi(int mode,
|
||||
|
||||
regptr--;
|
||||
for (cnt = 0; cnt < (8 - ad->bufnum2); cnt++) {
|
||||
*bptr = regptr->paddr + regptr->info.y_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar0_off;
|
||||
bptr++;
|
||||
*bptr = regptr->paddr + regptr->info.cbcr_off;
|
||||
*bptr = regptr->paddr + regptr->info.planar1_off;
|
||||
bptr++;
|
||||
}
|
||||
}
|
||||
@@ -564,10 +567,10 @@ static int vfe_7x_config(struct msm_vfe_cfg_cmd *cmd, void *data)
|
||||
fack.header = VFE_FRAME_ACK;
|
||||
|
||||
fack.output2newybufferaddress =
|
||||
(void *)(p + b->y_off);
|
||||
(void *)(p + b->planar0_off);
|
||||
|
||||
fack.output2newcbcrbufferaddress =
|
||||
(void *)(p + b->cbcr_off);
|
||||
(void *)(p + b->planar1_off);
|
||||
|
||||
vfecmd->queue = QDSP_CMDQUEUE;
|
||||
vfecmd->length = sizeof(struct vfe_outputack);
|
||||
|
||||
@@ -122,10 +122,10 @@ static void vfe_config_axi(int mode,
|
||||
|
||||
for (j = 0; j < ao->output1.fragmentCount; j++) {
|
||||
|
||||
*p1 = regptr->paddr + regptr->info.y_off;
|
||||
*p1 = regptr->paddr + regptr->info.planar0_off;
|
||||
p1++;
|
||||
|
||||
*p2 = regptr->paddr + regptr->info.cbcr_off;
|
||||
*p2 = regptr->paddr + regptr->info.planar1_off;
|
||||
p2++;
|
||||
}
|
||||
regptr++;
|
||||
@@ -144,15 +144,16 @@ static void vfe_config_axi(int mode,
|
||||
|
||||
CDBG("config_axi: O2, phy = 0x%lx, y_off = %d, "\
|
||||
"cbcr_off = %d\n", regptr->paddr,
|
||||
regptr->info.y_off, regptr->info.cbcr_off);
|
||||
regptr->info.planar0_off,
|
||||
regptr->info.planar1_off);
|
||||
|
||||
for (j = 0; j < ao->output2.fragmentCount; j++) {
|
||||
|
||||
*p1 = regptr->paddr + regptr->info.y_off;
|
||||
*p1 = regptr->paddr + regptr->info.planar0_off;
|
||||
CDBG("vfe_config_axi: p1 = 0x%x\n", *p1);
|
||||
p1++;
|
||||
|
||||
*p2 = regptr->paddr + regptr->info.cbcr_off;
|
||||
*p2 = regptr->paddr + regptr->info.planar1_off;
|
||||
CDBG("vfe_config_axi: p2 = 0x%x\n", *p2);
|
||||
p2++;
|
||||
}
|
||||
@@ -174,15 +175,16 @@ static void vfe_config_axi(int mode,
|
||||
|
||||
CDBG("config_axi: O1, phy = 0x%lx, y_off = %d, "\
|
||||
"cbcr_off = %d\n", regptr->paddr,
|
||||
regptr->info.y_off, regptr->info.cbcr_off);
|
||||
regptr->info.planar0_off,
|
||||
regptr->info.planar1_off);
|
||||
|
||||
for (j = 0; j < ao->output1.fragmentCount; j++) {
|
||||
|
||||
*p1 = regptr->paddr + regptr->info.y_off;
|
||||
*p1 = regptr->paddr + regptr->info.planar0_off;
|
||||
CDBG("vfe_config_axi: p1 = 0x%x\n", *p1);
|
||||
p1++;
|
||||
|
||||
*p2 = regptr->paddr + regptr->info.cbcr_off;
|
||||
*p2 = regptr->paddr + regptr->info.planar1_off;
|
||||
CDBG("vfe_config_axi: p2 = 0x%x\n", *p2);
|
||||
p2++;
|
||||
}
|
||||
@@ -194,15 +196,17 @@ static void vfe_config_axi(int mode,
|
||||
|
||||
CDBG("config_axi: O2, phy = 0x%lx, y_off = %d, "\
|
||||
"cbcr_off = %d\n", regptr1->paddr,
|
||||
regptr1->info.y_off, regptr1->info.cbcr_off);
|
||||
regptr1->info.planar0_off, regptr1->info.planar1_off);
|
||||
|
||||
for (j = 0; j < ao->output2.fragmentCount; j++) {
|
||||
|
||||
*p1 = regptr1->paddr + regptr1->info.y_off;
|
||||
*p1 = regptr1->paddr +
|
||||
regptr1->info.planar0_off;
|
||||
CDBG("vfe_config_axi: p1 = 0x%x\n", *p1);
|
||||
p1++;
|
||||
|
||||
*p2 = regptr1->paddr + regptr1->info.cbcr_off;
|
||||
*p2 = regptr1->paddr +
|
||||
regptr1->info.planar1_off;
|
||||
CDBG("vfe_config_axi: p2 = 0x%x\n", *p2);
|
||||
p2++;
|
||||
}
|
||||
@@ -689,9 +693,9 @@ static int vfe_config(struct msm_vfe_cfg_cmd *cmd, void *data)
|
||||
b = (struct msm_frame *)(cmd->value);
|
||||
p = *(unsigned long *)data;
|
||||
|
||||
fack.ybufaddr[0] = (uint32_t) (p + b->y_off);
|
||||
fack.ybufaddr[0] = (uint32_t) (p + b->planar0_off);
|
||||
|
||||
fack.chromabufaddr[0] = (uint32_t) (p + b->cbcr_off);
|
||||
fack.chromabufaddr[0] = (uint32_t) (p + b->planar1_off);
|
||||
|
||||
if (b->path == OUTPUT_TYPE_P)
|
||||
vfe_output_p_ack(&fack);
|
||||
|
||||
@@ -608,11 +608,12 @@ static void vfe_addr_convert(struct msm_vfe_phy_info *pinfo,
|
||||
switch (type) {
|
||||
case VFE_MSG_OUTPUT_P:
|
||||
case VFE_MSG_OUTPUT_V:{
|
||||
pinfo->y_phy =
|
||||
pinfo->planar0_off =
|
||||
((struct vfe_message *)data)->_u.msgOutput2.yBuffer;
|
||||
pinfo->cbcr_phy =
|
||||
pinfo->planar1_off =
|
||||
((struct vfe_message *)data)->_u.msgOutput2.
|
||||
cbcrBuffer;
|
||||
pinfo->planar2_off = pinfo->planar0_off;
|
||||
ctrl->extdata.bpcInfo =
|
||||
((struct vfe_message *)data)->_u.msgOutput2.bpcInfo;
|
||||
ctrl->extdata.asfInfo =
|
||||
|
||||
@@ -709,15 +709,15 @@ static int vpe_update_scaler_with_dis(struct video_crop_t *pcrop,
|
||||
return 1;
|
||||
}
|
||||
|
||||
void msm_send_frame_to_vpe(uint32_t pyaddr, uint32_t pcbcraddr,
|
||||
void msm_send_frame_to_vpe(uint32_t p0_phy_add, uint32_t p1_phy_add,
|
||||
struct timespec *ts, int output_type)
|
||||
{
|
||||
uint32_t temp_pyaddr = 0, temp_pcbcraddr = 0;
|
||||
|
||||
CDBG("vpe input, pyaddr = 0x%x, pcbcraddr = 0x%x\n",
|
||||
pyaddr, pcbcraddr);
|
||||
msm_io_w(pyaddr, vpe_device->vpebase + VPE_SRCP0_ADDR_OFFSET);
|
||||
msm_io_w(pcbcraddr, vpe_device->vpebase + VPE_SRCP1_ADDR_OFFSET);
|
||||
CDBG("vpe input, p0_phy_add = 0x%x, p1_phy_add = 0x%x\n",
|
||||
p0_phy_add, p1_phy_add);
|
||||
msm_io_w(p0_phy_add, vpe_device->vpebase + VPE_SRCP0_ADDR_OFFSET);
|
||||
msm_io_w(p1_phy_add, vpe_device->vpebase + VPE_SRCP1_ADDR_OFFSET);
|
||||
|
||||
if (vpe_ctrl->state == VPE_STATE_ACTIVE)
|
||||
CDBG(" =====VPE is busy!!! Wrong!========\n");
|
||||
@@ -881,7 +881,7 @@ static int vpe_proc_general(struct msm_vpe_cmd *cmd)
|
||||
vpe_update_scaler_with_dis(&(vpe_buf->vpe_crop),
|
||||
&(vpe_ctrl->dis_offset));
|
||||
|
||||
msm_send_frame_to_vpe(vpe_buf->y_phy, vpe_buf->cbcr_phy,
|
||||
msm_send_frame_to_vpe(vpe_buf->p0_phy, vpe_buf->p1_phy,
|
||||
&(vpe_buf->ts), OUTPUT_TYPE_V);
|
||||
|
||||
if (!qcmd || !atomic_read(&qcmd->on_heap)) {
|
||||
@@ -919,10 +919,12 @@ static void vpe_addr_convert(struct msm_vpe_phy_info *pinfo,
|
||||
|
||||
CDBG("In vpe_addr_convert output_id = %d\n", pinfo->output_id);
|
||||
|
||||
pinfo->y_phy =
|
||||
((struct vpe_message *)data)->_u.msgOut.yBuffer;
|
||||
pinfo->cbcr_phy =
|
||||
((struct vpe_message *)data)->_u.msgOut.cbcrBuffer;
|
||||
pinfo->p0_phy =
|
||||
((struct vpe_message *)data)->_u.msgOut.p0_Buffer;
|
||||
pinfo->p1_phy =
|
||||
((struct vpe_message *)data)->_u.msgOut.p1_Buffer;
|
||||
pinfo->p2_phy = pinfo->p0_phy;
|
||||
|
||||
*ext = vpe_ctrl->extdata;
|
||||
*elen = vpe_ctrl->extlen;
|
||||
}
|
||||
@@ -987,10 +989,10 @@ int vpe_config_axi(struct axidata *ad)
|
||||
|
||||
regp1 = &(ad->region[0]);
|
||||
/* for video Y address */
|
||||
p1 = (regp1->paddr + regp1->info.y_off);
|
||||
p1 = (regp1->paddr + regp1->info.planar0_off);
|
||||
msm_io_w(p1, vpe_device->vpebase + VPE_OUTP0_ADDR_OFFSET);
|
||||
/* for video CbCr address */
|
||||
p1 = (regp1->paddr + regp1->info.cbcr_off);
|
||||
p1 = (regp1->paddr + regp1->info.planar1_off);
|
||||
msm_io_w(p1, vpe_device->vpebase + VPE_OUTP1_ADDR_OFFSET);
|
||||
|
||||
return 0;
|
||||
@@ -1048,8 +1050,8 @@ void msm_vpe_offset_update(int frame_pack, uint32_t pyaddr, uint32_t pcbcraddr,
|
||||
vpe_ctrl->frame_pack = frame_pack;
|
||||
vpe_ctrl->output_type = output_id;
|
||||
|
||||
input_stride = (st_half.buf_cbcr_stride * (1<<16)) +
|
||||
st_half.buf_y_stride;
|
||||
input_stride = (st_half.buf_p1_stride * (1<<16)) +
|
||||
st_half.buf_p0_stride;
|
||||
|
||||
msm_io_w(input_stride, vpe_device->vpebase + VPE_SRC_YSTRIDE1_OFFSET);
|
||||
|
||||
@@ -1059,15 +1061,16 @@ void msm_vpe_offset_update(int frame_pack, uint32_t pyaddr, uint32_t pcbcraddr,
|
||||
msm_send_frame_to_vpe(pyaddr, pcbcraddr, ts, output_id);
|
||||
}
|
||||
|
||||
static void vpe_send_outmsg(uint8_t msgid, uint32_t pyaddr,
|
||||
uint32_t pcbcraddr)
|
||||
static void vpe_send_outmsg(uint8_t msgid, uint32_t p0_addr,
|
||||
uint32_t p1_addr, uint32_t p2_addr)
|
||||
{
|
||||
struct vpe_message msg;
|
||||
uint8_t outid;
|
||||
msg._d = outid = msgid;
|
||||
msg._u.msgOut.output_id = msgid;
|
||||
msg._u.msgOut.yBuffer = pyaddr;
|
||||
msg._u.msgOut.cbcrBuffer = pcbcraddr;
|
||||
msg._u.msgOut.p0_Buffer = p0_addr;
|
||||
msg._u.msgOut.p1_Buffer = p1_addr;
|
||||
msg._u.msgOut.p2_Buffer = p2_addr;
|
||||
vpe_proc_ops(outid, &msg, sizeof(struct vpe_message));
|
||||
return;
|
||||
}
|
||||
@@ -1203,10 +1206,11 @@ static void vpe_do_tasklet(unsigned long data)
|
||||
if (vpe_ctrl->output_type == OUTPUT_TYPE_ST_R) {
|
||||
CDBG("vpe send out R msg.\n");
|
||||
vpe_send_outmsg(MSG_ID_VPE_OUTPUT_ST_R, pyaddr,
|
||||
pcbcraddr);
|
||||
pcbcraddr, pyaddr);
|
||||
} else if (vpe_ctrl->output_type == OUTPUT_TYPE_V) {
|
||||
CDBG("vpe send out V msg.\n");
|
||||
vpe_send_outmsg(MSG_ID_VPE_OUTPUT_V, pyaddr, pcbcraddr);
|
||||
vpe_send_outmsg(MSG_ID_VPE_OUTPUT_V, pyaddr, pcbcraddr,
|
||||
pyaddr);
|
||||
}
|
||||
|
||||
vpe_ctrl->output_type = 0;
|
||||
|
||||
@@ -212,8 +212,9 @@ struct vpe_msg_stats{
|
||||
|
||||
struct vpe_msg_output {
|
||||
uint8_t output_id;
|
||||
uint32_t yBuffer;
|
||||
uint32_t cbcrBuffer;
|
||||
uint32_t p0_Buffer;
|
||||
uint32_t p1_Buffer;
|
||||
uint32_t p2_Buffer;
|
||||
uint32_t frameCounter;
|
||||
};
|
||||
|
||||
|
||||
@@ -183,8 +183,8 @@ static int videobuf_pmem_contig_user_get(struct videobuf_contig_pmem *mem,
|
||||
return rc;
|
||||
}
|
||||
mem->phyaddr += vb->boff;
|
||||
mem->y_off = 0;
|
||||
mem->cbcr_off = (vb->size)*2/3;
|
||||
mem->planar0_off = 0;
|
||||
mem->planar1_off = (vb->size)*2/3;
|
||||
mem->is_userptr = 1;
|
||||
return rc;
|
||||
}
|
||||
@@ -274,8 +274,8 @@ static int __videobuf_mmap_mapper(struct videobuf_queue *q,
|
||||
MAGIC_CHECK(mem->magic, MAGIC_PMEM);
|
||||
|
||||
mem->size = PAGE_ALIGN(buf->bsize);
|
||||
mem->y_off = 0;
|
||||
mem->cbcr_off = (buf->bsize)*2/3;
|
||||
mem->planar0_off = 0;
|
||||
mem->planar1_off = (buf->bsize)*2/3;
|
||||
if (buf->i >= 0 && buf->i <= 3)
|
||||
mem->buffer_type = OUTPUT_TYPE_P;
|
||||
else
|
||||
|
||||
@@ -369,8 +369,9 @@ struct msm_pmem_info {
|
||||
void *vaddr;
|
||||
uint32_t offset;
|
||||
uint32_t len;
|
||||
uint32_t y_off;
|
||||
uint32_t cbcr_off;
|
||||
uint32_t planar0_off;
|
||||
uint32_t planar1_off;
|
||||
uint32_t planar2_off;
|
||||
uint8_t active;
|
||||
};
|
||||
|
||||
@@ -416,8 +417,9 @@ struct msm_frame {
|
||||
int type;
|
||||
unsigned long buffer;
|
||||
uint32_t phy_offset;
|
||||
uint32_t y_off;
|
||||
uint32_t cbcr_off;
|
||||
uint32_t planar0_off;
|
||||
uint32_t planar1_off;
|
||||
uint32_t planar2_off;
|
||||
int fd;
|
||||
|
||||
void *cropinfo;
|
||||
@@ -444,10 +446,10 @@ struct msm_st_crop {
|
||||
};
|
||||
|
||||
struct msm_st_half {
|
||||
uint32_t buf_y_off;
|
||||
uint32_t buf_cbcr_off;
|
||||
uint32_t buf_y_stride;
|
||||
uint32_t buf_cbcr_stride;
|
||||
uint32_t buf_p0_off;
|
||||
uint32_t buf_p1_off;
|
||||
uint32_t buf_p0_stride;
|
||||
uint32_t buf_p1_stride;
|
||||
uint32_t pix_x_off;
|
||||
uint32_t pix_y_off;
|
||||
struct msm_st_crop stCropInfo;
|
||||
|
||||
@@ -23,8 +23,9 @@ struct videobuf_contig_pmem {
|
||||
int phyaddr;
|
||||
unsigned long size;
|
||||
int is_userptr;
|
||||
uint32_t y_off;
|
||||
uint32_t cbcr_off;
|
||||
uint32_t planar0_off;
|
||||
uint32_t planar1_off;
|
||||
uint32_t planar2_off;
|
||||
int buffer_type;
|
||||
struct file *file;
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user