DL-Mirrors/kernel-tenderloin-3.0
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msm: restart: Enable the restart driver for MSM9615

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This makes it possible to cleanly reboot 9615.
the PS_HOLD reboot method will not work if T32 is connected.

Change-Id: Iaab63436da7de5a45f1759f49a9daeed5964b1a2
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
This commit is contained in:
Rohit Vaswani
2011-10-13 18:13:10 -07:00
parent 4f96570c9d
commit f688fa6361
4 changed files with 31 additions and 10 deletions
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1
arch/arm/mach-msm/Kconfig
View File

@@ -172,6 +172,7 @@ config ARCH_MSM9615
select MSM_GPIOMUX
select MSM_RPM
select MSM_SPM_V2
select MSM_NATIVE_RESTART
endmenu
choice

17
arch/arm/mach-msm/board-9615.c
View File

@@ -87,6 +87,12 @@ static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
},
};
static struct gpiomux_setting ps_hold = {
.func = GPIOMUX_FUNC_1,
.drv = GPIOMUX_DRV_8MA,
.pull = GPIOMUX_PULL_NONE,
};
static struct gpiomux_setting gsbi4 = {
.func = GPIOMUX_FUNC_1,
.drv = GPIOMUX_DRV_8MA,
@@ -111,6 +117,15 @@ static struct gpiomux_setting gsbi3_cs1_config = {
.pull = GPIOMUX_PULL_NONE,
};
struct msm_gpiomux_config msm9615_ps_hold_config[] __initdata = {
{
.gpio = 83,
.settings = {
[GPIOMUX_SUSPENDED] = &ps_hold,
},
},
};
struct msm_gpiomux_config msm9615_gsbi_configs[] __initdata = {
{
.gpio = 8, /* GSBI3 QUP SPI_CLK */
@@ -460,6 +475,8 @@ static int __init gpiomux_init(void)
msm_gpiomux_install(msm9615_gsbi_configs,
ARRAY_SIZE(msm9615_gsbi_configs));
msm_gpiomux_install(msm9615_ps_hold_config,
ARRAY_SIZE(msm9615_ps_hold_config));
return 0;
}

2
arch/arm/mach-msm/include/mach/restart.h
View File

@@ -17,7 +17,7 @@
#define RESTART_NORMAL 0x0
#define RESTART_DLOAD 0x1
#if defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960)
#ifdef CONFIG_MSM_NATIVE_RESTART
void msm_set_restart_mode(int mode);
#else
#define msm_set_restart_mode(mode)

21
arch/arm/mach-msm/restart.c
View File

@@ -33,11 +33,12 @@
#include <mach/irqs.h>
#include <mach/scm.h>
#include "msm_watchdog.h"
#include "timer.h"
#define WDT0_RST (MSM_TMR0_BASE + 0x38)
#define WDT0_EN (MSM_TMR0_BASE + 0x40)
#define WDT0_BARK_TIME (MSM_TMR0_BASE + 0x4C)
#define WDT0_BITE_TIME (MSM_TMR0_BASE + 0x5C)
#define WDT0_RST 0x38
#define WDT0_EN 0x40
#define WDT0_BARK_TIME 0x4C
#define WDT0_BITE_TIME 0x5C
#define PSHOLD_CTL_SU (MSM_TLMM_BASE + 0x820)
@@ -50,6 +51,7 @@ static int restart_mode;
void *restart_reason;
int pmic_reset_irq;
static void __iomem *msm_tmr0_base;
#ifdef CONFIG_MSM_DLOAD_MODE
static int in_panic;
@@ -218,7 +220,7 @@ void arch_reset(char mode, const char *cmd)
}
}
__raw_writel(0, WDT0_EN);
__raw_writel(0, msm_tmr0_base + WDT0_EN);
if (!(machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())) {
mb();
__raw_writel(0, PSHOLD_CTL_SU); /* Actually reset the chip */
@@ -226,10 +228,10 @@ void arch_reset(char mode, const char *cmd)
pr_notice("PS_HOLD didn't work, falling back to watchdog\n");
}
__raw_writel(1, WDT0_RST);
__raw_writel(5*0x31F3, WDT0_BARK_TIME);
__raw_writel(0x31F3, WDT0_BITE_TIME);
__raw_writel(1, WDT0_EN);
__raw_writel(1, msm_tmr0_base + WDT0_RST);
__raw_writel(5*0x31F3, msm_tmr0_base + WDT0_BARK_TIME);
__raw_writel(0x31F3, msm_tmr0_base + WDT0_BITE_TIME);
__raw_writel(1, msm_tmr0_base + WDT0_EN);
mdelay(10000);
printk(KERN_ERR "Restarting has failed\n");
@@ -246,6 +248,7 @@ static int __init msm_restart_init(void)
/* Reset detection is switched on below.*/
set_dload_mode(1);
#endif
msm_tmr0_base = msm_timer_get_timer0_base();
restart_reason = MSM_IMEM_BASE + RESTART_REASON_ADDR;
pm_power_off = msm_power_off;