Merge "input: cyttsp-i2c: Don't set mode on unsettable regulators" into msm-3.0
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QuIC Gerrit Code Review
commit
ffec7399bb
@@ -2407,27 +2407,29 @@ static int cyttsp_power_device(struct cyttsp *ts, bool on)
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regulator_put(ts->vdd[i]);
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goto error_vdd;
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}
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}
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rc = regulator_set_optimum_mode(ts->vdd[i],
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rc = regulator_set_optimum_mode(ts->vdd[i],
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reg_info[i].hpm_load_uA);
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if (rc < 0) {
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pr_err("%s: regulator_set_optimum_mode failed rc=%d\n",
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__func__, rc);
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if (rc < 0) {
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pr_err("%s: regulator_set_optimum_mode failed "
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"rc=%d\n", __func__, rc);
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regulator_set_voltage(ts->vdd[i], 0,
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reg_info[i].max_uV);
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regulator_put(ts->vdd[i]);
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goto error_vdd;
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regulator_set_voltage(ts->vdd[i], 0,
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reg_info[i].max_uV);
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regulator_put(ts->vdd[i]);
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goto error_vdd;
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}
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}
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rc = regulator_enable(ts->vdd[i]);
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if (rc) {
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pr_err("%s: regulator_enable failed rc =%d\n",
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__func__, rc);
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regulator_set_optimum_mode(ts->vdd[i], 0);
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regulator_set_voltage(ts->vdd[i], 0,
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reg_info[i].max_uV);
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if (regulator_count_voltages(ts->vdd[i]) > 0) {
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regulator_set_optimum_mode(ts->vdd[i], 0);
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regulator_set_voltage(ts->vdd[i], 0,
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reg_info[i].max_uV);
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}
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regulator_put(ts->vdd[i]);
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goto error_vdd;
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}
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@@ -2439,10 +2441,11 @@ ts_reg_disable:
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i = ts->platform_data->num_regulators;
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error_vdd:
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while (--i >= 0) {
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if (regulator_count_voltages(ts->vdd[i]) > 0)
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if (regulator_count_voltages(ts->vdd[i]) > 0) {
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regulator_set_voltage(ts->vdd[i], 0,
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reg_info[i].max_uV);
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regulator_set_optimum_mode(ts->vdd[i], 0);
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regulator_set_optimum_mode(ts->vdd[i], 0);
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}
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regulator_disable(ts->vdd[i]);
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regulator_put(ts->vdd[i]);
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}
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@@ -2834,6 +2837,8 @@ static int cyttsp_regulator_lpm(struct cyttsp *ts, bool on)
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goto regulator_hpm;
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for (i = 0; i < num_reg; i++) {
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if (regulator_count_voltages(ts->vdd[i]) < 0)
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continue;
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rc = regulator_set_optimum_mode(ts->vdd[i],
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reg_info[i].lpm_load_uA);
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if (rc < 0) {
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@@ -2848,6 +2853,8 @@ static int cyttsp_regulator_lpm(struct cyttsp *ts, bool on)
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regulator_hpm:
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for (i = 0; i < num_reg; i++) {
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if (regulator_count_voltages(ts->vdd[i]) < 0)
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continue;
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rc = regulator_set_optimum_mode(ts->vdd[i],
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reg_info[i].hpm_load_uA);
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if (rc < 0) {
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@@ -2860,16 +2867,22 @@ regulator_hpm:
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return 0;
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fail_regulator_lpm:
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while (i--)
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while (i--) {
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if (regulator_count_voltages(ts->vdd[i]) < 0)
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continue;
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regulator_set_optimum_mode(ts->vdd[i],
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reg_info[i].hpm_load_uA);
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}
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return rc;
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fail_regulator_hpm:
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while (i--)
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while (i--) {
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if (regulator_count_voltages(ts->vdd[i]) < 0)
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continue;
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regulator_set_optimum_mode(ts->vdd[i],
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reg_info[i].lpm_load_uA);
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}
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return rc;
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}
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