The L1CC PMU interrupt is a PPI, so use the per-CPU
request, free, enable, disable API.
Change-Id: I150dcb6ead34f0548c3fa31cc21bf7ac4d427a96
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Update the active perf counter data structs with the most recent
values of the counters before going into powercollapse and restore
the corresponding hardware counters with these values when coming
out of it.
This change fixes a bug where the counter outputs show wild swings
when CPU power collapse is enabled.
Change-Id: I9c4ff4d4504df5b50c33a796c605126448c440cb
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Some PMU registers have undefined values at reset. Power collapsing
CPU's can cause the PMU state to be messed up. Use the CPU PM notifiers
to save and restore PMU state correctly.
Change-Id: I4d5d73abc3455b38219239527d94d4afc30ed886
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Mode exclusion allows for counting filtered by the mode
the CPU in running in.
e.g.
perf stat -e rXXX:u to count only userspace activity
perf stat -e rXXX:k to count only kernel activity
Change-Id: I6cf6035d3cfe8d3ee8534ffe130eac6e965aa899
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Add perf support for Krait P2 which has different base
addresses and supports counting of VeNUM events.
Change-Id: I39e6a52314f2463dfea0765c68825dd0d84dd04f
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
The PMUv2 specification reserves a number of event encodings
for common events.
This patch adds these events to the common event enumeration
in preparation for PMUv2 cores, such as Cortex-A15.
Change-Id: Iea424bb8cb7c6ec59a565c75bd899de5b36e1f90
Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
[tdas@codeaurora.org: fixup msm ARMV7_PERFCTR_PC_BRANCH_MIS_USED
is now replaced with ARMV7_PERFCTR_PC_BRANCH_PRED]
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Change CONFIG_ARCH_MSM_SMP to CONFIG_MSM_SMP, which is the
proper macro name.
Change-Id: I5d44edf596d8c01e644febf080fe819a6df402e9
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
